diff options
Diffstat (limited to 'libc/sysdeps/linux')
107 files changed, 1906 insertions, 1105 deletions
diff --git a/libc/sysdeps/linux/aarch64/bits/fcntl.h b/libc/sysdeps/linux/aarch64/bits/fcntl.h index dbe929351..024344eec 100644 --- a/libc/sysdeps/linux/aarch64/bits/fcntl.h +++ b/libc/sysdeps/linux/aarch64/bits/fcntl.h @@ -289,3 +289,6 @@ extern int fallocate64 (int __fd, int __mode, __off64_t __offset, #endif /* use GNU */ __END_DECLS + +/* Include generic Linux declarations. */ +#include <bits/fcntl-linux.h> diff --git a/libc/sysdeps/linux/aarch64/bits/fenv.h b/libc/sysdeps/linux/aarch64/bits/fenv.h new file mode 100644 index 000000000..4febd2177 --- /dev/null +++ b/libc/sysdeps/linux/aarch64/bits/fenv.h @@ -0,0 +1,78 @@ +/* Copyright (C) 2004-2025 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public License as + published by the Free Software Foundation; either version 2.1 of the + License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. */ + +#ifndef _FENV_H +# error "Never use <bits/fenv.h> directly; include <fenv.h> instead." +#endif + +/* Define bits representing exceptions in the FPSR status word. */ +enum + { + FE_INVALID = +#define FE_INVALID 1 + FE_INVALID, + FE_DIVBYZERO = +#define FE_DIVBYZERO 2 + FE_DIVBYZERO, + FE_OVERFLOW = +#define FE_OVERFLOW 4 + FE_OVERFLOW, + FE_UNDERFLOW = +#define FE_UNDERFLOW 8 + FE_UNDERFLOW, + FE_INEXACT = +#define FE_INEXACT 16 + FE_INEXACT, + }; + +/* Amount to shift by to convert an exception bit in FPSR to a an + exception bit mask in FPCR. */ +#define FE_EXCEPT_SHIFT 8 + +/* All supported exceptions. */ +#define FE_ALL_EXCEPT \ + (FE_INVALID | FE_DIVBYZERO | FE_OVERFLOW | FE_UNDERFLOW | FE_INEXACT) + +/* Define bits representing rounding modes in the FPCR Rmode field. */ +#define FE_TONEAREST 0x000000 +#define FE_UPWARD 0x400000 +#define FE_DOWNWARD 0x800000 +#define FE_TOWARDZERO 0xc00000 + +/* Type representing exception flags. */ +typedef unsigned int fexcept_t; + +/* Type representing floating-point environment. */ +typedef struct + { + unsigned int __fpcr; + unsigned int __fpsr; + } +fenv_t; + +/* If the default argument is used we use this value. */ +#define FE_DFL_ENV ((const fenv_t *) -1l) + +#ifdef __USE_GNU +/* Floating-point environment where none of the exceptions are masked. */ +# define FE_NOMASK_ENV ((const fenv_t *) -2) +#endif + +/* Type representing floating-point control modes. */ +typedef unsigned int femode_t; + +/* Default floating-point control modes. */ +# define FE_DFL_MODE ((const femode_t *) -1L) diff --git a/libc/sysdeps/linux/aarch64/crt1.S b/libc/sysdeps/linux/aarch64/crt1.S index e9f946894..965d3265d 100644 --- a/libc/sysdeps/linux/aarch64/crt1.S +++ b/libc/sysdeps/linux/aarch64/crt1.S @@ -52,8 +52,8 @@ _start: /* Save off the atexit pointer */ mov x19, x0 - /* Calculate load address... idk how this works, but it does */ - adrp x0, _start + /* "Calculate" load address. The link address of __ehdr_start is 0. */ + adrp x0, __ehdr_start /* Do relocations */ bl reloc_static_pie diff --git a/libc/sysdeps/linux/aarch64/fpu_control.h b/libc/sysdeps/linux/aarch64/fpu_control.h new file mode 100644 index 000000000..c3e7f6629 --- /dev/null +++ b/libc/sysdeps/linux/aarch64/fpu_control.h @@ -0,0 +1,102 @@ +/* Copyright (C) 1996-2025 Free Software Foundation, Inc. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public License as + published by the Free Software Foundation; either version 2.1 of the + License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + <https://www.gnu.org/licenses/>. */ + +#ifndef _AARCH64_FPU_CONTROL_H +#define _AARCH64_FPU_CONTROL_H + +#include <features.h> + +/* Macros for accessing the FPCR and FPSR. */ + +#if __GNUC_PREREQ (6,0) +# define _FPU_GETCW(fpcr) (fpcr = __builtin_aarch64_get_fpcr ()) +# define _FPU_SETCW(fpcr) __builtin_aarch64_set_fpcr (fpcr) +# define _FPU_GETFPSR(fpsr) (fpsr = __builtin_aarch64_get_fpsr ()) +# define _FPU_SETFPSR(fpsr) __builtin_aarch64_set_fpsr (fpsr) +#else +# define _FPU_GETCW(fpcr) \ + ({ \ + __uint64_t __fpcr; \ + __asm__ __volatile__ ("mrs %0, fpcr" : "=r" (__fpcr)); \ + fpcr = __fpcr; \ + }) + +# define _FPU_SETCW(fpcr) \ + ({ \ + __uint64_t __fpcr = fpcr; \ + __asm__ __volatile__ ("msr fpcr, %0" : : "r" (__fpcr)); \ + }) + +# define _FPU_GETFPSR(fpsr) \ + ({ \ + __uint64_t __fpsr; \ + __asm__ __volatile__ ("mrs %0, fpsr" : "=r" (__fpsr)); \ + fpsr = __fpsr; \ + }) + +# define _FPU_SETFPSR(fpsr) \ + ({ \ + __uint64_t __fpsr = fpsr; \ + __asm__ __volatile__ ("msr fpsr, %0" : : "r" (__fpsr)); \ + }) +#endif + +/* Reserved bits should be preserved when modifying register + contents. These two masks indicate which bits in each of FPCR and + FPSR should not be changed. */ + +#define _FPU_RESERVED 0xfe0fe0f8 +#define _FPU_FPSR_RESERVED 0x0fffffe0 + +#define _FPU_DEFAULT 0x00000000 +#define _FPU_FPSR_DEFAULT 0x00000000 + +/* Layout of FPCR and FPSR: + + | | | | | | | | + 0 0 0 0 1 1 1 0 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0 + s s s s s s s s s s s + c c c c c c c c c c c c + N Z C V Q A D F R R S S S L L L I U U I U O D I I U U I U O D I + C H N Z M M T T B E E E D N N X F F Z O D N N X F F Z O + P O O R R Z N N N E K K E E E E E C K K C C C C C + D D I I P + E E D D + E E + */ + +#define _FPU_FPCR_RM_MASK 0xc00000 + +#define _FPU_FPCR_MASK_IXE 0x1000 +#define _FPU_FPCR_MASK_UFE 0x0800 +#define _FPU_FPCR_MASK_OFE 0x0400 +#define _FPU_FPCR_MASK_DZE 0x0200 +#define _FPU_FPCR_MASK_IOE 0x0100 + +#define _FPU_FPCR_IEEE \ + (_FPU_DEFAULT | _FPU_FPCR_MASK_IXE \ + | _FPU_FPCR_MASK_UFE | _FPU_FPCR_MASK_OFE \ + | _FPU_FPCR_MASK_DZE | _FPU_FPCR_MASK_IOE) + +#define _FPU_FPSR_IEEE 0 + +typedef unsigned int fpu_control_t; +typedef unsigned int fpu_fpsr_t; + +/* Default control word set at startup. */ +extern fpu_control_t __fpu_control; + +#endif diff --git a/libc/sysdeps/linux/alpha/bits/fcntl.h b/libc/sysdeps/linux/alpha/bits/fcntl.h index 11e68214e..7d06c76b7 100644 --- a/libc/sysdeps/linux/alpha/bits/fcntl.h +++ b/ |