diff options
Diffstat (limited to 'libc/sysdeps/linux/arc')
| -rw-r--r-- | libc/sysdeps/linux/arc/asm.h | 91 | ||||
| -rw-r--r-- | libc/sysdeps/linux/arc/bits/atomic.h | 76 | ||||
| -rw-r--r-- | libc/sysdeps/linux/arc/bits/syscalls.h | 4 | ||||
| -rwxr-xr-x | libc/sysdeps/linux/arc/bits/uClibc_arch_features.h | 3 | ||||
| -rw-r--r-- | libc/sysdeps/linux/arc/crt1.S | 4 | ||||
| -rw-r--r-- | libc/sysdeps/linux/arc/sigrestorer.S | 3 |
6 files changed, 172 insertions, 9 deletions
diff --git a/libc/sysdeps/linux/arc/asm.h b/libc/sysdeps/linux/arc/asm.h new file mode 100644 index 000000000..f83075ea1 --- /dev/null +++ b/libc/sysdeps/linux/arc/asm.h @@ -0,0 +1,91 @@ +/* + * Copyright (C) 2022, Synopsys, Inc. (www.synopsys.com) + * + * Licensed under the LGPL v2.1 or later, see the file COPYING.LIB in this tarball. + */ + +#ifndef _ARC_ASM_H +#define _ARC_ASM_H + +/* + * Some 16-bit instructions were excluded from the ARCv3 ISA + * the following macros are introduced to handle these changes in one place. + * This will allow not to change existing ARCv2 code and use 16-bit versions + * of instructions for ARCv2 and replace them with 32-bit vesrions for ARCv3 + */ + +#if defined (__ARC64_ARCH32__) + +.macro PUSHR reg + push \reg +.endm + +.macro PUSHR_S reg + push \reg +.endm + +.macro POPR reg + pop \reg +.endm + +.macro POPR_S reg + pop \reg +.endm + +.macro SUBR_S dst,src1,src2 + sub \dst, \src1, \src2 +.endm + +.macro ADDR_S dst,src1,src2 + add \dst, \src1, \src2 +.endm + +.macro ASRR_S dst,src1,src2 + asr \dst, \src1, \src2 +.endm + +.macro ASLR_S dst,src1,src2 + asl \dst, \src1, \src2 +.endm + +#elif defined (__ARC64_ARCH64__) + +# error ARCv3 64-bit is not supported by uClibc-ng + +#else /* ARCHS || ARC700 */ + +.macro PUSHR reg + push \reg +.endm + +.macro PUSHR_S reg + push_s \reg +.endm + +.macro POPR reg + pop \reg +.endm + +.macro POPR_S reg + pop_s \reg +.endm + +.macro SUBR_S dst,src1,src2 + sub_s \dst, \src1, \src2 +.endm + +.macro ADDR_S dst,src1,src2 + add_s \dst, \src1, \src2 +.endm + +.macro ASRR_S dst,src1,src2 + asr_s \dst, \src1, \src2 +.endm + +.macro ASLR_S dst,src1,src2 + asl_s \dst, \src1, \src2 +.endm + +#endif + +#endif /* _ARC_ASM_H */ diff --git a/libc/sysdeps/linux/arc/bits/atomic.h b/libc/sysdeps/linux/arc/bits/atomic.h index 587860964..610b3c7c7 100644 --- a/libc/sysdeps/linux/arc/bits/atomic.h +++ b/libc/sysdeps/linux/arc/bits/atomic.h @@ -26,8 +26,10 @@ void __arc_link_error (void); #ifdef __A7__ #define atomic_full_barrier() __asm__ __volatile__("": : :"memory") +#define ARC_BARRIER_INSTR "" #else #define atomic_full_barrier() __asm__ __volatile__("dmb 3": : :"memory") +#define ARC_BARRIER_INSTR "dmb 3" #endif /* Atomic compare and exchange. */ @@ -38,11 +40,12 @@ void __arc_link_error (void); #define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \ ({ __arc_link_error (); oldval; }) -#define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \ +#define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \ ({ __arc_link_error (); oldval; }) #ifdef __CONFIG_ARC_HAS_ATOMICS__ +#ifdef __A7__ #define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ ({ \ __typeof(oldval) prev; \ @@ -60,8 +63,55 @@ void __arc_link_error (void); \ prev; \ }) +#else /* !__A7__ */ +#define USE_ATOMIC_COMPILER_BUILTINS 1 -#else +#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \ + ({ \ + __typeof(*mem) __oldval = (oldval); \ + __atomic_compare_exchange_n(mem, (void *) &__oldval, newval, 0, \ + __ATOMIC_ACQUIRE, __ATOMIC_RELAXED); \ + __oldval; \ + }) + +#define __arch_compare_and_exchange_val_8_rel(mem, newval, oldval) \ + ({ __arc_link_error (); oldval; }) + +#define __arch_compare_and_exchange_val_16_rel(mem, newval, oldval) \ + ({ __arc_link_error (); oldval; }) + +#define __arch_compare_and_exchange_val_64_rel(mem, newval, oldval) \ + ({ __arc_link_error (); oldval; }) + +#define __arch_compare_and_exchange_val_32_rel(mem, newval, oldval) \ + ({ \ + __typeof(*mem) __oldval = (oldval); \ + __atomic_compare_exchange_n(mem, (void *) &__oldval, newval, 0, \ + __ATOMIC_RELEASE, __ATOMIC_RELAXED); \ + __oldval; \ + }) + +/* Compare and exchange with "acquire" semantics, ie barrier after */ +#define atomic_compare_and_exchange_val_acq(mem, new, old) \ + __atomic_val_bysize(__arch_compare_and_exchange_val, acq, \ + mem, new, old) + +/* Compare and exchange with "release" semantics, ie barrier before */ +#define atomic_compare_and_exchange_val_rel(mem, new, old) \ + __atomic_val_bysize(__arch_compare_and_exchange_val, rel, \ + mem, new, old) + +/* Explicitly define here to use release semantics*/ +#define atomic_compare_and_exchange_bool_rel(mem, newval, oldval) \ + ({ \ + __typeof (oldval) __atg3_old = (oldval); \ + atomic_compare_and_exchange_val_rel (mem, newval, __atg3_old) \ + != __atg3_old; \ + }) + +#endif /* __A7__ */ + +#else /* !__CONFIG_ARC_HAS_ATOMICS__ */ #ifndef __NR_arc_usr_cmpxchg #error "__NR_arc_usr_cmpxchg missing: Please upgrade to kernel 4.9+ headers" @@ -101,6 +151,21 @@ void __arc_link_error (void); __typeof__(*(mem)) val = newval; \ \ __asm__ __volatile__( \ + "ex %0, [%1]\n" \ + ARC_BARRIER_INSTR \ + : "+r" (val) \ + : "r" (mem) \ + : "memory" ); \ + \ + val; \ + }) + +#define __arch_exchange_32_rel(mem, newval) \ + ({ \ + __typeof__(*(mem)) val = newval; \ + \ + __asm__ __volatile__( \ + ARC_BARRIER_INSTR"\n" \ "ex %0, [%1]" \ : "+r" (val) \ : "r" (mem) \ @@ -115,3 +180,10 @@ void __arc_link_error (void); abort(); \ __arch_exchange_32_acq(mem, newval); \ }) + +#define atomic_exchange_rel(mem, newval) \ + ({ \ + if (sizeof(*(mem)) != 4) \ + abort(); \ + __arch_exchange_32_rel(mem, newval); \ + }) diff --git a/libc/sysdeps/linux/arc/bits/syscalls.h b/libc/sysdeps/linux/arc/bits/syscalls.h index c858d788b..000b6b631 100644 --- a/libc/sysdeps/linux/arc/bits/syscalls.h +++ b/libc/sysdeps/linux/arc/bits/syscalls.h @@ -100,7 +100,7 @@ extern long __syscall_error (int); #ifdef __A7__ #define ARC_TRAP_INSN "trap0 \n\t" -#elif defined(__HS__) +#else #define ARC_TRAP_INSN "trap_s 0 \n\t" #endif @@ -182,7 +182,7 @@ extern long __syscall_error (int); #ifdef __A7__ #define ARC_TRAP_INSN trap0 -#elif defined(__HS__) +#else #define ARC_TRAP_INSN trap_s 0 #endif diff --git a/libc/sysdeps/linux/arc/bits/uClibc_arch_features.h b/libc/sysdeps/linux/arc/bits/uClibc_arch_features.h index 119bbb7e1..94e089d5d 100755 --- a/libc/sysdeps/linux/arc/bits/uClibc_arch_features.h +++ b/libc/sysdeps/linux/arc/bits/uClibc_arch_features.h @@ -17,9 +17,6 @@ /* can your target use syscall6() for mmap ? */ #undef __UCLIBC_MMAP_HAS_6_ARGS__ -/* does your target use statx */ -#undef __UCLIBC_HAVE_STATX__ - /* does your target have a broken create_module() ? */ #undef __UCLIBC_BROKEN_CREATE_MODULE__ diff --git a/libc/sysdeps/linux/arc/crt1.S b/libc/sysdeps/linux/arc/crt1.S index 70a06e058..ff36d252e 100644 --- a/libc/sysdeps/linux/arc/crt1.S +++ b/libc/sysdeps/linux/arc/crt1.S @@ -40,7 +40,9 @@ __start: ld_s r1, [sp] ; argc mov_s r5, r0 ; rltd_fini - add_s r2, sp, 4 ; argv + /* Use the universal 32-bit add instruction as 16-bit add_s was excluded from + ARCv3 ISA */ + add r2, sp, 4 ; argv #ifdef L_Scrt1 ld r0, [pcl, @main@gotpc] ld r3, [pcl, @_init@gotpc] diff --git a/libc/sysdeps/linux/arc/sigrestorer.S b/libc/sysdeps/linux/arc/sigrestorer.S index e4deb6bd4..60d35ab3e 100644 --- a/libc/sysdeps/linux/arc/sigrestorer.S +++ b/libc/sysdeps/linux/arc/sigrestorer.S @@ -1,5 +1,5 @@ /* - * Copyright (C) 2017 Synopsys, Inc. (www.synopsys.com) + * Copyright (C) 2017-2022 Synopsys, Inc. (www.synopsys.com) * * Licensed under the LGPL v2.1 or later, see the file COPYING.LIB in this tarball. */ @@ -22,4 +22,5 @@ __default_rt_sa_restorer: mov r8, __NR_rt_sigreturn ARC_TRAP_INSN + j_s [blink] |