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authorMax Filippov <jcmvbkbc@gmail.com>2020-08-09 06:28:17 (GMT)
committerWaldemar Brodkorb <wbx@openadk.org>2020-08-11 11:35:02 (GMT)
commitfc48f4fb0506b2ea6ef3bb33037be3a4da2874bc (patch)
treeaa83e91570361d19ca569ea68d279b98b69ec3b5 /libpthread/nptl/sysdeps
parentc2e5177b97825211565150b4f9a7f253e0458619 (diff)
xtensa: add exclusive access support
Add XCHAL definitions for S32C1I and EXCLUSIVE options to xtensa-config.h, include it in places that implement atomic operations and add implementations with exclusive access option opcodes. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'libpthread/nptl/sysdeps')
-rw-r--r--libpthread/nptl/sysdeps/xtensa/pthread_spin_lock.S16
-rw-r--r--libpthread/nptl/sysdeps/xtensa/pthread_spin_trylock.S17
2 files changed, 33 insertions, 0 deletions
diff --git a/libpthread/nptl/sysdeps/xtensa/pthread_spin_lock.S b/libpthread/nptl/sysdeps/xtensa/pthread_spin_lock.S
index 3386afa..3faac36 100644
--- a/libpthread/nptl/sysdeps/xtensa/pthread_spin_lock.S
+++ b/libpthread/nptl/sysdeps/xtensa/pthread_spin_lock.S
@@ -15,16 +15,32 @@
License along with the GNU C Library; see the file COPYING.LIB. If
not, see <http://www.gnu.org/licenses/>.  */
+#include <bits/xtensa-config.h>
#include <sysdep.h>
.text
ENTRY (pthread_spin_lock)
+#if XCHAL_HAVE_EXCLUSIVE
+ memw
+1: l32ex a3, a2
+ bnez a3, 1b
+ movi a3, 1
+ s32ex a3, a2
+ getex a3
+ beqz a3, 1b
+ memw
+#elif XCHAL_HAVE_S32C1I
movi a3, 0
wsr a3, scompare1
movi a3, 1
1: s32c1i a3, a2, 0
bnez a3, 1b
+#else
+
+#error No hardware atomic operations
+
+#endif
movi a2, 0
abi_ret
diff --git a/libpthread/nptl/sysdeps/xtensa/pthread_spin_trylock.S b/libpthread/nptl/sysdeps/xtensa/pthread_spin_trylock.S
index 72b2dda..0669682 100644
--- a/libpthread/nptl/sysdeps/xtensa/pthread_spin_trylock.S
+++ b/libpthread/nptl/sysdeps/xtensa/pthread_spin_trylock.S
@@ -17,15 +17,32 @@
#define _ERRNO_H 1
#include <bits/errno.h>
+#include <bits/xtensa-config.h>
#include <sysdep.h>
.text
ENTRY (pthread_spin_trylock)
+#if XCHAL_HAVE_EXCLUSIVE
+ memw
+ l32ex a3, a2
+ bnez a3, 1f
+ movi a3, 1
+ s32ex a3, a2
+ getex a3
+ addi a3, a3, -1
+ memw
+1:
+#elif XCHAL_HAVE_S32C1I
movi a3, 0
wsr a3, scompare1
movi a3, 1
s32c1i a3, a2, 0
+#else
+
+#error No hardware atomic operations
+
+#endif
movi a2, EBUSY
moveqz a2, a3, a3