diff options
author | Austin Foxley <austinf@cetoncorp.com> | 2009-10-17 12:26:24 -0700 |
---|---|---|
committer | Austin Foxley <austinf@cetoncorp.com> | 2009-10-17 12:26:24 -0700 |
commit | c68d0fa2d88fc2134a38d99e7e944828384a7671 (patch) | |
tree | 6596943bd1c77f18d6e49d4153ddd3f3d67b49f5 /libpthread/nptl/sysdeps/unix/sysv/linux/sh/sh4 | |
parent | 9a03e98a3b418f33c347a6023e9320f3a42cb9e4 (diff) |
libpthread/nptl: core of the "Native Posix Threading Library" for uClibc
targetting arm,sh,i386,mips,sparc for now
Signed-off-by: Austin Foxley <austinf@cetoncorp.com>
Diffstat (limited to 'libpthread/nptl/sysdeps/unix/sysv/linux/sh/sh4')
-rw-r--r-- | libpthread/nptl/sysdeps/unix/sysv/linux/sh/sh4/lowlevellock.h | 4 | ||||
-rw-r--r-- | libpthread/nptl/sysdeps/unix/sysv/linux/sh/sh4/sysdep.h | 4 |
2 files changed, 8 insertions, 0 deletions
diff --git a/libpthread/nptl/sysdeps/unix/sysv/linux/sh/sh4/lowlevellock.h b/libpthread/nptl/sysdeps/unix/sysv/linux/sh/sh4/lowlevellock.h new file mode 100644 index 000000000..8cdcac556 --- /dev/null +++ b/libpthread/nptl/sysdeps/unix/sysv/linux/sh/sh4/lowlevellock.h @@ -0,0 +1,4 @@ +/* 4 instruction cycles not accessing cache and TLB are needed after + trapa instruction to avoid an SH-4 silicon bug. */ +#define NEED_SYSCALL_INST_PAD +#include <sysdeps/unix/sysv/linux/sh/lowlevellock.h> diff --git a/libpthread/nptl/sysdeps/unix/sysv/linux/sh/sh4/sysdep.h b/libpthread/nptl/sysdeps/unix/sysv/linux/sh/sh4/sysdep.h new file mode 100644 index 000000000..1aed1a14a --- /dev/null +++ b/libpthread/nptl/sysdeps/unix/sysv/linux/sh/sh4/sysdep.h @@ -0,0 +1,4 @@ +/* 4 instruction cycles not accessing cache and TLB are needed after + trapa instruction to avoid an SH-4 silicon bug. */ +#define NEED_SYSCALL_INST_PAD +#include_next <sysdep.h> |