riscv: add fenv support from glibcHEADmaster

1 files changed, 29 insertions, 0 deletions

diff --git a/libm/riscv64/fsetexcptflg.c b/libm/riscv64/fsetexcptflg.c
new file mode 100644
index 000000000..f295c18ab
--- /dev/null
+++ b/libm/riscv64/fsetexcptflg.c
@@ -0,0 +1,29 @@
+/* Set floating-point environment exception handling.
+   Copyright (C) 1998-2025 Free Software Foundation, Inc.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library.  If not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+int
+fesetexceptflag (const fexcept_t *flagp, int excepts)
+{
+  fexcept_t flags = *flagp;
+  __asm__ volatile ("csrc fflags, %0" : : "r" (excepts));
+  __asm__ volatile ("csrs fflags, %0" : : "r" (flags & excepts));
+
+  return 0;
+}