riscv: add fenv support from glibcHEADmaster

1 files changed, 30 insertions, 0 deletions

diff --git a/libm/riscv64/fesetmode.c b/libm/riscv64/fesetmode.c
new file mode 100644
index 000000000..aaaf4480b
--- /dev/null
+++ b/libm/riscv64/fesetmode.c
@@ -0,0 +1,30 @@
+/* Install given floating-point control modes.  RISC-V version.
+   Copyright (C) 2017-2025 Free Software Foundation, Inc.
+
+   The GNU C Library is free software; you can redistribute it and/or
+   modify it under the terms of the GNU Lesser General Public
+   License as published by the Free Software Foundation; either
+   version 2.1 of the License, or (at your option) any later version.
+
+   The GNU C Library is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   Lesser General Public License for more details.
+
+   You should have received a copy of the GNU Lesser General Public
+   License along with the GNU C Library; if not, see
+   <https://www.gnu.org/licenses/>.  */
+
+#include <fenv.h>
+#include <fpu_control.h>
+
+int
+fesetmode (const femode_t *modep)
+{
+  __asm__ volatile ("csrc fcsr, %0" : : "r" (~FE_ALL_EXCEPT));
+
+  if (modep != FE_DFL_MODE)
+    __asm__ volatile ("csrs fcsr, %0" : : "r" (*modep & ~FE_ALL_EXCEPT));
+
+  return 0;
+}