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authorVineet Gupta <Vineet.Gupta1@synopsys.com>2015-10-21 12:42:23 +0530
committerWaldemar Brodkorb <wbx@uclibc-ng.org>2015-10-22 04:02:03 +0200
commitfef346b2666ed2e7331fe4ca74a7dbaedc380b20 (patch)
tree2309ef1f34a0fddc9c327cf8c90e5660bc194710 /libc/sysdeps
parent1303e7eb2b65f5275a57b66a7bebc8bfe1b32d4f (diff)
NPTL/ARCv2: Implement full memory barrier for NPTL
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'libc/sysdeps')
-rw-r--r--libc/sysdeps/linux/arc/bits/atomic.h7
1 files changed, 5 insertions, 2 deletions
diff --git a/libc/sysdeps/linux/arc/bits/atomic.h b/libc/sysdeps/linux/arc/bits/atomic.h
index d4abf4eb7..1fdc83f70 100644
--- a/libc/sysdeps/linux/arc/bits/atomic.h
+++ b/libc/sysdeps/linux/arc/bits/atomic.h
@@ -24,8 +24,11 @@ typedef uintmax_t uatomic_max_t;
void __arc_link_error (void);
-#define atomic_full_barrier() \
- __asm__ __volatile__("": : :"memory")
+#ifdef __A7__
+#define atomic_full_barrier() __asm__ __volatile__("": : :"memory")
+#else
+#define atomic_full_barrier() __asm__ __volatile__("dmb 3": : :"memory")
+#endif
/* Atomic compare and exchange. */