sparc: add fenv support from glibcHEADmaster

1 files changed, 37 insertions, 23 deletions

diff --git a/libc/sysdeps/linux/sparc/bits/fenv.h b/libc/sysdeps/linux/sparc/bits/fenv.h
index 79ab8cefa..83b32cc51 100644
--- a/libc/sysdeps/linux/sparc/bits/fenv.h
+++ b/libc/sysdeps/linux/sparc/bits/fenv.h
@@ -1,4 +1,4 @@
-/* Copyright (C) 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
+/* Copyright (C) 1997-2025 Free Software Foundation, Inc.
 
    The GNU C Library is free software; you can redistribute it and/or
    modify it under the terms of the GNU Lesser General Public
@@ -12,26 +12,34 @@
 
    You should have received a copy of the GNU Lesser General Public
    License along with the GNU C Library; if not, see
-   <http://www.gnu.org/licenses/>.  */
+   <https://www.gnu.org/licenses/>.  */
 
 #ifndef _FENV_H
 # error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
 #endif
 
+#include <bits/wordsize.h>
+
+
 /* Define bits representing the exception.  We use the bit positions
    of the appropriate accrued exception bits from the FSR.  */
 enum
   {
-    FE_INVALID = 	(1 << 9),
-#define FE_INVALID	FE_INVALID
-    FE_OVERFLOW = 	(1 << 8),
-#define FE_OVERFLOW	FE_OVERFLOW
-    FE_UNDERFLOW = 	(1 << 7),
-#define FE_UNDERFLOW	FE_UNDERFLOW
-    FE_DIVBYZERO = 	(1 << 6),
-#define FE_DIVBYZERO	FE_DIVBYZERO
-    FE_INEXACT = 	(1 << 5)
-#define FE_INEXACT	FE_INEXACT
+    FE_INVALID =
+#define FE_INVALID	(1 << 9)
+      FE_INVALID,
+    FE_OVERFLOW =
+#define FE_OVERFLOW	(1 << 8)
+      FE_OVERFLOW,
+    FE_UNDERFLOW =
+#define FE_UNDERFLOW	(1 << 7)
+      FE_UNDERFLOW,
+    FE_DIVBYZERO =
+#define FE_DIVBYZERO	(1 << 6)
+      FE_DIVBYZERO,
+    FE_INEXACT =
+#define FE_INEXACT	(1 << 5)
+      FE_INEXACT
   };
 
 #define FE_ALL_EXCEPT \
@@ -42,14 +50,18 @@ enum
    for the appropriate macros.  */
 enum
   {
-    FE_TONEAREST = 	(0U << 30),
-#define FE_TONEAREST	FE_TONEAREST
-    FE_TOWARDZERO = 	(1U << 30),
-#define FE_TOWARDZERO	FE_TOWARDZERO
-    FE_UPWARD = 	(2U << 30),
-#define FE_UPWARD	FE_UPWARD
-    FE_DOWNWARD = 	(3U << 30)
-#define FE_DOWNWARD	FE_DOWNWARD
+    FE_TONEAREST =
+#define FE_TONEAREST	(0 << 30)
+      FE_TONEAREST,
+    FE_TOWARDZERO =
+#define FE_TOWARDZERO	(1 << 30)
+      FE_TOWARDZERO,
+    FE_UPWARD =
+#define FE_UPWARD	(-0x7fffffff - 1) /* (2 << 30) */
+      FE_UPWARD,
+    FE_DOWNWARD =
+#define FE_DOWNWARD	(-0x40000000) /* (3 << 30) */
+      FE_DOWNWARD
   };
 
 #define __FE_ROUND_MASK	(3U << 30)
@@ -70,6 +82,8 @@ typedef unsigned long int fenv_t;
 # define FE_NOMASK_ENV	((const fenv_t *) -2)
 #endif
 
-/* For internal use only: access the fp state register.  */
-#define __fenv_stfsr(X)   __asm__ ("st %%fsr,%0" : "=m" (X))
-#define __fenv_ldfsr(X)   __asm__ __volatile__ ("ld %0,%%fsr" : : "m" (X))
+/* Type representing floating-point control modes.  */
+typedef unsigned long int femode_t;
+
+/* Default floating-point control modes.  */
+# define FE_DFL_MODE	((const femode_t *) -1L)