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authorEric Andersen <andersen@codepoet.org>2003-11-08 07:42:34 +0000
committerEric Andersen <andersen@codepoet.org>2003-11-08 07:42:34 +0000
commit2a01fa1548e5671880d6dd18c7d216ddf958ea96 (patch)
treedb51930aad916a898e321d50638f20ddeabdcddf /libc/misc
parentb36d61d33ece9afa32733bbcc7def4cb4afc4856 (diff)
Joakim Tjernlund writes:
> Very interesting. Do you have any suggestions for how > we could fix our powerpc shared library loader Removing those instr. comes with a very big performance penalty. To flush the dcache you will have read up to 8KB dummy data and to invalidate the icache you will have to execute up to 16KB nops. I don't know of any other way from user space. hmm, actually I think it will work reliable to perform a store to the same page(s) as the dcbst/icbi will act on. That way you will make the DTLB Error happen(if any) prior to the dcbst/icbi. The worst thing that can happen then is a regular DTLB Miss and that works for dcbst/icbi. You will have to lookout for if dcbst/icbi crosses a page boundary. Then you will have to perform a store to both pages. Jocke # And again later writes: Hi again I think I know what the problem is. The PPC_DCBST;PPC_SYNC;PPC_ICBI;PPC_ISYNC sequence is executed even if no modification has been done i some cases: _dl_linux_resolver(), the last else has no store for insns[0]. these is a insns[1] = OPCODE_B(delta - 4) that does not have a PPC_DCBST. _dl_do_lazy_reloc(), for R_PPC_NONE there is no store. for R_PPC_JMP_SLOT there is a insns[1] = OPCODE_B(delta)that does not have a PPC_DCBST. _dl_do_reloc(), for R_PPC_COPY there is no store. for R_PPC_JMP_SLOT there is a reloc_addr[1] = OPCODE_B(delta) that does not have a PPC_DCBST. _dl_init_got(), I THINK that the PPC_DCBST(plt); PPC_DCBST(plt+4); PPC_DCBST(plt+8); PPC_SYNC; PPC_ICBI(plt); PPC_ICBI(plt+4); PPC_ICBI(plt+8); PPC_ISYNC; is off a bit. The address range does not match the sum of the plt[] and tramp[] address range. Jocke # And then later added the comment: I think that the tramp[] part should be included in the PPC_DCBST/PPC_ICBI sequence. Then you have to add entries for plt+12 and plt+16. If the tramp[] part should be excluded, then all is well. Jocke
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