diff options
authorVineet Gupta <>2016-08-16 22:04:27 (GMT)
committerWaldemar Brodkorb <>2016-08-17 19:29:57 (GMT)
commit3e40f9669279f005f7154892539166f5081fbcb2 (patch)
parent9725c0b6e4fda2db5c5aac0888d64dc97c69a332 (diff)
ARC: Support syscall ABI v4
The syscall ABI includes the gcc functional calling ABI since a syscall implies userland caller and kernel callee. The current gcc ABI (v3) for ARCv2 ISA required 64-bit data be passed in even-odd register pairs, (potentially punching reg holes when passing such values as args). This was partly driven by the fact that the double-word LDD/STD instructions in ARCv2 expect the register alignment and thus gcc forcing this avoids extra MOV at the cost of a few unused register (which we have plenty anyways). This however was rejected as part of upstreaming gcc port to HS. So the new ABI v4 doesn't enforce the even-odd reg restriction. Do note that for ARCompact ISA builds v3 and v4 are practically the same in terms of gcc code generation. This change is dormant for now (gcc 4.8.x based tools) and will only kick in with switch to gcc 6.x based tools. Signed-off-by: Vineet Gupta <>
1 files changed, 8 insertions, 2 deletions
diff --git a/libc/sysdeps/linux/arc/bits/uClibc_arch_features.h b/libc/sysdeps/linux/arc/bits/uClibc_arch_features.h
index 5160724..94e089d 100755
--- a/libc/sysdeps/linux/arc/bits/uClibc_arch_features.h
+++ b/libc/sysdeps/linux/arc/bits/uClibc_arch_features.h
@@ -41,8 +41,14 @@
/* The default ';' is a comment on ARC. */
#define __UCLIBC_ASM_LINE_SEP__ `
-/* does your target align 64bit values in register pairs ? (32bit arches only) */
-#if defined(__A7__)
+/* does your target align 64bit values in register pairs ? (32bit arches only)
+ * - ARC700 never had any constraint on reg pairs (even if ABI v3)
+ * - Inital HS ABI (v3: non upstream gcc) had 64-bit data aligned in even-odd
+ * reg pairs (thus allowed reg holes when passing such args to calls)
+ * - Upstream gcc (6.x) HS ABI doesn't have that restriction
+ */
+#if defined(__A7__) || (__GNUC__ > 4)