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Add XCHAL definitions for S32C1I and EXCLUSIVE options to
xtensa-config.h, include it in places that implement atomic operations
and add implementations with exclusive access option opcodes.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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Replace "a" constraints with "+m" to avoid forcing atomic variable
address into a register and let the compiler use non-zero offset in
load/store opcodes.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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atomic_decrement_if_positive() returns the old value of &mem, not the
(sometimes undefined) value of __tmp.
Fixes the uClibc nptl/tst-sem3 test.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Chris Zankel <chris@zankel.net>
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This matches a similar change made to glibc.
No functional changes here.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Add more atomic intrinsics. These are mostly non 32-bit versions, which
are not support by Xtensa. This file needs some more clean-up and
consolidation.
Signed-off-by: Chris Zankel <chris@zankel.net>
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Add a new file that provides various atomic intrinsics, which use the
conditional store instruction.
Signed-off-by: Chris Zankel <chris@zankel.net>
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