summaryrefslogtreecommitdiff
path: root/libc/sysdeps/linux/arm/clone.S
AgeCommit message (Collapse)Author
2012-12-11arm: clone: restore stack pointer just after return from syscallFilippo Arcidiacono
If the syscall returns with an error the stack pointer and r4 register are not restored because the instruction 'ldmnefd sp!, {r4}' is executed after branching to '__error' label. This bug has been spotted out by running './utstest clone 5' from LTP built with -fstack-protector-all compiler flag as log below: root@cortex-a9:/usr/tests/ltp/testcases/bin# ./utstest clone 5 stack smashing detected: ./utstest terminated() Regression introduced by commit e58798e107d652644629a1daaa95d76430808d53 Signed-off-by: Filippo Arcidiacono <filippo.arcidiacono@st.com> Signed-off-by: Giuseppe Di Giore <giuseppe.di-giore@st.com> Signed-off-by: Carmelo Amoroso <carmelo.amoroso@st.com>
2012-11-18Replace FSF snail mail address with URLsMike Frysinger
This matches a similar change made to glibc. No functional changes here. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-17arm specific bits needed for nptlAustin Foxley
* SAVE_PID, RESTORE_PID in vfork.S * clone.S tweaks to allow for the pid to be reset Signed-off-by: Austin Foxley <austinf@cetoncorp.com>
2008-03-26Paul Brook writes:Bernhard Reutner-Fischer
The attached patch adds support for compiling arm uClibc as pure Thumb code. This is needed because some recent ARM codes do not implement traditional ARM mode. Specifically: * Cortex-M1 - An extremely minimal FPGA based core that only implements Thumb-1 (aka ARMv6-M). * Cortex-M3 - A Thumb-2 only ARMv7-M core. Most of uClibc already builds in Thumb mode, all that is left are a handful of assembly bits. Tested on arm-uclinuxeabi.
2006-01-31s:THUMB_INTERWORK:USE_BX:, thx Khem RajPeter S. Mazinger
2006-01-31John Bowler writes in Bug 385:Mike Frysinger
The patch fixes up the .align directives to '2' (i.e. a multiple of 4) not '4' (a multiple of 16 - apparently an error since it seems to be unnecessary, there is no advantage here in cache line alignment). this is an arm "feature" ... the value given to .align is not in bytes: .align 4 in arm means .align 2 ^ 4
2006-01-31John Bowler writes in Bug 385:Mike Frysinger
This patch changes all cases where the ARM assembler mov pc,rx instructions are used to ensure that the thumb/arm interwork change of process more works - in essence mov pc,rx needs to become bx rc. The ldr pc or ldm rx, {pc} instructions are not changed - this is fine on ARM >=v5 but will fail to restore thumb mode on ARM v4T, i.e. this code will not provide support for thumb on ARM v4T. One mov pc is left in resolve.S, this is fixed in a different patch - thumb-resolve.patch The changes are protected by __THUMB_INTERWORK__ - the original mov instruction will work on newer architectures and is required on arch v4 (not v4t) and earlier - those which did not support thumb - so this is safe. See gcc lib1asmfuncs for a more exact test.
2006-01-29Patch by Joseph S. Myers to add support for ARM EABIMike Frysinger
2006-01-14need features.h for new HIDDEN_JUMPTARGET()Mike Frysinger
2006-01-14hidden_def/hidden_proto: convert all users (I hope) termios split, add some ↵Peter S. Mazinger
missing headers, other jump relocs removed
2005-12-16Make clone use internal _exitPeter S. Mazinger
2005-06-11touchup syntax for no real good reason ;)Mike Frysinger
2005-06-10Remove TEXTREL relocations for ARM.Joakim Tjernlund
Hide __syscall_error from outside libc. From Peter Mazinger.
2002-01-31Fixup setjmp and longjmp so they behave themselves properly nowEric Andersen
on both x86 and arm... -Erik
2001-11-19Add an initial clone from glibc. Needs fixing.Eric Andersen