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Most changes are mechanical replacement of 'retw' instruction with
'abi_ret' macro, defined to 'retw' or 'ret' according to ABI.
Assembly code that makes calls is duplicated for call0 ABI with changed
register numbers for parameters/return value and call instruction.
'entry' instructions are replaced with 'abi_entry' macro.
More interesting changes:
- non-leaf assembly functions (e.g. _dl_tlsdesc_dynamic,
_dl_linux_resolve, SYSCALL_ERROR_HANDLER, PSEUDO) now need to preserve
registers around intermediate calls they make, use temporary stack
frame for that;
- setjmp/longjmp only need to save and restore return address, stack
pointer and callee-saved registers in the jmpbuf;
- __clone and syscall functions had hardcoded offsets to parameter
passed on stack, on call0 ABI they don't need stack frame, so the
offset is different. Replace these offsets with FRAMESIZE macro.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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Existing version of memset() relies on existence of 64-bit load/stores.
While ARC HS38 may not have those instructions implemented in SoC.
Proposed implementation checks if "-mno-ll64" option was passed to gcc
(for ARCv2 "-mll64" is set implicitly by default) by checking __LL64__
definition and if it is not defined uses 32-bit load/stores.
Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Vineet Gupta <vgupta@synopsys.com>
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Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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Only the stub warnings left for now.
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Closes bugzilla #7936
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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This is next gen Instruction Set Architecture from Synopsys and basis
for the ARC HS family of processors.
http://www.synopsys.com/dw/ipdir.php?ds=arc-hs38-processor&elq_mid=5732&elq_cid=458802
http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/arc-hs/Pages/default.aspx
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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The sparc64/sparcv9 code is incomplete. Furthermore there is
no real embedded hardware for sparc64 available, so better remove
it until someone comes up with a complete port.
Signed-off-by: Waldemar Brodkorb <wbx@openadk.org>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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As Will noticed, the header this check is currently done in
is asm-only, and is not meant to be included from C code.
This breaks compilation when compiled for a Thumb2-aware CPU.
Move the BX check to its own header, and revert 7a246fd.
Reported-by: Will Newton <will.newton@gmail.com>
Signed-off-by: Yann E. MORIN <yann.morin.1998@free.fr>
Cc: Will Newton <will.newton@gmail.com>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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This addition allows building uClibc with -mtext-section-literals
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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Signed-off-by: Joern Rennecke <joern.rennecke@embecosm.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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Meta cores are 32-bit, hardware multithreaded, general purpose, embedded
processors which also feature a DSP instruction set, and can be found in
many digital radios. They are capable of running different operating
systems on different hardware threads, for example a digital radio might
run RTOSes for DAB decoding and audio decoding on 3 hardware threads,
and run Linux on the 4th hardware thread to manage the user interface,
networking etc. HTPs are also capable of running SMP Linux on multiple
hardware threads.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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This matches a similar change made to glibc.
No functional changes here.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Fix the asm-optimised memcpy and memmove so they
work for little-endian as well as big-endian.
Testing has shown no issues, but I am not a microblaze
asm expert so YMMV.
Signed-off-by: Steve Bennett <steveb@workware.net.au>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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Remove hardcoded path from xtensa, we have sysdep.h in path
Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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No need for internal _string.h.
For now include string.h, although the correct header would be strings.h.
Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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libc-internal.h: this has to provide the reversed case of what string.h defines.
Accomodate for later possibility to compile without _GNU_SOURCE defined
Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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Provide visible str[n]casecmp[_l], wcs[n]casecmp[_l].
Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
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Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
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Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
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It is used only by gen_collate, not included into libc.
Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
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Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
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Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
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Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
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Guard x86_64 memset_chk/memcpy_chk be guarded by UCLIBC_HAS_FORTIFY.
Compile ssp.c if one of SSP/FORTIFY is defined.
Guard __chk_fail() with UCLIBC_HAS_FORTIFY and move its prototype to libc-internal.h.
Disable _FORTIFY_SOURCE if UCLIBC_HAS_FORTIFY is not set.
The config option itself is omitted on purpose,
headers need to be reviewed and generic *_chk() functions need to be first provided.
Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
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Remove __libc_ffs*, unneeded
Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
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This imports and adapts ffsll.c from glibc. The same mechanism as in glibc
is used to choose between ffs and ffsll to implement ffsl. The single user
in libc is changed to use the hidden version __libc_ffs.
Signed-off-by: Bernd Schmidt <bernds@codesourcery.com>
Acked-by: Bernhard Reutner-Fischer <aldot@uclibc.org>
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Signed-off-by: Peter S. Mazinger <ps.m@gmx.net>
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This patch fixes a bug in the memcpy that doesn't save/restore
the FR12-FR15 registers (callee save registers in ST40 ABI) while
copying many cache lines with FPU in single paired precision mode
and by using all FPU registers (DR and XD).
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Reviewed-by: Carmelo Amoroso <carmelo.amoroso@st.com>
Signed-off-by: Carmelo Amoroso <carmelo.amoroso@st.com>
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Port optimized memcpy/memmove from the kernel.
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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After exploring different prefetch distance-degree combinations
in this new update of the memcpy function, a new loop has been added
for moving many cache lines with an aggressive prefetching schema.
Prefetch has been removed when move few cache line aligned blocks.
As final result, this memcpy gives us the same performances for small
sizes (we already had!) and better numbers for big copies.
In case of SH4-300 CPU Series, benchmarks show a gain of ~20% for sizes
from 4KiB to 256KiB.
In case of the SH4-200, there is a gain of ~40% for sizes bigger than
32KiB.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Carmelo Amoroso <carmelo.amoroso@st.com>
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With this patch the movca.l instruction is used within the memset.
The current memset implementation only uses the FPU and there is
an real gain for all the sizes.
Adding the movca.l instruction numbers always are better than the generic code.
There is a big gain for size greater than 64 KiB but number are worst for 4-32KiB
sizes compared with the implementation without movca.l.
Time Memory Bandwidth (Mbytes)
-------------------------------------------------
Generic SH4 SH4
(FPU) (FPU+movca.l)
-------------------------------------------------
512 1143 1998 1596
1 KiB 1273 2567 1915
2 KiB 1350 2993 2128
4-32KiB 1391 3262 2252
64KiB-16MiB 170 186 *830*
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Carmelo Amoroso <carmelo.amoroso@st.com>
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Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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This patch disables SH-4 optimizations that rely on the FPU when
building for variants that don't have an FPU, such as SH-4AL.
Signed-off-by: Andrew Stubbs <ams@codesourcery.com>
Signed-off-by: Carmelo Amoroso <carmelo.amoroso@st.com>
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Result was:
strverscmp.o:
000000ec T __GI_strverscmp
i.e. no plain "strverscmp"!
Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
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Conflicts:
Makefile.in
extra/Configs/Config.in
libc/sysdeps/linux/common/bits/kernel-features.h
libc/sysdeps/linux/common/poll.c
libc/sysdeps/linux/common/sysdep.h
libc/sysdeps/linux/sh/sysdep.h
Signed-off-by: Austin Foxley <austinf@cetoncorp.com>
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Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
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Use the ENTRY macro now available through the sysdep.h header
Signed-off-by: Carmelo Amoroso <carmelo.amoroso@st.com>
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Conflicts:
libc/signal/sigpause.c
libc/string/x86_64/memset.S
Signed-off-by: Austin Foxley <austinf@cetoncorp.com>
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also enable __chk_fail and only try to call it when SSP is on
Signed-off-by: Austin Foxley <austinf@cetoncorp.com>
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