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| author | Vineet Gupta <vgupta@synopsys.com> | 2015-02-19 19:13:59 +0530 |
|---|---|---|
| committer | Bernhard Reutner-Fischer <rep.dot.nop@gmail.com> | 2015-02-20 11:30:20 +0100 |
| commit | afab56958f1cbb47b831ee3ebff231dfbae74af2 (patch) | |
| tree | c6fdf19ecb770319d72048c7c56bd71964d52948 /test/locale/collate-test.c | |
| parent | 89b63496e88c31c2714e42656212078388718b78 (diff) | |
ARCv2 ISA support
This is next gen Instruction Set Architecture from Synopsys and basis
for the ARC HS family of processors.
http://www.synopsys.com/dw/ipdir.php?ds=arc-hs38-processor&elq_mid=5732&elq_cid=458802
http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/arc-hs/Pages/default.aspx
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
Diffstat (limited to 'test/locale/collate-test.c')
0 files changed, 0 insertions, 0 deletions