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authorRomain Naour <romain.naour@gmail.com>2020-05-08 18:39:45 +0200
committerWaldemar Brodkorb <wbx@openadk.org>2020-05-17 12:07:55 +0200
commit85ec6b449f32a9c49bfbff1d1a115c318c38c88b (patch)
tree51be0d5fd1672fcc229e4ae0ae217f9ee97fbb81 /libpthread/nptl/pthread_barrierattr_destroy.c
parent40a337ce799d936ed483dfbf348bc9528b34c6ed (diff)
mips: Do not include hi and lo in __SYSCALL_CLOBBERS for R6
From [1] "GCC 10 (PR 91233) won't silently allow registers that are not architecturally available to be present in the clobber list anymore, resulting in build failure for mips*r6 targets in form of: ... .../sysdep.h:146:2: error: the register ‘lo’ cannot be clobbered in ‘asm’ for the current target 146 | __asm__ volatile ( \ | ^~~~~~~ This is because base R6 ISA doesn't define hi and lo registers w/o DSP extension. This patch provides the alternative definitions of __SYSCALL_CLOBBERS for r6 targets that won't include those registers." [1] https://sourceware.org/git/?p=glibc.git;a=commit;h=020b2a97bb15f807c0482f0faee2184ed05bcad8 Signed-off-by: Romain Naour <romain.naour@gmail.com> Cc: Waldemar Brodkorb <wbx@openadk.org>
Diffstat (limited to 'libpthread/nptl/pthread_barrierattr_destroy.c')
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