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authorustcymgu@gmail.com <ustcymgu@gmail.com>2022-11-19 14:02:55 +0000
committerWaldemar Brodkorb <wbx@openadk.org>2022-11-20 08:44:03 +0100
commit0a5466d8d53bc8045ff56ff76cc1880aa85761c2 (patch)
tree5ff1df22a9a052a712318b88cc9c57ff2f963326 /libc/sysdeps/linux/riscv64/sys
parent9e854172e249a383d858fef70368af63a04a28a8 (diff)
RISC-V 32-bit support
Added 32-bit RISC-V support. I have managed to get 32-bit RISC-V No-MMU Linux running based on mainstream buildroot. It's nice to have uclibc support this 32-bit No-MMU target. There's no substantial code change except definations and config options. Signed-off-by: Yimin Gu <ustcymgu@gmail.com>
Diffstat (limited to 'libc/sysdeps/linux/riscv64/sys')
-rw-r--r--libc/sysdeps/linux/riscv64/sys/asm.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/libc/sysdeps/linux/riscv64/sys/asm.h b/libc/sysdeps/linux/riscv64/sys/asm.h
index ddb84b683..3c94c9a70 100644
--- a/libc/sysdeps/linux/riscv64/sys/asm.h
+++ b/libc/sysdeps/linux/riscv64/sys/asm.h
@@ -26,7 +26,11 @@
# define REG_S sd
# define REG_L ld
#elif __riscv_xlen == 32
-# error "rv32i-based targets are not supported"
+# define PTRLOG 2
+# define SZREG 4
+# define REG_S sw
+# define REG_L lw
+// # warning "rv32i-based targets are experimental"
#else
# error __riscv_xlen must equal 32 or 64
#endif