ppc: cleanup unsupported ppc64 code

Remove ppc64 bits and bytes, as we don't support ppc64 and
it makes the code more readable without the dead code.

5 files changed, 3 insertions, 447 deletions

diff --git a/libc/sysdeps/linux/powerpc/bits/atomic.h b/libc/sysdeps/linux/powerpc/bits/atomic.h
index a401206d5..4294fb206 100644
--- a/libc/sysdeps/linux/powerpc/bits/atomic.h
+++ b/libc/sysdeps/linux/powerpc/bits/atomic.h
@@ -1,247 +1,3 @@
-/* Atomic operations.  PowerPC Common version.
-   Copyright (C) 2003, 2004 Free Software Foundation, Inc.
-   This file is part of the GNU C Library.
-   Contributed by Paul Mackerras <paulus@au.ibm.com>, 2003.
-
-   The GNU C Library is free software; you can redistribute it and/or
-   modify it under the terms of the GNU Lesser General Public
-   License as published by the Free Software Foundation; either
-   version 2.1 of the License, or (at your option) any later version.
-
-   The GNU C Library is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   Lesser General Public License for more details.
-
-   You should have received a copy of the GNU Lesser General Public
-   License along with the GNU C Library; if not, see
-   <http://www.gnu.org/licenses/>.  */
-
-#include <bits/wordsize.h>
-
-#if __WORDSIZE == 64
-/* Atomic operations.  PowerPC64 version.
-   Copyright (C) 2003, 2004 Free Software Foundation, Inc.
-   This file is part of the GNU C Library.
-   Contributed by Paul Mackerras <paulus@au.ibm.com>, 2003.
-
-   The GNU C Library is free software; you can redistribute it and/or
-   modify it under the terms of the GNU Lesser General Public
-   License as published by the Free Software Foundation; either
-   version 2.1 of the License, or (at your option) any later version.
-
-   The GNU C Library is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-   Lesser General Public License for more details.
-
-   You should have received a copy of the GNU Lesser General Public
-   License along with the GNU C Library; if not, see
-   <http://www.gnu.org/licenses/>.  */
-
-/* The 32-bit exchange_bool is different on powerpc64 because the subf
-   does signed 64-bit arthmatic while the lwarx is 32-bit unsigned
-   (a load word and zero (high 32) form) load.
-   In powerpc64 register values are 64-bit by default,  including oldval.
-   The value in old val unknown sign extension, lwarx loads the 32-bit
-   value as unsigned.  So we explicitly clear the high 32 bits in oldval.  */
-# define __arch_compare_and_exchange_bool_32_acq(mem, newval, oldval) \
-({									      \
-  unsigned int __tmp, __tmp2;						      \
-  __asm__ __volatile__ ("   clrldi  %1,%1,32\n"				      \
-		    "1:	lwarx	%0,0,%2\n"				      \
-		    "	subf.	%0,%1,%0\n"				      \
-		    "	bne	2f\n"					      \
-		    "	stwcx.	%4,0,%2\n"				      \
-		    "	bne-	1b\n"					      \
-		    "2:	" __ARCH_ACQ_INSTR				      \
-		    : "=&r" (__tmp), "=r" (__tmp2)			      \
-		    : "b" (mem), "1" (oldval), "r" (newval)		      \
-		    : "cr0", "memory");					      \
-  __tmp != 0;								      \
-})
-
-# define __arch_compare_and_exchange_bool_32_rel(mem, newval, oldval) \
-({									      \
-  unsigned int __tmp, __tmp2;						      \
-  __asm__ __volatile__ (__ARCH_REL_INSTR "\n"				      \
-		    "   clrldi  %1,%1,32\n"				      \
-		    "1:	lwarx	%0,0,%2\n"				      \
-		    "	subf.	%0,%1,%0\n"				      \
-		    "	bne	2f\n"					      \
-		    "	stwcx.	%4,0,%2\n"				      \
-		    "	bne-	1b\n"					      \
-		    "2:	"						      \
-		    : "=&r" (__tmp), "=r" (__tmp2)			      \
-		    : "b" (mem), "1" (oldval), "r" (newval)		      \
-		    : "cr0", "memory");					      \
-  __tmp != 0;								      \
-})
-
-/*
- * Only powerpc64 processors support Load doubleword and reserve index (ldarx)
- * and Store doubleword conditional indexed (stdcx) instructions.  So here
- * we define the 64-bit forms.
- */
-# define __arch_compare_and_exchange_bool_64_acq(mem, newval, oldval) \
-({									      \
-  unsigned long	__tmp;							      \
-  __asm__ __volatile__ (							      \
-		    "1:	ldarx	%0,0,%1\n"				      \
-		    "	subf.	%0,%2,%0\n"				      \
-		    "	bne	2f\n"					      \
-		    "	stdcx.	%3,0,%1\n"				      \
-		    "	bne-	1b\n"					      \
-		    "2:	" __ARCH_ACQ_INSTR				      \
-		    : "=&r" (__tmp)					      \
-		    : "b" (mem), "r" (oldval), "r" (newval)		      \
-		    : "cr0", "memory");					      \
-  __tmp != 0;								      \
-})
-
-# define __arch_compare_and_exchange_bool_64_rel(mem, newval, oldval) \
-({									      \
-  unsigned long	__tmp;							      \
-  __asm__ __volatile__ (__ARCH_REL_INSTR "\n"				      \
-		    "1:	ldarx	%0,0,%1\n"				      \
-		    "	subf.	%0,%2,%0\n"				      \
-		    "	bne	2f\n"					      \
-		    "	stdcx.	%3,0,%1\n"				      \
-		    "	bne-	1b\n"					      \
-		    "2:	"						      \
-		    : "=&r" (__tmp)					      \
-		    : "b" (mem), "r" (oldval), "r" (newval)		      \
-		    : "cr0", "memory");					      \
-  __tmp != 0;								      \
-})
-
-#define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
-  ({									      \
-      __typeof (*(mem)) __tmp;						      \
-      __typeof (mem)  __memp = (mem);					      \
-      __asm__ __volatile__ (						      \
-		        "1:	ldarx	%0,0,%1\n"			      \
-		        "	cmpd	%0,%2\n"			      \
-		        "	bne	2f\n"				      \
-		        "	stdcx.	%3,0,%1\n"			      \
-		        "	bne-	1b\n"				      \
-		        "2:	" __ARCH_ACQ_INSTR			      \
-		        : "=&r" (__tmp)					      \
-		        : "b" (__memp), "r" (oldval), "r" (newval)	      \
-		        : "cr0", "memory");				      \
-      __tmp;								      \
-  })
-
-#define __arch_compare_and_exchange_val_64_rel(mem, newval, oldval) \
-  ({									      \
-      __typeof (*(mem)) __tmp;						      \
-      __typeof (mem)  __memp = (mem);					      \
-      __asm__ __volatile__ (__ARCH_REL_INSTR "\n"				      \
-		        "1:	ldarx	%0,0,%1\n"			      \
-		        "	cmpd	%0,%2\n"			      \
-		        "	bne	2f\n"				      \
-		        "	stdcx.	%3,0,%1\n"			      \
-		        "	bne-	1b\n"				      \
-		        "2:	"					      \
-		        : "=&r" (__tmp)					      \
-		        : "b" (__memp), "r" (oldval), "r" (newval)	      \
-		        : "cr0", "memory");				      \
-      __tmp;								      \
-  })
-
-# define __arch_atomic_exchange_64_acq(mem, value) \
-    ({									      \
-      __typeof (*mem) __val;						      \
-      __asm__ __volatile__ (__ARCH_REL_INSTR "\n"				      \
-			"1:	ldarx	%0,0,%2\n"			      \
-			"	stdcx.	%3,0,%2\n"			      \
-			"	bne-	1b\n"				      \
-		  " " __ARCH_ACQ_INSTR					      \
-			: "=&r" (__val), "=m" (*mem)			      \
-			: "b" (mem), "r" (value), "m" (*mem)		      \
-			: "cr0", "memory");				      \
-      __val;								      \
-    })
-
-# define __arch_atomic_exchange_64_rel(mem, value) \
-    ({									      \
-      __typeof (*mem) __val;						      \
-      __asm__ __volatile__ (__ARCH_REL_INSTR "\n"				      \
-			"1:	ldarx	%0,0,%2\n"			      \
-			"	stdcx.	%3,0,%2\n"			      \
-			"	bne-	1b"				      \
-			: "=&r" (__val), "=m" (*mem)			      \
-			: "b" (mem), "r" (value), "m" (*mem)		      \
-			: "cr0", "memory");				      \
-      __val;								      \
-    })
-
-# define __arch_atomic_exchange_and_add_64(mem, value) \
-    ({									      \
-      __typeof (*mem) __val, __tmp;					      \
-      __asm__ __volatile__ ("1:	ldarx	%0,0,%3\n"			      \
-			"	add	%1,%0,%4\n"			      \
-			"	stdcx.	%1,0,%3\n"			      \
-			"	bne-	1b"				      \
-			: "=&b" (__val), "=&r" (__tmp), "=m" (*mem)	      \
-			: "b" (mem), "r" (value), "m" (*mem)		      \
-			: "cr0", "memory");				      \
-      __val;								      \
-    })
-
-# define __arch_atomic_increment_val_64(mem) \
-    ({									      \
-      __typeof (*(mem)) __val;						      \
-      __asm__ __volatile__ ("1:	ldarx	%0,0,%2\n"			      \
-			"	addi	%0,%0,1\n"			      \
-			"	stdcx.	%0,0,%2\n"			      \
-			"	bne-	1b"				      \
-			: "=&b" (__val), "=m" (*mem)			      \
-			: "b" (mem), "m" (*mem)				      \
-			: "cr0", "memory");				      \
-      __val;								      \
-    })
-
-# define __arch_atomic_decrement_val_64(mem) \
-    ({									      \
-      __typeof (*(mem)) __val;						      \
-      __asm__ __volatile__ ("1:	ldarx	%0,0,%2\n"			      \
-			"	subi	%0,%0,1\n"			      \
-			"	stdcx.	%0,0,%2\n"			      \
-			"	bne-	1b"				      \
-			: "=&b" (__val), "=m" (*mem)			      \
-			: "b" (mem), "m" (*mem)				      \
-			: "cr0", "memory");				      \
-      __val;								      \
-    })
-
-# define __arch_atomic_decrement_if_positive_64(mem) \
-  ({ int __val, __tmp;							      \
-     __asm__ __volatile__ ("1:	ldarx	%0,0,%3\n"			      \
-		       "	cmpdi	0,%0,0\n"			      \
-		       "	addi	%1,%0,-1\n"			      \
-		       "	ble	2f\n"				      \
-		       "	stdcx.	%1,0,%3\n"			      \
-		       "	bne-	1b\n"				      \
-		       "2:	" __ARCH_ACQ_INSTR			      \
-		       : "=&b" (__val), "=&r" (__tmp), "=m" (*mem)	      \
-		       : "b" (mem), "m" (*mem)				      \
-		       : "cr0", "memory");				      \
-     __val;								      \
-  })
-
-/*
- * All powerpc64 processors support the new "light weight"  sync (lwsync).
- */
-# define atomic_read_barrier()	__asm__ ("lwsync" ::: "memory")
-/*
- * "light weight" sync can also be used for the release barrier.
- */
-# ifndef UP
-#  define __ARCH_REL_INSTR	"lwsync"
-# endif
-
-#else
 /* Atomic operations.  PowerPC32 version.
    Copyright (C) 2003, 2004 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
@@ -261,12 +17,6 @@
    License along with the GNU C Library; if not, see
    <http://www.gnu.org/licenses/>.  */
 
-/*
- * The 32-bit exchange_bool is different on powerpc64 because the subf
- * does signed 64-bit arthmatic while the lwarx is 32-bit unsigned
- * (a load word and zero (high 32) form).  So powerpc64 has a slightly
- * different version in sysdeps/powerpc/powerpc64/bits/atomic.h.
- */
 # define __arch_compare_and_exchange_bool_32_acq(mem, newval, oldval)         \
 ({									      \
   unsigned int __tmp;							      \
@@ -355,8 +105,6 @@
 # define atomic_read_barrier()	__asm__ ("sync" ::: "memory")
 #endif
 
-#endif
-
 #include <stdint.h>
 
 typedef int32_t atomic32_t;
diff --git a/libc/sysdeps/linux/powerpc/bits/mathinline.h b/libc/sysdeps/linux/powerpc/bits/mathinline.h
index 206ca977e..f98d4d60b 100644
--- a/libc/sysdeps/linux/powerpc/bits/mathinline.h
+++ b/libc/sysdeps/linux/powerpc/bits/mathinline.h
@@ -57,30 +57,12 @@
 
 # endif /* __GNUC_PREREQ (2,97) */
 
-/* The gcc, version 2.7 or below, has problems with all this inlining
-   code.  So disable it for this version of the compiler.  */
-# if __GNUC_PREREQ (2, 8)
-/* Test for negative number.  Used in the signbit() macro.  */
-__MATH_INLINE int
-__NTH (__signbitf (float __x))
-{
-  __extension__ union { float __f; int __i; } __u = { __f: __x };
-  return __u.__i < 0;
-}
-__MATH_INLINE int
-__NTH (__signbit (double __x))
-{
-  __extension__ union { double __d; int __i[2]; } __u = { __d: __x };
-  return __u.__i[0] < 0;
-}
-# endif
 #endif /* __USE_ISOC99 */
 
 #if !defined __NO_MATH_INLINES && defined __OPTIMIZE__
 
 #ifdef __USE_ISOC99
 
-# ifndef __powerpc64__
 __MATH_INLINE long int lrint (double __x) __THROW;
 __MATH_INLINE long int
 __NTH (lrint (double __x))
@@ -104,7 +86,6 @@ __NTH (lrintf (float __x))
   __asm__ ("fctiw %0,%1" : "=f"(__u.__d) : "f"(__x));
   return __u.__ll[1];
 }
-# endif
 
 __MATH_INLINE double fdim (double __x, double __y) __THROW;
 __MATH_INLINE double
@@ -123,62 +104,5 @@ __NTH (fdimf (float __x, float __y))
 #endif /* __USE_ISOC99 */
 #endif /* !__NO_MATH_INLINES && __OPTIMIZE__ */
 
-/* This code is used internally in the GNU libc.  */
-#if 0 /*def __LIBC_INTERNAL_MATH_INLINES*/
-
-#include <sysdep.h>
-#include <ldsodefs.h>
-#include <dl-procinfo.h>
-
-# if __WORDSIZE == 64 || defined _ARCH_PWR4
-#  define __CPU_HAS_FSQRT 1
-# else
-#  define __CPU_HAS_FSQRT ((GLRO(dl_hwcap) & PPC_FEATURE_64) != 0)
-# endif
-
-extern double __slow_ieee754_sqrt (double);
-__MATH_INLINE double
-__NTH (__ieee754_sqrt (double __x))
-{
-  double __z;
-
-  /* If the CPU is 64-bit we can use the optional FP instructions.  */
-  if (__CPU_HAS_FSQRT)
-  {
-    /* Volatile is required to prevent the compiler from moving the
-       fsqrt instruction above the branch.  */
-     __asm__ __volatile__ (
-	"	fsqrt	%0,%1\n"
-		: "=f" (__z)
-		: "f" (__x));
-  }
-  else
-     __z = __slow_ieee754_sqrt(__x);
-
-  return __z;
-}
-
-extern float __slow_ieee754_sqrtf (float);
-__MATH_INLINE float
-__NTH (__ieee754_sqrtf (float __x))
-{
-  float __z;
-
-  /* If the CPU is 64-bit we can use the optional FP instructions.  */
-  if (__CPU_HAS_FSQRT)
-  {
-    /* Volatile is required to prevent the compiler from moving the
-       fsqrts instruction above the branch.  */
-     __asm__ __volatile__ (
-	"	fsqrts	%0,%1\n"
-		: "=f" (__z)
-		: "f" (__x));
-  }
-  else
-     __z = __slow_ieee754_sqrtf(__x);
-
-  return __z;
-}
-#endif /* __LIBC_INTERNAL_MATH_INLINES */
 #endif /* __GNUC__ && !_SOFT_FLOAT */
 
diff --git a/libc/sysdeps/linux/powerpc/bits/setjmp.h b/libc/sysdeps/linux/powerpc/bits/setjmp.h
index 46e8bf7d1..1cc1d836e 100644
--- a/libc/sysdeps/linux/powerpc/bits/setjmp.h
+++ b/libc/sysdeps/linux/powerpc/bits/setjmp.h
@@ -29,8 +29,6 @@
    assembler easier. Naturally, user code should not depend on
    either representation. */
 
-#include <bits/wordsize.h>
-
 /* The current powerpc 32-bit Altivec ABI specifies for SVR4 ABI and EABI
    the vrsave must be at byte 248 & v20 at byte 256.  So we must pad this
    correctly on 32 bit.  It also insists that vecregs are only gauranteed
@@ -38,12 +36,9 @@
    We have to version the code because members like  int __mask_was_saved
    in the jmp_buf will move as jmp_buf is now larger than 248 bytes.  We
    cannot keep the altivec jmp_buf backward compatible with the jmp_buf.  */
-#if __WORDSIZE == 64
-typedef long int __jmp_buf[64] __attribute__ ((__aligned__ (16)));
-#else
+
 /* The alignment is not essential, i.e.the buffer can be copied to a 4 byte
    aligned buffer as per the ABI it is just added for performance reasons.  */
 typedef long int __jmp_buf[64 + (12 * 4)] __attribute__ ((__aligned__ (16)));
-#endif
 
 #endif  /* bits/setjmp.h */
diff --git a/libc/sysdeps/linux/powerpc/bits/stat.h b/libc/sysdeps/linux/powerpc/bits/stat.h
index 10fa2cbf7..a90043f8a 100644
--- a/libc/sysdeps/linux/powerpc/bits/stat.h
+++ b/libc/sysdeps/linux/powerpc/bits/stat.h
@@ -20,27 +20,18 @@
 # error "Never include <bits/stat.h> directly; use <sys/stat.h> instead."
 #endif
 
-#include <bits/wordsize.h>
-
 /* Versions of the `struct stat' data structure.  */
 #define _STAT_VER_LINUX_OLD	1
 #define _STAT_VER_KERNEL	1
 #define _STAT_VER_SVR4		2
 #define _STAT_VER_LINUX	  3
-#if __WORDSIZE == 32
-# define _STAT_VER		_STAT_VER_LINUX
-#else
-# define _STAT_VER		_STAT_VER_KERNEL
-#endif
+#define _STAT_VER		_STAT_VER_LINUX
 
 /* Versions of the `xmknod' interface.  */
 #define _MKNOD_VER_LINUX	1
 #define _MKNOD_VER_SVR4		2
 #define _MKNOD_VER		_MKNOD_VER_LINUX /* The bits defined below.  */
 
-
-#if __WORDSIZE == 32
-
 struct stat
   {
     __dev_t st_dev;			/* Device.  */
@@ -134,103 +125,6 @@ struct stat64
   };
 # endif /* __USE_LARGEFILE64 */
 
-#else /* __WORDSIZE == 32 */
-
-struct stat
-  {
-    __dev_t st_dev;			/* Device.  */
-# ifndef __USE_FILE_OFFSET64
-    __ino_t st_ino;			/* File serial number.	*/
-# else
-    __ino64_t st_ino;			/* File serial number.	*/
-# endif
-    __nlink_t st_nlink;			/* Link count.  */
-    __mode_t st_mode;			/* File mode.  */
-    __uid_t st_uid;			/* User ID of the file's owner.	*/
-    __gid_t st_gid;			/* Group ID of the file's group.*/
-    int __pad2;
-    __dev_t st_rdev;			/* Device number, if device.  */
-# ifndef __USE_FILE_OFFSET64
-    __off_t st_size;			/* Size of file, in bytes.  */
-# else
-    __off64_t st_size;			/* Size of file, in bytes.  */
-# endif
-    __blksize_t st_blksize;		/* Optimal block size for I/O.  */
-
-# ifndef __USE_FILE_OFFSET64
-    __blkcnt_t st_blocks;		/* Number 512-byte blocks allocated. */
-# else
-    __blkcnt64_t st_blocks;		/* Number 512-byte blocks allocated. */
-# endif
-#ifdef __USE_MISC
-    /* Nanosecond resolution timestamps are stored in a format
-       equivalent to 'struct timespec'.  This is the type used
-       whenever possible but the Unix namespace rules do not allow the
-       identifier 'timespec' to appear in the <sys/stat.h> header.
-       Therefore we have to handle the use of this header in strictly
-       standard-compliant sources special.  */
-    struct timespec st_atim;		/* Time of last access.  */
-    struct timespec st_mtim;		/* Time of last modification.  */
-    struct timespec st_ctim;		/* Time of last status change.  */
-# define st_atime st_atim.tv_sec	/* Backward compatibility.  */
-# define st_mtime st_mtim.tv_sec
-# define st_ctime st_ctim.tv_sec
-#else
-    __time_t st_atime;			/* Time of last access.  */
-    unsigned long int st_atimensec;	/* Nscecs of last access.  */
-    __time_t st_mtime;			/* Time of last modification.  */
-    unsigned long int st_mtimensec;	/* Nsecs of last modification.  */
-    __time_t st_ctime;			/* Time of last status change.  */
-    unsigned long int st_ctimensec;	/* Nsecs of last status change.  */
-#endif
-    unsigned long int __unused4;
-    unsigned long int __unused5;
-    unsigned long int __unused6;
-  };
-
-# ifdef __USE_LARGEFILE64
-struct stat64
-  {
-    __dev_t st_dev;			/* Device.  */
-    __ino64_t st_ino;			/* File serial number.	*/
-    __nlink_t st_nlink;			/* Link count.  */
-    __mode_t st_mode;			/* File mode.  */
-    __uid_t st_uid;			/* User ID of the file's owner.	*/
-    __gid_t st_gid;			/* Group ID of the file's group.*/
-    int __pad2;
-    __dev_t st_rdev;			/* Device number, if device.  */
-    __off64_t st_size;			/* Size of file, in bytes.  */
-    __blksize_t st_blksize;		/* Optimal block size for I/O.  */
-    __blkcnt64_t st_blocks;		/* Number 512-byte blocks allocated. */
-#ifdef __USE_MISC
-    /* Nanosecond resolution timestamps are stored in a format
-       equivalent to 'struct timespec'.  This is the type used
-       whenever possible but the Unix namespace rules do not allow the
-       identifier 'timespec' to appear in the <sys/stat.h> header.
-       Therefore we have to handle the use of this header in strictly
-       standard-compliant sources special.  */
-    struct timespec st_atim;		/* Time of last access.  */
-    struct timespec st_mtim;		/* Time of last modification.  */
-    struct timespec st_ctim;		/* Time of last status change.  */
-# define st_atime st_atim.tv_sec	/* Backward compatibility.  */
-# define st_mtime st_mtim.tv_sec
-# define st_ctime st_ctim.tv_sec
-#else
-    __time_t st_atime;			/* Time of last access.  */
-    unsigned long int st_atimensec;	/* Nscecs of last access.  */
-    __time_t st_mtime;			/* Time of last modification.  */
-    unsigned long int st_mtimensec;	/* Nsecs of last modification.  */
-    __time_t st_ctime;			/* Time of last status change.  */
-    unsigned long int st_ctimensec;	/* Nsecs of last status change.  */
-#endif
-    unsigned long int __unused4;
-    unsigned long int __unused5;
-    unsigned long int __unused6;
-  };
-# endif /* __USE_LARGEFILE64 */
-#endif
-
-
 /* Tell code we have these members.  */
 #define	_STATBUF_ST_BLKSIZE
 #define _STATBUF_ST_RDEV
diff --git a/libc/sysdeps/linux/powerpc/bits/wordsize.h b/libc/sysdeps/linux/powerpc/bits/wordsize.h
index 3e8a1e0a1..0c0d31b98 100644
--- a/libc/sysdeps/linux/powerpc/bits/wordsize.h
+++ b/libc/sysdeps/linux/powerpc/bits/wordsize.h
@@ -1,11 +1,6 @@
 /* Determine the wordsize from the preprocessor defines.  */
 
-#if defined __powerpc64__
-# define __WORDSIZE	64
-# define __WORDSIZE_TIME64_COMPAT32	1
-#else
-# define __WORDSIZE	32
-#endif
+#define __WORDSIZE	32
 
 #if !defined __NO_LONG_DOUBLE_MATH && !defined __LONG_DOUBLE_MATH_OPTIONAL