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authorYann Sionneau <ysionneau@kalray.eu>2020-10-02 16:24:55 +0200
committerWaldemar Brodkorb <wbx@openadk.org>2020-10-02 19:10:36 +0200
commit672a303852353ba9299f6f50190fca8b3abe4c1d (patch)
treef204ea8dc0b5a3e4b2bd4251b8daf5f0783ae260 /libc/sysdeps/linux/kvx/sys/cachectl.h
parent4acf6f072cbc255b0b0d6cfd598a100f95d84f2a (diff)
kvx: add support for kvx arch to uClibc-ng
This commit adds support for Kalray VLIW family (kvx) Kalray kv3 core is embedded in Kalray Coolidge SoC. This core which is the third of the KV family has the following features: 32/64 bits execution mode 6-issue VLIW architecture 64 x 64bits general purpose registers SIMD instructions little-endian In order to build a usable toolchain, build scripts are provided at the following address: https://github.com/kalray/build-scripts. Kalray uses FOSS which is available at https://github.com/kalray This includes Linux kernel, uClibc-ng, gcc, binutils, etc. Signed-off-by: Clément Léger <cleger@kalray.eu> Signed-off-by: Guillaume Thouvenin <gthouvenin@kalray.eu> Signed-off-by: Laurent Thevenoux <lthevenoux@kalray.eu> Signed-off-by: Marc Poulhies <mpoulhies@kalray.eu> Signed-off-by: Marius Gligor <mgligor@kalray.eu> Signed-off-by: Yann Sionneau <ysionneau@kalray.eu>
Diffstat (limited to 'libc/sysdeps/linux/kvx/sys/cachectl.h')
-rw-r--r--libc/sysdeps/linux/kvx/sys/cachectl.h21
1 files changed, 21 insertions, 0 deletions
diff --git a/libc/sysdeps/linux/kvx/sys/cachectl.h b/libc/sysdeps/linux/kvx/sys/cachectl.h
new file mode 100644
index 000000000..707de263e
--- /dev/null
+++ b/libc/sysdeps/linux/kvx/sys/cachectl.h
@@ -0,0 +1,21 @@
+/*
+ * This file is subject to the terms and conditions of the LGPL V2.1
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2020 Kalray Inc.
+ */
+
+#ifndef _SYS_CACHECTL_H
+#define _SYS_CACHECTL_H 1
+
+#include <asm/cachectl.h>
+
+__BEGIN_DECLS
+
+extern int cachectl(void *addr, size_t len, unsigned long cache,
+ unsigned long flags);
+
+__END_DECLS
+
+#endif