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authorCarmelo Amoroso <carmelo.amoroso@st.com>2010-12-14 14:50:49 +0100
committerCarmelo Amoroso <carmelo.amoroso@st.com>2010-12-14 14:54:26 +0100
commite018b8ba1a0110120429de34366459af0771abe2 (patch)
treecc38652121c59fdf43e94ccc3d13b62bdc481338
parentd181797c70183b897330a290e6f5f5d7e7812770 (diff)
parent640220faf25659eb4c15b78cf8869251dbadbd16 (diff)
Merge commit 'origin/master' into prelink
Signed-off-by: Carmelo Amoroso <carmelo.amoroso@st.com>
-rw-r--r--libc/string/sh/sh4/memcpy.S18
-rw-r--r--libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_timedwait.S4
-rw-r--r--libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_wait.S18
-rw-r--r--utils/getconf.c72
4 files changed, 78 insertions, 34 deletions
diff --git a/libc/string/sh/sh4/memcpy.S b/libc/string/sh/sh4/memcpy.S
index 5be770a59..6a229a06c 100644
--- a/libc/string/sh/sh4/memcpy.S
+++ b/libc/string/sh/sh4/memcpy.S
@@ -497,6 +497,12 @@ ENTRY(memcpy)
mov r5, r6
add #-0x80, r6 ! prefetch head
+ ! store FPU (in single precision mode, do not check R15 align).
+ fmov fr12, @-r15
+ fmov fr13, @-r15
+ fmov fr14, @-r15
+ fmov fr15, @-r15
+
FPU_SET_PAIRED_PREC
mov #4, r0
@@ -553,16 +559,22 @@ ENTRY(memcpy)
bt/s 67b
pref @r6
+ RESTORE_FPSCR
+
+ ! Restore FPU callee save registers
+ fmov @r15+, fr15
+ fmov @r15+, fr14
+ fmov @r15+, fr13
+ fmov @r15+, fr12
+
! Other cache lines could be copied: so use the FPU in single paired
! precision without prefetching. No check for alignment is necessary.
mov #1, r0
cmp/ge r0, r3
- bt/s 4f
+ bt/s 3f
add #0x60, r5
- RESTORE_FPSCR
-
bra 5f
nop
diff --git a/libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_timedwait.S b/libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_timedwait.S
index ac7983c49..3b61367e1 100644
--- a/libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_timedwait.S
+++ b/libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_timedwait.S
@@ -648,6 +648,10 @@ __condvar_tw_cleanup:
movl %esi, (%esp)
.LcallUR:
+#ifdef __PIC__
+ call __i686.get_pc_thunk.bx
+ addl $_GLOBAL_OFFSET_TABLE_, %ebx
+#endif
call _Unwind_Resume@PLT
hlt
.LENDCODE:
diff --git a/libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_wait.S b/libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_wait.S
index abc963f07..a1294c509 100644
--- a/libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_wait.S
+++ b/libpthread/nptl/sysdeps/unix/sysv/linux/i386/i486/pthread_cond_wait.S
@@ -535,6 +535,10 @@ __condvar_w_cleanup:
movl %esi, (%esp)
.LcallUR:
+#ifdef __PIC__
+ call __i686.get_pc_thunk.bx
+ addl $_GLOBAL_OFFSET_TABLE_, %ebx
+#endif
call _Unwind_Resume@PLT
hlt
.LENDCODE:
@@ -569,14 +573,14 @@ __condvar_w_cleanup:
.Lcstend:
#ifdef __PIC__
- .section .gnu.linkonce.t.__i686.get_pc_thunk.cx,"ax",@progbits
- .globl __i686.get_pc_thunk.cx
- .hidden __i686.get_pc_thunk.cx
- .type __i686.get_pc_thunk.cx,@function
-__i686.get_pc_thunk.cx:
- movl (%esp), %ecx;
+ .section .gnu.linkonce.t.__i686.get_pc_thunk.bx,"ax",@progbits
+ .globl __i686.get_pc_thunk.bx
+ .hidden __i686.get_pc_thunk.bx
+ .type __i686.get_pc_thunk.bx,@function
+__i686.get_pc_thunk.bx:
+ movl (%esp), %ebx;
ret
- .size __i686.get_pc_thunk.cx,.-__i686.get_pc_thunk.cx
+ .size __i686.get_pc_thunk.bx,.-__i686.get_pc_thunk.bx
#endif
#ifdef SHARED
diff --git a/utils/getconf.c b/utils/getconf.c
index 81566df7b..812783ecf 100644
--- a/utils/getconf.c
+++ b/utils/getconf.c
@@ -1014,18 +1014,42 @@ static const struct conf vars[] =
static const struct { const char *name; int num; } specs[] =
{
+#ifdef _SC_XBS5_ILP32_OFF32
{ "XBS5_ILP32_OFF32", _SC_XBS5_ILP32_OFF32 },
+#endif
+#ifdef _SC_XBS5_ILP32_OFFBIG
{ "XBS5_ILP32_OFFBIG", _SC_XBS5_ILP32_OFFBIG },
+#endif
+#ifdef _SC_XBS5_LP64_OFF64
{ "XBS5_LP64_OFF64", _SC_XBS5_LP64_OFF64 },
+#endif
+#ifdef _SC_XBS5_LPBIG_OFFBIG
{ "XBS5_LPBIG_OFFBIG", _SC_XBS5_LPBIG_OFFBIG },
+#endif
+#ifdef _SC_V6_ILP32_OFF32
{ "POSIX_V6_ILP32_OFF32", _SC_V6_ILP32_OFF32 },
+#endif
+#ifdef _SC_V6_ILP32_OFFBIG
{ "POSIX_V6_ILP32_OFFBIG", _SC_V6_ILP32_OFFBIG },
+#endif
+#ifdef _SC_V6_LP64_OFF64
{ "POSIX_V6_LP64_OFF64", _SC_V6_LP64_OFF64 },
+#endif
+#ifdef _SC_V6_LPBIG_OFFBIG
{ "POSIX_V6_LPBIG_OFFBIG", _SC_V6_LPBIG_OFFBIG },
+#endif
+#ifdef _SC_V7_ILP32_OFF32
{ "POSIX_V7_ILP32_OFF32", _SC_V7_ILP32_OFF32 },
+#endif
+#ifdef _SC_V7_ILP32_OFFBIG
{ "POSIX_V7_ILP32_OFFBIG", _SC_V7_ILP32_OFFBIG },
+#endif
+#ifdef _SC_V7_LP64_OFF64
{ "POSIX_V7_LP64_OFF64", _SC_V7_LP64_OFF64 },
+#endif
+#ifdef _SC_V7_LPBIG_OFFBIG
{ "POSIX_V7_LPBIG_OFFBIG", _SC_V7_LPBIG_OFFBIG },
+#endif
};
static const int nspecs = sizeof (specs) / sizeof (specs[0]);
@@ -1177,41 +1201,41 @@ environment SPEC.\n\n");
switch (specs[i].num)
{
-#ifndef _XBS5_ILP32_OFF32
- case _SC_XBS5_ILP32_OFF32:
+#if !defined(_XBS5_ILP32_OFF32) && defined(_SC_XBS5_ILP32_OFF32)
+ case _SC_XBS5_ILP32_OFF32:
#endif
-#ifndef _XBS5_ILP32_OFFBIG
- case _SC_XBS5_ILP32_OFFBIG:
+#if !defined(_XBS5_ILP32_OFFBIG) && defined(_SC_XBS5_ILP32_OFFBIG)
+ case _SC_XBS5_ILP32_OFFBIG:
#endif
-#ifndef _XBS5_LP64_OFF64
- case _SC_XBS5_LP64_OFF64:
+#if !defined(_XBS5_LP64_OFF64) && defined(_SC_XBS5_LP64_OFF64)
+ case _SC_XBS5_LP64_OFF64:
#endif
-#ifndef _XBS5_LPBIG_OFFBIG
- case _SC_XBS5_LPBIG_OFFBIG:
+#if !defined(_XBS5_LPBIG_OFFBIG) && defined(_SC_XBS5_LPBIG_OFFBIG)
+ case _SC_XBS5_LPBIG_OFFBIG:
#endif
-#ifndef _POSIX_V6_ILP32_OFF32
- case _SC_V6_ILP32_OFF32:
+#if !defined(_POSIX_V6_ILP32_OFF32) && defined(_SC_V6_ILP32_OFF32)
+ case _SC_V6_ILP32_OFF32:
#endif
-#ifndef _POSIX_V6_ILP32_OFFBIG
- case _SC_V6_ILP32_OFFBIG:
+#if !defined(_POSIX_V6_ILP32_OFFBIG) && defined(_SC_V6_ILP32_OFFBIG)
+ case _SC_V6_ILP32_OFFBIG:
#endif
-#ifndef _POSIX_V6_LP64_OFF64
- case _SC_V6_LP64_OFF64:
+#if !defined(_POSIX_V6_LP64_OFF64) && defined(_SC_V6_LP64_OFF64)
+ case _SC_V6_LP64_OFF64:
#endif
-#ifndef _POSIX_V6_LPBIG_OFFBIG
- case _SC_V6_LPBIG_OFFBIG:
+#if !defined(_POSIX_V6_LPBIG_OFFBIG) && defined(_SC_V6_LPBIG_OFFBIG)
+ case _SC_V6_LPBIG_OFFBIG:
#endif
-#ifndef _POSIX_V7_ILP32_OFF32
- case _SC_V7_ILP32_OFF32:
+#if !defined(_POSIX_V7_ILP32_OFF32) && defined(_SC_V7_ILP32_OFF32)
+ case _SC_V7_ILP32_OFF32:
#endif
-#ifndef _POSIX_V7_ILP32_OFFBIG
- case _SC_V7_ILP32_OFFBIG:
+#if !defined(_POSIX_V7_ILP32_OFFBIG) && defined(_SC_V7_ILP32_OFFBIG)
+ case _SC_V7_ILP32_OFFBIG:
#endif
-#ifndef _POSIX_V7_LP64_OFF64
- case _SC_V7_LP64_OFF64:
+#if !defined(_POSIX_V7_LP64_OFF64) && defined(_SC_V7_LP64_OFF64)
+ case _SC_V7_LP64_OFF64:
#endif
-#ifndef _POSIX_V7_LPBIG_OFFBIG
- case _SC_V7_LPBIG_OFFBIG:
+#if !defined(_POSIX_V7_LPBIG_OFFBIG) && defined(_SC_V7_LPBIG_OFFBIG)
+ case _SC_V7_LPBIG_OFFBIG:
#endif
{
const char *args[argc + 3];