use uniform form of C99 keywords

Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>

43 files changed, 215 insertions, 215 deletions

diff --git a/libc/string/sh/sh4/memmove.c b/libc/string/sh/sh4/memmove.c
index 62fe8187d..8059bd4cc 100644
--- a/libc/string/sh/sh4/memmove.c
+++ b/libc/string/sh/sh4/memmove.c
@@ -14,8 +14,8 @@
 #include <string.h>
 
 #define FPSCR_SR	(1 << 20)
-#define STORE_FPSCR(x)	__asm__ volatile("sts fpscr, %0" : "=r"(x))
-#define LOAD_FPSCR(x)	__asm__ volatile("lds %0, fpscr" : : "r"(x))
+#define STORE_FPSCR(x)	__asm__ __volatile__("sts fpscr, %0" : "=r"(x))
+#define LOAD_FPSCR(x)	__asm__ __volatile__("lds %0, fpscr" : : "r"(x))
 
 static void fpu_optimised_copy_fwd(void *dest, const void *src, size_t len)
 {
@@ -51,24 +51,24 @@ static void fpu_optimised_copy_fwd(void *dest, const void *src, size_t len)
 			LOAD_FPSCR(FPSCR_SR);
 
 			while (len >= 32) {
-				__asm__ volatile ("fmov @%0+,dr0":"+r" (s1));
-				__asm__ volatile ("fmov @%0+,dr2":"+r" (s1));
-				__asm__ volatile ("fmov @%0+,dr4":"+r" (s1));
-				__asm__ volatile ("fmov @%0+,dr6":"+r" (s1));
+				__asm__ __volatile__ ("fmov @%0+,dr0":"+r" (s1));
+				__asm__ __volatile__ ("fmov @%0+,dr2":"+r" (s1));
+				__asm__ __volatile__ ("fmov @%0+,dr4":"+r" (s1));
+				__asm__ __volatile__ ("fmov @%0+,dr6":"+r" (s1));
 				__asm__
-				    volatile ("fmov dr0,@%0"::"r"
+				    __volatile__ ("fmov dr0,@%0"::"r"
 					      (d1):"memory");
 				d1 += 2;
 				__asm__
-				    volatile ("fmov dr2,@%0"::"r"
+				    __volatile__ ("fmov dr2,@%0"::"r"
 					      (d1):"memory");
 				d1 += 2;
 				__asm__
-				    volatile ("fmov dr4,@%0"::"r"
+				    __volatile__ ("fmov dr4,@%0"::"r"
 					      (d1):"memory");
 				d1 += 2;
 				__asm__
-				    volatile ("fmov dr6,@%0"::"r"
+				    __volatile__ ("fmov dr6,@%0"::"r"
 					      (d1):"memory");
 				d1 += 2;
 				len -= 32;
diff --git a/libc/sysdeps/linux/i386/bits/mathinline.h b/libc/sysdeps/linux/i386/bits/mathinline.h
index 5caf73353..53cbcb2b3 100644
--- a/libc/sysdeps/linux/i386/bits/mathinline.h
+++ b/libc/sysdeps/linux/i386/bits/mathinline.h
@@ -529,8 +529,8 @@ __inline_mathcodeNP (tanh, __x, \
 
 __inline_mathcodeNP (floor, __x, \
   register long double __value;						      \
-  __volatile unsigned short int __cw;					      \
-  __volatile unsigned short int __cwtmp;				      \
+  __volatile__ unsigned short int __cw;					      \
+  __volatile__ unsigned short int __cwtmp;				      \
   __asm__ __volatile__ ("fnstcw %0" : "=m" (__cw));				      \
   __cwtmp = (__cw & 0xf3ff) | 0x0400; /* rounding down */		      \
   __asm__ __volatile__ ("fldcw %0" : : "m" (__cwtmp));			      \
@@ -540,8 +540,8 @@ __inline_mathcodeNP (floor, __x, \
 
 __inline_mathcodeNP (ceil, __x, \
   register long double __value;						      \
-  __volatile unsigned short int __cw;					      \
-  __volatile unsigned short int __cwtmp;				      \
+  __volatile__ unsigned short int __cw;					      \
+  __volatile__ unsigned short int __cwtmp;				      \
   __asm__ __volatile__ ("fnstcw %0" : "=m" (__cw));				      \
   __cwtmp = (__cw & 0xf3ff) | 0x0800; /* rounding up */			      \
   __asm__ __volatile__ ("fldcw %0" : : "m" (__cwtmp));			      \
diff --git a/libc/sysdeps/linux/ia64/bits/syscalls.h b/libc/sysdeps/linux/ia64/bits/syscalls.h
index 9fda3d07a..9c6a2b77b 100644
--- a/libc/sysdeps/linux/ia64/bits/syscalls.h
+++ b/libc/sysdeps/linux/ia64/bits/syscalls.h
@@ -54,7 +54,7 @@
     register long _r15 __asm__ ("r15") = name;			\
     long _retval;						\
     LOAD_REGS_##nr						\
-    __asm __volatile (BREAK_INSN (__IA64_BREAK_SYSCALL)	\
+    __asm__ __volatile__ (BREAK_INSN (__IA64_BREAK_SYSCALL)	\
 		      : "=r" (_r8), "=r" (_r10), "=r" (_r15)	\
 			ASM_OUTARGS_##nr			\
 		      : "2" (_r15) ASM_ARGS_##nr		\
diff --git a/libc/sysdeps/linux/mips/sysdep.h b/libc/sysdeps/linux/mips/sysdep.h
index 4cefd6198..0860c1a48 100644
--- a/libc/sysdeps/linux/mips/sysdep.h
+++ b/libc/sysdeps/linux/mips/sysdep.h
@@ -169,7 +169,7 @@ L(syse1):
 	{								\
 	register long __v0 __asm__("$2") ncs_init;			\
 	register long __a3 __asm__("$7");				\
-	__asm__ volatile (						\
+	__asm__ __volatile__ (						\
 	".set\tnoreorder\n\t"						\
 	cs_init								\
 	"syscall\n\t"							\
@@ -192,7 +192,7 @@ L(syse1):
 	register long __v0 __asm__("$2") ncs_init;			\
 	register long __a0 __asm__("$4") = (long) arg1;			\
 	register long __a3 __asm__("$7");				\
-	__asm__ volatile (						\
+	__asm__ __volatile__ (						\
 	".set\tnoreorder\n\t"						\
 	cs_init								\
 	"syscall\n\t"							\
@@ -216,7 +216,7 @@ L(syse1):
 	register long __a0 __asm__("$4") = (long) arg1;			\
 	register long __a1 __asm__("$5") = (long) arg2;			\
 	register long __a3 __asm__("$7");				\
-	__asm__ volatile (						\
+	__asm__ __volatile__ (						\
 	".set\tnoreorder\n\t"						\
 	cs_init								\
 	"syscall\n\t"							\
@@ -241,7 +241,7 @@ L(syse1):
 	register long __a1 __asm__("$5") = (long) arg2;			\
 	register long __a2 __asm__("$6") = (long) arg3;			\
 	register long __a3 __asm__("$7");				\
-	__asm__ volatile (						\
+	__asm__ __volatile__ (						\
 	".set\tnoreorder\n\t"						\
 	cs_init								\
 	"syscall\n\t"							\
@@ -266,7 +266,7 @@ L(syse1):
 	register long __a1 __asm__("$5") = (long) arg2;			\
 	register long __a2 __asm__("$6") = (long) arg3;			\
 	register long __a3 __asm__("$7") = (long) arg4;			\
-	__asm__ volatile (						\
+	__asm__ __volatile__ (						\
 	".set\tnoreorder\n\t"						\
 	cs_init								\
 	"syscall\n\t"							\
@@ -298,7 +298,7 @@ L(syse1):
 	register long __a1 __asm__("$5") = (long) arg2;			\
 	register long __a2 __asm__("$6") = (long) arg3;			\
 	register long __a3 __asm__("$7") = (long) arg4;			\
-	__asm__ volatile (						\
+	__asm__ __volatile__ (						\
 	".set\tnoreorder\n\t"						\
 	"subu\t$29, 32\n\t"						\
 	"sw\t%6, 16($29)\n\t"						\
@@ -328,7 +328,7 @@ L(syse1):
 	register long __a1 __asm__("$5") = (long) arg2;			\
 	register long __a2 __asm__("$6") = (long) arg3;			\
 	register long __a3 __asm__("$7") = (long) arg4;			\
-	__asm__ volatile (						\
+	__asm__ __volatile__ (						\
 	".set\tnoreorder\n\t"						\
 	"subu\t$29, 32\n\t"						\
 	"sw\t%6, 16($29)\n\t"						\
@@ -359,7 +359,7 @@ L(syse1):
 	register long __a1 __asm__("$5") = (long) arg2;			\
 	register long __a2 __asm__("$6") = (long) arg3;			\
 	register long __a3 __asm__("$7") = (long) arg4;			\
-	__asm__ volatile (						\
+	__asm__ __volatile__ (						\
 	".set\tnoreorder\n\t"						\
 	"subu\t$29, 32\n\t"						\
 	"sw\t%6, 16($29)\n\t"						\
diff --git a/libc/sysdeps/linux/powerpc/bits/atomic.h b/libc/sysdeps/linux/powerpc/bits/atomic.h
index 3dbbb3a09..dba113670 100644
--- a/libc/sysdeps/linux/powerpc/bits/atomic.h
+++ b/libc/sysdeps/linux/powerpc/bits/atomic.h
@@ -341,7 +341,7 @@
  * So if the build is using -mcpu=[power4,power5,power5+,970] we can
  * safely use lwsync.
  */
-# define atomic_read_barrier()	__asm ("lwsync" ::: "memory")
+# define atomic_read_barrier()	__asm__ ("lwsync" ::: "memory")
 /*
  * "light weight" sync can also be used for the release barrier.
  */
diff --git a/libc/sysdeps/linux/sh/bits/atomic.h b/libc/sysdeps/linux/sh/bits/atomic.h
index a099b43a8..bc79b29b7 100644
--- a/libc/sysdeps/linux/sh/bits/atomic.h
+++ b/libc/sysdeps/linux/sh/bits/atomic.h
@@ -80,7 +80,7 @@ typedef uintmax_t uatomic_max_t;
 
 #define __arch_compare_and_exchange_n(mem, newval, oldval, bwl, version) \
   ({ signed long __result; \
-     __asm __volatile ("\
+     __asm__ __volatile__ ("\
 	.align 2\n\
 	mova 1f,r0\n\
 	nop\n\
@@ -139,7 +139,7 @@ typedef uintmax_t uatomic_max_t;
 */
 
 #define __arch_operate_old_new_n(mem, value, old, new, bwl, oper)	\
-  (void) ({ __asm __volatile ("\
+  (void) ({ __asm__ __volatile__ ("\
 	.align 2\n\
 	mova 1f,r0\n\
 	mov r15,r1\n\
@@ -185,7 +185,7 @@ typedef uintmax_t uatomic_max_t;
 
 #define __arch_operate_new_n(mem, value, bwl, oper)	 \
   ({ int32_t __value = (value), __new; \
-     __asm __volatile ("\
+     __asm__ __volatile__ ("\
 	.align 2\n\
 	mova 1f,r0\n\
 	mov r15,r1\n\
diff --git a/libc/sysdeps/linux/sh/bits/syscalls.h b/libc/sysdeps/linux/sh/bits/syscalls.h
index c69dce537..59d2d1ec7 100644
--- a/libc/sysdeps/linux/sh/bits/syscalls.h
+++ b/libc/sysdeps/linux/sh/bits/syscalls.h
@@ -119,7 +119,7 @@
     register long int r3 __asm__ ("%r3") = (name);			 	      \
     SUBSTITUTE_ARGS_##nr(args);						      \
 									      \
-    __asm__ volatile (SYSCALL_INST_STR##nr SYSCALL_INST_PAD			      \
+    __asm__ __volatile__ (SYSCALL_INST_STR##nr SYSCALL_INST_PAD			      \
 		  : "=z" (resultvar)					      \
 		  : "r" (r3) ASMFMT_##nr				      \
 		  : "memory");						      \
diff --git a/libc/sysdeps/linux/sparc/bits/atomic.h b/libc/sysdeps/linux/sparc/bits/atomic.h
index f625eb92a..16c3c78c9 100644
--- a/libc/sysdeps/linux/sparc/bits/atomic.h
+++ b/libc/sysdeps/linux/sparc/bits/atomic.h
@@ -69,7 +69,7 @@ volatile unsigned char __sparc32_atomic_locks[64]
       unsigned int __idx = (((long) addr >> 2) ^ ((long) addr >> 12)) \
 			   & 63;				      \
       do							      \
-	__asm __volatile ("ldstub %1, %0"			      \
+	__asm__ __volatile__ ("ldstub %1, %0"			      \
 			  : "=r" (__old_lock),			      \
 			    "=m" (__sparc32_atomic_locks[__idx])      \
 			  : "m" (__sparc32_atomic_locks[__idx])	      \
@@ -83,7 +83,7 @@ volatile unsigned char __sparc32_atomic_locks[64]
     {								      \
       __sparc32_atomic_locks[(((long) addr >> 2)		      \
 			      ^ ((long) addr >> 12)) & 63] = 0;	      \
-      __asm __volatile ("" ::: "memory");			      \
+      __asm__ __volatile__ ("" ::: "memory");			      \
     }								      \
   while (0)
 
@@ -92,7 +92,7 @@ volatile unsigned char __sparc32_atomic_locks[64]
     {								      \
       unsigned int __old_lock;					      \
       do							      \
-	__asm __volatile ("ldstub %1, %0"			      \
+	__asm__ __volatile__ ("ldstub %1, %0"			      \
 			  : "=r" (__old_lock), "=m" (*(addr))	      \
 			  : "m" (*(addr))			      \
 			  : "memory");				      \
@@ -104,7 +104,7 @@ volatile unsigned char __sparc32_atomic_locks[64]
   do								      \
     {								      \
       *(char *) (addr) = 0;					      \
-      __asm __volatile ("" ::: "memory");			      \
+      __asm__ __volatile__ ("" ::: "memory");			      \
     }								      \
   while (0)
 
@@ -112,14 +112,14 @@ volatile unsigned char __sparc32_atomic_locks[64]
 #ifndef SHARED
 # define __v9_compare_and_exchange_val_32_acq(mem, newval, oldval) \
 ({									      \
-  register __typeof (*(mem)) __acev_tmp __asm ("%g6");			      \
-  register __typeof (mem) __acev_mem __asm ("%g1") = (mem);		      \
-  register __typeof (*(mem)) __acev_oldval __asm ("%g5");		      \
+  register __typeof (*(mem)) __acev_tmp __asm__ ("%g6");			      \
+  register __typeof (mem) __acev_mem __asm__ ("%g1") = (mem);		      \
+  register __typeof (*(mem)) __acev_oldval __asm__ ("%g5");		      \
   __acev_tmp = (newval);						      \
   __acev_oldval = (oldval);						      \
   /* .word 0xcde05005 is cas [%g1], %g5, %g6.  Can't use cas here though,     \
      because as will then mark the object file as V8+ arch.  */		      \
-  __asm __volatile (".word 0xcde05005"					      \
+  __asm__ __volatile__ (".word 0xcde05005"					      \
 		    : "+r" (__acev_tmp), "=m" (*__acev_mem)		      \
 		    : "r" (__acev_oldval), "m" (*__acev_mem),		      \
 		      "r" (__acev_mem) : "memory");			      \
@@ -187,7 +187,7 @@ volatile unsigned char __sparc32_atomic_locks[64]
        *__acev_memp = __acev_newval;				      \
      else							      \
        __sparc32_atomic_do_unlock24 (__acev_memp);		      \
-     __asm __volatile ("" ::: "memory");			      \
+     __asm__ __volatile__ ("" ::: "memory");			      \
      __acev_ret; })
 
 #define __v7_exchange_24_rel(mem, newval) \
@@ -198,7 +198,7 @@ volatile unsigned char __sparc32_atomic_locks[64]
      __sparc32_atomic_do_lock24 (__acev_memp);			      \
      __acev_ret = *__acev_memp & 0xffffff;			      \
      *__acev_memp = __acev_newval;				      \
-     __asm __volatile ("" ::: "memory");			      \
+     __asm__ __volatile__ ("" ::: "memory");			      \
      __acev_ret; })
 
 #ifdef SHARED
diff --git a/libc/sysdeps/linux/sparc/bits/syscalls.h b/libc/sysdeps/linux/sparc/bits/syscalls.h
index 78f143911..dc8d63713 100644
--- a/libc/sysdeps/linux/sparc/bits/syscalls.h
+++ b/libc/sysdeps/linux/sparc/bits/syscalls.h
@@ -78,7 +78,7 @@
 	register long __o3 __asm__ ("o3") = (long)(arg4);		\
 	register long __o4 __asm__ ("o4") = (long)(arg5);		\
 	register long __g1 __asm__ ("g1") = __NR_clone;			\
-	__asm __volatile (__CLONE_SYSCALL_STRING :			\
+	__asm__ __volatile__ (__CLONE_SYSCALL_STRING :			\
 			  "=r" (__g1), "=r" (__o0), "=r" (__o1)	:	\
 			  "0" (__g1), "1" (__o0), "2" (__o1),		\
 			  "r" (__o2), "r" (__o3), "r" (__o4) :		\
diff --git a/libm/ldouble_wrappers.c b/libm/ldouble_wrappers.c
index 7d5af90b6..bf7ae15f0 100644
--- a/libm/ldouble_wrappers.c
+++ b/libm/ldouble_wrappers.c
@@ -66,7 +66,7 @@ long long func##l(long double x) \
 long double func##l(long double x) \
 { \
 	long double st_top; \
-	__asm ( \
+	__asm__ ( \
 	"	fldt	%1\n" \
 	"	fstpl	%1\n" \
 	"	jmp	" __stringify(__GI_##func) "\n" \
@@ -79,7 +79,7 @@ long double func##l(long double x) \
 int func##l(long double x) \
 { \
 	int ret; \
-	__asm ( \
+	__asm__ ( \
 	"	fldt	%1\n" \
 	"	fstpl	%1\n" \
 	"	jmp	" __stringify(__GI_##func) "\n" \
@@ -92,7 +92,7 @@ int func##l(long double x) \
 long func##l(long double x) \
 { \
 	long ret; \
-	__asm ( \
+	__asm__ ( \
 	"	fldt	%1\n" \
 	"	fstpl	%1\n" \
 	"	jmp	" __stringify(__GI_##func) "\n" \
@@ -105,7 +105,7 @@ long func##l(long double x) \
 long long func##l(long double x) \
 { \
 	long long ret; \
-	__asm ( \
+	__asm__ ( \
 	"	fldt	%1\n" \
 	"	fstpl	%1\n" \
 	"	jmp	" __stringify(__GI_##func) "\n" \
diff --git a/libm/math_private.h b/libm/math_private.h
index 2c5a30ac2..be8031ef8 100644
--- a/libm/math_private.h
+++ b/libm/math_private.h
@@ -211,17 +211,17 @@ extern int    __kernel_rem_pio2 (double*,double*,int,int,int,const int*) attribu
 #define math_opt_barrier(x) ({ \
 	__typeof(x) __x = (x); \
 	/* "t": load x into top-of-stack fpreg */ \
-	__asm ("" : "=t" (__x) : "0" (__x)); \
+	__asm__ ("" : "=t" (__x) : "0" (__x)); \
 	__x; \
 })
 #define math_force_eval(x) do {	\
 	__typeof(x) __x = (x); \
 	if (sizeof(__x) <= sizeof(double)) \
 		/* "m": store x into a memory location */ \
-		__asm __volatile ("" : : "m" (__x)); \
+		__asm__ __volatile__ ("" : : "m" (__x)); \
 	else /* long double */ \
 		/* "f": load x into (any) fpreg */ \
-		__asm __volatile ("" : : "f" (__x)); \
+		__asm__ __volatile__ ("" : : "f" (__x)); \
 } while (0)
 #endif
 
@@ -230,29 +230,29 @@ extern int    __kernel_rem_pio2 (double*,double*,int,int,int,const int*) attribu
 	__typeof(x) __x = (x); \
 	if (sizeof(__x) <= sizeof(double)) \
 		/* "x": load into XMM SSE register */ \
-		__asm ("" : "=x" (__x) : "0" (__x)); \
+		__asm__ ("" : "=x" (__x) : "0" (__x)); \
 	else /* long double */ \
 		/* "t": load x into top-of-stack fpreg */ \
-		__asm ("" : "=t" (__x) : "0" (__x)); \
+		__asm__ ("" : "=t" (__x) : "0" (__x)); \
 	__x; \
 })
 #define math_force_eval(x) do { \
 	__typeof(x) __x = (x); \
 	if (sizeof(__x) <= sizeof(double)) \
 		/* "x": load into XMM SSE register */ \
-		__asm __volatile ("" : : "x" (__x)); \
+		__asm__ __volatile__ ("" : : "x" (__x)); \
 	else /* long double */ \
 		/* "f": load x into (any) fpreg */ \
-		__asm __volatile ("" : : "f" (__x)); \
+		__asm__ __volatile__ ("" : : "f" (__x)); \
 } while (0)
 #endif
 
 /* Default implementations force store to a memory location */
 #ifndef math_opt_barrier
-#define math_opt_barrier(x) ({ __typeof(x) __x = (x); __asm ("" : "+m" (__x)); __x; })
+#define math_opt_barrier(x) ({ __typeof(x) __x = (x); __asm__ ("" : "+m" (__x)); __x; })
 #endif
 #ifndef math_force_eval
-#define math_force_eval(x)  do { __typeof(x) __x = (x); __asm __volatile ("" : : "m" (__x)); } while (0)
+#define math_force_eval(x)  do { __typeof(x) __x = (x); __asm__ __volatile__ ("" : : "m" (__x)); } while (0)
 #endif
 
 
diff --git a/libpthread/nptl/init.c b/libpthread/nptl/init.c
index 3e5fde337..911293a65 100644
--- a/libpthread/nptl/init.c
+++ b/libpthread/nptl/init.c
@@ -275,7 +275,7 @@ __pthread_initialize_minimal_internal (void)
      following code ahead of the __libc_setup_tls call.  This function
      will initialize the thread register which is subsequently
      used.  */
-  __asm __volatile ("");
+  __asm__ __volatile__ ("");
 #endif
 
   /* Minimal initialization of the thread descriptor.  */
diff --git a/libpthread/nptl/sysdeps/i386/i686/tls.h b/libpthread/nptl/sysdeps/i386/i686/tls.h
index 4025ed8d2..928d269dc 100644
--- a/libpthread/nptl/sysdeps/i386/i686/tls.h
+++ b/libpthread/nptl/sysdeps/i386/i686/tls.h
@@ -25,9 +25,9 @@
 /* Macros to load from and store into segment registers.  We can use
    the 32-bit instructions.  */
 #define TLS_GET_GS() \
-  ({ int __seg; __asm ("movl %%gs, %0" : "=q" (__seg)); __seg; })
+  ({ int __seg; __asm__ ("movl %%gs, %0" : "=q" (__seg)); __seg; })
 #define TLS_SET_GS(val) \
-  __asm ("movl %0, %%gs" :: "q" (val))
+  __asm__ ("movl %0, %%gs" :: "q" (val))
 
 
 /* Get the full set of definitions.  */
diff --git a/libpthread/nptl/sysdeps/i386/pthreaddef.h b/libpthread/nptl/sysdeps/i386/pthreaddef.h
index 81456a4fc..f9f5645dc 100644
--- a/libpthread/nptl/sysdeps/i386/pthreaddef.h
+++ b/libpthread/nptl/sysdeps/i386/pthreaddef.h
@@ -41,8 +41,8 @@
 #define __exit_thread_inline(val) \
   while (1) {								      \
     if (__builtin_constant_p (val) && (val) == 0)			      \
-      __asm__ volatile ("xorl %%ebx, %%ebx; int $0x80" :: "a" (__NR_exit));	      \
+      __asm__ __volatile__ ("xorl %%ebx, %%ebx; int $0x80" :: "a" (__NR_exit));	      \
     else								      \
-      __asm__ volatile ("movl %1, %%ebx; int $0x80"				      \
+      __asm__ __volatile__ ("movl %1, %%ebx; int $0x80"				      \
 		    :: "a" (__NR_exit), "r" (val));			      \
   }
diff --git a/libpthread/nptl/sysdeps/i386/tls.h b/libpthread/nptl/sysdeps/i386/tls.h
index 5f27d8fec..ac547953a 100644
--- a/libpthread/nptl/sysdeps/i386/tls.h
+++ b/libpthread/nptl/sysdeps/i386/tls.h
@@ -232,7 +232,7 @@ union user_desc_init
      _segdescr.vals[3] = 0x51;						      \
 									      \
      /* Install the TLS.  */						      \
-     __asm__ volatile (TLS_LOAD_EBX						  \
+     __asm__ __volatile__ (TLS_LOAD_EBX						  \
 		   "int $0x80\n\t"					      \
 		   TLS_LOAD_EBX						      \
 		   : "=a" (_result), "=m" (_segdescr.desc.entry_number)	      \
@@ -262,7 +262,7 @@ union user_desc_init
 
 /* Return the thread descriptor for the current thread.
 
-   The contained asm must *not* be marked volatile since otherwise
+   The contained asm must *not* be marked __volatile__ since otherwise
    assignments like
         pthread_descr self = thread_self();
    do not get optimized away.  */
@@ -282,11 +282,11 @@ union user_desc_init
 # define THREAD_GETMEM(descr, member) \
   ({ __typeof (descr->member) __value;					      \
      if (sizeof (__value) == 1)						      \
-       __asm__ volatile ("movb %%gs:%P2,%b0"				    \
+       __asm__ __volatile__ ("movb %%gs:%P2,%b0"				    \
 		     : "=q" (__value)					      \
 		     : "0" (0), "i" (offsetof (struct pthread, member)));     \
      else if (sizeof (__value) == 4)					      \
-       __asm__ volatile ("movl %%gs:%P1,%0"					    \
+       __asm__ __volatile__ ("movl %%gs:%P1,%0"					    \
 		     : "=r" (__value)					      \
 		     : "i" (offsetof (struct pthread, member)));	      \
      else								      \
@@ -296,7 +296,7 @@ union user_desc_init
 	      4 or 8.  */						      \
 	   abort ();							      \
 									      \
-	 __asm__ volatile ("movl %%gs:%P1,%%eax\n\t"			      \
+	 __asm__ __volatile__ ("movl %%gs:%P1,%%eax\n\t"			      \
 		       "movl %%gs:%P2,%%edx"				      \
 		       : "=A" (__value)					      \
 		       : "i" (offsetof (struct pthread, member)),	      \
@@ -309,12 +309,12 @@ union user_desc_init
 # define THREAD_GETMEM_NC(descr, member, idx) \
   ({ __typeof (descr->member[0]) __value;				      \
      if (sizeof (__value) == 1)						      \
-       __asm__ volatile ("movb %%gs:%P2(%3),%b0"				      \
+       __asm__ __volatile__ ("movb %%gs:%P2(%3),%b0"				      \
 		     : "=q" (__value)					      \
 		     : "0" (0), "i" (offsetof (struct pthread, member[0])),   \
 		     "r" (idx));					      \
      else if (sizeof (__value) == 4)					      \
-       __asm__ volatile ("movl %%gs:%P1(,%2,4),%0"				      \
+       __asm__ __volatile__ ("movl %%gs:%P1(,%2,4),%0"				      \
 		     : "=r" (__value)					      \
 		     : "i" (offsetof (struct pthread, member[0])),	      \
 		       "r" (idx));					      \
@@ -325,7 +325,7 @@ union user_desc_init
 	      4 or 8.  */						      \
 	   abort ();							      \
 									      \
-	 __asm__ volatile  ("movl %%gs:%P1(,%2,8),%%eax\n\t"		      \
+	 __asm__ __volatile__  ("movl %%gs:%P1(,%2,8),%%eax\n\t"		      \
 			"movl %%gs:4+%P1(,%2,8),%%edx"			      \
 			: "=&A" (__value)				      \
 			: "i" (offsetof (struct pthread, member[0])),	      \
@@ -337,11 +337,11 @@ union user_desc_init
 /* Same as THREAD_SETMEM, but the member offset can be non-constant.  */
 # define THREAD_SETMEM(descr, member, value) \
   ({ if (sizeof (descr->member) == 1)					      \
-       __asm__ volatile ("movb %b0,%%gs:%P1" :				      \
+       __asm__ __volatile__ ("movb %b0,%%gs:%P1" :				      \
 		     : "iq" (value),					      \
 		       "i" (offsetof (struct pthread, member)));	      \
      else if (sizeof (descr->member) == 4)				      \
-       __asm__ volatile ("movl %0,%%gs:%P1" :				      \
+       __asm__ __volatile__ ("movl %0,%%gs:%P1" :				      \
 		     : "ir" (value),					      \
 		       "i" (offsetof (struct pthread, member)));	      \
      else								      \
@@ -351,7 +351,7 @@ union user_desc_init
 	      4 or 8.  */						      \
 	   abort ();							      \
 									      \
-	 __asm__ volatile ("movl %%eax,%%gs:%P1\n\t"			      \
+	 __asm__ __volatile__ ("movl %%eax,%%gs:%P1\n\t"			      \
 		       "movl %%edx,%%gs:%P2" :				      \
 		       : "A" (value),					      \
 			 "i" (offsetof (struct pthread, member)),	      \
@@ -362,12 +362,12 @@ union user_desc_init
 /* Set member of the thread descriptor directly.  */
 # define THREAD_SETMEM_NC(descr, member, idx, value) \
   ({ if (sizeof (descr->member[0]) == 1)				      \
-       __asm__ volatile ("movb %b0,%%gs:%P1(%2)" :				      \
+       __asm__ __volatile__ ("movb %b0,%%gs:%P1(%2)" :				      \
 		     : "iq" (value),					      \
 		       "i" (offsetof (struct pthread, member)),		      \
 		       "r" (idx));					      \
      else if (sizeof (descr->member[0]) == 4)				      \
-       __asm__ volatile ("movl %0,%%gs:%P1(,%2,4)" :			      \
+       __asm__ __volatile__ ("movl %0,%%gs:%P1(,%2,4)" :			      \
 		     : "ir" (value),					      \
 		       "i" (offsetof (struct pthread, member)),		      \
 		       "r" (idx));					      \
@@ -378,7 +378,7 @@ union user_desc_init
 	      4 or 8.  */						      \
 	   abort ();							      \
 									      \
-	 __asm__ volatile ("movl %%eax,%%gs:%P1(,%2,8)\n\t"			      \
+	 __asm__ __volatile__ ("movl %%eax,%%gs:%P1(,%2,8)\n\t"			      \
 		       "movl %%edx,%%gs:4+%P1(,%2,8)" :			      \
 		       : "A" (value),					      \
 			 "i" (offsetof (struct pthread, member)),	      \
@@ -391,7 +391,7 @@ union user_desc_init
   (