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authorVineet Gupta <vgupta@synopsys.com>2013-12-13 14:49:20 +0530
committerBernhard Reutner-Fischer <rep.dot.nop@gmail.com>2013-12-23 12:58:46 +0100
commitc7c5cfdbe803ff0e77f8cded764361ae0803b710 (patch)
tree8a62f8d2510fac7ca9244ac0a880395180a2ee7b
parent1cf1b611788a34e65bbc14eb2ff0e5a243fa6045 (diff)
elf: Add ARC Magic and Relocations
Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
-rw-r--r--include/elf.h59
1 files changed, 59 insertions, 0 deletions
diff --git a/include/elf.h b/include/elf.h
index cbb4da218..3bddcdcca 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -259,6 +259,7 @@ typedef struct
#define EM_PJ 91 /* picoJava */
#define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */
#define EM_ARC_A5 93 /* ARC Cores Tangent-A5 */
+#define EM_ARCOMPACT 93 /* ARCompact ISA based Cores: ARC 700 */
#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */
#define EM_IP2K 101 /* Ubicom IP2022 micro controller */
#define EM_CR 103 /* National Semiconductor CompactRISC */
@@ -3189,6 +3190,64 @@ typedef Elf32_Addr Elf32_Conflict;
#define R_METAG_TLS_DTPMOD 57
#define R_METAG_TLS_DTPOFF 58
+/* ARCompact specific relocs */
+#define R_ARC_NONE 0x0
+#define R_ARC_8 0x1
+#define R_ARC_16 0x2
+#define R_ARC_24 0x3
+#define R_ARC_32 0x4
+#define R_ARC_B26 0x5
+#define R_ARC_B22_PCREL 0x6
+#define R_ARC_H30 0x7
+#define R_ARC_N8 0x8
+#define R_ARC_N16 0x9
+#define R_ARC_N24 0xA
+#define R_ARC_N32 0xB
+#define R_ARC_SDA 0xC
+#define R_ARC_SECTOFF 0xD
+#define R_ARC_S21H_PCREL 0xE
+#define R_ARC_S21W_PCREL 0xF
+#define R_ARC_S25H_PCREL 0x10
+#define R_ARC_S25W_PCREL 0x11
+#define R_ARC_SDA32 0x12
+#define R_ARC_SDA_LDST 0x13
+#define R_ARC_SDA_LDST1 0x14
+#define R_ARC_SDA_LDST2 0x15
+#define R_ARC_SDA16_LD 0x16
+#define R_ARC_SDA16_LD1 0x17
+#define R_ARC_SDA16_LD2 0x18
+#define R_ARC_S13_PCREL 0x19
+#define R_ARC_W 0x1A
+#define R_ARC_32_ME 0x1B
+#define R_ARC_N32_ME 0x1C
+#define R_ARC_SECTOFF_ME 0x1D
+#define R_ARC_SDA32_ME 0x1E
+#define R_ARC_W_ME 0x1F
+#define R_ARC_H30_ME 0x20
+#define R_ARC_SECTOFF_U8 0x21
+#define R_ARC_SECTOFF_S9 0x22
+#define R_AC_SECTOFF_U8 0x23
+#define R_AC_SECTOFF_U8_1 0x24
+#define R_AC_SECTOFF_U8_2 0x25
+#define R_AC_SECTOFF_S9 0x26
+#define R_AC_SECTOFF_S9_1 0x27
+#define R_AC_SECTOFF_S9_2 0x28
+#define R_ARC_SECTOFF_ME_1 0x29
+#define R_ARC_SECTOFF_ME_2 0x2A
+#define R_ARC_SECTOFF_1 0x2B
+#define R_ARC_SECTOFF_2 0x2C
+#define R_ARC_PC32 0x32
+#define R_ARC_GOTPC32 0x33
+#define R_ARC_PLT32 0x34
+#define R_ARC_COPY 0x35
+#define R_ARC_GLOB_DAT 0x36
+#define R_ARC_JMP_SLOT 0x37
+#define R_ARC_RELATIVE 0x38
+#define R_ARC_GOTOFF 0x39
+#define R_ARC_GOTPC 0x3A
+#define R_ARC_GOT32 0x3B
+#define R_ARC_NUM 0x3C
+
#ifdef __cplusplus
}
#endif