Pete Popov writes:

Hi Erik,

I'm not sure why the NIOS support is not in uClibc -- perhaps the patch
was rejected or never submitted? In any case, I'm playing with some NIOS
stuff and created this patch against 0.9.26. The work was done by
Microtronix. I'm not sure who else contributed to it. It would be great
to have the NIOS support available in uClibc so developers don't have to
go searching for these bits.

Pete

66 files changed, 4601 insertions, 1 deletions

diff --git a/extra/Configs/Config.in b/extra/Configs/Config.in
index b61a1ebfd..b1624dafd 100644
--- a/extra/Configs/Config.in
+++ b/extra/Configs/Config.in
@@ -44,6 +44,12 @@ config TARGET_microblaze
 config TARGET_mips
 	bool "mips"
 
+config TARGET_nios
+	bool "nios"
+
+config TARGET_nios2
+	bool "nios2"
+
 config TARGET_powerpc
 	bool "powerpc"
 
@@ -97,6 +103,14 @@ if TARGET_m68k
 source "extra/Configs/Config.m68k"
 endif
 
+if TARGET_nios
+source "extra/Configs/Config.nios"
+endif
+
+if TARGET_nios2
+source "extra/Configs/Config.nios2"
+endif
+
 if TARGET_microblaze
 source "extra/Configs/Config.microblaze"
 endif
diff --git a/extra/Configs/Config.nios b/extra/Configs/Config.nios
new file mode 100644
index 000000000..10a5f0a20
--- /dev/null
+++ b/extra/Configs/Config.nios
@@ -0,0 +1,31 @@
+#
+# For a description of the syntax of this configuration file,
+# see extra/config/Kconfig-language.txt
+#
+
+config TARGET_ARCH
+	default "nios"
+
+config HAVE_ELF
+	bool
+	select ARCH_HAS_NO_MMU
+	select ARCH_LITTLE_ENDIAN
+	select HAVE_NO_PIC
+	select HAVE_NO_SHARED
+	select ARCH_HAS_NO_LDSO
+	default y
+
+config ARCH_CFLAGS
+	string
+	default "-m32 -funaligned-struct-hack"
+
+config ARCH_LDFLAGS
+	string
+
+config LIBGCC_CFLAGS
+	string
+
+config CROSS
+        string
+	default nios-elf-
+
diff --git a/extra/Configs/Config.nios2 b/extra/Configs/Config.nios2
new file mode 100644
index 000000000..cc7caf17d
--- /dev/null
+++ b/extra/Configs/Config.nios2
@@ -0,0 +1,30 @@
+#
+# For a description of the syntax of this configuration file,
+# see extra/config/Kconfig-language.txt
+#
+
+config TARGET_ARCH
+	default "nios2"
+
+config HAVE_ELF
+	bool
+	select ARCH_HAS_NO_MMU
+	select ARCH_LITTLE_ENDIAN
+	select HAVE_NO_PIC
+	select HAVE_NO_SHARED
+	select ARCH_HAS_NO_LDSO
+	default y
+
+config ARCH_CFLAGS
+	string
+
+config ARCH_LDFLAGS
+	string
+
+config LIBGCC_CFLAGS
+	string
+
+config CROSS
+    string
+	default nios2-elf-
+
diff --git a/include/elf.h b/include/elf.h
index 7ce1b398e..75042ca94 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -258,6 +258,8 @@ typedef struct
 #define EM_CYGNUS_FRV	0x5441
 
 #define EM_ALPHA	0x9026
+#define EM_NIOS32	0xfebb		/* Altera Nios 32 */
+#define EM_ALTERA_NIOS2  0x9ee5	/* Altera Nios II */
 
 /* V850 backend magic number.  Written in the absense of an ABI.  */
 #define EM_CYGNUS_V850 0x9080
@@ -2554,6 +2556,56 @@ typedef Elf32_Addr Elf32_Conflict;
 #define R_H8_ABS32     65
 #define R_H8_ABS32A16 127
 
+/* Altera NIOS specific definitions.  */
+
+/* NIOS relocations. */
+#define R_NIOS_NONE				0
+#define R_NIOS_32				1	/* A 32 bit absolute relocation.*/
+#define R_NIOS_LO16_LO5			2	/* A LO-16 5 bit absolute relocation.  */
+#define R_NIOS_LO16_HI11		3	/* A LO-16 top 11 bit absolute relocation.  */
+#define R_NIOS_HI16_LO5			4	/* A HI-16 5 bit absolute relocation.  */
+#define R_NIOS_HI16_HI11		5	/* A HI-16 top 11 bit absolute relocation.  */
+#define R_NIOS_PCREL6			6	/* A 6 bit relative relocation.  */
+#define R_NIOS_PCREL8			7	/* An 8 bit relative relocation.  */
+#define R_NIOS_PCREL11			8	/* An 11 bit relative relocation.  */
+#define R_NIOS_16				9	/* A 16 bit absolute relocation.  */
+#define R_NIOS_H_LO5			10	/* Low 5-bits of absolute relocation in halfwords.  */
+#define R_NIOS_H_HI11			11	/* Top 11 bits of 16-bit absolute relocation in halfwords.  */
+#define R_NIOS_H_XLO5			12	/* Low 5 bits of top 16-bits of 32-bit absolute relocation in halfwords.  */
+#define R_NIOS_H_XHI11			13	/* Top 11 bits of top 16-bits of 32-bit absolute relocation in halfwords.  */
+#define R_NIOS_H_16				14	/* Half-word @h value */
+#define R_NIOS_H_32				15	/* Word @h value */
+#define R_NIOS_GNU_VTINHERIT	200	/* GNU extension to record C++ vtable hierarchy */
+#define R_NIOS_GNU_VTENTRY		201	/* GNU extension to record C++ vtable member usage */
+/* Keep this the last entry.  */
+#define R_NIOS_NUM				202
+
+/* NIOS II relocations */
+#define R_NIOS2_NONE			0
+#define R_NIOS2_S16				1
+#define R_NIOS2_U16				2
+#define R_NIOS2_PCREL16			3
+#define R_NIOS2_CALL26			4
+#define R_NIOS2_IMM5			5
+#define R_NIOS2_CACHE_OPX 		6
+#define R_NIOS2_IMM6			7
+#define R_NIOS2_IMM8			8
+#define R_NIOS2_HI16			9
+#define R_NIOS2_LO16			10
+#define R_NIOS2_HIADJ16 		11
+#define R_NIOS2_BFD_RELOC_32	12
+#define R_NIOS2_BFD_RELOC_16	13
+#define R_NIOS2_BFD_RELOC_8 	14
+#define R_NIOS2_GPREL			15
+#define R_NIOS2_GNU_VTINHERIT 	16
+#define R_NIOS2_GNU_VTENTRY  	17
+#define R_NIOS2_UJMP			18
+#define R_NIOS2_CJMP			19
+#define R_NIOS2_CALLR			20
+#define R_NIOS2_ALIGN			21
+/* Keep this the last entry.  */
+#define R_NIOS2_NUM				22
+
 __END_DECLS
 
 #endif	/* elf.h */
diff --git a/libc/sysdeps/linux/Makefile b/libc/sysdeps/linux/Makefile
index a95dd67ea..9aa585eec 100644
--- a/libc/sysdeps/linux/Makefile
+++ b/libc/sysdeps/linux/Makefile
@@ -19,7 +19,7 @@
 TOPDIR=../../../
 include $(TOPDIR)Rules.mak
 
-ALL_SUBDIRS = arm common cris h8300 i386 m68k mips powerpc sh sh64 sparc v850
+ALL_SUBDIRS = arm common cris h8300 i386 m68k mips nios nios2 powerpc sh sh64 sparc v850
 
 all: common $(TARGET_ARCH)
 
diff --git a/libc/sysdeps/linux/nios/Makefile b/libc/sysdeps/linux/nios/Makefile
new file mode 100644
index 000000000..ea56738dc
--- /dev/null
+++ b/libc/sysdeps/linux/nios/Makefile
@@ -0,0 +1,86 @@
+# Makefile for uClibc
+#
+# Copyright (C) 2000-2003 Erik Andersen <andersen@uclibc.org>
+#
+# This program is free software; you can redistribute it and/or modify it under
+# the terms of the GNU Library General Public License as published by the Free
+# Software Foundation; either version 2 of the License, or (at your option) any
+# later version.
+#
+# This program is distributed in the hope that it will be useful, but WITHOUT
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+# FOR A PARTICULAR PURPOSE. See the GNU Library General Public License for more
+# details.
+#
+# You should have received a copy of the GNU Library General Public License
+# along with this program; if not, write to the Free Software Foundation, Inc.,
+# 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+
+TOPDIR=../../../../
+include $(TOPDIR)Rules.mak
+ASFLAGS=$(CFLAGS)
+
+CRT0_SRC = crt0.S
+CRT0_OBJ = crt0.o crt1.o
+CTOR_TARGETS=
+
+SSRC= __longjmp.S bsd-_setjmp.S bsd-setjmp.S setjmp.S clone.S vfork.S
+SOBJS=$(patsubst %.S,%.o, $(SSRC))
+
+CSRC= brk.c crtbegin.c crtend.c
+COBJS=$(patsubst %.c,%.o, $(CSRC))
+
+OBJS=$(SOBJS) $(MOBJ) $(COBJS)
+
+all: $(OBJS) $(LIBC)
+
+$(LIBC): ar-target 
+
+ar-target: $(OBJS) $(CRT0_OBJ) $(CTOR_TARGETS)
+	$(AR) $(ARFLAGS) $(LIBC) $(OBJS)
+	cp $(CRT0_OBJ) $(TOPDIR)lib/
+
+$(CRT0_OBJ): $(CRT0_SRC)
+	$(CC) $(CFLAGS) -DL_$* $< -c -o $*.o
+	$(STRIPTOOL) -x -R .note -R .comment $*.o
+
+$(SOBJS): %.o : %.S
+	$(CC) $(CFLAGS) -c $< -o $@
+	$(STRIPTOOL) -x -R .note -R .comment $*.o
+
+$(COBJS): %.o : %.c
+	$(CC) $(CFLAGS) -c $< -o $@
+	$(STRIPTOOL) -x -R .note -R .comment $*.o
+
+ifeq ($(strip $(UCLIBC_CTOR_DTOR)),y)
+crti.o: crti.S
+	$(CC) $(CFLAGS) -c crti.S -o crti.o
+
+$(TOPDIR)lib/crti.o: crti.o
+	$(INSTALL) -d $(TOPDIR)lib/
+	cp crti.o $(TOPDIR)lib/
+
+crtn.o: crtn.S
+	$(CC) $(CFLAGS) -c crtn.S -o crtn.o
+
+$(TOPDIR)lib/crtn.o: crtn.o
+	$(INSTALL) -d $(TOPDIR)lib/
+	cp crtn.o $(TOPDIR)lib/
+else
+$(TOPDIR)lib/crti.o:
+	$(INSTALL) -d $(TOPDIR)lib/
+	$(AR) $(ARFLAGS) $(TOPDIR)lib/crti.o
+$(TOPDIR)lib/crtn.o:
+	$(INSTALL) -d $(TOPDIR)lib/
+	$(AR) $(ARFLAGS) $(TOPDIR)lib/crtn.o
+endif
+
+
+headers:
+	$(LN) -fs ../libc/sysdeps/linux/nios/fpu_control.h $(TOPDIR)/include/
+
+clean:
+	$(RM) *.[oa] *~ core
+	$(RM) bits/sysnum.h
+	$(RM) $(TOPDIR)/include/fpu_control.h
+	
diff --git a/libc/sysdeps/linux/nios/NM_Macros.S b/libc/sysdeps/linux/nios/NM_Macros.S
new file mode 100644
index 000000000..da6136593
--- /dev/null
+++ b/libc/sysdeps/linux/nios/NM_Macros.S
@@ -0,0 +1,473 @@
+
+;------------------------------
+; Macros I: Faux Instructions
+;
+; The following "faux instructions" are
+; implemented here as macros:
+;
+; MOVIP register,constant		MOVI with optional PFX & MOVHI, or BGEN
+; ADDIP register,constant		PFX and ADDI with optional PFX
+; SUBIP register,constant		PFX and SUBI with optional PFX
+; CMPIP register,constant		PFX and CMPI with optional PFX
+;
+; MOVI16 register,constant		PFX and MOVI
+; MOVI32 register,constant		PFX, MOVI, PFX, and MOVHI
+; MOVIA  register,constant		PFX and MOVHI on Nios32, and PFX and MOVI
+;
+; ANDIP register,constant		PFX and ANDI
+; ANDNIP register,constant		PFX and ANDN
+; ORIP register,constant		PFX and ORI
+; XORIP register,constant		PFX and XORI
+;
+; _BSR address						MOVIP address to %g7, and CALL
+; _BR address						MOVIP address to %g7, and JMP
+;
+; BEQ address						SKPS cc_nz and BR, has delay slot
+; BNE address						SKPS cc_z and BR, has delay slot
+; BLE address						SKPS cc_gt and BR, has delay slot
+; BLT address						SKPS cc_ge and BR, has delay slot
+; RESTRET							RESTORE and JMP %i7 
+;
+;-------------------------------
+; Macros II: Printing
+;
+; These macros are guaranteed *not*
+; to have branch delay slot after them.
+;
+; NM_PrintChar char
+; NM_Print "string"
+; NM_PrintLn "string"			Follows it with a carriage return
+; NM_PrintRegister reg			For debugging, prints register name & value
+;
+;-------------------------------
+; Macros III: Inline Debugging
+;
+; These macros print various information
+; using large sections of expanded inline code.
+; They each use either few or no registers.
+; Thus, they may be safely used in interrupt handlers.
+;
+; NM_D_TxChar char			print char to UART, affects no registers
+; NM_D_TxRegister char,char,register	prints the two characters, and the hex register value
+
+; --------------------------------------
+
+
+		.macro	_pfx_op	OP,reg,val,pForce=0
+		.if		(\pForce) || ((\val) > (31)) || ((\val) < (0))
+		PFX		%hi(\val)
+		.endif
+		\OP		\reg,%lo(\val)
+		.endm
+
+		.macro	_bgen reg,val,bit
+		.if ((\val)==(1<<\bit))
+		BGEN	\reg,\bit
+		.equ	_bgenBit,1
+		.endif
+		.endm
+
+	;------------------------
+	; MOVIP %reg,32-bit-value
+		.macro	MOVIP reg,val
+		; Methodically test every BGEN possibility...
+		.equ	_bgenBit,0
+.if 1
+		_bgen \reg,\val,0
+		_bgen \reg,\val,1
+		_bgen \reg,\val,2
+		_bgen \reg,\val,3
+		_bgen \reg,\val,4
+		_bgen \reg,\val,5
+		_bgen \reg,\val,6
+		_bgen \reg,\val,7
+		_bgen \reg,\val,8
+		_bgen \reg,\val,9
+		_bgen \reg,\val,10
+		_bgen \reg,\val,11
+		_bgen \reg,\val,12
+		_bgen \reg,\val,13
+		_bgen \reg,\val,14
+		_bgen \reg,\val,15
+		_bgen \reg,\val,16
+		_bgen \reg,\val,17
+		_bgen \reg,\val,18
+		_bgen \reg,\val,19
+		_bgen \reg,\val,20
+		_bgen \reg,\val,21
+		_bgen \reg,\val,22
+		_bgen \reg,\val,23
+		_bgen \reg,\val,24
+		_bgen \reg,\val,25
+		_bgen \reg,\val,26
+		_bgen \reg,\val,27
+		_bgen \reg,\val,28
+		_bgen \reg,\val,29
+		_bgen \reg,\val,30
+		_bgen \reg,\val,31
+
+		; If no bgen fit...
+.endif
+		.if !_bgenBit
+			.if ((\val) & 0xFFE0)
+				PFX %hi(\val)
+			.endif
+			MOVI \reg,%lo(\val)
+			.if __nios32__
+				.if ((\val) & 0xffff0000)
+					.if ((\val) & 0xFFE00000)
+						PFX %xhi(\val)
+					.endif
+					MOVHI \reg,%xlo(\val)
+				.endif
+			.endif
+		.endif
+
+		.endm
+
+	; ADDIP %reg,16-bit-value
+		.macro	ADDIP reg,val
+		_pfx_op	ADDI,\reg,\val
+		.endm
+
+	; SUBIP %reg,16-bit-value
+		.macro	SUBIP reg,val
+		_pfx_op	SUBI,\reg,\val
+		.endm
+
+	; CMPIP %reg,16-bit-value
+		.macro	CMPIP reg,val
+		_pfx_op	CMPI,\reg,\val
+		.endm
+
+	; ANDIP %reg,16-bit-value
+		.macro	ANDIP reg,val
+		PFX		%hi(\val)
+		AND		\reg,%lo(\val)
+		.endm
+
+	; ANDNIP %reg,16-bit-value
+		.macro	ANDNIP reg,val
+		PFX		%hi(\val)
+		ANDN		\reg,%lo(\val)
+		.endm
+
+	; ORIP %reg,16-bit-value
+		.macro	ORIP reg,val
+		PFX		%hi(\val)
+		OR			\reg,%lo(\val)
+		.endm
+
+	; XORIP %reg,16-bit-value
+		.macro	XORIP reg,val
+		PFX		%hi(\val)
+		XOR		\reg,%lo(\val)
+		.endm
+
+	; BEQ addr
+		.macro	BEQ addr
+		IFS		cc_eq
+		BR			\addr
+		.endm
+
+	; BNE addr
+		.macro	BNE addr
+		IFS		cc_ne
+		BR			\addr
+		.endm
+
+	; BLE addr
+		.macro	BLE addr
+		SKPS		cc_gt
+		BR			\addr
+		.endm
+
+	; BLT addr
+		.macro	BLT addr
+		SKPS		cc_ge
+		BR			\addr
+		.endm
+
+		.macro	digitToChar reg
+		ANDIP	\reg,0x000f
+		CMPI	\reg,10
+		SKPS	cc_lt
+		ADDI	\reg,'A'-'0'-10
+		PFX		%hi('0')
+		ADDI	\reg,%lo('0')
+		.endm
+
+; PUSHRET == dec sp, and stash return addr
+	.macro	PUSHRET
+	SUBI		%sp,2
+	ST			[%sp],%o7
+	.endm
+; POPRET == pop and jump
+	.macro	POPRET
+	LD			%o7,[%sp]
+	JMP		%o7
+	ADDI		%sp,2		; branch delay slot
+	.endm
+
+; RESTRET = restore & return
+	.macro	RESTRET
+	JMP		%i7
+	RESTORE
+	.endm
+
+	;--------------------
+	; MOVI16 %reg,Address
+	;
+	.macro	MOVI16	reg,val
+	PFX	%hi(\val)
+	MOVI	\reg,%lo(\val)
+	.endm
+
+	;--------------------
+	; MOVI32 %reg,Address
+	;
+	.macro	MOVI32	reg,val
+	PFX	%hi(\val)
+	MOVI	\reg,%lo(\val)
+	PFX	%xhi(\val)
+	MOVHI	\reg,%xlo(\val)
+	.endm
+
+	;--------------------
+	; MOVIA %reg,Address
+	;
+	.macro	MOVIA		reg,val
+	.if __nios32__
+		MOVI32 \reg,\val
+	.else
+		MOVI16 \reg,\val
+	.endif
+	.endm
+
+	;--------------------
+	; _BR
+
+	.macro _BR target,viaRegister=%g7
+	MOVIA	\viaRegister,\target@h
+	JMP	\viaRegister
+	.endm
+
+	;--------------------
+	; _BSR
+
+	.macro _BSR target,viaRegister=%g7
+	MOVIA	\viaRegister,\target@h
+	CALL	\viaRegister
+	.endm
+
+	;---------------------
+	; NM_Print "Your String Here"
+	;
+	.macro	NM_Print	string
+
+	BR		pastStringData\@
+	NOP
+
+stringData\@:
+	.asciz	"\string"
+	.align 1		; aligns by 2^n
+pastStringData\@:
+	MOVIA		%o0,stringData\@
+	_BSR		NR_TxString
+	NOP
+	.endm
+
+	.macro	NM_PrintLn string
+	NM_Print	"\string"
+	_BSR		NR_TxCR
+	NOP
+	.endm
+
+	.macro	NM_PrintRegister reg	; affects %g0 & %g1 & %g7, but thrashes the CWP a bit
+	SAVE		%sp,-16
+	NM_Print	"\reg = "
+	RESTORE
+	MOV		%g0,\reg
+	SAVE		%sp,-16
+	MOV		%o0,%g0
+	_BSR		NR_TxHex
+	NOP
+	_BSR		NR_TxCR
+	NOP
+	RESTORE
+	.endm
+
+	.macro	NM_PrintChar char
+	MOVIP		%o0,\char
+	_BSR		NR_TxChar
+	NOP
+	.endm
+
+	.macro	NM_Print2Chars char1,char2
+	MOVIP		%o0,(\char2<<8)+\char1
+	_BSR		NR_TxChar
+	NOP
+	_BSR		NR_TxChar
+	LSRI		%o0,8
+	.endm
+
+
+
+; ---------------------------
+; Completely inline UART sends
+; Send the char, or %g7 if not there.
+; Trashes %g5 and %g6 and %g7...
+
+	.macro	NM_TxChar char=0
+;NM_D_Delay 1000
+	MOVIA	%g6,NA_UARTBase
+txCharLoop\@:
+	PFX	2
+.if \char
+	LD	%g7,[%g6]
+	SKP1	%g7,6
+.else
+	LD	%g5,[%g6]
+	SKP1	%g5,6
+.endif
+	BR	txCharLoop\@
+	NOP
+.if \char
+	MOVIP	%g7,\char
+.endif
+	PFX	1
+	ST	[%g6],%g7
+;NM_D