diff options
Diffstat (limited to 'toolchain/gcc/patches/8.3.0/j2.patch')
| -rw-r--r-- | toolchain/gcc/patches/8.3.0/j2.patch | 343 |
1 files changed, 0 insertions, 343 deletions
diff --git a/toolchain/gcc/patches/8.3.0/j2.patch b/toolchain/gcc/patches/8.3.0/j2.patch deleted file mode 100644 index aafbe0ea9..000000000 --- a/toolchain/gcc/patches/8.3.0/j2.patch +++ /dev/null @@ -1,343 +0,0 @@ -diff -Nur gcc-7.3.0.orig/gcc/config/sh/sh-protos.h gcc-7.3.0/gcc/config/sh/sh-protos.h ---- gcc-7.3.0.orig/gcc/config/sh/sh-protos.h 2017-01-01 13:07:43.000000000 +0100 -+++ gcc-7.3.0/gcc/config/sh/sh-protos.h 2018-06-03 02:20:50.000000000 +0200 -@@ -35,6 +35,9 @@ - SFUNC_STATIC - }; - -+#define TARGET_ATOMIC_HARD_CAS \ -+ (selected_atomic_model ().type == sh_atomic_model::hard_cas) -+ - #ifdef RTX_CODE - extern rtx sh_fsca_sf2int (void); - extern rtx sh_fsca_int2sf (void); -diff -Nur gcc-7.3.0.orig/gcc/config/sh/sh.c gcc-7.3.0/gcc/config/sh/sh.c ---- gcc-7.3.0.orig/gcc/config/sh/sh.c 2017-04-04 00:30:56.000000000 +0200 -+++ gcc-7.3.0/gcc/config/sh/sh.c 2018-06-03 02:20:50.000000000 +0200 -@@ -662,6 +662,7 @@ - model_names[sh_atomic_model::hard_llcs] = "hard-llcs"; - model_names[sh_atomic_model::soft_tcb] = "soft-tcb"; - model_names[sh_atomic_model::soft_imask] = "soft-imask"; -+ model_names[sh_atomic_model::hard_cas] = "hard-cas"; - - const char* model_cdef_names[sh_atomic_model::num_models]; - model_cdef_names[sh_atomic_model::none] = "NONE"; -@@ -669,6 +670,7 @@ - model_cdef_names[sh_atomic_model::hard_llcs] = "HARD_LLCS"; - model_cdef_names[sh_atomic_model::soft_tcb] = "SOFT_TCB"; - model_cdef_names[sh_atomic_model::soft_imask] = "SOFT_IMASK"; -+ model_cdef_names[sh_atomic_model::hard_cas] = "HARD_CAS"; - - sh_atomic_model ret; - ret.type = sh_atomic_model::none; -@@ -747,6 +749,9 @@ - if (ret.type == sh_atomic_model::soft_imask && TARGET_USERMODE) - err_ret ("cannot use atomic model %s in user mode", ret.name); - -+ if (ret.type == sh_atomic_model::hard_cas && !TARGET_SHJ2) -+ err_ret ("atomic model %s is only available J2 targets", ret.name); -+ - return ret; - - #undef err_ret -@@ -803,6 +808,8 @@ - sh_cpu = PROCESSOR_SH2E; - if (TARGET_SH2A) - sh_cpu = PROCESSOR_SH2A; -+ if (TARGET_SHJ2) -+ sh_cpu = PROCESSOR_SHJ2; - if (TARGET_SH3) - sh_cpu = PROCESSOR_SH3; - if (TARGET_SH3E) -diff -Nur gcc-7.3.0.orig/gcc/config/sh/sh.h gcc-7.3.0/gcc/config/sh/sh.h ---- gcc-7.3.0.orig/gcc/config/sh/sh.h 2017-01-01 13:07:43.000000000 +0100 -+++ gcc-7.3.0/gcc/config/sh/sh.h 2018-06-03 02:20:50.000000000 +0200 -@@ -83,6 +83,7 @@ - #define SUPPORT_SH4_SINGLE 1 - #define SUPPORT_SH2A 1 - #define SUPPORT_SH2A_SINGLE 1 -+#define SUPPORT_SHJ2 1 - #endif - - #define TARGET_DIVIDE_CALL_DIV1 (sh_div_strategy == SH_DIV_CALL_DIV1) -@@ -115,6 +116,7 @@ - #define SELECT_SH4A_SINGLE_ONLY (MASK_SH4A | SELECT_SH4_SINGLE_ONLY) - #define SELECT_SH4A (MASK_SH4A | SELECT_SH4) - #define SELECT_SH4A_SINGLE (MASK_SH4A | SELECT_SH4_SINGLE) -+#define SELECT_SHJ2 (MASK_SHJ2 | SELECT_SH2) - - #if SUPPORT_SH1 - #define SUPPORT_SH2 1 -@@ -122,6 +124,7 @@ - #if SUPPORT_SH2 - #define SUPPORT_SH3 1 - #define SUPPORT_SH2A_NOFPU 1 -+#define SUPPORT_SHJ2 1 - #endif - #if SUPPORT_SH3 - #define SUPPORT_SH4_NOFPU 1 -@@ -154,7 +157,7 @@ - #define MASK_ARCH (MASK_SH1 | MASK_SH2 | MASK_SH3 | MASK_SH_E | MASK_SH4 \ - | MASK_HARD_SH2A | MASK_HARD_SH2A_DOUBLE | MASK_SH4A \ - | MASK_HARD_SH4 | MASK_FPU_SINGLE \ -- | MASK_FPU_SINGLE_ONLY) -+ | MASK_FPU_SINGLE_ONLY | MASK_SHJ2) - - /* This defaults us to big-endian. */ - #ifndef TARGET_ENDIAN_DEFAULT -@@ -229,7 +232,8 @@ - %{m2a-single:--isa=sh2a} \ - %{m2a-single-only:--isa=sh2a} \ - %{m2a-nofpu:--isa=sh2a-nofpu} \ --%{m4al:-dsp}" -+%{m4al:-dsp} \ -+%{mj2:-isa=j2}" - - #define ASM_SPEC SH_ASM_SPEC - -@@ -345,6 +349,7 @@ - hard_llcs, - soft_tcb, - soft_imask, -+ hard_cas, - - num_models - }; -@@ -1568,7 +1573,7 @@ - - /* Nonzero if the target supports dynamic shift instructions - like shad and shld. */ --#define TARGET_DYNSHIFT (TARGET_SH3 || TARGET_SH2A) -+#define TARGET_DYNSHIFT (TARGET_SH3 || TARGET_SH2A || TARGET_SHJ2) - - /* The cost of using the dynamic shift insns (shad, shld) are the same - if they are available. If they are not available a library function will -@@ -1833,6 +1838,7 @@ - PROCESSOR_SH2, - PROCESSOR_SH2E, - PROCESSOR_SH2A, -+ PROCESSOR_SHJ2, - PROCESSOR_SH3, - PROCESSOR_SH3E, - PROCESSOR_SH4, -diff -Nur gcc-7.3.0.orig/gcc/config/sh/sh.opt gcc-7.3.0/gcc/config/sh/sh.opt ---- gcc-7.3.0.orig/gcc/config/sh/sh.opt 2017-01-01 13:07:43.000000000 +0100 -+++ gcc-7.3.0/gcc/config/sh/sh.opt 2018-06-03 02:20:50.000000000 +0200 -@@ -65,6 +65,10 @@ - Target RejectNegative Condition(SUPPORT_SH2E) - Generate SH2e code. - -+mj2 -+Target RejectNegative Mask(SHJ2) Condition(SUPPORT_SHJ2) -+Generate J2 code. -+ - m3 - Target RejectNegative Mask(SH3) Condition(SUPPORT_SH3) - Generate SH3 code. -diff -Nur gcc-7.3.0.orig/gcc/config/sh/sync.md gcc-7.3.0/gcc/config/sh/sync.md ---- gcc-7.3.0.orig/gcc/config/sh/sync.md 2017-01-01 13:07:43.000000000 +0100 -+++ gcc-7.3.0/gcc/config/sh/sync.md 2018-06-03 02:20:50.000000000 +0200 -@@ -240,6 +240,9 @@ - || (TARGET_SH4A && <MODE>mode == SImode && !TARGET_ATOMIC_STRICT)) - atomic_insn = gen_atomic_compare_and_swap<mode>_hard (old_val, mem, - exp_val, new_val); -+ else if (TARGET_ATOMIC_HARD_CAS && <MODE>mode == SImode) -+ atomic_insn = gen_atomic_compare_and_swap<mode>_cas (old_val, mem, -+ exp_val, new_val); - else if (TARGET_ATOMIC_SOFT_GUSA) - atomic_insn = gen_atomic_compare_and_swap<mode>_soft_gusa (old_val, mem, - exp_val, new_val); -@@ -306,6 +309,57 @@ - } - [(set_attr "length" "14")]) - -+(define_expand "atomic_compare_and_swapsi_cas" -+ [(set (match_operand:SI 0 "register_operand" "=r") -+ (unspec_volatile:SI -+ [(match_operand:SI 1 "atomic_mem_operand_0" "=Sra") -+ (match_operand:SI 2 "register_operand" "r") -+ (match_operand:SI 3 "register_operand" "r")] -+ UNSPECV_CMPXCHG_1))] -+ "TARGET_ATOMIC_HARD_CAS" -+{ -+ rtx mem = gen_rtx_REG (SImode, 0); -+ emit_move_insn (mem, force_reg (SImode, XEXP (operands[1], 0))); -+ emit_insn (gen_shj2_cas (operands[0], mem, operands[2], operands[3])); -+ DONE; -+}) -+ -+(define_insn "shj2_cas" -+ [(set (match_operand:SI 0 "register_operand" "=&r") -+ (unspec_volatile:SI -+ [(match_operand:SI 1 "register_operand" "=r") -+ (match_operand:SI 2 "register_operand" "r") -+ (match_operand:SI 3 "register_operand" "0")] -+ UNSPECV_CMPXCHG_1)) -+ (set (reg:SI T_REG) -+ (unspec_volatile:SI [(const_int 0)] UNSPECV_CMPXCHG_3))] -+ "TARGET_ATOMIC_HARD_CAS" -+ "cas.l %2,%0,@%1" -+ [(set_attr "length" "2")] -+) -+ -+(define_expand "atomic_compare_and_swapqi_cas" -+ [(set (match_operand:SI 0 "arith_reg_dest" "=&r") -+ (unspec_volatile:SI -+ [(match_operand:SI 1 "atomic_mem_operand_0" "=Sra") -+ (match_operand:SI 2 "arith_operand" "rI08") -+ (match_operand:SI 3 "arith_operand" "rI08")] -+ UNSPECV_CMPXCHG_1))] -+ "TARGET_ATOMIC_HARD_CAS" -+{FAIL;} -+) -+ -+(define_expand "atomic_compare_and_swaphi_cas" -+ [(set (match_operand:SI 0 "arith_reg_dest" "=&r") -+ (unspec_volatile:SI -+ [(match_operand:SI 1 "atomic_mem_operand_0" "=Sra") -+ (match_operand:SI 2 "arith_operand" "rI08") -+ (match_operand:SI 3 "arith_operand" "rI08")] -+ UNSPECV_CMPXCHG_1))] -+ "TARGET_ATOMIC_HARD_CAS" -+{FAIL;} -+) -+ - ;; The QIHImode llcs patterns modify the address register of the memory - ;; operand. In order to express that, we have to open code the memory - ;; operand. Initially the insn is expanded like every other atomic insn -diff -Nur gcc-7.3.0.orig/gcc/config/sh/t-sh gcc-7.3.0/gcc/config/sh/t-sh ---- gcc-7.3.0.orig/gcc/config/sh/t-sh 2017-01-01 13:07:43.000000000 +0100 -+++ gcc-7.3.0/gcc/config/sh/t-sh 2018-06-03 02:20:50.000000000 +0200 -@@ -50,7 +50,8 @@ - m2e,m3e,m4-single-only,m4-100-single-only,m4-200-single-only,m4-300-single-only,m4a-single-only \ - m2a-single,m2a-single-only \ - m4-single,m4-100-single,m4-200-single,m4-300-single,m4a-single \ -- m4,m4-100,m4-200,m4-300,m4a; do \ -+ m4,m4-100,m4-200,m4-300,m4a \ -+ mj2; do \ - subst= ; \ - for lib in `echo $$abi|tr , ' '` ; do \ - if test "`echo $$multilibs|sed s/$$lib//`" != "$$multilibs"; then \ -@@ -63,9 +64,9 @@ - - # SH1 and SH2A support big endian only. - ifeq ($(DEFAULT_ENDIAN),ml) --MULTILIB_EXCEPTIONS = m1 ml/m1 m2a* ml/m2a* $(TM_MULTILIB_EXCEPTIONS_CONFIG) -+MULTILIB_EXCEPTIONS = m1 ml/m1 m2a* ml/m2a* ml/mj2 $(TM_MULTILIB_EXCEPTIONS_CONFIG) - else --MULTILIB_EXCEPTIONS = ml/m1 ml/m2a* $(TM_MULTILIB_EXCEPTIONS_CONFIG) -+MULTILIB_EXCEPTIONS = ml/m1 ml/m2a* ml/mj2 $(TM_MULTILIB_EXCEPTIONS_CONFIG) - endif - - MULTILIB_OSDIRNAMES = \ -@@ -87,7 +88,8 @@ - m4a-single-only=!m4a-single-only $(OTHER_ENDIAN)/m4a-single-only=!$(OTHER_ENDIAN)/m4a-single-only \ - m4a-single=!m4a-single $(OTHER_ENDIAN)/m4a-single=!$(OTHER_ENDIAN)/m4a-single \ - m4a=!m4a $(OTHER_ENDIAN)/m4a=!$(OTHER_ENDIAN)/m4a \ -- m4al=!m4al $(OTHER_ENDIAN)/m4al=!$(OTHER_ENDIAN)/m4al -+ m4al=!m4al $(OTHER_ENDIAN)/m4al=!$(OTHER_ENDIAN)/m4al \ -+ mj2=!j2 - - $(out_object_file): gt-sh.h - gt-sh.h : s-gtype ; @true -diff -Nur gcc-7.3.0.orig/gcc/config.gcc gcc-7.3.0/gcc/config.gcc ---- gcc-7.3.0.orig/gcc/config.gcc 2018-01-08 14:39:11.000000000 +0100 -+++ gcc-7.3.0/gcc/config.gcc 2018-06-03 02:20:50.000000000 +0200 -@@ -474,7 +474,7 @@ - extra_headers="s390intrin.h htmintrin.h htmxlintrin.h vecintrin.h" - ;; - # Note the 'l'; we need to be able to match e.g. "shle" or "shl". --sh[123456789lbe]*-*-* | sh-*-*) -+sh[123456789lbej]*-*-* | sh-*-*) - cpu_type=sh - extra_options="${extra_options} fused-madd.opt" - extra_objs="${extra_objs} sh_treg_combine.o sh-mem.o sh_optimize_sett_clrt.o" -@@ -2664,18 +2664,18 @@ - extra_options="${extra_options} s390/tpf.opt" - tmake_file="${tmake_file} s390/t-s390" - ;; --sh-*-elf* | sh[12346l]*-*-elf* | \ -- sh-*-linux* | sh[2346lbe]*-*-linux* | \ -+sh-*-elf* | sh[12346lj]*-*-elf* | \ -+ sh-*-linux* | sh[2346lbej]*-*-linux* | \ - sh-*-netbsdelf* | shl*-*-netbsdelf*) - tmake_file="${tmake_file} sh/t-sh sh/t-elf" - if test x${with_endian} = x; then - case ${target} in -- sh[1234]*be-*-* | sh[1234]*eb-*-*) with_endian=big ;; -+ sh[j1234]*be-*-* | sh[n1234]*eb-*-*) with_endian=big ;; - shbe-*-* | sheb-*-*) with_endian=big,little ;; - sh[1234]l* | sh[34]*-*-linux*) with_endian=little ;; - shl* | sh*-*-linux* | \ - sh-superh-elf) with_endian=little,big ;; -- sh[1234]*-*-*) with_endian=big ;; -+ sh[j1234]*-*-*) with_endian=big ;; - *) with_endian=big,little ;; - esac - fi -@@ -2742,6 +2742,7 @@ - sh2a_nofpu*) sh_cpu_target=sh2a-nofpu ;; - sh2a*) sh_cpu_target=sh2a ;; - sh2e*) sh_cpu_target=sh2e ;; -+ shj2*) sh_cpu_target=shj2;; - sh2*) sh_cpu_target=sh2 ;; - *) sh_cpu_target=sh1 ;; - esac -@@ -2763,7 +2764,7 @@ - sh2a-single-only | sh2a-single | sh2a-nofpu | sh2a | \ - sh4a-single-only | sh4a-single | sh4a-nofpu | sh4a | sh4al | \ - sh4-single-only | sh4-single | sh4-nofpu | sh4 | sh4-300 | \ -- sh3e | sh3 | sh2e | sh2 | sh1) ;; -+ sh3e | sh3 | sh2e | sh2 | sh1 | shj2) ;; - "") sh_cpu_default=${sh_cpu_target} ;; - *) echo "with_cpu=$with_cpu not supported"; exit 1 ;; - esac -@@ -2772,9 +2773,9 @@ - case ${target} in - sh[1234]*) sh_multilibs=${sh_cpu_target} ;; - sh-superh-*) sh_multilibs=m4,m4-single,m4-single-only,m4-nofpu ;; -- sh*-*-linux*) sh_multilibs=m1,m2,m2a,m3e,m4 ;; -+ sh*-*-linux*) sh_multilibs=m1,m2,m2a,m3e,m4,mj2 ;; - sh*-*-netbsd*) sh_multilibs=m3,m3e,m4 ;; -- *) sh_multilibs=m1,m2,m2e,m4,m4-single,m4-single-only,m2a,m2a-single ;; -+ *) sh_multilibs=m1,m2,m2e,m4,m4-single,m4-single-only,m2a,m2a-single,mj2 ;; - esac - if test x$with_fp = xno; then - sh_multilibs="`echo $sh_multilibs|sed -e s/m4/sh4-nofpu/ -e s/,m4-[^,]*//g -e s/,m[23]e// -e s/m2a,m2a-single/m2a-nofpu/ -e s/m5-..m....,//g`" -@@ -2789,7 +2790,8 @@ - m1 | m2 | m2e | m3 | m3e | \ - m4 | m4-single | m4-single-only | m4-nofpu | m4-300 |\ - m4a | m4a-single | m4a-single-only | m4a-nofpu | m4al | \ -- m2a | m2a-single | m2a-single-only | m2a-nofpu) -+ m2a | m2a-single | m2a-single-only | m2a-nofpu | \ -+ mj2) - # TM_MULTILIB_CONFIG is used by t-sh for the non-endian multilib definition - # It is passed to MULTIILIB_OPTIONS verbatim. - TM_MULTILIB_CONFIG="${TM_MULTILIB_CONFIG}/${sh_multilib}" -@@ -2806,7 +2808,7 @@ - done - TM_MULTILIB_CONFIG=`echo $TM_MULTILIB_CONFIG | sed 's:^/::'` - if test x${enable_incomplete_targets} = xyes ; then -- tm_defines="$tm_defines SUPPORT_SH1=1 SUPPORT_SH2E=1 SUPPORT_SH4=1 SUPPORT_SH4_SINGLE=1 SUPPORT_SH2A=1 SUPPORT_SH2A_SINGLE=1" -+ tm_defines="$tm_defines SUPPORT_SH1=1 SUPPORT_SH2E=1 SUPPORT_SH4=1 SUPPORT_SH4_SINGLE=1 SUPPORT_SH2A=1 SUPPORT_SH2A_SINGLE=1 SUPPORT_SHJ2=1" - fi - tm_file="$tm_file ./sysroot-suffix.h" - tmake_file="$tmake_file t-sysroot-suffix" -@@ -4380,6 +4382,8 @@ - ;; - m4a | m4a-single | m4a-single-only | m4a-nofpu | m4al) - ;; -+ mj2) -+ ;; - *) - echo "Unknown CPU used in --with-cpu=$with_cpu, known values:" 1>&2 - echo "m1 m2 m2e m3 m3e m4 m4-single m4-single-only m4-nofpu" 1>&2 -@@ -4589,7 +4593,7 @@ - tmake_file="rs6000/t-rs6000 ${tmake_file}" - ;; - -- sh[123456ble]*-*-* | sh-*-*) -+ sh[123456blej]*-*-* | sh-*-*) - c_target_objs="${c_target_objs} sh-c.o" - cxx_target_objs="${cxx_target_objs} sh-c.o" - ;; |