diff options
Diffstat (limited to 'toolchain/elf2flt')
15 files changed, 734 insertions, 26 deletions
diff --git a/toolchain/elf2flt/Makefile b/toolchain/elf2flt/Makefile index d1db7c804..8e5fec5a4 100644 --- a/toolchain/elf2flt/Makefile +++ b/toolchain/elf2flt/Makefile @@ -8,23 +8,38 @@ include $(ADK_TOPDIR)/mk/buildhlp.mk ifeq ($(ADK_TOOLCHAIN_BINUTILS_GIT),y) BINUTILS_VERSION:= git +BFDLIB:= .libs/libbfd.a +endif +ifeq ($(ADK_TOOLCHAIN_BINUTILS_2_42),y) +BINUTILS_VERSION:= 2.42 +BFDLIB:= .libs/libbfd.a +endif +ifeq ($(ADK_TOOLCHAIN_BINUTILS_2_41),y) +BINUTILS_VERSION:= 2.41 +BFDLIB:= .libs/libbfd.a +endif +ifeq ($(ADK_TOOLCHAIN_BINUTILS_2_40),y) +BINUTILS_VERSION:= 2.40 +BFDLIB:= libbfd.a endif ifeq ($(ADK_TOOLCHAIN_BINUTILS_2_39),y) BINUTILS_VERSION:= 2.39 +BFDLIB:= libbfd.a endif ifeq ($(ADK_TOOLCHAIN_BINUTILS_2_28),y) BINUTILS_VERSION:= 2.28 +BFDLIB:= libbfd.a endif $(WRKBUILD)/.configured: - (cd $(WRKBUILD); autoreconf -vif;) + (cd $(WRKBUILD); PATH='${HOST_PATH}' autoreconf -vif;) (cd $(WRKBUILD); \ CPPFLAGS="-idirafter $(ADK_TOPDIR)/adk/include" \ ./configure --prefix=$(STAGING_HOST_DIR)/usr \ --target=$(GNU_TARGET_NAME) \ --with-bfd-include-dir=$(TOOLCHAIN_BUILD_DIR)/w-binutils-$(BINUTILS_VERSION)-1/binutils-$(BINUTILS_VERSION)/bfd \ --with-binutils-include-dir=$(TOOLCHAIN_BUILD_DIR)/w-binutils-$(BINUTILS_VERSION)-1/binutils-$(BINUTILS_VERSION)/include \ - --with-libbfd=$(TOOLCHAIN_BUILD_DIR)/w-binutils-$(BINUTILS_VERSION)-1/binutils-$(BINUTILS_VERSION)/bfd/libbfd.a \ + --with-libbfd=$(TOOLCHAIN_BUILD_DIR)/w-binutils-$(BINUTILS_VERSION)-1/binutils-$(BINUTILS_VERSION)/bfd/$(BFDLIB) \ --with-libiberty=$(TOOLCHAIN_BUILD_DIR)/w-binutils-$(BINUTILS_VERSION)-1/binutils-$(BINUTILS_VERSION)/libiberty/libiberty.a ) touch $@ diff --git a/toolchain/elf2flt/Makefile.inc b/toolchain/elf2flt/Makefile.inc index 89c47f367..dee90e037 100644 --- a/toolchain/elf2flt/Makefile.inc +++ b/toolchain/elf2flt/Makefile.inc @@ -2,7 +2,16 @@ # material, please see the LICENCE file in the top-level directory. PKG_NAME:= elf2flt -PKG_VERSION:= v2021.08 +ifeq ($(ADK_TOOLCHAIN_ELF2FLT_2024_02),y) +PKG_VERSION:= v2024.02 PKG_GIT:= tag PKG_RELEASE:= 1 PKG_SITES:= https://github.com/uclinux-dev/elf2flt.git +endif +ifeq ($(ADK_TOOLCHAIN_ELF2FLT_OLD),y) +PKG_VERSION:= 453398f917d167f8c308c8f997270c48ae8f8b12 +PKG_GIT:= hash +PKG_RELEASE:= 1 +PKG_SITES:= https://github.com/uclinux-dev/elf2flt.git +endif +DISTFILES:= $(PKG_NAME)-$(PKG_VERSION).tar.gz diff --git a/toolchain/elf2flt/patches/26dfb54a59c8c0106418a0c46ccb4288d9e066fd/0001-riscv32.patch b/toolchain/elf2flt/patches/26dfb54a59c8c0106418a0c46ccb4288d9e066fd/0001-riscv32.patch new file mode 100644 index 000000000..a99de4f9f --- /dev/null +++ b/toolchain/elf2flt/patches/26dfb54a59c8c0106418a0c46ccb4288d9e066fd/0001-riscv32.patch @@ -0,0 +1,42 @@ +diff -Nur elf2flt-v2023.04.orig/elf2flt.c elf2flt-v2023.04/elf2flt.c +--- elf2flt-v2023.04.orig/elf2flt.c 2023-09-04 11:29:05.952417209 +0200 ++++ elf2flt-v2023.04/elf2flt.c 2023-09-04 11:30:05.371065966 +0200 +@@ -81,7 +81,7 @@ + #include <elf/v850.h> + #elif defined(TARGET_xtensa) + #include <elf/xtensa.h> +-#elif defined(TARGET_riscv64) ++#elif defined(TARGET_riscv64) || defined(TARGET_riscv32) + #include <elf/riscv.h> + #endif + +@@ -127,6 +127,8 @@ + #define ARCH "xtensa" + #elif defined(TARGET_riscv64) + #define ARCH "riscv64" ++#elif defined(TARGET_riscv32) ++#define ARCH "riscv32" + #else + #error "Don't know how to support your CPU architecture??" + #endif +@@ -822,7 +824,7 @@ + goto good_32bit_resolved_reloc_update_text; + default: + goto bad_resolved_reloc; +-#elif defined(TARGET_riscv64) ++#elif defined(TARGET_riscv64) || defined(TARGET_riscv32) + case R_RISCV_NONE: + case R_RISCV_32_PCREL: + case R_RISCV_ADD8: +diff -Nur elf2flt-v2023.04.orig/ld-elf2flt.c elf2flt-v2023.04/ld-elf2flt.c +--- elf2flt-v2023.04.orig/ld-elf2flt.c 2023-09-04 11:28:59.072573514 +0200 ++++ elf2flt-v2023.04/ld-elf2flt.c 2023-09-04 11:29:32.507813592 +0200 +@@ -327,7 +327,7 @@ + /* riscv adds a global pointer symbol to the linker file with the + "RISCV_GP:" prefix. Remove the prefix for riscv64 architecture and + the entire line for other architectures. */ +- if (streq(TARGET_CPU, "riscv64")) ++ if (streq(TARGET_CPU, "riscv64") || streq(TARGET_CPU, "riscv32")) + append_sed(&sed, "^RISCV_GP:", ""); + else + append_sed(&sed, "^RISCV_GP:", NULL); diff --git a/toolchain/elf2flt/patches/26dfb54a59c8c0106418a0c46ccb4288d9e066fd/0002-lm32.patch b/toolchain/elf2flt/patches/26dfb54a59c8c0106418a0c46ccb4288d9e066fd/0002-lm32.patch new file mode 100644 index 000000000..b24b214c7 --- /dev/null +++ b/toolchain/elf2flt/patches/26dfb54a59c8c0106418a0c46ccb4288d9e066fd/0002-lm32.patch @@ -0,0 +1,167 @@ +diff -Nur elf2flt.orig/elf2flt.c elf2flt/elf2flt.c +--- elf2flt.orig/elf2flt.c 2023-09-07 15:59:10.019349031 +0200 ++++ elf2flt/elf2flt.c 2023-09-07 16:40:06.281961316 +0200 +@@ -62,6 +62,8 @@ + #include <elf/bfin.h> + #elif defined(TARGET_h8300) + #include <elf/h8.h> ++#elif defined(TARGET_lm32) ++#include <elf/lm32.h> + #elif defined(TARGET_m68k) + #include <elf/m68k.h> + #elif defined(TARGET_microblaze) +@@ -123,6 +125,11 @@ + #define ARCH "nios" + #elif defined(TARGET_nios2) + #define ARCH "nios2" ++#elif defined(TARGET_lm32) ++#define ARCH "lm32" ++#define FLAT_LM32_RELOC_TYPE_32_BIT 0 ++#define FLAT_LM32_RELOC_TYPE_HI16_BIT 1 ++#define FLAT_LM32_RELOC_TYPE_LO16_BIT 2 + #elif defined(TARGET_xtensa) + #define ARCH "xtensa" + #elif defined(TARGET_riscv64) +@@ -373,7 +380,7 @@ + int bad_relocs = 0; + asymbol **symb; + long nsymb; +-#ifdef TARGET_bfin ++#if defined (TARGET_bfin) || defined (TARGET_lm32) + unsigned long persistent_data = 0; + #endif + +@@ -690,6 +697,36 @@ + break; + default: + goto bad_resolved_reloc; ++#elif defined(TARGET_lm32) ++ case R_LM32_HI16: ++ case R_LM32_LO16: ++ if (q->howto->type == R_LM32_HI16) { ++ pflags = FLAT_LM32_RELOC_TYPE_HI16_BIT << 29; ++ } else { ++ pflags = FLAT_LM32_RELOC_TYPE_LO16_BIT << 29; ++ } ++ ++ relocation_needed = 1; ++ ++ /* remember the upper 16 bits */ ++ if ((0xffff0000 & sym_addr) != persistent_data) { ++ flat_relocs = (uint32_t *) ++ (realloc (flat_relocs, (flat_reloc_count + 1) * sizeof (uint32_t))); ++ if (verbose) ++ printf ("New persistent data for %08lx\n", sym_addr); ++ persistent_data = 0xffff0000 & sym_addr; ++ flat_relocs[flat_reloc_count++] = (sym_addr >> 16) | (3 << 29); ++ } ++ break; ++ case R_LM32_32: ++ pflags = FLAT_LM32_RELOC_TYPE_32_BIT << 29; ++ relocation_needed = 1; ++ break; ++ case R_LM32_CALL: ++ relocation_needed = 0; ++ break; ++ default: ++ goto bad_resolved_reloc; + #elif defined(TARGET_m68k) + case R_68K_32: + goto good_32bit_resolved_reloc; +@@ -1478,6 +1515,63 @@ + #undef _30BITS_RELOC + #undef _28BITS_RELOC + #endif ++#ifdef TARGET_lm32 ++ case R_LM32_32: ++ { ++ pflags = FLAT_LM32_RELOC_TYPE_32_BIT << 29; ++ sym_vma = elf2flt_bfd_section_vma(sym_section); ++ sym_addr += sym_vma + q->addend; ++ relocation_needed = 1; ++ break; ++ } ++ case R_LM32_CALL: ++ { ++ sym_vma = 0; ++ sym_addr += sym_vma + q->addend; ++ sym_addr -= q->address; ++ sym_addr = (int32_t)sym_addr >> q->howto->rightshift; ++ ++ if ((int32_t)sym_addr < -0x8000000 || (int32_t)sym_addr > 0x7ffffff) { ++ printf("ERROR: Relocation overflow for R_LM32_CALL relocation against %s\n", sym_name); ++ bad_relocs++; ++ continue; ++ } ++ ++ r_mem[0] |= (sym_addr >> 24) & 0x03; ++ r_mem[1] = (sym_addr >> 16) & 0xff; ++ r_mem[2] = (sym_addr >> 8) & 0xff; ++ r_mem[3] = sym_addr & 0xff; ++ break; ++ } ++ case R_LM32_HI16: ++ case R_LM32_LO16: ++ { ++ if (q->howto->type == R_LM32_HI16) { ++ pflags = FLAT_LM32_RELOC_TYPE_HI16_BIT << 29; ++ } else { ++ pflags = FLAT_LM32_RELOC_TYPE_LO16_BIT << 29; ++ } ++ ++ sym_vma = elf2flt_bfd_section_vma(sym_section); ++ sym_addr += sym_vma + q->addend; ++ ++ relocation_needed = 1; ++ ++ /* remember the upper 16 bits */ ++ if ((0xffff0000 & sym_addr) != persistent_data) { ++ flat_relocs = (uint32_t *) ++ (realloc (flat_relocs, (flat_reloc_count + 1) * sizeof (uint32_t))); ++ if (verbose) ++ printf ("New persistent data for %08lx\n", sym_addr); ++ persistent_data = 0xffff0000 & sym_addr; ++ flat_relocs[flat_reloc_count++] = (sym_addr >> 16) | (3 << 29); ++ } ++ ++ r_mem[2] = (sym_addr >> 8) & 0xff; ++ r_mem[3] = sym_addr & 0xff; ++ break; ++ } ++#endif /* TARGET_lm32 */ + default: + /* missing support for other types of relocs */ + printf("ERROR: bad reloc type (%s)%d\n", q->howto->name, (*p)->howto->type); +@@ -1616,6 +1710,13 @@ + break; + #endif + ++#ifdef TARGET_lm32 ++ case R_LM32_HI16: ++ case R_LM32_LO16: ++ case R_LM32_CALL: ++ /* entry has already been written */ ++ break; ++#endif + default: + /* The alignment of the build host + might be stricter than that of the +diff -Nur elf2flt.orig/elf2flt.ld.in elf2flt/elf2flt.ld.in +--- elf2flt.orig/elf2flt.ld.in 2023-09-07 11:32:34.223463015 +0200 ++++ elf2flt/elf2flt.ld.in 2023-09-07 16:06:02.781672190 +0200 +@@ -73,6 +73,7 @@ + W_RODAT: *(.rodata1) + W_RODAT: *(.rodata.*) + W_RODAT: *(.gnu.linkonce.r*) ++W_RODAT: *(.rofixup) + + /* .ARM.extab name sections containing exception unwinding information */ + *(.ARM.extab* .gnu.linkonce.armextab.*) +@@ -111,6 +112,7 @@ + R_RODAT: *(.rodata1) + R_RODAT: *(.rodata.*) + R_RODAT: *(.gnu.linkonce.r*) ++R_RODAT: *(.rofixup) + *(.data) + *(.data1) + *(.data.*) diff --git a/toolchain/elf2flt/patches/26dfb54a59c8c0106418a0c46ccb4288d9e066fd/0003-sh2.patch b/toolchain/elf2flt/patches/26dfb54a59c8c0106418a0c46ccb4288d9e066fd/0003-sh2.patch new file mode 100644 index 000000000..9587a0315 --- /dev/null +++ b/toolchain/elf2flt/patches/26dfb54a59c8c0106418a0c46ccb4288d9e066fd/0003-sh2.patch @@ -0,0 +1,52 @@ +diff -Nur elf2flt-26dfb54a59c8c0106418a0c46ccb4288d9e066fd.orig/elf2flt.c elf2flt-26dfb54a59c8c0106418a0c46ccb4288d9e066fd/elf2flt.c +--- elf2flt-26dfb54a59c8c0106418a0c46ccb4288d9e066fd.orig/elf2flt.c 2023-09-08 08:49:00.529082893 +0200 ++++ elf2flt-26dfb54a59c8c0106418a0c46ccb4288d9e066fd/elf2flt.c 2023-09-08 08:51:08.117679134 +0200 +@@ -75,7 +75,7 @@ + #define FLAT_NIOS2_R_HIADJ_LO 2 + #define FLAT_NIOS2_R_CALL26 4 + #include <elf/nios2.h> +-#elif defined(TARGET_sh) ++#elif defined(TARGET_sh2eb) + #include <elf/sh.h> + #elif defined(TARGET_sparc) + #include <elf/sparc.h> +@@ -111,7 +111,7 @@ + #define ARCH "sparc" + #elif defined(TARGET_v850) + #define ARCH "v850" +-#elif defined(TARGET_sh) ++#elif defined(TARGET_sh2eb) + #define ARCH "sh" + #elif defined(TARGET_h8300) + #define ARCH "h8300" +@@ -795,6 +795,12 @@ + + flat_reloc_count++; + break; ++#elif defined (TARGET_sh2eb) ++ case R_SH_DIR32: ++ goto good_32bit_resolved_reloc; ++ case R_SH_REL32: ++ relocation_needed = 0; ++ continue; + #elif defined (TARGET_h8300) + case R_H8_DIR32: + case R_H8_DIR32A16: +@@ -1328,7 +1334,7 @@ + #endif /* TARGET_sparc */ + + +-#ifdef TARGET_sh ++#ifdef TARGET_sh2eb + case R_SH_DIR32: + relocation_needed = 1; + sym_vma = elf2flt_bfd_section_vma(sym_section); +@@ -1339,7 +1345,7 @@ + sym_addr += sym_vma + q->addend; + sym_addr -= q->address; + break; +-#endif /* TARGET_sh */ ++#endif /* TARGET_sh2eb */ + + #ifdef TARGET_e1 + #define htoe1l(x) htonl(x) diff --git a/toolchain/elf2flt/patches/3051fec89bbd30de6f952dc3100712feff3ca076/0001-.rofixup-fix.patch b/toolchain/elf2flt/patches/3051fec89bbd30de6f952dc3100712feff3ca076/0001-.rofixup-fix.patch new file mode 100644 index 000000000..79186642e --- /dev/null +++ b/toolchain/elf2flt/patches/3051fec89bbd30de6f952dc3100712feff3ca076/0001-.rofixup-fix.patch @@ -0,0 +1,33 @@ +From 270b461e88b47781b3ef9bba2779074d0eb4996b Mon Sep 17 00:00:00 2001 +From: Waldemar Brodkorb <wbx@openadk.org> +Date: Fri, 25 Aug 2023 05:04:53 +0200 +Subject: [PATCH] .rofixup fix + +Signed-off-by: Waldemar Brodkorb <wbx@openadk.org> +--- + elf2flt.ld.in | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/elf2flt.ld.in b/elf2flt.ld.in +index c7e01a6..c69531e 100644 +--- a/elf2flt.ld.in ++++ b/elf2flt.ld.in +@@ -31,6 +31,7 @@ W_RODAT *(.rodata) + W_RODAT *(.rodata1) + W_RODAT *(.rodata.*) + W_RODAT *(.gnu.linkonce.r*) ++W_RODAT *(.rofixup) + + /* This is special code area at the end of the normal + text section. It contains a small lookup table at +@@ -60,6 +61,7 @@ R_RODAT *(.rodata) + R_RODAT *(.rodata1) + R_RODAT *(.rodata.*) + R_RODAT *(.gnu.linkonce.r*) ++R_RODAT *(.rofixup) + *(.data) + *(.data1) + *(.data.*) +-- +2.30.2 + diff --git a/toolchain/elf2flt/patches/453398f917d167f8c308c8f997270c48ae8f8b12/0008-remove_BFD_VMA_FMT.patch b/toolchain/elf2flt/patches/453398f917d167f8c308c8f997270c48ae8f8b12/0008-remove_BFD_VMA_FMT.patch new file mode 100644 index 000000000..d20b993da --- /dev/null +++ b/toolchain/elf2flt/patches/453398f917d167f8c308c8f997270c48ae8f8b12/0008-remove_BFD_VMA_FMT.patch @@ -0,0 +1,125 @@ +diff -Nur elf2flt-453398f917d167f8c308c8f997270c48ae8f8b12.orig/elf2flt.c elf2flt-453398f917d167f8c308c8f997270c48ae8f8b12/elf2flt.c +--- elf2flt-453398f917d167f8c308c8f997270c48ae8f8b12.orig/elf2flt.c 2023-01-30 08:48:56.632981732 +0100 ++++ elf2flt-453398f917d167f8c308c8f997270c48ae8f8b12/elf2flt.c 2023-01-30 08:53:34.510426754 +0100 +@@ -222,7 +222,7 @@ + long i; + printf("SYMBOL TABLE:\n"); + for (i=0; i<number_of_symbols; i++) { +- printf(" NAME=%s VALUE=0x%"BFD_VMA_FMT"x\n", ++ printf(" NAME=%s VALUE=0x%x\n", + symbol_table[i]->name, symbol_table[i]->value); + } + printf("\n"); +@@ -458,7 +458,7 @@ + if (r == NULL) + continue; + if (verbose) +- printf(" RELOCS: %s [%p]: flags=0x%x vma=0x%"BFD_VMA_FMT"x\n", ++ printf(" RELOCS: %s [%p]: flags=0x%x vma=0x%x\n", + r->name, r, r->flags, elf2flt_bfd_section_vma(abs_bfd, r)); + if ((r->flags & SEC_RELOC) == 0) + continue; +@@ -903,8 +903,8 @@ + if (verbose) + fprintf(stderr, + "%s vma=0x%x, " +- "value=0x%"BFD_VMA_FMT"x, " +- "address=0x%"BFD_VMA_FMT"x " ++ "value=0x%x, " ++ "address=0x%x " + "sym_addr=0x%x rs=0x%x, opcode=0x%x\n", + "ABS32", + sym_vma, (*(q->sym_ptr_ptr))->value, +@@ -922,8 +922,8 @@ + if (verbose) + fprintf(stderr, + "%s vma=0x%x, " +- "value=0x%"BFD_VMA_FMT"x, " +- "address=0x%"BFD_VMA_FMT"x " ++ "value=0x%x, " ++ "address=0x%x " + "sym_addr=0x%x rs=0x%x, opcode=0x%x\n", + "PLT32", + sym_vma, (*(q->sym_ptr_ptr))->value, +@@ -945,7 +945,7 @@ + case R_V850_ZDA_16_16_OFFSET: + case R_V850_ZDA_16_16_SPLIT_OFFSET: + /* Can't support zero-relocations. */ +- printf ("ERROR: %s+0x%"BFD_VMA_FMT"x: zero relocations not supported\n", ++ printf ("ERROR: %s+0x%x: zero relocations not supported\n", + sym_name, q->addend); + continue; + #endif /* TARGET_v850 */ +@@ -1038,15 +1038,15 @@ + sprintf(&addstr[0], "+0x%ld", sym_addr - (*(q->sym_ptr_ptr))->value - + elf2flt_bfd_section_vma(abs_bfd, sym_section)); + if (verbose) +- printf(" RELOC[%d]: offset=0x%"BFD_VMA_FMT"x symbol=%s%s " ++ printf(" RELOC[%d]: offset=0x%x symbol=%s%s " + "section=%s size=%d " +- "fixup=0x%x (reloc=0x%"BFD_VMA_FMT"x)\n", ++ "fixup=0x%x (reloc=0x%x)\n", + flat_reloc_count, + q->address, sym_name, addstr, + section_name, sym_reloc_size, + sym_addr, section_vma + q->address); + if (verbose) +- printf("reloc[%d] = 0x%"BFD_VMA_FMT"x\n", ++ printf("reloc[%d] = 0x%x\n", + flat_reloc_count, section_vma + q->address); + + continue; +@@ -1163,9 +1163,9 @@ + temp |= (exist_val & 0x3f); + *(unsigned long *)r_mem = htoniosl(temp); + if (verbose) +- printf("omit: offset=0x%"BFD_VMA_FMT"x symbol=%s%s " ++ printf("omit: offset=0x%x symbol=%s%s " + "section=%s size=%d " +- "fixup=0x%x (reloc=0x%"BFD_VMA_FMT"x) GPREL\n", ++ "fixup=0x%x (reloc=0x%x) GPREL\n", + q->address, sym_name, addstr, + section_name, sym_reloc_size, + sym_addr, section_vma + q->address); +@@ -1183,9 +1183,9 @@ + exist_val |= ((sym_addr & 0xFFFF) << 6); + *(unsigned long *)r_mem = htoniosl(exist_val); + if (verbose) +- printf("omit: offset=0x%"BFD_VMA_FMT"x symbol=%s%s " ++ printf("omit: offset=0x%x symbol=%s%s " + "section=%s size=%d " +- "fixup=0x%x (reloc=0x%"BFD_VMA_FMT"x) PCREL\n", ++ "fixup=0x%x (reloc=0x%x) PCREL\n", + q->address, sym_name, addstr, + section_name, sym_reloc_size, + sym_addr, section_vma + q->address); +@@ -1200,7 +1200,7 @@ + && (p[-1]->sym_ptr_ptr == p[0]->sym_ptr_ptr) + && (p[-1]->addend == p[0]->addend)) { + if (verbose) +- printf("omit: offset=0x%"BFD_VMA_FMT"x symbol=%s%s " ++ printf("omit: offset=0x%x symbol=%s%s " + "section=%s size=%d LO16\n", + q->address, sym_name, addstr, + section_name, sym_reloc_size); +@@ -1610,9 +1610,9 @@ + } + + if (verbose) +- printf(" RELOC[%d]: offset=0x%"BFD_VMA_FMT"x symbol=%s%s " ++ printf(" RELOC[%d]: offset=0x%x symbol=%s%s " + "section=%s size=%d " +- "fixup=0x%x (reloc=0x%"BFD_VMA_FMT"x)\n", ++ "fixup=0x%x (reloc=0x%x)\n", + flat_reloc_count, + q->address, sym_name, addstr, + section_name, sym_reloc_size, +@@ -1630,7 +1630,7 @@ + (section_vma + q->address); + + if (verbose) +- printf("reloc[%d] = 0x%"BFD_VMA_FMT"x\n", ++ printf("reloc[%d] = 0x%x\n", + flat_reloc_count, section_vma + q->address); + #else + switch ((*p)->howto->type) { diff --git a/toolchain/elf2flt/patches/v2021.08/0005-elf2flt-fix-fatal-error-regression-on-m68k-xtensa-ri.patch b/toolchain/elf2flt/patches/v2021.08/0005-elf2flt-fix-fatal-error-regression-on-m68k-xtensa-ri.patch index 278709cb1..616bbc891 100644 --- a/toolchain/elf2flt/patches/v2021.08/0005-elf2flt-fix-fatal-error-regression-on-m68k-xtensa-ri.patch +++ b/toolchain/elf2flt/patches/v2021.08/0005-elf2flt-fix-fatal-error-regression-on-m68k-xtensa-ri.patch @@ -1,8 +1,7 @@ -From 65ac5f9e69cfb989d970da74c41e478774d29be5 Mon Sep 17 00:00:00 2001 +From a8c9f650b82109abf7aa730f298ea5182ed62613 Mon Sep 17 00:00:00 2001 From: Niklas Cassel <niklas.cassel@wdc.com> Date: Tue, 9 Aug 2022 21:06:05 +0200 -Subject: [PATCH] elf2flt: fix fatal error regression on m68k, xtensa, - riscv64 +Subject: [PATCH] elf2flt: fix fatal error regression on m68k, xtensa, riscv64 Commit ba379d08bb78 ("elf2flt: fix for segfault on some ARM ELFs") changed the condition of which input sections that should be included @@ -12,16 +11,15 @@ to: ((a->flags & (SEC_DATA | SEC_READONLY | SEC_RELOC)) == (SEC_DATA | SEC_READONLY | SEC_RELOC)) -On ARM, the .eh_frame input section does not have the SEC_RELOC flag -set, so this specific change had no effect on ARM. +On ARM, the .eh_frame input section does not have the SEC_RELOC flag set, +so on ARM, this change caused .eh_frame to move from .text to .data. -However, on e.g. m68k and riscv64, the .eh_frame input section does -have the SEC_RELOC flag set, which means that after commit ba379d08bb78 -("elf2flt: fix for segfault on some ARM ELFs"), read-only relocation -data sections were placed in .text output section, instead of .data -output section. +However, on e.g. m68k, xtensa and riscv64, the .eh_frame input section +does have the SEC_RELOC flag set, which means that the change in +commit ba379d08bb78 ("elf2flt: fix for segfault on some ARM ELFs") +caused .eh_frame to move in an opposite way, i.e. from .data to .text. -This will result in a fatal error on m68k, xtensa and riscv64: +This resulted in a fatal error on m68k, xtensa and riscv64: ERROR: text=0x3bab8 overlaps data=0x33f60 ? This is because elf2flt cannot append to .text after .data has been @@ -36,21 +34,26 @@ to .text after .data has been appended to (which will require elf2flt to move/relocate everything that has already been appended to .data, since the virtual addresses are contiguous). -However, for now, add an exception for m68k, xtensa and riscv64 -(specifically for the problematic input section, .eh_frame), so that we -get the same behavior as older elf2flt releases, where we put read-only -relocation data in .data, which was working perfectly fine. +However, for now, add an exception for input sections which have all +three flags SEC_DATA, SEC_READONLY, and SEC_RELOC set, and which have a +name equal to a problematic input section (.eh_frame, .gcc_except_table). +That way, we get the same behavior as older elf2flt releases for m68k, +xtensa and riscv64, where we put read-only relocation data in .data, +which was working perfectly fine. + +This exception will not change any behavior on ARM, as the .eh_frame +input section does not have flag SEC_RELOC set. Signed-off-by: Niklas Cassel <niklas.cassel@wdc.com> --- - elf2flt.c | 11 +++++++++-- - 1 file changed, 9 insertions(+), 2 deletions(-) + elf2flt.c | 9 +++++++-- + 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/elf2flt.c b/elf2flt.c -index 9c32f9a..a680c89 100644 +index e0d7891..39d035f 100644 --- a/elf2flt.c +++ b/elf2flt.c -@@ -340,8 +340,15 @@ compare_relocs (const void *pa, const void *pb) +@@ -341,8 +341,13 @@ compare_relocs (const void *pa, const void *pb) static bool ro_reloc_data_section_should_be_in_text(asection *s) { @@ -58,10 +61,8 @@ index 9c32f9a..a680c89 100644 - (SEC_DATA | SEC_READONLY | SEC_RELOC); + if ((s->flags & (SEC_DATA | SEC_READONLY | SEC_RELOC)) == + (SEC_DATA | SEC_READONLY | SEC_RELOC)) { -+#if defined(TARGET_m68k) || defined(TARGET_riscv64) || defined(TARGET_xtensa) -+ if (!strcmp(".eh_frame", s->name)) ++ if (!strcmp(".eh_frame", s->name) || !strcmp(".gcc_except_table", s->name)) + return false; -+#endif + return true; + } + return false; @@ -69,5 +70,5 @@ index 9c32f9a..a680c89 100644 static uint32_t * -- -2.37.1 +2.39.0 diff --git a/toolchain/elf2flt/patches/v2021.08/0006-elf2flt-xtensa-fix-text-relocations.patch b/toolchain/elf2flt/patches/v2021.08/0006-elf2flt-xtensa-fix-text-relocations.patch new file mode 100644 index 000000000..fc8784a1b --- /dev/null +++ b/toolchain/elf2flt/patches/v2021.08/0006-elf2flt-xtensa-fix-text-relocations.patch @@ -0,0 +1,25 @@ +diff -Nur elf2flt-v2021.08.orig/elf2flt.c elf2flt-v2021.08/elf2flt.c +--- elf2flt-v2021.08.orig/elf2flt.c 2023-01-09 11:08:28.637676113 +0100 ++++ elf2flt-v2021.08/elf2flt.c 2023-01-09 11:09:04.502804007 +0100 +@@ -835,7 +835,20 @@ + continue; + case R_XTENSA_32: + case R_XTENSA_PLT: +- goto good_32bit_resolved_reloc; ++ if (bfd_big_endian (abs_bfd)) ++ sym_addr = ++ (r_mem[0] << 24) ++ + (r_mem[1] << 16) ++ + (r_mem[2] << 8) ++ + r_mem[3]; ++ else ++ sym_addr = ++ r_mem[0] ++ + (r_mem[1] << 8) ++ + (r_mem[2] << 16) ++ + (r_mem[3] << 24); ++ relocation_needed = 1; ++ break; + default: + goto bad_resolved_reloc; + #elif defined(TARGET_riscv64) diff --git a/toolchain/elf2flt/patches/v2021.08/0007-riscv32.patch b/toolchain/elf2flt/patches/v2021.08/0007-riscv32.patch new file mode 100644 index 000000000..b3c4677be --- /dev/null +++ b/toolchain/elf2flt/patches/v2021.08/0007-riscv32.patch @@ -0,0 +1,56 @@ +diff -Nur elf2flt-v2021.08.orig/elf2flt.c elf2flt-v2021.08/elf2flt.c +--- elf2flt-v2021.08.orig/elf2flt.c 2023-02-26 11:31:48.758810872 +0100 ++++ elf2flt-v2021.08/elf2flt.c 2023-02-26 11:32:05.714465277 +0100 +@@ -81,7 +81,7 @@ + #include <elf/v850.h> + #elif defined(TARGET_xtensa) + #include <elf/xtensa.h> +-#elif defined(TARGET_riscv64) ++#elif defined(TARGET_riscv64) || defined(TARGET_riscv32) + #include <elf/riscv.h> + #endif + +@@ -127,6 +127,8 @@ + #define ARCH "xtensa" + #elif defined(TARGET_riscv64) + #define ARCH "riscv64" ++#elif defined(TARGET_riscv32) ++#define ARCH "riscv32" + #else + #error "Don't know how to support your CPU architecture??" + #endif +@@ -849,12 +851,21 @@ + break; + default: + goto bad_resolved_reloc; +-#elif defined(TARGET_riscv64) ++#elif defined(TARGET_riscv64) || defined(TARGET_riscv32) + case R_RISCV_32_PCREL: ++ case R_RISCV_ADD8: ++ case R_RISCV_ADD16: + case R_RISCV_ADD32: + case R_RISCV_ADD64: ++ case R_RISCV_SUB6: ++ case R_RISCV_SUB8: ++ case R_RISCV_SUB16: + case R_RISCV_SUB32: + case R_RISCV_SUB64: ++ case R_RISCV_SET6: ++ case R_RISCV_SET8: ++ case R_RISCV_SET16: ++ case R_RISCV_SET32: + continue; + case R_RISCV_32: + case R_RISCV_64: +diff -Nur elf2flt-v2021.08.orig/ld-elf2flt.c elf2flt-v2021.08/ld-elf2flt.c +--- elf2flt-v2021.08.orig/ld-elf2flt.c 2023-02-26 11:31:21.047376888 +0100 ++++ elf2flt-v2021.08/ld-elf2flt.c 2023-02-26 11:32:05.714465277 +0100 +@@ -327,7 +327,7 @@ + /* riscv adds a global pointer symbol to the linker file with the + "RISCV_GP:" prefix. Remove the prefix for riscv64 architecture and + the entire line for other architectures. */ +- if (streq(TARGET_CPU, "riscv64")) ++ if (streq(TARGET_CPU, "riscv64") || streq(TARGET_CPU, "riscv32")) + append_sed(&sed, "^RISCV_GP:", ""); + else + append_sed(&sed, "^RISCV_GP:", NULL); diff --git a/toolchain/elf2flt/patches/v2021.08/0008-remove_BFD_VMA_FMT.patch b/toolchain/elf2flt/patches/v2021.08/0008-remove_BFD_VMA_FMT.patch new file mode 100644 index 000000000..6367f1383 --- /dev/null +++ b/toolchain/elf2flt/patches/v2021.08/0008-remove_BFD_VMA_FMT.patch @@ -0,0 +1,97 @@ +diff -Nur elf2flt-v2021.08.orig/elf2flt.c elf2flt-v2021.08/elf2flt.c +--- elf2flt-v2021.08.orig/elf2flt.c 2023-01-29 16:47:24.791851890 +0100 ++++ elf2flt-v2021.08/elf2flt.c 2023-01-29 16:49:46.628476326 +0100 +@@ -222,7 +222,7 @@ + long i; + printf("SYMBOL TABLE:\n"); + for (i=0; i<number_of_symbols; i++) { +- printf(" NAME=%s VALUE=0x%"BFD_VMA_FMT"x\n", ++ printf(" NAME=%s VALUE=0x%x\n", + symbol_table[i]->name, symbol_table[i]->value); + } + printf("\n"); +@@ -471,7 +471,7 @@ + if (r == NULL) + continue; + if (verbose) +- printf(" RELOCS: %s [%p]: flags=0x%x vma=0x%"BFD_VMA_FMT"x\n", ++ printf(" RELOCS: %s [%p]: flags=0x%x vma=0x%x\n", + r->name, r, r->flags, elf2flt_bfd_section_vma(r)); + if ((r->flags & SEC_RELOC) == 0) + continue; +@@ -966,8 +966,8 @@ + if (verbose) + fprintf(stderr, + "%s vma=0x%x, " +- "value=0x%"BFD_VMA_FMT"x, " +- "address=0x%"BFD_VMA_FMT"x " ++ "value=0x%x, " ++ "address=0x%x " + "sym_addr=0x%x rs=0x%x, opcode=0x%x\n", + "ABS32", + sym_vma, (*(q->sym_ptr_ptr))->value, +@@ -985,8 +985,8 @@ + if (verbose) + fprintf(stderr, + "%s vma=0x%x, " +- "value=0x%"BFD_VMA_FMT"x, " +- "address=0x%"BFD_VMA_FMT"x " ++ "value=0x%x, " ++ "address=0x%x " + "sym_addr=0x%x rs=0x%x, opcode=0x%x\n", + "PLT32", + sym_vma, (*(q->sym_ptr_ptr))->value, +@@ -1008,7 +1008,7 @@ + case R_V850_ZDA_16_16_OFFSET: + case R_V850_ZDA_16_16_SPLIT_OFFSET: + /* Can't support zero-relocations. */ +- printf ("ERROR: %s+0x%"BFD_VMA_FMT"x: zero relocations not supported\n", ++ printf ("ERROR: %s+0x%x: zero relocations not supported\n", + sym_name, q->addend); + continue; + #endif /* TARGET_v850 */ +@@ -1208,9 +1208,9 @@ + temp |= (exist_val & 0x3f); + *(unsigned long *)r_mem = htoniosl(temp); + if (verbose) +- printf("omit: offset=0x%"BFD_VMA_FMT"x symbol=%s%s " ++ printf("omit: offset=0x%x symbol=%s%s " + "section=%s size=%d " +- "fixup=0x%x (reloc=0x%"BFD_VMA_FMT"x) GPREL\n", ++ "fixup=0x%x (reloc=0x%x) GPREL\n", + q->address, sym_name, addstr, + section_name, sym_reloc_size, + sym_addr, section_vma + q->address); +@@ -1228,9 +1228,9 @@ + exist_val |= ((sym_addr & 0xFFFF) << 6); + *(unsigned long *)r_mem = htoniosl(exist_val); + if (verbose) +- printf("omit: offset=0x%"BFD_VMA_FMT"x symbol=%s%s " ++ printf("omit: offset=0x%x symbol=%s%s " + "section=%s size=%d " +- "fixup=0x%x (reloc=0x%"BFD_VMA_FMT"x) PCREL\n", ++ "fixup=0x%x (reloc=0x%x) PCREL\n", + q->address, sym_name, addstr, + section_name, sym_reloc_size, + sym_addr, section_vma + q->address); +@@ -1245,7 +1245,7 @@ + && (p[-1]->sym_ptr_ptr == p[0]->sym_ptr_ptr) + && (p[-1]->addend == p[0]->addend)) { + if (verbose) +- printf("omit: offset=0x%"BFD_VMA_FMT"x symbol=%s%s " ++ printf("omit: offset=0x%x symbol=%s%s " + "section=%s size=%d LO16\n", + q->address, sym_name, addstr, + section_name, sym_reloc_size); +@@ -1660,9 +1660,9 @@ + */ + if (relocation_needed) { + if (verbose) +- printf(" RELOC[%d]: offset=0x%"BFD_VMA_FMT"x symbol=%s%s " ++ printf(" RELOC[%d]: offset=0x%x symbol=%s%s " + "section=%s size=%d " +- "fixup=0x%x (reloc=0x%"BFD_VMA_FMT"x)\n", ++ "fixup=0x%x (reloc=0x%x)\n", + flat_reloc_count, + q->address, sym_name, addstr, + section_name, sym_reloc_size, diff --git a/toolchain/elf2flt/patches/v2021.08/0009-riscv.patch b/toolchain/elf2flt/patches/v2021.08/0009-riscv.patch new file mode 100644 index 000000000..c1072cb45 --- /dev/null +++ b/toolchain/elf2flt/patches/v2021.08/0009-riscv.patch @@ -0,0 +1,11 @@ +diff -Nur elf2flt-v2021.08.orig/elf2flt.c elf2flt-v2021.08/elf2flt.c +--- elf2flt-v2021.08.orig/elf2flt.c 2023-02-26 11:32:05.714465277 +0100 ++++ elf2flt-v2021.08/elf2flt.c 2023-02-26 15:04:52.726514896 +0100 +@@ -852,6 +852,7 @@ + default: + goto bad_resolved_reloc; + #elif defined(TARGET_riscv64) || defined(TARGET_riscv32) ++ case R_RISCV_NONE: + case R_RISCV_32_PCREL: + case R_RISCV_ADD8: + case R_RISCV_ADD16: diff --git a/toolchain/elf2flt/patches/v2024.02/0001-sh2.patch b/toolchain/elf2flt/patches/v2024.02/0001-sh2.patch new file mode 100644 index 000000000..b14a78e23 --- /dev/null +++ b/toolchain/elf2flt/patches/v2024.02/0001-sh2.patch @@ -0,0 +1,43 @@ +diff -Nur elf2flt-v2023.09.orig/elf2flt.c elf2flt-v2023.09/elf2flt.c +--- elf2flt-v2023.09.orig/elf2flt.c 2023-12-22 10:44:11.000000000 +0100 ++++ elf2flt-v2023.09/elf2flt.c 2023-12-23 02:26:06.323239781 +0100 +@@ -73,7 +73,7 @@ + #define FLAT_NIOS2_R_HIADJ_LO 2 + #define FLAT_NIOS2_R_CALL26 4 + #include <elf/nios2.h> +-#elif defined(TARGET_sh) ++#elif defined(TARGET_sh2) || defined(TARGET_sh2eb) + #include <elf/sh.h> + #elif defined(TARGET_sparc) + #include <elf/sparc.h> +@@ -109,8 +109,10 @@ + #define ARCH "sparc" + #elif defined(TARGET_v850) + #define ARCH "v850" +-#elif defined(TARGET_sh) +-#define ARCH "sh" ++#elif defined(TARGET_sh2) ++#define ARCH "sh2" ++#elif defined(TARGET_sh2eb) ++#define ARCH "sh2" + #elif defined(TARGET_h8300) + #define ARCH "h8300" + #elif defined(TARGET_microblaze) +@@ -1289,7 +1291,7 @@ + #endif /* TARGET_sparc */ + + +-#ifdef TARGET_sh ++#if defined(TARGET_sh2) || defined(TARGET_sh2eb) + case R_SH_DIR32: + relocation_needed = 1; + sym_vma = elf2flt_bfd_section_vma(sym_section); +@@ -1300,7 +1302,7 @@ + sym_addr += sym_vma + q->addend; + sym_addr -= q->address; + break; +-#endif /* TARGET_sh */ ++#endif /* TARGET_sh2 / TARGET_sh2eb */ + + #ifdef TARGET_e1 + #define htoe1l(x) htonl(x) diff --git a/toolchain/elf2flt/patches/v2024.02/0002-h8300.patch b/toolchain/elf2flt/patches/v2024.02/0002-h8300.patch new file mode 100644 index 000000000..2c7b73482 --- /dev/null +++ b/toolchain/elf2flt/patches/v2024.02/0002-h8300.patch @@ -0,0 +1,20 @@ +diff -Nur elf2flt-v2023.09.orig/flthdr.c elf2flt-v2023.09/flthdr.c +--- elf2flt-v2023.09.orig/flthdr.c 2023-12-23 03:20:20.000000000 +0100 ++++ elf2flt-v2023.09/flthdr.c 2023-12-23 17:11:22.699413170 +0100 +@@ -164,8 +164,16 @@ + r = ntohl(relocs[i]); + raddr = flat_get_relocate_addr(r); + printf(" %u\t0x%08lx (0x%08"PRIx32")\t", i, r, raddr); ++#if defined(TARGET_h8300) ++ raddr &= ~0x00000001; ++#endif + fseek_stream(&ifp, sizeof(old_hdr) + raddr, SEEK_SET); + fread_stream(&addr, sizeof(addr), 1, &ifp); ++#if defined(TARGET_h8300) ++ addr = ntohl(addr); ++ if (r & 1) ++ addr &= 0x00ffffff; ++#endif + printf("%"PRIx32"\n", addr); + } + diff --git a/toolchain/elf2flt/patches/v2024.02/0003-riscv64-alignment.patch b/toolchain/elf2flt/patches/v2024.02/0003-riscv64-alignment.patch new file mode 100644 index 000000000..9feef7951 --- /dev/null +++ b/toolchain/elf2flt/patches/v2024.02/0003-riscv64-alignment.patch @@ -0,0 +1,12 @@ +diff -Nur elf2flt-v2024.02.orig/elf2flt.ld.in elf2flt-v2024.02/elf2flt.ld.in +--- elf2flt-v2024.02.orig/elf2flt.ld.in 2024-03-22 04:51:08.000000000 +0100 ++++ elf2flt-v2024.02/elf2flt.ld.in 2024-03-22 13:08:31.793773247 +0100 +@@ -139,7 +139,7 @@ + @SYMBOL_PREFIX@_ssro_size = @SYMBOL_PREFIX@_essro - @SYMBOL_PREFIX@_ssro; + PROVIDE(@SYMBOL_PREFIX@_SDA2_BASE_ = @SYMBOL_PREFIX@_ssro + (@SYMBOL_PREFIX@_ssro_size / 2)); + +- . = ALIGN(4) ; ++ . = ALIGN(8) ; + TOR: @SYMBOL_PREFIX@__CTOR_LIST__ = .; + TOR: LONG((@SYMBOL_PREFIX@__CTOR_END__ - @SYMBOL_PREFIX@__CTOR_LIST__) / 4 - 2) + SINGLE_LINK: /* gcc uses crtbegin.o to find the start of |