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-rw-r--r--target/mips/mikrotik-rb4xx/patches/4.1.6/0029-gpio-add-gpio-latch-driver.patch1261
1 files changed, 1261 insertions, 0 deletions
diff --git a/target/mips/mikrotik-rb4xx/patches/4.1.6/0029-gpio-add-gpio-latch-driver.patch b/target/mips/mikrotik-rb4xx/patches/4.1.6/0029-gpio-add-gpio-latch-driver.patch
new file mode 100644
index 000000000..ade756fa9
--- /dev/null
+++ b/target/mips/mikrotik-rb4xx/patches/4.1.6/0029-gpio-add-gpio-latch-driver.patch
@@ -0,0 +1,1261 @@
+diff -Nur linux-4.1.6.orig/drivers/gpio/gpio-latch.c linux-4.1.6/drivers/gpio/gpio-latch.c
+--- linux-4.1.6.orig/drivers/gpio/gpio-latch.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-4.1.6/drivers/gpio/gpio-latch.c 2015-09-16 00:47:41.982063655 +0200
+@@ -0,0 +1,220 @@
++/*
++ * GPIO latch driver
++ *
++ * Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include <linux/kernel.h>
++#include <linux/init.h>
++#include <linux/module.h>
++#include <linux/types.h>
++#include <linux/gpio.h>
++#include <linux/slab.h>
++#include <linux/platform_device.h>
++
++#include <linux/platform_data/gpio-latch.h>
++
++struct gpio_latch_chip {
++ struct gpio_chip gc;
++
++ struct mutex mutex;
++ struct mutex latch_mutex;
++ bool latch_enabled;
++ int le_gpio;
++ bool le_active_low;
++ int *gpios;
++};
++
++static inline struct gpio_latch_chip *to_gpio_latch_chip(struct gpio_chip *gc)
++{
++ return container_of(gc, struct gpio_latch_chip, gc);
++}
++
++static void gpio_latch_lock(struct gpio_latch_chip *glc, bool enable)
++{
++ mutex_lock(&glc->mutex);
++
++ if (enable)
++ glc->latch_enabled = true;
++
++ if (glc->latch_enabled)
++ mutex_lock(&glc->latch_mutex);
++}
++
++static void gpio_latch_unlock(struct gpio_latch_chip *glc, bool disable)
++{
++ if (glc->latch_enabled)
++ mutex_unlock(&glc->latch_mutex);
++
++ if (disable)
++ glc->latch_enabled = true;
++
++ mutex_unlock(&glc->mutex);
++}
++
++static int
++gpio_latch_get(struct gpio_chip *gc, unsigned offset)
++{
++ struct gpio_latch_chip *glc = to_gpio_latch_chip(gc);
++ int ret;
++
++ gpio_latch_lock(glc, false);
++ ret = gpio_get_value(glc->gpios[offset]);
++ gpio_latch_unlock(glc, false);
++
++ return ret;
++}
++
++static void
++gpio_latch_set(struct gpio_chip *gc, unsigned offset, int value)
++{
++ struct gpio_latch_chip *glc = to_gpio_latch_chip(gc);
++ bool enable_latch = false;
++ bool disable_latch = false;
++ int gpio;
++
++ gpio = glc->gpios[offset];
++
++ if (gpio == glc->le_gpio) {
++ enable_latch = value ^ glc->le_active_low;
++ disable_latch = !enable_latch;
++ }
++
++ gpio_latch_lock(glc, enable_latch);
++ gpio_set_value(gpio, value);
++ gpio_latch_unlock(glc, disable_latch);
++}
++
++static int
++gpio_latch_direction_input(struct gpio_chip *gc, unsigned offset)
++{
++ struct gpio_latch_chip *glc = to_gpio_latch_chip(gc);
++ int ret;
++
++ gpio_latch_lock(glc, false);
++ ret = gpio_direction_input(glc->gpios[offset]);
++ gpio_latch_unlock(glc, false);
++
++ return ret;
++}
++
++static int
++gpio_latch_direction_output(struct gpio_chip *gc, unsigned offset, int value)
++{
++ struct gpio_latch_chip *glc = to_gpio_latch_chip(gc);
++ bool enable_latch = false;
++ bool disable_latch = false;
++ int gpio;
++ int ret;
++
++ gpio = glc->gpios[offset];
++
++ if (gpio == glc->le_gpio) {
++ enable_latch = value ^ glc->le_active_low;
++ disable_latch = !enable_latch;
++ }
++
++ gpio_latch_lock(glc, enable_latch);
++ ret = gpio_direction_output(gpio, value);
++ gpio_latch_unlock(glc, disable_latch);
++
++ return ret;
++}
++
++static int gpio_latch_probe(struct platform_device *pdev)
++{
++ struct gpio_latch_chip *glc;
++ struct gpio_latch_platform_data *pdata;
++ struct gpio_chip *gc;
++ int size;
++ int ret;
++ int i;
++
++ pdata = dev_get_platdata(&pdev->dev);
++ if (!pdata)
++ return -EINVAL;
++
++ if (pdata->le_gpio_index >= pdata->num_gpios ||
++ !pdata->num_gpios ||
++ !pdata->gpios)
++ return -EINVAL;
++
++ for (i = 0; i < pdata->num_gpios; i++) {
++ int gpio = pdata->gpios[i];
++
++ ret = devm_gpio_request(&pdev->dev, gpio,
++ GPIO_LATCH_DRIVER_NAME);
++ if (ret)
++ return ret;
++ }
++
++ glc = devm_kzalloc(&pdev->dev, sizeof(*glc), GFP_KERNEL);
++ if (!glc)
++ return -ENOMEM;
++
++ mutex_init(&glc->mutex);
++ mutex_init(&glc->latch_mutex);
++
++ size = pdata->num_gpios * sizeof(glc->gpios[0]);
++ glc->gpios = devm_kzalloc(&pdev->dev, size , GFP_KERNEL);
++ if (!glc->gpios)
++ return -ENOMEM;
++
++ memcpy(glc->gpios, pdata->gpios, size);
++
++ glc->le_gpio = glc->gpios[pdata->le_gpio_index];
++ glc->le_active_low = pdata->le_active_low;
++
++ gc = &glc->gc;
++
++ gc->label = GPIO_LATCH_DRIVER_NAME;
++ gc->base = pdata->base;
++ gc->can_sleep = true;
++ gc->ngpio = pdata->num_gpios;
++ gc->get = gpio_latch_get;
++ gc->set = gpio_latch_set;
++ gc->direction_input = gpio_latch_direction_input,
++ gc->direction_output = gpio_latch_direction_output;
++
++ platform_set_drvdata(pdev, glc);
++
++ ret = gpiochip_add(&glc->gc);
++ if (ret)
++ return ret;
++
++ return 0;
++}
++
++static int gpio_latch_remove(struct platform_device *pdev)
++{
++ struct gpio_latch_chip *glc = platform_get_drvdata(pdev);
++
++ gpiochip_remove(&glc->gc);
++ return 0;
++}
++
++
++static struct platform_driver gpio_latch_driver = {
++ .probe = gpio_latch_probe,
++ .remove = gpio_latch_remove,
++ .driver = {
++ .name = GPIO_LATCH_DRIVER_NAME,
++ .owner = THIS_MODULE,
++ },
++};
++
++static int __init gpio_latch_init(void)
++{
++ return platform_driver_register(&gpio_latch_driver);
++}
++
++postcore_initcall(gpio_latch_init);
++
++MODULE_DESCRIPTION("GPIO latch driver");
++MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
++MODULE_LICENSE("GPL v2");
++MODULE_ALIAS("platform:" GPIO_LATCH_DRIVER_NAME);
+diff -Nur linux-4.1.6.orig/drivers/gpio/Kconfig linux-4.1.6/drivers/gpio/Kconfig
+--- linux-4.1.6.orig/drivers/gpio/Kconfig 2015-08-17 05:52:51.000000000 +0200
++++ linux-4.1.6/drivers/gpio/Kconfig 2015-09-16 00:47:15.279630571 +0200
+@@ -988,4 +988,9 @@
+
+ endmenu
+
++config GPIO_LATCH
++ tristate "GPIO latch driver"
++ help
++ Say yes here to enable a GPIO latch driver.
++
+ endif
+diff -Nur linux-4.1.6.orig/drivers/gpio/Kconfig.orig linux-4.1.6/drivers/gpio/Kconfig.orig
+--- linux-4.1.6.orig/drivers/gpio/Kconfig.orig 1970-01-01 01:00:00.000000000 +0100
++++ linux-4.1.6/drivers/gpio/Kconfig.orig 2015-08-17 05:52:51.000000000 +0200
+@@ -0,0 +1,991 @@
++#
++# GPIO infrastructure and drivers
++#
++
++config ARCH_HAVE_CUSTOM_GPIO_H
++ bool
++ help
++ Selecting this config option from the architecture Kconfig allows
++ the architecture to provide a custom asm/gpio.h implementation
++ overriding the default implementations. New uses of this are
++ strongly discouraged.
++
++config ARCH_WANT_OPTIONAL_GPIOLIB
++ bool
++ help
++ Select this config option from the architecture Kconfig, if
++ it is possible to use gpiolib on the architecture, but let the
++ user decide whether to actually build it or not.
++ Select this instead of ARCH_REQUIRE_GPIOLIB, if your architecture does
++ not depend on GPIOs being available, but rather let the user
++ decide whether he needs it or not.
++
++config ARCH_REQUIRE_GPIOLIB
++ bool
++ select GPIOLIB
++ help
++ Platforms select gpiolib if they use this infrastructure
++ for all their GPIOs, usually starting with ones integrated
++ into SOC processors.
++ Selecting this from the architecture code will cause the gpiolib
++ code to always get built in.
++
++
++menuconfig GPIOLIB
++ bool "GPIO Support"
++ depends on ARCH_WANT_OPTIONAL_GPIOLIB || ARCH_REQUIRE_GPIOLIB
++ help
++ This enables GPIO support through the generic GPIO library.
++ You only need to enable this, if you also want to enable
++ one or more of the GPIO drivers below.
++
++ If unsure, say N.
++
++if GPIOLIB
++
++config GPIO_DEVRES
++ def_bool y
++ depends on HAS_IOMEM
++
++config OF_GPIO
++ def_bool y
++ depends on OF
++
++config GPIO_ACPI
++ def_bool y
++ depends on ACPI
++
++config GPIOLIB_IRQCHIP
++ select IRQ_DOMAIN
++ bool
++
++config DEBUG_GPIO
++ bool "Debug GPIO calls"
++ depends on DEBUG_KERNEL
++ help
++ Say Y here to add some extra checks and diagnostics to GPIO calls.
++ These checks help ensure that GPIOs have been properly initialized
++ before they are used, and that sleeping calls are not made from
++ non-sleeping contexts. They can make bitbanged serial protocols
++ slower. The diagnostics help catch the type of setup errors
++ that are most common when setting up new platforms or boards.
++
++config GPIO_SYSFS
++ bool "/sys/class/gpio/... (sysfs interface)"
++ depends on SYSFS
++ help
++ Say Y here to add a sysfs interface for GPIOs.
++
++ This is mostly useful to work around omissions in a system's
++ kernel support. Those are common in custom and semicustom
++ hardware assembled using standard kernels with a minimum of
++ custom patches. In those cases, userspace code may import
++ a given GPIO from the kernel, if no kernel driver requested it.
++
++ Kernel drivers may also request that a particular GPIO be
++ exported to userspace; this can be useful when debugging.
++
++config GPIO_GENERIC
++ tristate
++
++# put drivers in the right section, in alphabetical order
++
++# This symbol is selected by both I2C and SPI expanders
++config GPIO_MAX730X
++ tristate
++
++menu "Memory mapped GPIO drivers"
++
++config GPIO_74XX_MMIO
++ tristate "GPIO driver for 74xx-ICs with MMIO access"
++ depends on OF_GPIO
++ select GPIO_GENERIC
++ help
++ Say yes here to support GPIO functionality for 74xx-compatible ICs
++ with MMIO access. Compatible models include:
++ 1 bit: 741G125 (Input), 741G74 (Output)
++ 2 bits: 742G125 (Input), 7474 (Output)
++ 4 bits: 74125 (Input), 74175 (Output)
++ 6 bits: 74365 (Input), 74174 (Output)
++ 8 bits: 74244 (Input), 74273 (Output)
++ 16 bits: 741624 (Input), 7416374 (Output)
++
++config GPIO_ALTERA
++ tristate "Altera GPIO"
++ depends on OF_GPIO
++ select GPIO_GENERIC
++ select GPIOLIB_IRQCHIP
++ help
++ Say Y or M here to build support for the Altera PIO device.
++
++ If driver is built as a module it will be called gpio-altera.
++
++config GPIO_BCM_KONA
++ bool "Broadcom Kona GPIO"
++ depends on OF_GPIO && (ARCH_BCM_MOBILE || COMPILE_TEST)
++ help
++ Turn on GPIO support for Broadcom "Kona" chips.
++
++config GPIO_CLPS711X
++ tristate "CLPS711X GPIO support"
++ depends on ARCH_CLPS711X || COMPILE_TEST
++ select GPIO_GENERIC
++ help
++ Say yes here to support GPIO on CLPS711X SoCs.
++
++config GPIO_DAVINCI
++ bool "TI Davinci/Keystone GPIO support"
++ default y if ARCH_DAVINCI
++ depends on ARM && (ARCH_DAVINCI || ARCH_KEYSTONE)
++ help
++ Say yes here to enable GPIO support for TI Davinci/Keystone SoCs.
++
++config GPIO_DWAPB
++ tristate "Synopsys DesignWare APB GPIO driver"
++ select GPIO_GENERIC
++ select GENERIC_IRQ_CHIP
++ help
++ Say Y or M here to build support for the Synopsys DesignWare APB
++ GPIO block.
++
++config GPIO_EM
++ tristate "Emma Mobile GPIO"
++ depends on ARM && OF_GPIO
++ help
++ Say yes here to support GPIO on Renesas Emma Mobile SoCs.
++
++config GPIO_EP93XX
++ def_bool y
++ depends on ARCH_EP93XX
++ select GPIO_GENERIC
++
++config GPIO_F7188X
++ tristate "F71869, F71869A, F71882FG and F71889F GPIO support"
++ depends on X86
++ help
++ This option enables support for GPIOs found on Fintek Super-I/O
++ chips F71869, F71869A, F71882FG and F71889F.
++
++ To compile this driver as a module, choose M here: the module will
++ be called f7188x-gpio.
++
++config GPIO_GE_FPGA
++ bool "GE FPGA based GPIO"
++ depends on GE_FPGA
++ select GPIO_GENERIC
++ help
++ Support for common GPIO functionality provided on some GE Single Board
++ Computers.
++
++ This driver provides basic support (configure as input or output, read
++ and write pin state) for GPIO implemented in a number of GE single
++ board computers.
++
++config GPIO_GENERIC_PLATFORM
++ tristate "Generic memory-mapped GPIO controller support (MMIO platform device)"
++ select GPIO_GENERIC
++ help
++ Say yes here to support basic platform_device memory-mapped GPIO controllers.
++
++config GPIO_GRGPIO
++ tristate "Aeroflex Gaisler GRGPIO support"
++ depends on OF
++ select GPIO_GENERIC
++ select IRQ_DOMAIN
++ help
++ Select this to support Aeroflex Gaisler GRGPIO cores from the GRLIB
++ VHDL IP core library.
++
++config GPIO_ICH
++ tristate "Intel ICH GPIO"
++ depends on PCI && X86
++ select MFD_CORE
++ select LPC_ICH
++ help
++ Say yes here to support the GPIO functionality of a number of Intel
++ ICH-based chipsets. Currently supported devices: ICH6, ICH7, ICH8
++ ICH9, ICH10, Series 5/3400 (eg Ibex Peak), Series 6/C200 (eg
++ Cougar Point), NM10 (Tiger Point), and 3100 (Whitmore Lake).
++
++ If unsure, say N.
++
++config GPIO_IOP
++ tristate "Intel IOP GPIO"
++ depends on ARM && (ARCH_IOP32X || ARCH_IOP33X)
++ help
++ Say yes here to support the GPIO functionality of a number of Intel
++ IOP32X or IOP33X.
++
++ If unsure, say N.
++
++config GPIO_IT8761E
++ tristate "IT8761E GPIO support"
++ depends on X86 # unconditional access to IO space.
++ help
++ Say yes here to support GPIO functionality of IT8761E super I/O chip.
++
++config GPIO_LOONGSON
++ bool "Loongson-2/3 GPIO support"
++ depends on CPU_LOONGSON2 || CPU_LOONGSON3
++ help
++ driver for GPIO functionality on Loongson-2F/3A/3B processors.
++
++config GPIO_LYNXPOINT
++ tristate "Intel Lynxpoint GPIO support"
++ depends on ACPI && X86
++ select GPIOLIB_IRQCHIP
++ help
++ driver for GPIO functionality on Intel Lynxpoint PCH chipset
++ Requires ACPI device enumeration code to set up a platform device.
++
++config GPIO_MB86S7X
++ bool "GPIO support for Fujitsu MB86S7x Platforms"
++ depends on ARCH_MB86S7X
++ help
++ Say yes here to support the GPIO controller in Fujitsu MB86S70 SoCs.
++
++config GPIO_MM_LANTIQ
++ bool "Lantiq Memory mapped GPIOs"
++ depends on LANTIQ && SOC_XWAY
++ help
++ This enables support for memory mapped GPIOs on the External Bus Unit
++ (EBU) found on Lantiq SoCs. The gpios are output only as they are
++ created by attaching a 16bit latch to the bus.
++
++config GPIO_MOXART
++ bool "MOXART GPIO support"
++ depends on ARCH_MOXART
++ select GPIO_GENERIC
++ help
++ Select this option to enable GPIO driver for
++ MOXA ART SoC devices.
++
++config GPIO_MPC5200
++ def_bool y
++ depends on PPC_MPC52xx
++
++config GPIO_MPC8XXX
++ bool "MPC512x/MPC8xxx GPIO support"
++ depends on PPC_MPC512x || PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || \
++ FSL_SOC_BOOKE || PPC_86xx
++ help
++ Say Y here if you're going to use hardware that connects to the
++ MPC512x/831x/834x/837x/8572/8610 GPIOs.
++
++config GPIO_MSM_V2
++ tristate "Qualcomm MSM GPIO v2"
++ depends on GPIOLIB && OF && ARCH_QCOM
++ help
++ Say yes here to support the GPIO interface on ARM v7 based
++ Qualcomm MSM chips. Most of the pins on the MSM can be
++ selected for GPIO, and are controlled by this driver.
++
++config GPIO_MVEBU
++ def_bool y
++ depends on PLAT_ORION
++ depends on OF
++ select GPIO_GENERIC
++ select GENERIC_IRQ_CHIP
++
++config GPIO_MXC
++ def_bool y
++ depends on ARCH_MXC
++ select GPIO_GENERIC
++ select GENERIC_IRQ_CHIP
++
++config GPIO_MXS
++ def_bool y
++ depends on ARCH_MXS
++ select GPIO_GENERIC
++ select GENERIC_IRQ_CHIP
++
++config GPIO_OCTEON
++ tristate "Cavium OCTEON GPIO"
++ depends on GPIOLIB && CAVIUM_OCTEON_SOC
++ default y
++ help
++ Say yes here to support the on-chip GPIO lines on the OCTEON
++ family of SOCs.
++
++config GPIO_OMAP
++ bool "TI OMAP GPIO support" if COMPILE_TEST && !ARCH_OMAP2PLUS
++ default y if ARCH_OMAP
++ depends on ARM
++ select GENERIC_IRQ_CHIP
++ select GPIOLIB_IRQCHIP
++ help
++ Say yes here to enable GPIO support for TI OMAP SoCs.
++
++config GPIO_PL061
++ bool "PrimeCell PL061 GPIO support"
++ depends on ARM_AMBA
++ select IRQ_DOMAIN
++ select GPIOLIB_IRQCHIP
++ help
++ Say yes here to support the PrimeCell PL061 GPIO device
++
++config GPIO_PXA
++ bool "PXA GPIO support"
++ depends on ARCH_PXA || ARCH_MMP
++ help
++ Say yes here to support the PXA GPIO device
++
++config GPIO_RCAR
++ tristate "Renesas R-Car GPIO"
++ depends on ARM && (ARCH_SHMOBILE || COMPILE_TEST)
++ select GPIOLIB_IRQCHIP
++ help
++ Say yes here to support GPIO on Renesas R-Car SoCs.
++
++config GPIO_SAMSUNG
++ bool
++ depends on PLAT_SAMSUNG
++ help
++ Legacy GPIO support. Use only for platforms without support for
++ pinctrl.
++
++config GPIO_SCH
++ tristate "Intel SCH/TunnelCreek/Centerton/Quark X1000 GPIO"
++ depends on PCI && X86
++ select MFD_CORE
++ select LPC_SCH
++ help
++ Say yes here to support GPIO interface on Intel Poulsbo SCH,
++ Intel Tunnel Creek processor, Intel Centerton processor or
++ Intel Quark X1000 SoC.
++
++ The Intel SCH contains a total of 14 GPIO pins. Ten GPIOs are
++ powered by the core power rail and are turned off during sleep
++ modes (S3 and higher). The remaining four GPIOs are powered by
++ the Intel SCH suspend power supply. These GPIOs remain
++ active during S3. The suspend powered GPIOs can be used to wake the
++ system from the Suspend-to-RAM state.
++
++ The Intel Tunnel Creek processor has 5 GPIOs powered by the
++ core power rail and 9 from suspend power supply.
++
++ The Intel Centerton processor has a total of 30 GPIO pins.
++ Twenty-one are powered by the core power rail and 9 from the
++ suspend power supply.
++
++ The Intel Quark X1000 SoC has 2 GPIOs powered by the core
++ power well and 6 from the suspend power well.
++
++config GPIO_SCH311X
++ tristate "SMSC SCH311x SuperI/O GPIO"
++ help
++ Driver to enable the GPIOs found on SMSC SMSC SCH3112, SCH3114 and
++ SCH3116 "Super I/O" chipsets.
++
++ To compile this driver as a module, choose M here: the module will
++ be called gpio-sch311x.
++
++config GPIO_SPEAR_SPICS
++ bool "ST SPEAr13xx SPI Chip Select as GPIO support"
++ depends on PLAT_SPEAR
++ select GENERIC_IRQ_CHIP
++ help
++ Say yes here to support ST SPEAr SPI Chip Select as GPIO device
++
++config GPIO_STA2X11
++ bool "STA2x11/ConneXt GPIO support"
++ depends on MFD_STA2X11
++ select GENERIC_IRQ_CHIP
++ help
++ Say yes here to support the STA2x11/ConneXt GPIO device.
++ The GPIO module has 128 GPIO pins with alternate functions.
++
++config GPIO_STP_XWAY
++ bool "XWAY STP GPIOs"
++ depends on SOC_XWAY
++ help
++ This enables support for the Serial To Parallel (STP) unit found on
++ XWAY SoC. The STP allows the SoC to drive a shift registers cascade,
++ that can be up to 24 bit. This peripheral is aimed at driving leds.
++ Some of the gpios/leds can be auto updated by the soc with dsl and
++ phy status.
++
++config GPIO_SYSCON
++ tristate "GPIO based on SYSCON"
++ depends on MFD_SYSCON && OF
++ help
++ Say yes here to support GPIO functionality though SYSCON driver.
++
++config GPIO_TB10X
++ bool
++ select GENERIC_IRQ_CHIP
++ select OF_GPIO
++
++config GPIO_TS5500
++ tristate "TS-5500 DIO blocks and compatibles"
++ depends on TS5500 || COMPILE_TEST
++ help
++ This driver supports Digital I/O exposed by pin blocks found on some
++ Technologic Systems platforms. It includes, but is not limited to, 3
++ blocks of the TS-5500: DIO1, DIO2 and the LCD port, and the TS-5600
++ LCD port.
++
++config GPIO_TZ1090
++ bool "Toumaz Xenif TZ1090 GPIO support"
++ depends on SOC_TZ1090
++ select GENERIC_IRQ_CHIP
++ default y
++ help
++ Say yes here to support Toumaz Xenif TZ1090 GPIOs.
++
++config GPIO_TZ1090_PDC
++ bool "Toumaz Xenif TZ1090 PDC GPIO support"
++ depends on SOC_TZ1090
++ default y
++ help
++ Say yes here to support Toumaz Xenif TZ1090 PDC GPIOs.
++
++config GPIO_VF610
++ def_bool y
++ depends on ARCH_MXC && SOC_VF610
++ select GPIOLIB_IRQCHIP
++ help
++ Say yes here to support Vybrid vf610 GPIOs.
++
++config GPIO_VR41XX
++ tristate "NEC VR4100 series General-purpose I/O Uint support"
++ depends on CPU_VR41XX
++ help
++ Say yes here to support the NEC VR4100 series General-purpose I/O Uint
++
++config GPIO_VX855
++ tristate "VIA VX855/VX875 GPIO"
++ depends on PCI
++ select MFD_CORE
++ select MFD_VX855
++ help
++ Support access to the VX855/VX875 GPIO lines through the gpio library.
++
++ This driver provides common support for accessing the device,
++ additional drivers must be enabled in order to use the
++ functionality of the device.
++
++config GPIO_XGENE
++ bool "APM X-Gene GPIO controller support"
++ depends on ARM64 && OF_GPIO
++ help
++ This driver is to support the GPIO block within the APM X-Gene SoC
++ platform's generic flash controller. The GPIO pins are muxed with
++ the generic flash controller's address and data pins. Say yes
++ here to enable the GFC GPIO functionality.
++
++config GPIO_XGENE_SB
++ tristate "APM X-Gene GPIO standby controller support"
++ depends on ARCH_XGENE && OF_GPIO
++ select GPIO_GENERIC
++ help
++ This driver supports the GPIO block within the APM X-Gene
++ Standby Domain. Say yes here to enable the GPIO functionality.
++
++config GPIO_XILINX
++ tristate "Xilinx GPIO support"
++ depends on OF_GPIO && (PPC || MICROBLAZE || ARCH_ZYNQ || X86)
++ help
++ Say yes here to support the Xilinx FPGA GPIO device
++
++config GPIO_XTENSA
++ bool "Xtensa GPIO32 support"
++ depends on XTENSA
++ depends on HAVE_XTENSA_GPIO32
++ depends on !SMP
++ help
++ Say yes here to support the Xtensa internal GPIO32 IMPWIRE (input)
++ and EXPSTATE (output) ports
++
++config GPIO_ZEVIO
++ bool "LSI ZEVIO SoC memory mapped GPIOs"
++ depends on ARM && OF_GPIO
++ help
++ Say yes here to support the GPIO controller in LSI ZEVIO SoCs.
++
++config GPIO_ZYNQ
++ tristate "Xilinx Zynq GPIO support"
++ depends on ARCH_ZYNQ
++ select GPIOLIB_IRQCHIP
++ help
++ Say yes here to support Xilinx Zynq GPIO controller.
++
++endmenu
++
++menu "I2C GPIO expanders"
++ depends on I2C
++
++config GPIO_ADP5588
++ tristate "ADP5588 I2C GPIO expander"
++ depends on I2C
++ help
++ This option enables support for 18 GPIOs found
++ on Analog Devices ADP5588 GPIO Expanders.
++
++config GPIO_ADP5588_IRQ
++ bool "Interrupt controller support for ADP5588"
++ depends on GPIO_ADP5588=y
++ help
++ Say yes here to enable the adp5588 to be used as an interrupt
++ controller. It requires the driver to be built in the kernel.
++
++config GPIO_ADNP
++ tristate "Avionic Design N-bit GPIO expander"
++ depends on I2C && OF_GPIO
++ select GPIOLIB_IRQCHIP
++ help
++ This option enables support for N GPIOs found on Avionic Design
++ I2C GPIO expanders. The register space will be extended by powers
++ of two, so the controller will need to accommodate for that. For
++ example: if a controller provides 48 pins, 6 registers will be
++ enough to represent all pins, but the driver will assume a
++ register layout for 64 pins (8 registers).
++
++config GPIO_MAX7300
++ tristate "Maxim MAX7300 GPIO expander"
++ depends on I2C
++ select GPIO_MAX730X
++ help
++ GPIO driver for Maxim MAX7300 I2C-based GPIO expander.
++
++config GPIO_MAX732X
++ tristate "MAX7319, MAX7320-7327 I2C Port Expanders"
++ depends on I2C
++ help
++ Say yes here to support the MAX7319, MAX7320-7327 series of I2C
++ Port Expanders. Each IO port on these chips has a fixed role of
++ Input (designated by 'I'), Push-Pull Output ('O'), or Open-Drain
++ Input and Output (designed by 'P'). The combinations are listed
++ below:
++
++ 8 bits: max7319 (8I), max7320 (8O), max7321 (8P),
++ max7322 (4I4O), max7323 (4P4O)
++
++ 16 bits: max7324 (8I8O), max7325 (8P8O),
++ max7326 (4I12O), max7327 (4P12O)
++
++ Board setup code must specify the model to use, and the start
++ number for these GPIOs.
++
++config GPIO_MAX732X_IRQ
++ bool "Interrupt controller support for MAX732x"
++ depends on GPIO_MAX732X=y
++ select GPIOLIB_IRQCHIP
++ help
++ Say yes here to enable the max732x to be used as an interrupt
++ controller. It requires the driver to be built in the kernel.
++
++config GPIO_MC9S08DZ60
++ bool "MX35 3DS BOARD MC9S08DZ60 GPIO functions"
++ depends on I2C=y && MACH_MX35_3DS
++ help
++ Select this to enable the MC9S08DZ60 GPIO driver
++
++config GPIO_PCA953X
++ tristate "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports"
++ depends on I2C
++ help
++ Say yes here to provide access to several register-oriented
++ SMBus I/O expanders, made mostly by NXP or TI. Compatible
++ models include:
++
++ 4 bits: pca9536, pca9537
++
++ 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554,
++ pca9556, pca9557, pca9574, tca6408, xra1202
++
++ 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575,
++ tca6416
++
++ 24 bits: tca6424
++
++ 40 bits: pca9505, pca9698
++
++config GPIO_PCA953X_IRQ
++ bool "Interrupt controller support for PCA953x"
++ depends on GPIO_PCA953X=y
++ select GPIOLIB_IRQCHIP
++ help
++ Say yes here to enable the pca953x to be used as an interrupt
++ controller. It requires the driver to be built in the kernel.
++
++config GPIO_PCF857X
++ tristate "PCF857x, PCA{85,96}7x, and MAX732[89] I2C GPIO expanders"
++ depends on I2C
++ select GPIOLIB_IRQCHIP
++ select IRQ_DOMAIN
++ help
++ Say yes here to provide access to most "quasi-bidirectional" I2C
++ GPIO expanders used for additional digital outputs or inputs.
++ Most of these parts are from NXP, though TI is a second source for
++ some of them. Compatible models include:
++
++ 8 bits: pcf8574, pcf8574a, pca8574, pca8574a,
++ pca9670, pca9672, pca9674, pca9674a,
++ max7328, max7329
++
++ 16 bits: pcf8575, pcf8575c, pca8575,
++ pca9671, pca9673, pca9675
++
++ Your board setup code will need to declare the expanders in
++ use, and assign numbers to the GPIOs they expose. Those GPIOs
++ can then be used from drivers and other kernel code, just like
++ other GPIOs, but only accessible from task contexts.
++
++ This driver provides an in-kernel interface to those GPIOs using
++ platform-neutral GPIO calls.
++
++config GPIO_SX150X
++ bool "Semtech SX150x I2C GPIO expander"
++ depends on I2C=y
++ select GPIOLIB_IRQCHIP
++ default n
++ help
++ Say yes here to provide support for Semtech SX150-series I2C
++ GPIO expanders. Compatible models include:
++
++ 8 bits: sx1508q
++ 16 bits: sx1509q
++
++endmenu
++
++menu "MFD GPIO expanders"
++
++config GPIO_ADP5520
++ tristate "GPIO Support for ADP5520 PMIC"
++ depends on PMIC_ADP5520
++ help
++ This option enables support for on-chip GPIO found
++ on Analog Devices ADP5520 PMICs.
++
++config GPIO_ARIZONA
++ tristate "Wolfson Microelectronics Arizona class devices"
++ depends on MFD_ARIZONA
++ help
++ Support for GPIOs on Wolfson Arizona class devices.
++
++config GPIO_CRYSTAL_COVE
++ tristate "GPIO support for Crystal Cove PMIC"
++ depends on INTEL_SOC_PMIC
++ select GPIOLIB_IRQCHIP
++ help
++ Support for GPIO pins on Crystal Cove PMIC.
++
++ Say Yes if you have a Intel SoC based tablet with Crystal Cove PMIC
++ inside.
++
++ This driver can also be built as a module. If so, the module will be
++ called gpio-crystalcove.
++
++config GPIO_CS5535
++ tristate "AMD CS5535/CS5536 GPIO support"
++ depends on MFD_CS5535
++ help
++ The AMD CS5535 and CS5536 southbridges support 28 GPIO pins that
++ can be used for quite a number of things. The CS5535/6 is found on
++ AMD Geode and Lemote Yeeloong devices.
++
++ If unsure, say N.
++
++config GPIO_DA9052
++ tristate "Dialog DA9052 GPIO"
++ depends on PMIC_DA9052
++ help
++ Say yes here to enable the GPIO driver for the DA9052 chip.
++
++config GPIO_DA9055
++ tristate "Dialog Semiconductor DA9055 GPIO"
++ depends on MFD_DA9055
++ help
++ Say yes here to enable the GPIO driver for the DA9055 chip.
++
++ The Dialog DA9055 PMIC chip has 3 GPIO pins that can be
++ be controller by this driver.
++
++ If driver is built as a module it will be called gpio-da9055.
++
++config GPIO_DLN2
++ tristate "Diolan DLN2 GPIO support"
++ depends on MFD_DLN2
++ select GPIOLIB_IRQCHIP
++
++ help
++ Select this option to enable GPIO driver for the Diolan DLN2
++ board.
++
++ This driver can also be built as a module. If so, the module
++ will be called gpio-dln2.
++
++config GPIO_JANZ_TTL
++ tristate "Janz VMOD-TTL Digital IO Module"
++ depends on MFD_JANZ_CMODIO
++ help
++ This enables support for the Janz VMOD-TTL Digital IO module.
++ This driver provides support for driving the pins in output
++ mode only. Input mode is not supported.
++
++config GPIO_KEMPLD
++ tristate "Kontron ETX / COMexpress GPIO"
++ depends on MFD_KEMPLD
++ help
++ This enables support for the PLD GPIO interface on some Kontron ETX
++ and COMexpress (ETXexpress) modules.
++
++ This driver can also be built as a module. If so, the module will be
++ called gpio-kempld.
++
++config GPIO_LP3943
++ tristate "TI/National Semiconductor LP3943 GPIO expander"
++ depends on MFD_LP3943
++ help
++ GPIO driver for LP3943 MFD.
++ LP3943 can be used as a GPIO expander which provides up to 16 GPIOs.
++ Open drain outputs are required for this usage.
++
++config GPIO_MSIC
++ bool "Intel MSIC mixed signal gpio support"
++ depends on MFD_INTEL_MSIC
++ help
++ Enable support for GPIO on intel MSIC controllers found in
++ intel MID devices
++
++config GPIO_PALMAS
++ bool "TI PALMAS series PMICs GPIO"
++ depends on MFD_PALMAS
++ help
++ Select this option to enable GPIO driver for the TI PALMAS
++ series chip family.
++
++config GPIO_RC5T583
++ bool "RICOH RC5T583 GPIO"
++ depends on MFD_RC5T583
++ help
++ Select this option to enable GPIO driver for the Ricoh RC5T583
++ chip family.
++ This driver provides the support for driving/reading the gpio pins
++ of RC5T583 device through standard gpio library.
++
++config GPIO_STMPE
++ bool "STMPE GPIOs"
++ depends on MFD_STMPE
++ depends on OF_GPIO
++ select GPIOLIB_IRQCHIP
++ help
++ This enables support for the GPIOs found on the STMPE I/O
++ Expanders.
++
++config GPIO_TC3589X
++ bool "TC3589X GPIOs"
++ depends on MFD_TC3589X
++ depends on OF_GPIO
++ select GPIOLIB_IRQCHIP
++ help
++ This enables support for the GPIOs found on the TC3589X
++ I/O Expander.
++
++config GPIO_TIMBERDALE
++ bool "Support for timberdale GPIO IP"
++ depends on MFD_TIMBERDALE
++ ---help---
++ Add support for the GPIO IP in the timberdale FPGA.
++
++config GPIO_TPS6586X
++ bool "TPS6586X GPIO"
++ depends on MFD_TPS6586X
++ help
++ Select this option to enable GPIO driver for the TPS6586X
++ chip family.
++
++config GPIO_TPS65910
++ bool "TPS65910 GPIO"
++ depends on MFD_TPS65910
++ help
++ Select this option to enable GPIO driver for the TPS65910
++ chip family.
++
++config GPIO_TPS65912
++ tristate "TI TPS65912 GPIO"
++ depends on (MFD_TPS65912_I2C || MFD_TPS65912_SPI)
++ help
++ This driver supports TPS65912 gpio chip
++
++config GPIO_TWL4030
++ tristate "TWL4030, TWL5030, and TPS659x0 GPIOs"
++ depends on TWL4030_CORE
++ help
++ Say yes here to access the GPIO signals of various multi-function
++ power management chips from Texas Instruments.
++
++config GPIO_TWL6040
++ tristate "TWL6040 GPO"
++ depends on TWL6040_CORE
++ help
++ Say yes here to access the GPO signals of twl6040
++ audio chip from Texas Instruments.
++
++config GPIO_UCB1400
++ tristate "Philips UCB1400 GPIO"
++ depends on UCB1400_CORE
++ help
++ This enables support for the Philips UCB1400 GPIO pins.
++ The UCB1400 is an AC97 audio codec.
++
++config GPIO_WM831X
++ tristate "WM831x GPIOs"
++ depends on MFD_WM831X
++ help
++ Say yes here to access the GPIO signals of WM831x power management
++ chips from Wolfson Microelectronics.
++
++config GPIO_WM8350
++ tristate "WM8350 GPIOs"
++ depends on MFD_WM8350
++ help
++ Say yes here to access the GPIO signals of WM8350 power management
++ chips from Wolfson Microelectronics.
++
++config GPIO_WM8994
++ tristate "WM8994 GPIOs"
++ depends on MFD_WM8994
++ help
++ Say yes here to access the GPIO signals of WM8994 audio hub
++ CODECs from Wolfson Microelectronics.
++
++endmenu
++
++menu "PCI GPIO expanders"
++ depends on PCI
++
++config GPIO_AMD8111
++ tristate "AMD 8111 GPIO driver"
++ depends on PCI
++ help
++ The AMD 8111 south bridge contains 32 GPIO pins which can be used.
++
++ Note, that usually system firmware/ACPI handles GPIO pins on their
++ own and users might easily break their systems with uncarefull usage
++ of this driver!
++
++ If unsure, say N
++
++config GPIO_BT8XX
++ tristate "BT8XX GPIO abuser"
++ depends on PCI && VIDEO_BT848=n
++ help
++ The BT8xx frame grabber chip has 24 GPIO pins that can be abused
++ as a cheap PCI GPIO card.
++
++ This chip can be found on Miro, Hauppauge and STB TV-cards.
++
++ The card needs to be physically altered for using it as a
++ GPIO card. For more information on how to build a GPIO card
++ from a BT8xx TV card, see the documentation file at
++ Documentation/bt8xxgpio.txt
++
++ If unsure, say N.
++
++config GPIO_INTEL_MID
++ bool "Intel Mid GPIO support"
++ depends on PCI && X86
++ select GPIOLIB_IRQCHIP
++ help
++ Say Y here to support Intel Mid GPIO.
++
++config GPIO_ML_IOH
++ tristate "OKI SEMICONDUCTOR ML7213 IOH GPIO support"
++ depends on PCI
++ select GENERIC_IRQ_CHIP
++ help
++ ML7213 is companion chip for Intel Atom E6xx series.
++ This driver can be used for OKI SEMICONDUCTOR ML7213 IOH(Input/Output
++ Hub) which is for IVI(In-Vehicle Infotainment) use.
++ This driver can access the IOH's GPIO device.
++
++config GPIO_PCH
++ tristate "Intel EG20T PCH/LAPIS Semiconductor IOH(ML7223/ML7831) GPIO"
++ depends on PCI && (X86_32 || COMPILE_TEST)
++ select GENERIC_IRQ_CHIP
++ help
++ This driver is for PCH(Platform controller Hub) GPIO of Intel Topcliff
++ which is an IOH(Input/Output Hub) for x86 embedded processor.
++ This driver can access PCH GPIO device.
++
++ This driver also can be used for LAPIS Semiconductor IOH(Input/
++ Output Hub), ML7223 and ML7831.
++ ML7223 IOH is for MP(Media Phone) use.
++ ML7831 IOH is for general purpose use.
++ ML7223/ML7831 is companion chip for Intel Atom E6xx series.
++ ML7223/ML7831 is completely compatible for Intel EG20T PCH.
++
++config GPIO_RDC321X
++ tristate "RDC R-321x GPIO support"
++ depends on PCI
++ select MFD_CORE
++ select MFD_RDC321X
++ help
++ Support for the RDC R321x SoC GPIOs over southbridge
++ PCI configuration space.
++
++config GPIO_SODAVILLE
++ bool "Intel Sodaville GPIO support"
++ depends on X86 && PCI && OF
++ select GPIO_GENERIC
++ select GENERIC_IRQ_CHIP
++ help
++ Say Y here to support Intel Sodaville GPIO.
++
++endmenu
++
++menu "SPI GPIO expanders"
++ depends on SPI_MASTER
++
++config GPIO_74X164
++ tristate "74x164 serial-in/parallel-out 8-bits shift register"
++ depends on SPI_MASTER && OF
++ help
++ Driver for 74x164 compatible serial-in/parallel-out 8-outputs
++ shift registers. This driver can be used to provide access
++ to more gpio outputs.
++
++config GPIO_MAX7301
++ tristate "Maxim MAX7301 GPIO expander"
++ depends on SPI_MASTER
++ select GPIO_MAX730X
++ help
++ GPIO driver for Maxim MAX7301 SPI-based GPIO expander.
++
++config GPIO_MCP23S08
++ tristate "Microchip MCP23xxx I/O expander"
++ depends on (SPI_MASTER && !I2C) || I2C
++ help
++ SPI/I2C driver for Microchip MCP23S08/MCP23S17/MCP23008/MCP23017
++ I/O expanders.
++ This provides a GPIO interface supporting inputs and outputs.
++ The I2C versions of the chips can be used as interrupt-controller.
++
++config GPIO_MC33880
++ tristate "Freescale MC33880 high-side/low-side switch"
++ depends on SPI_MASTER
++ help
++ SPI driver for Freescale MC33880 high-side/low-side switch.
++ This provides GPIO interface supporting inputs and outputs.
++
++endmenu
++
++menu "USB GPIO expanders"
++ depends on USB
++
++config GPIO_VIPERBOARD
++ tristate "Viperboard GPIO a & b support"
++ depends on MFD_VIPERBOARD && USB
++ help
++ Say yes here to access the GPIO signals of Nano River
++ Technologies Viperboard. There are two GPIO chips on the
++ board: gpioa and gpiob.
++ See viperboard API specification and Nano
++ River Tech's viperboard.h for detailed meaning
++ of the module parameters.
++
++endmenu
++
++endif
+diff -Nur linux-4.1.6.orig/drivers/gpio/Makefile linux-4.1.6/drivers/gpio/Makefile
+--- linux-4.1.6.orig/drivers/gpio/Makefile 2015-08-17 05:52:51.000000000 +0200
++++ linux-4.1.6/drivers/gpio/Makefile 2015-09-16 00:47:15.279630571 +0200
+@@ -42,6 +42,7 @@
+ obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o
+ obj-$(CONFIG_ARCH_KS8695) += gpio-ks8695.o
+ obj-$(CONFIG_GPIO_INTEL_MID) += gpio-intel-mid.o
++obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o
+ obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o
+ obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o
+ obj-$(CONFIG_ARCH_LPC32XX) += gpio-lpc32xx.o
+diff -Nur linux-4.1.6.orig/include/linux/platform_data/gpio-latch.h linux-4.1.6/include/linux/platform_data/gpio-latch.h
+--- linux-4.1.6.orig/include/linux/platform_data/gpio-latch.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-4.1.6/include/linux/platform_data/gpio-latch.h 2015-09-16 00:48:10.204407551 +0200
+@@ -0,0 +1,14 @@
++#ifndef _GPIO_LATCH_H_
++#define _GPIO_LATCH_H_
++
++#define GPIO_LATCH_DRIVER_NAME "gpio-latch"
++
++struct gpio_latch_platform_data {
++ int base;
++ int num_gpios;
++ int *gpios;
++ int le_gpio_index;
++ bool le_active_low;
++};
++
++#endif /* _GPIO_LATCH_H_ */