diff options
Diffstat (limited to 'target/linux/patches/6.1.69')
10 files changed, 320 insertions, 0 deletions
diff --git a/target/linux/patches/6.1.69/armnommu-fix-thread-registers.patch b/target/linux/patches/6.1.69/armnommu-fix-thread-registers.patch new file mode 100644 index 000000000..8ab2196dc --- /dev/null +++ b/target/linux/patches/6.1.69/armnommu-fix-thread-registers.patch @@ -0,0 +1,57 @@ +From 1410ebe685f13c1699a16bf147ae1332e7fd1983 Mon Sep 17 00:00:00 2001 +From: Greg Ungerer <gerg@kernel.org> +Date: Thu, 20 Apr 2023 09:52:08 +1000 +Subject: [PATCH] ARM: start_thread: restore registers on ELF load for noMMU + +The binfmt_elf-fdpic loader is capable of loading constant displacement +ELF format binaries (like those compiled -pie) on noMMU systems as well +as elf-fdpic format binaries. The traditional ELF loader cannot be +enabled on noMMU systems. + +Commit 5e588114329c ("ARM: start_thread(): don't always clear all regs") +fixed the start_thread() code so that it maintains the required +elf-fdpic registers through to the new process, but it only does that if +current has its personality FDPIC_FUNCPTRS bit set. That is true for +elf-fdpic format binaries but will not be true for non-fdpic ELF +binaries. + +Modify the test of the FDPIC_FUNCPTRS personality bit to also carry out +the register restore if this is a noMMU system. This is not perfect, +since it will also preserve these registers on noMMU systems for all +binary format types (could be flat format for example). That won't break +anything, but it is potentially leaking some information into the new +process. But for the noMMU case we need those start time registers set to +be able to finalize the runtime loading of the -pie style ELF binary +(carry out its segment and dynamic relocation processing). + +Unfortunately the FDPIC_FUNCPTRS flag cannot just be enabled for all +elf-fdpic loaded binaries. That personality bit is used for other things +like the controlling the changed behavior for signal handling. + +There is no change in behavior for normal ELF loading on MMU systems. +A -pie style ELF binary built for noMMU systems can be load and run using +the usual ELF loader on an MMU system (elf-fdpic loader not required in +this case). + +Signed-off-by: Greg Ungerer <gerg@kernel.org> +--- + arch/arm/include/asm/processor.h | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h +index 326864f79d18..5074cc3ae4e1 100644 +--- a/arch/arm/include/asm/processor.h ++++ b/arch/arm/include/asm/processor.h +@@ -60,7 +60,8 @@ static inline void arch_thread_struct_whitelist(unsigned long *offset, + } \ + memset(regs->uregs, 0, sizeof(regs->uregs)); \ + if (IS_ENABLED(CONFIG_BINFMT_ELF_FDPIC) && \ +- current->personality & FDPIC_FUNCPTRS) { \ ++ ((! IS_ENABLED(CONFIG_MMU)) || \ ++ current->personality & FDPIC_FUNCPTRS)) { \ + regs->ARM_r7 = r7; \ + regs->ARM_r8 = r8; \ + regs->ARM_r9 = r9; \ +-- +2.25.1 + diff --git a/target/linux/patches/6.1.69/armnommu-versatile.patch b/target/linux/patches/6.1.69/armnommu-versatile.patch new file mode 100644 index 000000000..f8f10f50b --- /dev/null +++ b/target/linux/patches/6.1.69/armnommu-versatile.patch @@ -0,0 +1,101 @@ +From 77c038d93769c92ef54cdbb50388564d1b37987b Mon Sep 17 00:00:00 2001 +From: Greg Ungerer <gerg@kernel.org> +Date: Fri, 23 Sep 2016 13:37:34 +1000 +Subject: [PATCH] ARM: versatile: support configuring versatile machine for no-MMU + +Allow the arm versatile machine to be configured for no-MMU operation. + +Older kernels had the ability to build the versatile machine with the MMU +disabled (!CONFIG_MMU). Recent changes to convert the versatile machine +to device tree lost this ability. (Although older kernels could be built +they did not run due to a bug in the IO_ADDRESS() mapping on this machine). + +The motivation for this is that the versatile machine is well supported +in qemu. And this provides an excellent platform for development and +testing no-MMU support on ARM in general. + +This patch adds a versatile platform selection in the upper level arm +system type menu - where it appeared in older kernel versions - when +configuring for the no-MMU case. There is no visible change to the way +versatile is selected for the MMU enabled case. + +Signed-off-by: Greg Ungerer <gerg@kernel.org> +--- + arch/arm/Kconfig | 13 ++++++++++++- + arch/arm/include/asm/mach/map.h | 1 + + arch/arm/mach-versatile/Kconfig | 2 +- + arch/arm/mach-versatile/versatile.c | 4 ++++ + 4 files changed, 18 insertions(+), 2 deletions(-) + +diff --git a/arch/arm/mach-versatile/versatile.c b/arch/arm/mach-versatile/versatile.c +index 02ba68abe533..835b51bc597b 100644 +--- a/arch/arm/mach-versatile/versatile.c ++++ b/arch/arm/mach-versatile/versatile.c +@@ -22,7 +22,11 @@ + #include <asm/mach/map.h> + + /* macro to get at MMIO space when running virtually */ ++#ifdef CONFIG_MMU + #define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) ++#else ++#define IO_ADDRESS(x) (x) ++#endif + #define __io_address(n) ((void __iomem __force *)IO_ADDRESS(n)) + + /* +diff --git a/arch/arm/include/asm/mach/map.h b/arch/arm/include/asm/mach/map.h +index 2b8970d8e5a2..41844ab6aec5 100644 +--- a/arch/arm/include/asm/mach/map.h ++++ b/arch/arm/include/asm/mach/map.h +@@ -60,6 +60,7 @@ extern int ioremap_page(unsigned long virt, unsigned long phys, + #else + #define iotable_init(map,num) do { } while (0) + #define vm_reserve_area_early(a,s,c) do { } while (0) ++#define debug_ll_io_init() do { } while (0) + #endif + + #endif +diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig +index e24a9820e12f..342e1efa583a 100644 +--- a/arch/arm/Kconfig ++++ b/arch/arm/Kconfig +@@ -307,12 +307,23 @@ config MMU + Select if you want MMU-based virtualised addressing space + support by paged memory management. If unsure, say 'Y'. + ++choice ++ prompt "ARM system type" ++ depends on !MMU ++ default ARM_SINGLE_ARMV7M ++ + config ARM_SINGLE_ARMV7M +- def_bool !MMU ++ bool "ARMv7-M based platforms (Cortex-M0/M3/M4)" + select ARM_NVIC + select CPU_V7M + select NO_IOPORT_MAP + ++config ARM_SINGLE_ARM926 ++ bool "ARM926 based platforms" ++ select CPU_ARM926T ++ ++endchoice ++ + config ARCH_MMAP_RND_BITS_MIN + default 8 + +diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig +index b1519b4dc03a..2f1bf95daeb0 100644 +--- a/arch/arm/mach-versatile/Kconfig ++++ b/arch/arm/mach-versatile/Kconfig +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 + config ARCH_VERSATILE + bool "ARM Ltd. Versatile family" +- depends on ARCH_MULTI_V5 ++ depends on ARCH_MULTI_V5 || ARM_SINGLE_ARM926 + depends on CPU_LITTLE_ENDIAN + select ARM_AMBA + select ARM_TIMER_SP804 +-- +2.25.1 diff --git a/target/linux/patches/6.1.69/board-rockpi4-0003-arm64-dts-pcie.patch b/target/linux/patches/6.1.69/board-rockpi4-0003-arm64-dts-pcie.patch new file mode 100644 index 000000000..1777e7a86 --- /dev/null +++ b/target/linux/patches/6.1.69/board-rockpi4-0003-arm64-dts-pcie.patch @@ -0,0 +1,35 @@ +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi +index 1ae1ebd4e..2f84397d5 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi +@@ -62,6 +62,8 @@ + regulator-name = "vcc3v3_pcie"; + regulator-always-on; + regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + +@@ -434,6 +459,21 @@ + gpio1830-supply = <&vcc_3v0>; + }; + ++&pcie0 { ++ ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; ++ num-lanes = <4>; ++ max-link-speed = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pcie_clkreqnb_cpm>; ++ vpcie12v-supply = <&vcc12v_dcin>; ++ vpcie3v3-supply = <&vcc3v3_pcie>; ++ status = "okay"; ++}; ++ ++&pcie_phy { ++ status = "okay"; ++}; ++ + &pmu_io_domains { + status = "okay"; + diff --git a/target/linux/patches/6.1.69/enable-ethernet-bpi-m2-plus.patch b/target/linux/patches/6.1.69/enable-ethernet-bpi-m2-plus.patch new file mode 100644 index 000000000..7e9abd9ce --- /dev/null +++ b/target/linux/patches/6.1.69/enable-ethernet-bpi-m2-plus.patch @@ -0,0 +1,15 @@ +diff -Nur linux-6.0.11.orig/arch/arm/boot/dts/sunxi-h3-h5.dtsi linux-6.0.11/arch/arm/boot/dts/sunxi-h3-h5.dtsi +--- linux-6.0.11.orig/arch/arm/boot/dts/sunxi-h3-h5.dtsi 2022-12-02 17:43:18.000000000 +0100 ++++ linux-6.0.11/arch/arm/boot/dts/sunxi-h3-h5.dtsi 2022-12-19 08:06:16.836436057 +0100 +@@ -532,7 +532,10 @@ + reset-names = "stmmaceth"; + clocks = <&ccu CLK_BUS_EMAC>; + clock-names = "stmmaceth"; +- status = "disabled"; ++ status = "okay"; ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; + + mdio: mdio { + #address-cells = <1>; diff --git a/target/linux/patches/6.1.69/hppa-cross-compile.patch b/target/linux/patches/6.1.69/hppa-cross-compile.patch new file mode 100644 index 000000000..5400e87a0 --- /dev/null +++ b/target/linux/patches/6.1.69/hppa-cross-compile.patch @@ -0,0 +1,12 @@ +diff -Nur linux-6.1.41.orig/arch/parisc/Makefile linux-6.1.41/arch/parisc/Makefile +--- linux-6.1.41.orig/arch/parisc/Makefile 2023-07-24 18:55:35.000000000 +0200 ++++ linux-6.1.41/arch/parisc/Makefile 2023-07-25 17:32:20.338363915 +0200 +@@ -41,7 +41,7 @@ + + # Set default 32 bits cross compilers for vdso + CC_ARCHES_32 = hppa hppa2.0 hppa1.1 +-CC_SUFFIXES = linux linux-gnu unknown-linux-gnu suse-linux ++CC_SUFFIXES = linux linux-gnu unknown-linux-gnu suse-linux openadk-linux-uclibc + CROSS32_COMPILE := $(call cc-cross-prefix, \ + $(foreach a,$(CC_ARCHES_32), \ + $(foreach s,$(CC_SUFFIXES),$(a)-$(s)-))) diff --git a/target/linux/patches/6.1.69/macsonic.patch b/target/linux/patches/6.1.69/macsonic.patch new file mode 100644 index 000000000..177397221 --- /dev/null +++ b/target/linux/patches/6.1.69/macsonic.patch @@ -0,0 +1,11 @@ +diff -Nur linux-6.1.41.orig/drivers/net/ethernet/natsemi/Kconfig linux-6.1.41/drivers/net/ethernet/natsemi/Kconfig +--- linux-6.1.41.orig/drivers/net/ethernet/natsemi/Kconfig 2023-07-24 18:55:35.000000000 +0200 ++++ linux-6.1.41/drivers/net/ethernet/natsemi/Kconfig 2023-07-26 17:06:27.179154363 +0200 +@@ -19,6 +19,7 @@ + config MACSONIC + tristate "Macintosh SONIC based ethernet (onboard, NuBus, LC, CS)" + depends on MAC ++ select BITREVERSE + help + Support for NatSemi SONIC based Ethernet devices. This includes + the onboard Ethernet in many Quadras as well as some LC-PDS, diff --git a/target/linux/patches/6.1.69/nios2.patch b/target/linux/patches/6.1.69/nios2.patch new file mode 100644 index 000000000..43631971e --- /dev/null +++ b/target/linux/patches/6.1.69/nios2.patch @@ -0,0 +1,12 @@ +diff -Nur linux-6.1.41.orig/arch/nios2/configs/10m50_defconfig linux-6.1.41/arch/nios2/configs/10m50_defconfig +--- linux-6.1.41.orig/arch/nios2/configs/10m50_defconfig 2023-07-24 18:55:35.000000000 +0200 ++++ linux-6.1.41/arch/nios2/configs/10m50_defconfig 2023-07-29 13:12:27.796785539 +0200 +@@ -20,6 +20,8 @@ + CONFIG_NIOS2_DCACHE_SIZE=0x8000 + CONFIG_NIOS2_ICACHE_SIZE=0x8000 + # CONFIG_NIOS2_CMDLINE_IGNORE_DTB is not set ++CONFIG_NIOS2_DTB_SOURCE_BOOL=y ++CONFIG_NIOS2_DTB_SOURCE="10m50_devboard.dts" + CONFIG_NET=y + CONFIG_PACKET=y + CONFIG_UNIX=y diff --git a/target/linux/patches/6.1.69/riscv32.patch b/target/linux/patches/6.1.69/riscv32.patch new file mode 100644 index 000000000..648b0de4d --- /dev/null +++ b/target/linux/patches/6.1.69/riscv32.patch @@ -0,0 +1,49 @@ +diff -Nur linux-6.0.15.orig/arch/riscv/include/uapi/asm/unistd.h linux-6.0.15/arch/riscv/include/uapi/asm/unistd.h +--- linux-6.0.15.orig/arch/riscv/include/uapi/asm/unistd.h 2022-12-21 17:41:16.000000000 +0100 ++++ linux-6.0.15/arch/riscv/include/uapi/asm/unistd.h 2023-01-09 11:28:16.590796198 +0100 +@@ -15,9 +15,14 @@ + * along with this program. If not, see <https://www.gnu.org/licenses/>. + */ + +-#if defined(__LP64__) && !defined(__SYSCALL_COMPAT) ++#ifndef __SYSCALL_COMPAT + #define __ARCH_WANT_NEW_STAT + #define __ARCH_WANT_SET_GET_RLIMIT ++#endif /* __SYSCALL_COMPAT */ ++ ++#ifndef __LP64__ ++#define __ARCH_WANT_STAT64 ++#define __ARCH_WANT_TIME32_SYSCALLS + #endif /* __LP64__ */ + + #define __ARCH_WANT_SYS_CLONE3 +diff -Nur linux-6.0.15.orig/arch/riscv/Kconfig linux-6.0.15/arch/riscv/Kconfig +--- linux-6.0.15.orig/arch/riscv/Kconfig 2022-12-21 17:41:16.000000000 +0100 ++++ linux-6.0.15/arch/riscv/Kconfig 2023-01-09 14:27:16.560750598 +0100 +@@ -163,8 +163,9 @@ + + config PAGE_OFFSET + hex +- default 0xC0000000 if 32BIT ++ default 0xC0000000 if 32BIT && MMU + default 0x80000000 if 64BIT && !MMU ++ default 0x80000000 if !MMU + default 0xff60000000000000 if 64BIT + + config KASAN_SHADOW_OFFSET +@@ -262,7 +263,6 @@ + select GENERIC_LIB_ASHRDI3 + select GENERIC_LIB_LSHRDI3 + select GENERIC_LIB_UCMPDI2 +- select MMU + + config ARCH_RV64I + bool "RV64I" +@@ -670,7 +670,6 @@ + default !NONPORTABLE + select EFI + select OF +- select MMU + + menu "Power management options" + diff --git a/target/linux/patches/6.1.69/rockchip-115200.patch b/target/linux/patches/6.1.69/rockchip-115200.patch new file mode 100644 index 000000000..ad8a2d7a7 --- /dev/null +++ b/target/linux/patches/6.1.69/rockchip-115200.patch @@ -0,0 +1,12 @@ +diff -Nur linux-5.15.81.orig/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi linux-5.15.81/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi +--- linux-5.15.81.orig/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi 2022-12-02 17:41:12.000000000 +0100 ++++ linux-5.15.81/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi 2022-12-22 09:51:57.370394227 +0100 +@@ -17,7 +17,7 @@ + }; + + chosen { +- stdout-path = "serial2:1500000n8"; ++ stdout-path = "serial2:115200n8"; + }; + + clkin_gmac: external-gmac-clock { diff --git a/target/linux/patches/6.1.69/rockchip-pcie-timeout.patch b/target/linux/patches/6.1.69/rockchip-pcie-timeout.patch new file mode 100644 index 000000000..2ef7df2da --- /dev/null +++ b/target/linux/patches/6.1.69/rockchip-pcie-timeout.patch @@ -0,0 +1,16 @@ +diff -Nur linux-6.0.11.orig/drivers/pci/controller/pcie-rockchip-host.c linux-6.0.11/drivers/pci/controller/pcie-rockchip-host.c +--- linux-6.0.11.orig/drivers/pci/controller/pcie-rockchip-host.c 2022-12-02 17:43:18.000000000 +0100 ++++ linux-6.0.11/drivers/pci/controller/pcie-rockchip-host.c 2022-12-24 11:12:25.753213273 +0100 +@@ -327,10 +327,10 @@ + + gpiod_set_value_cansleep(rockchip->ep_gpio, 1); + +- /* 500ms timeout value should be enough for Gen1/2 training */ ++ /* 1000ms timeout value should be enough for Gen1/2 training */ + err = readl_poll_timeout(rockchip->apb_base + PCIE_CLIENT_BASIC_STATUS1, + status, PCIE_LINK_UP(status), 20, +- 500 * USEC_PER_MSEC); ++ 1000 * USEC_PER_MSEC); + if (err) { + dev_err(dev, "PCIe link training gen1 timeout!\n"); + goto err_power_off_phy; |