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-rw-r--r--mk/kernel-ver.mk6
-rw-r--r--target/arm/solidrun-imx6/patches/3.14.36/0001-solidrun-openelec.patch429704
-rw-r--r--target/config/Config.in.kernelversion.choice18
-rw-r--r--target/config/Config.in.kernelversion.default1
4 files changed, 3 insertions, 429726 deletions
diff --git a/mk/kernel-ver.mk b/mk/kernel-ver.mk
index 2b9a1de32..0a36c3ba8 100644
--- a/mk/kernel-ver.mk
+++ b/mk/kernel-ver.mk
@@ -27,12 +27,6 @@ KERNEL_MOD_VERSION:= $(KERNEL_VERSION)
KERNEL_RELEASE:= 1
KERNEL_HASH:= 8c745b47b3ae0631b2e59423dc255dccbc64d599f9183b390b442dd500e5cb49
endif
-ifeq ($(ADK_KERNEL_VERSION_3_14_36),y)
-KERNEL_VERSION:= 3.14.36
-KERNEL_MOD_VERSION:= $(KERNEL_VERSION)
-KERNEL_RELEASE:= 1
-KERNEL_HASH:= 19d0e157ae36fb6f0789fe4cd7b0b6c67856cfc1995605076b74eff10718f40e
-endif
ifeq ($(ADK_KERNEL_VERSION_3_12_44),y)
KERNEL_VERSION:= 3.12.44
KERNEL_MOD_VERSION:= $(KERNEL_VERSION)
diff --git a/target/arm/solidrun-imx6/patches/3.14.36/0001-solidrun-openelec.patch b/target/arm/solidrun-imx6/patches/3.14.36/0001-solidrun-openelec.patch
deleted file mode 100644
index ef2c8ed0c..000000000
--- a/target/arm/solidrun-imx6/patches/3.14.36/0001-solidrun-openelec.patch
+++ /dev/null
@@ -1,429704 +0,0 @@
-diff -Nur linux-3.14.36/arch/arm/boot/dts/clcd-panels.dtsi linux-openelec/arch/arm/boot/dts/clcd-panels.dtsi
---- linux-3.14.36/arch/arm/boot/dts/clcd-panels.dtsi 1969-12-31 18:00:00.000000000 -0600
-+++ linux-openelec/arch/arm/boot/dts/clcd-panels.dtsi 2015-05-06 12:05:43.000000000 -0500
-@@ -0,0 +1,52 @@
-+/*
-+ * ARM Ltd. Versatile Express
-+ *
-+ */
-+
-+/ {
-+ panels {
-+ panel@0 {
-+ compatible = "panel";
-+ mode = "VGA";
-+ refresh = <60>;
-+ xres = <640>;
-+ yres = <480>;
-+ pixclock = <39721>;
-+ left_margin = <40>;
-+ right_margin = <24>;
-+ upper_margin = <32>;
-+ lower_margin = <11>;
-+ hsync_len = <96>;
-+ vsync_len = <2>;
-+ sync = <0>;
-+ vmode = "FB_VMODE_NONINTERLACED";
-+
-+ tim2 = "TIM2_BCD", "TIM2_IPC";
-+ cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)";
-+ caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888";
-+ bpp = <16>;
-+ };
-+
-+ panel@1 {
-+ compatible = "panel";
-+ mode = "XVGA";
-+ refresh = <60>;
-+ xres = <1024>;
-+ yres = <768>;
-+ pixclock = <15748>;
-+ left_margin = <152>;
-+ right_margin = <48>;
-+ upper_margin = <23>;
-+ lower_margin = <3>;
-+ hsync_len = <104>;
-+ vsync_len = <4>;
-+ sync = <0>;
-+ vmode = "FB_VMODE_NONINTERLACED";
-+
-+ tim2 = "TIM2_BCD", "TIM2_IPC";
-+ cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)";
-+ caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888";
-+ bpp = <16>;
-+ };
-+ };
-+};
-diff -Nur linux-3.14.36/arch/arm/boot/dts/efm32gg-dk3750.dts linux-openelec/arch/arm/boot/dts/efm32gg-dk3750.dts
---- linux-3.14.36/arch/arm/boot/dts/efm32gg-dk3750.dts 2015-03-18 07:31:43.000000000 -0500
-+++ linux-openelec/arch/arm/boot/dts/efm32gg-dk3750.dts 2015-05-06 12:05:43.000000000 -0500
-@@ -26,7 +26,7 @@
- };
-
- i2c@4000a000 {
-- location = <3>;
-+ efm32,location = <3>;
- status = "ok";
-
- temp@48 {
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx23.dtsi linux-openelec/arch/arm/boot/dts/imx23.dtsi
---- linux-3.14.36/arch/arm/boot/dts/imx23.dtsi 2015-03-18 07:31:43.000000000 -0500
-+++ linux-openelec/arch/arm/boot/dts/imx23.dtsi 2015-05-06 12:05:43.000000000 -0500
-@@ -363,7 +363,8 @@
- compatible = "fsl,imx23-lcdif";
- reg = <0x80030000 2000>;
- interrupts = <46 45>;
-- clocks = <&clks 38>;
-+ clocks = <&clks 38>, <&clks 38>;
-+ clock-names = "pix", "axi";
- status = "disabled";
- };
-
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx25.dtsi linux-openelec/arch/arm/boot/dts/imx25.dtsi
---- linux-3.14.36/arch/arm/boot/dts/imx25.dtsi 2015-03-18 07:31:43.000000000 -0500
-+++ linux-openelec/arch/arm/boot/dts/imx25.dtsi 2015-07-24 18:03:29.476842002 -0500
-@@ -13,6 +13,7 @@
-
- / {
- aliases {
-+ ethernet0 = &fec;
- gpio0 = &gpio1;
- gpio1 = &gpio2;
- gpio2 = &gpio3;
-@@ -56,6 +57,7 @@
-
- osc {
- compatible = "fsl,imx-osc", "fixed-clock";
-+ #clock-cells = <0>;
- clock-frequency = <24000000>;
- };
- };
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx25.dtsi.orig linux-openelec/arch/arm/boot/dts/imx25.dtsi.orig
---- linux-3.14.36/arch/arm/boot/dts/imx25.dtsi.orig 1969-12-31 18:00:00.000000000 -0600
-+++ linux-openelec/arch/arm/boot/dts/imx25.dtsi.orig 2015-07-24 18:03:29.376842002 -0500
-@@ -0,0 +1,543 @@
-+/*
-+ * Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+#include "skeleton.dtsi"
-+
-+/ {
-+ aliases {
-+ ethernet0 = &fec;
-+ gpio0 = &gpio1;
-+ gpio1 = &gpio2;
-+ gpio2 = &gpio3;
-+ gpio3 = &gpio4;
-+ i2c0 = &i2c1;
-+ i2c1 = &i2c2;
-+ i2c2 = &i2c3;
-+ serial0 = &uart1;
-+ serial1 = &uart2;
-+ serial2 = &uart3;
-+ serial3 = &uart4;
-+ serial4 = &uart5;
-+ spi0 = &spi1;
-+ spi1 = &spi2;
-+ spi2 = &spi3;
-+ usb0 = &usbotg;
-+ usb1 = &usbhost1;
-+ ethernet0 = &fec;
-+ };
-+
-+ cpus {
-+ #address-cells = <0>;
-+ #size-cells = <0>;
-+
-+ cpu {
-+ compatible = "arm,arm926ej-s";
-+ device_type = "cpu";
-+ };
-+ };
-+
-+ asic: asic-interrupt-controller@68000000 {
-+ compatible = "fsl,imx25-asic", "fsl,avic";
-+ interrupt-controller;
-+ #interrupt-cells = <1>;
-+ reg = <0x68000000 0x8000000>;
-+ };
-+
-+ clocks {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ osc {
-+ compatible = "fsl,imx-osc", "fixed-clock";
-+ #clock-cells = <0>;
-+ clock-frequency = <24000000>;
-+ };
-+ };
-+
-+ soc {
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ compatible = "simple-bus";
-+ interrupt-parent = <&asic>;
-+ ranges;
-+
-+ aips@43f00000 { /* AIPS1 */
-+ compatible = "fsl,aips-bus", "simple-bus";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ reg = <0x43f00000 0x100000>;
-+ ranges;
-+
-+ i2c1: i2c@43f80000 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
-+ reg = <0x43f80000 0x4000>;
-+ clocks = <&clks 48>;
-+ clock-names = "";
-+ interrupts = <3>;
-+ status = "disabled";
-+ };
-+
-+ i2c3: i2c@43f84000 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
-+ reg = <0x43f84000 0x4000>;
-+ clocks = <&clks 48>;
-+ clock-names = "";
-+ interrupts = <10>;
-+ status = "disabled";
-+ };
-+
-+ can1: can@43f88000 {
-+ compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
-+ reg = <0x43f88000 0x4000>;
-+ interrupts = <43>;
-+ clocks = <&clks 75>, <&clks 75>;
-+ clock-names = "ipg", "per";
-+ status = "disabled";
-+ };
-+
-+ can2: can@43f8c000 {
-+ compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
-+ reg = <0x43f8c000 0x4000>;
-+ interrupts = <44>;
-+ clocks = <&clks 76>, <&clks 76>;
-+ clock-names = "ipg", "per";
-+ status = "disabled";
-+ };
-+
-+ uart1: serial@43f90000 {
-+ compatible = "fsl,imx25-uart", "fsl,imx21-uart";
-+ reg = <0x43f90000 0x4000>;
-+ interrupts = <45>;
-+ clocks = <&clks 120>, <&clks 57>;
-+ clock-names = "ipg", "per";
-+ status = "disabled";
-+ };
-+
-+ uart2: serial@43f94000 {
-+ compatible = "fsl,imx25-uart", "fsl,imx21-uart";
-+ reg = <0x43f94000 0x4000>;
-+ interrupts = <32>;
-+ clocks = <&clks 121>, <&clks 57>;
-+ clock-names = "ipg", "per";
-+ status = "disabled";
-+ };
-+
-+ i2c2: i2c@43f98000 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
-+ reg = <0x43f98000 0x4000>;
-+ clocks = <&clks 48>;
-+ clock-names = "";
-+ interrupts = <4>;
-+ status = "disabled";
-+ };
-+
-+ owire@43f9c000 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0x43f9c000 0x4000>;
-+ clocks = <&clks 51>;
-+ clock-names = "";
-+ interrupts = <2>;
-+ status = "disabled";
-+ };
-+
-+ spi1: cspi@43fa4000 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
-+ reg = <0x43fa4000 0x4000>;
-+ clocks = <&clks 78>, <&clks 78>;
-+ clock-names = "ipg", "per";
-+ interrupts = <14>;
-+ status = "disabled";
-+ };
-+
-+ kpp@43fa8000 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ reg = <0x43fa8000 0x4000>;
-+ clocks = <&clks 102>;
-+ clock-names = "";
-+ interrupts = <24>;
-+ status = "disabled";
-+ };
-+
-+ iomuxc@43fac000{
-+ compatible = "fsl,imx25-iomuxc";
-+ reg = <0x43fac000 0x4000>;
-+ };
-+
-+ audmux@43fb0000 {
-+ compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
-+ reg = <0x43fb0000 0x4000>;
-+ status = "disabled";
-+ };
-+ };
-+
-+ spba@50000000 {
-+ compatible = "fsl,spba-bus", "simple-bus";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ reg = <0x50000000 0x40000>;
-+ ranges;
-+
-+ spi3: cspi@50004000 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
-+ reg = <0x50004000 0x4000>;
-+ interrupts = <0>;
-+ clocks = <&clks 80>, <&clks 80>;
-+ clock-names = "ipg", "per";
-+ status = "disabled";
-+ };
-+
-+ uart4: serial@50008000 {
-+ compatible = "fsl,imx25-uart", "fsl,imx21-uart";
-+ reg = <0x50008000 0x4000>;
-+ interrupts = <5>;
-+ clocks = <&clks 123>, <&clks 57>;
-+ clock-names = "ipg", "per";
-+ status = "disabled";
-+ };
-+
-+ uart3: serial@5000c000 {
-+ compatible = "fsl,imx25-uart", "fsl,imx21-uart";
-+ reg = <0x5000c000 0x4000>;
-+ interrupts = <18>;
-+ clocks = <&clks 122>, <&clks 57>;
-+ clock-names = "ipg", "per";
-+ status = "disabled";
-+ };
-+
-+ spi2: cspi@50010000 {
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+ compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
-+ reg = <0x50010000 0x4000>;
-+ clocks = <&clks 79>, <&clks 79>;
-+ clock-names = "ipg", "per";
-+ interrupts = <13>;
-+ status = "disabled";
-+ };
-+
-+ ssi2: ssi@50014000 {
-+ compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
-+ reg = <0x50014000 0x4000>;
-+ interrupts = <11>;
-+ status = "disabled";
-+ };
-+
-+ esai@50018000 {
-+ reg = <0x50018000 0x4000>;
-+ interrupts = <7>;
-+ };
-+
-+ uart5: serial@5002c000 {
-+ compatible = "fsl,imx25-uart", "fsl,imx21-uart";
-+ reg = <0x5002c000 0x4000>;
-+ interrupts = <40>;
-+ clocks = <&clks 124>, <&clks 57>;
-+ clock-names = "ipg", "per";
-+ status = "disabled";
-+ };
-+
-+ tsc: tsc@50030000 {
-+ compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
-+ reg = <0x50030000 0x4000>;
-+ interrupts = <46>;
-+ clocks = <&clks 119>;
-+ clock-names = "ipg";
-+ status = "disabled";
-+ };
-+
-+ ssi1: ssi@50034000 {
-+ compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
-+ reg = <0x50034000 0x4000>;
-+ interrupts = <12>;
-+ status = "disabled";
-+ };
-+
-+ fec: ethernet@50038000 {
-+ compatible = "fsl,imx25-fec";
-+ reg = <0x50038000 0x4000>;
-+ interrupts = <57>;
-+ clocks = <&clks 88>, <&clks 65>;
-+ clock-names = "ipg", "ahb";
-+ status = "disabled";
-+ };
-+ };
-+
-+ aips@53f00000 { /* AIPS2 */
-+ compatible = "fsl,aips-bus", "simple-bus";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ reg = <0x53f00000 0x100000>;
-+ ranges;
-+
-+ clks: ccm@53f80000 {
-+ compatible = "fsl,imx25-ccm";
-+ reg = <0x53f80000 0x4000>;
-+ interrupts = <31>;
-+ #clock-cells = <1>;
-+ };
-+
-+ gpt4: timer@53f84000 {
-+ compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
-+ reg = <0x53f84000 0x4000>;
-+ clocks = <&clks 9>, <&clks 45>;
-+ clock-names = "ipg", "per";
-+ interrupts = <1>;
-+ };
-+
-+ gpt3: timer@53f88000 {
-+ compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
-+ reg = <0x53f88000 0x4000>;
-+ clocks = <&clks 9>, <&clks 47>;
-+ clock-names = "ipg", "per";
-+ interrupts = <29>;
-+ };
-+
-+ gpt2: timer@53f8c000 {
-+ compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
-+ reg = <0x53f8c000 0x4000>;
-+ clocks = <&clks 9>, <&clks 47>;
-+ clock-names = "ipg", "per";
-+ interrupts = <53>;
-+ };
-+
-+ gpt1: timer@53f90000 {
-+ compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
-+ reg = <0x53f90000 0x4000>;
-+ clocks = <&clks 9>, <&clks 47>;
-+ clock-names = "ipg", "per";
-+ interrupts = <54>;
-+ };
-+
-+ epit1: timer@53f94000 {
-+ compatible = "fsl,imx25-epit";
-+ reg = <0x53f94000 0x4000>;
-+ interrupts = <28>;
-+ };
-+
-+ epit2: timer@53f98000 {
-+ compatible = "fsl,imx25-epit";
-+ reg = <0x53f98000 0x4000>;
-+ interrupts = <27>;
-+ };
-+
-+ gpio4: gpio@53f9c000 {
-+ compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
-+ reg = <0x53f9c000 0x4000>;
-+ interrupts = <23>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ interrupt-controller;
-+ #interrupt-cells = <2>;
-+ };
-+
-+ pwm2: pwm@53fa0000 {
-+ compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
-+ #pwm-cells = <2>;
-+ reg = <0x53fa0000 0x4000>;
-+ clocks = <&clks 106>, <&clks 36>;
-+ clock-names = "ipg", "per";
-+ interrupts = <36>;
-+ };
-+
-+ gpio3: gpio@53fa4000 {
-+ compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
-+ reg = <0x53fa4000 0x4000>;
-+ interrupts = <16>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ interrupt-controller;
-+ #interrupt-cells = <2>;
-+ };
-+
-+ pwm3: pwm@53fa8000 {
-+ compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
-+ #pwm-cells = <2>;
-+ reg = <0x53fa8000 0x4000>;
-+ clocks = <&clks 107>, <&clks 36>;
-+ clock-names = "ipg", "per";
-+ interrupts = <41>;
-+ };
-+
-+ esdhc1: esdhc@53fb4000 {
-+ compatible = "fsl,imx25-esdhc";
-+ reg = <0x53fb4000 0x4000>;
-+ interrupts = <9>;
-+ clocks = <&clks 86>, <&clks 63>, <&clks 45>;
-+ clock-names = "ipg", "ahb", "per";
-+ status = "disabled";
-+ };
-+
-+ esdhc2: esdhc@53fb8000 {
-+ compatible = "fsl,imx25-esdhc";
-+ reg = <0x53fb8000 0x4000>;
-+ interrupts = <8>;
-+ clocks = <&clks 87>, <&clks 64>, <&clks 46>;
-+ clock-names = "ipg", "ahb", "per";
-+ status = "disabled";
-+ };
-+
-+ lcdc: lcdc@53fbc000 {
-+ compatible = "fsl,imx25-fb", "fsl,imx21-fb";
-+ reg = <0x53fbc000 0x4000>;
-+ interrupts = <39>;
-+ clocks = <&clks 103>, <&clks 66>, <&clks 49>;
-+ clock-names = "ipg", "ahb", "per";
-+ status = "disabled";
-+ };
-+
-+ slcdc@53fc0000 {
-+ reg = <0x53fc0000 0x4000>;
-+ interrupts = <38>;
-+ status = "disabled";
-+ };
-+
-+ pwm4: pwm@53fc8000 {
-+ compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
-+ reg = <0x53fc8000 0x4000>;
-+ clocks = <&clks 108>, <&clks 36>;
-+ clock-names = "ipg", "per";
-+ interrupts = <42>;
-+ };
-+
-+ gpio1: gpio@53fcc000 {
-+ compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
-+ reg = <0x53fcc000 0x4000>;
-+ interrupts = <52>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ interrupt-controller;
-+ #interrupt-cells = <2>;
-+ };
-+
-+ gpio2: gpio@53fd0000 {
-+ compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
-+ reg = <0x53fd0000 0x4000>;
-+ interrupts = <51>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ interrupt-controller;
-+ #interrupt-cells = <2>;
-+ };
-+
-+ sdma@53fd4000 {
-+ compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
-+ reg = <0x53fd4000 0x4000>;
-+ clocks = <&clks 112>, <&clks 68>;
-+ clock-names = "ipg", "ahb";
-+ #dma-cells = <3>;
-+ interrupts = <34>;
-+ };
-+
-+ wdog@53fdc000 {
-+ compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
-+ reg = <0x53fdc000 0x4000>;
-+ clocks = <&clks 126>;
-+ clock-names = "";
-+ interrupts = <55>;
-+ };
-+
-+ pwm1: pwm@53fe0000 {
-+ compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
-+ #pwm-cells = <2>;
-+ reg = <0x53fe0000 0x4000>;
-+ clocks = <&clks 105>, <&clks 36>;
-+ clock-names = "ipg", "per";
-+ interrupts = <26>;
-+ };
-+
-+ iim: iim@53ff0000 {
-+ compatible = "fsl,imx25-iim", "fsl,imx27-iim";
-+ reg = <0x53ff0000 0x4000>;
-+ interrupts = <19>;
-+ clocks = <&clks 99>;
-+ };
-+
-+ usbphy1: usbphy@1 {
-+ compatible = "nop-usbphy";
-+ status = "disabled";
-+ };
-+
-+ usbphy2: usbphy@2 {
-+ compatible = "nop-usbphy";
-+ status = "disabled";
-+ };
-+
-+ usbotg: usb@53ff4000 {
-+ compatible = "fsl,imx25-usb", "fsl,imx27-usb";
-+ reg = <0x53ff4000 0x0200>;
-+ interrupts = <37>;
-+ clocks = <&clks 9>, <&clks 70>, <&clks 8>;
-+ clock-names = "ipg", "ahb", "per";
-+ fsl,usbmisc = <&usbmisc 0>;
-+ status = "disabled";
-+ };
-+
-+ usbhost1: usb@53ff4400 {
-+ compatible = "fsl,imx25-usb", "fsl,imx27-usb";
-+ reg = <0x53ff4400 0x0200>;
-+ interrupts = <35>;
-+ clocks = <&clks 9>, <&clks 70>, <&clks 8>;
-+ clock-names = "ipg", "ahb", "per";
-+ fsl,usbmisc = <&usbmisc 1>;
-+ status = "disabled";
-+ };
-+
-+ usbmisc: usbmisc@53ff4600 {
-+ #index-cells = <1>;
-+ compatible = "fsl,imx25-usbmisc";
-+ clocks = <&clks 9>, <&clks 70>, <&clks 8>;
-+ clock-names = "ipg", "ahb", "per";
-+ reg = <0x53ff4600 0x00f>;
-+ status = "disabled";
-+ };
-+
-+ dryice@53ffc000 {
-+ compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
-+ reg = <0x53ffc000 0x4000>;
-+ clocks = <&clks 81>;
-+ clock-names = "ipg";
-+ interrupts = <25>;
-+ };
-+ };
-+
-+ emi@80000000 {
-+ compatible = "fsl,emi-bus", "simple-bus";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ reg = <0x80000000 0x3b002000>;
-+ ranges;
-+
-+ nfc: nand@bb000000 {
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+
-+ compatible = "fsl,imx25-nand";
-+ reg = <0xbb000000 0x2000>;
-+ clocks = <&clks 50>;
-+ clock-names = "";
-+ interrupts = <33>;
-+ status = "disabled";
-+ };
-+ };
-+ };
-+};
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx25-karo-tx25.dts linux-openelec/arch/arm/boot/dts/imx25-karo-tx25.dts
---- linux-3.14.36/arch/arm/boot/dts/imx25-karo-tx25.dts 2015-03-18 07:31:43.000000000 -0500
-+++ linux-openelec/arch/arm/boot/dts/imx25-karo-tx25.dts 2015-05-06 12:05:43.000000000 -0500
-@@ -16,6 +16,10 @@
- model = "Ka-Ro TX25";
- compatible = "karo,imx25-tx25", "fsl,imx25";
-
-+ chosen {
-+ stdout-path = &uart1;
-+ };
-+
- memory {
- reg = <0x80000000 0x02000000 0x90000000 0x02000000>;
- };
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx27-apf27.dts linux-openelec/arch/arm/boot/dts/imx27-apf27.dts
---- linux-3.14.36/arch/arm/boot/dts/imx27-apf27.dts 2015-03-18 07:31:43.000000000 -0500
-+++ linux-openelec/arch/arm/boot/dts/imx27-apf27.dts 2015-05-06 12:05:43.000000000 -0500
-@@ -29,6 +29,7 @@
-
- osc26m {
- compatible = "fsl,imx-osc26m", "fixed-clock";
-+ #clock-cells = <0>;
- clock-frequency = <0>;
- };
- };
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx27.dtsi linux-openelec/arch/arm/boot/dts/imx27.dtsi
---- linux-3.14.36/arch/arm/boot/dts/imx27.dtsi 2015-03-18 07:31:43.000000000 -0500
-+++ linux-openelec/arch/arm/boot/dts/imx27.dtsi 2015-05-06 12:05:43.000000000 -0500
-@@ -13,6 +13,7 @@
-
- / {
- aliases {
-+ ethernet0 = &fec;
- gpio0 = &gpio1;
- gpio1 = &gpio2;
- gpio2 = &gpio3;
-@@ -46,6 +47,7 @@
-
- osc26m {
- compatible = "fsl,imx-osc26m", "fixed-clock";
-+ #clock-cells = <0>;
- clock-frequency = <26000000>;
- };
- };
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts linux-openelec/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
---- linux-3.14.36/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts 2015-03-18 07:31:43.000000000 -0500
-+++ linux-openelec/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts 2015-05-06 12:05:43.000000000 -0500
-@@ -15,6 +15,10 @@
- model = "Phytec pca100 rapid development kit";
- compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";
-
-+ chosen {
-+ stdout-path = &uart1;
-+ };
-+
- display: display {
- model = "Primeview-PD050VL1";
- native-mode = <&timing0>;
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx28.dtsi linux-openelec/arch/arm/boot/dts/imx28.dtsi
---- linux-3.14.36/arch/arm/boot/dts/imx28.dtsi 2015-03-18 07:31:43.000000000 -0500
-+++ linux-openelec/arch/arm/boot/dts/imx28.dtsi 2015-05-06 12:05:43.000000000 -0500
-@@ -840,7 +840,8 @@
- compatible = "fsl,imx28-lcdif";
- reg = <0x80030000 0x2000>;
- interrupts = <38>;
-- clocks = <&clks 55>;
-+ clocks = <&clks 55>, <&clks 55>;
-+ clock-names = "pix", "axi";
- dmas = <&dma_apbh 13>;
- dma-names = "rx";
- status = "disabled";
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx51-babbage.dts linux-openelec/arch/arm/boot/dts/imx51-babbage.dts
---- linux-3.14.36/arch/arm/boot/dts/imx51-babbage.dts 2015-03-18 07:31:43.000000000 -0500
-+++ linux-openelec/arch/arm/boot/dts/imx51-babbage.dts 2015-05-06 12:05:43.000000000 -0500
-@@ -17,6 +17,10 @@
- model = "Freescale i.MX51 Babbage Board";
- compatible = "fsl,imx51-babbage", "fsl,imx51";
-
-+ chosen {
-+ stdout-path = &uart1;
-+ };
-+
- memory {
- reg = <0x90000000 0x20000000>;
- };
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx51.dtsi linux-openelec/arch/arm/boot/dts/imx51.dtsi
---- linux-3.14.36/arch/arm/boot/dts/imx51.dtsi 2015-03-18 07:31:43.000000000 -0500
-+++ linux-openelec/arch/arm/boot/dts/imx51.dtsi 2015-05-06 12:05:43.000000000 -0500
-@@ -15,6 +15,7 @@
-
- / {
- aliases {
-+ ethernet0 = &fec;
- gpio0 = &gpio1;
- gpio1 = &gpio2;
- gpio2 = &gpio3;
-@@ -43,21 +44,25 @@
-
- ckil {
- compatible = "fsl,imx-ckil", "fixed-clock";
-+ #clock-cells = <0>;
- clock-frequency = <32768>;
- };
-
- ckih1 {
- compatible = "fsl,imx-ckih1", "fixed-clock";
-+ #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- ckih2 {
- compatible = "fsl,imx-ckih2", "fixed-clock";
-+ #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- osc {
- compatible = "fsl,imx-osc", "fixed-clock";
-+ #clock-cells = <0>;
- clock-frequency = <24000000>;
- };
- };
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx53.dtsi linux-openelec/arch/arm/boot/dts/imx53.dtsi
---- linux-3.14.36/arch/arm/boot/dts/imx53.dtsi 2015-03-18 07:31:43.000000000 -0500
-+++ linux-openelec/arch/arm/boot/dts/imx53.dtsi 2015-05-06 12:05:43.000000000 -0500
-@@ -15,6 +15,7 @@
-
- / {
- aliases {
-+ ethernet0 = &fec;
- gpio0 = &gpio1;
- gpio1 = &gpio2;
- gpio2 = &gpio3;
-@@ -59,21 +60,25 @@
-
- ckil {
- compatible = "fsl,imx-ckil", "fixed-clock";
-+ #clock-cells = <0>;
- clock-frequency = <32768>;
- };
-
- ckih1 {
- compatible = "fsl,imx-ckih1", "fixed-clock";
-+ #clock-cells = <0>;
- clock-frequency = <22579200>;
- };
-
- ckih2 {
- compatible = "fsl,imx-ckih2", "fixed-clock";
-+ #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- osc {
- compatible = "fsl,imx-osc", "fixed-clock";
-+ #clock-cells = <0>;
- clock-frequency = <24000000>;
- };
- };
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx53-mba53.dts linux-openelec/arch/arm/boot/dts/imx53-mba53.dts
---- linux-3.14.36/arch/arm/boot/dts/imx53-mba53.dts 2015-03-18 07:31:43.000000000 -0500
-+++ linux-openelec/arch/arm/boot/dts/imx53-mba53.dts 2015-05-06 12:05:43.000000000 -0500
-@@ -25,6 +25,10 @@
- enable-active-low;
- };
-
-+ chosen {
-+ stdout-path = &uart2;
-+ };
-+
- backlight {
- compatible = "pwm-backlight";
- pwms = <&pwm2 0 50000>;
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx6dl-dfi-fs700-m60.dts linux-openelec/arch/arm/boot/dts/imx6dl-dfi-fs700-m60.dts
---- linux-3.14.36/arch/arm/boot/dts/imx6dl-dfi-fs700-m60.dts 1969-12-31 18:00:00.000000000 -0600
-+++ linux-openelec/arch/arm/boot/dts/imx6dl-dfi-fs700-m60.dts 2015-05-06 12:05:43.000000000 -0500
-@@ -0,0 +1,23 @@
-+/*
-+ * Copyright 2013 Sascha Hauer <s.hauer@pengutronix.de>
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+#ifndef __DTS_V1__
-+#define __DTS_V1__
-+/dts-v1/;
-+#endif
-+
-+#include "imx6dl.dtsi"
-+#include "imx6qdl-dfi-fs700-m60.dtsi"
-+
-+/ {
-+ model = "DFI FS700-M60-6DL i.MX6dl Q7 Board";
-+ compatible = "dfi,fs700-m60-6dl", "dfi,fs700e-m60", "fsl,imx6dl";
-+};
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx6dl.dtsi linux-openelec/arch/arm/boot/dts/imx6dl.dtsi
---- linux-3.14.36/arch/arm/boot/dts/imx6dl.dtsi 2015-03-18 07:31:43.000000000 -0500
-+++ linux-openelec/arch/arm/boot/dts/imx6dl.dtsi 2015-05-06 12:05:43.000000000 -0500
-@@ -8,6 +8,7 @@
- *
- */
-
-+#include <dt-bindings/interrupt-controller/irq.h>
- #include "imx6dl-pinfunc.h"
- #include "imx6qdl.dtsi"
-
-@@ -21,6 +22,26 @@
- device_type = "cpu";
- reg = <0>;
- next-level-cache = <&L2>;
-+ operating-points = <
-+ /* kHz uV */
-+ 996000 1275000
-+ 792000 1175000
-+ 396000 1075000
-+ >;
-+ fsl,soc-operating-points = <
-+ /* ARM kHz SOC-PU uV */
-+ 996000 1175000
-+ 792000 1175000
-+ 396000 1175000
-+ >;
-+ clock-latency = <61036>; /* two CLK32 periods */
-+ clocks = <&clks 104>, <&clks 6>, <&clks 16>,
-+ <&clks 17>, <&clks 170>;
-+ clock-names = "arm", "pll2_pfd2_396m", "step",
-+ "pll1_sw", "pll1_sys";
-+ arm-supply = <&reg_arm>;
-+ pu-supply = <&reg_pu>;
-+ soc-supply = <&reg_soc>;
- };
-
- cpu@1 {
-@@ -32,40 +53,124 @@
- };
-
- soc {
-+
-+ busfreq { /* BUSFREQ */
-+ compatible = "fsl,imx6_busfreq";
-+ clocks = <&clks 171>, <&clks 6>, <&clks 11>, <&clks 104>, <&clks 172>, <&clks 58>,
-+ <&clks 18>, <&clks 60>, <&clks 20>, <&clks 3>, <&clks 22> , <&clks 8>;
-+ clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm", "pll3_usb_otg", "periph",
-+ "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", "axi_sel", "pll3_pfd1_540m";
-+ interrupts = <0 107 0x04>, <0 112 0x4>;
-+ interrupt-names = "irq_busfreq_0", "irq_busfreq_1";
-+ fsl,max_ddr_freq = <400000000>;
-+ };
-+
-+ gpu@00130000 {
-+ compatible = "fsl,imx6dl-gpu", "fsl,imx6q-gpu";
-+ reg = <0x00130000 0x4000>, <0x00134000 0x4000>,
-+ <0x0 0x0>;
-+ reg-names = "iobase_3d", "iobase_2d",
-+ "phys_baseaddr";
-+ interrupts = <0 9 0x04>, <0 10 0x04>;
-+ interrupt-names = "irq_3d", "irq_2d";
-+ clocks = <&clks 143>, <&clks 27>,
-+ <&clks 121>, <&clks 122>,
-+ <&clks 0>;
-+ clock-names = "gpu2d_axi_clk", "gpu3d_axi_clk",
-+ "gpu2d_clk", "gpu3d_clk",
-+ "gpu3d_shader_clk";
-+ resets = <&src 0>, <&src 3>;
-+ reset-names = "gpu3d", "gpu2d";
-+ pu-supply = <&reg_pu>;
-+ };
-+
- ocram: sram@00900000 {
- compatible = "mmio-sram";
- reg = <0x00900000 0x20000>;
- clocks = <&clks 142>;
- };
-
-+ hdmi_core: hdmi_core@00120000 {
-+ compatible = "fsl,imx6dl-hdmi-core";
-+ reg = <0x00120000 0x9000>;
-+ clocks = <&clks 124>, <&clks 123>;
-+ clock-names = "hdmi_isfr", "hdmi_iahb";
-+ status = "disabled";
-+ };
-+
-+ hdmi_video: hdmi_video@020e0000 {
-+ compatible = "fsl,imx6dl-hdmi-video";
-+ reg = <0x020e0000 0x1000>;
-+ reg-names = "hdmi_gpr";
-+ interrupts = <0 115 0x04>;
-+ clocks = <&clks 124>, <&clks 123>;
-+ clock-names = "hdmi_isfr", "hdmi_iahb";
-+ status = "disabled";
-+ };
-+
-+ hdmi_audio: hdmi_audio@00120000 {
-+ compatible = "fsl,imx6dl-hdmi-audio";
-+ clocks = <&clks 124>, <&clks 123>;
-+ clock-names = "hdmi_isfr", "hdmi_iahb";
-+ dmas = <&sdma 2 23 0>;
-+ dma-names = "tx";
-+ status = "disabled";
-+ };
-+
-+ hdmi_cec: hdmi_cec@00120000 {
-+ compatible = "fsl,imx6dl-hdmi-cec";
-+ interrupts = <0 115 0x04>;
-+ status = "disabled";
-+ };
-+
- aips1: aips-bus@02000000 {
-+ vpu@02040000 {
-+ iramsize = <0>;
-+ status = "okay";
-+ };
-+
- iomuxc: iomuxc@020e0000 {
- compatible = "fsl,imx6dl-iomuxc";
- };
-
- pxp: pxp@020f0000 {
-+ compatible = "fsl,imx6dl-pxp-dma";
- reg = <0x020f0000 0x4000>;
-- interrupts = <0 98 0x04>;
-+ interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clks 133>;
-+ clock-names = "pxp-axi";
-+ status = "disabled";
- };
-
- epdc: epdc@020f4000 {
- reg = <0x020f4000 0x4000>;
-- interrupts = <0 97 0x04>;
-+ interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- lcdif: lcdif@020f8000 {
- reg = <0x020f8000 0x4000>;
-- interrupts = <0 39 0x04>;
-+ interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
-
- aips2: aips-bus@02100000 {
-+ mipi_dsi: mipi@021e0000 {
-+ compatible = "fsl,imx6dl-mipi-dsi";
-+ reg = <0x021e0000 0x4000>;
-+ interrupts = <0 102 0x04>;
-+ gpr = <&gpr>;
-+ clocks = <&clks 138>, <&clks 209>;
-+ clock-names = "mipi_pllref_clk", "mipi_cfg_clk";
-+ status = "disabled";
-+ };
-+
- i2c4: i2c@021f8000 {
- #address-cells = <1>;
- #size-cells = <0>;
-- compatible = "fsl,imx1-i2c";
-+ compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
- reg = <0x021f8000 0x4000>;
-- interrupts = <0 35 0x04>;
-+ interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clks 116>;
- status = "disabled";
- };
- };
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx6dl-gw51xx.dts linux-openelec/arch/arm/boot/dts/imx6dl-gw51xx.dts
---- linux-3.14.36/arch/arm/boot/dts/imx6dl-gw51xx.dts 1969-12-31 18:00:00.000000000 -0600
-+++ linux-openelec/arch/arm/boot/dts/imx6dl-gw51xx.dts 2015-05-06 12:05:43.000000000 -0500
-@@ -0,0 +1,19 @@
-+/*
-+ * Copyright 2013 Gateworks Corporation
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+/dts-v1/;
-+#include "imx6dl.dtsi"
-+#include "imx6qdl-gw51xx.dtsi"
-+
-+/ {
-+ model = "Gateworks Ventana i.MX6 DualLite GW51XX";
-+ compatible = "gw,imx6dl-gw51xx", "gw,ventana", "fsl,imx6dl";
-+};
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx6dl-gw52xx.dts linux-openelec/arch/arm/boot/dts/imx6dl-gw52xx.dts
---- linux-3.14.36/arch/arm/boot/dts/imx6dl-gw52xx.dts 1969-12-31 18:00:00.000000000 -0600
-+++ linux-openelec/arch/arm/boot/dts/imx6dl-gw52xx.dts 2015-05-06 12:05:43.000000000 -0500
-@@ -0,0 +1,19 @@
-+/*
-+ * Copyright 2013 Gateworks Corporation
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+/dts-v1/;
-+#include "imx6dl.dtsi"
-+#include "imx6qdl-gw52xx.dtsi"
-+
-+/ {
-+ model = "Gateworks Ventana i.MX6 DualLite GW52XX";
-+ compatible = "gw,imx6dl-gw52xx", "gw,ventana", "fsl,imx6dl";
-+};
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx6dl-gw53xx.dts linux-openelec/arch/arm/boot/dts/imx6dl-gw53xx.dts
---- linux-3.14.36/arch/arm/boot/dts/imx6dl-gw53xx.dts 1969-12-31 18:00:00.000000000 -0600
-+++ linux-openelec/arch/arm/boot/dts/imx6dl-gw53xx.dts 2015-05-06 12:05:43.000000000 -0500
-@@ -0,0 +1,19 @@
-+/*
-+ * Copyright 2013 Gateworks Corporation
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+/dts-v1/;
-+#include "imx6dl.dtsi"
-+#include "imx6qdl-gw53xx.dtsi"
-+
-+/ {
-+ model = "Gateworks Ventana i.MX6 DualLite GW53XX";
-+ compatible = "gw,imx6dl-gw53xx", "gw,ventana", "fsl,imx6dl";
-+};
-diff -Nur linux-3.14.36/arch/arm/boot/dts/imx6dl-gw54xx.dts linux-openelec/arch/arm/boot/dts/imx6dl-gw54xx.dts
---- linux-3.14.36/arch/arm/boot/dts/imx6dl-gw54xx.dts 1969-12-31 18:00:00.000000000 -0600
-+++ linux-openelec/arch/arm/boot/dts/imx6dl-gw54xx.dts 2015-05-06 12:05:43.000000000 -0500</