binutils: remove support for old versions

10 files changed, 0 insertions, 1088 deletions

diff --git a/toolchain/binutils/patches/2.26.1/bfin.patch b/toolchain/binutils/patches/2.26.1/bfin.patch
deleted file mode 100644
index 1f287518a..000000000
--- a/toolchain/binutils/patches/2.26.1/bfin.patch
+++ /dev/null
@@ -1,13 +0,0 @@
-diff --git a/bfd/elf32-bfin.c b/bfd/elf32-bfin.c
-index 7cc8b6d..12f0add 100644
---- a/bfd/elf32-bfin.c
-+++ b/bfd/elf32-bfin.c
-@@ -4457,7 +4457,7 @@ elf32_bfinfdpic_finish_dynamic_sections (bfd *output_bfd,
-   if (bfinfdpic_got_section (info))
-     {
-       BFD_ASSERT (bfinfdpic_gotrel_section (info)->size
--		  == (bfinfdpic_gotrel_section (info)->reloc_count
-+		  >= (bfinfdpic_gotrel_section (info)->reloc_count
- 		      * sizeof (Elf32_External_Rel)));
- 
-       if (bfinfdpic_gotfixup_section (info))
diff --git a/toolchain/binutils/patches/2.26.1/crisv10.patch b/toolchain/binutils/patches/2.26.1/crisv10.patch
deleted file mode 100644
index c7680138a..000000000
--- a/toolchain/binutils/patches/2.26.1/crisv10.patch
+++ /dev/null
@@ -1,14 +0,0 @@
-diff -Nur binutils-2.26.1.orig/bfd/elf32-cris.c binutils-2.26.1/bfd/elf32-cris.c
---- binutils-2.26.1.orig/bfd/elf32-cris.c	2015-11-13 09:27:40.000000000 +0100
-+++ binutils-2.26.1/bfd/elf32-cris.c	2016-07-09 19:19:49.305293884 +0200
-@@ -2728,8 +2728,8 @@
- 
-   /* A GOTPLT reloc, when activated, is supposed to be included into
-      the PLT refcount.  */
--  BFD_ASSERT (h->gotplt_refcount == 0
--	      || h->gotplt_refcount <= h->root.plt.refcount);
-+  /* BFD_ASSERT (h->gotplt_refcount == 0
-+	      || h->gotplt_refcount <= h->root.plt.refcount); */
- 
-   /* If nobody wanted a GOTPLT with this symbol, we're done.  */
-   if (h->gotplt_refcount <= 0)
diff --git a/toolchain/binutils/patches/2.26.1/m68k.patch b/toolchain/binutils/patches/2.26.1/m68k.patch
deleted file mode 100644
index 739604037..000000000
--- a/toolchain/binutils/patches/2.26.1/m68k.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur binutils-2.26.1.orig/bfd/elf32-m68k.c binutils-2.26.1/bfd/elf32-m68k.c
---- binutils-2.26.1.orig/bfd/elf32-m68k.c	2015-11-13 09:27:40.000000000 +0100
-+++ binutils-2.26.1/bfd/elf32-m68k.c	2016-10-30 16:56:32.486606003 +0100
-@@ -2637,7 +2637,6 @@
- 	  if (sgot == NULL)
- 	    {
- 	      sgot = bfd_get_linker_section (dynobj, ".got");
--	      BFD_ASSERT (sgot != NULL);
- 	    }
- 
- 	  if (srelgot == NULL
diff --git a/toolchain/binutils/patches/2.26.1/microblaze-static.musl b/toolchain/binutils/patches/2.26.1/microblaze-static.musl
deleted file mode 100644
index 55962b000..000000000
--- a/toolchain/binutils/patches/2.26.1/microblaze-static.musl
+++ /dev/null
@@ -1,13 +0,0 @@
-From:
-https://sourceware.org/bugzilla/show_bug.cgi?id=21017
-diff -Nur binutils-2.26.1.orig/bfd/elf32-microblaze.c binutils-2.26.1/bfd/elf32-microblaze.c
---- binutils-2.26.1.orig/bfd/elf32-microblaze.c	2015-11-13 09:27:40.000000000 +0100
-+++ binutils-2.26.1/bfd/elf32-microblaze.c	2017-01-03 06:31:27.305957954 +0100
-@@ -2402,6 +2402,7 @@
-           tls_type |= (TLS_TLS | TLS_LD);
-         dogottls:
-           sec->has_tls_reloc = 1;
-+	case R_MICROBLAZE_GOTOFF_64:
-         case R_MICROBLAZE_GOT_64:
-           if (htab->sgot == NULL)
-             {
diff --git a/toolchain/binutils/patches/2.26.1/microblaze.patch b/toolchain/binutils/patches/2.26.1/microblaze.patch
deleted file mode 100644
index e028bf9d1..000000000
--- a/toolchain/binutils/patches/2.26.1/microblaze.patch
+++ /dev/null
@@ -1,14 +0,0 @@
-diff -Nur binutils-2.26.1.orig/bfd/elf32-microblaze.c binutils-2.26.1/bfd/elf32-microblaze.c
---- binutils-2.26.1.orig/bfd/elf32-microblaze.c	2015-11-13 09:27:40.000000000 +0100
-+++ binutils-2.26.1/bfd/elf32-microblaze.c	2016-10-20 19:06:58.655565765 +0200
-@@ -3296,8 +3296,8 @@
-          The entry in the global offset table will already have been
-          initialized in the relocate_section function.  */
-       if (bfd_link_pic (info)
--          && (info->symbolic || h->dynindx == -1)
--          && h->def_regular)
-+	  && ((info->symbolic && h->def_regular)
-+		|| h->dynindx == -1))
-         {
-           asection *sec = h->root.u.def.section;
-           microblaze_elf_output_dynamic_relocation (output_bfd,
diff --git a/toolchain/binutils/patches/2.27/0001-Revert-part-Set-dynamic-tag-VMA-and-size-from-dynami.patch b/toolchain/binutils/patches/2.27/0001-Revert-part-Set-dynamic-tag-VMA-and-size-from-dynami.patch
deleted file mode 100644
index 76b3e3b46..000000000
--- a/toolchain/binutils/patches/2.27/0001-Revert-part-Set-dynamic-tag-VMA-and-size-from-dynami.patch
+++ /dev/null
@@ -1,35 +0,0 @@
-From c646b02fdcae5f37bd88f33a0c4683ef13ad5c82 Mon Sep 17 00:00:00 2001
-From: Alan Modra <amodra@gmail.com>
-Date: Mon, 31 Oct 2016 12:46:38 +1030
-Subject: [PATCH] Revert part "Set dynamic tag VMA and size from dynamic
- section when possible"
-
-	PR 20748
-	* elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Revert
-	2016-05-13 change.
-
-Signed-off-by: Waldemar Brodkorb <wbx@uclibc-ng.org>
-
-diff --git a/bfd/elf32-microblaze.c b/bfd/elf32-microblaze.c
-index 477e7b3..5c66808 100644
---- a/bfd/elf32-microblaze.c
-+++ b/bfd/elf32-microblaze.c
-@@ -3396,13 +3396,13 @@ microblaze_elf_finish_dynamic_sections (bfd *output_bfd,
-             {
-               asection *s;
- 
--              s = bfd_get_linker_section (dynobj, name);
-+              s = bfd_get_section_by_name (output_bfd, name);
-               if (s == NULL)
-                 dyn.d_un.d_val = 0;
-               else
-                 {
-                   if (! size)
--                    dyn.d_un.d_ptr = s->output_section->vma + s->output_offset;
-+                    dyn.d_un.d_ptr = s->vma;
-                   else
-                     dyn.d_un.d_val = s->size;
-                 }
--- 
-2.1.4
-
diff --git a/toolchain/binutils/patches/2.27/frv.patch b/toolchain/binutils/patches/2.27/frv.patch
deleted file mode 100644
index 4c378ad17..000000000
--- a/toolchain/binutils/patches/2.27/frv.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-diff -Nur binutils-2.27.orig/bfd/elf32-frv.c binutils-2.27/bfd/elf32-frv.c
---- binutils-2.27.orig/bfd/elf32-frv.c	2016-08-03 09:36:50.000000000 +0200
-+++ binutils-2.27/bfd/elf32-frv.c	2016-08-16 14:04:27.941065290 +0200
-@@ -5723,10 +5723,6 @@
-     }
-   if (frvfdpic_got_section (info))
-     {
--      BFD_ASSERT (frvfdpic_gotrel_section (info)->size
--		  == (frvfdpic_gotrel_section (info)->reloc_count
--		      * sizeof (Elf32_External_Rel)));
--
-       if (frvfdpic_gotfixup_section (info))
- 	{
- 	  struct elf_link_hash_entry *hgot = elf_hash_table (info)->hgot;
-@@ -5766,12 +5762,6 @@
- 	    }
- 	}
-     }
--  if (frvfdpic_pltrel_section (info))
--    {
--      BFD_ASSERT (frvfdpic_pltrel_section (info)->size
--		  == (frvfdpic_pltrel_section (info)->reloc_count
--		      * sizeof (Elf32_External_Rel)));
--    }
- 
- 
-   if (elf_hash_table (info)->dynamic_sections_created)
diff --git a/toolchain/binutils/patches/2.27/j2.patch b/toolchain/binutils/patches/2.27/j2.patch
deleted file mode 100644
index 2861d9a48..000000000
--- a/toolchain/binutils/patches/2.27/j2.patch
+++ /dev/null
@@ -1,936 +0,0 @@
-diff -Nur binutils-2.27.orig/bfd/archures.c binutils-2.27/bfd/archures.c
---- binutils-2.27.orig/bfd/archures.c	2016-08-03 09:36:50.000000000 +0200
-+++ binutils-2.27/bfd/archures.c	2016-12-10 15:34:01.954875361 +0100
-@@ -310,10 +310,12 @@
- .#define bfd_mach_sh_dsp     0x2d
- .#define bfd_mach_sh2a       0x2a
- .#define bfd_mach_sh2a_nofpu 0x2b
-+.#define bfd_mach_shj2       0x2c
- .#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1
- .#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
- .#define bfd_mach_sh2a_or_sh4  0x2a3
- .#define bfd_mach_sh2a_or_sh3e 0x2a4
-+.#define bfd_mach_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu 0x2a5
- .#define bfd_mach_sh2e       0x2e
- .#define bfd_mach_sh3        0x30
- .#define bfd_mach_sh3_nommu  0x31
-diff -Nur binutils-2.27.orig/bfd/bfd-in2.h binutils-2.27/bfd/bfd-in2.h
---- binutils-2.27.orig/bfd/bfd-in2.h	2016-08-03 09:36:50.000000000 +0200
-+++ binutils-2.27/bfd/bfd-in2.h	2016-12-10 15:34:01.978874153 +0100
-@@ -2121,10 +2121,12 @@
- #define bfd_mach_sh_dsp     0x2d
- #define bfd_mach_sh2a       0x2a
- #define bfd_mach_sh2a_nofpu 0x2b
-+#define bfd_mach_shj2       0x2c
- #define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1
- #define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
- #define bfd_mach_sh2a_or_sh4  0x2a3
- #define bfd_mach_sh2a_or_sh3e 0x2a4
-+#define bfd_mach_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu 0x2a5
- #define bfd_mach_sh2e       0x2e
- #define bfd_mach_sh3        0x30
- #define bfd_mach_sh3_nommu  0x31
-diff -Nur binutils-2.27.orig/bfd/cpu-sh.c binutils-2.27/bfd/cpu-sh.c
---- binutils-2.27.orig/bfd/cpu-sh.c	2016-08-03 09:36:50.000000000 +0200
-+++ binutils-2.27/bfd/cpu-sh.c	2016-12-10 15:34:01.978874153 +0100
-@@ -44,7 +44,9 @@
- #define SH2A_NOFPU_OR_SH3_NOMMU_NEXT       arch_info_struct + 17
- #define SH2A_OR_SH4_NEXT                   arch_info_struct + 18
- #define SH2A_OR_SH3E_NEXT                  arch_info_struct + 19
--#define SH64_NEXT                          NULL
-+#define SH64_NEXT                          arch_info_struct + 20
-+#define SHJ2_NEXT       		   arch_info_struct + 21
-+#define SH2A_NOFPU_OR_SH3_NOMMU_OR_SHJ2_NOFPU_NEXT       NULL
- 
- static const bfd_arch_info_type arch_info_struct[] =
- {
-@@ -348,6 +350,36 @@
-     bfd_arch_default_fill,
-     SH64_NEXT
-   },
-+  {
-+    32,				/* 32 bits in a word.  */
-+    32,				/* 32 bits in an address.  */
-+    8,				/* 8 bits in a byte.  */
-+    bfd_arch_sh,
-+    bfd_mach_shj2,
-+    "sh",			/* Architecture name. .  */
-+    "j2",			/* Machine name.  */
-+    1,
-+    FALSE,			/* Not the default.  */
-+    bfd_default_compatible,
-+    bfd_default_scan,
-+    bfd_arch_default_fill,
-+    SHJ2_NEXT
-+  },
-+  {
-+    32,				/* 32 bits in a word.  */
-+    32,				/* 32 bits in an address.  */
-+    8,				/* 8 bits in a byte.  */
-+    bfd_arch_sh,
-+    bfd_mach_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu,
-+    "sh",			/* Architecture name. .  */
-+    "sh2a-or-sh3e-or-j2",	/* Machine name.  */
-+    1,
-+    FALSE,			/* Not the default.  */
-+    bfd_default_compatible,
-+    bfd_default_scan,
-+    bfd_arch_default_fill,
-+    SH2A_NOFPU_OR_SH3_NOMMU_OR_SHJ2_NOFPU_NEXT
-+  },
- };
- 
- const bfd_arch_info_type bfd_sh_arch =
-@@ -398,6 +430,8 @@
-   { bfd_mach_sh4_nofpu,       arch_sh4_nofpu,       arch_sh4_nofpu_up },
-   { bfd_mach_sh4_nommu_nofpu, arch_sh4_nommu_nofpu, arch_sh4_nommu_nofpu_up },
-   { bfd_mach_sh4a_nofpu,      arch_sh4a_nofpu,      arch_sh4a_nofpu_up },
-+  { bfd_mach_shj2,            arch_shj2,            arch_shj2_up },
-+  { bfd_mach_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu, arch_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu, arch_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu_up },
-   { 0, 0, 0 }   /* Terminator.  */
- };
- 
-diff -Nur binutils-2.27.orig/bfd/elf32-sh.c binutils-2.27/bfd/elf32-sh.c
---- binutils-2.27.orig/bfd/elf32-sh.c	2016-08-03 09:36:51.000000000 +0200
-+++ binutils-2.27/bfd/elf32-sh.c	2016-12-10 15:34:06.138680918 +0100
-@@ -5682,220 +5682,6 @@
-   return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym);
- }
- 
--/* Update the got entry reference counts for the section being removed.  */
--
--static bfd_boolean
--sh_elf_gc_sweep_hook (bfd *abfd, struct bfd_link_info *info,
--		      asection *sec, const Elf_Internal_Rela *relocs)
--{
--  Elf_Internal_Shdr *symtab_hdr;
--  struct elf_link_hash_entry **sym_hashes;
--  bfd_signed_vma *local_got_refcounts;
--  union gotref *local_funcdesc;
--  const Elf_Internal_Rela *rel, *relend;
--
--  if (bfd_link_relocatable (info))
--    return TRUE;
--
--  elf_section_data (sec)->local_dynrel = NULL;
--
--  symtab_hdr = &elf_symtab_hdr (abfd);
--  sym_hashes = elf_sym_hashes (abfd);
--  local_got_refcounts = elf_local_got_refcounts (abfd);
--  local_funcdesc = sh_elf_local_funcdesc (abfd);
--
--  relend = relocs + sec->reloc_count;
--  for (rel = relocs; rel < relend; rel++)
--    {
--      unsigned long r_symndx;
--      unsigned int r_type;
--      struct elf_link_hash_entry *h = NULL;
--#ifdef INCLUDE_SHMEDIA
--      int seen_stt_datalabel = 0;
--#endif
--
--      r_symndx = ELF32_R_SYM (rel->r_info);
--      if (r_symndx >= symtab_hdr->sh_info)
--	{
--	  struct elf_sh_link_hash_entry *eh;
--	  struct elf_sh_dyn_relocs **pp;
--	  struct elf_sh_dyn_relocs *p;
--
--	  h = sym_hashes[r_symndx - symtab_hdr->sh_info];
--	  while (h->root.type == bfd_link_hash_indirect
--		 || h->root.type == bfd_link_hash_warning)
--	    {
--#ifdef INCLUDE_SHMEDIA
--	      seen_stt_datalabel |= h->type == STT_DATALABEL;
--#endif
--	      h = (struct elf_link_hash_entry *) h->root.u.i.link;
--	    }
--	  eh = (struct elf_sh_link_hash_entry *) h;
--	  for (pp = &eh->dyn_relocs; (p = *pp) != NULL; pp = &p->next)
--	    if (p->sec == sec)
--	      {
--		/* Everything must go for SEC.  */
--		*pp = p->next;
--		break;
--	      }
--	}
--
--      r_type = ELF32_R_TYPE (rel->r_info);
--      switch (sh_elf_optimized_tls_reloc (info, r_type, h != NULL))
--	{
--	case R_SH_TLS_LD_32:
--	  if (sh_elf_hash_table (info)->tls_ldm_got.refcount > 0)
--	    sh_elf_hash_table (info)->tls_ldm_got.refcount -= 1;
--	  break;
--
--	case R_SH_GOT32:
--	case R_SH_GOT20:
--	case R_SH_GOTOFF:
--	case R_SH_GOTOFF20:
--	case R_SH_GOTPC:
--#ifdef INCLUDE_SHMEDIA
--	case R_SH_GOT_LOW16:
--	case R_SH_GOT_MEDLOW16:
--	case R_SH_GOT_MEDHI16:
--	case R_SH_GOT_HI16:
--	case R_SH_GOT10BY4:
--	case R_SH_GOT10BY8:
--	case R_SH_GOTOFF_LOW16:
--	case R_SH_GOTOFF_MEDLOW16:
--	case R_SH_GOTOFF_MEDHI16:
--	case R_SH_GOTOFF_HI16:
--	case R_SH_GOTPC_LOW16:
--	case R_SH_GOTPC_MEDLOW16:
--	case R_SH_GOTPC_MEDHI16:
--	case R_SH_GOTPC_HI16:
--#endif
--	case R_SH_TLS_GD_32:
--	case R_SH_TLS_IE_32:
--	case R_SH_GOTFUNCDESC:
--	case R_SH_GOTFUNCDESC20:
--	  if (h != NULL)
--	    {
--#ifdef INCLUDE_SHMEDIA
--	      if (seen_stt_datalabel)
--		{
--		  struct elf_sh_link_hash_entry *eh;
--		  eh = (struct elf_sh_link_hash_entry *) h;
--		  if (eh->datalabel_got.refcount > 0)
--		    eh->datalabel_got.refcount -= 1;
--		}
--	      else
--#endif
--		if (h->got.refcount > 0)
--		  h->got.refcount -= 1;
--	    }
--	  else if (local_got_refcounts != NULL)
--	    {
--#ifdef INCLUDE_SHMEDIA
--	      if (rel->r_addend & 1)
--		{
--		  if (local_got_refcounts[symtab_hdr->sh_info + r_symndx] > 0)
--		    local_got_refcounts[symtab_hdr->sh_info + r_symndx] -= 1;
--		}
--	      else
--#endif
--		if (local_got_refcounts[r_symndx] > 0)
--		  local_got_refcounts[r_symndx] -= 1;
--	    }
--	  break;
--
--	case R_SH_FUNCDESC:
--	  if (h != NULL)
--	    sh_elf_hash_entry (h)->abs_funcdesc_refcount -= 1;
--	  else if (sh_elf_hash_table (info)->fdpic_p && !bfd_link_pic (info))
--	    sh_elf_hash_table (info)->srofixup->size -= 4;
--
--	  /* Fall through.  */
--
--	case R_SH_GOTOFFFUNCDESC:
--	case R_SH_GOTOFFFUNCDESC20:
--	  if (h != NULL)
--	    sh_elf_hash_entry (h)->funcdesc.refcount -= 1;
--	  else
--	    local_funcdesc[r_symndx].refcount -= 1;
--	  break;
--
--	case R_SH_DIR32:
--	  if (sh_elf_hash_table (info)->fdpic_p && !bfd_link_pic (info)
--	      && (sec->flags & SEC_ALLOC) != 0)
--	    sh_elf_hash_table (info)->srofixup->size -= 4;
--	  /* Fall thru */
--
--	case R_SH_REL32:
--	  if (bfd_link_pic (info))
--	    break;
--	  /* Fall thru */
--
--	case R_SH_PLT32:
--#ifdef INCLUDE_SHMEDIA
--	case R_SH_PLT_LOW16:
--	case R_SH_PLT_MEDLOW16:
--	case R_SH_PLT_MEDHI16:
--	case R_SH_PLT_HI16:
--#endif
--	  if (h != NULL)
--	    {
--	      if (h->plt.refcount > 0)
--		h->plt.refcount -= 1;
--	    }
--	  break;
--
--	case R_SH_GOTPLT32:
--#ifdef INCLUDE_SHMEDIA
--	case R_SH_GOTPLT_LOW16:
--	case R_SH_GOTPLT_MEDLOW16:
--	case R_SH_GOTPLT_MEDHI16:
--	case R_SH_GOTPLT_HI16:
--	case R_SH_GOTPLT10BY4:
--	case R_SH_GOTPLT10BY8:
--#endif
--	  if (h != NULL)
--	    {
--	      struct elf_sh_link_hash_entry *eh;
--	      eh = (struct elf_sh_link_hash_entry *) h;
--	      if (eh->gotplt_refcount > 0)
--		{
--		  eh->gotplt_refcount -= 1;
--		  if (h->plt.refcount > 0)
--		    h->plt.refcount -= 1;
--		}
--#ifdef INCLUDE_SHMEDIA
--	      else if (seen_stt_datalabel)
--		{
--		  if (eh->datalabel_got.refcount > 0)
--		    eh->datalabel_got.refcount -= 1;
--		}
--#endif
--	      else if (h->got.refcount > 0)
--		h->got.refcount -= 1;
--	    }
--	  else if (local_got_refcounts != NULL)
--	    {
--#ifdef INCLUDE_SHMEDIA
--	      if (rel->r_addend & 1)
--		{
--		  if (local_got_refcounts[symtab_hdr->sh_info + r_symndx] > 0)
--		    local_got_refcounts[symtab_hdr->sh_info + r_symndx] -= 1;
--		}
--	      else
--#endif
--		if (local_got_refcounts[r_symndx] > 0)
--		  local_got_refcounts[r_symndx] -= 1;
--	    }
--	  break;
--
--	default:
--	  break;
--	}
--    }
--
--  return TRUE;
--}
--
- /* Copy the extra info we tack onto an elf_link_hash_entry.  */
- 
- static void
-@@ -7455,7 +7241,6 @@
- 					sh_elf_merge_private_data
- 
- #define elf_backend_gc_mark_hook	sh_elf_gc_mark_hook
--#define elf_backend_gc_sweep_hook	sh_elf_gc_sweep_hook
- #define elf_backend_check_relocs	sh_elf_check_relocs
- #define elf_backend_copy_indirect_symbol \
- 					sh_elf_copy_indirect_symbol
-diff -Nur binutils-2.27.orig/binutils/readelf.c binutils-2.27/binutils/readelf.c
---- binutils-2.27.orig/binutils/readelf.c	2016-08-03 09:36:51.000000000 +0200
-+++ binutils-2.27/binutils/readelf.c	2016-12-10 15:34:01.978874153 +0100
-@@ -3307,6 +3307,8 @@
- 	    case EF_SH2A_SH3_NOFPU: strcat (buf, ", sh2a-nofpu-or-sh3-nommu"); break;
- 	    case EF_SH2A_SH4: strcat (buf, ", sh2a-or-sh4"); break;
- 	    case EF_SH2A_SH3E: strcat (buf, ", sh2a-or-sh3e"); break;
-+	    case EF_SHJ2: strcat (buf, ", j2"); break;
-+	    case EF_SH2A_SH3_SHJ2: strcat (buf, ", sh2a-nofpu-or-sh3-nommu-or-shj2 -nofpu"); break;
- 	    default: strcat (buf, _(", unknown ISA")); break;
- 	    }
- 
-diff -Nur binutils-2.27.orig/gas/config/tc-sh.c binutils-2.27/gas/config/tc-sh.c
---- binutils-2.27.orig/gas/config/tc-sh.c	2016-08-03 09:36:51.000000000 +0200
-+++ binutils-2.27/gas/config/tc-sh.c	2016-12-10 15:34:01.982873978 +0100
-@@ -1648,6 +1648,8 @@
- 		  ptr++;
- 		}
- 	      get_operand (&ptr, operand + 2);
-+	      if (strcmp (info->name,"cas") == 0)
-+		operand[2].type = A_IND_0;
- 	    }
- 	  else
- 	    {
-@@ -2187,7 +2189,10 @@
- 		goto fail;
- 	      reg_m = 4;
- 	      break;
--
-+	    case A_IND_0:
-+	      if (user->reg != 0)
-+		goto fail;
-+	      break;
- 	    default:
- 	      printf (_("unhandled %d\n"), arg);
- 	      goto fail;
-diff -Nur binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s binutils-2.27/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s
---- binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s	2015-11-13 09:27:41.000000000 +0100
-+++ binutils-2.27/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh3-nommu.s	2016-12-10 15:34:01.994873426 +0100
-@@ -12,8 +12,6 @@
- sh2a_nofpu_or_sh3_nommu:
- ! Instructions introduced into sh2a-nofpu-or-sh3-nommu
- 	pref @r4                  ;!/* 0000nnnn10000011 pref @<REG_N>       */{"pref",{A_IND_N},{HEX_0,REG_N,HEX_8,HEX_3}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
- 
- ! Instructions inherited from ancestors: sh sh2
- 	add #4,r4                 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
-diff -Nur binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s binutils-2.27/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s
---- binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s	2015-11-13 09:27:41.000000000 +0100
-+++ binutils-2.27/gas/testsuite/gas/sh/arch/sh2a-nofpu-or-sh4-nommu-nofpu.s	2016-12-10 15:34:02.006872864 +0100
-@@ -12,7 +12,7 @@
- sh2a_nofpu_or_sh4_nommu_nofpu:
- ! Instructions introduced into sh2a-nofpu-or-sh4-nommu-nofpu
- 
--! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu
-+! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu
- 	add #4,r4                 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
- 	add r5,r4                 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
- 	addc r5,r4                ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
-@@ -119,8 +119,8 @@
- 	rte                       ;!/* 0000000000101011 rte                 */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up}
- 	rts                       ;!/* 0000000000001011 rts                 */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
- 	sett                      ;!/* 0000000000011000 sett                */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
--	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
-+	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
-+	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
- 	shal r4                   ;!/* 0100nnnn00100000 shal <REG_N>        */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
- 	shar r4                   ;!/* 0100nnnn00100001 shar <REG_N>        */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
- 	shll r4                   ;!/* 0100nnnn00000000 shll <REG_N>        */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
-diff -Nur binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh2a-nofpu.s binutils-2.27/gas/testsuite/gas/sh/arch/sh2a-nofpu.s
---- binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh2a-nofpu.s	2015-11-13 09:27:41.000000000 +0100
-+++ binutils-2.27/gas/testsuite/gas/sh/arch/sh2a-nofpu.s	2016-12-10 15:34:02.006872864 +0100
-@@ -64,7 +64,7 @@
- 	movu.b @(2048,r5),r4      ;!/* 0011nnnnmmmm0001 1000dddddddddddd movu.b @(<DISP12>,<REG_M>),<REG_N> */  {"movu.b",{A_DISP_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_1,HEX_8,DISP0_12}, arch_sh2a_nofpu_up | arch_op32}
- 	movu.w @(2048,r5),r4      ;!/* 0011nnnnmmmm0001 1001dddddddddddd movu.w @(<DISP12>,<REG_M>),<REG_N> */  {"movu.w",{A_DISP_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_1,HEX_9,DISP0_12BY2}, arch_sh2a_nofpu_up | arch_op32}
- 
--! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu
-+! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu
- 	add #4,r4                 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
- 	add r5,r4                 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
- 	addc r5,r4                ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
-@@ -171,8 +171,8 @@
- 	rte                       ;!/* 0000000000101011 rte                 */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up}
- 	rts                       ;!/* 0000000000001011 rts                 */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
- 	sett                      ;!/* 0000000000011000 sett                */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
--	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
-+	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
-+	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
- 	shal r4                   ;!/* 0100nnnn00100000 shal <REG_N>        */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
- 	shar r4                   ;!/* 0100nnnn00100001 shar <REG_N>        */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
- 	shll r4                   ;!/* 0100nnnn00000000 shll <REG_N>        */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
-diff -Nur binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s binutils-2.27/gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s
---- binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s	2015-11-13 09:27:41.000000000 +0100
-+++ binutils-2.27/gas/testsuite/gas/sh/arch/sh2a-or-sh3e.s	2016-12-10 15:34:02.006872864 +0100
-@@ -13,7 +13,7 @@
- ! Instructions introduced into sh2a-or-sh3e
- 	fsqrt fr1                 ;!/* 1111nnnn01101101 fsqrt <F_REG_N>    */{"fsqrt",{F_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh2a_or_sh3e_up}
- 
--! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2e
-+! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2e
- 	add #4,r4                 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
- 	add r5,r4                 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
- 	addc r5,r4                ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
-@@ -124,8 +124,8 @@
- 	rte                       ;!/* 0000000000101011 rte                 */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up}
- 	rts                       ;!/* 0000000000001011 rts                 */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
- 	sett                      ;!/* 0000000000011000 sett                */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
--	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
-+	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
-+	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
- 	shal r4                   ;!/* 0100nnnn00100000 shal <REG_N>        */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
- 	shar r4                   ;!/* 0100nnnn00100001 shar <REG_N>        */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
- 	shll r4                   ;!/* 0100nnnn00000000 shll <REG_N>        */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
-diff -Nur binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh2a-or-sh4.s binutils-2.27/gas/testsuite/gas/sh/arch/sh2a-or-sh4.s
---- binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh2a-or-sh4.s	2015-11-13 09:27:41.000000000 +0100
-+++ binutils-2.27/gas/testsuite/gas/sh/arch/sh2a-or-sh4.s	2016-12-10 15:34:02.010872679 +0100
-@@ -39,7 +39,7 @@
- 	fsub dr4,dr2              ;!/* 1111nnn0mmm00001 fsub <D_REG_M>,<D_REG_N>*/{"fsub",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_1}, arch_sh2a_or_sh4_up}
- 	ftrc dr2,FPUL             ;!/* 1111nnnn00111101 ftrc <D_REG_N>,FPUL*/{"ftrc",{D_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}, arch_sh2a_or_sh4_up}
- 
--! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-or-sh3e sh2e
-+! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-or-sh3e sh2e
- 	add #4,r4                 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
- 	add r5,r4                 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
- 	addc r5,r4                ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
-@@ -150,8 +150,8 @@
- 	rte                       ;!/* 0000000000101011 rte                 */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up}
- 	rts                       ;!/* 0000000000001011 rts                 */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
- 	sett                      ;!/* 0000000000011000 sett                */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
--	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
-+	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
-+	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
- 	shal r4                   ;!/* 0100nnnn00100000 shal <REG_N>        */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
- 	shar r4                   ;!/* 0100nnnn00100001 shar <REG_N>        */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
- 	shll r4                   ;!/* 0100nnnn00000000 shll <REG_N>        */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
-diff -Nur binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh2a.s binutils-2.27/gas/testsuite/gas/sh/arch/sh2a.s
---- binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh2a.s	2015-11-13 09:27:41.000000000 +0100
-+++ binutils-2.27/gas/testsuite/gas/sh/arch/sh2a.s	2016-12-10 15:34:02.010872679 +0100
-@@ -16,7 +16,7 @@
- 	fmov.s fr2,@(2048,r4)     ;!/* 0011nnnnmmmm0001 0011dddddddddddd fmov.s <F_REG_M>,@(<DISP12>,<REG_N>) */  {"fmov.s",{F_REG_M,A_DISP_REG_N},{HEX_3,REG_N,REG_M,HEX_1,HEX_3,DISP1_12BY4}, arch_sh2a_up | arch_op32}
- 	fmov.s @(2048,r5),fr1     ;!/* 0011nnnnmmmm0001 0111dddddddddddd fmov.s @(<DISP12>,<REG_M>),<F_REG_N> */  {"fmov.s",{A_DISP_REG_M,F_REG_N},{HEX_3,REG_N,REG_M,HEX_1,HEX_7,DISP0_12BY4}, arch_sh2a_up | arch_op32}
- 
--! Instructions inherited from ancestors: sh sh2 sh2a-nofpu sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-or-sh3e sh2a-or-sh4 sh2e
-+! Instructions inherited from ancestors: sh sh2 sh2a-nofpu sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-or-sh3e sh2a-or-sh4 sh2e
- 	add #4,r4                 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
- 	add r5,r4                 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
- 	addc r5,r4                ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
-@@ -140,8 +140,8 @@
- 	rte                       ;!/* 0000000000101011 rte                 */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up}
- 	rts                       ;!/* 0000000000001011 rts                 */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
- 	sett                      ;!/* 0000000000011000 sett                */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
--	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
-+	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
-+	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
- 	shal r4                   ;!/* 0100nnnn00100000 shal <REG_N>        */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
- 	shar r4                   ;!/* 0100nnnn00100001 shar <REG_N>        */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
- 	shll r4                   ;!/* 0100nnnn00000000 shll <REG_N>        */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
-diff -Nur binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh3-dsp.s binutils-2.27/gas/testsuite/gas/sh/arch/sh3-dsp.s
---- binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh3-dsp.s	2015-11-13 09:27:41.000000000 +0100
-+++ binutils-2.27/gas/testsuite/gas/sh/arch/sh3-dsp.s	2016-12-10 15:34:02.010872679 +0100
-@@ -12,7 +12,7 @@
- sh3_dsp:
- ! Instructions introduced into sh3-dsp
- 
--! Instructions inherited from ancestors: sh sh-dsp sh2 sh2a-nofpu-or-sh3-nommu sh3 sh3-nommu
-+! Instructions inherited from ancestors: sh sh-dsp sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh3 sh3-nommu
- 	add #4,r4                 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
- 	add r5,r4                 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
- 	addc r5,r4                ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
-@@ -152,8 +152,8 @@
- 	setrc #4                  ;!/* 10000010i8*1.... setrc #<imm>        */{"setrc",{A_IMM},{HEX_8,HEX_2,IMM0_8}, arch_sh_dsp_up}
- 	repeat 10 20 r4           ;!/* repeat start end <REG_N>       	*/{"repeat",{A_DISP_PC,A_DISP_PC,A_REG_N},{REPEAT,REG_N,HEX_1,HEX_4}, arch_sh_dsp_up}
- 	repeat 10 20 #4           ;!/* repeat start end #<imm>        	*/{"repeat",{A_DISP_PC,A_DISP_PC,A_IMM},{REPEAT,HEX_2,IMM0_8,HEX_8}, arch_sh_dsp_up}
--	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
-+	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
-+	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
- 	shal r4                   ;!/* 0100nnnn00100000 shal <REG_N>        */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
- 	shar r4                   ;!/* 0100nnnn00100001 shar <REG_N>        */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
- 	shll r4                   ;!/* 0100nnnn00000000 shll <REG_N>        */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
-diff -Nur binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh3e.s binutils-2.27/gas/testsuite/gas/sh/arch/sh3e.s
---- binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh3e.s	2015-11-13 09:27:41.000000000 +0100
-+++ binutils-2.27/gas/testsuite/gas/sh/arch/sh3e.s	2016-12-10 15:34:02.010872679 +0100
-@@ -12,7 +12,7 @@
- sh3e:
- ! Instructions introduced into sh3e
- 
--! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-or-sh3e sh2e sh3 sh3-nommu
-+! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-or-sh3e sh2e sh3 sh3-nommu
- 	add #4,r4                 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
- 	add r5,r4                 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
- 	addc r5,r4                ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
-@@ -132,8 +132,8 @@
- 	rts                       ;!/* 0000000000001011 rts                 */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
- 	sets                      ;!/* 0000000001011000 sets                */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up}
- 	sett                      ;!/* 0000000000011000 sett                */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
--	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
-+	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
-+	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
- 	shal r4                   ;!/* 0100nnnn00100000 shal <REG_N>        */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
- 	shar r4                   ;!/* 0100nnnn00100001 shar <REG_N>        */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
- 	shll r4                   ;!/* 0100nnnn00000000 shll <REG_N>        */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
-diff -Nur binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh3-nommu.s binutils-2.27/gas/testsuite/gas/sh/arch/sh3-nommu.s
---- binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh3-nommu.s	2015-11-13 09:27:41.000000000 +0100
-+++ binutils-2.27/gas/testsuite/gas/sh/arch/sh3-nommu.s	2016-12-10 15:34:02.010872679 +0100
-@@ -26,7 +26,7 @@
- 	stc.l SPC,@-r4            ;!/* 0100nnnn01000011 stc.l SPC,@-<REG_N> */{"stc.l",{A_SPC,A_DEC_N},{HEX_4,REG_N,HEX_4,HEX_3}, arch_sh3_nommu_up}
- 	stc.l r1_bank,@-r4        ;!/* 0100nnnn1xxx0011 stc.l Rn_BANK,@-<REG_N> */{"stc.l",{A_REG_B,A_DEC_N},{HEX_4,REG_N,REG_B,HEX_3}, arch_sh3_nommu_up}
- 
--! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu
-+! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu
- 	add #4,r4                 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
- 	add r5,r4                 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
- 	addc r5,r4                ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
-@@ -133,8 +133,8 @@
- 	rte                       ;!/* 0000000000101011 rte                 */{"rte",{0},{HEX_0,HEX_0,HEX_2,HEX_B}, arch_sh_up}
- 	rts                       ;!/* 0000000000001011 rts                 */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
- 	sett                      ;!/* 0000000000011000 sett                */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
--	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
-+	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
-+	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
- 	shal r4                   ;!/* 0100nnnn00100000 shal <REG_N>        */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
- 	shar r4                   ;!/* 0100nnnn00100001 shar <REG_N>        */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
- 	shll r4                   ;!/* 0100nnnn00000000 shll <REG_N>        */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
-diff -Nur binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh3.s binutils-2.27/gas/testsuite/gas/sh/arch/sh3.s
---- binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh3.s	2015-11-13 09:27:41.000000000 +0100
-+++ binutils-2.27/gas/testsuite/gas/sh/arch/sh3.s	2016-12-10 15:34:02.010872679 +0100
-@@ -13,7 +13,7 @@
- ! Instructions introduced into sh3
- 	ldtlb                     ;!/* 0000000000111000 ldtlb               */{"ldtlb",{0},{HEX_0,HEX_0,HEX_3,HEX_8}, arch_sh3_up}
- 
--! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh3-nommu
-+! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh3-nommu
- 	add #4,r4                 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
- 	add r5,r4                 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
- 	addc r5,r4                ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
-@@ -128,8 +128,8 @@
- 	rts                       ;!/* 0000000000001011 rts                 */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
- 	sets                      ;!/* 0000000001011000 sets                */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up}
- 	sett                      ;!/* 0000000000011000 sett                */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
--	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
-+	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
-+	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
- 	shal r4                   ;!/* 0100nnnn00100000 shal <REG_N>        */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
- 	shar r4                   ;!/* 0100nnnn00100001 shar <REG_N>        */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
- 	shll r4                   ;!/* 0100nnnn00000000 shll <REG_N>        */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
-diff -Nur binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh4al-dsp.s binutils-2.27/gas/testsuite/gas/sh/arch/sh4al-dsp.s
---- binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh4al-dsp.s	2015-11-13 09:27:41.000000000 +0100
-+++ binutils-2.27/gas/testsuite/gas/sh/arch/sh4al-dsp.s	2016-12-10 15:34:02.018872308 +0100
-@@ -48,7 +48,7 @@
- 	dct pswap x1,m0           ;!/* 10011101xx01zzzz pswap <DSP_REG_X>,<DSP_REG_N> */  {"pswap", {DSP_REG_X,DSP_REG_N},{PPI,PPIC,HEX_9,HEX_D,HEX_1}, arch_sh4al_dsp_up}
- 	dct pswap y0,m0           ;!/* 1011110101yyzzzz pswap <DSP_REG_Y>,<DSP_REG_N> */  {"pswap", {DSP_REG_Y,DSP_REG_N},{PPI,PPIC,HEX_B,HEX_D,HEX_4}, arch_sh4al_dsp_up}
- 
--! Instructions inherited from ancestors: sh sh-dsp sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu sh3 sh3-dsp sh3-nommu sh4-nofpu sh4-nommu-nofpu sh4a-nofpu
-+! Instructions inherited from ancestors: sh sh-dsp sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh3 sh3-dsp sh3-nommu sh4-nofpu sh4-nommu-nofpu sh4a-nofpu
- 	add #4,r4                 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
- 	add r5,r4                 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
- 	addc r5,r4                ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
-@@ -202,8 +202,8 @@
- 	setrc #4                  ;!/* 10000010i8*1.... setrc #<imm>        */{"setrc",{A_IMM},{HEX_8,HEX_2,IMM0_8}, arch_sh_dsp_up}
- 	repeat 10 20 r4           ;!/* repeat start end <REG_N>       	*/{"repeat",{A_DISP_PC,A_DISP_PC,A_REG_N},{REPEAT,REG_N,HEX_1,HEX_4}, arch_sh_dsp_up}
- 	repeat 10 20 #4           ;!/* repeat start end #<imm>        	*/{"repeat",{A_DISP_PC,A_DISP_PC,A_IMM},{REPEAT,HEX_2,IMM0_8,HEX_8}, arch_sh_dsp_up}
--	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
-+	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
-+	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
- 	shal r4                   ;!/* 0100nnnn00100000 shal <REG_N>        */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
- 	shar r4                   ;!/* 0100nnnn00100001 shar <REG_N>        */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
- 	shll r4                   ;!/* 0100nnnn00000000 shll <REG_N>        */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
-diff -Nur binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh4a-nofpu.s binutils-2.27/gas/testsuite/gas/sh/arch/sh4a-nofpu.s
---- binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh4a-nofpu.s	2015-11-13 09:27:41.000000000 +0100
-+++ binutils-2.27/gas/testsuite/gas/sh/arch/sh4a-nofpu.s	2016-12-10 15:34:02.014872493 +0100
-@@ -19,7 +19,7 @@
- 	prefi @r4                 ;!/* 0000nnnn11010011 prefi @<REG_N>      */{"prefi",{A_IND_N},{HEX_0,REG_N,HEX_D,HEX_3}, arch_sh4a_nofpu_up}
- 	synco                     ;!/* 0000000010101011 synco               */{"synco",{0},{HEX_0,HEX_0,HEX_A,HEX_B}, arch_sh4a_nofpu_up}
- 
--! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu sh3 sh3-nommu sh4-nofpu sh4-nommu-nofpu
-+! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh3 sh3-nommu sh4-nofpu sh4-nommu-nofpu
- 	add #4,r4                 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
- 	add r5,r4                 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
- 	addc r5,r4                ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
-@@ -143,8 +143,8 @@
- 	rts                       ;!/* 0000000000001011 rts                 */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
- 	sets                      ;!/* 0000000001011000 sets                */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up}
- 	sett                      ;!/* 0000000000011000 sett                */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
--	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
-+	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
-+	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
- 	shal r4                   ;!/* 0100nnnn00100000 shal <REG_N>        */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
- 	shar r4                   ;!/* 0100nnnn00100001 shar <REG_N>        */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
- 	shll r4                   ;!/* 0100nnnn00000000 shll <REG_N>        */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
-diff -Nur binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh4a.s binutils-2.27/gas/testsuite/gas/sh/arch/sh4a.s
---- binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh4a.s	2015-11-13 09:27:41.000000000 +0100
-+++ binutils-2.27/gas/testsuite/gas/sh/arch/sh4a.s	2016-12-10 15:34:02.014872493 +0100
-@@ -13,7 +13,7 @@
- ! Instructions introduced into sh4a
- 	fpchg                     ;!/* 1111011111111101 fpchg               */{"fpchg",{0},{HEX_F,HEX_7,HEX_F,HEX_D}, arch_sh4a_up}
- 
--! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-or-sh3e sh2a-or-sh4 sh2e sh3 sh3-nommu sh3e sh4 sh4-nofpu sh4-nommu-nofpu sh4a-nofpu
-+! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-or-sh3e sh2a-or-sh4 sh2e sh3 sh3-nommu sh3e sh4 sh4-nofpu sh4-nommu-nofpu sh4a-nofpu
- 	add #4,r4                 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
- 	add r5,r4                 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
- 	addc r5,r4                ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
-@@ -147,8 +147,8 @@
- 	rts                       ;!/* 0000000000001011 rts                 */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
- 	sets                      ;!/* 0000000001011000 sets                */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up}
- 	sett                      ;!/* 0000000000011000 sett                */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
--	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
-+	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
-+	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
- 	shal r4                   ;!/* 0100nnnn00100000 shal <REG_N>        */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
- 	shar r4                   ;!/* 0100nnnn00100001 shar <REG_N>        */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
- 	shll r4                   ;!/* 0100nnnn00000000 shll <REG_N>        */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
-diff -Nur binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh4-nofpu.s binutils-2.27/gas/testsuite/gas/sh/arch/sh4-nofpu.s
---- binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh4-nofpu.s	2015-11-13 09:27:41.000000000 +0100
-+++ binutils-2.27/gas/testsuite/gas/sh/arch/sh4-nofpu.s	2016-12-10 15:34:02.014872493 +0100
-@@ -12,7 +12,7 @@
- sh4_nofpu:
- ! Instructions introduced into sh4-nofpu
- 
--! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu sh3 sh3-nommu sh4-nommu-nofpu
-+! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh3 sh3-nommu sh4-nommu-nofpu
- 	add #4,r4                 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
- 	add r5,r4                 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
- 	addc r5,r4                ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
-@@ -136,8 +136,8 @@
- 	rts                       ;!/* 0000000000001011 rts                 */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
- 	sets                      ;!/* 0000000001011000 sets                */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up}
- 	sett                      ;!/* 0000000000011000 sett                */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
--	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
-+	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
-+	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
- 	shal r4                   ;!/* 0100nnnn00100000 shal <REG_N>        */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
- 	shar r4                   ;!/* 0100nnnn00100001 shar <REG_N>        */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
- 	shll r4                   ;!/* 0100nnnn00000000 shll <REG_N>        */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
-diff -Nur binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh4-nommu-nofpu.s binutils-2.27/gas/testsuite/gas/sh/arch/sh4-nommu-nofpu.s
---- binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh4-nommu-nofpu.s	2015-11-13 09:27:41.000000000 +0100
-+++ binutils-2.27/gas/testsuite/gas/sh/arch/sh4-nommu-nofpu.s	2016-12-10 15:34:02.014872493 +0100
-@@ -24,7 +24,7 @@
- 	stc.l SGR,@-r4            ;!/* 0100nnnn00110010 stc.l SGR,@-<REG_N> */{"stc.l",{A_SGR,A_DEC_N},{HEX_4,REG_N,HEX_3,HEX_2}, arch_sh4_nommu_nofpu_up}
- 	stc.l DBR,@-r4            ;!/* 0100nnnn11110010 stc.l DBR,@-<REG_N> */{"stc.l",{A_DBR,A_DEC_N},{HEX_4,REG_N,HEX_F,HEX_2}, arch_sh4_nommu_nofpu_up}
- 
--! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu sh3-nommu
-+! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh3-nommu
- 	add #4,r4                 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
- 	add r5,r4                 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
- 	addc r5,r4                ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
-@@ -139,8 +139,8 @@
- 	rts                       ;!/* 0000000000001011 rts                 */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
- 	sets                      ;!/* 0000000001011000 sets                */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up}
- 	sett                      ;!/* 0000000000011000 sett                */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
--	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
-+	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
-+	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
- 	shal r4                   ;!/* 0100nnnn00100000 shal <REG_N>        */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
- 	shar r4                   ;!/* 0100nnnn00100001 shar <REG_N>        */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
- 	shll r4                   ;!/* 0100nnnn00000000 shll <REG_N>        */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
-diff -Nur binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh4.s binutils-2.27/gas/testsuite/gas/sh/arch/sh4.s
---- binutils-2.27.orig/gas/testsuite/gas/sh/arch/sh4.s	2015-11-13 09:27:41.000000000 +0100
-+++ binutils-2.27/gas/testsuite/gas/sh/arch/sh4.s	2016-12-10 15:34:02.014872493 +0100
-@@ -17,7 +17,7 @@
- 	fsrra fr1                 ;!/* 1111nnnn01111101 fsrra <F_REG_N>    */{"fsrra",{F_REG_N},{HEX_F,REG_N,HEX_7,HEX_D}, arch_sh4_up}
- 	ftrv xmtrx,fv0            ;!/* 1111nn0111111101 ftrv XMTRX_M4,<V_REG_n>*/{"ftrv",{XMTRX_M4,V_REG_N},{HEX_F,REG_N_B01,HEX_F,HEX_D}, arch_sh4_up}
- 
--! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-or-sh3e sh2a-or-sh4 sh2e sh3 sh3-nommu sh3e sh4-nofpu sh4-nommu-nofpu
-+! Instructions inherited from ancestors: sh sh2 sh2a-nofpu-or-sh3-nommu sh2a-nofpu-or-sh3-nommu-or-sh2j-nofpu sh2a-nofpu-or-sh4-nommu-nofpu sh2a-or-sh3e sh2a-or-sh4 sh2e sh3 sh3-nommu sh3e sh4-nofpu sh4-nommu-nofpu
- 	add #4,r4                 ;!/* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh_up}
- 	add r5,r4                 ;!/* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh_up}
- 	addc r5,r4                ;!/* 0011nnnnmmmm1110 addc <REG_M>,<REG_N>*/{"addc",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_E}, arch_sh_up}
-@@ -145,8 +145,8 @@
- 	rts                       ;!/* 0000000000001011 rts                 */{"rts",{0},{HEX_0,HEX_0,HEX_0,HEX_B}, arch_sh_up}
- 	sets                      ;!/* 0000000001011000 sets                */{"sets",{0},{HEX_0,HEX_0,HEX_5,HEX_8}, arch_sh3_nommu_up}
- 	sett                      ;!/* 0000000000011000 sett                */{"sett",{0},{HEX_0,HEX_0,HEX_1,HEX_8}, arch_sh_up}
--	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up}
--	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up}
-+	shad r5,r4                ;!/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
-+	shld r5,r4                ;!/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_sh2j_nofpu_up}
- 	shal r4                   ;!/* 0100nnnn00100000 shal <REG_N>        */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up}
- 	shar r4                   ;!/* 0100nnnn00100001 shar <REG_N>        */{"shar",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_1}, arch_sh_up}
- 	shll r4                   ;!/* 0100nnnn00000000 shll <REG_N>        */{"shll",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_0}, arch_sh_up}
-diff -Nur binutils-2.27.orig/include/elf/sh.h binutils-2.27/include/elf/sh.h
---- binutils-2.27.orig/include/elf/sh.h	2016-08-03 09:36:53.000000000 +0200
-+++ binutils-2.27/include/elf/sh.h	2016-12-10 15:34:02.018872308 +0100
-@@ -39,6 +39,7 @@
- #define EF_SH2E            11
- #define EF_SH4A		   12
- #define EF_SH2A            13
-+#define EF_SHJ2            14
- 
- #define EF_SH4_NOFPU	   16
- #define EF_SH4A_NOFPU	   17
-@@ -50,6 +51,7 @@
- #define EF_SH2A_SH3_NOFPU  22
- #define EF_SH2A_SH4        23
- #define EF_SH2A_SH3E       24
-+#define EF_SH2A_SH3_SHJ2   25
- 
- /* This one can only mix in objects from other EF_SH5 objects.  */
- #define EF_SH5		  10
-@@ -72,7 +74,8 @@
- /* EF_SH2E		*/ bfd_mach_sh2e	, \
- /* EF_SH4A		*/ bfd_mach_sh4a	, \
- /* EF_SH2A		*/ bfd_mach_sh2a        , \
--/* 14, 15		*/ 0, 0, \
-+/* EF_SHJ2		*/ bfd_mach_shj2        , \
-+/* 15			*/ 0, \
- /* EF_SH4_NOFPU		*/ bfd_mach_sh4_nofpu	, \
- /* EF_SH4A_NOFPU	*/ bfd_mach_sh4a_nofpu	, \
- /* EF_SH4_NOMMU_NOFPU	*/ bfd_mach_sh4_nommu_nofpu, \
-@@ -81,7 +84,8 @@
- /* EF_SH2A_SH4_NOFPU    */ bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu, \
- /* EF_SH2A_SH3_NOFPU    */ bfd_mach_sh2a_nofpu_or_sh3_nommu, \
- /* EF_SH2A_SH4          */ bfd_mach_sh2a_or_sh4 , \
--/* EF_SH2A_SH3E         */ bfd_mach_sh2a_or_sh3e
-+/* EF_SH2A_SH3E         */ bfd_mach_sh2a_or_sh3e, \
-+/* EF_SH2A_SH3_SHJ2_NOFPU */ bfd_mach_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu
- 
- /* Convert arch_sh* into EF_SH*.  */
- int sh_find_elf_flags (unsigned int arch_set);
-diff -Nur binutils-2.27.orig/ld/emulparams/shelf32.sh binutils-2.27/ld/emulparams/shelf32.sh
---- binutils-2.27.orig/ld/emulparams/shelf32.sh	2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.27/ld/emulparams/shelf32.sh	2016-12-10 15:34:06.138680918 +0100
-@@ -11,6 +11,9 @@
- TEMPLATE_NAME=elf32
- GENERATE_SHLIB_SCRIPT=yes
- EMBEDDED=yes
-+# PR 17739.  Delay checking relocs until after all files have
-+# been opened and linker garbage collection has taken place.
-+CHECK_RELOCS_AFTER_OPEN_INPUT=yes
- 
- DATA_START_SYMBOLS='PROVIDE (___data = .);'
- 
-diff -Nur binutils-2.27.orig/ld/emulparams/shelf_nto.sh binutils-2.27/ld/emulparams/shelf_nto.sh
---- binutils-2.27.orig/ld/emulparams/shelf_nto.sh	2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.27/ld/emulparams/shelf_nto.sh	2016-12-10 15:34:06.138680918 +0100
-@@ -9,3 +9,6 @@
- GENERATE_SHLIB_SCRIPT=yes
- TEXT_START_SYMBOLS='_btext = .;'
- ENTRY=_start
-+# PR 17739.  Delay checking relocs until after all files have
-+# been opened and linker garbage collection has taken place.
-+CHECK_RELOCS_AFTER_OPEN_INPUT=yes
-diff -Nur binutils-2.27.orig/ld/emulparams/shelf.sh binutils-2.27/ld/emulparams/shelf.sh
---- binutils-2.27.orig/ld/emulparams/shelf.sh	2016-08-03 09:36:54.000000000 +0200
-+++ binutils-2.27/ld/emulparams/shelf.sh	2016-12-10 15:34:06.138680918 +0100
-@@ -11,6 +11,9 @@
- TEMPLATE_NAME=elf32
- GENERATE_SHLIB_SCRIPT=yes
- EMBEDDED=yes
-+# PR 17739.  Delay checking relocs until after all files have
-+# been opened and linker garbage collection has taken place.
-+CHECK_RELOCS_AFTER_OPEN_INPUT=yes
- 
- # These are for compatibility with the COFF toolchain.
- ENTRY=start
-diff -Nur binutils-2.27.orig/ld/emulparams/shelf_vxworks.sh binutils-2.27/ld/emulparams/shelf_vxworks.sh
---- binutils-2.27.orig/ld/emulparams/shelf_vxworks.sh	2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.27/ld/emulparams/shelf_vxworks.sh	2016-12-10 15:34:06.138680918 +0100
-@@ -14,6 +14,10 @@
- GENERATE_SHLIB_SCRIPT=yes
- ENTRY=__start
- SYMPREFIX=_
-+# PR 17739.  Delay checking relocs until after all files have
-+# been opened and linker garbage collection has taken place.
-+CHECK_RELOCS_AFTER_OPEN_INPUT=yes
-+
- GOT=".got          ${RELOCATING-0} : {
-   PROVIDE(__GLOBAL_OFFSET_TABLE_ = .);
-   *(.got.plt) *(.got) }"
-diff -Nur binutils-2.27.orig/ld/emulparams/shlelf32_linux.sh binutils-2.27/ld/emulparams/shlelf32_linux.sh
---- binutils-2.27.orig/ld/emulparams/shlelf32_linux.sh	2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.27/ld/emulparams/shlelf32_linux.sh	2016-12-10 15:34:06.138680918 +0100
-@@ -13,7 +13,9 @@
- TEMPLATE_NAME=elf32
- GENERATE_SHLIB_SCRIPT=yes
- GENERATE_PIE_SCRIPT=yes
--
-+# PR 17739.  Delay checking relocs until after all files have
-+# been opened and linker garbage collection has taken place.
-+CHECK_RELOCS_AFTER_OPEN_INPUT=yes
- 
- DATA_START_SYMBOLS='PROVIDE (___data = .);'
- 
-diff -Nur binutils-2.27.orig/ld/emulparams/shlelf_linux.sh binutils-2.27/ld/emulparams/shlelf_linux.sh
---- binutils-2.27.orig/ld/emulparams/shlelf_linux.sh	2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.27/ld/emulparams/shlelf_linux.sh	2016-12-10 15:34:06.138680918 +0100
-@@ -12,6 +12,9 @@
- TEMPLATE_NAME=elf32
- GENERATE_SHLIB_SCRIPT=yes
- GENERATE_PIE_SCRIPT=yes
-+# PR 17739.  Delay checking relocs until after all files have
-+# been opened and linker garbage collection has taken place.
-+CHECK_RELOCS_AFTER_OPEN_INPUT=yes
- 
- DATA_START_SYMBOLS='PROVIDE (__data_start = .);';
- 
-diff -Nur binutils-2.27.orig/ld/emulparams/shlelf_nto.sh binutils-2.27/ld/emulparams/shlelf_nto.sh
---- binutils-2.27.orig/ld/emulparams/shlelf_nto.sh	2013-11-04 16:33:39.000000000 +0100
-+++ binutils-2.27/ld/emulparams/shlelf_nto.sh	2016-12-10 15:34:06.138680918 +0100
-@@ -9,3 +9,6 @@
- GENERATE_SHLIB_SCRIPT=yes
- TEXT_START_SYMBOLS='_btext = .;'
- ENTRY=_start
-+# PR 17739.  Delay checking relocs until after all files have
-+# been opened and linker garbage collection has taken place.
-+CHECK_RELOCS_AFTER_OPEN_INPUT=yes
-diff -Nur binutils-2.27.orig/opcodes/sh-dis.c binutils-2.27/opcodes/sh-dis.c
---- binutils-2.27.orig/opcodes/sh-dis.c	2016-08-03 09:36:55.000000000 +0200
-+++ binutils-2.27/opcodes/sh-dis.c	2016-12-10 15:34:02.038871379 +0100
-@@ -868,6 +868,9 @@
- 	    case XMTRX_M4:
- 	      fprintf_fn (stream, "xmtrx");
- 	      break;
-+	    case A_IND_0:
-+	      fprintf_fn (stream, "@r0");
-+	      break;
- 	    default:
- 	      abort ();
- 	    }
-diff -Nur binutils-2.27.orig/opcodes/sh-opc.h binutils-2.27/opcodes/sh-opc.h
---- binutils-2.27.orig/opcodes/sh-opc.h	2016-08-03 09:36:55.000000000 +0200
-+++ binutils-2.27/opcodes/sh-opc.h	2016-12-10 15:34:02.046871007 +0100
-@@ -191,7 +191,8 @@
-     FPUL_N,
-     FPUL_M,
-     FPSCR_N,
--    FPSCR_M
-+    FPSCR_M,
-+    A_IND_0
-   }
- sh_arg_type;
- 
-@@ -218,9 +219,11 @@
- #define arch_sh4_base	    (1 << 5)
- #define arch_sh4a_base	    (1 << 6)
- #define arch_sh2a_base      (1 << 7)
--#define arch_sh_base_mask   MASK (0, 7)
-+#define arch_shj2_base      (1 << 8)
-+#define arch_sh2a_sh3_shj2_base  (1 << 9)
-+#define arch_sh_base_mask   MASK (0, 9)
- 
--/* Bits 8 ... 24 are currently free.  */
-+/* Bits 10 ... 24 are currently free.  */
- 
- /* This is an annotation on instruction types, but we
-    abuse the arch field in instructions to denote it.  */
-@@ -258,6 +261,8 @@
- #define arch_sh2a_nofpu_or_sh3_nommu       (arch_sh2a_sh3_base|arch_sh_no_mmu |arch_sh_no_co)
- #define arch_sh2a_or_sh3e                  (arch_sh2a_sh4_base|arch_sh_no_mmu |arch_sh_sp_fpu)
- #define arch_sh2a_or_sh4                   (arch_sh2a_sh4_base|arch_sh_no_mmu |arch_sh_dp_fpu)
-+#define arch_shj2                          (arch_shj2_base    |arch_sh_no_mmu |arch_sh_no_co)
-+#define arch_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu       (arch_sh2a_sh3_shj2_base|arch_sh_no_mmu |arch_sh_no_co)
- 
- #define SH_MERGE_ARCH_SET(SET1, SET2) ((SET1) & (SET2))
- #define SH_VALID_BASE_ARCH_SET(SET) (((SET) & arch_sh_base_mask) != 0)
-@@ -323,7 +328,8 @@
- #define arch_sh2_up                            (arch_sh2 \
- 		| arch_sh2e_up \
- 		| arch_sh2a_nofpu_or_sh3_nommu_up \
--		| arch_sh_dsp_up)
-+		| arch_sh_dsp_up \
-+		| arch_shj2_up)
- #define arch_sh2a_nofpu_or_sh3_nommu_up        (arch_sh2a_nofpu_or_sh3_nommu \
- 		| arch_sh2a_nofpu_or_sh4_nommu_nofpu_up \
- 		| arch_sh2a_or_sh3e_up \
-@@ -349,6 +355,12 @@
- #define arch_sh4a_nofpu_up                     (arch_sh4a_nofpu \
- 		| arch_sh4a_up \
- 		| arch_sh4al_dsp_up)
-+#define arch_shj2_up		       	       ( arch_shj2)
-+#define arch_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu_up (arch_sh2a_nofpu_or_sh3_nommu \
-+		| arch_sh2a_nofpu_or_sh4_nommu_nofpu_up \
-+		| arch_sh2a_or_sh3e_up \
-+		| arch_sh3_nommu_up \
-+		| arch_shj2_up)
- 
- /* Right branches.  */
- #define arch_sh2e_up                           (arch_sh2e \
-@@ -717,9 +729,9 @@
- 
- /* repeat start end #<imm>        	*/{"repeat",{A_DISP_PC,A_DISP_PC,A_IMM},{REPEAT,HEX_2,IMM0_8,HEX_8}, arch_sh_dsp_up},
- 
--/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_up},
-+/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu_up},
- 
--/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_up},
-+/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh2a_nofpu_or_sh3_nommu_or_shj2_nofpu_up},
- 
- /* 0100nnnn00100000 shal <REG_N>        */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh_up},
- 
-@@ -1197,7 +1209,7 @@
- {"movu.b",{A_DISP_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_1,HEX_8,DISP0_12}, arch_sh2a_nofpu_up | arch_op32},
- /* 0011nnnnmmmm0001 1001dddddddddddd movu.w @(<DISP12>,<REG_M>),<REG_N> */
- {"movu.w",{A_DISP_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_1,HEX_9,DISP0_12BY2}, arch_sh2a_nofpu_up | arch_op32},
--
-+  /* 0010nnnnmmmm0011 cas.l Rm,Rn,@R0 */       {"cas.l", { A_REG_M,A_REG_N,A_IND_0},{HEX_2,REG_N,REG_M,HEX_3}, arch_shj2_up},
- { 0, {0}, {0}, 0 }
- };
- 
diff --git a/toolchain/binutils/patches/2.27/m68k.patch b/toolchain/binutils/patches/2.27/m68k.patch
deleted file mode 100644
index c6b683a14..000000000
--- a/toolchain/binutils/patches/2.27/m68k.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur binutils-2.27.orig/bfd/elf32-m68k.c binutils-2.27/bfd/elf32-m68k.c
---- binutils-2.27.orig/bfd/elf32-m68k.c	2016-08-03 09:36:50.000000000 +0200
-+++ binutils-2.27/bfd/elf32-m68k.c	2016-10-30 16:18:12.133337290 +0100
-@@ -2637,7 +2637,6 @@
- 	  if (sgot == NULL)
- 	    {
- 	      sgot = bfd_get_linker_section (dynobj, ".got");
--	      BFD_ASSERT (sgot != NULL);
- 	    }
- 
- 	  if (srelgot == NULL
diff --git a/toolchain/binutils/patches/2.27/microblaze-static.patch b/toolchain/binutils/patches/2.27/microblaze-static.patch
deleted file mode 100644
index 4e8c400f1..000000000
--- a/toolchain/binutils/patches/2.27/microblaze-static.patch
+++ /dev/null
@@ -1,14 +0,0 @@
-From:
-https://sourceware.org/bugzilla/show_bug.cgi?id=21017
-
-diff -Nur binutils-2.27.orig/bfd/elf32-microblaze.c binutils-2.27/bfd/elf32-microblaze.c
---- binutils-2.27.orig/bfd/elf32-microblaze.c	2016-08-03 09:36:50.000000000 +0200
-+++ binutils-2.27/bfd/elf32-microblaze.c	2017-01-03 04:43:49.173901997 +0100
-@@ -2399,6 +2399,7 @@
-           tls_type |= (TLS_TLS | TLS_LD);
-         dogottls:
-           sec->has_tls_reloc = 1;
-+	case R_MICROBLAZE_GOTOFF_64:
-         case R_MICROBLAZE_GOT_64:
-           if (htab->sgot == NULL)
-             {