diff options
| author | Waldemar Brodkorb <wbx@openadk.org> | 2017-03-12 01:45:11 +0100 |
|---|---|---|
| committer | Waldemar Brodkorb <wbx@openadk.org> | 2017-03-12 01:45:11 +0100 |
| commit | 2990748111f2fa30fdffd78858ca8574f63ab918 (patch) | |
| tree | a8aa0e10e2463c023c27babcb567fb1db549b6c4 /toolchain | |
| parent | d40e634b5bb61453675aed282c24eb86f8c3f9d6 (diff) | |
riscv: add gcc fix
From here:
https://github.com/riscv/riscv-gcc/commit/2c6af46afa0ffe94a9a7162b656ffddfdf5b4b31
After reporting here:
https://forums.sifive.com/t/creating-bare-metal-toolchain-for-riscv32/390
Diffstat (limited to 'toolchain')
| -rw-r--r-- | toolchain/gcc/patches/git/riscv-preferred-mode-fix.patch | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/toolchain/gcc/patches/git/riscv-preferred-mode-fix.patch b/toolchain/gcc/patches/git/riscv-preferred-mode-fix.patch new file mode 100644 index 000000000..ebab5bbe4 --- /dev/null +++ b/toolchain/gcc/patches/git/riscv-preferred-mode-fix.patch @@ -0,0 +1,19 @@ +diff -Nur gcc-git.orig/gcc/config/riscv/riscv.c gcc-git/gcc/config/riscv/riscv.c +--- gcc-git.orig/gcc/config/riscv/riscv.c 2017-03-11 21:53:53.000000000 +0100 ++++ gcc-git/gcc/config/riscv/riscv.c 2017-03-11 22:11:38.830507954 +0100 +@@ -3634,8 +3634,13 @@ + static reg_class_t + riscv_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, reg_class_t rclass) + { +- return reg_class_subset_p (FP_REGS, rclass) ? FP_REGS : +- reg_class_subset_p (GR_REGS, rclass) ? GR_REGS : ++ machine_mode mode = GET_MODE (x); ++ if ((GET_MODE_CLASS (mode) == MODE_FLOAT ++ || GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT) ++ && reg_class_subset_p (FP_REGS, rclass)) ++ return FP_REGS; ++ ++ return reg_class_subset_p (GR_REGS, rclass) ? GR_REGS : + rclass; + } + |