remove sortext stuff, fix macos x host builds

1 files changed, 4937 insertions, 10 deletions

diff --git a/toolchain/kernel-headers/patches/3.9.11/sortext.patch b/toolchain/kernel-headers/patches/3.9.11/sortext.patch
index d82b76a2d..45a8a4985 100644
--- a/toolchain/kernel-headers/patches/3.9.11/sortext.patch
+++ b/toolchain/kernel-headers/patches/3.9.11/sortext.patch
@@ -1,22 +1,4949 @@
-diff -Nur linux-3.5.2.orig/arch/mips/Kconfig linux-3.5.2/arch/mips/Kconfig
---- linux-3.5.2.orig/arch/mips/Kconfig	2012-08-15 16:55:25.000000000 +0200
-+++ linux-3.5.2/arch/mips/Kconfig	2012-08-23 11:10:29.000000000 +0200
-@@ -31,7 +31,6 @@
+diff -Nur linux-3.9.11.orig/arch/arm/Kconfig linux-3.9.11/arch/arm/Kconfig
+--- linux-3.9.11.orig/arch/arm/Kconfig	2013-07-21 02:16:17.000000000 +0200
++++ linux-3.9.11/arch/arm/Kconfig	2013-09-12 07:26:36.000000000 +0200
+@@ -6,7 +6,6 @@
+ 	select ARCH_HAVE_CUSTOM_GPIO_H
+ 	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
+ 	select ARCH_WANT_IPC_PARSE_VERSION
+-	select BUILDTIME_EXTABLE_SORT if MMU
+ 	select CPU_PM if (SUSPEND || CPU_IDLE)
+ 	select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN && MMU
+ 	select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
+diff -Nur linux-3.9.11.orig/arch/mips/Kconfig linux-3.9.11/arch/mips/Kconfig
+--- linux-3.9.11.orig/arch/mips/Kconfig	2013-07-21 02:16:17.000000000 +0200
++++ linux-3.9.11/arch/mips/Kconfig	2013-09-12 07:26:20.000000000 +0200
+@@ -34,7 +34,6 @@
  	select HAVE_MEMBLOCK_NODE_MAP
  	select ARCH_DISCARD_MEMBLOCK
  	select GENERIC_SMP_IDLE_THREAD
 -	select BUILDTIME_EXTABLE_SORT
  	select GENERIC_CLOCKEVENTS
  	select GENERIC_CMOS_UPDATE
- 
-diff -Nur linux-3.5.2.orig/arch/x86/Kconfig linux-3.5.2/arch/x86/Kconfig
---- linux-3.5.2.orig/arch/x86/Kconfig	2012-08-15 16:55:25.000000000 +0200
-+++ linux-3.5.2/arch/x86/Kconfig	2012-08-23 11:10:17.000000000 +0200
-@@ -85,7 +85,6 @@
- 	select DCACHE_WORD_ACCESS
+ 	select HAVE_MOD_ARCH_SPECIFIC
+diff -Nur linux-3.9.11.orig/arch/mips/Kconfig.orig linux-3.9.11/arch/mips/Kconfig.orig
+--- linux-3.9.11.orig/arch/mips/Kconfig.orig	1970-01-01 01:00:00.000000000 +0100
++++ linux-3.9.11/arch/mips/Kconfig.orig	2013-07-21 02:16:17.000000000 +0200
+@@ -0,0 +1,2557 @@
++config MIPS
++	bool
++	default y
++	select HAVE_GENERIC_DMA_COHERENT
++	select HAVE_IDE
++	select HAVE_OPROFILE
++	select HAVE_PERF_EVENTS
++	select PERF_USE_VMALLOC
++	select HAVE_ARCH_KGDB
++	select ARCH_HAVE_CUSTOM_GPIO_H
++	select HAVE_FUNCTION_TRACER
++	select HAVE_FUNCTION_TRACE_MCOUNT_TEST
++	select HAVE_DYNAMIC_FTRACE
++	select HAVE_FTRACE_MCOUNT_RECORD
++	select HAVE_C_RECORDMCOUNT
++	select HAVE_FUNCTION_GRAPH_TRACER
++	select HAVE_KPROBES
++	select HAVE_KRETPROBES
++	select HAVE_DEBUG_KMEMLEAK
++	select ARCH_BINFMT_ELF_RANDOMIZE_PIE
++	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
++	select RTC_LIB if !MACH_LOONGSON
++	select GENERIC_ATOMIC64 if !64BIT
++	select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
++	select HAVE_DMA_ATTRS
++	select HAVE_DMA_API_DEBUG
++	select HAVE_GENERIC_HARDIRQS
++	select GENERIC_IRQ_PROBE
++	select GENERIC_IRQ_SHOW
++	select HAVE_ARCH_JUMP_LABEL
++	select ARCH_WANT_IPC_PARSE_VERSION
++	select IRQ_FORCED_THREADING
++	select HAVE_MEMBLOCK
++	select HAVE_MEMBLOCK_NODE_MAP
++	select ARCH_DISCARD_MEMBLOCK
++	select GENERIC_SMP_IDLE_THREAD
++	select BUILDTIME_EXTABLE_SORT
++	select GENERIC_CLOCKEVENTS
++	select GENERIC_CMOS_UPDATE
++	select HAVE_MOD_ARCH_SPECIFIC
++	select VIRT_TO_BUS
++	select MODULES_USE_ELF_REL if MODULES
++	select MODULES_USE_ELF_RELA if MODULES && 64BIT
++	select CLONE_BACKWARDS
++
++menu "Machine selection"
++
++config ZONE_DMA
++	bool
++
++choice
++	prompt "System type"
++	default SGI_IP22
++
++config MIPS_ALCHEMY
++	bool "Alchemy processor based machines"
++	select 64BIT_PHYS_ADDR
++	select CEVT_R4K
++	select CSRC_R4K
++	select IRQ_CPU
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_APM_EMULATION
++	select GENERIC_GPIO
++	select ARCH_WANT_OPTIONAL_GPIOLIB
++	select SYS_SUPPORTS_ZBOOT
++	select USB_ARCH_HAS_OHCI
++	select USB_ARCH_HAS_EHCI
++
++config AR7
++	bool "Texas Instruments AR7"
++	select BOOT_ELF32
++	select DMA_NONCOHERENT
++	select CEVT_R4K
++	select CSRC_R4K
++	select IRQ_CPU
++	select NO_EXCEPT_FILL
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SYS_SUPPORTS_ZBOOT_UART16550
++	select ARCH_REQUIRE_GPIOLIB
++	select VLYNQ
++	select HAVE_CLK
++	help
++	  Support for the Texas Instruments AR7 System-on-a-Chip
++	  family: TNETD7100, 7200 and 7300.
++
++config ATH79
++	bool "Atheros AR71XX/AR724X/AR913X based boards"
++	select ARCH_REQUIRE_GPIOLIB
++	select BOOT_RAW
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select HAVE_CLK
++	select IRQ_CPU
++	select MIPS_MACHINE
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	help
++	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
++
++config BCM47XX
++	bool "Broadcom BCM47XX based boards"
++	select ARCH_WANT_OPTIONAL_GPIOLIB
++	select BOOT_RAW
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select FW_CFE
++	select HW_HAS_PCI
++	select IRQ_CPU
++	select NO_EXCEPT_FILL
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SYS_HAS_EARLY_PRINTK
++	help
++	 Support for BCM47XX based boards
++
++config BCM63XX
++	bool "Broadcom BCM63XX based boards"
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select IRQ_CPU
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_HAS_EARLY_PRINTK
++	select SWAP_IO_SPACE
++	select ARCH_REQUIRE_GPIOLIB
++	select HAVE_CLK
++	help
++	 Support for BCM63XX based boards
++
++config MIPS_COBALT
++	bool "Cobalt Server"
++	select CEVT_R4K
++	select CSRC_R4K
++	select CEVT_GT641XX
++	select DMA_NONCOHERENT
++	select HW_HAS_PCI
++	select I8253
++	select I8259
++	select IRQ_CPU
++	select IRQ_GT641XX
++	select PCI_GT64XXX_PCI0
++	select PCI
++	select SYS_HAS_CPU_NEVADA
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config MACH_DECSTATION
++	bool "DECstations"
++	select BOOT_ELF32
++	select CEVT_DS1287
++	select CEVT_R4K
++	select CSRC_IOASIC
++	select CSRC_R4K
++	select CPU_DADDI_WORKAROUNDS if 64BIT
++	select CPU_R4000_WORKAROUNDS if 64BIT
++	select CPU_R4400_WORKAROUNDS if 64BIT
++	select DMA_NONCOHERENT
++	select NO_IOPORT
++	select IRQ_CPU
++	select SYS_HAS_CPU_R3000
++	select SYS_HAS_CPU_R4X00
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SYS_SUPPORTS_128HZ
++	select SYS_SUPPORTS_256HZ
++	select SYS_SUPPORTS_1024HZ
++	help
++	  This enables support for DEC's MIPS based workstations.  For details
++	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
++	  DECstation porting pages on <http://decstation.unix-ag.org/>.
++
++	  If you have one of the following DECstation Models you definitely
++	  want to choose R4xx0 for the CPU Type:
++
++		DECstation 5000/50
++		DECstation 5000/150
++		DECstation 5000/260
++		DECsystem 5900/260
++
++	  otherwise choose R3000.
++
++config MACH_JAZZ
++	bool "Jazz family of machines"
++	select FW_ARC
++	select FW_ARC32
++	select ARCH_MAY_HAVE_PC_FDC
++	select CEVT_R4K
++	select CSRC_R4K
++	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
++	select GENERIC_ISA_DMA
++	select HAVE_PCSPKR_PLATFORM
++	select IRQ_CPU
++	select I8253
++	select I8259
++	select ISA
++	select SYS_HAS_CPU_R4X00
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_100HZ
++	help
++	 This a family of machines based on the MIPS R4030 chipset which was
++	 used by several vendors to build RISC/os and Windows NT workstations.
++	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
++	 Olivetti M700-10 workstations.
++
++config MACH_JZ4740
++	bool "Ingenic JZ4740 based machines"
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SYS_SUPPORTS_ZBOOT_UART16550
++	select DMA_NONCOHERENT
++	select IRQ_CPU
++	select GENERIC_GPIO
++	select ARCH_REQUIRE_GPIOLIB
++	select SYS_HAS_EARLY_PRINTK
++	select HAVE_PWM
++	select HAVE_CLK
++	select GENERIC_IRQ_CHIP
++
++config LANTIQ
++	bool "Lantiq based platforms"
++	select DMA_NONCOHERENT
++	select IRQ_CPU
++	select CEVT_R4K
++	select CSRC_R4K
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_MULTITHREADING
++	select SYS_HAS_EARLY_PRINTK
++	select ARCH_REQUIRE_GPIOLIB
++	select SWAP_IO_SPACE
++	select BOOT_RAW
++	select HAVE_MACH_CLKDEV
++	select CLKDEV_LOOKUP
++	select USE_OF
++	select PINCTRL
++	select PINCTRL_LANTIQ
++
++config LASAT
++	bool "LASAT Networks platforms"
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select SYS_HAS_EARLY_PRINTK
++	select HW_HAS_PCI
++	select IRQ_CPU
++	select PCI_GT64XXX_PCI0
++	select MIPS_NILE4
++	select R5000_CPU_SCACHE
++	select SYS_HAS_CPU_R5000
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config MACH_LOONGSON
++	bool "Loongson family of machines"
++	select SYS_SUPPORTS_ZBOOT
++	help
++	  This enables the support of Loongson family of machines.
++
++	  Loongson is a family of general-purpose MIPS-compatible CPUs.
++	  developed at Institute of Computing Technology (ICT),
++	  Chinese Academy of Sciences (CAS) in the People's Republic
++	  of China. The chief architect is Professor Weiwu Hu.
++
++config MACH_LOONGSON1
++	bool "Loongson 1 family of machines"
++	select SYS_SUPPORTS_ZBOOT
++	help
++	  This enables support for the Loongson 1 based machines.
++
++	  Loongson 1 is a family of 32-bit MIPS-compatible SoCs developed by
++	  the ICT (Institute of Computing Technology) and the Chinese Academy
++	  of Sciences.
++
++config MIPS_MALTA
++	bool "MIPS Malta board"
++	select ARCH_MAY_HAVE_PC_FDC
++	select BOOT_ELF32
++	select BOOT_RAW
++	select CEVT_R4K
++	select CSRC_R4K
++	select CSRC_GIC
++	select DMA_NONCOHERENT
++	select GENERIC_ISA_DMA
++	select HAVE_PCSPKR_PLATFORM
++	select IRQ_CPU
++	select IRQ_GIC
++	select HW_HAS_PCI
++	select I8253
++	select I8259
++	select MIPS_BOARDS_GEN
++	select MIPS_BONITO64
++	select MIPS_CPU_SCACHE
++	select PCI_GT64XXX_PCI0
++	select MIPS_MSC
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_HAS_CPU_MIPS64_R1
++	select SYS_HAS_CPU_MIPS64_R2
++	select SYS_HAS_CPU_NEVADA
++	select SYS_HAS_CPU_RM7000
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SYS_SUPPORTS_MIPS_CMP
++	select SYS_SUPPORTS_MULTITHREADING
++	select SYS_SUPPORTS_SMARTMIPS
++	select SYS_SUPPORTS_ZBOOT
++	help
++	  This enables support for the MIPS Technologies Malta evaluation
++	  board.
++
++config MIPS_SEAD3
++	bool "MIPS SEAD3 board"
++	select BOOT_ELF32
++	select BOOT_RAW
++	select CEVT_R4K
++	select CSRC_R4K
++	select CPU_MIPSR2_IRQ_VI
++	select CPU_MIPSR2_IRQ_EI
++	select DMA_NONCOHERENT
++	select IRQ_CPU
++	select IRQ_GIC
++	select MIPS_BOARDS_GEN
++	select MIPS_CPU_SCACHE
++	select MIPS_MSC
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_HAS_CPU_MIPS64_R1
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SYS_SUPPORTS_SMARTMIPS
++	select USB_ARCH_HAS_EHCI
++	select USB_EHCI_BIG_ENDIAN_DESC
++	select USB_EHCI_BIG_ENDIAN_MMIO
++	select USE_OF
++	help
++	  This enables support for the MIPS Technologies SEAD3 evaluation
++	  board.
++
++config NEC_MARKEINS
++	bool "NEC EMMA2RH Mark-eins board"
++	select SOC_EMMA2RH
++	select HW_HAS_PCI
++	help
++	  This enables support for the NEC Electronics Mark-eins boards.
++
++config MACH_VR41XX
++	bool "NEC VR4100 series based machines"
++	select CEVT_R4K
++	select CSRC_R4K
++	select SYS_HAS_CPU_VR41XX
++	select ARCH_REQUIRE_GPIOLIB
++
++config NXP_STB220
++	bool "NXP STB220 board"
++	select SOC_PNX833X
++	help
++	 Support for NXP Semiconductors STB220 Development Board.
++
++config NXP_STB225
++	bool "NXP 225 board"
++	select SOC_PNX833X
++	select SOC_PNX8335
++	help
++	 Support for NXP Semiconductors STB225 Development Board.
++
++config PMC_MSP
++	bool "PMC-Sierra MSP chipsets"
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select SWAP_IO_SPACE
++	select NO_EXCEPT_FILL
++	select BOOT_RAW
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select IRQ_CPU
++	select SERIAL_8250
++	select SERIAL_8250_CONSOLE
++	help
++	  This adds support for the PMC-Sierra family of Multi-Service
++	  Processor System-On-A-Chips.  These parts include a number
++	  of integrated peripherals, interfaces and DSPs in addition to
++	  a variety of MIPS cores.
++
++config POWERTV
++	bool "Cisco PowerTV"
++	select BOOT_ELF32
++	select CEVT_R4K
++	select CPU_MIPSR2_IRQ_VI
++	select CPU_MIPSR2_IRQ_EI
++	select CSRC_POWERTV
++	select DMA_NONCOHERENT
++	select HW_HAS_PCI
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select USB_OHCI_LITTLE_ENDIAN
++	help
++	  This enables support for the Cisco PowerTV Platform.
++
++config RALINK
++	bool "Ralink based machines"
++	select CEVT_R4K
++	select CSRC_R4K
++	select BOOT_RAW
++	select DMA_NONCOHERENT
++	select IRQ_CPU
++	select USE_OF
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SYS_HAS_EARLY_PRINTK
++	select HAVE_MACH_CLKDEV
++	select CLKDEV_LOOKUP
++
++config SGI_IP22
++	bool "SGI IP22 (Indy/Indigo2)"
++	select FW_ARC
++	select FW_ARC32
++	select BOOT_ELF32
++	select CEVT_R4K
++	select CSRC_R4K
++	select DEFAULT_SGI_PARTITION
++	select DMA_NONCOHERENT
++	select HW_HAS_EISA
++	select I8253
++	select I8259
++	select IP22_CPU_SCACHE
++	select IRQ_CPU
++	select GENERIC_ISA_DMA_SUPPORT_BROKEN
++	select SGI_HAS_I8042
++	select SGI_HAS_INDYDOG
++	select SGI_HAS_HAL2
++	select SGI_HAS_SEEQ
++	select SGI_HAS_WD93
++	select SGI_HAS_ZILOG
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_R4X00
++	select SYS_HAS_CPU_R5000
++	#
++	# Disable EARLY_PRINTK for now since it leads to overwritten prom
++	# memory during early boot on some machines.
++	#
++	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
++	# for a more details discussion
++	#
++	# select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	help
++	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
++	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
++	  that runs on these, say Y here.
++
++config SGI_IP27
++	bool "SGI IP27 (Origin200/2000)"
++	select FW_ARC
++	select FW_ARC64
++	select BOOT_ELF64
++	select DEFAULT_SGI_PARTITION
++	select DMA_COHERENT
++	select SYS_HAS_EARLY_PRINTK
++	select HW_HAS_PCI
++	select NR_CPUS_DEFAULT_64
++	select SYS_HAS_CPU_R10000
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_NUMA
++	select SYS_SUPPORTS_SMP
++	help
++	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
++	  workstations.  To compile a Linux kernel that runs on these, say Y
++	  here.
++
++config SGI_IP28
++	bool "SGI IP28 (Indigo2 R10k)"
++	select FW_ARC
++	select FW_ARC64
++	select BOOT_ELF64
++	select CEVT_R4K
++	select CSRC_R4K
++	select DEFAULT_SGI_PARTITION
++	select DMA_NONCOHERENT
++	select GENERIC_ISA_DMA_SUPPORT_BROKEN
++	select IRQ_CPU
++	select HW_HAS_EISA
++	select I8253
++	select I8259
++	select SGI_HAS_I8042
++	select SGI_HAS_INDYDOG
++	select SGI_HAS_HAL2
++	select SGI_HAS_SEEQ
++	select SGI_HAS_WD93
++	select SGI_HAS_ZILOG
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_R10000
++	#
++	# Disable EARLY_PRINTK for now since it leads to overwritten prom
++	# memory during early boot on some machines.
++	#
++	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
++	# for a more details discussion
++	#
++	# select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++      help
++        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
++        kernel that runs on these, say Y here.
++
++config SGI_IP32
++	bool "SGI IP32 (O2)"
++	select FW_ARC
++	select FW_ARC32
++	select BOOT_ELF32
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select HW_HAS_PCI
++	select IRQ_CPU
++	select R5000_CPU_SCACHE
++	select RM7000_CPU_SCACHE
++	select SYS_HAS_CPU_R5000
++	select SYS_HAS_CPU_R10000 if BROKEN
++	select SYS_HAS_CPU_RM7000
++	select SYS_HAS_CPU_NEVADA
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	help
++	  If you want this kernel to run on SGI O2 workstation, say Y here.
++
++config SIBYTE_CRHINE
++	bool "Sibyte BCM91120C-CRhine"
++	select BOOT_ELF32
++	select DMA_COHERENT
++	select SIBYTE_BCM1120
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_SB1
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config SIBYTE_CARMEL
++	bool "Sibyte BCM91120x-Carmel"
++	select BOOT_ELF32
++	select DMA_COHERENT
++	select SIBYTE_BCM1120
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_SB1
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config SIBYTE_CRHONE
++	bool "Sibyte BCM91125C-CRhone"
++	select BOOT_ELF32
++	select DMA_COHERENT
++	select SIBYTE_BCM1125
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_SB1
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config SIBYTE_RHONE
++	bool "Sibyte BCM91125E-Rhone"
++	select BOOT_ELF32
++	select DMA_COHERENT
++	select SIBYTE_BCM1125H
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_SB1
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config SIBYTE_SWARM
++	bool "Sibyte BCM91250A-SWARM"
++	select BOOT_ELF32
++	select DMA_COHERENT
++	select HAVE_PATA_PLATFORM
++	select NR_CPUS_DEFAULT_2
++	select SIBYTE_SB1250
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_SB1
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select ZONE_DMA32 if 64BIT
++
++config SIBYTE_LITTLESUR
++	bool "Sibyte BCM91250C2-LittleSur"
++	select BOOT_ELF32
++	select DMA_COHERENT
++	select HAVE_PATA_PLATFORM
++	select NR_CPUS_DEFAULT_2
++	select SIBYTE_SB1250
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_SB1
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config SIBYTE_SENTOSA
++	bool "Sibyte BCM91250E-Sentosa"
++	select BOOT_ELF32
++	select DMA_COHERENT
++	select NR_CPUS_DEFAULT_2
++	select SIBYTE_SB1250
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_SB1
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++
++config SIBYTE_BIGSUR
++	bool "Sibyte BCM91480B-BigSur"
++	select BOOT_ELF32
++	select DMA_COHERENT
++	select NR_CPUS_DEFAULT_4
++	select SIBYTE_BCM1x80
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_SB1
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select ZONE_DMA32 if 64BIT
++
++config SNI_RM
++	bool "SNI RM200/300/400"
++	select FW_ARC if CPU_LITTLE_ENDIAN
++	select FW_ARC32 if CPU_LITTLE_ENDIAN
++	select FW_SNIPROM if CPU_BIG_ENDIAN
++	select ARCH_MAY_HAVE_PC_FDC
++	select BOOT_ELF32
++	select CEVT_R4K
++	select CSRC_R4K
++	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
++	select DMA_NONCOHERENT
++	select GENERIC_ISA_DMA
++	select HAVE_PCSPKR_PLATFORM
++	select HW_HAS_EISA
++	select HW_HAS_PCI
++	select IRQ_CPU
++	select I8253
++	select I8259
++	select ISA
++	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
++	select SYS_HAS_CPU_R4X00
++	select SYS_HAS_CPU_R5000
++	select SYS_HAS_CPU_R10000
++	select R5000_CPU_SCACHE
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	help
++	  The SNI RM200/300/400 are MIPS-based machines manufactured by
++	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
++	  Technology and now in turn merged with Fujitsu.  Say Y here to
++	  support this machine type.
++
++config MACH_TX39XX
++	bool "Toshiba TX39 series based machines"
++
++config MACH_TX49XX
++	bool "Toshiba TX49 series based machines"
++
++config MIKROTIK_RB532
++	bool "Mikrotik RB532 boards"
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select HW_HAS_PCI
++	select IRQ_CPU
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SWAP_IO_SPACE
++	select BOOT_RAW
++	select ARCH_REQUIRE_GPIOLIB
++	help
++	  Support the Mikrotik(tm) RouterBoard 532 series,
++	  based on the IDT RC32434 SoC.
++
++config WR_PPMC
++	bool "Wind River PPMC board"
++	select CEVT_R4K
++	select CSRC_R4K
++	select IRQ_CPU
++	select BOOT_ELF32
++	select DMA_NONCOHERENT
++	select HW_HAS_PCI
++	select PCI_GT64XXX_PCI0
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_MIPS32_R1
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_HAS_CPU_MIPS64_R1
++	select SYS_HAS_CPU_NEVADA
++	select SYS_HAS_CPU_RM7000
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	help
++	  This enables support for the Wind River MIPS32 4KC PPMC evaluation
++	  board, which is based on GT64120 bridge chip.
++
++config CAVIUM_OCTEON_SIMULATOR
++	bool "Cavium Networks Octeon Simulator"
++	select CEVT_R4K
++	select 64BIT_PHYS_ADDR
++	select DMA_COHERENT
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HOTPLUG_CPU
++	select SYS_HAS_CPU_CAVIUM_OCTEON
++	select HOLES_IN_ZONE
++	help
++	  The Octeon simulator is software performance model of the Cavium
++	  Octeon Processor. It supports simulating Octeon processors on x86
++	  hardware.
++
++config CAVIUM_OCTEON_REFERENCE_BOARD
++	bool "Cavium Networks Octeon reference board"
++	select CEVT_R4K
++	select 64BIT_PHYS_ADDR
++	select DMA_COHERENT
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select EDAC_SUPPORT
++	select SYS_SUPPORTS_HOTPLUG_CPU
++	select SYS_HAS_EARLY_PRINTK
++	select SYS_HAS_CPU_CAVIUM_OCTEON
++	select SWAP_IO_SPACE
++	select HW_HAS_PCI
++	select ARCH_SUPPORTS_MSI
++	select ZONE_DMA32
++	select USB_ARCH_HAS_OHCI
++	select USB_ARCH_HAS_EHCI
++	select HOLES_IN_ZONE
++	help
++	  This option supports all of the Octeon reference boards from Cavium
++	  Networks. It builds a kernel that dynamically determines the Octeon
++	  CPU type and supports all known board reference implementations.
++	  Some of the supported boards are:
++		EBT3000
++		EBH3000
++		EBH3100
++		Thunder
++		Kodama
++		Hikari
++	  Say Y here for most Octeon reference boards.
++
++config NLM_XLR_BOARD
++	bool "Netlogic XLR/XLS based systems"
++	select BOOT_ELF32
++	select NLM_COMMON
++	select SYS_HAS_CPU_XLR
++	select SYS_SUPPORTS_SMP
++	select HW_HAS_PCI
++	select SWAP_IO_SPACE
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select 64BIT_PHYS_ADDR
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select DMA_COHERENT
++	select NR_CPUS_DEFAULT_32
++	select CEVT_R4K
++	select CSRC_R4K
++	select IRQ_CPU
++	select ARCH_SUPPORTS_MSI
++	select ZONE_DMA32 if 64BIT
++	select SYNC_R4K
++	select SYS_HAS_EARLY_PRINTK
++	select USB_ARCH_HAS_OHCI if USB_SUPPORT
++	select USB_ARCH_HAS_EHCI if USB_SUPPORT
++	help
++	  Support for systems based on Netlogic XLR and XLS processors.
++	  Say Y here if you have a XLR or XLS based board.
++
++config NLM_XLP_BOARD
++	bool "Netlogic XLP based systems"
++	select BOOT_ELF32
++	select NLM_COMMON
++	select SYS_HAS_CPU_XLP
++	select SYS_SUPPORTS_SMP
++	select HW_HAS_PCI
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select 64BIT_PHYS_ADDR
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SYS_SUPPORTS_HIGHMEM
++	select DMA_COHERENT
++	select NR_CPUS_DEFAULT_32
++	select CEVT_R4K
++	select CSRC_R4K
++	select IRQ_CPU
++	select ZONE_DMA32 if 64BIT
++	select SYNC_R4K
++	select SYS_HAS_EARLY_PRINTK
++	select USE_OF
++	help
++	  This board is based on Netlogic XLP Processor.
++	  Say Y here if you have a XLP based board.
++
++endchoice
++
++source "arch/mips/alchemy/Kconfig"
++source "arch/mips/ath79/Kconfig"
++source "arch/mips/bcm47xx/Kconfig"
++source "arch/mips/bcm63xx/Kconfig"
++source "arch/mips/jazz/Kconfig"
++source "arch/mips/jz4740/Kconfig"
++source "arch/mips/lantiq/Kconfig"
++source "arch/mips/lasat/Kconfig"
++source "arch/mips/pmcs-msp71xx/Kconfig"
++source "arch/mips/powertv/Kconfig"
++source "arch/mips/ralink/Kconfig"
++source "arch/mips/sgi-ip27/Kconfig"
++source "arch/mips/sibyte/Kconfig"
++source "arch/mips/txx9/Kconfig"
++source "arch/mips/vr41xx/Kconfig"
++source "arch/mips/cavium-octeon/Kconfig"
++source "arch/mips/loongson/Kconfig"
++source "arch/mips/loongson1/Kconfig"
++source "arch/mips/netlogic/Kconfig"
++
++endmenu
++
++config RWSEM_GENERIC_SPINLOCK
++	bool
++	default y
++
++config RWSEM_XCHGADD_ALGORITHM
++	bool
++
++config ARCH_HAS_ILOG2_U32
++	bool
++	default n
++
++config ARCH_HAS_ILOG2_U64
++	bool
++	default n
++
++config GENERIC_HWEIGHT
++	bool
++	default y
++
++config GENERIC_CALIBRATE_DELAY
++	bool
++	default y
++
++config SCHED_OMIT_FRAME_POINTER
++	bool
++	default y
++
++#
++# Select some configuration options automatically based on user selections.
++#
++config FW_ARC
++	bool
++
++config ARCH_MAY_HAVE_PC_FDC
++	bool
++
++config BOOT_RAW
++	bool
++
++config CEVT_BCM1480
++	bool
++
++config CEVT_DS1287
++	bool
++
++config CEVT_GT641XX
++	bool
++
++config CEVT_R4K
++	bool
++
++config CEVT_SB1250
++	bool
++
++config CEVT_TXX9
++	bool
++
++config CSRC_BCM1480
++	bool
++
++config CSRC_IOASIC
++	bool
++
++config CSRC_POWERTV
++	bool
++
++config CSRC_R4K
++	bool
++
++config CSRC_GIC
++	bool
++
++config CSRC_SB1250
++	bool
++
++config GPIO_TXX9
++	select GENERIC_GPIO
++	select ARCH_REQUIRE_GPIOLIB
++	bool
++
++config FW_CFE
++	bool
++
++config ARCH_DMA_ADDR_T_64BIT
++	def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT
++
++config DMA_COHERENT
++	bool
++
++config DMA_NONCOHERENT
++	bool
++	select NEED_DMA_MAP_STATE
++
++config NEED_DMA_MAP_STATE
++	bool
++
++config SYS_HAS_EARLY_PRINTK
++	bool
++
++config HOTPLUG_CPU
++	bool "Support for hot-pluggable CPUs"
++	depends on SMP && HOTPLUG && SYS_SUPPORTS_HOTPLUG_CPU
++	help
++	  Say Y here to allow turning CPUs off and on. CPUs can be
++	  controlled through /sys/devices/system/cpu.
++	  (Note: power management support will enable this option
++	    automatically on SMP systems. )
++	  Say N if you want to disable CPU hotplug.
++
++config SYS_SUPPORTS_HOTPLUG_CPU
++	bool
++
++config I8259
++	bool
++
++config MIPS_BONITO64
++	bool
++
++config MIPS_MSC
++	bool
++
++config MIPS_NILE4
++	bool
++
++config MIPS_DISABLE_OBSOLETE_IDE
++	bool
++
++config SYNC_R4K
++	bool
++
++config MIPS_MACHINE
++	def_bool n
++
++config NO_IOPORT
++	def_bool n
++
++config GENERIC_ISA_DMA
++	bool
++	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
++	select ISA_DMA_API
++
++config GENERIC_ISA_DMA_SUPPORT_BROKEN
++	bool
++	select GENERIC_ISA_DMA
++
++config ISA_DMA_API
++	bool
++
++config GENERIC_GPIO
++	bool
++
++config HOLES_IN_ZONE
++	bool
++
++#
++# Endianness selection.  Sufficiently obscure so many users don't know what to
++# answer,so we try hard to limit the available choices.  Also the use of a
++# choice statement should be more obvious to the user.
++#
++choice
++	prompt "Endianness selection"
++	help
++	  Some MIPS machines can be configured for either little or big endian
++	  byte order. These modes require different kernels and a different
++	  Linux distribution.  In general there is one preferred byteorder for a
++	  particular system but some systems are just as commonly used in the
++	  one or the other endianness.
++
++config CPU_BIG_ENDIAN
++	bool "Big endian"
++	depends on SYS_SUPPORTS_BIG_ENDIAN
++
++config CPU_LITTLE_ENDIAN
++	bool "Little endian"
++	depends on SYS_SUPPORTS_LITTLE_ENDIAN
++	help
++
++endchoice
++
++config EXPORT_UASM
++	bool
++
++config SYS_SUPPORTS_APM_EMULATION
++	bool
++
++config SYS_SUPPORTS_BIG_ENDIAN
++	bool
++
++config SYS_SUPPORTS_LITTLE_ENDIAN
++	bool
++
++config SYS_SUPPORTS_HUGETLBFS
++	bool
++	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
++	default y
++
++config MIPS_HUGE_TLB_SUPPORT
++	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
++
++config IRQ_CPU
++	bool
++
++config IRQ_CPU_RM7K
++	bool
++
++config IRQ_MSP_SLP
++	bool
++
++config IRQ_MSP_CIC
++	bool
++
++config IRQ_TXX9
++	bool
++
++config IRQ_GT641XX
++	bool
++
++config IRQ_GIC
++	bool
++
++config MIPS_BOARDS_GEN
++	bool
++
++config PCI_GT64XXX_PCI0
++	bool
++
++config NO_EXCEPT_FILL
++	bool
++
++config SOC_EMMA2RH
++	bool
++	select CEVT_R4K
++	select CSRC_R4K
++	select DMA_NONCOHERENT
++	select IRQ_CPU
++	select SWAP_IO_SPACE
++	select SYS_HAS_CPU_R5500
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_64BIT_KERNEL
++	select SYS_SUPPORTS_BIG_ENDIAN
++
++config SOC_PNX833X
++	bool
++	select CEVT_R4K
++	select CSRC_R4K
++	select IRQ_CPU
++	select DMA_NONCOHERENT
++	select SYS_HAS_CPU_MIPS32_R2
++	select SYS_SUPPORTS_32BIT_KERNEL
++	select SYS_SUPPORTS_LITTLE_ENDIAN
++	select SYS_SUPPORTS_BIG_ENDIAN
++	select GENERIC_GPIO
++	select CPU_MIPSR2_IRQ_VI
++
++config SOC_PNX8335
++	bool
++	select SOC_PNX833X
++
++config SWAP_IO_SPACE
++	bool
++
++config SGI_HAS_INDYDOG
++	bool
++
++config SGI_HAS_HAL2
++	bool
++
++config SGI_HAS_SEEQ
++	bool
++
++config SGI_HAS_WD93
++	bool
++
++config SGI_HAS_ZILOG
++	bool
++
++config SGI_HAS_I8042
++	bool
++
++config DEFAULT_SGI_PARTITION
++	bool
++
++config FW_ARC32
++	bool
++
++config FW_SNIPROM
++	bool
++
++config BOOT_ELF32
++	bool
++
++config MIPS_L1_CACHE_SHIFT
++	int
++	default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL
++	default "6" if MIPS_CPU_SCACHE
++	default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON
++	default "5"
++
++config HAVE_STD_PC_SERIAL_PORT
++	bool
++
++config ARC_CONSOLE
++	bool "ARC console support"
++	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
++
++config ARC_MEMORY
++	bool
++	depends on MACH_JAZZ || SNI_RM || SGI_IP32
++	default y
++
++config ARC_PROMLIB
++	bool
++	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
++	default y
++
++config FW_ARC64
++	bool
++
++config BOOT_ELF64
++	bool
++
++menu "CPU selection"
++
++choice
++	prompt "CPU type"
++	default CPU_R4X00
++
++config CPU_LOONGSON2E
++	bool "Loongson 2E"
++	depends on SYS_HAS_CPU_LOONGSON2E
++	select CPU_LOONGSON2
++	help
++	  The Loongson 2E processor implements the MIPS III instruction