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authorWaldemar Brodkorb <wbx@openadk.org>2011-10-12 21:10:47 +0200
committerWaldemar Brodkorb <wbx@openadk.org>2011-10-12 21:10:47 +0200
commit2d1f73d4334593134d3a47704a2614ffcae384ae (patch)
tree4857889a4073ac42ad0c5bd7020b236d5a06865a /toolchain/gcc
parentb2e4d29ea9c3c2f5b99264bd270d4257439dfc3f (diff)
add basic support for avr32 -> ngw100
Diffstat (limited to 'toolchain/gcc')
-rw-r--r--toolchain/gcc/Makefile7
-rw-r--r--toolchain/gcc/Makefile.inc9
-rw-r--r--toolchain/gcc/patches/4.4.6/cflags.patch269
-rw-r--r--toolchain/gcc/patches/4.4.6/gcc-avr32.patch42651
-rw-r--r--toolchain/gcc/patches/4.5.3/cflags.patch (renamed from toolchain/gcc/patches/cflags.patch)0
-rw-r--r--toolchain/gcc/patches/4.5.3/mirbsd-compat.patch (renamed from toolchain/gcc/patches/mirbsd-compat.patch)0
-rw-r--r--toolchain/gcc/patches/4.5.3/no-lib64.patch (renamed from toolchain/gcc/patches/no-lib64.patch)0
7 files changed, 42934 insertions, 2 deletions
diff --git a/toolchain/gcc/Makefile b/toolchain/gcc/Makefile
index ec13aadea..b2e8842d9 100644
--- a/toolchain/gcc/Makefile
+++ b/toolchain/gcc/Makefile
@@ -22,7 +22,6 @@ GCC_CONFOPTS= --prefix=$(STAGING_HOST_DIR) \
--disable-libgomp \
--disable-biarch \
--disable-decimal-float \
- --disable-sjlj-exceptions \
--disable-libstdcxx-pch \
--disable-ppl-version-check \
--disable-cloog-version-check \
@@ -30,6 +29,12 @@ GCC_CONFOPTS= --prefix=$(STAGING_HOST_DIR) \
--without-cloog \
--disable-nls
+ifeq ($(ADK_TOOLCHAIN_GCC_SJLJ),y)
+GCC_CONFOPTS+= --enable-sjlj-exceptions
+else
+GCC_CONFOPTS+= --disable-sjlj-exceptions
+endif
+
ifeq ($(ADK_TOOLCHAIN_GCC_SSP),y)
GCC_CONFOPTS+= --enable-libssp
else
diff --git a/toolchain/gcc/Makefile.inc b/toolchain/gcc/Makefile.inc
index 0dad1b0fb..eea56050d 100644
--- a/toolchain/gcc/Makefile.inc
+++ b/toolchain/gcc/Makefile.inc
@@ -2,8 +2,15 @@
# material, please see the LICENCE file in the top-level directory.
PKG_NAME:= gcc
+
+ifeq ($(ADK_LINUX_AVR32),y)
+PKG_VERSION:= 4.4.6
+PKG_MD5SUM:= ab525d429ee4425050a554bc9247d6c4
+else
PKG_VERSION:= 4.5.3
-PKG_RELEASE:= 1
PKG_MD5SUM:= 8e0b5c12212e185f3e4383106bfa9cc6
+endif
+
+PKG_RELEASE:= 1
PKG_SITES:= ${MASTER_SITE_GNU:=gcc/gcc-${PKG_VERSION}/}
DISTFILES:= $(PKG_NAME)-$(PKG_VERSION).tar.bz2
diff --git a/toolchain/gcc/patches/4.4.6/cflags.patch b/toolchain/gcc/patches/4.4.6/cflags.patch
new file mode 100644
index 000000000..1b17e983e
--- /dev/null
+++ b/toolchain/gcc/patches/4.4.6/cflags.patch
@@ -0,0 +1,269 @@
+
+ This patch brings over a few features from MirBSD:
+ * -fhonour-copts
+ If this option is not given, it's warned (depending
+ on environment variables). This is to catch errors
+ of misbuilt packages which override CFLAGS themselves.
+ * -Werror-maybe-reset
+ Has the effect of -Wno-error if GCC_NO_WERROR is
+ set and not '0', a no-operation otherwise. This is
+ to be able to use -Werror in "make" but prevent
+ GNU autoconf generated configure scripts from
+ freaking out.
+ * Make -fno-strict-aliasing and -fno-delete-null-pointer-checks
+ the default for -O2/-Os, because they trigger gcc bugs
+ and can delete code with security implications.
+
+ This patch was authored by Thorsten Glaser <tg at mirbsd.de>
+ with copyright assignment to the FSF in effect.
+
+--- a/gcc/c-opts.c
++++ b/gcc/c-opts.c
+@@ -105,6 +105,9 @@ static size_t deferred_count;
+ /* Number of deferred options scanned for -include. */
+ static size_t include_cursor;
+
++/* Check if a port honours COPTS. */
++static int honour_copts = 0;
++
+ static void set_Wimplicit (int);
+ static void handle_OPT_d (const char *);
+ static void set_std_cxx98 (int);
+@@ -454,6 +457,14 @@ c_common_handle_option (size_t scode, co
+ enable_warning_as_error ("implicit-function-declaration", value, CL_C | CL_ObjC);
+ break;
+
++ case OPT_Werror_maybe_reset:
++ {
++ char *ev = getenv ("GCC_NO_WERROR");
++ if ((ev != NULL) && (*ev != '0'))
++ cpp_opts->warnings_are_errors = 0;
++ }
++ break;
++
+ case OPT_Wformat:
+ set_Wformat (value);
+ break;
+@@ -690,6 +701,12 @@ c_common_handle_option (size_t scode, co
+ flag_exceptions = value;
+ break;
+
++ case OPT_fhonour_copts:
++ if (c_language == clk_c) {
++ honour_copts++;
++ }
++ break;
++
+ case OPT_fimplement_inlines:
+ flag_implement_inlines = value;
+ break;
+@@ -1209,6 +1226,47 @@ c_common_init (void)
+ return false;
+ }
+
++ if (c_language == clk_c) {
++ char *ev = getenv ("GCC_HONOUR_COPTS");
++ int evv;
++ if (ev == NULL)
++ evv = -1;
++ else if ((*ev == '0') || (*ev == '\0'))
++ evv = 0;
++ else if (*ev == '1')
++ evv = 1;
++ else if (*ev == '2')
++ evv = 2;
++ else if (*ev == 's')
++ evv = -1;
++ else {
++ warning (0, "unknown GCC_HONOUR_COPTS value, assuming 1");
++ evv = 1; /* maybe depend this on something like MIRBSD_NATIVE? */
++ }
++ if (evv == 1) {
++ if (honour_copts == 0) {
++ error ("someone does not honour COPTS at all in lenient mode");
++ return false;
++ } else if (honour_copts != 1) {
++ warning (0, "someone does not honour COPTS correctly, passed %d times",
++ honour_copts);
++ }
++ } else if (evv == 2) {
++ if (honour_copts == 0) {
++ error ("someone does not honour COPTS at all in strict mode");
++ return false;
++ } else if (honour_copts != 1) {
++ error ("someone does not honour COPTS correctly, passed %d times",
++ honour_copts);
++ return false;
++ }
++ } else if (evv == 0) {
++ if (honour_copts != 1)
++ inform (0, "someone does not honour COPTS correctly, passed %d times",
++ honour_copts);
++ }
++ }
++
+ return true;
+ }
+
+--- a/gcc/c.opt
++++ b/gcc/c.opt
+@@ -215,6 +215,10 @@ Werror-implicit-function-declaration
+ C ObjC RejectNegative Warning
+ This switch is deprecated; use -Werror=implicit-function-declaration instead
+
++Werror-maybe-reset
++C ObjC C++ ObjC++
++; Documented in common.opt
++
+ Wfloat-equal
+ C ObjC C++ ObjC++ Var(warn_float_equal) Warning
+ Warn if testing floating point numbers for equality
+@@ -613,6 +617,9 @@ C++ ObjC++ Optimization
+ fhonor-std
+ C++ ObjC++
+
++fhonour-copts
++C ObjC C++ ObjC++ RejectNegative
++
+ fhosted
+ C ObjC
+ Assume normal C execution environment
+--- a/gcc/common.opt
++++ b/gcc/common.opt
+@@ -102,6 +102,10 @@ Werror=
+ Common Joined
+ Treat specified warning as error
+
++Werror-maybe-reset
++Common
++If environment variable GCC_NO_WERROR is set, act as -Wno-error
++
+ Wextra
+ Common Warning
+ Print extra (possibly unwanted) warnings
+@@ -573,6 +577,9 @@ fguess-branch-probability
+ Common Report Var(flag_guess_branch_prob) Optimization
+ Enable guessing of branch probabilities
+
++fhonour-copts
++Common RejectNegative
++
+ ; Nonzero means ignore `#ident' directives. 0 means handle them.
+ ; Generate position-independent code for executables if possible
+ ; On SVR4 targets, it also controls whether or not to emit a
+--- a/gcc/opts.c
++++ b/gcc/opts.c
+@@ -898,9 +898,6 @@ decode_options (unsigned int argc, const
+ flag_schedule_insns_after_reload = opt2;
+ #endif
+ flag_regmove = opt2;
+- flag_strict_aliasing = opt2;
+- flag_strict_overflow = opt2;
+- flag_delete_null_pointer_checks = opt2;
+ flag_reorder_blocks = opt2;
+ flag_reorder_functions = opt2;
+ flag_tree_vrp = opt2;
+@@ -924,6 +921,9 @@ decode_options (unsigned int argc, const
+
+ /* -O3 optimizations. */
+ opt3 = (optimize >= 3);
++ flag_strict_aliasing = opt3;
++ flag_strict_overflow = opt3;
++ flag_delete_null_pointer_checks = opt3;
+ flag_predictive_commoning = opt3;
+ flag_inline_functions = opt3;
+ flag_unswitch_loops = opt3;
+@@ -1603,6 +1603,17 @@ common_handle_option (size_t scode, cons
+ enable_warning_as_error (arg, value, lang_mask);
+ break;
+
++ case OPT_Werror_maybe_reset:
++ {
++ char *ev = getenv ("GCC_NO_WERROR");
++ if ((ev != NULL) && (*ev != '0'))
++ warnings_are_errors = 0;
++ }
++ break;
++
++ case OPT_fhonour_copts:
++ break;
++
+ case OPT_Wextra:
+ set_Wextra (value);
+ break;
+--- a/gcc/doc/cppopts.texi
++++ b/gcc/doc/cppopts.texi
+@@ -164,6 +164,11 @@ in older programs. This warning is on b
+ Make all warnings into hard errors. Source code which triggers warnings
+ will be rejected.
+
++ at item -Werror-maybe-reset
++ at opindex Werror-maybe-reset
++Act like @samp{-Wno-error} if the @env{GCC_NO_WERROR} environment
++variable is set to anything other than 0 or empty.
++
+ @item -Wsystem-headers
+ @opindex Wsystem-headers
+ Issue warnings for code in system headers. These are normally unhelpful
+--- a/gcc/doc/invoke.texi
++++ b/gcc/doc/invoke.texi
+@@ -234,7 +234,7 @@ Objective-C and Objective-C++ Dialects}.
+ -Wconversion -Wcoverage-mismatch -Wno-deprecated @gol
+ -Wno-deprecated-declarations -Wdisabled-optimization @gol
+ -Wno-div-by-zero -Wempty-body -Wenum-compare -Wno-endif-labels @gol
+--Werror -Werror=* @gol
++-Werror -Werror=* -Werror-maybe-reset @gol
+ -Wfatal-errors -Wfloat-equal -Wformat -Wformat=2 @gol
+ -Wno-format-contains-nul -Wno-format-extra-args -Wformat-nonliteral @gol
+ -Wformat-security -Wformat-y2k @gol
+@@ -4182,6 +4182,22 @@ This option is only supported for C and
+ @option{-Wall} and by @option{-pedantic}, which can be disabled with
+ @option{-Wno-pointer-sign}.
+
++ at item -Werror-maybe-reset
++ at opindex Werror-maybe-reset
++Act like @samp{-Wno-error} if the @env{GCC_NO_WERROR} environment
++variable is set to anything other than 0 or empty.
++
++ at item -fhonour-copts
++ at opindex fhonour-copts
++If @env{GCC_HONOUR_COPTS} is set to 1, abort if this option is not
++given at least once, and warn if it is given more than once.
++If @env{GCC_HONOUR_COPTS} is set to 2, abort if this option is not
++given exactly once.
++If @env{GCC_HONOUR_COPTS} is set to 0 or unset, warn if this option
++is not given exactly once.
++The warning is quelled if @env{GCC_HONOUR_COPTS} is set to @samp{s}.
++This flag and environment variable only affect the C language.
++
+ @item -Wstack-protector
+ @opindex Wstack-protector
+ @opindex Wno-stack-protector
+@@ -5721,7 +5737,7 @@ so, the first branch is redirected to ei
+ second branch or a point immediately following it, depending on whether
+ the condition is known to be true or false.
+
+-Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
++Enabled at levels @option{-O3}.
+
+ @item -fsplit-wide-types
+ @opindex fsplit-wide-types
+@@ -5866,7 +5882,7 @@ safely dereference null pointers. Use
+ @option{-fno-delete-null-pointer-checks} to disable this optimization
+ for programs which depend on that behavior.
+
+-Enabled at levels @option{-O2}, @option{-O3}, @option{-Os}.
++Enabled at levels @option{-O3}.
+
+ @item -fexpensive-optimizations
+ @opindex fexpensive-optimizations
+--- a/gcc/java/jvspec.c
++++ b/gcc/java/jvspec.c
+@@ -670,6 +670,7 @@ lang_specific_pre_link (void)
+ class name. Append dummy `.c' that can be stripped by set_input so %b
+ is correct. */
+ set_input (concat (main_class_name, "main.c", NULL));
++ putenv ("GCC_HONOUR_COPTS=s"); /* XXX hack! */
+ err = do_spec (jvgenmain_spec);
+ if (err == 0)
+ {
diff --git a/toolchain/gcc/patches/4.4.6/gcc-avr32.patch b/toolchain/gcc/patches/4.4.6/gcc-avr32.patch
new file mode 100644
index 000000000..0b092c07c
--- /dev/null
+++ b/toolchain/gcc/patches/4.4.6/gcc-avr32.patch
@@ -0,0 +1,42651 @@
+diff -Nur gcc-4.4.6.orig/gcc/builtins.c gcc-4.4.6/gcc/builtins.c
+--- gcc-4.4.6.orig/gcc/builtins.c 2010-12-07 19:56:56.000000000 +0100
++++ gcc-4.4.6/gcc/builtins.c 2011-08-27 19:45:42.559232404 +0200
+@@ -11108,7 +11108,7 @@
+
+ do
+ {
+- code = va_arg (ap, enum tree_code);
++ code = va_arg (ap, int);
+ switch (code)
+ {
+ case 0:
+diff -Nur gcc-4.4.6.orig/gcc/calls.c gcc-4.4.6/gcc/calls.c
+--- gcc-4.4.6.orig/gcc/calls.c 2010-09-24 17:07:36.000000000 +0200
++++ gcc-4.4.6/gcc/calls.c 2011-08-27 19:45:42.589240794 +0200
+@@ -3447,7 +3447,7 @@
+ for (; count < nargs; count++)
+ {
+ rtx val = va_arg (p, rtx);
+- enum machine_mode mode = va_arg (p, enum machine_mode);
++ enum machine_mode mode = va_arg (p, int);
+
+ /* We cannot convert the arg value to the mode the library wants here;
+ must do it earlier where we know the signedness of the arg. */
+diff -Nur gcc-4.4.6.orig/gcc/config/avr32/avr32.c gcc-4.4.6/gcc/config/avr32/avr32.c
+--- gcc-4.4.6.orig/gcc/config/avr32/avr32.c 1970-01-01 01:00:00.000000000 +0100
++++ gcc-4.4.6/gcc/config/avr32/avr32.c 2011-08-27 19:45:59.051740454 +0200
+@@ -0,0 +1,8087 @@
++/*
++ Target hooks and helper functions for AVR32.
++ Copyright 2003,2004,2005,2006,2007,2008,2009,2010 Atmel Corporation.
++
++ This file is part of GCC.
++
++ This program is free software; you can redistribute it and/or modify
++ it under the terms of the GNU General Public License as published by
++ the Free Software Foundation; either version 2 of the License, or
++ (at your option) any later version.
++
++ This program is distributed in the hope that it will be useful,
++ but WITHOUT ANY WARRANTY; without even the implied warranty of
++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ GNU General Public License for more details.
++
++ You should have received a copy of the GNU General Public License
++ along with this program; if not, write to the Free Software
++ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
++
++#include "config.h"
++#include "system.h"
++#include "coretypes.h"
++#include "tm.h"
++#include "rtl.h"
++#include "tree.h"
++#include "obstack.h"
++#include "regs.h"
++#include "hard-reg-set.h"
++#include "real.h"
++#include "insn-config.h"
++#include "conditions.h"
++#include "output.h"
++#include "insn-attr.h"
++#include "flags.h"
++#include "reload.h"
++#include "function.h"
++#include "expr.h"
++#include "optabs.h"
++#include "toplev.h"
++#include "recog.h"
++#include "ggc.h"
++#include "except.h"
++#include "c-pragma.h"
++#include "integrate.h"
++#include "tm_p.h"
++#include "langhooks.h"
++#include "hooks.h"
++#include "df.h"
++
++#include "target.h"
++#include "target-def.h"
++
++#include <ctype.h>
++
++
++
++/* Global variables. */
++typedef struct minipool_node Mnode;
++typedef struct minipool_fixup Mfix;
++
++/* Obstack for minipool constant handling. */
++static struct obstack minipool_obstack;
++static char *minipool_startobj;
++static rtx minipool_vector_label;
++
++/* True if we are currently building a constant table. */
++int making_const_table;
++
++tree fndecl_attribute_args = NULL_TREE;
++
++
++/* Function prototypes. */
++static unsigned long avr32_isr_value (tree);
++static unsigned long avr32_compute_func_type (void);
++static tree avr32_handle_isr_attribute (tree *, tree, tree, int, bool *);
++static tree avr32_handle_acall_attribute (tree *, tree, tree, int, bool *);
++static tree avr32_handle_fndecl_attribute (tree * node, tree name, tree args,
++ int flags, bool * no_add_attrs);
++static void avr32_reorg (void);
++bool avr32_return_in_msb (tree type);
++bool avr32_vector_mode_supported (enum machine_mode mode);
++static void avr32_init_libfuncs (void);
++static void avr32_file_end (void);
++static void flashvault_decl_list_add (unsigned int vector_num, const char *name);
++
++
++
++static void
++avr32_add_gc_roots (void)
++{
++ gcc_obstack_init (&minipool_obstack);
++ minipool_startobj = (char *) obstack_alloc (&minipool_obstack, 0);
++}
++
++
++/* List of all known AVR32 parts */
++static const struct part_type_s avr32_part_types[] = {
++ /* name, part_type, architecture type, macro */
++ {"none", PART_TYPE_AVR32_NONE, ARCH_TYPE_AVR32_AP, "__AVR32__"},
++ {"ap7000", PART_TYPE_AVR32_AP7000, ARCH_TYPE_AVR32_AP, "__AVR32_AP7000__"},
++ {"ap7001", PART_TYPE_AVR32_AP7001, ARCH_TYPE_AVR32_AP, "__AVR32_AP7001__"},
++ {"ap7002", PART_TYPE_AVR32_AP7002, ARCH_TYPE_AVR32_AP, "__AVR32_AP7002__"},
++ {"ap7200", PART_TYPE_AVR32_AP7200, ARCH_TYPE_AVR32_AP, "__AVR32_AP7200__"},
++ {"uc3a0128", PART_TYPE_AVR32_UC3A0128, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A0128__"},
++ {"uc3a0256", PART_TYPE_AVR32_UC3A0256, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A0256__"},
++ {"uc3a0512", PART_TYPE_AVR32_UC3A0512, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A0512__"},
++ {"uc3a0512es", PART_TYPE_AVR32_UC3A0512ES, ARCH_TYPE_AVR32_UCR1, "__AVR32_UC3A0512ES__"},
++ {"uc3a1128", PART_TYPE_AVR32_UC3A1128, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A1128__"},
++ {"uc3a1256", PART_TYPE_AVR32_UC3A1256, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A1256__"},
++ {"uc3a1512", PART_TYPE_AVR32_UC3A1512, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A1512__"},
++ {"uc3a1512es", PART_TYPE_AVR32_UC3A1512ES, ARCH_TYPE_AVR32_UCR1, "__AVR32_UC3A1512ES__"},
++ {"uc3a3revd", PART_TYPE_AVR32_UC3A3REVD, ARCH_TYPE_AVR32_UCR2NOMUL, "__AVR32_UC3A3256S__"},
++ {"uc3a364", PART_TYPE_AVR32_UC3A364, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A364__"},
++ {"uc3a364s", PART_TYPE_AVR32_UC3A364S, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A364S__"},
++ {"uc3a3128", PART_TYPE_AVR32_UC3A3128, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A3128__"},
++ {"uc3a3128s", PART_TYPE_AVR32_UC3A3128S, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A3128S__"},
++ {"uc3a3256", PART_TYPE_AVR32_UC3A3256, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A3256__"},
++ {"uc3a3256s", PART_TYPE_AVR32_UC3A3256S, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A3256S__"},
++ {"uc3a464", PART_TYPE_AVR32_UC3A464, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A464__"},
++ {"uc3a464s", PART_TYPE_AVR32_UC3A464S, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A464S__"},
++ {"uc3a4128", PART_TYPE_AVR32_UC3A4128, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A4128__"},
++ {"uc3a4128s", PART_TYPE_AVR32_UC3A4128S, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A4128S__"},
++ {"uc3a4256", PART_TYPE_AVR32_UC3A4256, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A4256__"},
++ {"uc3a4256s", PART_TYPE_AVR32_UC3A4256S, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3A4256S__"},
++ {"uc3b064", PART_TYPE_AVR32_UC3B064, ARCH_TYPE_AVR32_UCR1, "__AVR32_UC3B064__"},
++ {"uc3b0128", PART_TYPE_AVR32_UC3B0128, ARCH_TYPE_AVR32_UCR1, "__AVR32_UC3B0128__"},
++ {"uc3b0256", PART_TYPE_AVR32_UC3B0256, ARCH_TYPE_AVR32_UCR1, "__AVR32_UC3B0256__"},
++ {"uc3b0256es", PART_TYPE_AVR32_UC3B0256ES, ARCH_TYPE_AVR32_UCR1, "__AVR32_UC3B0256ES__"},
++ {"uc3b0512", PART_TYPE_AVR32_UC3B0512, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3B0512__"},
++ {"uc3b0512revc", PART_TYPE_AVR32_UC3B0512REVC, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3B0512REVC__"},
++ {"uc3b164", PART_TYPE_AVR32_UC3B164, ARCH_TYPE_AVR32_UCR1, "__AVR32_UC3B164__"},
++ {"uc3b1128", PART_TYPE_AVR32_UC3B1128, ARCH_TYPE_AVR32_UCR1, "__AVR32_UC3B1128__"},
++ {"uc3b1256", PART_TYPE_AVR32_UC3B1256, ARCH_TYPE_AVR32_UCR1, "__AVR32_UC3B1256__"},
++ {"uc3b1256es", PART_TYPE_AVR32_UC3B1256ES, ARCH_TYPE_AVR32_UCR1, "__AVR32_UC3B1256ES__"},
++ {"uc3b1512", PART_TYPE_AVR32_UC3B1512, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3B1512__"},
++ {"uc3b1512revc", PART_TYPE_AVR32_UC3B1512REVC, ARCH_TYPE_AVR32_UCR2, "__AVR32_UC3B1512REVC__"},
++ {"uc64d3", PART_TYPE_AVR32_UC64D3, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC64D3__"},
++ {"uc128d3", PART_TYPE_AVR32_UC128D3, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC128D3__"},
++ {"uc64d4", PART_TYPE_AVR32_UC64D4, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC64D4__"},
++ {"uc128d4", PART_TYPE_AVR32_UC128D4, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC128D4__"},
++ {"uc3c0512crevc", PART_TYPE_AVR32_UC3C0512CREVC, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC3C0512CREVC__"},
++ {"uc3c1512crevc", PART_TYPE_AVR32_UC3C1512CREVC, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC3C1512CREVC__"},
++ {"uc3c2512crevc", PART_TYPE_AVR32_UC3C2512CREVC, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC3C2512CREVC__"},
++ {"uc3l0256", PART_TYPE_AVR32_UC3L0256, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC3L0256__"},
++ {"uc3l0128", PART_TYPE_AVR32_UC3L0128, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC3L0128__"},
++ {"uc3l064", PART_TYPE_AVR32_UC3L064, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC3L064__"},
++ {"uc3l032", PART_TYPE_AVR32_UC3L032, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC3L032__"},
++ {"uc3l016", PART_TYPE_AVR32_UC3L016, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC3L016__"},
++ {"uc3l064revb", PART_TYPE_AVR32_UC3L064REVB, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC3L064REVB__"},
++ {"uc64l3u", PART_TYPE_AVR32_UC64L3U, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC64L3U__"},
++ {"uc128l3u", PART_TYPE_AVR32_UC128L3U, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC128L3U__"},
++ {"uc256l3u", PART_TYPE_AVR32_UC256L3U, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC256L3U__"},
++ {"uc64l4u", PART_TYPE_AVR32_UC64L4U, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC64L4U__"},
++ {"uc128l4u", PART_TYPE_AVR32_UC128L4U, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC128L4U__"},
++ {"uc256l4u", PART_TYPE_AVR32_UC256L4U, ARCH_TYPE_AVR32_UCR3, "__AVR32_UC256L4U__"},
++ {"uc3c064c", PART_TYPE_AVR32_UC3C064C, ARCH_TYPE_AVR32_UCR3FP, "__AVR32_UC3C064C__"},
++ {"uc3c0128c", PART_TYPE_AVR32_UC3C0128C, ARCH_TYPE_AVR32_UCR3FP, "__AVR32_UC3C0128C__"},
++ {"uc3c0256c", PART_TYPE_AVR32_UC3C0256C, ARCH_TYPE_AVR32_UCR3FP, "__AVR32_UC3C0256C__"},
++ {"uc3c0512c", PART_TYPE_AVR32_UC3C0512C, ARCH_TYPE_AVR32_UCR3FP, "__AVR32_UC3C0512C__"},
++ {"uc3c164c", PART_TYPE_AVR32_UC3C164C, ARCH_TYPE_AVR32_UCR3FP, "__AVR32_UC3C164C__"},
++ {"uc3c1128c", PART_TYPE_AVR32_UC3C1128C, ARCH_TYPE_AVR32_UCR3FP, "__AVR32_UC3C1128C__"},
++ {"uc3c1256c", PART_TYPE_AVR32_UC3C1256C, ARCH_TYPE_AVR32_UCR3FP, "__AVR32_UC3C1256C__"},
++ {"uc3c1512c", PART_TYPE_AVR32_UC3C1512C, ARCH_TYPE_AVR32_UCR3FP, "__AVR32_UC3C1512C__"},
++ {"uc3c264c", PART_TYPE_AVR32_UC3C264C, ARCH_TYPE_AVR32_UCR3FP, "__AVR32_UC3C264C__"},
++ {"uc3c2128c", PART_TYPE_AVR32_UC3C2128C, ARCH_TYPE_AVR32_UCR3FP, "__AVR32_UC3C2128C__"},
++ {"uc3c2256c", PART_TYPE_AVR32_UC3C2256C, ARCH_TYPE_AVR32_UCR3FP, "__AVR32_UC3C2256C__"},
++ {"uc3c2512c", PART_TYPE_AVR32_UC3C2512C, ARCH_TYPE_AVR32_UCR3FP, "__AVR32_UC3C2512C__"},
++ {"mxt768e", PART_TYPE_AVR32_MXT768E, ARCH_TYPE_AVR32_UCR3, "__AVR32_MXT768E__"},
++ {NULL, 0, 0, NULL}
++};
++
++/* List of all known AVR32 architectures */
++static const struct arch_type_s avr32_arch_types[] = {
++ /* name, architecture type, microarchitecture type, feature flags, macro */
++ {"ap", ARCH_TYPE_AVR32_AP, UARCH_TYPE_AVR32B,
++ (FLAG_AVR32_HAS_DSP
++ | FLAG_AVR32_HAS_SIMD
++ | FLAG_AVR32_HAS_UNALIGNED_WORD
++ | FLAG_AVR32_HAS_BRANCH_PRED | FLAG_AVR32_HAS_RETURN_STACK
++ | FLAG_AVR32_HAS_CACHES),
++ "__AVR32_AP__"},
++ {"ucr1", ARCH_TYPE_AVR32_UCR1, UARCH_TYPE_AVR32A,
++ (FLAG_AVR32_HAS_DSP | FLAG_AVR32_HAS_RMW),
++ "__AVR32_UC__=1"},
++ {"ucr2", ARCH_TYPE_AVR32_UCR2, UARCH_TYPE_AVR32A,
++ (FLAG_AVR32_HAS_DSP | FLAG_AVR32_HAS_RMW
++ | FLAG_AVR32_HAS_V2_INSNS),
++ "__AVR32_UC__=2"},
++ {"ucr2nomul", ARCH_TYPE_AVR32_UCR2NOMUL, UARCH_TYPE_AVR32A,
++ (FLAG_AVR32_HAS_DSP | FLAG_AVR32_HAS_RMW
++ | FLAG_AVR32_HAS_V2_INSNS | FLAG_AVR32_HAS_NO_MUL_INSNS),
++ "__AVR32_UC__=2"},
++ {"ucr3", ARCH_TYPE_AVR32_UCR3, UARCH_TYPE_AVR32A,
++ (FLAG_AVR32_HAS_DSP | FLAG_AVR32_HAS_RMW
++ | FLAG_AVR32_HAS_V2_INSNS),
++ "__AVR32_UC__=3"},
++ {"ucr3fp", ARCH_TYPE_AVR32_UCR3FP, UARCH_TYPE_AVR32A,
++ (FLAG_AVR32_HAS_DSP | FLAG_AVR32_HAS_RMW | FLAG_AVR32_HAS_FPU
++ | FLAG_AVR32_HAS_V2_INSNS),
++ "__AVR32_UC__=3"},
++ {NULL, 0, 0, 0, NULL}
++};
++
++/* Default arch name */
++const char *avr32_arch_name = "none";
++const char *avr32_part_name = "none";
++
++const struct part_type_s *avr32_part;
++const struct arch_type_s *avr32_arch;
++
++
++/* FIXME: needs to use GC. */
++struct flashvault_decl_list
++{
++ struct flashvault_decl_list *next;
++ unsigned int vector_num;
++ const char *name;
++};
++
++static struct flashvault_decl_list *flashvault_decl_list_head = NULL;
++
++
++/* Set default target_flags. */
++#undef TARGET_DEFAULT_TARGET_FLAGS
++#define TARGET_DEFAULT_TARGET_FLAGS \
++ (MASK_HAS_ASM_ADDR_PSEUDOS | MASK_MD_REORG_OPTIMIZATION | MASK_COND_EXEC_BEFORE_RELOAD)
++
++void
++avr32_optimization_options (int level, int size)
++{
++ if (AVR32_ALWAYS_PIC)
++ flag_pic = 1;
++
++ /* Enable section anchors if optimization is enabled. */
++ if (level > 0 || size)
++ flag_section_anchors = 2;
++}
++
++
++/* Override command line options */
++void
++avr32_override_options (void)
++{
++ const struct part_type_s *part;
++ const struct arch_type_s *arch, *part_arch;
++
++ /*Add backward compability*/
++ if (strcmp ("uc", avr32_arch_name)== 0)
++ {
++ fprintf (stderr, "Warning: Deprecated arch `%s' specified. "
++ "Please use '-march=ucr1' instead. "
++ "Using arch 'ucr1'\n",
++ avr32_arch_name);
++ avr32_arch_name="ucr1";
++ }
++
++ /* Check if arch type is set. */
++ for (arch = avr32_arch_types; arch->name; arch++)
++ {
++ if (strcmp (arch->name, avr32_arch_name) == 0)
++ break;
++ }
++ avr32_arch = arch;
++
++ if (!arch->name && strcmp("none", avr32_arch_name) != 0)
++ {
++ fprintf (stderr, "Unknown arch `%s' specified\n"
++ "Known arch names:\n"
++ "\tuc (deprecated)\n",
++ avr32_arch_name);
++ for (arch = avr32_arch_types; arch->name; arch++)
++ fprintf (stderr, "\t%s\n", arch->name);
++ avr32_arch = &avr32_arch_types[ARCH_TYPE_AVR32_AP];
++ }
++
++ /* Check if part type is set. */
++ for (part = avr32_part_types; part->name; part++)
++ if (strcmp (part->name, avr32_part_name) == 0)
++ break;
++
++ avr32_part = part;
++ if (!part->name)
++ {
++ fprintf (stderr, "Unknown part `%s' specified\nKnown part names:\n",
++ avr32_part_name);
++ for (part = avr32_part_types; part->name; part++)
++ {
++ if (strcmp("none", part->name) != 0)
++ fprintf (stderr, "\t%s\n", part->name);
++ }
++ /* Set default to NONE*/
++ avr32_part = &avr32_part_types[PART_TYPE_AVR32_NONE];
++ }
++
++ /* NB! option -march= overrides option -mpart
++ * if both are used at the same time */
++ if (!arch->name)
++ avr32_arch = &avr32_arch_types[avr32_part->arch_type];
++
++ /* When architecture implied by -mpart and one passed in -march are
++ * conflicting, issue an error message */
++ part_arch = &avr32_arch_types[avr32_part->arch_type];
++ if (strcmp("none",avr32_part_name) && strcmp("none", avr32_arch_name) && strcmp(avr32_arch_name,part_arch->name))
++ error ("Conflicting architectures implied by -mpart and -march\n");
++
++ /* If optimization level is two or greater, then align start of loops to a
++ word boundary since this will allow folding the first insn of the loop.
++ Do this only for targets supporting branch prediction. */
++ if (optimize >= 2 && TARGET_BRANCH_PRED)
++ align_loops = 2;
++
++
++ /* Enable fast-float library if unsafe math optimizations
++ are used. */
++ if (flag_unsafe_math_optimizations)
++ target_flags |= MASK_FAST_FLOAT;
++
++ /* Check if we should set avr32_imm_in_const_pool
++ based on if caches are present or not. */
++ if ( avr32_imm_in_const_pool == -1 )
++ {
++ if ( TARGET_CACHES )
++ avr32_imm_in_const_pool = 1;
++ else
++ avr32_imm_in_const_pool = 0;
++ }
++
++ if (TARGET_NO_PIC)
++ flag_pic = 0;
++ avr32_add_gc_roots ();
++}
++
++
++/*
++If defined, a function that outputs the assembler code for entry to a
++function. The prologue is responsible for setting up the stack frame,
++initializing the frame pointer register, saving registers that must be
++saved, and allocating size additional bytes of storage for the
++local variables. size is an integer. file is a stdio
++stream to which the assembler code should be output.
++
++The label for the beginning of the function need not be output by this
++macro. That has already been done when the macro is run.
++
++To determine which registers to save, the macro can refer to the array
++regs_ever_live: element r is nonzero if hard register
++r is used anywhere within the function. This implies the function
++prologue should save register r, provided it is not one of the
++call-used registers. (TARGET_ASM_FUNCTION_EPILOGUE must likewise use
++regs_ever_live.)
++
++On machines that have ``register windows'', the function entry code does
++not save on the stack the registers that are in the windows, even if
++they are supposed to be preserved by function calls; instead it takes
++appropriate steps to ``push'' the register stack, if any non-call-used
++registers are used in the function.
++
++On machines where functions may or may not have frame-pointers, the
++function entry code must vary accordingly; it must set up the frame
++pointer if one is wanted, and not otherwise. To determine whether a
++frame pointer is in wanted, the macro can refer to the variable
++frame_pointer_needed. The variable's value will be 1 at run
++time in a function that needs a frame pointer. (see Elimination).
++
++The function entry code is responsible for allocating any stack space
++required for the function. This stack space consists of the regions
++listed below. In most cases, these regions are allocated in the
++order listed, with the last listed region closest to the top of the
++stack (the lowest address if STACK_GROWS_DOWNWARD is defined, and
++the highest address if it is not defined). You can use a different order
++for a machine if doing so is more convenient or required for
++compatibility reasons. Except in cases where required by standard
++or by a debugger, there is no reason why the stack layout used by GCC
++need agree with that used by other compilers for a machine.
++*/
++
++#undef TARGET_ASM_FUNCTION_PROLOGUE
++#define TARGET_ASM_FUNCTION_PROLOGUE avr32_target_asm_function_prologue
++
++#undef TARGET_ASM_FILE_END
++#define TARGET_ASM_FILE_END avr32_file_end
++
++#undef TARGET_DEFAULT_SHORT_ENUMS
++#define TARGET_DEFAULT_SHORT_ENUMS hook_bool_void_false
++
++#undef TARGET_PROMOTE_FUNCTION_ARGS
++#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true
++
++#undef TARGET_PROMOTE_FUNCTION_RETURN
++#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true
++
++#undef TARGET_PROMOTE_PROTOTYPES
++#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true
++
++#undef TARGET_MUST_PASS_IN_STACK
++#define TARGET_MUST_PASS_IN_STACK avr32_must_pass_in_stack
++
++#undef TARGET_PASS_BY_REFERENCE
++#define TARGET_PASS_BY_REFERENCE avr32_pass_by_reference
++
++#undef TARGET_STRICT_ARGUMENT_NAMING
++#define TARGET_STRICT_ARGUMENT_NAMING avr32_strict_argument_naming
++
++#undef TARGET_VECTOR_MODE_SUPPORTED_P
++#define TARGET_VECTOR_MODE_SUPPORTED_P avr32_vector_mode_supported
++
++#undef TARGET_RETURN_IN_MEMORY
++#define TARGET_RETURN_IN_MEMORY avr32_return_in_memory
++
++#undef TARGET_RETURN_IN_MSB
++#define TARGET_RETURN_IN_MSB avr32_return_in_msb
++
++#undef TARGET_ENCODE_SECTION_INFO
++#define TARGET_ENCODE_SECTION_INFO avr32_encode_section_info
++
++#undef TARGET_ARG_PARTIAL_BYTES
++#define TARGET_ARG_PARTIAL_BYTES avr32_arg_partial_bytes
++
++#undef TARGET_STRIP_NAME_ENCODING
++#define TARGET_STRIP_NAME_ENCODING avr32_strip_name_encoding
++
++#define streq(string1, string2) (strcmp (string1, string2) == 0)
++
++#undef TARGET_NARROW_VOLATILE_BITFIELD
++#define TARGET_NARROW_VOLATILE_BITFIELD hook_bool_void_false
++
++#undef TARGET_ATTRIBUTE_TABLE
++#define TARGET_ATTRIBUTE_TABLE avr32_attribute_table
++
++#undef TARGET_COMP_TYPE_ATTRIBUTES
++#define TARGET_COMP_TYPE_ATTRIBUTES avr32_comp_type_attributes
++
++
++#undef TARGET_RTX_COSTS
++#define TARGET_RTX_COSTS avr32_rtx_costs
++
++#undef TARGET_CANNOT_FORCE_CONST_MEM
++#define TARGET_CANNOT_FORCE_CONST_MEM avr32_cannot_force_const_mem
++
++#undef TARGET_ASM_INTEGER
++#define TARGET_ASM_INTEGER avr32_assemble_integer
++
++#undef TARGET_FUNCTION_VALUE
++#define TARGET_FUNCTION_VALUE avr32_function_value
++
++#undef TARGET_MIN_ANCHOR_OFFSET
++#define TARGET_MIN_ANCHOR_OFFSET (0)
++
++#undef TARGET_MAX_ANCHOR_OFFSET
++#define TARGET_MAX_ANCHOR_OFFSET ((1 << 15) - 1)
++#undef TARGET_SECONDARY_RELOAD
++#define TARGET_SECONDARY_RELOAD avr32_secondary_reload
++
++
++/*
++ * Defining the option, -mlist-devices to list the devices supported by gcc.
++ * This option should be used while printing target-help to list all the
++ * supported devices.
++ */
++#undef TARGET_HELP
++#define TARGET_HELP avr32_target_help
++
++void avr32_target_help ()
++{
++ if (avr32_list_supported_parts)
++ {
++ const struct part_type_s *list;
++ fprintf (stdout, "List of parts supported by avr32-gcc:\n");
++ for (list = avr32_part_types; list->name; list++)
++ {
++ if (strcmp("none", list->name) != 0)
++ fprintf (stdout, "%-20s%s\n", list->name, list->macro);
++ }
++ fprintf (stdout, "\n\n");
++ }
++}
++
++enum reg_class
++avr32_secondary_reload (bool in_p, rtx x, enum reg_class class,
++ enum machine_mode mode, secondary_reload_info *sri)
++{
++
++ if ( avr32_rmw_memory_operand (x, mode) )
++ {
++ if (!in_p)
++ sri->icode = CODE_FOR_reload_out_rmw_memory_operand;
++ else
++ sri->icode = CODE_FOR_reload_in_rmw_memory_operand;
++ }
++ return NO_REGS;
++
++}
++/*
++ * Switches to the appropriate section for output of constant pool
++ * entry x in mode. You can assume that x is some kind of constant in
++ * RTL. The argument mode is redundant except in the case of a
++ * const_int rtx. Select the section by calling readonly_data_ section
++ * or one of the alternatives for other sections. align is the
++ * constant alignment in bits.
++ *
++ * The default version of this function takes care of putting symbolic
++ * constants in flag_ pic mode in data_section and everything else in
++ * readonly_data_section.
++ */
++//#undef TARGET_ASM_SELECT_RTX_SECTION
++//#define TARGET_ASM_SELECT_RTX_SECTION avr32_select_rtx_section
++
++
++/*
++ * If non-null, this hook performs a target-specific pass over the
++ * instruction stream. The compiler will run it at all optimization
++ * levels, just before the point at which it normally does
++ * delayed-branch scheduling.
++ *
++ * The exact purpose of the hook varies from target to target. Some
++ * use it to do transformations that are necessary for correctness,
++ * such as laying out in-function constant pools or avoiding hardware
++ * hazards. Others use it as an opportunity to do some
++ * machine-dependent optimizations.
++ *
++ * You need not implement the hook if it has nothing to do. The
++ * default definition is null.
++ */
++#undef TARGET_MACHINE_DEPENDENT_REORG
++#define TARGET_MACHINE_DEPENDENT_REORG avr32_reorg
++
++/* Target hook for assembling integer objects.
++ Need to handle integer vectors */
++static bool
++avr32_assemble_integer (rtx x, unsigned int size, int aligned_p)
++{
++ if (avr32_vector_mode_supported (GET_MODE (x)))
++ {
++ int i, units;
++
++ if (GET_CODE (x) != CONST_VECTOR)
++ abort ();
++
++ units = CONST_VECTOR_NUNITS (x);
++
++ switch (GET_MODE (x))
++ {
++ case V2HImode:
++ size = 2;
++ break;
++ case V4QImode:
++ size = 1;
++ break;
++ default:
++ abort ();
++ }
++
++ for (i = 0; i < units; i++)
++ {
++ rtx elt;
++
++ elt = CONST_VECT