summaryrefslogtreecommitdiff
path: root/target/arm/solidrun-imx6/patches
diff options
context:
space:
mode:
authorWaldemar Brodkorb <wbx@openadk.org>2015-10-17 10:59:47 +0200
committerWaldemar Brodkorb <wbx@openadk.org>2015-10-17 11:00:09 +0200
commitadcaa98f792cd1e0866b7c7b127ed0c40c3b19e3 (patch)
tree621aa8e87d80a6e5a49ba874230f225ab341d611 /target/arm/solidrun-imx6/patches
parent374cdd0ee0883b7c85045ef83ddf0f95ffcd3598 (diff)
fix compile error for solidrun-imx6, when RT is enabled
Diffstat (limited to 'target/arm/solidrun-imx6/patches')
-rw-r--r--target/arm/solidrun-imx6/patches/3.14.54/0000-solidrun.patch44092
-rw-r--r--target/arm/solidrun-imx6/patches/3.18.22/solidrun-imx6-wlan.patch3252
-rw-r--r--target/arm/solidrun-imx6/patches/4.1.10/0002-rt.patch75
3 files changed, 22121 insertions, 25298 deletions
diff --git a/target/arm/solidrun-imx6/patches/3.14.54/0000-solidrun.patch b/target/arm/solidrun-imx6/patches/3.14.54/0000-solidrun.patch
index e369250c4..0534c7115 100644
--- a/target/arm/solidrun-imx6/patches/3.14.54/0000-solidrun.patch
+++ b/target/arm/solidrun-imx6/patches/3.14.54/0000-solidrun.patch
@@ -1,1402 +1,6 @@
-diff -Nur linux-3.14.54.orig/Documentation/ABI/testing/sysfs-class-net-statistics linux-3.14.54/Documentation/ABI/testing/sysfs-class-net-statistics
---- linux-3.14.54.orig/Documentation/ABI/testing/sysfs-class-net-statistics 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/Documentation/ABI/testing/sysfs-class-net-statistics 2015-10-12 10:56:17.944351169 +0200
-@@ -0,0 +1,201 @@
-+What: /sys/class/<iface>/statistics/collisions
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of collisions seen by this network device.
-+ This value might not be relevant with all MAC layers.
-+
-+What: /sys/class/<iface>/statistics/multicast
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of multicast packets received by this
-+ network device.
-+
-+What: /sys/class/<iface>/statistics/rx_bytes
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of bytes received by this network device.
-+ See the network driver for the exact meaning of when this
-+ value is incremented.
-+
-+What: /sys/class/<iface>/statistics/rx_compressed
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of compressed packets received by this
-+ network device. This value might only be relevant for interfaces
-+ that support packet compression (e.g: PPP).
-+
-+What: /sys/class/<iface>/statistics/rx_crc_errors
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of packets received with a CRC (FCS) error
-+ by this network device. Note that the specific meaning might
-+ depend on the MAC layer used by the interface.
-+
-+What: /sys/class/<iface>/statistics/rx_dropped
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of packets received by the network device
-+ but dropped, that are not forwarded to the upper layers for
-+ packet processing. See the network driver for the exact
-+ meaning of this value.
-+
-+What: /sys/class/<iface>/statistics/rx_fifo_errors
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of receive FIFO errors seen by this
-+ network device. See the network driver for the exact
-+ meaning of this value.
-+
-+What: /sys/class/<iface>/statistics/rx_frame_errors
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of received frames with error, such as
-+ alignment errors. Note that the specific meaning depends on
-+ on the MAC layer protocol used. See the network driver for
-+ the exact meaning of this value.
-+
-+What: /sys/class/<iface>/statistics/rx_length_errors
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of received error packet with a length
-+ error, oversized or undersized. See the network driver for the
-+ exact meaning of this value.
-+
-+What: /sys/class/<iface>/statistics/rx_missed_errors
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of received packets that have been missed
-+ due to lack of capacity in the receive side. See the network
-+ driver for the exact meaning of this value.
-+
-+What: /sys/class/<iface>/statistics/rx_over_errors
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of received packets that are oversized
-+ compared to what the network device is configured to accept
-+ (e.g: larger than MTU). See the network driver for the exact
-+ meaning of this value.
-+
-+What: /sys/class/<iface>/statistics/rx_packets
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the total number of good packets received by this
-+ network device.
-+
-+What: /sys/class/<iface>/statistics/tx_aborted_errors
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of packets that have been aborted
-+ during transmission by a network device (e.g: because of
-+ a medium collision). See the network driver for the exact
-+ meaning of this value.
-+
-+What: /sys/class/<iface>/statistics/tx_bytes
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of bytes transmitted by a network
-+ device. See the network driver for the exact meaning of this
-+ value, in particular whether this accounts for all successfully
-+ transmitted packets or all packets that have been queued for
-+ transmission.
-+
-+What: /sys/class/<iface>/statistics/tx_carrier_errors
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of packets that could not be transmitted
-+ because of carrier errors (e.g: physical link down). See the
-+ network driver for the exact meaning of this value.
-+
-+What: /sys/class/<iface>/statistics/tx_compressed
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of transmitted compressed packets. Note
-+ this might only be relevant for devices that support
-+ compression (e.g: PPP).
-+
-+What: /sys/class/<iface>/statistics/tx_dropped
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of packets dropped during transmission.
-+ See the driver for the exact reasons as to why the packets were
-+ dropped.
-+
-+What: /sys/class/<iface>/statistics/tx_errors
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of packets in error during transmission by
-+ a network device. See the driver for the exact reasons as to
-+ why the packets were dropped.
-+
-+What: /sys/class/<iface>/statistics/tx_fifo_errors
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of packets having caused a transmit
-+ FIFO error. See the driver for the exact reasons as to why the
-+ packets were dropped.
-+
-+What: /sys/class/<iface>/statistics/tx_heartbeat_errors
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of packets transmitted that have been
-+ reported as heartbeat errors. See the driver for the exact
-+ reasons as to why the packets were dropped.
-+
-+What: /sys/class/<iface>/statistics/tx_packets
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of packets transmitted by a network
-+ device. See the driver for whether this reports the number of all
-+ attempted or successful transmissions.
-+
-+What: /sys/class/<iface>/statistics/tx_window_errors
-+Date: April 2005
-+KernelVersion: 2.6.12
-+Contact: netdev@vger.kernel.org
-+Description:
-+ Indicates the number of packets not successfully transmitted
-+ due to a window collision. The specific meaning depends on the
-+ MAC layer used. On Ethernet this is usually used to report
-+ late collisions errors.
-diff -Nur linux-3.14.54.orig/Documentation/arm64/booting.txt linux-3.14.54/Documentation/arm64/booting.txt
---- linux-3.14.54.orig/Documentation/arm64/booting.txt 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/Documentation/arm64/booting.txt 2015-10-12 10:56:17.944351169 +0200
-@@ -111,8 +111,14 @@
- - Caches, MMUs
- The MMU must be off.
- Instruction cache may be on or off.
-- Data cache must be off and invalidated.
-- External caches (if present) must be configured and disabled.
-+ The address range corresponding to the loaded kernel image must be
-+ cleaned to the PoC. In the presence of a system cache or other
-+ coherent masters with caches enabled, this will typically require
-+ cache maintenance by VA rather than set/way operations.
-+ System caches which respect the architected cache maintenance by VA
-+ operations must be configured and may be enabled.
-+ System caches which do not respect architected cache maintenance by VA
-+ operations (not recommended) must be configured and disabled.
-
- - Architected timers
- CNTFRQ must be programmed with the timer frequency and CNTVOFF must
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/arm/imx/busfreq-imx6.txt linux-3.14.54/Documentation/devicetree/bindings/arm/imx/busfreq-imx6.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/arm/imx/busfreq-imx6.txt 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/Documentation/devicetree/bindings/arm/imx/busfreq-imx6.txt 2015-10-12 10:56:17.945351169 +0200
-@@ -0,0 +1,64 @@
-+Freescale Busfreq driver
-+
-+It is a generic driver that manages the frequency of the DDR, AHB and AXI buses in the iMX6x architecture.
-+It works for both SMP and UP systems and for both DDR3 and LPDDR2 memory types.
-+
-+Required properties are listed below:
-+- compatible: should be "fsl,imx6_busfreq"
-+- clocks: Lists the various clocks used by the busfreq driver
-+- interrupts - Lists the interrupts used by the busfreq driver. This is needed only for SMP architecutre.
-+- fsl,max_ddr_freq - The max ddr freq for this chip
-+
-+Examples:
-+For SOC imx6q.dtsi:
-+ busfreq { /* BUSFREQ */
-+ compatible = "fsl,imx6_busfreq";
-+ clocks = <&clks 171>, <&clks 6>, <&clks 11>, <&clks 104>, <&clks 172>, <&clks 58>,
-+ <&clks 18>, <&clks 60>, <&clks 20>, <&clks 3>;
-+ clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm", "pll3_usb_otg", "periph",
-+ "periph_pre", "periph_clk2", "periph_clk2_sel", "osc";
-+ interrupts = <0 107 0x04>, <0 112 0x4>, <0 113 0x4>, <0 114 0x4>;
-+ interrupt-names = "irq_busfreq_0", "irq_busfreq_1", "irq_busfreq_2", "irq_busfreq_3";
-+ fsl,max_ddr_freq = <528000000>;
-+ };
-+
-+The Freescale Busfreq driver supports the following setpoints for the DDR freq:
-+enum bus_freq_mode {
-+ BUS_FREQ_HIGH, -> The max freq the SOC supports
-+ BUS_FREQ_MED, -> Medium setpoint (ex 400MHz for DDR3 when the max is 528MHz)
-+ BUS_FREQ_AUDIO, -> Audio playback freq (50MHz)
-+ BUS_FREQ_LOW, -> Low power IDLE freq (24MHz)
-+};
-+
-+Currently the Freescale Busfreq driver implementation requires drivers to call the following APIs:
-+1. request_bus_freq(enum bus_freq_mode):
-+ The driver is requesting the system and ddr freq to be set to the requested value. The driver should call this
-+ API before it even enables its clocks.
-+
-+2. release_bus_freq(enum bus_freq_mode):
-+ The driver no longer needs the system and ddr freq at the required value. The driver should call this API after
-+ its work is done and it has disabled its clocks.
-+
-+Examples:
-+In the IPU driver, the requesting and releasing of the required bus frequency is tied into the runtime PM implementation:
-+
-+int ipu_runtime_suspend(struct device *dev)
-+{
-+ release_bus_freq(BUS_FREQ_HIGH);
-+ dev_dbg(dev, "ipu busfreq high release.\n");
-+
-+ return 0;
-+}
-+
-+int ipu_runtime_resume(struct device *dev)
-+{
-+ request_bus_freq(BUS_FREQ_HIGH);
-+ dev_dbg(dev, "ipu busfreq high requst.\n");
-+
-+ return 0;
-+}
-+
-+static const struct dev_pm_ops ipu_pm_ops = {
-+ SET_RUNTIME_PM_OPS(ipu_runtime_suspend, ipu_runtime_resume, NULL)
-+ SET_SYSTEM_SLEEP_PM_OPS(ipu_suspend, ipu_resume)
-+};
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/arm/imx/gpc.txt linux-3.14.54/Documentation/devicetree/bindings/arm/imx/gpc.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/arm/imx/gpc.txt 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/Documentation/devicetree/bindings/arm/imx/gpc.txt 2015-10-12 10:56:17.945351169 +0200
-@@ -0,0 +1,20 @@
-+Freescale imx GPC bindings
-+
-+Optional properties:
-+- fsl,cpu_pupscr_sw2iso: for powering up CPU, number of 32K clock cycle PGC will wait before negating isolation signal.
-+- fsl,cpu_pupscr_sw: for powering up CPU, number of 32K clock cycle PGC will wait before asserting isolation signal.
-+- fsl,cpu_pdnscr_iso2sw: for powering down CPU, number of ipg clock cycle PGC will wait before negating isolation signal.
-+- fsl,cpu_pdnscr_iso: for powering down CPU, number of ipg clock cycle PGC will wait before asserting isolation signal.
-+
-+These properties are for adjusting the GPC PGC CPU power up/down setting, if there is no such property in dts, then default
-+value in GPC PGC registers will be used.
-+
-+
-+Example:
-+
-+ &gpc {
-+ fsl,cpu_pupscr_sw2iso = <0xf>;
-+ fsl,cpu_pupscr_sw = <0xf>;
-+ fsl,cpu_pdnscr_iso2sw = <0x1>;
-+ fsl,cpu_pdnscr_iso = <0x1>;
-+ };
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/arm/pmu.txt linux-3.14.54/Documentation/devicetree/bindings/arm/pmu.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/arm/pmu.txt 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/Documentation/devicetree/bindings/arm/pmu.txt 2015-10-12 10:56:17.945351169 +0200
-@@ -17,6 +17,9 @@
- "arm,arm1176-pmu"
- "arm,arm1136-pmu"
- - interrupts : 1 combined interrupt or 1 per core.
-+- cluster : a phandle to the cluster to which it belongs
-+ If there are more than one cluster with same CPU type
-+ then there should be separate PMU nodes per cluster.
-
- Example:
-
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/ata/ahci-platform.txt linux-3.14.54/Documentation/devicetree/bindings/ata/ahci-platform.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/ata/ahci-platform.txt 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/Documentation/devicetree/bindings/ata/ahci-platform.txt 2015-10-12 10:56:17.945351169 +0200
-@@ -4,12 +4,19 @@
- Each SATA controller should have its own node.
-
- Required properties:
--- compatible : compatible list, contains "snps,spear-ahci"
-+- compatible : compatible list, contains "snps,spear-ahci",
-+ "fsl,imx53-ahci" or "fsl,imx6q-ahci"
- - interrupts : <interrupt mapping for SATA IRQ>
- - reg : <registers mapping>
-
- Optional properties:
- - dma-coherent : Present if dma operations are coherent
-+- clocks : a list of phandle + clock specifier pairs
-+- target-supply : regulator for SATA target power
-+
-+"fsl,imx53-ahci", "fsl,imx6q-ahci" required properties:
-+- clocks : must contain the sata, sata_ref and ahb clocks
-+- clock-names : must contain "ahb" for the ahb clock
-
- Example:
- sata@ffe08000 {
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/clock/imx6q-clock.txt linux-3.14.54/Documentation/devicetree/bindings/clock/imx6q-clock.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/clock/imx6q-clock.txt 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/Documentation/devicetree/bindings/clock/imx6q-clock.txt 2015-10-12 10:56:17.946351168 +0200
-@@ -89,8 +89,6 @@
- gpu3d_shader 74
- ipu1_podf 75
- ipu2_podf 76
-- ldb_di0_podf 77
-- ldb_di1_podf 78
- ipu1_di0_pre 79
- ipu1_di1_pre 80
- ipu2_di0_pre 81
-@@ -220,6 +218,20 @@
- lvds2_sel 205
- lvds1_gate 206
- lvds2_gate 207
-+ gpt_3m 208
-+ video_27m 209
-+ ldb_di0_div_7 210
-+ ldb_di1_div_7 211
-+ ldb_di0_div_sel 212
-+ ldb_di1_div_sel 213
-+ caam_mem 214
-+ caam_aclk 215
-+ caam_ipg 216
-+ epit1 217
-+ epit2 218
-+ tzasc2 219
-+ lvds1_in 220
-+ lvds1_out 221
-
- Examples:
-
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt linux-3.14.54/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt 2015-10-12 10:56:17.946351168 +0200
-@@ -47,6 +47,7 @@
- 20 ASRC
- 21 ESAI
- 22 SSI Dual FIFO (needs firmware ver >= 2)
-+ 23 HDMI Audio
-
- The third cell specifies the transfer priority as below.
-
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/fb/fsl_ipuv3_fb.txt linux-3.14.54/Documentation/devicetree/bindings/fb/fsl_ipuv3_fb.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/fb/fsl_ipuv3_fb.txt 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/Documentation/devicetree/bindings/fb/fsl_ipuv3_fb.txt 2015-10-12 10:56:17.946351168 +0200
-@@ -0,0 +1,146 @@
-+* FSL IPUv3 Display/FB
-+
-+The FSL IPUv3 is Image Processing Unit version 3, a part of video and graphics
-+subsystem in an application processor. The goal of the IPU is to provide
-+comprehensive support for the flow of data from an image sensor or/and to a
-+display device.
-+
-+Two IPU units are on the imx6q SOC while only one IPU unit on the imx6dl SOC.
-+Each IPU unit has two display interfaces.
-+
-+For LDB/LVDS panel, there are two LVDS channels(LVDS0 and LVDS1) which can
-+transfer video data, these two channels can be used as
-+split/dual/single/separate mode.
-+-split mode means display data from DI0 or DI1 will send to both channels
-+ LVDS0+LVDS1.
-+-dual mode means display data from DI0 or DI1 will be duplicated on LVDS0
-+ and LVDS1, it said, LVDS0 and LVDS1 has the same content.
-+-single mode means only work for DI0/DI1->LVDS0 or DI0/DI1->LVDS1.
-+-separate mode means you can make DI0/DI1->LVDS0 and DI0/DI1->LVDS1 work
-+ at the same time.
-+ "ldb=spl0/1" -- split mode on DI0/1
-+ "ldb=dul0/1" -- dual mode on DI0/1
-+ "ldb=sin0/1" -- single mode on LVDS0/1
-+ "ldb=sep0/1" -- separate mode begin from LVDS0/1
-+
-+Required properties for IPU:
-+- bypass_reset :Bypass reset to avoid display channel being.
-+ stopped by probe since it may start to work in bootloader: 0 or 1.
-+- compatible : should be "fsl,imx6q-ipu".
-+- reg : the register address range.
-+- interrupts : the error and sync interrupts request.
-+- clocks : the clock sources that it depends on.
-+- clock-names: the related clock names.
-+- resets : IPU reset specifier. See reset.txt and fsl,imx-src.txt in
-+ Documentation/devicetree/bindings/reset/ for details.
-+
-+Required properties for fb:
-+- compatible : should be "fsl,mxc_sdc_fb".
-+- disp_dev : display device: "ldb", "lcd", "hdmi", "mipi_dsi".
-+- mode_str : video mode string: "LDB-XGA" or "LDB-1080P60" for ldb,
-+ "CLAA-WVGA" for lcd, "TRULY-WVGA" for TRULY mipi_dsi lcd panel,
-+ "1920x1080M@60" for hdmi.
-+- default_bpp : default bits per pixel: 8/16/24/32
-+- int_clk : use internal clock as pixel clock: 0 or 1
-+- late_init : to avoid display channel being re-initialized
-+ as we've probably setup the channel in bootloader: 0 or 1
-+- interface_pix_fmt : display interface pixel format as below:
-+ RGB666 IPU_PIX_FMT_RGB666
-+ RGB565 IPU_PIX_FMT_RGB565
-+ RGB24 IPU_PIX_FMT_RGB24
-+ BGR24 IPU_PIX_FMT_BGR24
-+ GBR24 IPU_PIX_FMT_GBR24
-+ YUV444 IPU_PIX_FMT_YUV444
-+ LVDS666 IPU_PIX_FMT_LVDS666
-+ YUYV IPU_PIX_FMT_YUYV
-+ UYVY IPU_PIX_FMT_UYVY
-+ YVYV IPU_PIX_FMT_YVYU
-+ VYUY IPU_PIX_FMT_VYUY
-+
-+Required properties for display:
-+- compatible : should be "fsl,lcd" for lcd panel, "fsl,imx6q-ldb" for ldb
-+- reg : the register address range if necessary to have.
-+- interrupts : the error and sync interrupts if necessary to have.
-+- clocks : the clock sources that it depends on if necessary to have.
-+- clock-names: the related clock names if necessary to have.
-+- ipu_id : ipu id for the first display device: 0 or 1
-+- disp_id : display interface id for the first display interface: 0 or 1
-+- default_ifmt : save as above display interface pixel format for lcd
-+- pinctrl-names : should be "default"
-+- pinctrl-0 : should be pinctrl_ipu1_1 or pinctrl_ipu2_1, which depends on the
-+ IPU connected.
-+- sec_ipu_id : secondary ipu id for the second display device(ldb only): 0 or 1
-+- sec_disp_id : secondary display interface id for the second display
-+ device(ldb only): 0 or 1
-+- ext_ref : reference resistor select for ldb only: 0 or 1
-+- mode : ldb mode as below:
-+ spl0 LDB_SPL_DI0
-+ spl1 LDB_SPL_DI1
-+ dul0 LDB_DUL_DI0
-+ dul1 LDB_DUL_DI1
-+ sin0 LDB_SIN0
-+ sin1 LDB_SIN1
-+ sep0 LDB_SEP0
-+ sep1 LDB_SEP1
-+- gpr : the mux controller for the display engine's display interfaces and the display encoder
-+ (only valid for mipi dsi now).
-+- disp-power-on-supply : the regulator to control display panel's power.
-+ (only valid for mipi dsi now).
-+- resets : the gpio pin to reset the display device(only valid for mipi display panel now).
-+- lcd_panel : the video mode name for the display device(only valid for mipi display panel now).
-+- dev_id : the display engine's identity within the system, which intends to replace ipu_id
-+ (only valid for mipi dsi now).
-+
-+Example for IPU:
-+ ipu1: ipu@02400000 {
-+ compatible = "fsl,imx6q-ipu";
-+ reg = <0x02400000 0x400000>;
-+ interrupts = <0 6 0x4 0 5 0x4>;
-+ clocks = <&clks 130>, <&clks 131>, <&clks 132>,
-+ <&clks 39>, <&clks 40>,
-+ <&clks 135>, <&clks 136>;
-+ clock-names = "bus", "di0", "di1",
-+ "di0_sel", "di1_sel",
-+ "ldb_di0", "ldb_di1";
-+ resets = <&src 2>;
-+ bypass_reset = <0>;
-+ };
-+
-+Example for fb:
-+ fb0 {
-+ compatible = "fsl,mxc_sdc_fb";
-+ disp_dev = "ldb";
-+ interface_pix_fmt = "RGB666";
-+ mode_str ="LDB-XGA";
-+ default_bpp = <16>;
-+ int_clk = <0>;
-+ late_init = <0>;
-+ status = "okay";
-+ };
-+
-+Example for ldb display:
-+ ldb@020e0000 {
-+ ipu_id = <1>;
-+ disp_id = <0>;
-+ ext_ref = <1>;
-+ mode = "sep0";
-+ sec_ipu_id = <1>;
-+ sec_disp_id = <1>;
-+ status = "okay";
-+ };
-+
-+Example for mipi dsi display:
-+ mipi_dsi: mipi@021e0000 {
-+ compatible = "fsl,imx6q-mipi-dsi";
-+ reg = <0x021e0000 0x4000>;
-+ interrupts = <0 102 0x04>;
-+ gpr = <&gpr>;
-+ clocks = <&clks 138>, <&clks 204>;
-+ clock-names = "mipi_pllref_clk", "mipi_cfg_clk";
-+ dev_id = <0>;
-+ disp_id = <0>;
-+ lcd_panel = "TRULY-WVGA";
-+ disp-power-on-supply = <&reg_mipi_dsi_pwr_on>
-+ resets = <&mipi_dsi_reset>;
-+ status = "okay";
-+ };
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/leds/leds-pwm.txt linux-3.14.54/Documentation/devicetree/bindings/leds/leds-pwm.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/leds/leds-pwm.txt 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/Documentation/devicetree/bindings/leds/leds-pwm.txt 2015-10-12 10:56:17.946351168 +0200
-@@ -13,6 +13,8 @@
- For the pwms and pwm-names property please refer to:
- Documentation/devicetree/bindings/pwm/pwm.txt
- - max-brightness : Maximum brightness possible for the LED
-+- active-low : (optional) For PWMs where the LED is wired to supply
-+ rather than ground.
- - label : (optional)
- see Documentation/devicetree/bindings/leds/common.txt
- - linux,default-trigger : (optional)
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/mailbox/mailbox.txt linux-3.14.54/Documentation/devicetree/bindings/mailbox/mailbox.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/mailbox/mailbox.txt 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/Documentation/devicetree/bindings/mailbox/mailbox.txt 2015-10-12 10:56:17.946351168 +0200
-@@ -0,0 +1,33 @@
-+* Generic Mailbox Controller and client driver bindings
-+
-+Generic binding to provide a way for Mailbox controller drivers to
-+assign appropriate mailbox channel to client drivers.
-+
-+* Mailbox Controller
-+
-+Required property:
-+- #mbox-cells: Must be at least 1. Number of cells in a mailbox
-+ specifier.
-+
-+Example:
-+ mailbox: mailbox {
-+ ...
-+ #mbox-cells = <1>;
-+ };
-+
-+
-+* Mailbox Client
-+
-+Required property:
-+- mbox: List of phandle and mailbox channel specifier.
-+
-+- mbox-names: List of identifier strings for each mailbox channel
-+ required by the client.
-+
-+Example:
-+ pwr_cntrl: power {
-+ ...
-+ mbox-names = "pwr-ctrl", "rpc";
-+ mbox = <&mailbox 0
-+ &mailbox 1>;
-+ };
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/mlb/mlb150.txt linux-3.14.54/Documentation/devicetree/bindings/mlb/mlb150.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/mlb/mlb150.txt 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/Documentation/devicetree/bindings/mlb/mlb150.txt 2015-10-12 10:56:17.947351168 +0200
-@@ -0,0 +1,22 @@
-+* Freescale Media Local Bus Host Controller (MLB) for i.MX6Q/DL
-+
-+The Media Local Bus Host Controller on Freescale i.MX family
-+provides an interface for MOST network.
-+
-+Required properties:
-+- compatible : Should be "fsl,<chip>-mlb150"
-+- reg : Should contain mlb registers location and length
-+- interrupts : Should contain mlb interrupt
-+- clocks: Should contain the mlb clock sources
-+- clock-names: Should be the names of mlb clock sources
-+- iram : phandle pointing to the SRAM device node
-+
-+Examples:
-+mlb@0218c000 {
-+ compatible = "fsl,imx6q-mlb150";
-+ reg = <0x0218c000 0x4000>;
-+ interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>;
-+ clocks = <&clks 139>, <&clks 175>;
-+ clock-names = "mlb", "pll8_mlb";
-+ iram = <&ocram>;
-+};
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/mmc/mmc.txt linux-3.14.54/Documentation/devicetree/bindings/mmc/mmc.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/mmc/mmc.txt 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/Documentation/devicetree/bindings/mmc/mmc.txt 2015-10-12 10:56:17.947351168 +0200
-@@ -5,6 +5,8 @@
- Interpreted by the OF core:
- - reg: Registers location and length.
- - interrupts: Interrupts used by the MMC controller.
-+- clocks: Clocks needed for the host controller, if any.
-+- clock-names: Goes with clocks above.
-
- Card detection:
- If no property below is supplied, host native card detect is used.
-@@ -30,6 +32,15 @@
- - cap-sdio-irq: enable SDIO IRQ signalling on this interface
- - full-pwr-cycle: full power cycle of the card is supported
-
-+Card power and reset control:
-+The following properties can be specified for cases where the MMC
-+peripheral needs additional reset, regulator and clock lines. It is for
-+example common for WiFi/BT adapters to have these separate from the main
-+MMC bus:
-+ - card-reset-gpios: Specify GPIOs for card reset (reset active low)
-+ - card-external-vcc-supply: Regulator to drive (independent) card VCC
-+ - clock with name "card_ext_clock": External clock provided to the card
-+
- *NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line
- polarity properties, we have to fix the meaning of the "normal" and "inverted"
- line levels. We choose to follow the SDHCI standard, which specifies both those
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt linux-3.14.54/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt 2015-10-12 10:56:17.947351168 +0200
-@@ -71,6 +71,13 @@
- name for integer state ID 0, list entry 1 for state ID 1, and
- so on.
-
-+pinctrl-assert-gpios:
-+ List of phandles, each pointing at a GPIO which is used by some
-+ board design to steer pins between two peripherals on the board.
-+ It plays like a board level pin multiplexer to choose different
-+ functions for given pins by pulling up/down the GPIOs. See
-+ bindings/gpio/gpio.txt for details of how to specify GPIO.
-+
- For example:
-
- /* For a client device requiring named states */
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/reset/gpio-reset.txt linux-3.14.54/Documentation/devicetree/bindings/reset/gpio-reset.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/reset/gpio-reset.txt 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/Documentation/devicetree/bindings/reset/gpio-reset.txt 2015-10-12 10:56:17.948351168 +0200
-@@ -0,0 +1,35 @@
-+GPIO reset controller
-+=====================
-+
-+A GPIO reset controller controls a single GPIO that is connected to the reset
-+pin of a peripheral IC. Please also refer to reset.txt in this directory for
-+common reset controller binding usage.
-+
-+Required properties:
-+- compatible: Should be "gpio-reset"
-+- reset-gpios: A gpio used as reset line. The gpio specifier for this property
-+ depends on the gpio controller that provides the gpio.
-+- #reset-cells: 0, see below
-+
-+Optional properties:
-+- reset-delay-us: delay in microseconds. The gpio reset line will be asserted for
-+ this duration to reset.
-+- initially-in-reset: boolean. If not set, the initial state should be a
-+ deasserted reset line. If this property exists, the
-+ reset line should be kept in reset.
-+
-+example:
-+
-+sii902x_reset: gpio-reset {
-+ compatible = "gpio-reset";
-+ reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
-+ reset-delay-us = <10000>;
-+ initially-in-reset;
-+ #reset-cells = <0>;
-+};
-+
-+/* Device with nRESET pin connected to GPIO5_0 */
-+sii902x@39 {
-+ /* ... */
-+ resets = <&sii902x_reset>; /* active-low GPIO5_0, 10 ms delay */
-+};
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/sound/cs42888.txt linux-3.14.54/Documentation/devicetree/bindings/sound/cs42888.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/sound/cs42888.txt 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/Documentation/devicetree/bindings/sound/cs42888.txt 2015-10-12 10:56:17.948351168 +0200
-@@ -0,0 +1,29 @@
-+CS42888 audio CODEC
-+
-+This device supports I2C only.
-+
-+Required properties:
-+
-+ - compatible: "cirrus,cs42888"
-+ - reg: the I2C address of the device.
-+ - clocks: Phandle to the clock node.
-+ - clock-names: Contains name for each entry in clocks.
-+ "codec_osc" : the external oscillator.
-+ "esai" : the hckt clock from esai.
-+ - <name>-supply: Phandle to the regulator <name>.
-+
-+Note: cs42888 needs a regulators node and a clocks node.
-+
-+Example:
-+In this case, the clock is external oscillator.
-+
-+codec: cs42888@48 {
-+ compatible = "cirrus,cs42888";
-+ reg = <0x048>;
-+ clocks = <&codec_osc 0>;
-+ clock-names = "codec_osc";
-+ VA-supply = <&reg_audio>;
-+ VD-supply = <&reg_audio>;
-+ VLS-supply = <&reg_audio>;
-+ VLC-supply = <&reg_audio>;
-+};
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/sound/fsl-asrc-p2p.txt linux-3.14.54/Documentation/devicetree/bindings/sound/fsl-asrc-p2p.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/sound/fsl-asrc-p2p.txt 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/Documentation/devicetree/bindings/sound/fsl-asrc-p2p.txt 2015-10-12 10:56:17.949351168 +0200
-@@ -0,0 +1,23 @@
-+* Freescale Asynchronous Sample Rate Converter (ASRC)
-+
-+This document is for asrc p2p node. p2p is one of asrc mode. asrc p2p depend on
-+MXC_ASRC.
-+
-+Required properties:
-+ - compatible: Should be "fsl,<chip>-asrc-p2p".
-+ - fsl,output-rate: the output rate of asrc p2p. which can be <32000> to <192000>,
-+ - fsl,output-width: the output width of asrc p2p. which can be <16>, <24>.
-+ - fsl,asrc-dma-rx-events: The rx dma event of the asrc, <a b c> corresponding
-+ to 3 pair of asrc.
-+ - fsl,asrc-dma-tx-events: The tx dma event of the esai, <a b c> corresponding
-+ to 3 pair of asrc.
-+
-+Example:
-+asrc_p2p: asrc_p2p {
-+ compatible = "fsl,imx6q-asrc-p2p";
-+ fsl,output-rate = <48000>;
-+ fsl,output-width = <16>;
-+ fsl,asrc-dma-rx-events = <17 18 19>;
-+ fsl,asrc-dma-tx-events = <20 21 22>;
-+ status = "okay";
-+};
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/sound/imx-audio-cs42888.txt linux-3.14.54/Documentation/devicetree/bindings/sound/imx-audio-cs42888.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/sound/imx-audio-cs42888.txt 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/Documentation/devicetree/bindings/sound/imx-audio-cs42888.txt 2015-10-12 10:56:17.949351168 +0200
-@@ -0,0 +1,25 @@
-+Freescale i.MX audio complex with CS42888 codec
-+
-+Required properties:
-+- compatible : "fsl,imx-audio-cs42888"
-+- model : The user-visible name of this sound complex
-+- esai-controller : The phandle of the i.MX SSI controller
-+- audio-codec : The phandle of the CS42888 audio codec
-+
-+Optional properties:
-+- asrc-controller : The phandle of the i.MX ASRC controller
-+- audio-routing : A list of the connections between audio components.
-+ Each entry is a pair of strings, the first being the connection's sink,
-+ the second being the connection's source. Valid names could be power
-+ supplies, CS42888 pins, and the jacks on the board:
-+
-+Example:
-+
-+sound {
-+ compatible = "fsl,imx6q-sabresd-wm8962",
-+ "fsl,imx-audio-wm8962";
-+ model = "cs42888-audio";
-+ esai-controller = <&esai>;
-+ asrc-controller = <&asrc_p2p>;
-+ audio-codec = <&codec>;
-+};
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/sound/imx-audio-wm8962.txt linux-3.14.54/Documentation/devicetree/bindings/sound/imx-audio-wm8962.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/sound/imx-audio-wm8962.txt 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/Documentation/devicetree/bindings/sound/imx-audio-wm8962.txt 2015-10-12 10:56:17.949351168 +0200
-@@ -24,6 +24,12 @@
- Note: The AUDMUX port numbering should start at 1, which is consistent with
- hardware manual.
-
-+Optional properties:
-+- hp-det-gpios : The gpio pin to detect plug in/out event that happens to
-+ Headphone jack.
-+- mic-det-gpios: The gpio pin to detect plug in/out event that happens to
-+ Microphone jack.
-+
- Example:
-
- sound {
-@@ -43,4 +49,6 @@
- "DMICDAT", "DMIC";
- mux-int-port = <2>;
- mux-ext-port = <3>;
-+ hp-det-gpios = <&gpio7 8 1>;
-+ mic-det-gpios = <&gpio1 9 1>;
- };
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/sound/wm8962.txt linux-3.14.54/Documentation/devicetree/bindings/sound/wm8962.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/sound/wm8962.txt 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/Documentation/devicetree/bindings/sound/wm8962.txt 2015-10-12 10:56:17.949351168 +0200
-@@ -13,6 +13,14 @@
- of R51 (Class D Control 2) gets set, indicating that the speaker is
- in mono mode.
-
-+ - amic-mono: This is a boolean property. If present, indicating that the
-+ analog micphone is hardware mono input, the driver would enable monomix
-+ for it.
-+
-+ - dmic-mono: This is a boolean property. If present, indicating that the
-+ digital micphone is hardware mono input, the driver would enable monomix
-+ for it.
-+
- - mic-cfg : Default register value for R48 (Additional Control 4).
- If absent, the default should be the register default.
-
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/usb/mxs-phy.txt linux-3.14.54/Documentation/devicetree/bindings/usb/mxs-phy.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/usb/mxs-phy.txt 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/Documentation/devicetree/bindings/usb/mxs-phy.txt 2015-10-12 10:56:17.950351168 +0200
-@@ -1,13 +1,16 @@
- * Freescale MXS USB Phy Device
-
- Required properties:
--- compatible: Should be "fsl,imx23-usbphy"
-+- compatible: "fsl,imx23-usbphy" for imx23 and imx28, "fsl,imx6q-usbphy"
-+for imx6dq and imx6dl, "fsl,imx6sl-usbphy" for imx6sl
- - reg: Should contain registers location and length
- - interrupts: Should contain phy interrupt
-+- fsl,anatop: phandle for anatop register, it is only for imx6 SoC series
-
- Example:
- usbphy1: usbphy@020c9000 {
- compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
- reg = <0x020c9000 0x1000>;
- interrupts = <0 44 0x04>;
-+ fsl,anatop = <&anatop>;
- };
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/video/fsl,csi-v4l2-capture.txt linux-3.14.54/Documentation/devicetree/bindings/video/fsl,csi-v4l2-capture.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/video/fsl,csi-v4l2-capture.txt 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/Documentation/devicetree/bindings/video/fsl,csi-v4l2-capture.txt 2015-10-12 10:56:17.950351168 +0200
-@@ -0,0 +1,61 @@
-+* Freescale CMOS Sensor Interface (CSI) V4L2 Capture
-+
-+Required properties for CSI
-+- compatible: "fsl,<soc>-csi". Supported chip includes imx6sl
-+- reg: Address and length of the register set for CSI
-+- interrupts: Should contain CSI interrupts
-+
-+Required properties for v4l2_capture
-+- compatible: should be "fsl,<soc>-csi-v4l2", supported socs include imx6sl
-+
-+Required properties for sensor
-+- compatible: "<vendor>,<sensor>"
-+ please check the supported sensor in the Supported Sensor fields.
-+- reg: sensor I2C slave address
-+- pinctrl-names: should be "default" for parallel sensor
-+- pinctrl-0: should depend on the connection between sensor and i.MX
-+ connection between sensor and i.MX could be only legacy parallel on i.MX6SL
-+- clocks: should be the clock source provided to sensor.
-+- clock-names: should be "csi_mclk"
-+- AVDD-supply: set according to the board.
-+- DVDD-supply: set according to the board.
-+- pwn-gpios: set according to the board.
-+- rst-gpios: set according to the board.
-+- csi_id: csi id for v4l2 capture device
-+ should be 0 for i.MX6SL
-+- mclk: should the value of mclk clock send out the sensor. unit is Hz.
-+- mclk_source: should be 0 for i.MX6SL
-+
-+Supported Sensor
-+- ovti, ov5640
-+
-+Example for CSI:
-+ csi: csi@020e4000 {
-+ compatible = "fsl,imx6sl-csi";
-+ reg = <0x020e4000 0x4000>;
-+ interrupts = <0 7 0x04>;
-+ status = "disabled";
-+ };
-+
-+Examples for v4l2_capture:
-+ csi_v4l2_cap {
-+ compatible = "fsl,imx6q-v4l2-capture";
-+ status = "okay";
-+ };
-+
-+Examples for sensors:
-+ ov564x: ov564x@3c {
-+ compatible = "ovti,ov564x";
-+ reg = <0x3c>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_csi_0>;
-+ clocks = <&clks IMX6SL_CLK_CSI>;
-+ clock-names = "csi_mclk";
-+ AVDD-supply = <&vgen6_reg>; /* 2.8v */
-+ DVDD-supply = <&vgen2_reg>; /* 1.5v*/
-+ pwn-gpios = <&gpio1 25 1>;
-+ rst-gpios = <&gpio1 26 0>;
-+ csi_id = <0>;
-+ mclk = <24000000>;
-+ mclk_source = <0>;
-+ };
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/video/fsl,mipi-csi2.txt linux-3.14.54/Documentation/devicetree/bindings/video/fsl,mipi-csi2.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/video/fsl,mipi-csi2.txt 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/Documentation/devicetree/bindings/video/fsl,mipi-csi2.txt 2015-10-12 10:56:17.951351168 +0200
-@@ -0,0 +1,42 @@
-+* Freescale MIPI CSI2 Controller for i.MX6DQ/i.MX6SDL
-+
-+Required properties for mipi csi2 controller:
-+- compatible: should be "fsl,imx6q-mipi-csi2"
-+- reg: <base addr, range> contains mipi csi2 register base address and range
-+- interrupts: <type num flag> where type is a interrupt type, num is the
-+ interrupt number and flag is a field that level/trigger information for
-+ the interrupt.
-+- clocks: the clock sources that mipi csi2 depends on.
-+- clock-names: the name is related to the clock source one by one.
-+- status: should be set to "disable".
-+
-+Required properties for mipi csi2 on specified board:
-+- ipu_id: ipu id which mipi csi2 connected to.
-+ should be 0 or 1 for i.MX6DQ; should be 0 for i.MX6SDL
-+- csi_id: csi id which mipi csi2 connected to.
-+ should be 0 or 1 for i.MX6DQ/i.MX6SDL
-+- v_channel: virtual channel which send to MIPI CSI2 controller
-+ should keep consistent with the input MIPI signal.
-+- lanes: data lanes of input MIPI signal. The maximum data lanes is 4.
-+ should keep consistent with the input MIPI signal.
-+- status: should be set to "okay".
-+
-+Examples:
-+for SOC imx6qdl.dtsi:
-+ mipi_csi@021dc000 {
-+ compatible = "fsl,imx6q-mipi-csi2";
-+ reg = <0x021dc000 0x4000>;
-+ interrupts = <0 100 0x04>, <0 101 0x04>;
-+ clocks = <&clks 138>, <&clks 53>, <&clks 204>;
-+ clock-names = "dphy_clk", "pixel_clk", "cfg_clk";
-+ status = "disabled";
-+ };
-+
-+for board imx6qdl-sabresd.dtsi:
-+ mipi_csi@021dc000 {
-+ status = "okay";
-+ ipu_id = <0>;
-+ csi_id = <1>;
-+ v_channel = <0>;
-+ lanes = <2>;
-+ };
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/video/fsl,pxp.txt linux-3.14.54/Documentation/devicetree/bindings/video/fsl,pxp.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/video/fsl,pxp.txt 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/Documentation/devicetree/bindings/video/fsl,pxp.txt 2015-10-12 10:56:17.951351168 +0200
-@@ -0,0 +1,30 @@
-+* Freescale PxP Controller for i.MX6DL, i.MX6SL
-+
-+Required properties for PxP controller:
-+- compatible: should be "fsl,<soc>-pxp-dma"
-+- reg: <base addr, range> contains pxp register base address and range
-+- interrupts: <type num flag> where type is an interrupt type, num is the
-+ interrupt number and flag is a field that level/trigger information for
-+ the interrupt.
-+- clocks: the clock sources that pxp depends on.
-+- clock-names: the name is related to the clock source
-+
-+Required properties for pxp on specified board:
-+- status: should be set to "okay" if want to use PxP
-+
-+Examples:
-+for SOC imx6dl.dtsi:
-+ pxp@020f0000 {
-+ compatible = "fsl,imx6dl-pxp-dma";
-+ reg = <0x020f0000 0x4000>;
-+ interrupts = <0 98 0x04>;
-+ clocks = <&clks 133>;
-+ clock-names = "pxp-axi";
-+ status = "disabled";
-+ };
-+
-+
-+for board imx6dl-sabresd.dts:
-+ &pxp {
-+ status = "okay";
-+ };
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/video/fsl,v4l2-capture.txt linux-3.14.54/Documentation/devicetree/bindings/video/fsl,v4l2-capture.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/video/fsl,v4l2-capture.txt 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/Documentation/devicetree/bindings/video/fsl,v4l2-capture.txt 2015-10-12 10:56:17.951351168 +0200
-@@ -0,0 +1,102 @@
-+* Freescale V4L2 Capture for i.MX6DQ/i.MX6SDL
-+
-+Required board properties for IPUv3 capture:
-+- clocks: should include the clock provided by i.MX6 to sensor
-+- clock-names: sensor clock's name should be "ipux_csiy"
-+ x should be 1 or 2 for i.MX6DQ; should be 1 for i.MX6SDL
-+ y is 0 or 1 for i.MX6DQ/i.MX6SDL
-+Note: other detailed information for IPUv3, please refer to
-+Documentation/devicetree/bindings/fb/fsl_ipuv3_fb.txt
-+
-+Required properties for v4l2_capture
-+- compatible: should be "fsl,imx6q-v4l2-capture"
-+- ipu_id: ipu id for v4l2 capture device
-+ should be 0 or 1 for i.MX6DQ; should be 0 for i.MX6SDL
-+- csi_id: csi id for v4l2 capture device
-+ should be 0 or 1 for i.MX6DQ/i.MX6SDL
-+- mclk_source: should be 0 or 1. two mclk sources at most now
-+- status: should be set to "okay" to enable this device
-+
-+Required properties for sensor
-+- compatible: "<vendor>,<sensor>"
-+ please check the supported sensor in the Supported Sensor fields.
-+- reg: sensor I2C slave address
-+- pinctrl-names: should be "default" for parallel sensor
-+- pinctrl-0: should depend on the connection between sensor and i.MX
-+ connection between sensor and i.MX could be MIPI-CSI2 or legacy parallel
-+- clocks: should be the clock source provided to sensor.
-+- clock-names: should be "csi_mclk"
-+- DOVDD-supply: set according to the board.
-+- AVDD-supply: set according to the board.
-+- DVDD-supply: set according to the board.
-+- pwn-gpios: set according to the board.
-+- rst-gpios: set according to the board.
-+- csi_id: csi id for v4l2 capture device
-+ should be 0 or 1 for i.MX6DQ/i.MX6SDL.
-+- mclk: should the value of mclk clock send out the sensor. unit is Hz.
-+- mclk_source: should be 0 or 1 and should be the same as the setting in
-+ v4l2_capture.
-+- cvbs: 1 for CVBS input, 0 YPbPr input. This property is only needed for
-+ adv7180 tv decoder.
-+
-+Supported Sensor
-+- ov5640
-+- ov5642
-+- ov5640_mipi
-+- adv7180
-+
-+
-+Example for IPUv3 including capture settings on imx6q-sabresd.dts:
-+ ipu1: ipu@02400000 { /* IPU1 */
-+ compatible = "fsl,imx6q-ipuv3";
-+ reg = <0x02400000 0x400000>;
-+ interrupts = <0 5 0x04>, < 0 6 0x04>;
-+ clocks = <&clks 130>, <&clks 131>, <&clks 132>, <&clks 39>, <&clks 40>, <&clks 169>;
-+ clock-names = "ipu1", "ipu1_di0", "ipu1_di1", "ipu1_di0_sel", "ipu1_di1_sel", "ipu1_csi0";
-+ status = "disabled";
-+ };
-+
-+Examples for v4l2_capture:
-+ v4l2_cap {
-+ compatible = "fsl,imx6q-v4l2-capture";
-+ ipu_id = <0>;
-+ csi_id = <0>;
-+ mclk_source = <0>;
-+ status = "okay";
-+ };
-+
-+Examples for sensors:
-+ ov5642: ov5642@3c {
-+ compatible = "ovti,ov5642";
-+ reg = <0x3c>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_ipu1_2>;
-+ clocks = <&clks 201>;
-+ clock-names = "csi_mclk";
-+ DOVDD-supply = <&vgen4_reg>; /* 1.8v */
-+ AVDD-supply = <&vgen3_reg>; /* 2.8v, on rev C board is VGEN3 */
-+ DVDD-supply = <&vgen2_reg>; /* 1.5v*/
-+ pwn-gpios = <&gpio1 16 1>; /* active low: SD1_DAT0 */
-+ rst-gpios = <&gpio1 17 0>; /* active high: SD1_DAT1 */
-+ csi_id = <0>;
-+ mclk = <24000000>;
-+ mclk_source = <0>;
-+ };
-+
-+ adv7180: adv7180@21 {
-+ compatible = "adv,adv7180";
-+ reg = <0x21>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_ipu1_3>;
-+ clocks = <&clks 201>;
-+ clock-names = "csi_mclk";
-+ DOVDD-supply = <&reg_3p3v>; /* 3.3v, enabled via 2.8 VGEN6 */
-+ AVDD-supply = <&reg_3p3v>; /* 1.8v */
-+ DVDD-supply = <&reg_3p3v>; /* 1.8v */
-+ PVDD-supply = <&reg_3p3v>; /* 1.8v */
-+ pwn-gpios = <&max7310_b 2 0>;
-+ csi_id = <0>;
-+ mclk = <24000000>;
-+ mclk_source = <0>;
-+ cvbs = <1>;
-+ };
-diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/video/mxc_hdmi_video.txt linux-3.14.54/Documentation/devicetree/bindings/video/mxc_hdmi_video.txt
---- linux-3.14.54.orig/Documentation/devicetree/bindings/video/mxc_hdmi_video.txt 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/Documentation/devicetree/bindings/video/mxc_hdmi_video.txt 2015-10-12 10:56:17.952351168 +0200
-@@ -0,0 +1,20 @@
-+Device-Tree bindings for hdmi video driver
-+
-+Required properties:
-+- compatible: value should be "fsl,imx6q-hdmi-video".
-+- fsl,hdcp: define the property in dts, hdmi driver will initalize for hdcp,
-+ otherwise hdcp function will not supported.
-+- fsl,phy_reg_vlev: hdmi phy register,Voltage Level Control Register offset 0x0e,
-+ adjust hdmi phy signal voltage level.
-+- fsl,phy_reg_cksymtx: hdmi phy register, clock symbol and transmitter control
-+ register offset 0x09, adjust hdmi signal pre-emphasis.
-+
-+Example:
-+
-+ hdmi_video {
-+ compatible = "fsl,imx6q-hdmi-video";
-+ fsl,hdcp;
-+ fsl,phy_reg_vlev = <0x0294>;
-+ fsl,phy_reg_cksymtx = <0x800d>;
-+ };
-+
-diff -Nur linux-3.14.54.orig/Documentation/filesystems/hfsplus.txt linux-3.14.54/Documentation/filesystems/hfsplus.txt
---- linux-3.14.54.orig/Documentation/filesystems/hfsplus.txt 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/Documentation/filesystems/hfsplus.txt 2015-10-12 10:56:17.952351168 +0200
-@@ -56,4 +56,4 @@
-
- kernel source: <file:fs/hfsplus>
-
--Apple Technote 1150 http://developer.apple.com/technotes/tn/tn1150.html
-+Apple Technote 1150 https://developer.apple.com/legacy/library/technotes/tn/tn1150.html
-diff -Nur linux-3.14.54.orig/Documentation/kernel-parameters.txt linux-3.14.54/Documentation/kernel-parameters.txt
---- linux-3.14.54.orig/Documentation/kernel-parameters.txt 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/Documentation/kernel-parameters.txt 2015-10-12 10:56:17.953351168 +0200
-@@ -603,8 +603,11 @@
- Also note the kernel might malfunction if you disable
- some critical bits.
-
-- cma=nn[MG] [ARM,KNL]
-- Sets the size of kernel global memory area for contiguous
-+ cma=nn[MG]@[start[MG][-end[MG]]]
-+ [ARM,X86,KNL]
-+ Sets the size of kernel global memory area for
-+ contiguous memory allocations and optionally the
-+ placement constraint by the physical address range of
- memory allocations. For more information, see
- include/linux/dma-contiguous.h
-
-diff -Nur linux-3.14.54.orig/Documentation/networking/gianfar.txt linux-3.14.54/Documentation/networking/gianfar.txt
---- linux-3.14.54.orig/Documentation/networking/gianfar.txt 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/Documentation/networking/gianfar.txt 2015-10-12 10:56:17.954351168 +0200
-@@ -1,38 +1,8 @@
- The Gianfar Ethernet Driver
--Sysfs File description
-
- Author: Andy Fleming <afleming@freescale.com>
- Updated: 2005-07-28
-
--SYSFS
--
--Several of the features of the gianfar driver are controlled
--through sysfs files. These are:
--
--bd_stash:
--To stash RX Buffer Descriptors in the L2, echo 'on' or '1' to
--bd_stash, echo 'off' or '0' to disable
--
--rx_stash_len:
--To stash the first n bytes of the packet in L2, echo the number
--of bytes to buf_stash_len. echo 0 to disable.
--
--WARNING: You could really screw these up if you set them too low or high!
--fifo_threshold:
--To change the number of bytes the controller needs in the
--fifo before it starts transmission, echo the number of bytes to
--fifo_thresh. Range should be 0-511.
--
--fifo_starve:
--When the FIFO has less than this many bytes during a transmit, it
--enters starve mode, and increases the priority of TX memory
--transactions. To change, echo the number of bytes to
--fifo_starve. Range should be 0-511.
--
--fifo_starve_off:
--Once in starve mode, the FIFO remains there until it has this
--many bytes. To change, echo the number of bytes to
--fifo_starve_off. Range should be 0-511.
-
- CHECKSUM OFFLOADING
-
-diff -Nur linux-3.14.54.orig/MAINTAINERS linux-3.14.54/MAINTAINERS
---- linux-3.14.54.orig/MAINTAINERS 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/MAINTAINERS 2015-10-12 10:56:18.221351148 +0200
-@@ -5511,6 +5511,14 @@
- F: drivers/net/macvlan.c
- F: include/linux/if_macvlan.h
-
-+MAILBOX API
-+M: Jassi Brar <jassisinghbrar@gmail.com>
-+L: linux-kernel@vger.kernel.org
-+S: Maintained
-+F: drivers/mailbox/
-+F: include/linux/mailbox_client.h
-+F: include/linux/mailbox_controller.h
-+
- MAN-PAGES: MANUAL PAGES FOR LINUX -- Sections 2, 3, 4, 5, and 7
- M: Michael Kerrisk <mtk.manpages@gmail.com>
- W: http://www.kernel.org/doc/man-pages
-diff -Nur linux-3.14.54.orig/arch/arm/Kconfig linux-3.14.54/arch/arm/Kconfig
---- linux-3.14.54.orig/arch/arm/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/Kconfig 2015-10-12 10:56:17.851351175 +0200
-@@ -1216,19 +1216,6 @@
- register of the Cortex-A9 which reduces the linefill issuing
- capabilities of the processor.
-
--config PL310_ERRATA_588369
-- bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
-- depends on CACHE_L2X0
-- help
-- The PL310 L2 cache controller implements three types of Clean &
-- Invalidate maintenance operations: by Physical Address
-- (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
-- They are architecturally defined to behave as the execution of a
-- clean operation followed immediately by an invalidate operation,
-- both performing to the same memory location. This functionality
-- is not correctly implemented in PL310 as clean lines are not
-- invalidated as a result of these operations.
--
- config ARM_ERRATA_643719
- bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
- depends on CPU_V7 && SMP
-@@ -1251,17 +1238,6 @@
- tables. The workaround changes the TLB flushing routines to invalidate
- entries regardless of the ASID.
-
--config PL310_ERRATA_727915
-- bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
-- depends on CACHE_L2X0
-- help
-- PL310 implements the Clean & Invalidate by Way L2 cache maintenance
-- operation (offset 0x7FC). This operation runs in background so that
-- PL310 can handle normal accesses while it is in progress. Under very
-- rare circumstances, due to this erratum, write data can be lost when
-- PL310 treats a cacheable write transaction during a Clean &
-- Invalidate by Way operation.
--
- config ARM_ERRATA_743622
- bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
- depends on CPU_V7
-@@ -1287,21 +1263,6 @@
- operation is received by a CPU before the ICIALLUIS has completed,
- potentially leading to corrupted entries in the cache or TLB.
-
--config PL310_ERRATA_753970
-- bool "PL310 errata: cache sync operation may be faulty"
-- depends on CACHE_PL310
-- help
-- This option enables the workaround for the 753970 PL310 (r3p0) erratum.
--
-- Under some condition the effect of cache sync operation on
-- the store buffer still remains when the operation completes.
-- This means that the store buffer is always asked to drain and
-- this prevents it from merging any further writes. The workaround
-- is to replace the normal offset of cache sync operation (0x730)
-- by another offset targeting an unmapped PL310 register 0x740.
-- This has the same effect as the cache sync operation: store buffer
-- drain and waiting for all buffers empty.
--
- config ARM_ERRATA_754322
- bool "ARM errata: possible faulty MMU translations following an ASID switch"
- depends on CPU_V7
-@@ -1350,18 +1311,6 @@
- relevant cache maintenance functions and sets a specific bit
- in the diagnostic control register of the SCU.
-
--config PL310_ERRATA_769419
-- bool "PL310 errata: no automatic Store Buffer drain"
-- depends on CACHE_L2X0
-- help
-- On revisions of the PL310 prior to r3p2, the Store Buffer does
-- not automatically drain. This can cause normal, non-cacheable
-- writes to be retained when the memory system is idle, leading
-- to suboptimal I/O performance for drivers using coherent DMA.
-- This option adds a write barrier to the cpu_idle loop so that,
-- on systems with an outer cache, the store buffer is drained
-- explicitly.
--
- config ARM_ERRATA_775420
- bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
- depends on CPU_V7
-@@ -1391,6 +1340,29 @@
- loop buffer may deliver incorrect instructions. This
- workaround disables the loop buffer to avoid the erratum.
-
-+config ARM_ERRATA_794072
-+ bool "ARM errata: A short loop including a DMB instruction might cause a denial of service"
-+ depends on CPU_V7 && SMP
-+ help
-+ This option enables the workaround for the 794072 Cortex-A9
-+ (all revisions). A processor which continuously executes a short
-+ loop containing a DMB instruction might prevent a CP15 operation
-+ broadcast by another processor making further progress, causing
-+ a denial of service. This erratum can be worked around by setting
-+ bit[4] of the undocumented Diagnostic Control Register to 1.
-+
-+config ARM_ERRATA_761320
-+ bool "Full cache line writes to the same memory region from at least two processors might deadlock processor"
-+ depends on CPU_V7 && SMP
-+ help
-+ This option enables the workaround for the 761320 Cortex-A9 (r0..r3).
-+ Under very rare circumstances, full cache line writes
-+ from (at least) 2 processors on cache lines in hazard with
-+ other requests may cause arbitration issues in the SCU,
-+ leading to processor deadlock. This erratum can be
-+ worked around by setting bit[21] of the undocumented
-+ Diagnostic Control Register to 1.
-+
- endmenu
-
- source "arch/arm/common/Kconfig"
-@@ -1835,6 +1807,7 @@
- range 11 64 if ARCH_SHMOBILE_LEGACY
- default "12" if SOC_AM33XX
- default "9" if SA1111 || ARCH_EFM32
-+ default "14" if ARCH_MXC
- default "11"
- help
- The kernel memory allocator divides physically contiguous memory
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/Makefile linux-3.14.54/arch/arm/boot/dts/Makefile
---- linux-3.14.54.orig/arch/arm/boot/dts/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/Makefile 2015-10-12 10:56:17.838351176 +0200
-@@ -154,16 +154,37 @@
- imx53-qsb.dtb \
- imx53-smd.dtb \
- imx6dl-cubox-i.dtb \
-+ imx6dl-dfi-fs700-m60.dtb \
-+ imx6dl-gw51xx.dtb \
-+ imx6dl-gw52xx.dtb \
-+ imx6dl-gw53xx.dtb \
-+ imx6dl-gw54xx.dtb \
- imx6dl-hummingboard.dtb \
-+ imx6dl-nitrogen6x.dtb \
-+ imx6dl-phytec-pbab01.dtb \
- imx6dl-sabreauto.dtb \
-+ imx6dl-sabrelite.dtb \
- imx6dl-sabresd.dtb \
-+ imx6dl-sabresd-hdcp.dtb \
- imx6dl-wandboard.dtb \
- imx6q-arm2.dtb \
-+ imx6q-cm-fx6.dtb \
- imx6q-cubox-i.dtb \
-+ imx6q-hummingboard.dtb \
-+ imx6q-dfi-fs700-m60.dtb \
-+ imx6q-dmo-edmqmx6.dtb \
-+ imx6q-gk802.dtb \
-+ imx6q-gw51xx.dtb \
-+ imx6q-gw52xx.dtb \
-+ imx6q-gw53xx.dtb \
-+ imx6q-gw5400-a.dtb \
-+ imx6q-gw54xx.dtb \
-+ imx6q-nitrogen6x.dtb \
- imx6q-phytec-pbab01.dtb \
- imx6q-sabreauto.dtb \
- imx6q-sabrelite.dtb \
- imx6q-sabresd.dtb \
-+ imx6q-sabresd-hdcp.dtb \
- imx6q-sbc6x.dtb \
- imx6q-udoo.dtb \
- imx6q-wandboard.dtb \
-@@ -312,7 +333,14 @@
- dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
- vexpress-v2p-ca9.dtb \
- vexpress-v2p-ca15-tc1.dtb \
-- vexpress-v2p-ca15_a7.dtb
-+ vexpress-v2p-ca15_a7.dtb \
-+ rtsm_ve-cortex_a9x2.dtb \
-+ rtsm_ve-cortex_a9x4.dtb \
-+ rtsm_ve-cortex_a15x1.dtb \
-+ rtsm_ve-cortex_a15x2.dtb \
-+ rtsm_ve-cortex_a15x4.dtb \
-+ rtsm_ve-v2p-ca15x1-ca7x1.dtb \
-+ rtsm_ve-v2p-ca15x4-ca7x4.dtb
- dtb-$(CONFIG_ARCH_VIRT) += xenvm-4.2.dtb
- dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
- wm8505-ref.dtb \
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/clcd-panels.dtsi linux-3.14.54/arch/arm/boot/dts/clcd-panels.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/clcd-panels.dtsi 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/clcd-panels.dtsi 2015-10-12 10:56:17.808351179 +0200
++++ linux-3.14.54/arch/arm/boot/dts/clcd-panels.dtsi 2015-10-15 15:51:16.341241885 +0200
@@ -0,0 +1,52 @@
+/*
+ * ARM Ltd. Versatile Express
@@ -1452,7 +56,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/clcd-panels.dtsi linux-3.14.54/ar
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/efm32gg-dk3750.dts linux-3.14.54/arch/arm/boot/dts/efm32gg-dk3750.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/efm32gg-dk3750.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/efm32gg-dk3750.dts 2015-10-12 10:56:17.808351179 +0200
++++ linux-3.14.54/arch/arm/boot/dts/efm32gg-dk3750.dts 2015-10-15 15:51:16.341241885 +0200
@@ -26,7 +26,7 @@
};
@@ -1464,7 +68,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/efm32gg-dk3750.dts linux-3.14.54/
temp@48 {
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx23.dtsi linux-3.14.54/arch/arm/boot/dts/imx23.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx23.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx23.dtsi 2015-10-12 10:56:17.808351179 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx23.dtsi 2015-10-15 15:51:20.932939644 +0200
@@ -363,7 +363,8 @@
compatible = "fsl,imx23-lcdif";
reg = <0x80030000 2000>;
@@ -1475,23 +79,9 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx23.dtsi linux-3.14.54/arch/arm
status = "disabled";
};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx25-karo-tx25.dts linux-3.14.54/arch/arm/boot/dts/imx25-karo-tx25.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx25-karo-tx25.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx25-karo-tx25.dts 2015-10-12 10:56:17.809351179 +0200
-@@ -16,6 +16,10 @@
- model = "Ka-Ro TX25";
- compatible = "karo,imx25-tx25", "fsl,imx25";
-
-+ chosen {
-+ stdout-path = &uart1;
-+ };
-+
- memory {
- reg = <0x80000000 0x02000000 0x90000000 0x02000000>;
- };
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx25.dtsi linux-3.14.54/arch/arm/boot/dts/imx25.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx25.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx25.dtsi 2015-10-12 10:56:17.809351179 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx25.dtsi 2015-10-15 15:51:20.932939644 +0200
@@ -13,6 +13,7 @@
/ {
@@ -1508,9 +98,23 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx25.dtsi linux-3.14.54/arch/arm
clock-frequency = <24000000>;
};
};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx25-karo-tx25.dts linux-3.14.54/arch/arm/boot/dts/imx25-karo-tx25.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx25-karo-tx25.dts 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx25-karo-tx25.dts 2015-10-15 15:51:20.932939644 +0200
+@@ -16,6 +16,10 @@
+ model = "Ka-Ro TX25";
+ compatible = "karo,imx25-tx25", "fsl,imx25";
+
++ chosen {
++ stdout-path = &uart1;
++ };
++
+ memory {
+ reg = <0x80000000 0x02000000 0x90000000 0x02000000>;
+ };
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx27-apf27.dts linux-3.14.54/arch/arm/boot/dts/imx27-apf27.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx27-apf27.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx27-apf27.dts 2015-10-12 10:56:17.810351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx27-apf27.dts 2015-10-15 15:51:20.932939644 +0200
@@ -29,6 +29,7 @@
osc26m {
@@ -1519,23 +123,9 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx27-apf27.dts linux-3.14.54/arc
clock-frequency = <0>;
};
};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts linux-3.14.54/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts 2015-10-12 10:56:17.810351178 +0200
-@@ -15,6 +15,10 @@
- model = "Phytec pca100 rapid development kit";
- compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";
-
-+ chosen {
-+ stdout-path = &uart1;
-+ };
-+
- display: display {
- model = "Primeview-PD050VL1";
- native-mode = <&timing0>;
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx27.dtsi linux-3.14.54/arch/arm/boot/dts/imx27.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx27.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx27.dtsi 2015-10-12 10:56:17.810351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx27.dtsi 2015-10-15 15:51:20.932939644 +0200
@@ -13,6 +13,7 @@
/ {
@@ -1552,9 +142,23 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx27.dtsi linux-3.14.54/arch/arm
clock-frequency = <26000000>;
};
};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts linux-3.14.54/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts 2015-10-15 15:51:20.932939644 +0200
+@@ -15,6 +15,10 @@
+ model = "Phytec pca100 rapid development kit";
+ compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";
+
++ chosen {
++ stdout-path = &uart1;
++ };
++
+ display: display {
+ model = "Primeview-PD050VL1";
+ native-mode = <&timing0>;
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx28.dtsi linux-3.14.54/arch/arm/boot/dts/imx28.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx28.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx28.dtsi 2015-10-12 10:56:17.811351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx28.dtsi 2015-10-15 15:51:20.932939644 +0200
@@ -840,7 +840,8 @@
compatible = "fsl,imx28-lcdif";
reg = <0x80030000 0x2000>;
@@ -1567,7 +171,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx28.dtsi linux-3.14.54/arch/arm
status = "disabled";
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx51-babbage.dts linux-3.14.54/arch/arm/boot/dts/imx51-babbage.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx51-babbage.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx51-babbage.dts 2015-10-12 10:56:17.811351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx51-babbage.dts 2015-10-15 15:51:20.932939644 +0200
@@ -17,6 +17,10 @@
model = "Freescale i.MX51 Babbage Board";
compatible = "fsl,imx51-babbage", "fsl,imx51";
@@ -1581,7 +185,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx51-babbage.dts linux-3.14.54/a
};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx51.dtsi linux-3.14.54/arch/arm/boot/dts/imx51.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx51.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx51.dtsi 2015-10-12 10:56:17.812351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx51.dtsi 2015-10-15 15:51:21.044932271 +0200
@@ -15,6 +15,7 @@
/ {
@@ -1616,23 +220,9 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx51.dtsi linux-3.14.54/arch/arm
clock-frequency = <24000000>;
};
};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx53-mba53.dts linux-3.14.54/arch/arm/boot/dts/imx53-mba53.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx53-mba53.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx53-mba53.dts 2015-10-12 10:56:17.814351178 +0200
-@@ -25,6 +25,10 @@
- enable-active-low;
- };
-
-+ chosen {
-+ stdout-path = &uart2;
-+ };
-+
- backlight {
- compatible = "pwm-backlight";
- pwms = <&pwm2 0 50000>;
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx53.dtsi linux-3.14.54/arch/arm/boot/dts/imx53.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx53.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx53.dtsi 2015-10-12 10:56:17.813351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx53.dtsi 2015-10-15 15:51:21.044932271 +0200
@@ -15,6 +15,7 @@
/ {
@@ -1667,9 +257,23 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx53.dtsi linux-3.14.54/arch/arm
clock-frequency = <24000000>;
};
};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx53-mba53.dts linux-3.14.54/arch/arm/boot/dts/imx53-mba53.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx53-mba53.dts 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx53-mba53.dts 2015-10-15 15:51:21.044932271 +0200
+@@ -25,6 +25,10 @@
+ enable-active-low;
+ };
+
++ chosen {
++ stdout-path = &uart2;
++ };
++
+ backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm2 0 50000>;
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-dfi-fs700-m60.dts linux-3.14.54/arch/arm/boot/dts/imx6dl-dfi-fs700-m60.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-dfi-fs700-m60.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6dl-dfi-fs700-m60.dts 2015-10-12 10:56:17.815351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6dl-dfi-fs700-m60.dts 2015-10-15 15:51:21.044932271 +0200
@@ -0,0 +1,23 @@
+/*
+ * Copyright 2013 Sascha Hauer <s.hauer@pengutronix.de>
@@ -1694,9 +298,177 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-dfi-fs700-m60.dts linux-3.
+ model = "DFI FS700-M60-6DL i.MX6dl Q7 Board";
+ compatible = "dfi,fs700-m60-6dl", "dfi,fs700e-m60", "fsl,imx6dl";
+};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl.dtsi linux-3.14.54/arch/arm/boot/dts/imx6dl.dtsi
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl.dtsi 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6dl.dtsi 2015-10-15 15:51:21.044932271 +0200
+@@ -8,6 +8,7 @@
+ *
+ */
+
++#include <dt-bindings/interrupt-controller/irq.h>
+ #include "imx6dl-pinfunc.h"
+ #include "imx6qdl.dtsi"
+
+@@ -21,6 +22,26 @@
+ device_type = "cpu";
+ reg = <0>;
+ next-level-cache = <&L2>;
++ operating-points = <
++ /* kHz uV */
++ 996000 1275000
++ 792000 1175000
++ 396000 1075000
++ >;
++ fsl,soc-operating-points = <
++ /* ARM kHz SOC-PU uV */
++ 996000 1175000
++ 792000 1175000
++ 396000 1175000
++ >;
++ clock-latency = <61036>; /* two CLK32 periods */
++ clocks = <&clks 104>, <&clks 6>, <&clks 16>,
++ <&clks 17>, <&clks 170>;
++ clock-names = "arm", "pll2_pfd2_396m", "step",
++ "pll1_sw", "pll1_sys";
++ arm-supply = <&reg_arm>;
++ pu-supply = <&reg_pu>;
++ soc-supply = <&reg_soc>;
+ };
+
+ cpu@1 {
+@@ -32,40 +53,124 @@
+ };
+
+ soc {
++
++ busfreq { /* BUSFREQ */
++ compatible = "fsl,imx6_busfreq";
++ clocks = <&clks 171>, <&clks 6>, <&clks 11>, <&clks 104>, <&clks 172>, <&clks 58>,
++ <&clks 18>, <&clks 60>, <&clks 20>, <&clks 3>, <&clks 22> , <&clks 8>;
++ clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm", "pll3_usb_otg", "periph",
++ "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", "axi_sel", "pll3_pfd1_540m";
++ interrupts = <0 107 0x04>, <0 112 0x4>;
++ interrupt-names = "irq_busfreq_0", "irq_busfreq_1";
++ fsl,max_ddr_freq = <400000000>;
++ };
++
++ gpu@00130000 {
++ compatible = "fsl,imx6dl-gpu", "fsl,imx6q-gpu";
++ reg = <0x00130000 0x4000>, <0x00134000 0x4000>,
++ <0x0 0x0>;
++ reg-names = "iobase_3d", "iobase_2d",
++ "phys_baseaddr";
++ interrupts = <0 9 0x04>, <0 10 0x04>;
++ interrupt-names = "irq_3d", "irq_2d";
++ clocks = <&clks 143>, <&clks 27>,
++ <&clks 121>, <&clks 122>,
++ <&clks 0>;
++ clock-names = "gpu2d_axi_clk", "gpu3d_axi_clk",
++ "gpu2d_clk", "gpu3d_clk",
++ "gpu3d_shader_clk";
++ resets = <&src 0>, <&src 3>;
++ reset-names = "gpu3d", "gpu2d";
++ pu-supply = <&reg_pu>;
++ };
++
+ ocram: sram@00900000 {
+ compatible = "mmio-sram";
+ reg = <0x00900000 0x20000>;
+ clocks = <&clks 142>;
+ };
+
++ hdmi_core: hdmi_core@00120000 {
++ compatible = "fsl,imx6dl-hdmi-core";
++ reg = <0x00120000 0x9000>;
++ clocks = <&clks 124>, <&clks 123>;
++ clock-names = "hdmi_isfr", "hdmi_iahb";
++ status = "disabled";
++ };
++
++ hdmi_video: hdmi_video@020e0000 {
++ compatible = "fsl,imx6dl-hdmi-video";
++ reg = <0x020e0000 0x1000>;
++ reg-names = "hdmi_gpr";
++ interrupts = <0 115 0x04>;
++ clocks = <&clks 124>, <&clks 123>;
++ clock-names = "hdmi_isfr", "hdmi_iahb";
++ status = "disabled";
++ };
++
++ hdmi_audio: hdmi_audio@00120000 {
++ compatible = "fsl,imx6dl-hdmi-audio";
++ clocks = <&clks 124>, <&clks 123>;
++ clock-names = "hdmi_isfr", "hdmi_iahb";
++ dmas = <&sdma 2 23 0>;
++ dma-names = "tx";
++ status = "disabled";
++ };
++
++ hdmi_cec: hdmi_cec@00120000 {
++ compatible = "fsl,imx6dl-hdmi-cec";
++ interrupts = <0 115 0x04>;
++ status = "disabled";
++ };
++
+ aips1: aips-bus@02000000 {
++ vpu@02040000 {
++ iramsize = <0>;
++ status = "okay";
++ };
++
+ iomuxc: iomuxc@020e0000 {
+ compatible = "fsl,imx6dl-iomuxc";
+ };
+
+ pxp: pxp@020f0000 {
++ compatible = "fsl,imx6dl-pxp-dma";
+ reg = <0x020f0000 0x4000>;
+- interrupts = <0 98 0x04>;
++ interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clks 133>;
++ clock-names = "pxp-axi";
++ status = "disabled";
+ };
+
+ epdc: epdc@020f4000 {
+ reg = <0x020f4000 0x4000>;
+- interrupts = <0 97 0x04>;
++ interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ lcdif: lcdif@020f8000 {
+ reg = <0x020f8000 0x4000>;
+- interrupts = <0 39 0x04>;
++ interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
+ aips2: aips-bus@02100000 {
++ mipi_dsi: mipi@021e0000 {
++ compatible = "fsl,imx6dl-mipi-dsi";
++ reg = <0x021e0000 0x4000>;
++ interrupts = <0 102 0x04>;
++ gpr = <&gpr>;
++ clocks = <&clks 138>, <&clks 209>;
++ clock-names = "mipi_pllref_clk", "mipi_cfg_clk";
++ status = "disabled";
++ };
++
+ i2c4: i2c@021f8000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+- compatible = "fsl,imx1-i2c";
++ compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
+ reg = <0x021f8000 0x4000>;
+- interrupts = <0 35 0x04>;
++ interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clks 116>;
+ status = "disabled";
+ };
+ };
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-gw51xx.dts linux-3.14.54/arch/arm/boot/dts/imx6dl-gw51xx.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-gw51xx.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6dl-gw51xx.dts 2015-10-12 10:56:17.817351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6dl-gw51xx.dts 2015-10-15 15:51:21.044932271 +0200
@@ -0,0 +1,19 @@
+/*
+ * Copyright 2013 Gateworks Corporation
@@ -1719,7 +491,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-gw51xx.dts linux-3.14.54/a
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-gw52xx.dts linux-3.14.54/arch/arm/boot/dts/imx6dl-gw52xx.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-gw52xx.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6dl-gw52xx.dts 2015-10-12 10:56:17.817351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6dl-gw52xx.dts 2015-10-15 15:51:21.044932271 +0200
@@ -0,0 +1,19 @@
+/*
+ * Copyright 2013 Gateworks Corporation
@@ -1742,7 +514,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-gw52xx.dts linux-3.14.54/a
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-gw53xx.dts linux-3.14.54/arch/arm/boot/dts/imx6dl-gw53xx.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-gw53xx.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6dl-gw53xx.dts 2015-10-12 10:56:17.817351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6dl-gw53xx.dts 2015-10-15 15:51:21.044932271 +0200
@@ -0,0 +1,19 @@
+/*
+ * Copyright 2013 Gateworks Corporation
@@ -1765,7 +537,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-gw53xx.dts linux-3.14.54/a
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-gw54xx.dts linux-3.14.54/arch/arm/boot/dts/imx6dl-gw54xx.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-gw54xx.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6dl-gw54xx.dts 2015-10-12 10:56:17.817351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6dl-gw54xx.dts 2015-10-15 15:51:21.044932271 +0200
@@ -0,0 +1,19 @@
+/*
+ * Copyright 2013 Gateworks Corporation
@@ -1788,7 +560,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-gw54xx.dts linux-3.14.54/a
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-hummingboard.dts linux-3.14.54/arch/arm/boot/dts/imx6dl-hummingboard.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-hummingboard.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6dl-hummingboard.dts 2015-10-12 10:56:17.818351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6dl-hummingboard.dts 2015-10-15 15:51:21.044932271 +0200
@@ -1,163 +1,13 @@
/*
- * Copyright (C) 2013,2014 Russell King
@@ -1960,7 +732,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-hummingboard.dts linux-3.1
};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-nitrogen6x.dts linux-3.14.54/arch/arm/boot/dts/imx6dl-nitrogen6x.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-nitrogen6x.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6dl-nitrogen6x.dts 2015-10-12 10:56:17.818351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6dl-nitrogen6x.dts 2015-10-15 15:51:21.044932271 +0200
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2013 Boundary Devices, Inc.
@@ -1985,7 +757,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-nitrogen6x.dts linux-3.14.
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-phytec-pbab01.dts linux-3.14.54/arch/arm/boot/dts/imx6dl-phytec-pbab01.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-phytec-pbab01.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6dl-phytec-pbab01.dts 2015-10-12 10:56:17.818351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6dl-phytec-pbab01.dts 2015-10-15 15:51:21.048932008 +0200
@@ -0,0 +1,19 @@
+/*
+ * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
@@ -2008,7 +780,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-phytec-pbab01.dts linux-3.
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi linux-3.14.54/arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi 2015-10-12 10:56:17.818351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi 2015-10-15 15:51:21.048932008 +0200
@@ -0,0 +1,22 @@
+/*
+ * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
@@ -2034,7 +806,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi linux-3
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-pinfunc.h linux-3.14.54/arch/arm/boot/dts/imx6dl-pinfunc.h
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-pinfunc.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6dl-pinfunc.h 2015-10-12 10:56:17.819351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6dl-pinfunc.h 2015-10-15 15:51:21.048932008 +0200
@@ -755,6 +755,7 @@
#define MX6QDL_PAD_GPIO_5__I2C3_SCL 0x230 0x600 0x878 0x6 0x2
#define MX6QDL_PAD_GPIO_5__ARM_EVENTI 0x230 0x600 0x000 0x7 0x0
@@ -2053,7 +825,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-pinfunc.h linux-3.14.54/ar
#define MX6QDL_PAD_SD1_CMD__SD1_CMD 0x2e0 0x6c8 0x000 0x0 0x0
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-sabreauto.dts linux-3.14.54/arch/arm/boot/dts/imx6dl-sabreauto.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-sabreauto.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6dl-sabreauto.dts 2015-10-12 10:56:17.819351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6dl-sabreauto.dts 2015-10-15 15:51:21.048932008 +0200
@@ -15,3 +15,16 @@
model = "Freescale i.MX6 DualLite/Solo SABRE Automotive Board";
compatible = "fsl,imx6dl-sabreauto", "fsl,imx6dl";
@@ -2073,7 +845,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-sabreauto.dts linux-3.14.5
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-sabrelite.dts linux-3.14.54/arch/arm/boot/dts/imx6dl-sabrelite.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-sabrelite.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6dl-sabrelite.dts 2015-10-12 10:56:17.820351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6dl-sabrelite.dts 2015-10-15 15:51:21.048932008 +0200
@@ -0,0 +1,20 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
@@ -2095,32 +867,9 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-sabrelite.dts linux-3.14.5
+ model = "Freescale i.MX6 DualLite SABRE Lite Board";
+ compatible = "fsl,imx6dl-sabrelite", "fsl,imx6dl";
+};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-sabresd-hdcp.dts linux-3.14.54/arch/arm/boot/dts/imx6dl-sabresd-hdcp.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-sabresd-hdcp.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6dl-sabresd-hdcp.dts 2015-10-12 10:56:17.820351178 +0200
-@@ -0,0 +1,19 @@
-+/*
-+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ */
-+
-+#include "imx6dl-sabresd.dts"
-+
-+&hdmi_video {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_hdmi_hdcp>;
-+ fsl,hdcp;
-+};
-+
-+&i2c2 {
-+ status = "disable";
-+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-sabresd.dts linux-3.14.54/arch/arm/boot/dts/imx6dl-sabresd.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-sabresd.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6dl-sabresd.dts 2015-10-12 10:56:17.820351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6dl-sabresd.dts 2015-10-15 15:51:21.048932008 +0200
@@ -15,3 +15,20 @@
model = "Freescale i.MX6 DualLite SABRE Smart Device Board";
compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl";
@@ -2142,213 +891,32 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-sabresd.dts linux-3.14.54/
+&mxcfb2 {
+ status = "okay";
+};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl.dtsi linux-3.14.54/arch/arm/boot/dts/imx6dl.dtsi
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6dl.dtsi 2015-10-12 10:56:17.816351178 +0200
-@@ -8,6 +8,7 @@
- *
- */
-
-+#include <dt-bindings/interrupt-controller/irq.h>
- #include "imx6dl-pinfunc.h"
- #include "imx6qdl.dtsi"
-
-@@ -21,6 +22,26 @@
- device_type = "cpu";
- reg = <0>;
- next-level-cache = <&L2>;
-+ operating-points = <
-+ /* kHz uV */
-+ 996000 1275000
-+ 792000 1175000
-+ 396000 1075000
-+ >;
-+ fsl,soc-operating-points = <
-+ /* ARM kHz SOC-PU uV */
-+ 996000 1175000
-+ 792000 1175000
-+ 396000 1175000
-+ >;
-+ clock-latency = <61036>; /* two CLK32 periods */
-+ clocks = <&clks 104>, <&clks 6>, <&clks 16>,
-+ <&clks 17>, <&clks 170>;
-+ clock-names = "arm", "pll2_pfd2_396m", "step",
-+ "pll1_sw", "pll1_sys";
-+ arm-supply = <&reg_arm>;
-+ pu-supply = <&reg_pu>;
-+ soc-supply = <&reg_soc>;
- };
-
- cpu@1 {
-@@ -32,40 +53,124 @@
- };
-
- soc {
-+
-+ busfreq { /* BUSFREQ */
-+ compatible = "fsl,imx6_busfreq";
-+ clocks = <&clks 171>, <&clks 6>, <&clks 11>, <&clks 104>, <&clks 172>, <&clks 58>,
-+ <&clks 18>, <&clks 60>, <&clks 20>, <&clks 3>, <&clks 22> , <&clks 8>;
-+ clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm", "pll3_usb_otg", "periph",
-+ "periph_pre", "periph_clk2", "periph_clk2_sel", "osc", "axi_sel", "pll3_pfd1_540m";
-+ interrupts = <0 107 0x04>, <0 112 0x4>;
-+ interrupt-names = "irq_busfreq_0", "irq_busfreq_1";
-+ fsl,max_ddr_freq = <400000000>;
-+ };
-+
-+ gpu@00130000 {
-+ compatible = "fsl,imx6dl-gpu", "fsl,imx6q-gpu";
-+ reg = <0x00130000 0x4000>, <0x00134000 0x4000>,
-+ <0x0 0x0>;
-+ reg-names = "iobase_3d", "iobase_2d",
-+ "phys_baseaddr";
-+ interrupts = <0 9 0x04>, <0 10 0x04>;
-+ interrupt-names = "irq_3d", "irq_2d";
-+ clocks = <&clks 143>, <&clks 27>,
-+ <&clks 121>, <&clks 122>,
-+ <&clks 0>;
-+ clock-names = "gpu2d_axi_clk", "gpu3d_axi_clk",
-+ "gpu2d_clk", "gpu3d_clk",
-+ "gpu3d_shader_clk";
-+ resets = <&src 0>, <&src 3>;
-+ reset-names = "gpu3d", "gpu2d";
-+ pu-supply = <&reg_pu>;
-+ };
-+
- ocram: sram@00900000 {
- compatible = "mmio-sram";
- reg = <0x00900000 0x20000>;
- clocks = <&clks 142>;
- };
-
-+ hdmi_core: hdmi_core@00120000 {
-+ compatible = "fsl,imx6dl-hdmi-core";
-+ reg = <0x00120000 0x9000>;
-+ clocks = <&clks 124>, <&clks 123>;
-+ clock-names = "hdmi_isfr", "hdmi_iahb";
-+ status = "disabled";
-+ };
-+
-+ hdmi_video: hdmi_video@020e0000 {
-+ compatible = "fsl,imx6dl-hdmi-video";
-+ reg = <0x020e0000 0x1000>;
-+ reg-names = "hdmi_gpr";
-+ interrupts = <0 115 0x04>;
-+ clocks = <&clks 124>, <&clks 123>;
-+ clock-names = "hdmi_isfr", "hdmi_iahb";
-+ status = "disabled";
-+ };
-+
-+ hdmi_audio: hdmi_audio@00120000 {
-+ compatible = "fsl,imx6dl-hdmi-audio";
-+ clocks = <&clks 124>, <&clks 123>;
-+ clock-names = "hdmi_isfr", "hdmi_iahb";
-+ dmas = <&sdma 2 23 0>;
-+ dma-names = "tx";
-+ status = "disabled";
-+ };
-+
-+ hdmi_cec: hdmi_cec@00120000 {
-+ compatible = "fsl,imx6dl-hdmi-cec";
-+ interrupts = <0 115 0x04>;
-+ status = "disabled";
-+ };
-+
- aips1: aips-bus@02000000 {
-+ vpu@02040000 {
-+ iramsize = <0>;
-+ status = "okay";
-+ };
-+
- iomuxc: iomuxc@020e0000 {
- compatible = "fsl,imx6dl-iomuxc";
- };
-
- pxp: pxp@020f0000 {
-+ compatible = "fsl,imx6dl-pxp-dma";
- reg = <0x020f0000 0x4000>;
-- interrupts = <0 98 0x04>;
-+ interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clks 133>;
-+ clock-names = "pxp-axi";
-+ status = "disabled";
- };
-
- epdc: epdc@020f4000 {
- reg = <0x020f4000 0x4000>;
-- interrupts = <0 97 0x04>;
-+ interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- lcdif: lcdif@020f8000 {
- reg = <0x020f8000 0x4000>;
-- interrupts = <0 39 0x04>;
-+ interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
-
- aips2: aips-bus@02100000 {
-+ mipi_dsi: mipi@021e0000 {
-+ compatible = "fsl,imx6dl-mipi-dsi";
-+ reg = <0x021e0000 0x4000>;
-+ interrupts = <0 102 0x04>;
-+ gpr = <&gpr>;
-+ clocks = <&clks 138>, <&clks 209>;
-+ clock-names = "mipi_pllref_clk", "mipi_cfg_clk";
-+ status = "disabled";
-+ };
-+
- i2c4: i2c@021f8000 {
- #address-cells = <1>;
- #size-cells = <0>;
-- compatible = "fsl,imx1-i2c";
-+ compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
- reg = <0x021f8000 0x4000>;
-- interrupts = <0 35 0x04>;
-+ interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clks 116>;
- status = "disabled";
- };
- };
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-arm2-hsic.dts linux-3.14.54/arch/arm/boot/dts/imx6q-arm2-hsic.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-arm2-hsic.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-arm2-hsic.dts 2015-10-12 10:56:17.821351178 +0200
-@@ -0,0 +1,32 @@
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-sabresd-hdcp.dts linux-3.14.54/arch/arm/boot/dts/imx6dl-sabresd-hdcp.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6dl-sabresd-hdcp.dts 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm/boot/dts/imx6dl-sabresd-hdcp.dts 2015-10-15 15:51:21.048932008 +0200
+@@ -0,0 +1,19 @@
+/*
-+ * Copyright 2013 Freescale Semiconductor, Inc.
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
++ * Copyright (C) 2013 Freescale Semiconductor, Inc.
+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
+ */
+
-+#include "imx6q-arm2.dts"
-+
-+&fec {
-+ status = "disabled";
-+};
++#include "imx6dl-sabresd.dts"
+
-+&usbh2 {
-+ pinctrl-names = "idle", "active";
-+ pinctrl-0 = <&pinctrl_usbh2_1>;
-+ pinctrl-1 = <&pinctrl_usbh2_2>;
-+ osc-clkgate-delay = <0x3>;
-+ status = "okay";
++&hdmi_video {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_hdmi_hdcp>;
++ fsl,hdcp;
+};
+
-+&usbh3 {
-+ pinctrl-names = "idle", "active";
-+ pinctrl-0 = <&pinctrl_usbh3_1>;
-+ pinctrl-1 = <&pinctrl_usbh3_2>;
-+ osc-clkgate-delay = <0x3>;
-+ status = "okay";
++&i2c2 {
++ status = "disable";
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-arm2.dts linux-3.14.54/arch/arm/boot/dts/imx6q-arm2.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-arm2.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-arm2.dts 2015-10-12 10:56:17.821351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-arm2.dts 2015-10-15 15:51:21.048932008 +0200
@@ -23,14 +23,27 @@
regulators {
@@ -2559,9 +1127,45 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-arm2.dts linux-3.14.54/arch
+ pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-arm2-hsic.dts linux-3.14.54/arch/arm/boot/dts/imx6q-arm2-hsic.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-arm2-hsic.dts 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-arm2-hsic.dts 2015-10-15 15:51:21.052931747 +0200
+@@ -0,0 +1,32 @@
++/*
++ * Copyright 2013 Freescale Semiconductor, Inc.
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#include "imx6q-arm2.dts"
++
++&fec {
++ status = "disabled";
++};
++
++&usbh2 {
++ pinctrl-names = "idle", "active";
++ pinctrl-0 = <&pinctrl_usbh2_1>;
++ pinctrl-1 = <&pinctrl_usbh2_2>;
++ osc-clkgate-delay = <0x3>;
++ status = "okay";
++};
++
++&usbh3 {
++ pinctrl-names = "idle", "active";
++ pinctrl-0 = <&pinctrl_usbh3_1>;
++ pinctrl-1 = <&pinctrl_usbh3_2>;
++ osc-clkgate-delay = <0x3>;
++ status = "okay";
++};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-cm-fx6.dts linux-3.14.54/arch/arm/boot/dts/imx6q-cm-fx6.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-cm-fx6.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-cm-fx6.dts 2015-10-12 10:56:17.821351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-cm-fx6.dts 2015-10-15 15:51:21.052931747 +0200
@@ -0,0 +1,107 @@
+/*
+ * Copyright 2013 CompuLab Ltd.
@@ -2672,7 +1276,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-cm-fx6.dts linux-3.14.54/ar
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-cubox-i.dts linux-3.14.54/arch/arm/boot/dts/imx6q-cubox-i.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-cubox-i.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-cubox-i.dts 2015-10-12 10:56:17.822351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-cubox-i.dts 2015-10-15 15:51:21.052931747 +0200
@@ -13,4 +13,8 @@
&sata {
@@ -2684,7 +1288,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-cubox-i.dts linux-3.14.54/a
};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-dfi-fs700-m60.dts linux-3.14.54/arch/arm/boot/dts/imx6q-dfi-fs700-m60.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-dfi-fs700-m60.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-dfi-fs700-m60.dts 2015-10-12 10:56:17.822351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-dfi-fs700-m60.dts 2015-10-15 15:51:21.052931747 +0200
@@ -0,0 +1,23 @@
+/*
+ * Copyright 2013 Sascha Hauer <s.hauer@pengutronix.de>
@@ -2709,2252 +1313,9 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-dfi-fs700-m60.dts linux-3.1
+ model = "DFI FS700-M60-6QD i.MX6qd Q7 Board";
+ compatible = "dfi,fs700-m60-6qd", "dfi,fs700e-m60", "fsl,imx6q";
+};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts linux-3.14.54/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts 2015-10-12 10:56:17.832351177 +0200
-@@ -0,0 +1,432 @@
-+/*
-+ * Copyright 2013 Data Modul AG
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+/dts-v1/;
-+
-+#include <dt-bindings/gpio/gpio.h>
-+#include "imx6q.dtsi"
-+
-+/ {
-+ model = "Data Modul eDM-QMX6 Board";
-+ compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q";
-+
-+ chosen {
-+ stdout-path = &uart2;
-+ };
-+
-+ aliases {
-+ gpio7 = &stmpe_gpio1;
-+ gpio8 = &stmpe_gpio2;
-+ stmpe-i2c0 = &stmpe1;
-+ stmpe-i2c1 = &stmpe2;
-+ };
-+
-+ memory {
-+ reg = <0x10000000 0x80000000>;
-+ };
-+
-+ regulators {
-+ compatible = "simple-bus";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ reg_3p3v: regulator@0 {
-+ compatible = "regulator-fixed";
-+ reg = <0>;
-+ regulator-name = "3P3V";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+
-+ reg_usb_otg_switch: regulator@1 {
-+ compatible = "regulator-fixed";
-+ reg = <1>;
-+ regulator-name = "usb_otg_switch";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ gpio = <&gpio7 12 0>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ reg_usb_host1: regulator@2 {
-+ compatible = "regulator-fixed";
-+ reg = <2>;
-+ regulator-name = "usb_host1_en";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ gpio = <&gpio3 31 0>;
-+ enable-active-high;
-+ };
-+ };
-+
-+ gpio-leds {
-+ compatible = "gpio-leds";
-+
-+ led-blue {
-+ label = "blue";
-+ gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>;
-+ linux,default-trigger = "heartbeat";
-+ };
-+
-+ led-green {
-+ label = "green";
-+ gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>;
-+ };
-+
-+ led-pink {
-+ label = "pink";
-+ gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>;
-+ };
-+
-+ led-red {
-+ label = "red";
-+ gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>;
-+ };
-+ };
-+};
-+
-+&ecspi5 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_ecspi5>;
-+ fsl,spi-num-chipselects = <1>;
-+ cs-gpios = <&gpio1 12 0>;
-+ status = "okay";
-+
-+ flash: m25p80@0 {
-+ compatible = "m25p80";
-+ spi-max-frequency = <40000000>;
-+ reg = <0>;
-+ };
-+};
-+
-+&fec {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_enet>;
-+ phy-mode = "rgmii";
-+ phy-reset-gpios = <&gpio3 23 0>;
-+ phy-supply = <&vgen2_1v2_eth>;
-+ status = "okay";
-+};
-+
-+&i2c2 {
-+ clock-frequency = <100000>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c2
-+ &pinctrl_stmpe1
-+ &pinctrl_stmpe2
-+ &pinctrl_pfuze>;
-+ status = "okay";
-+
-+ pmic: pfuze100@08 {
-+ compatible = "fsl,pfuze100";
-+ reg = <0x08>;
-+ interrupt-parent = <&gpio3>;
-+ interrupts = <20 8>;
-+
-+ regulators {
-+ sw1a_reg: sw1ab {
-+ regulator-min-microvolt = <300000>;
-+ regulator-max-microvolt = <1875000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw1c_reg: sw1c {
-+ regulator-min-microvolt = <300000>;
-+ regulator-max-microvolt = <1875000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw2_reg: sw2 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw3a_reg: sw3a {
-+ regulator-min-microvolt = <400000>;
-+ regulator-max-microvolt = <1975000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw3b_reg: sw3b {
-+ regulator-min-microvolt = <400000>;
-+ regulator-max-microvolt = <1975000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw4_reg: sw4 {
-+ regulator-min-microvolt = <400000>;
-+ regulator-max-microvolt = <1975000>;
-+ regulator-always-on;
-+ };
-+
-+ swbst_reg: swbst {
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5150000>;
-+ regulator-always-on;
-+ };
-+
-+ snvs_reg: vsnvs {
-+ regulator-min-microvolt = <1000000>;
-+ regulator-max-microvolt = <3000000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ vref_reg: vrefddr {
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ vgen1_reg: vgen1 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <1550000>;
-+ };
-+
-+ vgen2_1v2_eth: vgen2 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <1550000>;
-+ };
-+
-+ vdd_high_in: vgen3 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ vgen4_reg: vgen4 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+
-+ vgen5_reg: vgen5 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+
-+ vgen6_reg: vgen6 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+ };
-+ };
-+
-+ stmpe1: stmpe1601@40 {
-+ compatible = "st,stmpe1601";
-+ reg = <0x40>;
-+ interrupts = <30 0>;
-+ interrupt-parent = <&gpio3>;
-+ vcc-supply = <&sw2_reg>;
-+ vio-supply = <&sw2_reg>;
-+
-+ stmpe_gpio1: stmpe_gpio {
-+ #gpio-cells = <2>;
-+ compatible = "st,stmpe-gpio";
-+ };
-+ };
-+
-+ stmpe2: stmpe1601@44 {
-+ compatible = "st,stmpe1601";
-+ reg = <0x44>;
-+ interrupts = <2 0>;
-+ interrupt-parent = <&gpio5>;
-+ vcc-supply = <&sw2_reg>;
-+ vio-supply = <&sw2_reg>;
-+
-+ stmpe_gpio2: stmpe_gpio {
-+ #gpio-cells = <2>;
-+ compatible = "st,stmpe-gpio";
-+ };
-+ };
-+
-+ temp1: ad7414@4c {
-+ compatible = "ad,ad7414";
-+ reg = <0x4c>;
-+ };
-+
-+ temp2: ad7414@4d {
-+ compatible = "ad,ad7414";
-+ reg = <0x4d>;
-+ };
-+
-+ rtc: m41t62@68 {
-+ compatible = "stm,m41t62";
-+ reg = <0x68>;
-+ };
-+};
-+
-+&iomuxc {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_hog>;
-+
-+ imx6q-dmo-edmqmx6 {
-+ pinctrl_hog: hoggrp {
-+ fsl,pins = <
-+ MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000
-+ MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000
-+ >;
-+ };
-+
-+ pinctrl_ecspi5: ecspi5rp-1 {
-+ fsl,pins = <
-+ MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x80000000
-+ MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x80000000
-+ MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x80000000
-+ MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x80000000
-+ >;
-+ };
-+
-+ pinctrl_enet: enetgrp {
-+ fsl,pins = <
-+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
-+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
-+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
-+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
-+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
-+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
-+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
-+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
-+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
-+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
-+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
-+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
-+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
-+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
-+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
-+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
-+ >;
-+ };
-+
-+ pinctrl_i2c2: i2c2grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
-+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
-+ >;
-+ };
-+
-+ pinctrl_pfuze: pfuze100grp1 {
-+ fsl,pins = <
-+ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000
-+ >;
-+ };
-+
-+ pinctrl_stmpe1: stmpe1grp {
-+ fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>;
-+ };
-+
-+ pinctrl_stmpe2: stmpe2grp {
-+ fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>;
-+ };
-+
-+ pinctrl_uart1: uart1grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
-+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
-+ >;
-+ };
-+
-+ pinctrl_uart2: uart2grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
-+ MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
-+ >;
-+ };
-+
-+ pinctrl_usbotg: usbotggrp {
-+ fsl,pins = <
-+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
-+ >;
-+ };
-+
-+ pinctrl_usdhc3: usdhc3grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
-+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
-+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
-+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
-+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
-+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
-+ >;
-+ };
-+
-+ pinctrl_usdhc4: usdhc4grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
-+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
-+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
-+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
-+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
-+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
-+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
-+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
-+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
-+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
-+ >;
-+ };
-+ };
-+};
-+
-+&sata {
-+ status = "okay";
-+};
-+
-+&uart1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_uart1>;
-+ status = "okay";
-+};
-+
-+&uart2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_uart2>;
-+ status = "okay";
-+};
-+
-+&usbh1 {
-+ vbus-supply = <&reg_usb_host1>;
-+ disable-over-current;
-+ dr_mode = "host";
-+ status = "okay";
-+};
-+
-+&usbotg {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usbotg>;
-+ disable-over-current;
-+ status = "okay";
-+};
-+
-+&usdhc3 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usdhc3>;
-+ vmmc-supply = <&reg_3p3v>;
-+ status = "okay";
-+};
-+
-+&usdhc4 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usdhc4>;
-+ vmmc-supply = <&reg_3p3v>;
-+ non-removable;
-+ bus-width = <8>;
-+ status = "okay";
-+};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gk802.dts linux-3.14.54/arch/arm/boot/dts/imx6q-gk802.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gk802.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-gk802.dts 2015-10-12 10:56:17.833351177 +0200
-@@ -0,0 +1,229 @@
-+/*
-+ * Copyright (C) 2013 Philipp Zabel
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2. This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+/dts-v1/;
-+#include "imx6q.dtsi"
-+
-+/ {
-+ model = "Zealz GK802";
-+ compatible = "zealz,imx6q-gk802", "fsl,imx6q";
-+
-+ aliases {
-+ mxcfb0 = &mxcfb1;
-+ };
-+
-+ chosen {
-+ stdout-path = &uart4;
-+ };
-+
-+ memory {
-+ reg = <0x10000000 0x40000000>;
-+ };
-+
-+ regulators {
-+ compatible = "simple-bus";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ reg_3p3v: regulator@0 {
-+ compatible = "regulator-fixed";
-+ reg = <0>;
-+ regulator-name = "3P3V";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+
-+ reg_usb_h1_vbus: usb_h1_vbus {
-+ compatible = "regulator-fixed";
-+ regulator-name = "usb_h1_vbus";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ gpio = <&gpio2 0 0>;
-+ };
-+ };
-+
-+ gpio-keys {
-+ compatible = "gpio-keys";
-+
-+ recovery-button {
-+ label = "recovery";
-+ gpios = <&gpio3 16 1>;
-+ linux,code = <0x198>; /* KEY_RESTART */
-+ gpio-key,wakeup;
-+ };
-+
-+ };
-+
-+ sound-hdmi {
-+ compatible = "fsl,imx6q-audio-hdmi",
-+ "fsl,imx-audio-hdmi";
-+ model = "imx-audio-hdmi";
-+ hdmi-controller = <&hdmi_audio>;
-+ };
-+
-+ mxcfb1: fb@0 {
-+ compatible = "fsl,mxc_sdc_fb";
-+ disp_dev = "hdmi";
-+ interface_pix_fmt = "RGB24";
-+ mode_str ="1920x1080M@60";
-+ default_bpp = <32>;
-+ int_clk = <0>;
-+ late_init = <0>;
-+ status = "okay";
-+ };
-+};
-+
-+&hdmi_core {
-+ ipu_id = <0>;
-+ disp_id = <0>;
-+ status = "okay";
-+};
-+
-+&hdmi_video {
-+ fsl,phy_reg_vlev = <0x0294>;
-+ fsl,phy_reg_cksymtx = <0x800d>;
-+ status = "okay";
-+};
-+
-+&hdmi_audio {
-+ status = "okay";
-+};
-+
-+
-+/* Internal I2C */
-+&i2c2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c2>;
-+ clock-frequency = <100000>;
-+ status = "okay";
-+
-+ /* SDMC DM2016 1024 bit EEPROM + 128 bit OTP */
-+ eeprom: dm2016@51 {
-+ compatible = "sdmc,dm2016";
-+ reg = <0x51>;
-+ };
-+};
-+
-+/* External I2C via HDMI */
-+&i2c3 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c3>;
-+ clock-frequency = <100000>;
-+ status = "okay";
-+
-+ ddc: imx6_hdmi_i2c@50 {
-+ compatible = "fsl,imx6-hdmi-i2c";
-+ reg = <0x50>;
-+ };
-+};
-+
-+&iomuxc {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_hog>;
-+
-+ imx6q-gk802 {
-+ pinctrl_hog: hoggrp {
-+ fsl,pins = <
-+ /* Recovery button, active-low */
-+ MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x100b1
-+ /* RTL8192CU enable GPIO, active-low */
-+ MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
-+ >;
-+ };
-+
-+ pinctrl_i2c2: i2c2grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
-+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
-+ >;
-+ };
-+
-+ pinctrl_i2c3: i2c3grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
-+ MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
-+ >;
-+ };
-+
-+ pinctrl_uart4: uart4grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
-+ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
-+ >;
-+ };
-+
-+ pinctrl_usdhc3: usdhc3grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
-+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
-+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
-+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
-+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
-+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
-+ >;
-+ };
-+
-+ pinctrl_usdhc4: usdhc4grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
-+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
-+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
-+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
-+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
-+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
-+ >;
-+ };
-+ };
-+};
-+
-+&uart2 {
-+ status = "okay";
-+};
-+
-+&uart4 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_uart4>;
-+ status = "okay";
-+};
-+
-+/* External USB-A port (USBOTG) */
-+&usbotg {
-+ phy_type = "utmi";
-+ dr_mode = "host";
-+ disable-over-current;
-+ status = "okay";
-+};
-+
-+/* Internal USB port (USBH1), connected to RTL8192CU */
-+&usbh1 {
-+ phy_type = "utmi";
-+ dr_mode = "host";
-+ vbus-supply = <&reg_usb_h1_vbus>;
-+ disable-over-current;
-+ status = "okay";
-+};
-+
-+/* External microSD */
-+&usdhc3 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usdhc3>;
-+ bus-width = <4>;
-+ cd-gpios = <&gpio6 11 0>;
-+ vmmc-supply = <&reg_3p3v>;
-+ status = "okay";
-+};
-+
-+/* Internal microSD */
-+&usdhc4 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usdhc4>;
-+ bus-width = <4>;
-+ vmmc-supply = <&reg_3p3v>;
-+ status = "okay";
-+};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw51xx.dts linux-3.14.54/arch/arm/boot/dts/imx6q-gw51xx.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw51xx.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-gw51xx.dts 2015-10-12 10:56:17.833351177 +0200
-@@ -0,0 +1,19 @@
-+/*
-+ * Copyright 2013 Gateworks Corporation
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+/dts-v1/;
-+#include "imx6q.dtsi"
-+#include "imx6qdl-gw54xx.dtsi"
-+
-+/ {
-+ model = "Gateworks Ventana i.MX6 Quad GW51XX";
-+ compatible = "gw,imx6q-gw51xx", "gw,ventana", "fsl,imx6q";
-+};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw52xx.dts linux-3.14.54/arch/arm/boot/dts/imx6q-gw52xx.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw52xx.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-gw52xx.dts 2015-10-12 10:56:17.833351177 +0200
-@@ -0,0 +1,23 @@
-+/*
-+ * Copyright 2013 Gateworks Corporation
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+/dts-v1/;
-+#include "imx6q.dtsi"
-+#include "imx6qdl-gw52xx.dtsi"
-+
-+/ {
-+ model = "Gateworks Ventana i.MX6 Quad GW52XX";
-+ compatible = "gw,imx6q-gw52xx", "gw,ventana", "fsl,imx6q";
-+};
-+
-+&sata {
-+ status = "okay";
-+};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw53xx.dts linux-3.14.54/arch/arm/boot/dts/imx6q-gw53xx.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw53xx.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-gw53xx.dts 2015-10-12 10:56:17.833351177 +0200
-@@ -0,0 +1,23 @@
-+/*
-+ * Copyright 2013 Gateworks Corporation
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+/dts-v1/;
-+#include "imx6q.dtsi"
-+#include "imx6qdl-gw53xx.dtsi"
-+
-+/ {
-+ model = "Gateworks Ventana i.MX6 Quad GW53XX";
-+ compatible = "gw,imx6q-gw53xx", "gw,ventana", "fsl,imx6q";
-+};
-+
-+&sata {
-+ status = "okay";
-+};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw5400-a.dts linux-3.14.54/arch/arm/boot/dts/imx6q-gw5400-a.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw5400-a.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-gw5400-a.dts 2015-10-12 10:56:17.833351177 +0200
-@@ -0,0 +1,543 @@
-+/*
-+ * Copyright 2013 Gateworks Corporation
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+/dts-v1/;
-+#include "imx6q.dtsi"
-+
-+/ {
-+ model = "Gateworks Ventana GW5400-A";
-+ compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
-+
-+ /* these are used by bootloader for disabling nodes */
-+ aliases {
-+ ethernet0 = &fec;
-+ ethernet1 = &eth1;
-+ i2c0 = &i2c1;
-+ i2c1 = &i2c2;
-+ i2c2 = &i2c3;
-+ led0 = &led0;
-+ led1 = &led1;
-+ led2 = &led2;
-+ sky2 = &eth1;
-+ ssi0 = &ssi1;
-+ spi0 = &ecspi1;
-+ usb0 = &usbh1;
-+ usb1 = &usbotg;
-+ usdhc2 = &usdhc3;
-+ };
-+
-+ chosen {
-+ bootargs = "console=ttymxc1,115200";
-+ };
-+
-+ leds {
-+ compatible = "gpio-leds";
-+
-+ led0: user1 {
-+ label = "user1";
-+ gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
-+ default-state = "on";
-+ linux,default-trigger = "heartbeat";
-+ };
-+
-+ led1: user2 {
-+ label = "user2";
-+ gpios = <&gpio4 10 0>; /* 106 -> MX6_PANLEDR */
-+ default-state = "off";
-+ };
-+
-+ led2: user3 {
-+ label = "user3";
-+ gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
-+ default-state = "off";
-+ };
-+ };
-+
-+ memory {
-+ reg = <0x10000000 0x40000000>;
-+ };
-+
-+ pps {
-+ compatible = "pps-gpio";
-+ gpios = <&gpio1 5 0>;
-+ status = "okay";
-+ };
-+
-+ regulators {
-+ compatible = "simple-bus";
-+ #address-cells = <1>;
-+ #size-cells = <0>;
-+
-+ reg_1p0v: regulator@0 {
-+ compatible = "regulator-fixed";
-+ reg = <0>;
-+ regulator-name = "1P0V";
-+ regulator-min-microvolt = <1000000>;
-+ regulator-max-microvolt = <1000000>;
-+ regulator-always-on;
-+ };
-+
-+ reg_3p3v: regulator@1 {
-+ compatible = "regulator-fixed";
-+ reg = <1>;
-+ regulator-name = "3P3V";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+
-+ reg_usb_h1_vbus: regulator@2 {
-+ compatible = "regulator-fixed";
-+ reg = <2>;
-+ regulator-name = "usb_h1_vbus";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ regulator-always-on;
-+ };
-+
-+ reg_usb_otg_vbus: regulator@3 {
-+ compatible = "regulator-fixed";
-+ reg = <3>;
-+ regulator-name = "usb_otg_vbus";
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5000000>;
-+ gpio = <&gpio3 22 0>;
-+ enable-active-high;
-+ };
-+ };
-+
-+ sound {
-+ compatible = "fsl,imx6q-sabrelite-sgtl5000",
-+ "fsl,imx-audio-sgtl5000";
-+ model = "imx6q-sabrelite-sgtl5000";
-+ ssi-controller = <&ssi1>;
-+ audio-codec = <&codec>;
-+ audio-routing =
-+ "MIC_IN", "Mic Jack",
-+ "Mic Jack", "Mic Bias",
-+ "Headphone Jack", "HP_OUT";
-+ mux-int-port = <1>;
-+ mux-ext-port = <4>;
-+ };
-+};
-+
-+&audmux {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_audmux>;
-+ status = "okay";
-+};
-+
-+&ecspi1 {
-+ fsl,spi-num-chipselects = <1>;
-+ cs-gpios = <&gpio3 19 0>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_ecspi1>;
-+ status = "okay";
-+
-+ flash: m25p80@0 {
-+ compatible = "sst,w25q256";
-+ spi-max-frequency = <30000000>;
-+ reg = <0>;
-+ };
-+};
-+
-+&fec {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_enet>;
-+ phy-mode = "rgmii";
-+ phy-reset-gpios = <&gpio1 30 0>;
-+ status = "okay";
-+};
-+
-+&i2c1 {
-+ clock-frequency = <100000>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c1>;
-+ status = "okay";
-+
-+ eeprom1: eeprom@50 {
-+ compatible = "atmel,24c02";
-+ reg = <0x50>;
-+ pagesize = <16>;
-+ };
-+
-+ eeprom2: eeprom@51 {
-+ compatible = "atmel,24c02";
-+ reg = <0x51>;
-+ pagesize = <16>;
-+ };
-+
-+ eeprom3: eeprom@52 {
-+ compatible = "atmel,24c02";
-+ reg = <0x52>;
-+ pagesize = <16>;
-+ };
-+
-+ eeprom4: eeprom@53 {
-+ compatible = "atmel,24c02";
-+ reg = <0x53>;
-+ pagesize = <16>;
-+ };
-+
-+ gpio: pca9555@23 {
-+ compatible = "nxp,pca9555";
-+ reg = <0x23>;
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+ };
-+
-+ hwmon: gsc@29 {
-+ compatible = "gw,gsp";
-+ reg = <0x29>;
-+ };
-+
-+ rtc: ds1672@68 {
-+ compatible = "dallas,ds1672";
-+ reg = <0x68>;
-+ };
-+};
-+
-+&i2c2 {
-+ clock-frequency = <100000>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c2>;
-+ status = "okay";
-+
-+ pmic: pfuze100@08 {
-+ compatible = "fsl,pfuze100";
-+ reg = <0x08>;
-+
-+ regulators {
-+ sw1a_reg: sw1ab {
-+ regulator-min-microvolt = <300000>;
-+ regulator-max-microvolt = <1875000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ regulator-ramp-delay = <6250>;
-+ };
-+
-+ sw1c_reg: sw1c {
-+ regulator-min-microvolt = <300000>;
-+ regulator-max-microvolt = <1875000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ regulator-ramp-delay = <6250>;
-+ };
-+
-+ sw2_reg: sw2 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <3950000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw3a_reg: sw3a {
-+ regulator-min-microvolt = <400000>;
-+ regulator-max-microvolt = <1975000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw3b_reg: sw3b {
-+ regulator-min-microvolt = <400000>;
-+ regulator-max-microvolt = <1975000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ sw4_reg: sw4 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+
-+ swbst_reg: swbst {
-+ regulator-min-microvolt = <5000000>;
-+ regulator-max-microvolt = <5150000>;
-+ };
-+
-+ snvs_reg: vsnvs {
-+ regulator-min-microvolt = <1000000>;
-+ regulator-max-microvolt = <3000000>;
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ vref_reg: vrefddr {
-+ regulator-boot-on;
-+ regulator-always-on;
-+ };
-+
-+ vgen1_reg: vgen1 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <1550000>;
-+ };
-+
-+ vgen2_reg: vgen2 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <1550000>;
-+ };
-+
-+ vgen3_reg: vgen3 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ };
-+
-+ vgen4_reg: vgen4 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+
-+ vgen5_reg: vgen5 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+
-+ vgen6_reg: vgen6 {
-+ regulator-min-microvolt = <1800000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ };
-+ };
-+ };
-+
-+ pciswitch: pex8609@3f {
-+ compatible = "plx,pex8609";
-+ reg = <0x3f>;
-+ };
-+
-+ pciclkgen: si52147@6b {
-+ compatible = "sil,si52147";
-+ reg = <0x6b>;
-+ };
-+};
-+
-+&i2c3 {
-+ clock-frequency = <100000>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c3>;
-+ status = "okay";
-+
-+ accelerometer: mma8450@1c {
-+ compatible = "fsl,mma8450";
-+ reg = <0x1c>;
-+ };
-+
-+ codec: sgtl5000@0a {
-+ compatible = "fsl,sgtl5000";
-+ reg = <0x0a>;
-+ clocks = <&clks 201>;
-+ VDDA-supply = <&sw4_reg>;
-+ VDDIO-supply = <&reg_3p3v>;
-+ };
-+
-+ hdmiin: adv7611@4c {
-+ compatible = "adi,adv7611";
-+ reg = <0x4c>;
-+ };
-+
-+ touchscreen: egalax_ts@04 {
-+ compatible = "eeti,egalax_ts";
-+ reg = <0x04>;
-+ interrupt-parent = <&gpio7>;
-+ interrupts = <12 2>; /* gpio7_12 active low */
-+ wakeup-gpios = <&gpio7 12 0>;
-+ };
-+
-+ videoout: adv7393@2a {
-+ compatible = "adi,adv7393";
-+ reg = <0x2a>;
-+ };
-+
-+ videoin: adv7180@20 {
-+ compatible = "adi,adv7180";
-+ reg = <0x20>;
-+ };
-+};
-+
-+&iomuxc {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_hog>;
-+
-+ imx6q-gw5400-a {
-+ pinctrl_hog: hoggrp {
-+ fsl,pins = <
-+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
-+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */
-+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
-+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
-+ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
-+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 /* GPS_PPS */
-+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
-+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
-+ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* user2 led */
-+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
-+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */
-+ MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */
-+ >;
-+ };
-+
-+ pinctrl_audmux: audmuxgrp {
-+ fsl,pins = <
-+ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
-+ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
-+ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
-+ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
-+ >;
-+ };
-+
-+ pinctrl_ecspi1: ecspi1grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
-+ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
-+ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
-+ >;
-+ };
-+
-+ pinctrl_enet: enetgrp {
-+ fsl,pins = <
-+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
-+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
-+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
-+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
-+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
-+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
-+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
-+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
-+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
-+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
-+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
-+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
-+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
-+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
-+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
-+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
-+ >;
-+ };
-+
-+ pinctrl_i2c1: i2c1grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
-+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
-+ >;
-+ };
-+
-+ pinctrl_i2c2: i2c2grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
-+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
-+ >;
-+ };
-+
-+ pinctrl_i2c3: i2c3grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
-+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
-+ >;
-+ };
-+
-+ pinctrl_uart1: uart1grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
-+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
-+ >;
-+ };
-+
-+ pinctrl_uart2: uart2grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
-+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
-+ >;
-+ };
-+
-+ pinctrl_uart5: uart5grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
-+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
-+ >;
-+ };
-+
-+ pinctrl_usbotg: usbotggrp {
-+ fsl,pins = <
-+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
-+ >;
-+ };
-+
-+ pinctrl_usdhc3: usdhc3grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
-+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
-+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
-+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
-+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
-+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
-+ >;
-+ };
-+ };
-+};
-+
-+&ldb {
-+ status = "okay";
-+};
-+
-+&pcie {
-+ reset-gpio = <&gpio1 29 0>;
-+ status = "okay";
-+
-+ eth1: sky2@8 { /* MAC/PHY on bus 8 */
-+ compatible = "marvell,sky2";
-+ };
-+};
-+
-+&ssi1 {
-+ fsl,mode = "i2s-slave";
-+ status = "okay";
-+};
-+
-+&uart1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_uart1>;
-+ status = "okay";
-+};
-+
-+&uart2 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_uart2>;
-+ status = "okay";
-+};
-+
-+&uart5 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_uart5>;
-+ status = "okay";
-+};
-+
-+&usbotg {
-+ vbus-supply = <&reg_usb_otg_vbus>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usbotg>;
-+ disable-over-current;
-+ status = "okay";
-+};
-+
-+&usbh1 {
-+ vbus-supply = <&reg_usb_h1_vbus>;
-+ status = "okay";
-+};
-+
-+&usdhc3 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_usdhc3>;
-+ cd-gpios = <&gpio7 0 0>;
-+ vmmc-supply = <&reg_3p3v>;
-+ status = "okay";
-+};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw54xx.dts linux-3.14.54/arch/arm/boot/dts/imx6q-gw54xx.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw54xx.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-gw54xx.dts 2015-10-12 10:56:17.833351177 +0200
-@@ -0,0 +1,23 @@
-+/*
-+ * Copyright 2013 Gateworks Corporation
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+/dts-v1/;
-+#include "imx6q.dtsi"
-+#include "imx6qdl-gw54xx.dtsi"
-+
-+/ {
-+ model = "Gateworks Ventana i.MX6 Quad GW54XX";
-+ compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q";
-+};
-+
-+&sata {
-+ status = "okay";
-+};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-hummingboard.dts linux-3.14.54/arch/arm/boot/dts/imx6q-hummingboard.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-hummingboard.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-hummingboard.dts 2015-10-12 10:56:17.833351177 +0200
-@@ -0,0 +1,21 @@
-+/*
-+ * Copyright (C) 2014 Rabeeh Khoury (rabeeh@solid-run.com)
-+ * Based on work by Russell King
-+ */
-+/dts-v1/;
-+
-+#include "imx6q.dtsi"
-+#include "imx6qdl-hummingboard.dtsi"
-+
-+/ {
-+ model = "SolidRun HummingBoard Dual/Quad";
-+ compatible = "solidrun,hummingboard/q", "fsl,imx6q";
-+};
-+
-+&sata {
-+ status = "okay";
-+ fsl,transmit-level-mV = <1104>;
-+ fsl,transmit-boost-mdB = <0>;
-+ fsl,transmit-atten-16ths = <9>;
-+ fsl,no-spread-spectrum;
-+};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-nitrogen6x.dts linux-3.14.54/arch/arm/boot/dts/imx6q-nitrogen6x.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-nitrogen6x.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-nitrogen6x.dts 2015-10-12 10:56:17.834351177 +0200
-@@ -0,0 +1,25 @@
-+/*
-+ * Copyright 2013 Boundary Devices, Inc.
-+ * Copyright 2012 Freescale Semiconductor, Inc.
-+ * Copyright 2011 Linaro Ltd.
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+/dts-v1/;
-+#include "imx6q.dtsi"
-+#include "imx6qdl-nitrogen6x.dtsi"
-+
-+/ {
-+ model = "Freescale i.MX6 Quad Nitrogen6x Board";
-+ compatible = "fsl,imx6q-nitrogen6x", "fsl,imx6q";
-+};
-+
-+&sata {
-+ status = "okay";
-+};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-phytec-pbab01.dts linux-3.14.54/arch/arm/boot/dts/imx6q-phytec-pbab01.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-phytec-pbab01.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-phytec-pbab01.dts 2015-10-12 10:56:17.834351177 +0200
-@@ -11,24 +11,17 @@
-
- /dts-v1/;
- #include "imx6q-phytec-pfla02.dtsi"
-+#include "imx6qdl-phytec-pbab01.dtsi"
-
- / {
- model = "Phytec phyFLEX-i.MX6 Quad Carrier-Board";
- compatible = "phytec,imx6q-pbab01", "phytec,imx6q-pfla02", "fsl,imx6q";
--};
--
--&fec {
-- status = "okay";
--};
--
--&uart4 {
-- status = "okay";
--};
-
--&usdhc2 {
-- status = "okay";
-+ chosen {
-+ stdout-path = &uart4;
-+ };
- };
-
--&usdhc3 {
-- status = "okay";
-+&sata {
-+ status = "okay";
- };
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi linux-3.14.54/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi 2015-10-12 10:56:17.834351177 +0200
-@@ -10,171 +10,13 @@
- */
-
- #include "imx6q.dtsi"
-+#include "imx6qdl-phytec-pfla02.dtsi"
-
- / {
-- model = "Phytec phyFLEX-i.MX6 Ouad";
-+ model = "Phytec phyFLEX-i.MX6 Quad";
- compatible = "phytec,imx6q-pfla02", "fsl,imx6q";
-
- memory {
- reg = <0x10000000 0x80000000>;
- };
- };
--
--&ecspi3 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_ecspi3_1>;
-- status = "okay";
-- fsl,spi-num-chipselects = <1>;
-- cs-gpios = <&gpio4 24 0>;
--
-- flash@0 {
-- compatible = "m25p80";
-- spi-max-frequency = <20000000>;
-- reg = <0>;
-- };
--};
--
--&i2c1 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_i2c1_1>;
-- status = "okay";
--
-- eeprom@50 {
-- compatible = "atmel,24c32";
-- reg = <0x50>;
-- };
--
-- pmic@58 {
-- compatible = "dialog,da9063";
-- reg = <0x58>;
-- interrupt-parent = <&gpio4>;
-- interrupts = <17 0x8>; /* active-low GPIO4_17 */
--
-- regulators {
-- vddcore_reg: bcore1 {
-- regulator-min-microvolt = <730000>;
-- regulator-max-microvolt = <1380000>;
-- regulator-always-on;
-- };
--
-- vddsoc_reg: bcore2 {
-- regulator-min-microvolt = <730000>;
-- regulator-max-microvolt = <1380000>;
-- regulator-always-on;
-- };
--
-- vdd_ddr3_reg: bpro {
-- regulator-min-microvolt = <1500000>;
-- regulator-max-microvolt = <1500000>;
-- regulator-always-on;
-- };
--
-- vdd_3v3_reg: bperi {
-- regulator-min-microvolt = <3300000>;
-- regulator-max-microvolt = <3300000>;
-- regulator-always-on;
-- };
--
-- vdd_buckmem_reg: bmem {
-- regulator-min-microvolt = <3300000>;
-- regulator-max-microvolt = <3300000>;
-- regulator-always-on;
-- };
--
-- vdd_eth_reg: bio {
-- regulator-min-microvolt = <1200000>;
-- regulator-max-microvolt = <1200000>;
-- regulator-always-on;
-- };
--
-- vdd_eth_io_reg: ldo4 {
-- regulator-min-microvolt = <2500000>;
-- regulator-max-microvolt = <2500000>;
-- regulator-always-on;
-- };
--
-- vdd_mx6_snvs_reg: ldo5 {
-- regulator-min-microvolt = <3000000>;
-- regulator-max-microvolt = <3000000>;
-- regulator-always-on;
-- };
--
-- vdd_3v3_pmic_io_reg: ldo6 {
-- regulator-min-microvolt = <3300000>;
-- regulator-max-microvolt = <3300000>;
-- regulator-always-on;
-- };
--
-- vdd_sd0_reg: ldo9 {
-- regulator-min-microvolt = <3300000>;
-- regulator-max-microvolt = <3300000>;
-- };
--
-- vdd_sd1_reg: ldo10 {
-- regulator-min-microvolt = <3300000>;
-- regulator-max-microvolt = <3300000>;
-- };
--
-- vdd_mx6_high_reg: ldo11 {
-- regulator-min-microvolt = <3000000>;
-- regulator-max-microvolt = <3000000>;
-- regulator-always-on;
-- };
-- };
-- };
--};
--
--&iomuxc {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_hog>;
--
-- hog {
-- pinctrl_hog: hoggrp {
-- fsl,pins = <
-- MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
-- MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
-- MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x80000000 /* PMIC interrupt */
-- >;
-- };
-- };
--
-- pfla02 {
-- pinctrl_usdhc3_pfla02: usdhc3grp-pfla02 {
-- fsl,pins = <
-- MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000
-- MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
-- >;
-- };
-- };
--};
--
--&fec {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_enet_3>;
-- phy-mode = "rgmii";
-- phy-reset-gpios = <&gpio3 23 0>;
-- status = "disabled";
--};
--
--&uart4 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_uart4_1>;
-- status = "disabled";
--};
--
--&usdhc2 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_usdhc2_2>;
-- cd-gpios = <&gpio1 4 0>;
-- wp-gpios = <&gpio1 2 0>;
-- status = "disabled";
--};
--
--&usdhc3 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_usdhc3_2
-- &pinctrl_usdhc3_pfla02>;
-- cd-gpios = <&gpio1 27 0>;
-- wp-gpios = <&gpio1 29 0>;
-- status = "disabled";
--};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-pinfunc.h linux-3.14.54/arch/arm/boot/dts/imx6q-pinfunc.h
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-pinfunc.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-pinfunc.h 2015-10-12 10:56:17.834351177 +0200
-@@ -673,6 +673,7 @@
- #define MX6QDL_PAD_GPIO_3__USB_H1_OC 0x22c 0x5fc 0x948 0x6 0x1
- #define MX6QDL_PAD_GPIO_3__MLB_CLK 0x22c 0x5fc 0x900 0x7 0x1
- #define MX6QDL_PAD_GPIO_6__ESAI_TX_CLK 0x230 0x600 0x870 0x0 0x1
-+#define MX6QDL_PAD_GPIO_6__ENET_IRQ 0x230 0x600 0x03c 0x11 0xff000609
- #define MX6QDL_PAD_GPIO_6__I2C3_SDA 0x230 0x600 0x8ac 0x2 0x1
- #define MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x230 0x600 0x000 0x5 0x0
- #define MX6QDL_PAD_GPIO_6__SD2_LCTL 0x230 0x600 0x000 0x6 0x0
-@@ -1024,6 +1025,7 @@
- #define MX6QDL_PAD_SD1_DAT2__WDOG1_RESET_B_DEB 0x34c 0x734 0x000 0x6 0x0
- #define MX6QDL_PAD_SD1_CLK__SD1_CLK 0x350 0x738 0x000 0x0 0x0
- #define MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x350 0x738 0x828 0x1 0x0
-+#define MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x350 0x738 0x000 0x2 0x0
- #define MX6QDL_PAD_SD1_CLK__GPT_CLKIN 0x350 0x738 0x000 0x3 0x0
- #define MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x350 0x738 0x000 0x5 0x0
- #define MX6QDL_PAD_SD2_CLK__SD2_CLK 0x354 0x73c 0x000 0x0 0x0
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sabreauto.dts linux-3.14.54/arch/arm/boot/dts/imx6q-sabreauto.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sabreauto.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-sabreauto.dts 2015-10-12 10:56:17.835351177 +0200
-@@ -20,6 +20,22 @@
- compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
- };
-
-+&mxcfb1 {
-+ status = "okay";
-+};
-+
-+&mxcfb2 {
-+ status = "okay";
-+};
-+
-+&mxcfb3 {
-+ status = "okay";
-+};
-+
-+&mxcfb4 {
-+ status = "okay";
-+};
-+
- &sata {
- status = "okay";
- };
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sabrelite.dts linux-3.14.54/arch/arm/boot/dts/imx6q-sabrelite.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sabrelite.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-sabrelite.dts 2015-10-12 10:56:17.835351177 +0200
-@@ -12,189 +12,13 @@
-
- /dts-v1/;
- #include "imx6q.dtsi"
-+#include "imx6qdl-sabrelite.dtsi"
-
- / {
- model = "Freescale i.MX6 Quad SABRE Lite Board";
- compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
--
-- memory {
-- reg = <0x10000000 0x40000000>;
-- };
--
-- regulators {
-- compatible = "simple-bus";
--
-- reg_2p5v: 2p5v {
-- compatible = "regulator-fixed";
-- regulator-name = "2P5V";
-- regulator-min-microvolt = <2500000>;
-- regulator-max-microvolt = <2500000>;
-- regulator-always-on;
-- };
--
-- reg_3p3v: 3p3v {
-- compatible = "regulator-fixed";
-- regulator-name = "3P3V";
-- regulator-min-microvolt = <3300000>;
-- regulator-max-microvolt = <3300000>;
-- regulator-always-on;
-- };
--
-- reg_usb_otg_vbus: usb_otg_vbus {
-- compatible = "regulator-fixed";
-- regulator-name = "usb_otg_vbus";
-- regulator-min-microvolt = <5000000>;
-- regulator-max-microvolt = <5000000>;
-- gpio = <&gpio3 22 0>;
-- enable-active-high;
-- };
-- };
--
-- sound {
-- compatible = "fsl,imx6q-sabrelite-sgtl5000",
-- "fsl,imx-audio-sgtl5000";
-- model = "imx6q-sabrelite-sgtl5000";
-- ssi-controller = <&ssi1>;
-- audio-codec = <&codec>;
-- audio-routing =
-- "MIC_IN", "Mic Jack",
-- "Mic Jack", "Mic Bias",
-- "Headphone Jack", "HP_OUT";
-- mux-int-port = <1>;
-- mux-ext-port = <4>;
-- };
--};
--
--&audmux {
-- status = "okay";
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_audmux_1>;
--};
--
--&ecspi1 {
-- fsl,spi-num-chipselects = <1>;
-- cs-gpios = <&gpio3 19 0>;
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_ecspi1_1>;
-- status = "okay";
--
-- flash: m25p80@0 {
-- compatible = "sst,sst25vf016b";
-- spi-max-frequency = <20000000>;
-- reg = <0>;
-- };
--};
--
--&fec {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_enet_1>;
-- phy-mode = "rgmii";
-- phy-reset-gpios = <&gpio3 23 0>;
-- status = "okay";
--};
--
--&i2c1 {
-- status = "okay";
-- clock-frequency = <100000>;
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_i2c1_1>;
--
-- codec: sgtl5000@0a {
-- compatible = "fsl,sgtl5000";
-- reg = <0x0a>;
-- clocks = <&clks 201>;
-- VDDA-supply = <&reg_2p5v>;
-- VDDIO-supply = <&reg_3p3v>;
-- };
--};
--
--&iomuxc {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_hog>;
--
-- hog {
-- pinctrl_hog: hoggrp {
-- fsl,pins = <
-- MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
-- MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000
-- MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
-- MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
-- MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
-- MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
-- MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
-- MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
-- MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
-- >;
-- };
-- };
--};
--
--&ldb {
-- status = "okay";
--
-- lvds-channel@0 {
-- fsl,data-mapping = "spwg";
-- fsl,data-width = <18>;
-- status = "okay";
--
-- display-timings {
-- native-mode = <&timing0>;
-- timing0: hsd100pxn1 {
-- clock-frequency = <65000000>;
-- hactive = <1024>;
-- vactive = <768>;
-- hback-porch = <220>;
-- hfront-porch = <40>;
-- vback-porch = <21>;
-- vfront-porch = <7>;
-- hsync-len = <60>;
-- vsync-len = <10>;
-- };
-- };
-- };
- };
-
- &sata {
- status = "okay";
- };
--
--&ssi1 {
-- fsl,mode = "i2s-slave";
-- status = "okay";
--};
--
--&uart2 {
-- status = "okay";
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_uart2_1>;
--};
--
--&usbh1 {
-- status = "okay";
--};
--
--&usbotg {
-- vbus-supply = <&reg_usb_otg_vbus>;
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_usbotg_1>;
-- disable-over-current;
-- status = "okay";
--};
--
--&usdhc3 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_usdhc3_2>;
-- cd-gpios = <&gpio7 0 0>;
-- wp-gpios = <&gpio7 1 0>;
-- vmmc-supply = <&reg_3p3v>;
-- status = "okay";
--};
--
--&usdhc4 {
-- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_usdhc4_2>;
-- cd-gpios = <&gpio2 6 0>;
-- wp-gpios = <&gpio2 7 0>;
-- vmmc-supply = <&reg_3p3v>;
-- status = "okay";
--};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sabresd-hdcp.dts linux-3.14.54/arch/arm/boot/dts/imx6q-sabresd-hdcp.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sabresd-hdcp.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-sabresd-hdcp.dts 2015-10-12 10:56:17.835351177 +0200
-@@ -0,0 +1,23 @@
-+/*
-+ * Copyright 2012-2013 Freescale Semiconductor, Inc.
-+ * Copyright 2011 Linaro Ltd.
-+ *
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+#include "imx6q-sabresd.dts"
-+
-+&hdmi_video {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_hdmi_hdcp>;
-+ fsl,hdcp;
-+};
-+
-+&i2c2 {
-+ status = "disable";
-+};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sabresd.dts linux-3.14.54/arch/arm/boot/dts/imx6q-sabresd.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sabresd.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-sabresd.dts 2015-10-12 10:56:17.835351177 +0200
-@@ -23,3 +23,19 @@
- &sata {
- status = "okay";
- };
-+
-+&mxcfb1 {
-+ status = "okay";
-+};
-+
-+&mxcfb2 {
-+ status = "okay";
-+};
-+
-+&mxcfb3 {
-+ status = "okay";
-+};
-+
-+&mxcfb4 {
-+ status = "okay";
-+};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sbc6x.dts linux-3.14.54/arch/arm/boot/dts/imx6q-sbc6x.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sbc6x.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-sbc6x.dts 2015-10-12 10:56:17.835351177 +0200
-@@ -17,28 +17,78 @@
- };
- };
-
-+
- &fec {
- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_enet_1>;
-+ pinctrl-0 = <&pinctrl_enet>;
- phy-mode = "rgmii";
- status = "okay";
- };
-
-+&iomuxc {
-+ imx6q-sbc6x {
-+ pinctrl_enet: enetgrp {
-+ fsl,pins = <
-+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
-+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
-+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
-+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
-+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
-+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
-+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
-+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
-+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
-+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
-+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
-+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
-+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
-+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
-+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
-+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
-+ >;
-+ };
-+
-+ pinctrl_uart1: uart1grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
-+ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
-+ >;
-+ };
-+
-+ pinctrl_usbotg: usbotggrp {
-+ fsl,pins = <
-+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
-+ >;
-+ };
-+
-+ pinctrl_usdhc3: usdhc3grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
-+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
-+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
-+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
-+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
-+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
-+ >;
-+ };
-+ };
-+};
-+
- &uart1 {
- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_uart1_1>;
-+ pinctrl-0 = <&pinctrl_uart1>;
- status = "okay";
- };
-
- &usbotg {
- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_usbotg_1>;
-+ pinctrl-0 = <&pinctrl_usbotg>;
- disable-over-current;
- status = "okay";
- };
-
- &usdhc3 {
- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_usdhc3_2>;
-+ pinctrl-0 = <&pinctrl_usdhc3>;
- status = "okay";
- };
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-udoo.dts linux-3.14.54/arch/arm/boot/dts/imx6q-udoo.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-udoo.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q-udoo.dts 2015-10-12 10:56:17.835351177 +0200
-@@ -16,24 +16,78 @@
- model = "Udoo i.MX6 Quad Board";
- compatible = "udoo,imx6q-udoo", "fsl,imx6q";
-
-+ chosen {
-+ stdout-path = &uart2;
-+ };
-+
- memory {
- reg = <0x10000000 0x40000000>;
- };
- };
-
-+&fec {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_enet>;
-+ phy-mode = "rgmii";
-+ status = "okay";
-+};
-+
-+&iomuxc {
-+ imx6q-udoo {
-+ pinctrl_enet: enetgrp {
-+ fsl,pins = <
-+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
-+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
-+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
-+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
-+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
-+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
-+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
-+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
-+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
-+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
-+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
-+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
-+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
-+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
-+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
-+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
-+ >;
-+ };
-+
-+ pinctrl_uart2: uart2grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
-+ MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
-+ >;
-+ };
-+
-+ pinctrl_usdhc3: usdhc3grp {
-+ fsl,pins = <
-+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
-+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
-+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
-+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
-+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
-+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
-+ >;
-+ };
-+ };
-+};
-+
- &sata {
- status = "okay";
- };
-
- &uart2 {
- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_uart2_1>;
-+ pinctrl-0 = <&pinctrl_uart2>;
- status = "okay";
- };
-
- &usdhc3 {
- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_usdhc3_2>;
-+ pinctrl-0 = <&pinctrl_usdhc3>;
- non-removable;
- status = "okay";
- };
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q.dtsi linux-3.14.54/arch/arm/boot/dts/imx6q.dtsi
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6q.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6q.dtsi 2015-10-12 10:56:17.832351177 +0200
-@@ -8,10 +8,16 @@
- *
- */
-
-+#include <dt-bindings/interrupt-controller/irq.h>
- #include "imx6q-pinfunc.h"
- #include "imx6qdl.dtsi"
-
- / {
-+ aliases {
-+ ipu1 = &ipu2;
-+ spi4 = &ecspi5;
-+ };
-+
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-@@ -25,8 +31,17 @@
- /* kHz uV */
- 1200000 1275000
- 996000 1250000
-+ 852000 1250000
- 792000 1150000
-- 396000 950000
-+ 396000 975000
-+ >;
-+ fsl,soc-operating-points = <
-+ /* ARM kHz SOC-PU uV */
-+ 1200000 1275000
-+ 996000 1250000
-+ 852000 1250000
-+ 792000 1175000
-+ 396000 1175000
- >;
- clock-latency = <61036>; /* two CLK32 periods */
- clocks = <&clks 104>, <&clks 6>, <&clks 16>,
-@@ -61,12 +76,77 @@
- };
-
- soc {
-+
-+ busfreq { /* BUSFREQ */
-+ compatible = "fsl,imx6_busfreq";
-+ clocks = <&clks 171>, <&clks 6>, <&clks 11>, <&clks 104>, <&clks 172>, <&clks 58>,
-+ <&clks 18>, <&clks 60>, <&clks 20>, <&clks 3>;
-+ clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm", "pll3_usb_otg", "periph",
-+ "periph_pre", "periph_clk2", "periph_clk2_sel", "osc";
-+ interrupts = <0 107 0x04>, <0 112 0x4>, <0 113 0x4>, <0 114 0x4>;
-+ interrupt-names = "irq_busfreq_0", "irq_busfreq_1", "irq_busfreq_2", "irq_busfreq_3";
-+ fsl,max_ddr_freq = <528000000>;
-+ };
-+
-+ gpu@00130000 {
-+ compatible = "fsl,imx6q-gpu";
-+ reg = <0x00130000 0x4000>, <0x00134000 0x4000>,
-+ <0x02204000 0x4000>, <0x0 0x0>;
-+ reg-names = "iobase_3d", "iobase_2d",
-+ "iobase_vg", "phys_baseaddr";
-+ interrupts = <0 9 0x04>, <0 10 0x04>,<0 11 0x04>;
-+ interrupt-names = "irq_3d", "irq_2d", "irq_vg";
-+ clocks = <&clks 26>, <&clks 143>,
-+ <&clks 27>, <&clks 121>,
-+ <&clks 122>, <&clks 74>;
-+ clock-names = "gpu2d_axi_clk", "openvg_axi_clk",
-+ "gpu3d_axi_clk", "gpu2d_clk",
-+ "gpu3d_clk", "gpu3d_shader_clk";
-+ resets = <&src 0>, <&src 3>, <&src 3>;
-+ reset-names = "gpu3d", "gpu2d", "gpuvg";
-+ pu-supply = <&reg_pu>;
-+ };
-+
- ocram: sram@00900000 {
- compatible = "mmio-sram";
- reg = <0x00900000 0x40000>;
- clocks = <&clks 142>;
- };
-
-+ hdmi_core: hdmi_core@00120000 {
-+ compatible = "fsl,imx6q-hdmi-core";
-+ reg = <0x00120000 0x9000>;
-+ clocks = <&clks 124>, <&clks 123>;
-+ clock-names = "hdmi_isfr", "hdmi_iahb";
-+ status = "disabled";
-+ };
-+
-+ hdmi_video: hdmi_video@020e0000 {
-+ compatible = "fsl,imx6q-hdmi-video";
-+ reg = <0x020e0000 0x1000>;
-+ reg-names = "hdmi_gpr";
-+ interrupts = <0 115 0x04>;
-+ clocks = <&clks 124>, <&clks 123>;
-+ clock-names = "hdmi_isfr", "hdmi_iahb";
-+ status = "disabled";
-+ };
-+
-+ hdmi_audio: hdmi_audio@00120000 {
-+ compatible = "fsl,imx6q-hdmi-audio";
-+ clocks = <&clks 124>, <&clks 123>;
-+ clock-names = "hdmi_isfr", "hdmi_iahb";
-+ dmas = <&sdma 2 23 0>;
-+ dma-names = "tx";
-+ status = "disabled";
-+ };
-+
-+ hdmi_cec: hdmi_cec@00120000 {
-+ compatible = "fsl,imx6q-hdmi-cec";
-+ interrupts = <0 115 0x04>;
-+ status = "disabled";
-+ };
-+
-+
- aips-bus@02000000 { /* AIPS1 */
- spba-bus@02000000 {
- ecspi5: ecspi@02018000 {
-@@ -74,13 +154,17 @@
- #size-cells = <0>;
- compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
- reg = <0x02018000 0x4000>;
-- interrupts = <0 35 0x04>;
-+ interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 116>, <&clks 116>;
- clock-names = "ipg", "per";
- status = "disabled";
- };
- };
-
-+ vpu@02040000 {
-+ status = "okay";
-+ };
-+
- iomuxc: iomuxc@020e0000 {
- compatible = "fsl,imx6q-iomuxc";
-
-@@ -122,40 +206,40 @@
- };
- };
-
-+ aips-bus@02100000 { /* AIPS2 */
-+ mipi_dsi: mipi@021e0000 {
-+ compatible = "fsl,imx6q-mipi-dsi";
-+ reg = <0x021e0000 0x4000>;
-+ interrupts = <0 102 0x04>;
-+ gpr = <&gpr>;
-+ clocks = <&clks 138>, <&clks 209>;
-+ clock-names = "mipi_pllref_clk", "mipi_cfg_clk";
-+ status = "disabled";
-+ };
-+ };
-+
- sata: sata@02200000 {
- compatible = "fsl,imx6q-ahci";
- reg = <0x02200000 0x4000>;
-- interrupts = <0 39 0x04>;
-+ interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 154>, <&clks 187>, <&clks 105>;
- clock-names = "sata", "sata_ref", "ahb";
- status = "disabled";
- };
-
- ipu2: ipu@02800000 {
-- #crtc-cells = <1>;
- compatible = "fsl,imx6q-ipu";
- reg = <0x02800000 0x400000>;
-- interrupts = <0 8 0x4 0 7 0x4>;
-- clocks = <&clks 133>, <&clks 134>, <&clks 137>;
-- clock-names = "bus", "di0", "di1";
-+ interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 7 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clks 133>, <&clks 134>, <&clks 137>,
-+ <&clks 41>, <&clks 42>,
-+ <&clks 135>, <&clks 136>;
-+ clock-names = "bus", "di0", "di1",
-+ "di0_sel", "di1_sel",
-+ "ldb_di0", "ldb_di1";
- resets = <&src 4>;
-+ bypass_reset = <0>;
- };
- };
- };
--
--&ldb {
-- clocks = <&clks 33>, <&clks 34>,
-- <&clks 39>, <&clks 40>, <&clks 41>, <&clks 42>,
-- <&clks 135>, <&clks 136>;
-- clock-names = "di0_pll", "di1_pll",
-- "di0_sel", "di1_sel", "di2_sel", "di3_sel",
-- "di0", "di1";
--
-- lvds-channel@0 {
-- crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>;
-- };
--
-- lvds-channel@1 {
-- crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>;
-- };
--};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi 2015-10-12 10:56:17.822351178 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi 2015-10-15 15:51:21.052931747 +0200
@@ -5,11 +5,33 @@
#include "imx6qdl-microsom-ar8035.dtsi"
@@ -5191,7 +1552,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi linux-3.14.5
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi 2015-10-12 10:56:17.824351177 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi 2015-10-15 15:51:21.052931747 +0200
@@ -0,0 +1,199 @@
+/ {
+ regulators {
@@ -5392,9 +1753,1703 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi linux-
+ non-removable;
+ status = "okay";
+};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl.dtsi
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl.dtsi 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl.dtsi 2015-10-15 15:51:21.056931485 +0200
+@@ -10,10 +10,16 @@
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
++#include <dt-bindings/interrupt-controller/arm-gic.h>
++
+ #include "skeleton.dtsi"
++#include <dt-bindings/gpio/gpio.h>
+
+ / {
+ aliases {
++ ethernet0 = &fec;
++ can0 = &can1;
++ can1 = &can2;
+ gpio0 = &gpio1;
+ gpio1 = &gpio2;
+ gpio2 = &gpio3;
+@@ -24,6 +30,11 @@
+ i2c0 = &i2c1;
+ i2c1 = &i2c2;
+ i2c2 = &i2c3;
++ ipu0 = &ipu1;
++ mmc0 = &usdhc1;
++ mmc1 = &usdhc2;
++ mmc2 = &usdhc3;
++ mmc3 = &usdhc4;
+ serial0 = &uart1;
+ serial1 = &uart2;
+ serial2 = &uart3;
+@@ -33,13 +44,13 @@
+ spi1 = &ecspi2;
+ spi2 = &ecspi3;
+ spi3 = &ecspi4;
++ usbphy0 = &usbphy1;
++ usbphy1 = &usbphy2;
+ };
+
+ intc: interrupt-controller@00a01000 {
+ compatible = "arm,cortex-a9-gic";
+ #interrupt-cells = <3>;
+- #address-cells = <1>;
+- #size-cells = <1>;
+ interrupt-controller;
+ reg = <0x00a01000 0x1000>,
+ <0x00a00100 0x100>;
+@@ -51,20 +62,27 @@
+
+ ckil {
+ compatible = "fsl,imx-ckil", "fixed-clock";
++ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
+
+ ckih1 {
+ compatible = "fsl,imx-ckih1", "fixed-clock";
++ #clock-cells = <0>;
+ clock-frequency = <0>;
+ };
+
+ osc {
+ compatible = "fsl,imx-osc", "fixed-clock";
++ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ };
+ };
+
++ pu_dummy: pudummy_reg {
++ compatible = "fsl,imx6-dummy-pureg"; /* only used in ldo-bypass */
++ };
++
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+@@ -75,7 +93,10 @@
+ dma_apbh: dma-apbh@00110000 {
+ compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
+ reg = <0x00110000 0x2000>;
+- interrupts = <0 13 0x04>, <0 13 0x04>, <0 13 0x04>, <0 13 0x04>;
++ interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
++ <0 13 IRQ_TYPE_LEVEL_HIGH>,
++ <0 13 IRQ_TYPE_LEVEL_HIGH>,
++ <0 13 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
+ #dma-cells = <1>;
+ dma-channels = <4>;
+@@ -88,7 +109,7 @@
+ #size-cells = <1>;
+ reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
+ reg-names = "gpmi-nand", "bch";
+- interrupts = <0 15 0x04>;
++ interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "bch";
+ clocks = <&clks 152>, <&clks 153>, <&clks 151>,
+ <&clks 150>, <&clks 149>;
+@@ -109,11 +130,13 @@
+ L2: l2-cache@00a02000 {
+ compatible = "arm,pl310-cache";
+ reg = <0x00a02000 0x1000>;
+- interrupts = <0 92 0x04>;
++ interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
+ cache-unified;
+ cache-level = <2>;
+ arm,tag-latency = <4 2 3>;
+ arm,data-latency = <4 2 3>;
++ arm,dynamic-clk-gating;
++ arm,standby-mode;
+ };
+
+ pcie: pcie@0x01000000 {
+@@ -126,15 +149,22 @@
+ 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */
+ 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
+ num-lanes = <1>;
+- interrupts = <0 123 0x04>;
+- clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>;
+- clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
++ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "pme";
++ #interrupt-cells = <1>;
++ interrupt-map-mask = <0 0 0 0x7>;
++ interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
++ <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
++ <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
++ <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clks 144>, <&clks 221>, <&clks 189>, <&clks 187>;
++ clock-names = "pcie_axi", "lvds_gate", "pcie_ref_125m", "sata_ref_100m";
+ status = "disabled";
+ };
+
+ pmu {
+ compatible = "arm,cortex-a9-pmu";
+- interrupts = <0 94 0x04>;
++ interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ aips-bus@02000000 { /* AIPS1 */
+@@ -154,7 +184,7 @@
+ spdif: spdif@02004000 {
+ compatible = "fsl,imx35-spdif";
+ reg = <0x02004000 0x4000>;
+- interrupts = <0 52 0x04>;
++ interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&sdma 14 18 0>,
+ <&sdma 15 18 0>;
+ dma-names = "rx", "tx";
+@@ -176,9 +206,11 @@
+ #size-cells = <0>;
+ compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
+ reg = <0x02008000 0x4000>;
+- interrupts = <0 31 0x04>;
++ interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 112>, <&clks 112>;
+ clock-names = "ipg", "per";
++ dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
++ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+@@ -187,9 +219,11 @@
+ #size-cells = <0>;
+ compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
+ reg = <0x0200c000 0x4000>;
+- interrupts = <0 32 0x04>;
++ interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 113>, <&clks 113>;
+ clock-names = "ipg", "per";
++ dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
++ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+@@ -198,9 +232,11 @@
+ #size-cells = <0>;
+ compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
+ reg = <0x02010000 0x4000>;
+- interrupts = <0 33 0x04>;
++ interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 114>, <&clks 114>;
+ clock-names = "ipg", "per";
++ dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
++ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+@@ -209,16 +245,18 @@
+ #size-cells = <0>;
+ compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
+ reg = <0x02014000 0x4000>;
+- interrupts = <0 34 0x04>;
++ interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 115>, <&clks 115>;
+ clock-names = "ipg", "per";
++ dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
++ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ uart1: serial@02020000 {
+ compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
+ reg = <0x02020000 0x4000>;
+- interrupts = <0 26 0x04>;
++ interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 160>, <&clks 161>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
+@@ -227,15 +265,23 @@
+ };
+
+ esai: esai@02024000 {
++ compatible = "fsl,imx6q-esai";
+ reg = <0x02024000 0x4000>;
+- interrupts = <0 51 0x04>;
++ interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clks 118>;
++ fsl,esai-dma-events = <24 23>;
++ fsl,flags = <1>;
++ status = "disabled";
+ };
+
+ ssi1: ssi@02028000 {
+- compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
++ compatible = "fsl,imx6q-ssi",
++ "fsl,imx51-ssi",
++ "fsl,imx21-ssi";
+ reg = <0x02028000 0x4000>;
+- interrupts = <0 46 0x04>;
+- clocks = <&clks 178>;
++ interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clks 178>, <&clks 157>;
++ clock-names = "ipg", "baud";
+ dmas = <&sdma 37 1 0>,
+ <&sdma 38 1 0>;
+ dma-names = "rx", "tx";
+@@ -245,10 +291,13 @@
+ };
+
+ ssi2: ssi@0202c000 {
+- compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
++ compatible = "fsl,imx6q-ssi",
++ "fsl,imx51-ssi",
++ "fsl,imx21-ssi";
+ reg = <0x0202c000 0x4000>;
+- interrupts = <0 47 0x04>;
+- clocks = <&clks 179>;
++ interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clks 179>, <&clks 158>;
++ clock-names = "ipg", "baud";
+ dmas = <&sdma 41 1 0>,
+ <&sdma 42 1 0>;
+ dma-names = "rx", "tx";
+@@ -258,10 +307,13 @@
+ };
+
+ ssi3: ssi@02030000 {
+- compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
++ compatible = "fsl,imx6q-ssi",
++ "fsl,imx51-ssi",
++ "fsl,imx21-ssi";
+ reg = <0x02030000 0x4000>;
+- interrupts = <0 48 0x04>;
+- clocks = <&clks 180>;
++ interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clks 180>, <&clks 159>;
++ clock-names = "ipg", "baud";
+ dmas = <&sdma 45 1 0>,
+ <&sdma 46 1 0>;
+ dma-names = "rx", "tx";
+@@ -271,8 +323,25 @@
+ };
+
+ asrc: asrc@02034000 {
++ compatible = "fsl,imx53-asrc";
+ reg = <0x02034000 0x4000>;
+- interrupts = <0 50 0x04>;
++ interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clks 107>, <&clks 156>;
++ clock-names = "core", "dma";
++ dmas = <&sdma 17 20 1>, <&sdma 18 20 1>, <&sdma 19 20 1>,
++ <&sdma 20 20 1>, <&sdma 21 20 1>, <&sdma 22 20 1>;
++ dma-names = "rxa", "rxb", "rxc",
++ "txa", "txb", "txc";
++ status = "okay";
++ };
++
++ asrc_p2p: asrc_p2p {
++ compatible = "fsl,imx6q-asrc-p2p";
++ fsl,output-rate = <48000>;
++ fsl,output-width = <16>;
++ fsl,asrc-dma-rx-events = <17 18 19>;
++ fsl,asrc-dma-tx-events = <20 21 22>;
++ status = "okay";
+ };
+
+ spba@0203c000 {
+@@ -281,8 +350,19 @@
+ };
+
+ vpu: vpu@02040000 {
++ compatible = "fsl,imx6-vpu";
+ reg = <0x02040000 0x3c000>;
+- interrupts = <0 3 0x04 0 12 0x04>;
++ reg-names = "vpu_regs";
++ interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>,
++ <0 12 IRQ_TYPE_LEVEL_HIGH>;
++ interrupt-names = "vpu_jpu_irq", "vpu_ipi_irq";
++ clocks = <&clks 168>, <&clks 140>, <&clks 142>;
++ clock-names = "vpu_clk", "mmdc_ch0_axi", "ocram";
++ iramsize = <0x21000>;
++ iram = <&ocram>;
++ resets = <&src 1>;
++ pu-supply = <&reg_pu>;
++ status = "disabled";
+ };
+
+ aipstz@0207c000 { /* AIPSTZ1 */
+@@ -293,7 +373,7 @@
+ #pwm-cells = <2>;
+ compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
+ reg = <0x02080000 0x4000>;
+- interrupts = <0 83 0x04>;
++ interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 62>, <&clks 145>;
+ clock-names = "ipg", "per";
+ };
+@@ -302,7 +382,7 @@
+ #pwm-cells = <2>;
+ compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
+ reg = <0x02084000 0x4000>;
+- interrupts = <0 84 0x04>;
++ interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 62>, <&clks 146>;
+ clock-names = "ipg", "per";
+ };
+@@ -311,7 +391,7 @@
+ #pwm-cells = <2>;
+ compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
+ reg = <0x02088000 0x4000>;
+- interrupts = <0 85 0x04>;
++ interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 62>, <&clks 147>;
+ clock-names = "ipg", "per";
+ };
+@@ -320,7 +400,7 @@
+ #pwm-cells = <2>;
+ compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
+ reg = <0x0208c000 0x4000>;
+- interrupts = <0 86 0x04>;
++ interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 62>, <&clks 148>;
+ clock-names = "ipg", "per";
+ };
+@@ -328,23 +408,25 @@
+ can1: flexcan@02090000 {
+ compatible = "fsl,imx6q-flexcan";
+ reg = <0x02090000 0x4000>;
+- interrupts = <0 110 0x04>;
++ interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 108>, <&clks 109>;
+ clock-names = "ipg", "per";
++ status = "disabled";
+ };
+
+ can2: flexcan@02094000 {
+ compatible = "fsl,imx6q-flexcan";
+ reg = <0x02094000 0x4000>;
+- interrupts = <0 111 0x04>;
++ interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 110>, <&clks 111>;
+ clock-names = "ipg", "per";
++ status = "disabled";
+ };
+
+ gpt: gpt@02098000 {
+ compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt";
+ reg = <0x02098000 0x4000>;
+- interrupts = <0 55 0x04>;
++ interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 119>, <&clks 120>;
+ clock-names = "ipg", "per";
+ };
+@@ -352,7 +434,8 @@
+ gpio1: gpio@0209c000 {
+ compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
+ reg = <0x0209c000 0x4000>;
+- interrupts = <0 66 0x04 0 67 0x04>;
++ interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>,
++ <0 67 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+@@ -362,7 +445,8 @@
+ gpio2: gpio@020a0000 {
+ compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
+ reg = <0x020a0000 0x4000>;
+- interrupts = <0 68 0x04 0 69 0x04>;
++ interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>,
++ <0 69 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+@@ -372,7 +456,8 @@
+ gpio3: gpio@020a4000 {
+ compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
+ reg = <0x020a4000 0x4000>;
+- interrupts = <0 70 0x04 0 71 0x04>;
++ interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>,
++ <0 71 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+@@ -382,7 +467,8 @@
+ gpio4: gpio@020a8000 {
+ compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
+ reg = <0x020a8000 0x4000>;
+- interrupts = <0 72 0x04 0 73 0x04>;
++ interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>,
++ <0 73 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+@@ -392,7 +478,8 @@
+ gpio5: gpio@020ac000 {
+ compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
+ reg = <0x020ac000 0x4000>;
+- interrupts = <0 74 0x04 0 75 0x04>;
++ interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>,
++ <0 75 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+@@ -402,7 +489,8 @@
+ gpio6: gpio@020b0000 {
+ compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
+ reg = <0x020b0000 0x4000>;
+- interrupts = <0 76 0x04 0 77 0x04>;
++ interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>,
++ <0 77 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+@@ -412,7 +500,8 @@
+ gpio7: gpio@020b4000 {
+ compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
+ reg = <0x020b4000 0x4000>;
+- interrupts = <0 78 0x04 0 79 0x04>;
++ interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>,
++ <0 79 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+@@ -421,20 +510,20 @@
+
+ kpp: kpp@020b8000 {
+ reg = <0x020b8000 0x4000>;
+- interrupts = <0 82 0x04>;
++ interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ wdog1: wdog@020bc000 {
+ compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
+ reg = <0x020bc000 0x4000>;
+- interrupts = <0 80 0x04>;
++ interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 0>;
+ };
+
+ wdog2: wdog@020c0000 {
+ compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
+ reg = <0x020c0000 0x4000>;
+- interrupts = <0 81 0x04>;
++ interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 0>;
+ status = "disabled";
+ };
+@@ -442,14 +531,17 @@
+ clks: ccm@020c4000 {
+ compatible = "fsl,imx6q-ccm";
+ reg = <0x020c4000 0x4000>;
+- interrupts = <0 87 0x04 0 88 0x04>;
++ interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
++ <0 88 IRQ_TYPE_LEVEL_HIGH>;
+ #clock-cells = <1>;
+ };
+
+ anatop: anatop@020c8000 {
+ compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
+ reg = <0x020c8000 0x1000>;
+- interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>;
++ interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
++ <0 54 IRQ_TYPE_LEVEL_HIGH>,
++ <0 127 IRQ_TYPE_LEVEL_HIGH>;
+
+ regulator-1p1@110 {
+ compatible = "fsl,anatop-regulator";
+@@ -495,7 +587,7 @@
+
+ reg_arm: regulator-vddcore@140 {
+ compatible = "fsl,anatop-regulator";
+- regulator-name = "cpu";
++ regulator-name = "vddarm";
+ regulator-min-microvolt = <725000>;
+ regulator-max-microvolt = <1450000>;
+ regulator-always-on;
+@@ -515,7 +607,6 @@
+ regulator-name = "vddpu";
+ regulator-min-microvolt = <725000>;
+ regulator-max-microvolt = <1450000>;
+- regulator-always-on;
+ anatop-reg-offset = <0x140>;
+ anatop-vol-bit-shift = <9>;
+ anatop-vol-bit-width = <5>;
+@@ -547,23 +638,38 @@
+
+ tempmon: tempmon {
+ compatible = "fsl,imx6q-tempmon";
+- interrupts = <0 49 0x04>;
++ interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
+ fsl,tempmon = <&anatop>;
+ fsl,tempmon-data = <&ocotp>;
++ clocks = <&clks 172>;
+ };
+
+ usbphy1: usbphy@020c9000 {
+ compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
+ reg = <0x020c9000 0x1000>;
+- interrupts = <0 44 0x04>;
++ interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 182>;
++ fsl,anatop = <&anatop>;
+ };
+
+ usbphy2: usbphy@020ca000 {
+ compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
+ reg = <0x020ca000 0x1000>;
+- interrupts = <0 45 0x04>;
++ interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 183>;
++ fsl,anatop = <&anatop>;
++ };
++
++ usbphy_nop1: usbphy_nop1 {
++ compatible = "usb-nop-xceiv";
++ clocks = <&clks 182>;
++ clock-names = "main_clk";
++ };
++
++ usbphy_nop2: usbphy_nop2 {
++ compatible = "usb-nop-xceiv";
++ clocks = <&clks 182>;
++ clock-names = "main_clk";
+ };
+
+ snvs@020cc000 {
+@@ -575,31 +681,39 @@
+ snvs-rtc-lp@34 {
+ compatible = "fsl,sec-v4.0-mon-rtc-lp";
+ reg = <0x34 0x58>;
+- interrupts = <0 19 0x04 0 20 0x04>;
++ interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
++ <0 20 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
+ epit1: epit@020d0000 { /* EPIT1 */
+ reg = <0x020d0000 0x4000>;
+- interrupts = <0 56 0x04>;
++ interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ epit2: epit@020d4000 { /* EPIT2 */
+ reg = <0x020d4000 0x4000>;
+- interrupts = <0 57 0x04>;
++ interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ src: src@020d8000 {
+ compatible = "fsl,imx6q-src", "fsl,imx51-src";
+ reg = <0x020d8000 0x4000>;
+- interrupts = <0 91 0x04 0 96 0x04>;
++ interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,
++ <0 96 IRQ_TYPE_LEVEL_HIGH>;
+ #reset-cells = <1>;
+ };
+
+ gpc: gpc@020dc000 {
+ compatible = "fsl,imx6q-gpc";
+ reg = <0x020dc000 0x4000>;
+- interrupts = <0 89 0x04 0 90 0x04>;
++ interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
++ <0 90 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clks 122>, <&clks 74>, <&clks 121>,
++ <&clks 26>, <&clks 143>, <&clks 168>, <&clks 62>;
++ clock-names = "gpu3d_core", "gpu3d_shader", "gpu2d_core",
++ "gpu2d_axi", "openvg_axi", "vpu_axi", "ipg";
++ pu-supply = <&reg_pu>;
+ };
+
+ gpr: iomuxc-gpr@020e0000 {
+@@ -610,778 +724,40 @@
+ iomuxc: iomuxc@020e0000 {
+ compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc";
+ reg = <0x020e0000 0x4000>;
+-
+- audmux {
+- pinctrl_audmux_1: audmux-1 {
+- fsl,pins = <
+- MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x80000000
+- MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x80000000
+- MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x80000000
+- MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x80000000
+- >;
+- };
+-
+- pinctrl_audmux_2: audmux-2 {
+- fsl,pins = <
+- MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x80000000
+- MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x80000000
+- MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x80000000
+- MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x80000000
+- >;
+- };
+-
+- pinctrl_audmux_3: audmux-3 {
+- fsl,pins = <
+- MX6QDL_PAD_DISP0_DAT16__AUD5_TXC 0x80000000
+- MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS 0x80000000
+- MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x80000000
+- >;
+- };
+- };
+-
+- ecspi1 {
+- pinctrl_ecspi1_1: ecspi1grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
+- MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
+- MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
+- >;
+- };
+-
+- pinctrl_ecspi1_2: ecspi1grp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
+- MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
+- MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
+- >;
+- };
+- };
+-
+- ecspi3 {
+- pinctrl_ecspi3_1: ecspi3grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
+- MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
+- MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
+- >;
+- };
+- };
+-
+- enet {
+- pinctrl_enet_1: enetgrp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+- MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+- MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
+- >;
+- };
+-
+- pinctrl_enet_2: enetgrp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0
+- MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0
+- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+- >;
+- };
+-
+- pinctrl_enet_3: enetgrp-3 {
+- fsl,pins = <
+- MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
+- MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
+- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
+- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
+- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
+- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
+- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
+- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
+- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
+- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
+- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
+- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
+- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
+- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+- MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
+- >;
+- };
+- };
+-
+- esai {
+- pinctrl_esai_1: esaigrp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1b030
+- MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1b030
+- MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS 0x1b030
+- MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x1b030
+- MX6QDL_PAD_ENET_TXD1__ESAI_TX2_RX3 0x1b030
+- MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1 0x1b030
+- MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0 0x1b030
+- MX6QDL_PAD_NANDF_CS2__ESAI_TX0 0x1b030
+- MX6QDL_PAD_NANDF_CS3__ESAI_TX1 0x1b030
+- >;
+- };
+-
+- pinctrl_esai_2: esaigrp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1b030
+- MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS 0x1b030
+- MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x1b030
+- MX6QDL_PAD_GPIO_5__ESAI_TX2_RX3 0x1b030
+- MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1 0x1b030
+- MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0 0x1b030
+- MX6QDL_PAD_GPIO_17__ESAI_TX0 0x1b030
+- MX6QDL_PAD_NANDF_CS3__ESAI_TX1 0x1b030
+- MX6QDL_PAD_ENET_MDIO__ESAI_RX_CLK 0x1b030
+- MX6QDL_PAD_GPIO_9__ESAI_RX_FS 0x1b030
+- >;
+- };
+- };
+-
+- flexcan1 {
+- pinctrl_flexcan1_1: flexcan1grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
+- MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000
+- >;
+- };
+-
+- pinctrl_flexcan1_2: flexcan1grp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x80000000
+- MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
+- >;
+- };
+- };
+-
+- flexcan2 {
+- pinctrl_flexcan2_1: flexcan2grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x80000000
+- MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x80000000
+- >;
+- };
+- };
+-
+- gpmi-nand {
+- pinctrl_gpmi_nand_1: gpmi-nand-1 {
+- fsl,pins = <
+- MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
+- MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
+- MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
+- MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
+- MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
+- MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
+- MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
+- MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
+- MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
+- MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
+- MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
+- MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
+- MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
+- MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
+- MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
+- MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
+- MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
+- >;
+- };
+- };
+-
+- hdmi_hdcp {
+- pinctrl_hdmi_hdcp_1: hdmihdcpgrp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1
+- MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1
+- >;
+- };
+-
+- pinctrl_hdmi_hdcp_2: hdmihdcpgrp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x4001b8b1
+- MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x4001b8b1
+- >;
+- };
+-
+- pinctrl_hdmi_hdcp_3: hdmihdcpgrp-3 {
+- fsl,pins = <
+- MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x4001b8b1
+- MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1
+- >;
+- };
+- };
+-
+- hdmi_cec {
+- pinctrl_hdmi_cec_1: hdmicecgrp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
+- >;
+- };
+-
+- pinctrl_hdmi_cec_2: hdmicecgrp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
+- >;
+- };
+- };
+-
+- i2c1 {
+- pinctrl_i2c1_1: i2c1grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+- MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+- >;
+- };
+-
+- pinctrl_i2c1_2: i2c1grp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
+- MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
+- >;
+- };
+- };
+-
+- i2c2 {
+- pinctrl_i2c2_1: i2c2grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
+- MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
+- >;
+- };
+-
+- pinctrl_i2c2_2: i2c2grp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+- MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+- >;
+- };
+-
+- pinctrl_i2c2_3: i2c2grp-3 {
+- fsl,pins = <
+- MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
+- MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+- >;
+- };
+- };
+-
+- i2c3 {
+- pinctrl_i2c3_1: i2c3grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
+- MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+- >;
+- };
+-
+- pinctrl_i2c3_2: i2c3grp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
+- MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+- >;
+- };
+-
+- pinctrl_i2c3_3: i2c3grp-3 {
+- fsl,pins = <
+- MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
+- MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
+- >;
+- };
+-
+- pinctrl_i2c3_4: i2c3grp-4 {
+- fsl,pins = <
+- MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
+- MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+- >;
+- };
+- };
+-
+- ipu1 {
+- pinctrl_ipu1_1: ipu1grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
+- MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
+- MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
+- MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
+- MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000000
+- MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
+- MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
+- MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
+- MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
+- MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
+- MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
+- MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
+- MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
+- MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
+- MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
+- MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
+- MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
+- MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
+- MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
+- MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
+- MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
+- MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
+- MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
+- MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
+- MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
+- MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
+- MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
+- MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
+- MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
+- >;
+- };
+-
+- pinctrl_ipu1_2: ipu1grp-2 { /* parallel camera */
+- fsl,pins = <
+- MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x80000000
+- MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x80000000
+- MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x80000000
+- MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x80000000
+- MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x80000000
+- MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x80000000
+- MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x80000000
+- MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x80000000
+- MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x80000000
+- MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x80000000
+- MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x80000000
+- MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x80000000
+- >;
+- };
+-
+- pinctrl_ipu1_3: ipu1grp-3 { /* parallel port 16-bit */
+- fsl,pins = <
+- MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x80000000
+- MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x80000000
+- MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x80000000
+- MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x80000000
+- MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x80000000
+- MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x80000000
+- MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x80000000
+- MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x80000000
+- MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x80000000
+- MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x80000000
+- MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x80000000
+- MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x80000000
+- MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x80000000
+- MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x80000000
+- MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x80000000
+- MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x80000000
+- MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x80000000
+- MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x80000000
+- MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x80000000
+- >;
+- };
+- };
+-
+- mlb {
+- pinctrl_mlb_1: mlbgrp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_GPIO_3__MLB_CLK 0x71
+- MX6QDL_PAD_GPIO_6__MLB_SIG 0x71
+- MX6QDL_PAD_GPIO_2__MLB_DATA 0x71
+- >;
+- };
+-
+- pinctrl_mlb_2: mlbgrp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_ENET_TXD1__MLB_CLK 0x71
+- MX6QDL_PAD_GPIO_6__MLB_SIG 0x71
+- MX6QDL_PAD_GPIO_2__MLB_DATA 0x71
+- >;
+- };
+- };
+-
+- pwm0 {
+- pinctrl_pwm0_1: pwm0grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
+- >;
+- };
+- };
+-
+- pwm3 {
+- pinctrl_pwm3_1: pwm3grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
+- >;
+- };
+- };
+-
+- spdif {
+- pinctrl_spdif_1: spdifgrp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_KEY_COL3__SPDIF_IN 0x1b0b0
+- >;
+- };
+-
+- pinctrl_spdif_2: spdifgrp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
+- MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
+- >;
+- };
+-
+- pinctrl_spdif_3: spdifgrp-3 {
+- fsl,pins = <
+- MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
+- >;
+- };
+- };
+-
+- uart1 {
+- pinctrl_uart1_1: uart1grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
+- MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
+- >;
+- };
+- };
+-
+- uart2 {
+- pinctrl_uart2_1: uart2grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
+- MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
+- >;
+- };
+-
+- pinctrl_uart2_2: uart2grp-2 { /* DTE mode */
+- fsl,pins = <
+- MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
+- MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1
+- MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1
+- MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
+- >;
+- };
+- };
+-
+- uart3 {
+- pinctrl_uart3_1: uart3grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_SD4_CLK__UART3_RX_DATA 0x1b0b1
+- MX6QDL_PAD_SD4_CMD__UART3_TX_DATA 0x1b0b1
+- MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x1b0b1
+- MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
+- >;
+- };
+-
+- pinctrl_uart3_2: uart3grp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
+- MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
+- MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
+- MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
+- >;
+- };
+- };
+-
+- uart4 {
+- pinctrl_uart4_1: uart4grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+- MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+- >;
+- };
+- };
+-
+- usbotg {
+- pinctrl_usbotg_1: usbotggrp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
+- >;
+- };
+-
+- pinctrl_usbotg_2: usbotggrp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+- >;
+- };
+- };
+-
+- usbh2 {
+- pinctrl_usbh2_1: usbh2grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x40013030
+- MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x40013030
+- >;
+- };
+-
+- pinctrl_usbh2_2: usbh2grp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x40017030
+- >;
+- };
+- };
+-
+- usbh3 {
+- pinctrl_usbh3_1: usbh3grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA 0x40013030
+- MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x40013030
+- >;
+- };
+-
+- pinctrl_usbh3_2: usbh3grp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x40017030
+- >;
+- };
+- };
+-
+- usdhc1 {
+- pinctrl_usdhc1_1: usdhc1grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
+- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
+- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
+- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
+- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
+- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
+- MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x17059
+- MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x17059
+- MX6QDL_PAD_NANDF_D2__SD1_DATA6 0x17059
+- MX6QDL_PAD_NANDF_D3__SD1_DATA7 0x17059
+- >;
+- };
+-
+- pinctrl_usdhc1_2: usdhc1grp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
+- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
+- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
+- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
+- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
+- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
+- >;
+- };
+- };
+-
+- usdhc2 {
+- pinctrl_usdhc2_1: usdhc2grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
+- MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
+- MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
+- MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
+- MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
+- MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
+- MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
+- MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
+- MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
+- MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
+- >;
+- };
+-
+- pinctrl_usdhc2_2: usdhc2grp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
+- MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
+- MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
+- MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
+- MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
+- MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
+- >;
+- };
+- };
+-
+- usdhc3 {
+- pinctrl_usdhc3_1: usdhc3grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
+- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
+- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
+- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
+- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
+- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
+- MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
+- MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
+- MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
+- MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
+- >;
+- };
+-
+- pinctrl_usdhc3_1_100mhz: usdhc3grp-1-100mhz { /* 100Mhz */
+- fsl,pins = <
+- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
+- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
+- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
+- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
+- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
+- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
+- MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9
+- MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9
+- MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9
+- MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9
+- >;
+- };
+-
+- pinctrl_usdhc3_1_200mhz: usdhc3grp-1-200mhz { /* 200Mhz */
+- fsl,pins = <
+- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
+- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
+- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
+- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
+- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
+- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
+- MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9
+- MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9
+- MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9
+- MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9
+- >;
+- };
+-
+- pinctrl_usdhc3_2: usdhc3grp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
+- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
+- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
+- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
+- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
+- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
+- >;
+- };
+- };
+-
+- usdhc4 {
+- pinctrl_usdhc4_1: usdhc4grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
+- MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
+- MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
+- MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
+- MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
+- MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
+- MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
+- MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
+- MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
+- MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
+- >;
+- };
+-
+- pinctrl_usdhc4_2: usdhc4grp-2 {
+- fsl,pins = <
+- MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
+- MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
+- MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
+- MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
+- MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
+- MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
+- >;
+- };
+- };
+-
+- weim {
+- pinctrl_weim_cs0_1: weim_cs0grp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0b1
+- >;
+- };
+-
+- pinctrl_weim_nor_1: weim_norgrp-1 {
+- fsl,pins = <
+- MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1
+- MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1
+- MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0xb060
+- /* data */
+- MX6QDL_PAD_EIM_D16__EIM_DATA16 0x1b0b0
+- MX6QDL_PAD_EIM_D17__EIM_DATA17 0x1b0b0
+- MX6QDL_PAD_EIM_D18__EIM_DATA18 0x1b0b0
+- MX6QDL_PAD_EIM_D19__EIM_DATA19 0x1b0b0
+- MX6QDL_PAD_EIM_D20__EIM_DATA20 0x1b0b0
+- MX6QDL_PAD_EIM_D21__EIM_DATA21 0x1b0b0
+- MX6QDL_PAD_EIM_D22__EIM_DATA22 0x1b0b0
+- MX6QDL_PAD_EIM_D23__EIM_DATA23 0x1b0b0
+- MX6QDL_PAD_EIM_D24__EIM_DATA24 0x1b0b0
+- MX6QDL_PAD_EIM_D25__EIM_DATA25 0x1b0b0
+- MX6QDL_PAD_EIM_D26__EIM_DATA26 0x1b0b0
+- MX6QDL_PAD_EIM_D27__EIM_DATA27 0x1b0b0
+- MX6QDL_PAD_EIM_D28__EIM_DATA28 0x1b0b0
+- MX6QDL_PAD_EIM_D29__EIM_DATA29 0x1b0b0
+- MX6QDL_PAD_EIM_D30__EIM_DATA30 0x1b0b0
+- MX6QDL_PAD_EIM_D31__EIM_DATA31 0x1b0b0
+- /* address */
+- MX6QDL_PAD_EIM_A23__EIM_ADDR23 0xb0b1
+- MX6QDL_PAD_EIM_A22__EIM_ADDR22 0xb0b1
+- MX6QDL_PAD_EIM_A21__EIM_ADDR21 0xb0b1
+- MX6QDL_PAD_EIM_A20__EIM_ADDR20 0xb0b1
+- MX6QDL_PAD_EIM_A19__EIM_ADDR19 0xb0b1
+- MX6QDL_PAD_EIM_A18__EIM_ADDR18 0xb0b1
+- MX6QDL_PAD_EIM_A17__EIM_ADDR17 0xb0b1
+- MX6QDL_PAD_EIM_A16__EIM_ADDR16 0xb0b1
+- MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1
+- MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1
+- MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1
+- MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1
+- MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1
+- MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1
+- MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1
+- MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1
+- MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1
+- MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1
+- MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1
+- MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1
+- MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1
+- MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1
+- MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1
+- MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1
+- >;
+- };
+- };
+ };
+
+ ldb: ldb@020e0008 {
+- #address-cells = <1>;
+- #size-cells = <0>;
+ compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
+- gpr = <&gpr>;
++ reg = <0x020e0000 0x4000>;
++ clocks = <&clks 135>, <&clks 136>,
++ <&clks 39>, <&clks 40>,
++ <&clks 41>, <&clks 42>,
++ <&clks 184>, <&clks 185>,
++ <&clks 210>, <&clks 211>,
++ <&clks 212>, <&clks 213>;
++ clock-names = "ldb_di0", "ldb_di1",
++ "ipu1_di0_sel", "ipu1_di1_sel",
++ "ipu2_di0_sel", "ipu2_di1_sel",
++ "di0_div_3_5", "di1_div_3_5",
++ "di0_div_7", "di1_div_7",
++ "di0_div_sel", "di1_div_sel";
+ status = "disabled";
+-
+- lvds-channel@0 {
+- reg = <0>;
+- status = "disabled";
+- };
+-
+- lvds-channel@1 {
+- reg = <1>;
+- status = "disabled";
+- };
+ };
+
+ dcic1: dcic@020e4000 {
+ reg = <0x020e4000 0x4000>;
+- interrupts = <0 124 0x04>;
++ interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ dcic2: dcic@020e8000 {
+ reg = <0x020e8000 0x4000>;
+- interrupts = <0 125 0x04>;
++ interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sdma: sdma@020ec000 {
+ compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
+ reg = <0x020ec000 0x4000>;
+- interrupts = <0 2 0x04>;
++ interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 155>, <&clks 155>;
+ clock-names = "ipg", "ahb";
+ #dma-cells = <3>;
+@@ -1396,9 +772,29 @@
+ reg = <0x02100000 0x100000>;
+ ranges;
+
+- caam@02100000 {
+- reg = <0x02100000 0x40000>;
+- interrupts = <0 105 0x04 0 106 0x04>;
++ crypto: caam@02100000 {
++ compatible = "fsl,sec-v4.0";
++ #address-cells = <1>;
++ #size-cells = <1>;
++ reg = <0x2100000 0x40000>;
++ ranges = <0 0x2100000 0x40000>;
++ interrupt-parent = <&intc>; /* interrupts = <0 92 0x4>; */
++ clocks = <&clks 214>, <&clks 215>, <&clks 216>, <&clks 196>;
++ clock-names = "caam_mem", "caam_aclk", "caam_ipg", "caam_emi_slow";
++
++ sec_jr0: jr0@1000 {
++ compatible = "fsl,sec-v4.0-job-ring";
++ reg = <0x1000 0x1000>;
++ interrupt-parent = <&intc>;
++ interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
++ sec_jr1: jr1@2000 {
++ compatible = "fsl,sec-v4.0-job-ring";
++ reg = <0x2000 0x1000>;
++ interrupt-parent = <&intc>;
++ interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
++ };
+ };
+
+ aipstz@0217c000 { /* AIPSTZ2 */
+@@ -1408,7 +804,7 @@
+ usbotg: usb@02184000 {
+ compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
+ reg = <0x02184000 0x200>;
+- interrupts = <0 43 0x04>;
++ interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 162>;
+ fsl,usbphy = <&usbphy1>;
+ fsl,usbmisc = <&usbmisc 0>;
+@@ -1418,7 +814,7 @@
+ usbh1: usb@02184200 {
+ compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
+ reg = <0x02184200 0x200>;
+- interrupts = <0 40 0x04>;
++ interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 162>;
+ fsl,usbphy = <&usbphy2>;
+ fsl,usbmisc = <&usbmisc 1>;
+@@ -1428,18 +824,24 @@
+ usbh2: usb@02184400 {
+ compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
+ reg = <0x02184400 0x200>;
+- interrupts = <0 41 0x04>;
++ interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 162>;
+ fsl,usbmisc = <&usbmisc 2>;
++ phy_type = "hsic";
++ fsl,usbphy = <&usbphy_nop1>;
++ fsl,anatop = <&anatop>;
+ status = "disabled";
+ };
+
+ usbh3: usb@02184600 {
+ compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
+ reg = <0x02184600 0x200>;
+- interrupts = <0 42 0x04>;
++ interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 162>;
+ fsl,usbmisc = <&usbmisc 3>;
++ phy_type = "hsic";
++ fsl,usbphy = <&usbphy_nop2>;
++ fsl,anatop = <&anatop>;
+ status = "disabled";
+ };
+
+@@ -1453,7 +855,9 @@
+ fec: ethernet@02188000 {
+ compatible = "fsl,imx6q-fec";
+ reg = <0x02188000 0x4000>;
+- interrupts = <0 118 0x04 0 119 0x04>;
++ interrupts-extended =
++ <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>,
++ <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 117>, <&clks 117>, <&clks 190>;
+ clock-names = "ipg", "ahb", "ptp";
+ status = "disabled";
+@@ -1461,13 +865,15 @@
+
+ mlb@0218c000 {
+ reg = <0x0218c000 0x4000>;
+- interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>;
++ interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>,
++ <0 117 IRQ_TYPE_LEVEL_HIGH>,
++ <0 126 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ usdhc1: usdhc@02190000 {
+ compatible = "fsl,imx6q-usdhc";
+ reg = <0x02190000 0x4000>;
+- interrupts = <0 22 0x04>;
++ interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 163>, <&clks 163>, <&clks 163>;
+ clock-names = "ipg", "ahb", "per";
+ bus-width = <4>;
+@@ -1477,7 +883,7 @@
+ usdhc2: usdhc@02194000 {
+ compatible = "fsl,imx6q-usdhc";
+ reg = <0x02194000 0x4000>;
+- interrupts = <0 23 0x04>;
++ interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 164>, <&clks 164>, <&clks 164>;
+ clock-names = "ipg", "ahb", "per";
+ bus-width = <4>;
+@@ -1487,7 +893,7 @@
+ usdhc3: usdhc@02198000 {
+ compatible = "fsl,imx6q-usdhc";
+ reg = <0x02198000 0x4000>;
+- interrupts = <0 24 0x04>;
++ interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 165>, <&clks 165>, <&clks 165>;
+ clock-names = "ipg", "ahb", "per";
+ bus-width = <4>;
+@@ -1497,7 +903,7 @@
+ usdhc4: usdhc@0219c000 {
+ compatible = "fsl,imx6q-usdhc";
+ reg = <0x0219c000 0x4000>;
+- interrupts = <0 25 0x04>;
++ interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 166>, <&clks 166>, <&clks 166>;
+ clock-names = "ipg", "ahb", "per";
+ bus-width = <4>;
+@@ -1509,7 +915,7 @@
+ #size-cells = <0>;
+ compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
+ reg = <0x021a0000 0x4000>;
+- interrupts = <0 36 0x04>;
++ interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 125>;
+ status = "disabled";
+ };
+@@ -1519,7 +925,7 @@
+ #size-cells = <0>;
+ compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
+ reg = <0x021a4000 0x4000>;
+- interrupts = <0 37 0x04>;
++ interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 126>;
+ status = "disabled";
+ };
+@@ -1529,7 +935,7 @@
+ #size-cells = <0>;
+ compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
+ reg = <0x021a8000 0x4000>;
+- interrupts = <0 38 0x04>;
++ interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 127>;
+ status = "disabled";
+ };
+@@ -1538,6 +944,11 @@
+ reg = <0x021ac000 0x4000>;
+ };
+
++ mmdc0-1@021b0000 { /* MMDC0-1 */
++ compatible = "fsl,imx6q-mmdc-combine";
++ reg = <0x021b0000 0x8000>;
++ };
++
+ mmdc0: mmdc@021b0000 { /* MMDC0 */
+ compatible = "fsl,imx6q-mmdc";
+ reg = <0x021b0000 0x4000>;
+@@ -1550,23 +961,29 @@
+ weim: weim@021b8000 {
+ compatible = "fsl,imx6q-weim";
+ reg = <0x021b8000 0x4000>;
+- interrupts = <0 14 0x04>;
++ interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 196>;
+ };
+
+- ocotp: ocotp@021bc000 {
+- compatible = "fsl,imx6q-ocotp", "syscon";
++ ocotp: ocotp-ctrl@021bc000 {
++ compatible = "syscon";
+ reg = <0x021bc000 0x4000>;
+ };
+
++ ocotp-fuse@021bc000 {
++ compatible = "fsl,imx6q-ocotp";
++ reg = <0x021bc000 0x4000>;
++ clocks = <&clks 128>;
++ };
++
+ tzasc@021d0000 { /* TZASC1 */
+ reg = <0x021d0000 0x4000>;
+- interrupts = <0 108 0x04>;
++ interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ tzasc@021d4000 { /* TZASC2 */
+ reg = <0x021d4000 0x4000>;
+- interrupts = <0 109 0x04>;
++ interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ audmux: audmux@021d8000 {
+@@ -1575,23 +992,32 @@
+ status = "disabled";
+ };
+
+- mipi@021dc000 { /* MIPI-CSI */
++ mipi_csi: mipi_csi@021dc000 {
++ compatible = "fsl,imx6q-mipi-csi2";
+ reg = <0x021dc000 0x4000>;
+- };
+-
+- mipi@021e0000 { /* MIPI-DSI */
+- reg = <0x021e0000 0x4000>;
++ interrupts = <0 100 0x04>, <0 101 0x04>;
++ clocks = <&clks 138>, <&clks 53>, <&clks 204>;
++ /* Note: clks 138 is hsi_tx, however, the dphy_c
++ * hsi_tx and pll_refclk use the same clk gate.
++ * In current clk driver, open/close clk gate do
++ * use hsi_tx for a temporary debug purpose.
++ */
++ clock-names = "dphy_clk", "pixel_clk", "cfg_clk";
++ status = "disabled";
+ };
+
+ vdoa@021e4000 {
++ compatible = "fsl,imx6q-vdoa";
+ reg = <0x021e4000 0x4000>;
+- interrupts = <0 18 0x04>;
++ interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clks 202>;
++ iram = <&ocram>;
+ };
+
+ uart2: serial@021e8000 {
+ compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
+ reg = <0x021e8000 0x4000>;
+- interrupts = <0 27 0x04>;
++ interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 160>, <&clks 161>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
+@@ -1602,7 +1028,7 @@
+ uart3: serial@021ec000 {
+ compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
+ reg = <0x021ec000 0x4000>;
+- interrupts = <0 28 0x04>;
++ interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 160>, <&clks 161>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma 29 4 0>, <&sdma 30 4 0>;
+@@ -1613,7 +1039,7 @@
+ uart4: serial@021f0000 {
+ compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
+ reg = <0x021f0000 0x4000>;
+- interrupts = <0 29 0x04>;
++ interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 160>, <&clks 161>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
+@@ -1624,7 +1050,7 @@
+ uart5: serial@021f4000 {
+ compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
+ reg = <0x021f4000 0x4000>;
+- interrupts = <0 30 0x04>;
++ interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 160>, <&clks 161>;
+ clock-names = "ipg", "per";
+ dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
+@@ -1634,13 +1060,18 @@
+ };
+
+ ipu1: ipu@02400000 {
+- #crtc-cells = <1>;
+ compatible = "fsl,imx6q-ipu";
+ reg = <0x02400000 0x400000>;
+- interrupts = <0 6 0x4 0 5 0x4>;
+- clocks = <&clks 130>, <&clks 131>, <&clks 132>;
+- clock-names = "bus", "di0", "di1";
++ interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>,
++ <0 5 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clks 130>, <&clks 131>, <&clks 132>,
++ <&clks 39>, <&clks 40>,
++ <&clks 135>, <&clks 136>;
++ clock-names = "bus", "di0", "di1",
++ "di0_sel", "di1_sel",
++ "ldb_di0", "ldb_di1";
+ resets = <&src 2>;
++ bypass_reset = <0>;
+ };
+ };
+ };
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi 2015-10-12 10:56:17.827351177 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi 2015-10-15 15:51:21.060931222 +0200
@@ -0,0 +1,374 @@
+/*
+ * Copyright 2013 Gateworks Corporation
@@ -5772,7 +3827,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi linux-3.14.54
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi 2015-10-12 10:56:17.828351177 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi 2015-10-15 15:51:21.060931222 +0200
@@ -0,0 +1,527 @@
+/*
+ * Copyright 2013 Gateworks Corporation
@@ -6303,7 +4358,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi linux-3.14.54
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi 2015-10-12 10:56:17.828351177 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi 2015-10-15 15:51:21.060931222 +0200
@@ -0,0 +1,572 @@
+/*
+ * Copyright 2013 Gateworks Corporation
@@ -6879,7 +4934,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi linux-3.14.54
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi 2015-10-12 10:56:17.828351177 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi 2015-10-15 15:51:21.060931222 +0200
@@ -0,0 +1,599 @@
+/*
+ * Copyright 2013 Gateworks Corporation
@@ -7482,7 +5537,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi linux-3.14.54
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi 2015-10-12 10:56:17.828351177 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi 2015-10-15 15:51:21.064930958 +0200
@@ -0,0 +1,367 @@
+/*
+ * Copyright (C) 2013,2014 Russell King
@@ -7853,7 +5908,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-hummingboard.dtsi linux-3
+
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi 2015-10-12 10:56:17.829351177 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi 2015-10-15 15:51:21.064930958 +0200
@@ -17,7 +17,7 @@
enet {
pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
@@ -7902,7 +5957,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi linu
* As the RMII pins are also connected to RGMII
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-microsom.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl-microsom.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-microsom.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-microsom.dtsi 2015-10-12 10:56:17.829351177 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-microsom.dtsi 2015-10-15 15:51:21.064930958 +0200
@@ -1,9 +1,69 @@
/*
* Copyright (C) 2013,2014 Russell King
@@ -8032,7 +6087,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-microsom.dtsi linux-3.14.
+
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi 2015-10-12 10:56:17.829351177 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi 2015-10-15 15:51:21.064930958 +0200
@@ -0,0 +1,426 @@
+/*
+ * Copyright 2013 Boundary Devices, Inc.
@@ -8462,7 +6517,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi linux-3.1
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi 2015-10-12 10:56:17.829351177 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi 2015-10-15 15:51:21.064930958 +0200
@@ -0,0 +1,98 @@
+/*
+ * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
@@ -8564,7 +6619,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi linux-
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi 2015-10-12 10:56:17.829351177 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi 2015-10-15 15:51:21.064930958 +0200
@@ -0,0 +1,356 @@
+/*
+ * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
@@ -8924,7 +6979,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi linux-
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi 2015-10-12 10:56:17.830351177 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi 2015-10-15 15:51:21.068930692 +0200
@@ -10,17 +10,146 @@
* http://www.gnu.org/copyleft/gpl.html
*/
@@ -9625,7 +7680,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi linux-3.14
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi 2015-10-12 10:56:17.830351177 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi 2015-10-15 15:51:21.308914896 +0200
@@ -0,0 +1,427 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
@@ -10056,7 +8111,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi linux-3.14
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-sabresd.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-sabresd.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-sabresd.dtsi 2015-10-12 10:56:17.831351177 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-sabresd.dtsi 2015-10-15 15:51:21.308914896 +0200
@@ -10,16 +10,33 @@
* http://www.gnu.org/copyleft/gpl.html
*/
@@ -10751,7 +8806,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-sabresd.dtsi linux-3.14.5
+};
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-wandboard.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-wandboard.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-wandboard.dtsi 2015-10-12 10:56:17.831351177 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6qdl-wandboard.dtsi 2015-10-15 15:51:21.312914632 +0200
@@ -12,17 +12,21 @@
/ {
regulators {
@@ -10976,1868 +9031,144 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl-wandboard.dtsi linux-3.14
cd-gpios = <&gpio3 9 0>;
status = "okay";
};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl.dtsi linux-3.14.54/arch/arm/boot/dts/imx6qdl.dtsi
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6qdl.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6qdl.dtsi 2015-10-12 10:56:17.826351177 +0200
-@@ -10,10 +10,16 @@
- * http://www.gnu.org/copyleft/gpl.html
- */
-
-+#include <dt-bindings/interrupt-controller/arm-gic.h>
-+
- #include "skeleton.dtsi"
-+#include <dt-bindings/gpio/gpio.h>
-
- / {
- aliases {
-+ ethernet0 = &fec;
-+ can0 = &can1;
-+ can1 = &can2;
- gpio0 = &gpio1;
- gpio1 = &gpio2;
- gpio2 = &gpio3;
-@@ -24,6 +30,11 @@
- i2c0 = &i2c1;
- i2c1 = &i2c2;
- i2c2 = &i2c3;
-+ ipu0 = &ipu1;
-+ mmc0 = &usdhc1;
-+ mmc1 = &usdhc2;
-+ mmc2 = &usdhc3;
-+ mmc3 = &usdhc4;
- serial0 = &uart1;
- serial1 = &uart2;
- serial2 = &uart3;
-@@ -33,13 +44,13 @@
- spi1 = &ecspi2;
- spi2 = &ecspi3;
- spi3 = &ecspi4;
-+ usbphy0 = &usbphy1;
-+ usbphy1 = &usbphy2;
- };
-
- intc: interrupt-controller@00a01000 {
- compatible = "arm,cortex-a9-gic";
- #interrupt-cells = <3>;
-- #address-cells = <1>;
-- #size-cells = <1>;
- interrupt-controller;
- reg = <0x00a01000 0x1000>,
- <0x00a00100 0x100>;
-@@ -51,20 +62,27 @@
-
- ckil {
- compatible = "fsl,imx-ckil", "fixed-clock";
-+ #clock-cells = <0>;
- clock-frequency = <32768>;
- };
-
- ckih1 {
- compatible = "fsl,imx-ckih1", "fixed-clock";
-+ #clock-cells = <0>;
- clock-frequency = <0>;
- };
-
- osc {
- compatible = "fsl,imx-osc", "fixed-clock";
-+ #clock-cells = <0>;
- clock-frequency = <24000000>;
- };
- };
-
-+ pu_dummy: pudummy_reg {
-+ compatible = "fsl,imx6-dummy-pureg"; /* only used in ldo-bypass */
-+ };
-+
- soc {
- #address-cells = <1>;
- #size-cells = <1>;
-@@ -75,7 +93,10 @@
- dma_apbh: dma-apbh@00110000 {
- compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
- reg = <0x00110000 0x2000>;
-- interrupts = <0 13 0x04>, <0 13 0x04>, <0 13 0x04>, <0 13 0x04>;
-+ interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 13 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 13 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 13 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
- #dma-cells = <1>;
- dma-channels = <4>;
-@@ -88,7 +109,7 @@
- #size-cells = <1>;
- reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
- reg-names = "gpmi-nand", "bch";
-- interrupts = <0 15 0x04>;
-+ interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "bch";
- clocks = <&clks 152>, <&clks 153>, <&clks 151>,
- <&clks 150>, <&clks 149>;
-@@ -109,11 +130,13 @@
- L2: l2-cache@00a02000 {
- compatible = "arm,pl310-cache";
- reg = <0x00a02000 0x1000>;
-- interrupts = <0 92 0x04>;
-+ interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
- cache-unified;
- cache-level = <2>;
- arm,tag-latency = <4 2 3>;
- arm,data-latency = <4 2 3>;
-+ arm,dynamic-clk-gating;
-+ arm,standby-mode;
- };
-
- pcie: pcie@0x01000000 {
-@@ -126,15 +149,22 @@
- 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */
- 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
- num-lanes = <1>;
-- interrupts = <0 123 0x04>;
-- clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>;
-- clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi";
-+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
-+ interrupt-names = "pme";
-+ #interrupt-cells = <1>;
-+ interrupt-map-mask = <0 0 0 0x7>;
-+ interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clks 144>, <&clks 221>, <&clks 189>, <&clks 187>;
-+ clock-names = "pcie_axi", "lvds_gate", "pcie_ref_125m", "sata_ref_100m";
- status = "disabled";
- };
-
- pmu {
- compatible = "arm,cortex-a9-pmu";
-- interrupts = <0 94 0x04>;
-+ interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- aips-bus@02000000 { /* AIPS1 */
-@@ -154,7 +184,7 @@
- spdif: spdif@02004000 {
- compatible = "fsl,imx35-spdif";
- reg = <0x02004000 0x4000>;
-- interrupts = <0 52 0x04>;
-+ interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&sdma 14 18 0>,
- <&sdma 15 18 0>;
- dma-names = "rx", "tx";
-@@ -176,9 +206,11 @@
- #size-cells = <0>;
- compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
- reg = <0x02008000 0x4000>;
-- interrupts = <0 31 0x04>;
-+ interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 112>, <&clks 112>;
- clock-names = "ipg", "per";
-+ dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
-+ dma-names = "rx", "tx";
- status = "disabled";
- };
-
-@@ -187,9 +219,11 @@
- #size-cells = <0>;
- compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
- reg = <0x0200c000 0x4000>;
-- interrupts = <0 32 0x04>;
-+ interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 113>, <&clks 113>;
- clock-names = "ipg", "per";
-+ dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
-+ dma-names = "rx", "tx";
- status = "disabled";
- };
-
-@@ -198,9 +232,11 @@
- #size-cells = <0>;
- compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
- reg = <0x02010000 0x4000>;
-- interrupts = <0 33 0x04>;
-+ interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 114>, <&clks 114>;
- clock-names = "ipg", "per";
-+ dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
-+ dma-names = "rx", "tx";
- status = "disabled";
- };
-
-@@ -209,16 +245,18 @@
- #size-cells = <0>;
- compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
- reg = <0x02014000 0x4000>;
-- interrupts = <0 34 0x04>;
-+ interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 115>, <&clks 115>;
- clock-names = "ipg", "per";
-+ dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
-+ dma-names = "rx", "tx";
- status = "disabled";
- };
-
- uart1: serial@02020000 {
- compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
- reg = <0x02020000 0x4000>;
-- interrupts = <0 26 0x04>;
-+ interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 160>, <&clks 161>;
- clock-names = "ipg", "per";
- dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
-@@ -227,15 +265,23 @@
- };
-
- esai: esai@02024000 {
-+ compatible = "fsl,imx6q-esai";
- reg = <0x02024000 0x4000>;
-- interrupts = <0 51 0x04>;
-+ interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clks 118>;
-+ fsl,esai-dma-events = <24 23>;
-+ fsl,flags = <1>;
-+ status = "disabled";
- };
-
- ssi1: ssi@02028000 {
-- compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
-+ compatible = "fsl,imx6q-ssi",
-+ "fsl,imx51-ssi",
-+ "fsl,imx21-ssi";
- reg = <0x02028000 0x4000>;
-- interrupts = <0 46 0x04>;
-- clocks = <&clks 178>;
-+ interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clks 178>, <&clks 157>;
-+ clock-names = "ipg", "baud";
- dmas = <&sdma 37 1 0>,
- <&sdma 38 1 0>;
- dma-names = "rx", "tx";
-@@ -245,10 +291,13 @@
- };
-
- ssi2: ssi@0202c000 {
-- compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
-+ compatible = "fsl,imx6q-ssi",
-+ "fsl,imx51-ssi",
-+ "fsl,imx21-ssi";
- reg = <0x0202c000 0x4000>;
-- interrupts = <0 47 0x04>;
-- clocks = <&clks 179>;
-+ interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clks 179>, <&clks 158>;
-+ clock-names = "ipg", "baud";
- dmas = <&sdma 41 1 0>,
- <&sdma 42 1 0>;
- dma-names = "rx", "tx";
-@@ -258,10 +307,13 @@
- };
-
- ssi3: ssi@02030000 {
-- compatible = "fsl,imx6q-ssi","fsl,imx21-ssi";
-+ compatible = "fsl,imx6q-ssi",
-+ "fsl,imx51-ssi",
-+ "fsl,imx21-ssi";
- reg = <0x02030000 0x4000>;
-- interrupts = <0 48 0x04>;
-- clocks = <&clks 180>;
-+ interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clks 180>, <&clks 159>;
-+ clock-names = "ipg", "baud";
- dmas = <&sdma 45 1 0>,
- <&sdma 46 1 0>;
- dma-names = "rx", "tx";
-@@ -271,8 +323,25 @@
- };
-
- asrc: asrc@02034000 {
-+ compatible = "fsl,imx53-asrc";
- reg = <0x02034000 0x4000>;
-- interrupts = <0 50 0x04>;
-+ interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clks 107>, <&clks 156>;
-+ clock-names = "core", "dma";
-+ dmas = <&sdma 17 20 1>, <&sdma 18 20 1>, <&sdma 19 20 1>,
-+ <&sdma 20 20 1>, <&sdma 21 20 1>, <&sdma 22 20 1>;
-+ dma-names = "rxa", "rxb", "rxc",
-+ "txa", "txb", "txc";
-+ status = "okay";
-+ };
-+
-+ asrc_p2p: asrc_p2p {
-+ compatible = "fsl,imx6q-asrc-p2p";
-+ fsl,output-rate = <48000>;
-+ fsl,output-width = <16>;
-+ fsl,asrc-dma-rx-events = <17 18 19>;
-+ fsl,asrc-dma-tx-events = <20 21 22>;
-+ status = "okay";
- };
-
- spba@0203c000 {
-@@ -281,8 +350,19 @@
- };
-
- vpu: vpu@02040000 {
-+ compatible = "fsl,imx6-vpu";
- reg = <0x02040000 0x3c000>;
-- interrupts = <0 3 0x04 0 12 0x04>;
-+ reg-names = "vpu_regs";
-+ interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 12 IRQ_TYPE_LEVEL_HIGH>;
-+ interrupt-names = "vpu_jpu_irq", "vpu_ipi_irq";
-+ clocks = <&clks 168>, <&clks 140>, <&clks 142>;
-+ clock-names = "vpu_clk", "mmdc_ch0_axi", "ocram";
-+ iramsize = <0x21000>;
-+ iram = <&ocram>;
-+ resets = <&src 1>;
-+ pu-supply = <&reg_pu>;
-+ status = "disabled";
- };
-
- aipstz@0207c000 { /* AIPSTZ1 */
-@@ -293,7 +373,7 @@
- #pwm-cells = <2>;
- compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
- reg = <0x02080000 0x4000>;
-- interrupts = <0 83 0x04>;
-+ interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 62>, <&clks 145>;
- clock-names = "ipg", "per";
- };
-@@ -302,7 +382,7 @@
- #pwm-cells = <2>;
- compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
- reg = <0x02084000 0x4000>;
-- interrupts = <0 84 0x04>;
-+ interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 62>, <&clks 146>;
- clock-names = "ipg", "per";
- };
-@@ -311,7 +391,7 @@
- #pwm-cells = <2>;
- compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
- reg = <0x02088000 0x4000>;
-- interrupts = <0 85 0x04>;
-+ interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 62>, <&clks 147>;
- clock-names = "ipg", "per";
- };
-@@ -320,7 +400,7 @@
- #pwm-cells = <2>;
- compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
- reg = <0x0208c000 0x4000>;
-- interrupts = <0 86 0x04>;
-+ interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 62>, <&clks 148>;
- clock-names = "ipg", "per";
- };
-@@ -328,23 +408,25 @@
- can1: flexcan@02090000 {
- compatible = "fsl,imx6q-flexcan";
- reg = <0x02090000 0x4000>;
-- interrupts = <0 110 0x04>;
-+ interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 108>, <&clks 109>;
- clock-names = "ipg", "per";
-+ status = "disabled";
- };
-
- can2: flexcan@02094000 {
- compatible = "fsl,imx6q-flexcan";
- reg = <0x02094000 0x4000>;
-- interrupts = <0 111 0x04>;
-+ interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 110>, <&clks 111>;
- clock-names = "ipg", "per";
-+ status = "disabled";
- };
-
- gpt: gpt@02098000 {
- compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt";
- reg = <0x02098000 0x4000>;
-- interrupts = <0 55 0x04>;
-+ interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 119>, <&clks 120>;
- clock-names = "ipg", "per";
- };
-@@ -352,7 +434,8 @@
- gpio1: gpio@0209c000 {
- compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
- reg = <0x0209c000 0x4000>;
-- interrupts = <0 66 0x04 0 67 0x04>;
-+ interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 67 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
-@@ -362,7 +445,8 @@
- gpio2: gpio@020a0000 {
- compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
- reg = <0x020a0000 0x4000>;
-- interrupts = <0 68 0x04 0 69 0x04>;
-+ interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 69 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
-@@ -372,7 +456,8 @@
- gpio3: gpio@020a4000 {
- compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
- reg = <0x020a4000 0x4000>;
-- interrupts = <0 70 0x04 0 71 0x04>;
-+ interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 71 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
-@@ -382,7 +467,8 @@
- gpio4: gpio@020a8000 {
- compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
- reg = <0x020a8000 0x4000>;
-- interrupts = <0 72 0x04 0 73 0x04>;
-+ interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 73 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
-@@ -392,7 +478,8 @@
- gpio5: gpio@020ac000 {
- compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
- reg = <0x020ac000 0x4000>;
-- interrupts = <0 74 0x04 0 75 0x04>;
-+ interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 75 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
-@@ -402,7 +489,8 @@
- gpio6: gpio@020b0000 {
- compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
- reg = <0x020b0000 0x4000>;
-- interrupts = <0 76 0x04 0 77 0x04>;
-+ interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 77 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
-@@ -412,7 +500,8 @@
- gpio7: gpio@020b4000 {
- compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
- reg = <0x020b4000 0x4000>;
-- interrupts = <0 78 0x04 0 79 0x04>;
-+ interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 79 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
-@@ -421,20 +510,20 @@
-
- kpp: kpp@020b8000 {
- reg = <0x020b8000 0x4000>;
-- interrupts = <0 82 0x04>;
-+ interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- wdog1: wdog@020bc000 {
- compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
- reg = <0x020bc000 0x4000>;
-- interrupts = <0 80 0x04>;
-+ interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 0>;
- };
-
- wdog2: wdog@020c0000 {
- compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
- reg = <0x020c0000 0x4000>;
-- interrupts = <0 81 0x04>;
-+ interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 0>;
- status = "disabled";
- };
-@@ -442,14 +531,17 @@
- clks: ccm@020c4000 {
- compatible = "fsl,imx6q-ccm";
- reg = <0x020c4000 0x4000>;
-- interrupts = <0 87 0x04 0 88 0x04>;
-+ interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 88 IRQ_TYPE_LEVEL_HIGH>;
- #clock-cells = <1>;
- };
-
- anatop: anatop@020c8000 {
- compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
- reg = <0x020c8000 0x1000>;
-- interrupts = <0 49 0x04 0 54 0x04 0 127 0x04>;
-+ interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 54 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 127 IRQ_TYPE_LEVEL_HIGH>;
-
- regulator-1p1@110 {
- compatible = "fsl,anatop-regulator";
-@@ -495,7 +587,7 @@
-
- reg_arm: regulator-vddcore@140 {
- compatible = "fsl,anatop-regulator";
-- regulator-name = "cpu";
-+ regulator-name = "vddarm";
- regulator-min-microvolt = <725000>;
- regulator-max-microvolt = <1450000>;
- regulator-always-on;
-@@ -515,7 +607,6 @@
- regulator-name = "vddpu";
- regulator-min-microvolt = <725000>;
- regulator-max-microvolt = <1450000>;
-- regulator-always-on;
- anatop-reg-offset = <0x140>;
- anatop-vol-bit-shift = <9>;
- anatop-vol-bit-width = <5>;
-@@ -547,23 +638,38 @@
-
- tempmon: tempmon {
- compatible = "fsl,imx6q-tempmon";
-- interrupts = <0 49 0x04>;
-+ interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
- fsl,tempmon = <&anatop>;
- fsl,tempmon-data = <&ocotp>;
-+ clocks = <&clks 172>;
- };
-
- usbphy1: usbphy@020c9000 {
- compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
- reg = <0x020c9000 0x1000>;
-- interrupts = <0 44 0x04>;
-+ interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 182>;
-+ fsl,anatop = <&anatop>;
- };
-
- usbphy2: usbphy@020ca000 {
- compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
- reg = <0x020ca000 0x1000>;
-- interrupts = <0 45 0x04>;
-+ interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 183>;
-+ fsl,anatop = <&anatop>;
-+ };
-+
-+ usbphy_nop1: usbphy_nop1 {
-+ compatible = "usb-nop-xceiv";
-+ clocks = <&clks 182>;
-+ clock-names = "main_clk";
-+ };
-+
-+ usbphy_nop2: usbphy_nop2 {
-+ compatible = "usb-nop-xceiv";
-+ clocks = <&clks 182>;
-+ clock-names = "main_clk";
- };
-
- snvs@020cc000 {
-@@ -575,31 +681,39 @@
- snvs-rtc-lp@34 {
- compatible = "fsl,sec-v4.0-mon-rtc-lp";
- reg = <0x34 0x58>;
-- interrupts = <0 19 0x04 0 20 0x04>;
-+ interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 20 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
-
- epit1: epit@020d0000 { /* EPIT1 */
- reg = <0x020d0000 0x4000>;
-- interrupts = <0 56 0x04>;
-+ interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- epit2: epit@020d4000 { /* EPIT2 */
- reg = <0x020d4000 0x4000>;
-- interrupts = <0 57 0x04>;
-+ interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- src: src@020d8000 {
- compatible = "fsl,imx6q-src", "fsl,imx51-src";
- reg = <0x020d8000 0x4000>;
-- interrupts = <0 91 0x04 0 96 0x04>;
-+ interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 96 IRQ_TYPE_LEVEL_HIGH>;
- #reset-cells = <1>;
- };
-
- gpc: gpc@020dc000 {
- compatible = "fsl,imx6q-gpc";
- reg = <0x020dc000 0x4000>;
-- interrupts = <0 89 0x04 0 90 0x04>;
-+ interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 90 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clks 122>, <&clks 74>, <&clks 121>,
-+ <&clks 26>, <&clks 143>, <&clks 168>, <&clks 62>;
-+ clock-names = "gpu3d_core", "gpu3d_shader", "gpu2d_core",
-+ "gpu2d_axi", "openvg_axi", "vpu_axi", "ipg";
-+ pu-supply = <&reg_pu>;
- };
-
- gpr: iomuxc-gpr@020e0000 {
-@@ -610,778 +724,40 @@
- iomuxc: iomuxc@020e0000 {
- compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc";
- reg = <0x020e0000 0x4000>;
--
-- audmux {
-- pinctrl_audmux_1: audmux-1 {
-- fsl,pins = <
-- MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x80000000
-- MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x80000000
-- MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x80000000
-- MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x80000000
-- >;
-- };
--
-- pinctrl_audmux_2: audmux-2 {
-- fsl,pins = <
-- MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x80000000
-- MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x80000000
-- MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x80000000
-- MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x80000000
-- >;
-- };
--
-- pinctrl_audmux_3: audmux-3 {
-- fsl,pins = <
-- MX6QDL_PAD_DISP0_DAT16__AUD5_TXC 0x80000000
-- MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS 0x80000000
-- MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x80000000
-- >;
-- };
-- };
--
-- ecspi1 {
-- pinctrl_ecspi1_1: ecspi1grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
-- MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
-- MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
-- >;
-- };
--
-- pinctrl_ecspi1_2: ecspi1grp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
-- MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
-- MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
-- >;
-- };
-- };
--
-- ecspi3 {
-- pinctrl_ecspi3_1: ecspi3grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
-- MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
-- MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
-- >;
-- };
-- };
--
-- enet {
-- pinctrl_enet_1: enetgrp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
-- MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
-- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
-- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
-- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
-- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
-- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
-- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
-- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
-- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
-- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
-- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
-- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
-- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
-- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
-- MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
-- >;
-- };
--
-- pinctrl_enet_2: enetgrp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0
-- MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0
-- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
-- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
-- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
-- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
-- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
-- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
-- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
-- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
-- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
-- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
-- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
-- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
-- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
-- >;
-- };
--
-- pinctrl_enet_3: enetgrp-3 {
-- fsl,pins = <
-- MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
-- MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
-- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
-- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
-- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
-- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
-- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
-- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
-- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
-- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
-- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
-- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
-- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
-- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
-- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
-- MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
-- >;
-- };
-- };
--
-- esai {
-- pinctrl_esai_1: esaigrp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1b030
-- MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1b030
-- MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS 0x1b030
-- MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x1b030
-- MX6QDL_PAD_ENET_TXD1__ESAI_TX2_RX3 0x1b030
-- MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1 0x1b030
-- MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0 0x1b030
-- MX6QDL_PAD_NANDF_CS2__ESAI_TX0 0x1b030
-- MX6QDL_PAD_NANDF_CS3__ESAI_TX1 0x1b030
-- >;
-- };
--
-- pinctrl_esai_2: esaigrp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1b030
-- MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS 0x1b030
-- MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x1b030
-- MX6QDL_PAD_GPIO_5__ESAI_TX2_RX3 0x1b030
-- MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1 0x1b030
-- MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0 0x1b030
-- MX6QDL_PAD_GPIO_17__ESAI_TX0 0x1b030
-- MX6QDL_PAD_NANDF_CS3__ESAI_TX1 0x1b030
-- MX6QDL_PAD_ENET_MDIO__ESAI_RX_CLK 0x1b030
-- MX6QDL_PAD_GPIO_9__ESAI_RX_FS 0x1b030
-- >;
-- };
-- };
--
-- flexcan1 {
-- pinctrl_flexcan1_1: flexcan1grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
-- MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000
-- >;
-- };
--
-- pinctrl_flexcan1_2: flexcan1grp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x80000000
-- MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000
-- >;
-- };
-- };
--
-- flexcan2 {
-- pinctrl_flexcan2_1: flexcan2grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x80000000
-- MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x80000000
-- >;
-- };
-- };
--
-- gpmi-nand {
-- pinctrl_gpmi_nand_1: gpmi-nand-1 {
-- fsl,pins = <
-- MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
-- MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
-- MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
-- MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
-- MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
-- MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
-- MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
-- MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
-- MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
-- MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
-- MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
-- MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
-- MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
-- MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
-- MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
-- MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
-- MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
-- >;
-- };
-- };
--
-- hdmi_hdcp {
-- pinctrl_hdmi_hdcp_1: hdmihdcpgrp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1
-- MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1
-- >;
-- };
--
-- pinctrl_hdmi_hdcp_2: hdmihdcpgrp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x4001b8b1
-- MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x4001b8b1
-- >;
-- };
--
-- pinctrl_hdmi_hdcp_3: hdmihdcpgrp-3 {
-- fsl,pins = <
-- MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x4001b8b1
-- MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1
-- >;
-- };
-- };
--
-- hdmi_cec {
-- pinctrl_hdmi_cec_1: hdmicecgrp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
-- >;
-- };
--
-- pinctrl_hdmi_cec_2: hdmicecgrp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
-- >;
-- };
-- };
--
-- i2c1 {
-- pinctrl_i2c1_1: i2c1grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
-- MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
-- >;
-- };
--
-- pinctrl_i2c1_2: i2c1grp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
-- MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
-- >;
-- };
-- };
--
-- i2c2 {
-- pinctrl_i2c2_1: i2c2grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
-- MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
-- >;
-- };
--
-- pinctrl_i2c2_2: i2c2grp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
-- MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
-- >;
-- };
--
-- pinctrl_i2c2_3: i2c2grp-3 {
-- fsl,pins = <
-- MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
-- MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
-- >;
-- };
-- };
--
-- i2c3 {
-- pinctrl_i2c3_1: i2c3grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
-- MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
-- >;
-- };
--
-- pinctrl_i2c3_2: i2c3grp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
-- MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
-- >;
-- };
--
-- pinctrl_i2c3_3: i2c3grp-3 {
-- fsl,pins = <
-- MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
-- MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
-- >;
-- };
--
-- pinctrl_i2c3_4: i2c3grp-4 {
-- fsl,pins = <
-- MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
-- MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
-- >;
-- };
-- };
--
-- ipu1 {
-- pinctrl_ipu1_1: ipu1grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
-- MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
-- MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
-- MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
-- MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000000
-- MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
-- MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
-- MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
-- MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
-- MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
-- MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
-- MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
-- MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
-- MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
-- MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
-- MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
-- MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
-- MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
-- MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
-- MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
-- MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
-- MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
-- MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
-- MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
-- MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
-- MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
-- MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
-- MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
-- MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
-- >;
-- };
--
-- pinctrl_ipu1_2: ipu1grp-2 { /* parallel camera */
-- fsl,pins = <
-- MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x80000000
-- MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x80000000
-- MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x80000000
-- MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x80000000
-- MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x80000000
-- MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x80000000
-- MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x80000000
-- MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x80000000
-- MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x80000000
-- MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x80000000
-- MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x80000000
-- MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x80000000
-- >;
-- };
--
-- pinctrl_ipu1_3: ipu1grp-3 { /* parallel port 16-bit */
-- fsl,pins = <
-- MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x80000000
-- MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x80000000
-- MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x80000000
-- MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x80000000
-- MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x80000000
-- MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x80000000
-- MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x80000000
-- MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x80000000
-- MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x80000000
-- MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x80000000
-- MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x80000000
-- MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x80000000
-- MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x80000000
-- MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x80000000
-- MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x80000000
-- MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x80000000
-- MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x80000000
-- MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x80000000
-- MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x80000000
-- >;
-- };
-- };
--
-- mlb {
-- pinctrl_mlb_1: mlbgrp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_GPIO_3__MLB_CLK 0x71
-- MX6QDL_PAD_GPIO_6__MLB_SIG 0x71
-- MX6QDL_PAD_GPIO_2__MLB_DATA 0x71
-- >;
-- };
--
-- pinctrl_mlb_2: mlbgrp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_ENET_TXD1__MLB_CLK 0x71
-- MX6QDL_PAD_GPIO_6__MLB_SIG 0x71
-- MX6QDL_PAD_GPIO_2__MLB_DATA 0x71
-- >;
-- };
-- };
--
-- pwm0 {
-- pinctrl_pwm0_1: pwm0grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
-- >;
-- };
-- };
--
-- pwm3 {
-- pinctrl_pwm3_1: pwm3grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
-- >;
-- };
-- };
--
-- spdif {
-- pinctrl_spdif_1: spdifgrp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_KEY_COL3__SPDIF_IN 0x1b0b0
-- >;
-- };
--
-- pinctrl_spdif_2: spdifgrp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0
-- MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
-- >;
-- };
--
-- pinctrl_spdif_3: spdifgrp-3 {
-- fsl,pins = <
-- MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0
-- >;
-- };
-- };
--
-- uart1 {
-- pinctrl_uart1_1: uart1grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
-- MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
-- >;
-- };
-- };
--
-- uart2 {
-- pinctrl_uart2_1: uart2grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
-- MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
-- >;
-- };
--
-- pinctrl_uart2_2: uart2grp-2 { /* DTE mode */
-- fsl,pins = <
-- MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1
-- MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1
-- MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1
-- MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
-- >;
-- };
-- };
--
-- uart3 {
-- pinctrl_uart3_1: uart3grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_SD4_CLK__UART3_RX_DATA 0x1b0b1
-- MX6QDL_PAD_SD4_CMD__UART3_TX_DATA 0x1b0b1
-- MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x1b0b1
-- MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
-- >;
-- };
--
-- pinctrl_uart3_2: uart3grp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
-- MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
-- MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
-- MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
-- >;
-- };
-- };
--
-- uart4 {
-- pinctrl_uart4_1: uart4grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
-- MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
-- >;
-- };
-- };
--
-- usbotg {
-- pinctrl_usbotg_1: usbotggrp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
-- >;
-- };
--
-- pinctrl_usbotg_2: usbotggrp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
-- >;
-- };
-- };
--
-- usbh2 {
-- pinctrl_usbh2_1: usbh2grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x40013030
-- MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x40013030
-- >;
-- };
--
-- pinctrl_usbh2_2: usbh2grp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x40017030
-- >;
-- };
-- };
--
-- usbh3 {
-- pinctrl_usbh3_1: usbh3grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA 0x40013030
-- MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x40013030
-- >;
-- };
--
-- pinctrl_usbh3_2: usbh3grp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x40017030
-- >;
-- };
-- };
--
-- usdhc1 {
-- pinctrl_usdhc1_1: usdhc1grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
-- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
-- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
-- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
-- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
-- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
-- MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x17059
-- MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x17059
-- MX6QDL_PAD_NANDF_D2__SD1_DATA6 0x17059
-- MX6QDL_PAD_NANDF_D3__SD1_DATA7 0x17059
-- >;
-- };
--
-- pinctrl_usdhc1_2: usdhc1grp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
-- MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
-- MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
-- MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
-- MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
-- MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
-- >;
-- };
-- };
--
-- usdhc2 {
-- pinctrl_usdhc2_1: usdhc2grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
-- MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
-- MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
-- MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
-- MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
-- MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
-- MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059
-- MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059
-- MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059
-- MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059
-- >;
-- };
--
-- pinctrl_usdhc2_2: usdhc2grp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
-- MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
-- MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
-- MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
-- MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
-- MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
-- >;
-- };
-- };
--
-- usdhc3 {
-- pinctrl_usdhc3_1: usdhc3grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
-- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
-- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
-- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
-- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
-- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
-- MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
-- MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
-- MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
-- MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
-- >;
-- };
--
-- pinctrl_usdhc3_1_100mhz: usdhc3grp-1-100mhz { /* 100Mhz */
-- fsl,pins = <
-- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
-- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
-- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
-- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
-- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
-- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
-- MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9
-- MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9
-- MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9
-- MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9
-- >;
-- };
--
-- pinctrl_usdhc3_1_200mhz: usdhc3grp-1-200mhz { /* 200Mhz */
-- fsl,pins = <
-- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
-- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
-- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
-- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
-- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
-- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
-- MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9
-- MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9
-- MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9
-- MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9
-- >;
-- };
--
-- pinctrl_usdhc3_2: usdhc3grp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
-- MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
-- MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
-- MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
-- MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
-- MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
-- >;
-- };
-- };
--
-- usdhc4 {
-- pinctrl_usdhc4_1: usdhc4grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
-- MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
-- MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
-- MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
-- MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
-- MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
-- MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
-- MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
-- MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
-- MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
-- >;
-- };
--
-- pinctrl_usdhc4_2: usdhc4grp-2 {
-- fsl,pins = <
-- MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
-- MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
-- MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
-- MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
-- MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
-- MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
-- >;
-- };
-- };
--
-- weim {
-- pinctrl_weim_cs0_1: weim_cs0grp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0b1
-- >;
-- };
--
-- pinctrl_weim_nor_1: weim_norgrp-1 {
-- fsl,pins = <
-- MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1
-- MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1
-- MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0xb060
-- /* data */
-- MX6QDL_PAD_EIM_D16__EIM_DATA16 0x1b0b0
-- MX6QDL_PAD_EIM_D17__EIM_DATA17 0x1b0b0
-- MX6QDL_PAD_EIM_D18__EIM_DATA18 0x1b0b0
-- MX6QDL_PAD_EIM_D19__EIM_DATA19 0x1b0b0
-- MX6QDL_PAD_EIM_D20__EIM_DATA20 0x1b0b0
-- MX6QDL_PAD_EIM_D21__EIM_DATA21 0x1b0b0
-- MX6QDL_PAD_EIM_D22__EIM_DATA22 0x1b0b0
-- MX6QDL_PAD_EIM_D23__EIM_DATA23 0x1b0b0
-- MX6QDL_PAD_EIM_D24__EIM_DATA24 0x1b0b0
-- MX6QDL_PAD_EIM_D25__EIM_DATA25 0x1b0b0
-- MX6QDL_PAD_EIM_D26__EIM_DATA26 0x1b0b0
-- MX6QDL_PAD_EIM_D27__EIM_DATA27 0x1b0b0
-- MX6QDL_PAD_EIM_D28__EIM_DATA28 0x1b0b0
-- MX6QDL_PAD_EIM_D29__EIM_DATA29 0x1b0b0
-- MX6QDL_PAD_EIM_D30__EIM_DATA30 0x1b0b0
-- MX6QDL_PAD_EIM_D31__EIM_DATA31 0x1b0b0
-- /* address */
-- MX6QDL_PAD_EIM_A23__EIM_ADDR23 0xb0b1
-- MX6QDL_PAD_EIM_A22__EIM_ADDR22 0xb0b1
-- MX6QDL_PAD_EIM_A21__EIM_ADDR21 0xb0b1
-- MX6QDL_PAD_EIM_A20__EIM_ADDR20 0xb0b1
-- MX6QDL_PAD_EIM_A19__EIM_ADDR19 0xb0b1
-- MX6QDL_PAD_EIM_A18__EIM_ADDR18 0xb0b1
-- MX6QDL_PAD_EIM_A17__EIM_ADDR17 0xb0b1
-- MX6QDL_PAD_EIM_A16__EIM_ADDR16 0xb0b1
-- MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1
-- MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1
-- MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1
-- MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1
-- MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1
-- MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1
-- MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1
-- MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1
-- MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1
-- MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1
-- MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1
-- MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1
-- MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1
-- MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1
-- MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1
-- MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1
-- >;
-- };
-- };
- };
-
- ldb: ldb@020e0008 {
-- #address-cells = <1>;
-- #size-cells = <0>;
- compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
-- gpr = <&gpr>;
-+ reg = <0x020e0000 0x4000>;
-+ clocks = <&clks 135>, <&clks 136>,
-+ <&clks 39>, <&clks 40>,
-+ <&clks 41>, <&clks 42>,
-+ <&clks 184>, <&clks 185>,
-+ <&clks 210>, <&clks 211>,
-+ <&clks 212>, <&clks 213>;
-+ clock-names = "ldb_di0", "ldb_di1",
-+ "ipu1_di0_sel", "ipu1_di1_sel",
-+ "ipu2_di0_sel", "ipu2_di1_sel",
-+ "di0_div_3_5", "di1_div_3_5",
-+ "di0_div_7", "di1_div_7",
-+ "di0_div_sel", "di1_div_sel";
- status = "disabled";
--
-- lvds-channel@0 {
-- reg = <0>;
-- status = "disabled";
-- };
--
-- lvds-channel@1 {
-- reg = <1>;
-- status = "disabled";
-- };
- };
-
- dcic1: dcic@020e4000 {
- reg = <0x020e4000 0x4000>;
-- interrupts = <0 124 0x04>;
-+ interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- dcic2: dcic@020e8000 {
- reg = <0x020e8000 0x4000>;
-- interrupts = <0 125 0x04>;
-+ interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- sdma: sdma@020ec000 {
- compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
- reg = <0x020ec000 0x4000>;
-- interrupts = <0 2 0x04>;
-+ interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 155>, <&clks 155>;
- clock-names = "ipg", "ahb";
- #dma-cells = <3>;
-@@ -1396,9 +772,29 @@
- reg = <0x02100000 0x100000>;
- ranges;
-
-- caam@02100000 {
-- reg = <0x02100000 0x40000>;
-- interrupts = <0 105 0x04 0 106 0x04>;
-+ crypto: caam@02100000 {
-+ compatible = "fsl,sec-v4.0";
-+ #address-cells = <1>;
-+ #size-cells = <1>;
-+ reg = <0x2100000 0x40000>;
-+ ranges = <0 0x2100000 0x40000>;
-+ interrupt-parent = <&intc>; /* interrupts = <0 92 0x4>; */
-+ clocks = <&clks 214>, <&clks 215>, <&clks 216>, <&clks 196>;
-+ clock-names = "caam_mem", "caam_aclk", "caam_ipg", "caam_emi_slow";
-+
-+ sec_jr0: jr0@1000 {
-+ compatible = "fsl,sec-v4.0-job-ring";
-+ reg = <0x1000 0x1000>;
-+ interrupt-parent = <&intc>;
-+ interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
-+ };
-+
-+ sec_jr1: jr1@2000 {
-+ compatible = "fsl,sec-v4.0-job-ring";
-+ reg = <0x2000 0x1000>;
-+ interrupt-parent = <&intc>;
-+ interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
-+ };
- };
-
- aipstz@0217c000 { /* AIPSTZ2 */
-@@ -1408,7 +804,7 @@
- usbotg: usb@02184000 {
- compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
- reg = <0x02184000 0x200>;
-- interrupts = <0 43 0x04>;
-+ interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 162>;
- fsl,usbphy = <&usbphy1>;
- fsl,usbmisc = <&usbmisc 0>;
-@@ -1418,7 +814,7 @@
- usbh1: usb@02184200 {
- compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
- reg = <0x02184200 0x200>;
-- interrupts = <0 40 0x04>;
-+ interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 162>;
- fsl,usbphy = <&usbphy2>;
- fsl,usbmisc = <&usbmisc 1>;
-@@ -1428,18 +824,24 @@
- usbh2: usb@02184400 {
- compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
- reg = <0x02184400 0x200>;
-- interrupts = <0 41 0x04>;
-+ interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 162>;
- fsl,usbmisc = <&usbmisc 2>;
-+ phy_type = "hsic";
-+ fsl,usbphy = <&usbphy_nop1>;
-+ fsl,anatop = <&anatop>;
- status = "disabled";
- };
-
- usbh3: usb@02184600 {
- compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
- reg = <0x02184600 0x200>;
-- interrupts = <0 42 0x04>;
-+ interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 162>;
- fsl,usbmisc = <&usbmisc 3>;
-+ phy_type = "hsic";
-+ fsl,usbphy = <&usbphy_nop2>;
-+ fsl,anatop = <&anatop>;
- status = "disabled";
- };
-
-@@ -1453,7 +855,9 @@
- fec: ethernet@02188000 {
- compatible = "fsl,imx6q-fec";
- reg = <0x02188000 0x4000>;
-- interrupts = <0 118 0x04 0 119 0x04>;
-+ interrupts-extended =
-+ <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>,
-+ <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 117>, <&clks 117>, <&clks 190>;
- clock-names = "ipg", "ahb", "ptp";
- status = "disabled";
-@@ -1461,13 +865,15 @@
-
- mlb@0218c000 {
- reg = <0x0218c000 0x4000>;
-- interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>;
-+ interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 117 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 126 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- usdhc1: usdhc@02190000 {
- compatible = "fsl,imx6q-usdhc";
- reg = <0x02190000 0x4000>;
-- interrupts = <0 22 0x04>;
-+ interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 163>, <&clks 163>, <&clks 163>;
- clock-names = "ipg", "ahb", "per";
- bus-width = <4>;
-@@ -1477,7 +883,7 @@
- usdhc2: usdhc@02194000 {
- compatible = "fsl,imx6q-usdhc";
- reg = <0x02194000 0x4000>;
-- interrupts = <0 23 0x04>;
-+ interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 164>, <&clks 164>, <&clks 164>;
- clock-names = "ipg", "ahb", "per";
- bus-width = <4>;
-@@ -1487,7 +893,7 @@
- usdhc3: usdhc@02198000 {
- compatible = "fsl,imx6q-usdhc";
- reg = <0x02198000 0x4000>;
-- interrupts = <0 24 0x04>;
-+ interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 165>, <&clks 165>, <&clks 165>;
- clock-names = "ipg", "ahb", "per";
- bus-width = <4>;
-@@ -1497,7 +903,7 @@
- usdhc4: usdhc@0219c000 {
- compatible = "fsl,imx6q-usdhc";
- reg = <0x0219c000 0x4000>;
-- interrupts = <0 25 0x04>;
-+ interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 166>, <&clks 166>, <&clks 166>;
- clock-names = "ipg", "ahb", "per";
- bus-width = <4>;
-@@ -1509,7 +915,7 @@
- #size-cells = <0>;
- compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
- reg = <0x021a0000 0x4000>;
-- interrupts = <0 36 0x04>;
-+ interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 125>;
- status = "disabled";
- };
-@@ -1519,7 +925,7 @@
- #size-cells = <0>;
- compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
- reg = <0x021a4000 0x4000>;
-- interrupts = <0 37 0x04>;
-+ interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 126>;
- status = "disabled";
- };
-@@ -1529,7 +935,7 @@
- #size-cells = <0>;
- compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
- reg = <0x021a8000 0x4000>;
-- interrupts = <0 38 0x04>;
-+ interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 127>;
- status = "disabled";
- };
-@@ -1538,6 +944,11 @@
- reg = <0x021ac000 0x4000>;
- };
-
-+ mmdc0-1@021b0000 { /* MMDC0-1 */
-+ compatible = "fsl,imx6q-mmdc-combine";
-+ reg = <0x021b0000 0x8000>;
-+ };
-+
- mmdc0: mmdc@021b0000 { /* MMDC0 */
- compatible = "fsl,imx6q-mmdc";
- reg = <0x021b0000 0x4000>;
-@@ -1550,23 +961,29 @@
- weim: weim@021b8000 {
- compatible = "fsl,imx6q-weim";
- reg = <0x021b8000 0x4000>;
-- interrupts = <0 14 0x04>;
-+ interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 196>;
- };
-
-- ocotp: ocotp@021bc000 {
-- compatible = "fsl,imx6q-ocotp", "syscon";
-+ ocotp: ocotp-ctrl@021bc000 {
-+ compatible = "syscon";
- reg = <0x021bc000 0x4000>;
- };
-
-+ ocotp-fuse@021bc000 {
-+ compatible = "fsl,imx6q-ocotp";
-+ reg = <0x021bc000 0x4000>;
-+ clocks = <&clks 128>;
-+ };
-+
- tzasc@021d0000 { /* TZASC1 */
- reg = <0x021d0000 0x4000>;
-- interrupts = <0 108 0x04>;
-+ interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- tzasc@021d4000 { /* TZASC2 */
- reg = <0x021d4000 0x4000>;
-- interrupts = <0 109 0x04>;
-+ interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- audmux: audmux@021d8000 {
-@@ -1575,23 +992,32 @@
- status = "disabled";
- };
-
-- mipi@021dc000 { /* MIPI-CSI */
-+ mipi_csi: mipi_csi@021dc000 {
-+ compatible = "fsl,imx6q-mipi-csi2";
- reg = <0x021dc000 0x4000>;
-- };
--
-- mipi@021e0000 { /* MIPI-DSI */
-- reg = <0x021e0000 0x4000>;
-+ interrupts = <0 100 0x04>, <0 101 0x04>;
-+ clocks = <&clks 138>, <&clks 53>, <&clks 204>;
-+ /* Note: clks 138 is hsi_tx, however, the dphy_c
-+ * hsi_tx and pll_refclk use the same clk gate.
-+ * In current clk driver, open/close clk gate do
-+ * use hsi_tx for a temporary debug purpose.
-+ */
-+ clock-names = "dphy_clk", "pixel_clk", "cfg_clk";
-+ status = "disabled";
- };
-
- vdoa@021e4000 {
-+ compatible = "fsl,imx6q-vdoa";
- reg = <0x021e4000 0x4000>;
-- interrupts = <0 18 0x04>;
-+ interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clks 202>;
-+ iram = <&ocram>;
- };
-
- uart2: serial@021e8000 {
- compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
- reg = <0x021e8000 0x4000>;
-- interrupts = <0 27 0x04>;
-+ interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 160>, <&clks 161>;
- clock-names = "ipg", "per";
- dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
-@@ -1602,7 +1028,7 @@
- uart3: serial@021ec000 {
- compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
- reg = <0x021ec000 0x4000>;
-- interrupts = <0 28 0x04>;
-+ interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 160>, <&clks 161>;
- clock-names = "ipg", "per";
- dmas = <&sdma 29 4 0>, <&sdma 30 4 0>;
-@@ -1613,7 +1039,7 @@
- uart4: serial@021f0000 {
- compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
- reg = <0x021f0000 0x4000>;
-- interrupts = <0 29 0x04>;
-+ interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 160>, <&clks 161>;
- clock-names = "ipg", "per";
- dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
-@@ -1624,7 +1050,7 @@
- uart5: serial@021f4000 {
- compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
- reg = <0x021f4000 0x4000>;
-- interrupts = <0 30 0x04>;
-+ interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clks 160>, <&clks 161>;
- clock-names = "ipg", "per";
- dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
-@@ -1634,13 +1060,18 @@
- };
-
- ipu1: ipu@02400000 {
-- #crtc-cells = <1>;
- compatible = "fsl,imx6q-ipu";
- reg = <0x02400000 0x400000>;
-- interrupts = <0 6 0x4 0 5 0x4>;
-- clocks = <&clks 130>, <&clks 131>, <&clks 132>;
-- clock-names = "bus", "di0", "di1";
-+ interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>,
-+ <0 5 IRQ_TYPE_LEVEL_HIGH>;
-+ clocks = <&clks 130>, <&clks 131>, <&clks 132>,
-+ <&clks 39>, <&clks 40>,
-+ <&clks 135>, <&clks 136>;
-+ clock-names = "bus", "di0", "di1",
-+ "di0_sel", "di1_sel",
-+ "ldb_di0", "ldb_di1";
- resets = <&src 2>;
-+ bypass_reset = <0>;
- };
- };
- };
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk-csi.dts linux-3.14.54/arch/arm/boot/dts/imx6sl-evk-csi.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk-csi.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/imx6sl-evk-csi.dts 2015-10-12 10:56:17.837351177 +0200
-@@ -0,0 +1,27 @@
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts linux-3.14.54/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts 2015-10-15 15:51:21.312914632 +0200
+@@ -0,0 +1,432 @@
+/*
-+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
++ * Copyright 2013 Data Modul AG
+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
+ */
+
-+#include "imx6sl-evk.dts"
++/dts-v1/;
+
-+/ {
-+ csi_v4l2_cap {
-+ status = "okay";
-+ };
-+};
++#include <dt-bindings/gpio/gpio.h>
++#include "imx6q.dtsi"
+
-+&csi {
-+ status = "okay";
-+};
++/ {
++ model = "Data Modul eDM-QMX6 Board";
++ compatible = "dmo,imx6q-edmqmx6", "fsl,imx6q";
+
-+&i2c3 {
-+ status = "okay";
-+};
++ chosen {
++ stdout-path = &uart2;
++ };
+
-+&epdc {
-+ status = "disabled";
-+};
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk.dts linux-3.14.54/arch/arm/boot/dts/imx6sl-evk.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6sl-evk.dts 2015-10-12 10:56:17.837351177 +0200
-@@ -8,6 +8,8 @@
-
- /dts-v1/;
-
-+#include <dt-bindings/gpio/gpio.h>
-+#include <dt-bindings/input/input.h>
- #include "imx6sl.dtsi"
-
- / {
-@@ -18,11 +20,26 @@
- reg = <0x80000000 0x40000000>;
- };
-
-+ leds {
-+ compatible = "gpio-leds";
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_led>;
++ aliases {
++ gpio7 = &stmpe_gpio1;
++ gpio8 = &stmpe_gpio2;
++ stmpe-i2c0 = &stmpe1;
++ stmpe-i2c1 = &stmpe2;
++ };
+
-+ user {
-+ label = "debug";
-+ gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
-+ linux,default-trigger = "heartbeat";
-+ };
++ memory {
++ reg = <0x10000000 0x80000000>;
+ };
+
- regulators {
- compatible = "simple-bus";
++ regulators {
++ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
-
-- reg_usb_otg1_vbus: usb_otg1_vbus {
-+ reg_usb_otg1_vbus: regulator@0 {
- compatible = "regulator-fixed";
++
++ reg_3p3v: regulator@0 {
++ compatible = "regulator-fixed";
+ reg = <0>;
- regulator-name = "usb_otg1_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
-@@ -30,22 +47,63 @@
- enable-active-high;
- };
-
-- reg_usb_otg2_vbus: usb_otg2_vbus {
-+ reg_usb_otg2_vbus: regulator@1 {
- compatible = "regulator-fixed";
-+ reg = <1>;
- regulator-name = "usb_otg2_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio4 2 0>;
- enable-active-high;
- };
++ regulator-name = "3P3V";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
+
-+ reg_aud3v: regulator@2 {
++ reg_usb_otg_switch: regulator@1 {
+ compatible = "regulator-fixed";
-+ reg = <2>;
-+ regulator-name = "wm8962-supply-3v15";
-+ regulator-min-microvolt = <3150000>;
-+ regulator-max-microvolt = <3150000>;
++ reg = <1>;
++ regulator-name = "usb_otg_switch";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ gpio = <&gpio7 12 0>;
+ regulator-boot-on;
++ regulator-always-on;
+ };
+
-+ reg_aud4v: regulator@3 {
++ reg_usb_host1: regulator@2 {
+ compatible = "regulator-fixed";
-+ reg = <3>;
-+ regulator-name = "wm8962-supply-4v2";
-+ regulator-min-microvolt = <4325000>;
-+ regulator-max-microvolt = <4325000>;
-+ regulator-boot-on;
++ reg = <2>;
++ regulator-name = "usb_host1_en";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ gpio = <&gpio3 31 0>;
++ enable-active-high;
+ };
- };
++ };
+
-+ sound {
-+ compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
-+ model = "wm8962-audio";
-+ ssi-controller = <&ssi2>;
-+ audio-codec = <&codec>;
-+ audio-routing =
-+ "Headphone Jack", "HPOUTL",
-+ "Headphone Jack", "HPOUTR",
-+ "Ext Spk", "SPKOUTL",
-+ "Ext Spk", "SPKOUTR",
-+ "AMIC", "MICBIAS",
-+ "IN3R", "AMIC";
-+ mux-int-port = <2>;
-+ mux-ext-port = <3>;
++ gpio-leds {
++ compatible = "gpio-leds";
++
++ led-blue {
++ label = "blue";
++ gpios = <&stmpe_gpio1 8 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ };
++
++ led-green {
++ label = "green";
++ gpios = <&stmpe_gpio1 9 GPIO_ACTIVE_HIGH>;
++ };
++
++ led-pink {
++ label = "pink";
++ gpios = <&stmpe_gpio1 10 GPIO_ACTIVE_HIGH>;
++ };
++
++ led-red {
++ label = "red";
++ gpios = <&stmpe_gpio1 11 GPIO_ACTIVE_HIGH>;
++ };
+ };
+};
+
-+&audmux {
++&ecspi5 {
+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_audmux3>;
-+ status = "okay";
- };
-
- &ecspi1 {
- fsl,spi-num-chipselects = <1>;
- cs-gpios = <&gpio4 11 0>;
- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_ecspi1_1>;
-+ pinctrl-0 = <&pinctrl_ecspi1>;
- status = "okay";
-
- flash: m25p80@0 {
-@@ -57,18 +115,326 @@
- };
- };
-
-+&csi {
++ pinctrl-0 = <&pinctrl_ecspi5>;
++ fsl,spi-num-chipselects = <1>;
++ cs-gpios = <&gpio1 12 0>;
+ status = "okay";
++
++ flash: m25p80@0 {
++ compatible = "m25p80";
++ spi-max-frequency = <40000000>;
++ reg = <0>;
++ };
+};
+
-+&cpu0 {
-+ arm-supply = <&sw1a_reg>;
-+ soc-supply = <&sw1c_reg>;
-+ pu-supply = <&pu_dummy>; /* use pu_dummy if VDDSOC share with VDDPU */
++&fec {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_enet>;
++ phy-mode = "rgmii";
++ phy-reset-gpios = <&gpio3 23 0>;
++ phy-supply = <&vgen2_1v2_eth>;
++ status = "okay";
+};
+
- &fec {
- pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_fec_1>;
-+ pinctrl-0 = <&pinctrl_fec>;
- phy-mode = "rmii";
- status = "okay";
- };
-
-+&i2c1 {
++&i2c2 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c1>;
++ pinctrl-0 = <&pinctrl_i2c2
++ &pinctrl_stmpe1
++ &pinctrl_stmpe2
++ &pinctrl_pfuze>;
+ status = "okay";
+
+ pmic: pfuze100@08 {
+ compatible = "fsl,pfuze100";
+ reg = <0x08>;
++ interrupt-parent = <&gpio3>;
++ interrupts = <20 8>;
+
+ regulators {
+ sw1a_reg: sw1ab {
@@ -12845,7 +9176,6 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk.dts linux-3.14.54/arch
+ regulator-max-microvolt = <1875000>;
+ regulator-boot-on;
+ regulator-always-on;
-+ regulator-ramp-delay = <6250>;
+ };
+
+ sw1c_reg: sw1c {
@@ -12853,7 +9183,6 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk.dts linux-3.14.54/arch
+ regulator-max-microvolt = <1875000>;
+ regulator-boot-on;
+ regulator-always-on;
-+ regulator-ramp-delay = <6250>;
+ };
+
+ sw2_reg: sw2 {
@@ -12878,13 +9207,15 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk.dts linux-3.14.54/arch
+ };
+
+ sw4_reg: sw4 {
-+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <3300000>;
++ regulator-min-microvolt = <400000>;
++ regulator-max-microvolt = <1975000>;
++ regulator-always-on;
+ };
+
+ swbst_reg: swbst {
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5150000>;
++ regulator-always-on;
+ };
+
+ snvs_reg: vsnvs {
@@ -12902,17 +9233,18 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk.dts linux-3.14.54/arch
+ vgen1_reg: vgen1 {
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1550000>;
-+ regulator-always-on;
+ };
+
-+ vgen2_reg: vgen2 {
++ vgen2_1v2_eth: vgen2 {
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1550000>;
+ };
+
-+ vgen3_reg: vgen3 {
++ vdd_high_in: vgen3 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ regulator-always-on;
+ };
+
+ vgen4_reg: vgen4 {
@@ -12935,60 +9267,930 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk.dts linux-3.14.54/arch
+ };
+ };
+
++ stmpe1: stmpe1601@40 {
++ compatible = "st,stmpe1601";
++ reg = <0x40>;
++ interrupts = <30 0>;
++ interrupt-parent = <&gpio3>;
++ vcc-supply = <&sw2_reg>;
++ vio-supply = <&sw2_reg>;
++
++ stmpe_gpio1: stmpe_gpio {
++ #gpio-cells = <2>;
++ compatible = "st,stmpe-gpio";
++ };
++ };
++
++ stmpe2: stmpe1601@44 {
++ compatible = "st,stmpe1601";
++ reg = <0x44>;
++ interrupts = <2 0>;
++ interrupt-parent = <&gpio5>;
++ vcc-supply = <&sw2_reg>;
++ vio-supply = <&sw2_reg>;
++
++ stmpe_gpio2: stmpe_gpio {
++ #gpio-cells = <2>;
++ compatible = "st,stmpe-gpio";
++ };
++ };
++
++ temp1: ad7414@4c {
++ compatible = "ad,ad7414";
++ reg = <0x4c>;
++ };
++
++ temp2: ad7414@4d {
++ compatible = "ad,ad7414";
++ reg = <0x4d>;
++ };
++
++ rtc: m41t62@68 {
++ compatible = "stm,m41t62";
++ reg = <0x68>;
++ };
++};
++
++&iomuxc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_hog>;
++
++ imx6q-dmo-edmqmx6 {
++ pinctrl_hog: hoggrp {
++ fsl,pins = <
++ MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000
++ MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x80000000
++ >;
++ };
++
++ pinctrl_ecspi5: ecspi5rp-1 {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT0__ECSPI5_MISO 0x80000000
++ MX6QDL_PAD_SD1_CMD__ECSPI5_MOSI 0x80000000
++ MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x80000000
++ MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x80000000
++ >;
++ };
++
++ pinctrl_enet: enetgrp {
++ fsl,pins = <
++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
++ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
++ >;
++ };
++
++ pinctrl_i2c2: i2c2grp {
++ fsl,pins = <
++ MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
++ >;
++ };
++
++ pinctrl_pfuze: pfuze100grp1 {
++ fsl,pins = <
++ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000
++ >;
++ };
++
++ pinctrl_stmpe1: stmpe1grp {
++ fsl,pins = <MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x80000000>;
++ };
++
++ pinctrl_stmpe2: stmpe2grp {
++ fsl,pins = <MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000>;
++ };
++
++ pinctrl_uart1: uart1grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
++ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
++ >;
++ };
++
++ pinctrl_uart2: uart2grp {
++ fsl,pins = <
++ MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
++ MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
++ >;
++ };
++
++ pinctrl_usbotg: usbotggrp {
++ fsl,pins = <
++ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
++ >;
++ };
++
++ pinctrl_usdhc3: usdhc3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
++ >;
++ };
++
++ pinctrl_usdhc4: usdhc4grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
++ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
++ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
++ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
++ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
++ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
++ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
++ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
++ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
++ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
++ >;
++ };
++ };
++};
++
++&sata {
++ status = "okay";
++};
++
++&uart1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart1>;
++ status = "okay";
++};
++
++&uart2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart2>;
++ status = "okay";
++};
++
++&usbh1 {
++ vbus-supply = <&reg_usb_host1>;
++ disable-over-current;
++ dr_mode = "host";
++ status = "okay";
++};
++
++&usbotg {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usbotg>;
++ disable-over-current;
++ status = "okay";
++};
++
++&usdhc3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc3>;
++ vmmc-supply = <&reg_3p3v>;
++ status = "okay";
++};
++
++&usdhc4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc4>;
++ vmmc-supply = <&reg_3p3v>;
++ non-removable;
++ bus-width = <8>;
++ status = "okay";
++};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q.dtsi linux-3.14.54/arch/arm/boot/dts/imx6q.dtsi
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q.dtsi 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6q.dtsi 2015-10-15 15:51:21.312914632 +0200
+@@ -8,10 +8,16 @@
+ *
+ */
+
++#include <dt-bindings/interrupt-controller/irq.h>
+ #include "imx6q-pinfunc.h"
+ #include "imx6qdl.dtsi"
+
+ / {
++ aliases {
++ ipu1 = &ipu2;
++ spi4 = &ecspi5;
++ };
++
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+@@ -25,8 +31,17 @@
+ /* kHz uV */
+ 1200000 1275000
+ 996000 1250000
++ 852000 1250000
+ 792000 1150000
+- 396000 950000
++ 396000 975000
++ >;
++ fsl,soc-operating-points = <
++ /* ARM kHz SOC-PU uV */
++ 1200000 1275000
++ 996000 1250000
++ 852000 1250000
++ 792000 1175000
++ 396000 1175000
+ >;
+ clock-latency = <61036>; /* two CLK32 periods */
+ clocks = <&clks 104>, <&clks 6>, <&clks 16>,
+@@ -61,12 +76,77 @@
+ };
+
+ soc {
++
++ busfreq { /* BUSFREQ */
++ compatible = "fsl,imx6_busfreq";
++ clocks = <&clks 171>, <&clks 6>, <&clks 11>, <&clks 104>, <&clks 172>, <&clks 58>,
++ <&clks 18>, <&clks 60>, <&clks 20>, <&clks 3>;
++ clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm", "pll3_usb_otg", "periph",
++ "periph_pre", "periph_clk2", "periph_clk2_sel", "osc";
++ interrupts = <0 107 0x04>, <0 112 0x4>, <0 113 0x4>, <0 114 0x4>;
++ interrupt-names = "irq_busfreq_0", "irq_busfreq_1", "irq_busfreq_2", "irq_busfreq_3";
++ fsl,max_ddr_freq = <528000000>;
++ };
++
++ gpu@00130000 {
++ compatible = "fsl,imx6q-gpu";
++ reg = <0x00130000 0x4000>, <0x00134000 0x4000>,
++ <0x02204000 0x4000>, <0x0 0x0>;
++ reg-names = "iobase_3d", "iobase_2d",
++ "iobase_vg", "phys_baseaddr";
++ interrupts = <0 9 0x04>, <0 10 0x04>,<0 11 0x04>;
++ interrupt-names = "irq_3d", "irq_2d", "irq_vg";
++ clocks = <&clks 26>, <&clks 143>,
++ <&clks 27>, <&clks 121>,
++ <&clks 122>, <&clks 74>;
++ clock-names = "gpu2d_axi_clk", "openvg_axi_clk",
++ "gpu3d_axi_clk", "gpu2d_clk",
++ "gpu3d_clk", "gpu3d_shader_clk";
++ resets = <&src 0>, <&src 3>, <&src 3>;
++ reset-names = "gpu3d", "gpu2d", "gpuvg";
++ pu-supply = <&reg_pu>;
++ };
++
+ ocram: sram@00900000 {
+ compatible = "mmio-sram";
+ reg = <0x00900000 0x40000>;
+ clocks = <&clks 142>;
+ };
+
++ hdmi_core: hdmi_core@00120000 {
++ compatible = "fsl,imx6q-hdmi-core";
++ reg = <0x00120000 0x9000>;
++ clocks = <&clks 124>, <&clks 123>;
++ clock-names = "hdmi_isfr", "hdmi_iahb";
++ status = "disabled";
++ };
++
++ hdmi_video: hdmi_video@020e0000 {
++ compatible = "fsl,imx6q-hdmi-video";
++ reg = <0x020e0000 0x1000>;
++ reg-names = "hdmi_gpr";
++ interrupts = <0 115 0x04>;
++ clocks = <&clks 124>, <&clks 123>;
++ clock-names = "hdmi_isfr", "hdmi_iahb";
++ status = "disabled";
++ };
++
++ hdmi_audio: hdmi_audio@00120000 {
++ compatible = "fsl,imx6q-hdmi-audio";
++ clocks = <&clks 124>, <&clks 123>;
++ clock-names = "hdmi_isfr", "hdmi_iahb";
++ dmas = <&sdma 2 23 0>;
++ dma-names = "tx";
++ status = "disabled";
++ };
++
++ hdmi_cec: hdmi_cec@00120000 {
++ compatible = "fsl,imx6q-hdmi-cec";
++ interrupts = <0 115 0x04>;
++ status = "disabled";
++ };
++
++
+ aips-bus@02000000 { /* AIPS1 */
+ spba-bus@02000000 {
+ ecspi5: ecspi@02018000 {
+@@ -74,13 +154,17 @@
+ #size-cells = <0>;
+ compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
+ reg = <0x02018000 0x4000>;
+- interrupts = <0 35 0x04>;
++ interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 116>, <&clks 116>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+ };
+
++ vpu@02040000 {
++ status = "okay";
++ };
++
+ iomuxc: iomuxc@020e0000 {
+ compatible = "fsl,imx6q-iomuxc";
+
+@@ -122,40 +206,40 @@
+ };
+ };
+
++ aips-bus@02100000 { /* AIPS2 */
++ mipi_dsi: mipi@021e0000 {
++ compatible = "fsl,imx6q-mipi-dsi";
++ reg = <0x021e0000 0x4000>;
++ interrupts = <0 102 0x04>;
++ gpr = <&gpr>;
++ clocks = <&clks 138>, <&clks 209>;
++ clock-names = "mipi_pllref_clk", "mipi_cfg_clk";
++ status = "disabled";
++ };
++ };
++
+ sata: sata@02200000 {
+ compatible = "fsl,imx6q-ahci";
+ reg = <0x02200000 0x4000>;
+- interrupts = <0 39 0x04>;
++ interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks 154>, <&clks 187>, <&clks 105>;
+ clock-names = "sata", "sata_ref", "ahb";
+ status = "disabled";
+ };
+
+ ipu2: ipu@02800000 {
+- #crtc-cells = <1>;
+ compatible = "fsl,imx6q-ipu";
+ reg = <0x02800000 0x400000>;
+- interrupts = <0 8 0x4 0 7 0x4>;
+- clocks = <&clks 133>, <&clks 134>, <&clks 137>;
+- clock-names = "bus", "di0", "di1";
++ interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>,
++ <0 7 IRQ_TYPE_LEVEL_HIGH>;
++ clocks = <&clks 133>, <&clks 134>, <&clks 137>,
++ <&clks 41>, <&clks 42>,
++ <&clks 135>, <&clks 136>;
++ clock-names = "bus", "di0", "di1",
++ "di0_sel", "di1_sel",
++ "ldb_di0", "ldb_di1";
+ resets = <&src 4>;
++ bypass_reset = <0>;
+ };
+ };
+ };
+-
+-&ldb {
+- clocks = <&clks 33>, <&clks 34>,
+- <&clks 39>, <&clks 40>, <&clks 41>, <&clks 42>,
+- <&clks 135>, <&clks 136>;
+- clock-names = "di0_pll", "di1_pll",
+- "di0_sel", "di1_sel", "di2_sel", "di3_sel",
+- "di0", "di1";
+-
+- lvds-channel@0 {
+- crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>;
+- };
+-
+- lvds-channel@1 {
+- crtcs = <&ipu1 0>, <&ipu1 1>, <&ipu2 0>, <&ipu2 1>;
+- };
+-};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gk802.dts linux-3.14.54/arch/arm/boot/dts/imx6q-gk802.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gk802.dts 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-gk802.dts 2015-10-15 15:51:21.344912526 +0200
+@@ -0,0 +1,229 @@
++/*
++ * Copyright (C) 2013 Philipp Zabel
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++/dts-v1/;
++#include "imx6q.dtsi"
++
++/ {
++ model = "Zealz GK802";
++ compatible = "zealz,imx6q-gk802", "fsl,imx6q";
++
++ aliases {
++ mxcfb0 = &mxcfb1;
++ };
++
++ chosen {
++ stdout-path = &uart4;
++ };
++
++ memory {
++ reg = <0x10000000 0x40000000>;
++ };
++
+ regulators {
+ compatible = "simple-bus";
++ #address-cells = <1>;
++ #size-cells = <0>;
+
-+ reg_lcd_3v3: lcd-3v3 {
++ reg_3p3v: regulator@0 {
+ compatible = "regulator-fixed";
-+ regulator-name = "lcd-3v3";
-+ gpio = <&gpio4 3 0>;
-+ enable-active-high;
++ reg = <0>;
++ regulator-name = "3P3V";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
+ };
++
++ reg_usb_h1_vbus: usb_h1_vbus {
++ compatible = "regulator-fixed";
++ regulator-name = "usb_h1_vbus";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ gpio = <&gpio2 0 0>;
++ };
+ };
+
-+ backlight {
-+ compatible = "pwm-backlight";
-+ pwms = <&pwm1 0 5000000>;
-+ brightness-levels = <0 4 8 16 32 64 128 255>;
-+ default-brightness-level = <6>;
++ gpio-keys {
++ compatible = "gpio-keys";
++
++ recovery-button {
++ label = "recovery";
++ gpios = <&gpio3 16 1>;
++ linux,code = <0x198>; /* KEY_RESTART */
++ gpio-key,wakeup;
++ };
++
++ };
++
++ sound-hdmi {
++ compatible = "fsl,imx6q-audio-hdmi",
++ "fsl,imx-audio-hdmi";
++ model = "imx-audio-hdmi";
++ hdmi-controller = <&hdmi_audio>;
++ };
++
++ mxcfb1: fb@0 {
++ compatible = "fsl,mxc_sdc_fb";
++ disp_dev = "hdmi";
++ interface_pix_fmt = "RGB24";
++ mode_str ="1920x1080M@60";
++ default_bpp = <32>;
++ int_clk = <0>;
++ late_init = <0>;
++ status = "okay";
++ };
++};
++
++&hdmi_core {
++ ipu_id = <0>;
++ disp_id = <0>;
++ status = "okay";
++};
++
++&hdmi_video {
++ fsl,phy_reg_vlev = <0x0294>;
++ fsl,phy_reg_cksymtx = <0x800d>;
++ status = "okay";
++};
++
++&hdmi_audio {
++ status = "okay";
++};
++
++
++/* Internal I2C */
++&i2c2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c2>;
++ clock-frequency = <100000>;
++ status = "okay";
++
++ /* SDMC DM2016 1024 bit EEPROM + 128 bit OTP */
++ eeprom: dm2016@51 {
++ compatible = "sdmc,dm2016";
++ reg = <0x51>;
+ };
++};
+
-+ csi_v4l2_cap {
-+ compatible = "fsl,imx6sl-csi-v4l2";
-+ status = "okay";
++/* External I2C via HDMI */
++&i2c3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c3>;
++ clock-frequency = <100000>;
++ status = "okay";
++
++ ddc: imx6_hdmi_i2c@50 {
++ compatible = "fsl,imx6-hdmi-i2c";
++ reg = <0x50>;
+ };
++};
+
-+ pxp_v4l2_out {
-+ compatible = "fsl,imx6sl-pxp-v4l2";
++&iomuxc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_hog>;
++
++ imx6q-gk802 {
++ pinctrl_hog: hoggrp {
++ fsl,pins = <
++ /* Recovery button, active-low */
++ MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x100b1
++ /* RTL8192CU enable GPIO, active-low */
++ MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
++ >;
++ };
++
++ pinctrl_i2c2: i2c2grp {
++ fsl,pins = <
++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
++ >;
++ };
++
++ pinctrl_i2c3: i2c3grp {
++ fsl,pins = <
++ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
++ MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1
++ >;
++ };
++
++ pinctrl_uart4: uart4grp {
++ fsl,pins = <
++ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
++ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
++ >;
++ };
++
++ pinctrl_usdhc3: usdhc3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
++ >;
++ };
++
++ pinctrl_usdhc4: usdhc4grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
++ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
++ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
++ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
++ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
++ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
++ >;
++ };
++ };
++};
++
++&uart2 {
++ status = "okay";
++};
++
++&uart4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart4>;
++ status = "okay";
++};
++
++/* External USB-A port (USBOTG) */
++&usbotg {
++ phy_type = "utmi";
++ dr_mode = "host";
++ disable-over-current;
++ status = "okay";
++};
++
++/* Internal USB port (USBH1), connected to RTL8192CU */
++&usbh1 {
++ phy_type = "utmi";
++ dr_mode = "host";
++ vbus-supply = <&reg_usb_h1_vbus>;
++ disable-over-current;
++ status = "okay";
++};
++
++/* External microSD */
++&usdhc3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc3>;
++ bus-width = <4>;
++ cd-gpios = <&gpio6 11 0>;
++ vmmc-supply = <&reg_3p3v>;
++ status = "okay";
++};
++
++/* Internal microSD */
++&usdhc4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc4>;
++ bus-width = <4>;
++ vmmc-supply = <&reg_3p3v>;
++ status = "okay";
++};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw51xx.dts linux-3.14.54/arch/arm/boot/dts/imx6q-gw51xx.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw51xx.dts 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-gw51xx.dts 2015-10-15 15:51:21.344912526 +0200
+@@ -0,0 +1,19 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6q.dtsi"
++#include "imx6qdl-gw54xx.dtsi"
++
++/ {
++ model = "Gateworks Ventana i.MX6 Quad GW51XX";
++ compatible = "gw,imx6q-gw51xx", "gw,ventana", "fsl,imx6q";
++};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw52xx.dts linux-3.14.54/arch/arm/boot/dts/imx6q-gw52xx.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw52xx.dts 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-gw52xx.dts 2015-10-15 15:51:21.344912526 +0200
+@@ -0,0 +1,23 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6q.dtsi"
++#include "imx6qdl-gw52xx.dtsi"
++
++/ {
++ model = "Gateworks Ventana i.MX6 Quad GW52XX";
++ compatible = "gw,imx6q-gw52xx", "gw,ventana", "fsl,imx6q";
++};
++
++&sata {
++ status = "okay";
++};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw53xx.dts linux-3.14.54/arch/arm/boot/dts/imx6q-gw53xx.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw53xx.dts 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-gw53xx.dts 2015-10-15 15:51:21.344912526 +0200
+@@ -0,0 +1,23 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6q.dtsi"
++#include "imx6qdl-gw53xx.dtsi"
++
++/ {
++ model = "Gateworks Ventana i.MX6 Quad GW53XX";
++ compatible = "gw,imx6q-gw53xx", "gw,ventana", "fsl,imx6q";
++};
++
++&sata {
++ status = "okay";
++};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw5400-a.dts linux-3.14.54/arch/arm/boot/dts/imx6q-gw5400-a.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw5400-a.dts 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-gw5400-a.dts 2015-10-15 15:51:21.368910948 +0200
+@@ -0,0 +1,543 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6q.dtsi"
++
++/ {
++ model = "Gateworks Ventana GW5400-A";
++ compatible = "gw,imx6q-gw5400-a", "gw,ventana", "fsl,imx6q";
++
++ /* these are used by bootloader for disabling nodes */
++ aliases {
++ ethernet0 = &fec;
++ ethernet1 = &eth1;
++ i2c0 = &i2c1;
++ i2c1 = &i2c2;
++ i2c2 = &i2c3;
++ led0 = &led0;
++ led1 = &led1;
++ led2 = &led2;
++ sky2 = &eth1;
++ ssi0 = &ssi1;
++ spi0 = &ecspi1;
++ usb0 = &usbh1;
++ usb1 = &usbotg;
++ usdhc2 = &usdhc3;
++ };
++
++ chosen {
++ bootargs = "console=ttymxc1,115200";
++ };
++
++ leds {
++ compatible = "gpio-leds";
++
++ led0: user1 {
++ label = "user1";
++ gpios = <&gpio4 6 0>; /* 102 -> MX6_PANLEDG */
++ default-state = "on";
++ linux,default-trigger = "heartbeat";
++ };
++
++ led1: user2 {
++ label = "user2";
++ gpios = <&gpio4 10 0>; /* 106 -> MX6_PANLEDR */
++ default-state = "off";
++ };
++
++ led2: user3 {
++ label = "user3";
++ gpios = <&gpio4 15 1>; /* 111 -> MX6_LOCLED# */
++ default-state = "off";
++ };
++ };
++
++ memory {
++ reg = <0x10000000 0x40000000>;
++ };
++
++ pps {
++ compatible = "pps-gpio";
++ gpios = <&gpio1 5 0>;
+ status = "okay";
+ };
++
++ regulators {
++ compatible = "simple-bus";
++ #address-cells = <1>;
++ #size-cells = <0>;
++
++ reg_1p0v: regulator@0 {
++ compatible = "regulator-fixed";
++ reg = <0>;
++ regulator-name = "1P0V";
++ regulator-min-microvolt = <1000000>;
++ regulator-max-microvolt = <1000000>;
++ regulator-always-on;
++ };
++
++ reg_3p3v: regulator@1 {
++ compatible = "regulator-fixed";
++ reg = <1>;
++ regulator-name = "3P3V";
++ regulator-min-microvolt = <3300000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ reg_usb_h1_vbus: regulator@2 {
++ compatible = "regulator-fixed";
++ reg = <2>;
++ regulator-name = "usb_h1_vbus";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ regulator-always-on;
++ };
++
++ reg_usb_otg_vbus: regulator@3 {
++ compatible = "regulator-fixed";
++ reg = <3>;
++ regulator-name = "usb_otg_vbus";
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5000000>;
++ gpio = <&gpio3 22 0>;
++ enable-active-high;
++ };
++ };
++
++ sound {
++ compatible = "fsl,imx6q-sabrelite-sgtl5000",
++ "fsl,imx-audio-sgtl5000";
++ model = "imx6q-sabrelite-sgtl5000";
++ ssi-controller = <&ssi1>;
++ audio-codec = <&codec>;
++ audio-routing =
++ "MIC_IN", "Mic Jack",
++ "Mic Jack", "Mic Bias",
++ "Headphone Jack", "HP_OUT";
++ mux-int-port = <1>;
++ mux-ext-port = <4>;
++ };
+};
+
-+&i2c2 {
-+ clock-frequency = <100000>;
++&audmux {
+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c2>;
++ pinctrl-0 = <&pinctrl_audmux>;
++ status = "okay";
++};
++
++&ecspi1 {
++ fsl,spi-num-chipselects = <1>;
++ cs-gpios = <&gpio3 19 0>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ecspi1>;
+ status = "okay";
+
-+ codec: wm8962@1a {
-+ compatible = "wlf,wm8962";
-+ reg = <0x1a>;
-+ clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
-+ DCVDD-supply = <&vgen3_reg>;
-+ DBVDD-supply = <&reg_aud3v>;
-+ AVDD-supply = <&vgen3_reg>;
-+ CPVDD-supply = <&vgen3_reg>;
-+ MICVDD-supply = <&reg_aud3v>;
-+ PLLVDD-supply = <&vgen3_reg>;
-+ SPKVDD1-supply = <&reg_aud4v>;
-+ SPKVDD2-supply = <&reg_aud4v>;
++ flash: m25p80@0 {
++ compatible = "sst,w25q256";
++ spi-max-frequency = <30000000>;
++ reg = <0>;
+ };
+};
+
++&fec {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_enet>;
++ phy-mode = "rgmii";
++ phy-reset-gpios = <&gpio1 30 0>;
++ status = "okay";
++};
++
+&i2c1 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c1_1>;
++ pinctrl-0 = <&pinctrl_i2c1>;
++ status = "okay";
++
++ eeprom1: eeprom@50 {
++ compatible = "atmel,24c02";
++ reg = <0x50>;
++ pagesize = <16>;
++ };
++
++ eeprom2: eeprom@51 {
++ compatible = "atmel,24c02";
++ reg = <0x51>;
++ pagesize = <16>;
++ };
++
++ eeprom3: eeprom@52 {
++ compatible = "atmel,24c02";
++ reg = <0x52>;
++ pagesize = <16>;
++ };
++
++ eeprom4: eeprom@53 {
++ compatible = "atmel,24c02";
++ reg = <0x53>;
++ pagesize = <16>;
++ };
++
++ gpio: pca9555@23 {
++ compatible = "nxp,pca9555";
++ reg = <0x23>;
++ gpio-controller;
++ #gpio-cells = <2>;
++ };
++
++ hwmon: gsc@29 {
++ compatible = "gw,gsp";
++ reg = <0x29>;
++ };
++
++ rtc: ds1672@68 {
++ compatible = "dallas,ds1672";
++ reg = <0x68>;
++ };
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c2>;
+ status = "okay";
+
+ pmic: pfuze100@08 {
@@ -13014,7 +10216,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk.dts linux-3.14.54/arch
+
+ sw2_reg: sw2 {
+ regulator-min-microvolt = <800000>;
-+ regulator-max-microvolt = <3300000>;
++ regulator-max-microvolt = <3950000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
@@ -13068,7 +10270,6 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk.dts linux-3.14.54/arch
+ vgen3_reg: vgen3 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
+ };
+
+ vgen4_reg: vgen4 {
@@ -13091,309 +10292,883 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk.dts linux-3.14.54/arch
+ };
+ };
+
-+ mma8450@1c {
-+ compatible = "fsl,mma8450";
-+ reg = <0x1c>;
++ pciswitch: pex8609@3f {
++ compatible = "plx,pex8609";
++ reg = <0x3f>;
+ };
-+};
+
-+&i2c2 {
-+ clock-frequency = <100000>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c2_1>;
-+ status = "okay";
++ pciclkgen: si52147@6b {
++ compatible = "sil,si52147";
++ reg = <0x6b>;
++ };
+};
+
+&i2c3 {
+ clock-frequency = <100000>;
+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_i2c3_1>;
++ pinctrl-0 = <&pinctrl_i2c3>;
+ status = "okay";
+
-+ ov564x: ov564x@3c {
-+ compatible = "ovti,ov564x";
-+ reg = <0x3c>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_csi_0>;
-+ clocks = <&clks IMX6SL_CLK_CSI>;
-+ clock-names = "csi_mclk";
-+ AVDD-supply = <&vgen6_reg>; /* 2.8v */
-+ DVDD-supply = <&vgen2_reg>; /* 1.5v*/
-+ pwn-gpios = <&gpio1 25 1>;
-+ rst-gpios = <&gpio1 26 0>;
-+ csi_id = <0>;
-+ mclk = <24000000>;
-+ mclk_source = <0>;
++ accelerometer: mma8450@1c {
++ compatible = "fsl,mma8450";
++ reg = <0x1c>;
++ };
++
++ codec: sgtl5000@0a {
++ compatible = "fsl,sgtl5000";
++ reg = <0x0a>;
++ clocks = <&clks 201>;
++ VDDA-supply = <&sw4_reg>;
++ VDDIO-supply = <&reg_3p3v>;
++ };
++
++ hdmiin: adv7611@4c {
++ compatible = "adi,adv7611";
++ reg = <0x4c>;
++ };
++
++ touchscreen: egalax_ts@04 {
++ compatible = "eeti,egalax_ts";
++ reg = <0x04>;
++ interrupt-parent = <&gpio7>;
++ interrupts = <12 2>; /* gpio7_12 active low */
++ wakeup-gpios = <&gpio7 12 0>;
++ };
++
++ videoout: adv7393@2a {
++ compatible = "adi,adv7393";
++ reg = <0x2a>;
++ };
++
++ videoin: adv7180@20 {
++ compatible = "adi,adv7180";
++ reg = <0x20>;
+ };
+};
+
- &iomuxc {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_hog>;
-
-- hog {
-+ imx6sl-evk {
- pinctrl_hog: hoggrp {
- fsl,pins = <
- MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059
-@@ -78,21 +444,270 @@
- MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
- MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000
- MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000
-+ MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0
-+ >;
++&iomuxc {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_hog>;
++
++ imx6q-gw5400-a {
++ pinctrl_hog: hoggrp {
++ fsl,pins = <
++ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* OTG_PWR_EN */
++ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 /* SPINOR_CS0# */
++ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PCIE IRQ */
++ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 /* PCIE RST */
++ MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000130b0 /* AUD4_MCK */
++ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x80000000 /* GPS_PPS */
++ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* TOUCH_IRQ# */
++ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x80000000 /* user1 led */
++ MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x80000000 /* user2 led */
++ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* user3 led */
++ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 /* USBHUB_RST# */
++ MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 /* MIPI_DIO */
++ >;
+ };
+
-+ pinctrl_audmux3: audmux3grp {
++ pinctrl_audmux: audmuxgrp {
+ fsl,pins = <
-+ MX6SL_PAD_AUD_RXD__AUD3_RXD 0x4130b0
-+ MX6SL_PAD_AUD_TXC__AUD3_TXC 0x4130b0
-+ MX6SL_PAD_AUD_TXD__AUD3_TXD 0x4110b0
-+ MX6SL_PAD_AUD_TXFS__AUD3_TXFS 0x4130b0
++ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0
++ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0
++ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0
++ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
+ >;
+ };
+
+ pinctrl_ecspi1: ecspi1grp {
+ fsl,pins = <
-+ MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1
-+ MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1
-+ MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
-+ MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 0x80000000
++ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
++ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
++ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
+ >;
+ };
+
-+ pinctrl_fec: fecgrp {
++ pinctrl_enet: enetgrp {
+ fsl,pins = <
-+ MX6SL_PAD_FEC_MDC__FEC_MDC 0x1b0b0
-+ MX6SL_PAD_FEC_MDIO__FEC_MDIO 0x1b0b0
-+ MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV 0x1b0b0
-+ MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0 0x1b0b0
-+ MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1 0x1b0b0
-+ MX6SL_PAD_FEC_TX_EN__FEC_TX_EN 0x1b0b0
-+ MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0 0x1b0b0
-+ MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1 0x1b0b0
-+ MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT 0x4001b0a8
++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
++ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
+ >;
+ };
+
+ pinctrl_i2c1: i2c1grp {
+ fsl,pins = <
-+ MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1
-+ MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1
++ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
++ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+ >;
+ };
+
-+
+ pinctrl_i2c2: i2c2grp {
+ fsl,pins = <
-+ MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1
-+ MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1
-+ >;
-+ };
-+
-+ pinctrl_led: ledgrp {
-+ fsl,pins = <
-+ MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059
++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+ >;
+ };
+
-+ pinctrl_kpp: kppgrp {
++ pinctrl_i2c3: i2c3grp {
+ fsl,pins = <
-+ MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010
-+ MX6SL_PAD_KEY_ROW1__KEY_ROW1 0x1b010
-+ MX6SL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b0
-+ MX6SL_PAD_KEY_COL0__KEY_COL0 0x110b0
-+ MX6SL_PAD_KEY_COL1__KEY_COL1 0x110b0
-+ MX6SL_PAD_KEY_COL2__KEY_COL2 0x110b0
++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
++ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+ >;
+ };
+
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
-+ MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1
-+ MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
++ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
++ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
+ >;
+ };
+
-+ pinctrl_usbotg1: usbotg1grp {
++ pinctrl_uart2: uart2grp {
+ fsl,pins = <
-+ MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
++ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
++ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
+ >;
+ };
+
-+ pinctrl_usdhc1: usdhc1grp {
++ pinctrl_uart5: uart5grp {
+ fsl,pins = <
-+ MX6SL_PAD_SD1_CMD__SD1_CMD 0x17059
-+ MX6SL_PAD_SD1_CLK__SD1_CLK 0x10059
-+ MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x17059
-+ MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x17059
-+ MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x17059
-+ MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x17059
-+ MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x17059
-+ MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x17059
-+ MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x17059
-+ MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059
++ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
++ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
+ >;
+ };
+
-+ pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
++ pinctrl_usbotg: usbotggrp {
+ fsl,pins = <
-+ MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9
-+ MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9
-+ MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9
-+ MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9
-+ MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9
-+ MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9
-+ MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9
-+ MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9
-+ MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9
-+ MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9
++ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
+ >;
+ };
+
-+ pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
++ pinctrl_usdhc3: usdhc3grp {
+ fsl,pins = <
-+ MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9
-+ MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9
-+ MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
-+ MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
-+ MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
-+ MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
-+ MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9
-+ MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9
-+ MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9
-+ MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9
++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
+ >;
+ };
++ };
++};
+
-+ pinctrl_usdhc2: usdhc2grp {
-+ fsl,pins = <
-+ MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059
-+ MX6SL_PAD_SD2_CLK__SD2_CLK 0x10059
-+ MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059
-+ MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059
-+ MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059
-+ MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059
-+ >;
-+ };
++&ldb {
++ status = "okay";
++};
+
-+ pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
-+ fsl,pins = <
-+ MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9
-+ MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9
-+ MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
-+ MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
-+ MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
-+ MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
-+ >;
-+ };
++&pcie {
++ reset-gpio = <&gpio1 29 0>;
++ status = "okay";
+
-+ pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
-+ fsl,pins = <
-+ MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9
-+ MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9
-+ MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
-+ MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
-+ MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
-+ MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
-+ >;
-+ };
++ eth1: sky2@8 { /* MAC/PHY on bus 8 */
++ compatible = "marvell,sky2";
++ };
++};
+
-+ pinctrl_usdhc3: usdhc3grp {
-+ fsl,pins = <
-+ MX6SL_PAD_SD3_CMD__SD3_CMD 0x17059
-+ MX6SL_PAD_SD3_CLK__SD3_CLK 0x10059
-+ MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x17059
-+ MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x17059
-+ MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x17059
-+ MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059
-+ >;
-+ };
++&ssi1 {
++ fsl,mode = "i2s-slave";
++ status = "okay";
++};
+
-+ pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
-+ fsl,pins = <
-+ MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
-+ MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9
-+ MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
-+ MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
-+ MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
-+ MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
-+ >;
-+ };
++&uart1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart1>;
++ status = "okay";
++};
+
-+ pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
-+ fsl,pins = <
-+ MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
-+ MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9
-+ MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
-+ MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
-+ MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
-+ MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
- >;
- };
- };
- };
-
-+&kpp {
++&uart2 {
+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_kpp>;
-+ linux,keymap = <
-+ MATRIX_KEY(0x0, 0x0, KEY_UP) /* ROW0, COL0 */
-+ MATRIX_KEY(0x0, 0x1, KEY_DOWN) /* ROW0, COL1 */
-+ MATRIX_KEY(0x0, 0x2, KEY_ENTER) /* ROW0, COL2 */
-+ MATRIX_KEY(0x1, 0x0, KEY_HOME) /* ROW1, COL0 */
-+ MATRIX_KEY(0x1, 0x1, KEY_RIGHT) /* ROW1, COL1 */
-+ MATRIX_KEY(0x1, 0x2, KEY_LEFT) /* ROW1, COL2 */
-+ MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */
-+ MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP) /* ROW2, COL1 */
-+ >;
++ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+};
+
-+&ssi2 {
-+ fsl,mode = "i2s-slave";
++&uart5 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_uart5>;
+ status = "okay";
+};
+
-+&lcdif {
++&usbotg {
++ vbus-supply = <&reg_usb_otg_vbus>;
+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_lcdif_dat_0
-+ &pinctrl_lcdif_ctrl_0>;
-+ lcd-supply = <&reg_lcd_3v3>;
-+ display = <&display>;
++ pinctrl-0 = <&pinctrl_usbotg>;
++ disable-over-current;
+ status = "okay";
++};
+
-+ display: display {
-+ bits-per-pixel = <16>;
-+ bus-width = <24>;
++&usbh1 {
++ vbus-supply = <&reg_usb_h1_vbus>;
++ status = "okay";
++};
+
-+ display-timings {
-+ native-mode = <&timing0>;
-+ timing0: timing0 {
-+ clock-frequency = <33500000>;
-+ hactive = <800>;
-+ vactive = <480>;
-+ hback-porch = <89>;
-+ hfront-porch = <164>;
-+ vback-porch = <23>;
-+ vfront-porch = <10>;
-+ hsync-len = <10>;
-+ vsync-len = <10>;
-+ hsync-active = <0>;
-+ vsync-active = <0>;
-+ de-active = <1>;
-+ pixelclk-active = <0>;
-+ };
-+ };
++&usdhc3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_usdhc3>;
++ cd-gpios = <&gpio7 0 0>;
++ vmmc-supply = <&reg_3p3v>;
++ status = "okay";
++};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw54xx.dts linux-3.14.54/arch/arm/boot/dts/imx6q-gw54xx.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-gw54xx.dts 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-gw54xx.dts 2015-10-15 15:51:21.368910948 +0200
+@@ -0,0 +1,23 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6q.dtsi"
++#include "imx6qdl-gw54xx.dtsi"
++
++/ {
++ model = "Gateworks Ventana i.MX6 Quad GW54XX";
++ compatible = "gw,imx6q-gw54xx", "gw,ventana", "fsl,imx6q";
++};
++
++&sata {
++ status = "okay";
++};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-hummingboard.dts linux-3.14.54/arch/arm/boot/dts/imx6q-hummingboard.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-hummingboard.dts 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-hummingboard.dts 2015-10-15 15:51:21.368910948 +0200
+@@ -0,0 +1,21 @@
++/*
++ * Copyright (C) 2014 Rabeeh Khoury (rabeeh@solid-run.com)
++ * Based on work by Russell King
++ */
++/dts-v1/;
++
++#include "imx6q.dtsi"
++#include "imx6qdl-hummingboard.dtsi"
++
++/ {
++ model = "SolidRun HummingBoard Dual/Quad";
++ compatible = "solidrun,hummingboard/q", "fsl,imx6q";
++};
++
++&sata {
++ status = "okay";
++ fsl,transmit-level-mV = <1104>;
++ fsl,transmit-boost-mdB = <0>;
++ fsl,transmit-atten-16ths = <9>;
++ fsl,no-spread-spectrum;
++};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-nitrogen6x.dts linux-3.14.54/arch/arm/boot/dts/imx6q-nitrogen6x.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-nitrogen6x.dts 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-nitrogen6x.dts 2015-10-15 15:51:21.368910948 +0200
+@@ -0,0 +1,25 @@
++/*
++ * Copyright 2013 Boundary Devices, Inc.
++ * Copyright 2012 Freescale Semiconductor, Inc.
++ * Copyright 2011 Linaro Ltd.
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6q.dtsi"
++#include "imx6qdl-nitrogen6x.dtsi"
++
++/ {
++ model = "Freescale i.MX6 Quad Nitrogen6x Board";
++ compatible = "fsl,imx6q-nitrogen6x", "fsl,imx6q";
++};
++
++&sata {
++ status = "okay";
++};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-phytec-pbab01.dts linux-3.14.54/arch/arm/boot/dts/imx6q-phytec-pbab01.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-phytec-pbab01.dts 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-phytec-pbab01.dts 2015-10-15 15:51:21.368910948 +0200
+@@ -11,24 +11,17 @@
+
+ /dts-v1/;
+ #include "imx6q-phytec-pfla02.dtsi"
++#include "imx6qdl-phytec-pbab01.dtsi"
+
+ / {
+ model = "Phytec phyFLEX-i.MX6 Quad Carrier-Board";
+ compatible = "phytec,imx6q-pbab01", "phytec,imx6q-pfla02", "fsl,imx6q";
+-};
+-
+-&fec {
+- status = "okay";
+-};
+-
+-&uart4 {
+- status = "okay";
+-};
+
+-&usdhc2 {
+- status = "okay";
++ chosen {
++ stdout-path = &uart4;
+ };
+ };
+
+-&usdhc3 {
+- status = "okay";
++&sata {
++ status = "okay";
+ };
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi linux-3.14.54/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-phytec-pfla02.dtsi 2015-10-15 15:51:21.368910948 +0200
+@@ -10,171 +10,13 @@
+ */
+
+ #include "imx6q.dtsi"
++#include "imx6qdl-phytec-pfla02.dtsi"
+
+ / {
+- model = "Phytec phyFLEX-i.MX6 Ouad";
++ model = "Phytec phyFLEX-i.MX6 Quad";
+ compatible = "phytec,imx6q-pfla02", "fsl,imx6q";
+
+ memory {
+ reg = <0x10000000 0x80000000>;
+ };
+ };
+-
+-&ecspi3 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_ecspi3_1>;
+- status = "okay";
+- fsl,spi-num-chipselects = <1>;
+- cs-gpios = <&gpio4 24 0>;
+-
+- flash@0 {
+- compatible = "m25p80";
+- spi-max-frequency = <20000000>;
+- reg = <0>;
+- };
+-};
+-
+-&i2c1 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_i2c1_1>;
+- status = "okay";
+-
+- eeprom@50 {
+- compatible = "atmel,24c32";
+- reg = <0x50>;
+- };
+-
+- pmic@58 {
+- compatible = "dialog,da9063";
+- reg = <0x58>;
+- interrupt-parent = <&gpio4>;
+- interrupts = <17 0x8>; /* active-low GPIO4_17 */
+-
+- regulators {
+- vddcore_reg: bcore1 {
+- regulator-min-microvolt = <730000>;
+- regulator-max-microvolt = <1380000>;
+- regulator-always-on;
+- };
+-
+- vddsoc_reg: bcore2 {
+- regulator-min-microvolt = <730000>;
+- regulator-max-microvolt = <1380000>;
+- regulator-always-on;
+- };
+-
+- vdd_ddr3_reg: bpro {
+- regulator-min-microvolt = <1500000>;
+- regulator-max-microvolt = <1500000>;
+- regulator-always-on;
+- };
+-
+- vdd_3v3_reg: bperi {
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-always-on;
+- };
+-
+- vdd_buckmem_reg: bmem {
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-always-on;
+- };
+-
+- vdd_eth_reg: bio {
+- regulator-min-microvolt = <1200000>;
+- regulator-max-microvolt = <1200000>;
+- regulator-always-on;
+- };
+-
+- vdd_eth_io_reg: ldo4 {
+- regulator-min-microvolt = <2500000>;
+- regulator-max-microvolt = <2500000>;
+- regulator-always-on;
+- };
+-
+- vdd_mx6_snvs_reg: ldo5 {
+- regulator-min-microvolt = <3000000>;
+- regulator-max-microvolt = <3000000>;
+- regulator-always-on;
+- };
+-
+- vdd_3v3_pmic_io_reg: ldo6 {
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-always-on;
+- };
+-
+- vdd_sd0_reg: ldo9 {
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- };
+-
+- vdd_sd1_reg: ldo10 {
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- };
+-
+- vdd_mx6_high_reg: ldo11 {
+- regulator-min-microvolt = <3000000>;
+- regulator-max-microvolt = <3000000>;
+- regulator-always-on;
+- };
+- };
+- };
+-};
+-
+-&iomuxc {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_hog>;
+-
+- hog {
+- pinctrl_hog: hoggrp {
+- fsl,pins = <
+- MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
+- MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x80000000 /* SPI NOR chipselect */
+- MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x80000000 /* PMIC interrupt */
+- >;
+- };
+- };
+-
+- pfla02 {
+- pinctrl_usdhc3_pfla02: usdhc3grp-pfla02 {
+- fsl,pins = <
+- MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x80000000
+- MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
+- >;
+- };
+- };
+-};
+-
+-&fec {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_enet_3>;
+- phy-mode = "rgmii";
+- phy-reset-gpios = <&gpio3 23 0>;
+- status = "disabled";
+-};
+-
+-&uart4 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_uart4_1>;
+- status = "disabled";
+-};
+-
+-&usdhc2 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usdhc2_2>;
+- cd-gpios = <&gpio1 4 0>;
+- wp-gpios = <&gpio1 2 0>;
+- status = "disabled";
+-};
+-
+-&usdhc3 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usdhc3_2
+- &pinctrl_usdhc3_pfla02>;
+- cd-gpios = <&gpio1 27 0>;
+- wp-gpios = <&gpio1 29 0>;
+- status = "disabled";
+-};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-pinfunc.h linux-3.14.54/arch/arm/boot/dts/imx6q-pinfunc.h
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-pinfunc.h 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-pinfunc.h 2015-10-15 15:51:21.372910684 +0200
+@@ -673,6 +673,7 @@
+ #define MX6QDL_PAD_GPIO_3__USB_H1_OC 0x22c 0x5fc 0x948 0x6 0x1
+ #define MX6QDL_PAD_GPIO_3__MLB_CLK 0x22c 0x5fc 0x900 0x7 0x1
+ #define MX6QDL_PAD_GPIO_6__ESAI_TX_CLK 0x230 0x600 0x870 0x0 0x1
++#define MX6QDL_PAD_GPIO_6__ENET_IRQ 0x230 0x600 0x03c 0x11 0xff000609
+ #define MX6QDL_PAD_GPIO_6__I2C3_SDA 0x230 0x600 0x8ac 0x2 0x1
+ #define MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x230 0x600 0x000 0x5 0x0
+ #define MX6QDL_PAD_GPIO_6__SD2_LCTL 0x230 0x600 0x000 0x6 0x0
+@@ -1024,6 +1025,7 @@
+ #define MX6QDL_PAD_SD1_DAT2__WDOG1_RESET_B_DEB 0x34c 0x734 0x000 0x6 0x0
+ #define MX6QDL_PAD_SD1_CLK__SD1_CLK 0x350 0x738 0x000 0x0 0x0
+ #define MX6QDL_PAD_SD1_CLK__ECSPI5_SCLK 0x350 0x738 0x828 0x1 0x0
++#define MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT 0x350 0x738 0x000 0x2 0x0
+ #define MX6QDL_PAD_SD1_CLK__GPT_CLKIN 0x350 0x738 0x000 0x3 0x0
+ #define MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x350 0x738 0x000 0x5 0x0
+ #define MX6QDL_PAD_SD2_CLK__SD2_CLK 0x354 0x73c 0x000 0x0 0x0
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sabreauto.dts linux-3.14.54/arch/arm/boot/dts/imx6q-sabreauto.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sabreauto.dts 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-sabreauto.dts 2015-10-15 15:51:21.648892523 +0200
+@@ -20,6 +20,22 @@
+ compatible = "fsl,imx6q-sabreauto", "fsl,imx6q";
+ };
+
++&mxcfb1 {
++ status = "okay";
+};
+
-+&pwm1 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_pwm1_0>;
++&mxcfb2 {
++ status = "okay";
++};
++
++&mxcfb3 {
++ status = "okay";
++};
++
++&mxcfb4 {
++ status = "okay";
++};
++
+ &sata {
+ status = "okay";
+ };
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sabrelite.dts linux-3.14.54/arch/arm/boot/dts/imx6q-sabrelite.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sabrelite.dts 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-sabrelite.dts 2015-10-15 15:51:21.648892523 +0200
+@@ -12,189 +12,13 @@
+
+ /dts-v1/;
+ #include "imx6q.dtsi"
++#include "imx6qdl-sabrelite.dtsi"
+
+ / {
+ model = "Freescale i.MX6 Quad SABRE Lite Board";
+ compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
+-
+- memory {
+- reg = <0x10000000 0x40000000>;
+- };
+-
+- regulators {
+- compatible = "simple-bus";
+-
+- reg_2p5v: 2p5v {
+- compatible = "regulator-fixed";
+- regulator-name = "2P5V";
+- regulator-min-microvolt = <2500000>;
+- regulator-max-microvolt = <2500000>;
+- regulator-always-on;
+- };
+-
+- reg_3p3v: 3p3v {
+- compatible = "regulator-fixed";
+- regulator-name = "3P3V";
+- regulator-min-microvolt = <3300000>;
+- regulator-max-microvolt = <3300000>;
+- regulator-always-on;
+- };
+-
+- reg_usb_otg_vbus: usb_otg_vbus {
+- compatible = "regulator-fixed";
+- regulator-name = "usb_otg_vbus";
+- regulator-min-microvolt = <5000000>;
+- regulator-max-microvolt = <5000000>;
+- gpio = <&gpio3 22 0>;
+- enable-active-high;
+- };
+- };
+-
+- sound {
+- compatible = "fsl,imx6q-sabrelite-sgtl5000",
+- "fsl,imx-audio-sgtl5000";
+- model = "imx6q-sabrelite-sgtl5000";
+- ssi-controller = <&ssi1>;
+- audio-codec = <&codec>;
+- audio-routing =
+- "MIC_IN", "Mic Jack",
+- "Mic Jack", "Mic Bias",
+- "Headphone Jack", "HP_OUT";
+- mux-int-port = <1>;
+- mux-ext-port = <4>;
+- };
+-};
+-
+-&audmux {
+- status = "okay";
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_audmux_1>;
+-};
+-
+-&ecspi1 {
+- fsl,spi-num-chipselects = <1>;
+- cs-gpios = <&gpio3 19 0>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_ecspi1_1>;
+- status = "okay";
+-
+- flash: m25p80@0 {
+- compatible = "sst,sst25vf016b";
+- spi-max-frequency = <20000000>;
+- reg = <0>;
+- };
+-};
+-
+-&fec {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_enet_1>;
+- phy-mode = "rgmii";
+- phy-reset-gpios = <&gpio3 23 0>;
+- status = "okay";
+-};
+-
+-&i2c1 {
+- status = "okay";
+- clock-frequency = <100000>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_i2c1_1>;
+-
+- codec: sgtl5000@0a {
+- compatible = "fsl,sgtl5000";
+- reg = <0x0a>;
+- clocks = <&clks 201>;
+- VDDA-supply = <&reg_2p5v>;
+- VDDIO-supply = <&reg_3p3v>;
+- };
+-};
+-
+-&iomuxc {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_hog>;
+-
+- hog {
+- pinctrl_hog: hoggrp {
+- fsl,pins = <
+- MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000
+- MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000
+- MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
+- MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
+- MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
+- MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
+- MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
+- MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
+- MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
+- >;
+- };
+- };
+-};
+-
+-&ldb {
+- status = "okay";
+-
+- lvds-channel@0 {
+- fsl,data-mapping = "spwg";
+- fsl,data-width = <18>;
+- status = "okay";
+-
+- display-timings {
+- native-mode = <&timing0>;
+- timing0: hsd100pxn1 {
+- clock-frequency = <65000000>;
+- hactive = <1024>;
+- vactive = <768>;
+- hback-porch = <220>;
+- hfront-porch = <40>;
+- vback-porch = <21>;
+- vfront-porch = <7>;
+- hsync-len = <60>;
+- vsync-len = <10>;
+- };
+- };
+- };
+ };
+
+ &sata {
+ status = "okay";
+ };
+-
+-&ssi1 {
+- fsl,mode = "i2s-slave";
+- status = "okay";
+-};
+-
+-&uart2 {
+- status = "okay";
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_uart2_1>;
+-};
+-
+-&usbh1 {
+- status = "okay";
+-};
+-
+-&usbotg {
+- vbus-supply = <&reg_usb_otg_vbus>;
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usbotg_1>;
+- disable-over-current;
+- status = "okay";
+-};
+-
+-&usdhc3 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usdhc3_2>;
+- cd-gpios = <&gpio7 0 0>;
+- wp-gpios = <&gpio7 1 0>;
+- vmmc-supply = <&reg_3p3v>;
+- status = "okay";
+-};
+-
+-&usdhc4 {
+- pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usdhc4_2>;
+- cd-gpios = <&gpio2 6 0>;
+- wp-gpios = <&gpio2 7 0>;
+- vmmc-supply = <&reg_3p3v>;
+- status = "okay";
+-};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sabresd.dts linux-3.14.54/arch/arm/boot/dts/imx6q-sabresd.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sabresd.dts 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-sabresd.dts 2015-10-15 15:51:21.648892523 +0200
+@@ -23,3 +23,19 @@
+ &sata {
+ status = "okay";
+ };
++
++&mxcfb1 {
++ status = "okay";
++};
++
++&mxcfb2 {
++ status = "okay";
++};
++
++&mxcfb3 {
+ status = "okay";
+};
+
++&mxcfb4 {
++ status = "okay";
++};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sabresd-hdcp.dts linux-3.14.54/arch/arm/boot/dts/imx6q-sabresd-hdcp.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sabresd-hdcp.dts 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-sabresd-hdcp.dts 2015-10-15 15:51:21.648892523 +0200
+@@ -0,0 +1,23 @@
++/*
++ * Copyright 2012-2013 Freescale Semiconductor, Inc.
++ * Copyright 2011 Linaro Ltd.
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#include "imx6q-sabresd.dts"
++
++&hdmi_video {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_hdmi_hdcp>;
++ fsl,hdcp;
++};
++
++&i2c2 {
++ status = "disable";
++};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sbc6x.dts linux-3.14.54/arch/arm/boot/dts/imx6q-sbc6x.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-sbc6x.dts 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-sbc6x.dts 2015-10-15 15:51:21.648892523 +0200
+@@ -17,28 +17,78 @@
+ };
+ };
+
++
+ &fec {
+ pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_enet_1>;
++ pinctrl-0 = <&pinctrl_enet>;
+ phy-mode = "rgmii";
+ status = "okay";
+ };
+
++&iomuxc {
++ imx6q-sbc6x {
++ pinctrl_enet: enetgrp {
++ fsl,pins = <
++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
++ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
++ >;
++ };
++
++ pinctrl_uart1: uart1grp {
++ fsl,pins = <
++ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
++ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
++ >;
++ };
++
++ pinctrl_usbotg: usbotggrp {
++ fsl,pins = <
++ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
++ >;
++ };
++
++ pinctrl_usdhc3: usdhc3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
++ >;
++ };
++ };
++};
++
&uart1 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart1_1>;
@@ -13401,73 +11176,107 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk.dts linux-3.14.54/arch
status = "okay";
};
- &usbotg1 {
- vbus-supply = <&reg_usb_otg1_vbus>;
+ &usbotg {
pinctrl-names = "default";
-- pinctrl-0 = <&pinctrl_usbotg1_1>;
-+ pinctrl-0 = <&pinctrl_usbotg1>;
+- pinctrl-0 = <&pinctrl_usbotg_1>;
++ pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
status = "okay";
};
-@@ -106,9 +721,9 @@
-
- &usdhc1 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
-- pinctrl-0 = <&pinctrl_usdhc1_1>;
-- pinctrl-1 = <&pinctrl_usdhc1_1_100mhz>;
-- pinctrl-2 = <&pinctrl_usdhc1_1_200mhz>;
-+ pinctrl-0 = <&pinctrl_usdhc1>;
-+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
-+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
- bus-width = <8>;
- cd-gpios = <&gpio4 7 0>;
- wp-gpios = <&gpio4 6 0>;
-@@ -117,9 +732,9 @@
-
- &usdhc2 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
-- pinctrl-0 = <&pinctrl_usdhc2_1>;
-- pinctrl-1 = <&pinctrl_usdhc2_1_100mhz>;
-- pinctrl-2 = <&pinctrl_usdhc2_1_200mhz>;
-+ pinctrl-0 = <&pinctrl_usdhc2>;
-+ pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
-+ pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
- cd-gpios = <&gpio5 0 0>;
- wp-gpios = <&gpio4 29 0>;
- status = "okay";
-@@ -127,9 +742,26 @@
&usdhc3 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
-- pinctrl-0 = <&pinctrl_usdhc3_1>;
-- pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>;
-- pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>;
+ pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usdhc3_2>;
+ pinctrl-0 = <&pinctrl_usdhc3>;
-+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
-+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
- cd-gpios = <&gpio3 22 0>;
status = "okay";
};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6q-udoo.dts linux-3.14.54/arch/arm/boot/dts/imx6q-udoo.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6q-udoo.dts 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6q-udoo.dts 2015-10-15 15:51:21.652892261 +0200
+@@ -16,24 +16,78 @@
+ model = "Udoo i.MX6 Quad Board";
+ compatible = "udoo,imx6q-udoo", "fsl,imx6q";
+
++ chosen {
++ stdout-path = &uart2;
++ };
+
-+&pxp {
+ memory {
+ reg = <0x10000000 0x40000000>;
+ };
+ };
+
++&fec {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_enet>;
++ phy-mode = "rgmii";
+ status = "okay";
+};
+
-+&gpc {
-+ fsl,cpu_pupscr_sw2iso = <0xf>;
-+ fsl,cpu_pupscr_sw = <0xf>;
-+ fsl,cpu_pdnscr_iso2sw = <0x1>;
-+ fsl,cpu_pdnscr_iso = <0x1>;
-+ fsl,ldo-bypass; /* use ldo-bypass, u-boot will check it and configure */
-+ pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
-+};
++&iomuxc {
++ imx6q-udoo {
++ pinctrl_enet: enetgrp {
++ fsl,pins = <
++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
++ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
++ >;
++ };
+
-+&gpu {
-+ pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
++ pinctrl_uart2: uart2grp {
++ fsl,pins = <
++ MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
++ MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
++ >;
++ };
++
++ pinctrl_usdhc3: usdhc3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
++ >;
++ };
++ };
+};
++
+ &sata {
+ status = "okay";
+ };
+
+ &uart2 {
+ pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_uart2_1>;
++ pinctrl-0 = <&pinctrl_uart2>;
+ status = "okay";
+ };
+
+ &usdhc3 {
+ pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usdhc3_2>;
++ pinctrl-0 = <&pinctrl_usdhc3>;
+ non-removable;
+ status = "okay";
+ };
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6sl.dtsi linux-3.14.54/arch/arm/boot/dts/imx6sl.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/imx6sl.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/imx6sl.dtsi 2015-10-12 10:56:17.836351177 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6sl.dtsi 2015-10-15 15:51:21.652892261 +0200
@@ -7,12 +7,14 @@
*
*/
@@ -14504,9 +12313,861 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6sl.dtsi linux-3.14.54/arch/ar
};
};
};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk-csi.dts linux-3.14.54/arch/arm/boot/dts/imx6sl-evk-csi.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk-csi.dts 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm/boot/dts/imx6sl-evk-csi.dts 2015-10-15 15:51:21.652892261 +0200
+@@ -0,0 +1,27 @@
++/*
++ * Copyright (C) 2013 Freescale Semiconductor, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include "imx6sl-evk.dts"
++
++/ {
++ csi_v4l2_cap {
++ status = "okay";
++ };
++};
++
++&csi {
++ status = "okay";
++};
++
++&i2c3 {
++ status = "okay";
++};
++
++&epdc {
++ status = "disabled";
++};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk.dts linux-3.14.54/arch/arm/boot/dts/imx6sl-evk.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/imx6sl-evk.dts 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/imx6sl-evk.dts 2015-10-15 15:51:21.656891997 +0200
+@@ -8,6 +8,8 @@
+
+ /dts-v1/;
+
++#include <dt-bindings/gpio/gpio.h>
++#include <dt-bindings/input/input.h>
+ #include "imx6sl.dtsi"
+
+ / {
+@@ -18,11 +20,26 @@
+ reg = <0x80000000 0x40000000>;
+ };
+
++ leds {
++ compatible = "gpio-leds";
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_led>;
++
++ user {
++ label = "debug";
++ gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
++ linux,default-trigger = "heartbeat";
++ };
++ };
++
+ regulators {
+ compatible = "simple-bus";
++ #address-cells = <1>;
++ #size-cells = <0>;
+
+- reg_usb_otg1_vbus: usb_otg1_vbus {
++ reg_usb_otg1_vbus: regulator@0 {
+ compatible = "regulator-fixed";
++ reg = <0>;
+ regulator-name = "usb_otg1_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+@@ -30,22 +47,63 @@
+ enable-active-high;
+ };
+
+- reg_usb_otg2_vbus: usb_otg2_vbus {
++ reg_usb_otg2_vbus: regulator@1 {
+ compatible = "regulator-fixed";
++ reg = <1>;
+ regulator-name = "usb_otg2_vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio4 2 0>;
+ enable-active-high;
+ };
++
++ reg_aud3v: regulator@2 {
++ compatible = "regulator-fixed";
++ reg = <2>;
++ regulator-name = "wm8962-supply-3v15";
++ regulator-min-microvolt = <3150000>;
++ regulator-max-microvolt = <3150000>;
++ regulator-boot-on;
++ };
++
++ reg_aud4v: regulator@3 {
++ compatible = "regulator-fixed";
++ reg = <3>;
++ regulator-name = "wm8962-supply-4v2";
++ regulator-min-microvolt = <4325000>;
++ regulator-max-microvolt = <4325000>;
++ regulator-boot-on;
++ };
+ };
++
++ sound {
++ compatible = "fsl,imx6sl-evk-wm8962", "fsl,imx-audio-wm8962";
++ model = "wm8962-audio";
++ ssi-controller = <&ssi2>;
++ audio-codec = <&codec>;
++ audio-routing =
++ "Headphone Jack", "HPOUTL",
++ "Headphone Jack", "HPOUTR",
++ "Ext Spk", "SPKOUTL",
++ "Ext Spk", "SPKOUTR",
++ "AMIC", "MICBIAS",
++ "IN3R", "AMIC";
++ mux-int-port = <2>;
++ mux-ext-port = <3>;
++ };
++};
++
++&audmux {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_audmux3>;
++ status = "okay";
+ };
+
+ &ecspi1 {
+ fsl,spi-num-chipselects = <1>;
+ cs-gpios = <&gpio4 11 0>;
+ pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_ecspi1_1>;
++ pinctrl-0 = <&pinctrl_ecspi1>;
+ status = "okay";
+
+ flash: m25p80@0 {
+@@ -57,18 +115,326 @@
+ };
+ };
+
++&csi {
++ status = "okay";
++};
++
++&cpu0 {
++ arm-supply = <&sw1a_reg>;
++ soc-supply = <&sw1c_reg>;
++ pu-supply = <&pu_dummy>; /* use pu_dummy if VDDSOC share with VDDPU */
++};
++
+ &fec {
+ pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_fec_1>;
++ pinctrl-0 = <&pinctrl_fec>;
+ phy-mode = "rmii";
+ status = "okay";
+ };
+
++&i2c1 {
++ clock-frequency = <100000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c1>;
++ status = "okay";
++
++ pmic: pfuze100@08 {
++ compatible = "fsl,pfuze100";
++ reg = <0x08>;
++
++ regulators {
++ sw1a_reg: sw1ab {
++ regulator-min-microvolt = <300000>;
++ regulator-max-microvolt = <1875000>;
++ regulator-boot-on;
++ regulator-always-on;
++ regulator-ramp-delay = <6250>;
++ };
++
++ sw1c_reg: sw1c {
++ regulator-min-microvolt = <300000>;
++ regulator-max-microvolt = <1875000>;
++ regulator-boot-on;
++ regulator-always-on;
++ regulator-ramp-delay = <6250>;
++ };
++
++ sw2_reg: sw2 {
++ regulator-min-microvolt = <800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ sw3a_reg: sw3a {
++ regulator-min-microvolt = <400000>;
++ regulator-max-microvolt = <1975000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ sw3b_reg: sw3b {
++ regulator-min-microvolt = <400000>;
++ regulator-max-microvolt = <1975000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ sw4_reg: sw4 {
++ regulator-min-microvolt = <800000>;
++ regulator-max-microvolt = <3300000>;
++ };
++
++ swbst_reg: swbst {
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5150000>;
++ };
++
++ snvs_reg: vsnvs {
++ regulator-min-microvolt = <1000000>;
++ regulator-max-microvolt = <3000000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ vref_reg: vrefddr {
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ vgen1_reg: vgen1 {
++ regulator-min-microvolt = <800000>;
++ regulator-max-microvolt = <1550000>;
++ regulator-always-on;
++ };
++
++ vgen2_reg: vgen2 {
++ regulator-min-microvolt = <800000>;
++ regulator-max-microvolt = <1550000>;
++ };
++
++ vgen3_reg: vgen3 {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ };
++
++ vgen4_reg: vgen4 {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ vgen5_reg: vgen5 {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ vgen6_reg: vgen6 {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++ };
++ };
++
++ regulators {
++ compatible = "simple-bus";
++
++ reg_lcd_3v3: lcd-3v3 {
++ compatible = "regulator-fixed";
++ regulator-name = "lcd-3v3";
++ gpio = <&gpio4 3 0>;
++ enable-active-high;
++ };
++ };
++
++ backlight {
++ compatible = "pwm-backlight";
++ pwms = <&pwm1 0 5000000>;
++ brightness-levels = <0 4 8 16 32 64 128 255>;
++ default-brightness-level = <6>;
++ };
++
++ csi_v4l2_cap {
++ compatible = "fsl,imx6sl-csi-v4l2";
++ status = "okay";
++ };
++
++ pxp_v4l2_out {
++ compatible = "fsl,imx6sl-pxp-v4l2";
++ status = "okay";
++ };
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c2>;
++ status = "okay";
++
++ codec: wm8962@1a {
++ compatible = "wlf,wm8962";
++ reg = <0x1a>;
++ clocks = <&clks IMX6SL_CLK_EXTERN_AUDIO>;
++ DCVDD-supply = <&vgen3_reg>;
++ DBVDD-supply = <&reg_aud3v>;
++ AVDD-supply = <&vgen3_reg>;
++ CPVDD-supply = <&vgen3_reg>;
++ MICVDD-supply = <&reg_aud3v>;
++ PLLVDD-supply = <&vgen3_reg>;
++ SPKVDD1-supply = <&reg_aud4v>;
++ SPKVDD2-supply = <&reg_aud4v>;
++ };
++};
++
++&i2c1 {
++ clock-frequency = <100000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c1_1>;
++ status = "okay";
++
++ pmic: pfuze100@08 {
++ compatible = "fsl,pfuze100";
++ reg = <0x08>;
++
++ regulators {
++ sw1a_reg: sw1ab {
++ regulator-min-microvolt = <300000>;
++ regulator-max-microvolt = <1875000>;
++ regulator-boot-on;
++ regulator-always-on;
++ regulator-ramp-delay = <6250>;
++ };
++
++ sw1c_reg: sw1c {
++ regulator-min-microvolt = <300000>;
++ regulator-max-microvolt = <1875000>;
++ regulator-boot-on;
++ regulator-always-on;
++ regulator-ramp-delay = <6250>;
++ };
++
++ sw2_reg: sw2 {
++ regulator-min-microvolt = <800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ sw3a_reg: sw3a {
++ regulator-min-microvolt = <400000>;
++ regulator-max-microvolt = <1975000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ sw3b_reg: sw3b {
++ regulator-min-microvolt = <400000>;
++ regulator-max-microvolt = <1975000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ sw4_reg: sw4 {
++ regulator-min-microvolt = <800000>;
++ regulator-max-microvolt = <3300000>;
++ };
++
++ swbst_reg: swbst {
++ regulator-min-microvolt = <5000000>;
++ regulator-max-microvolt = <5150000>;
++ };
++
++ snvs_reg: vsnvs {
++ regulator-min-microvolt = <1000000>;
++ regulator-max-microvolt = <3000000>;
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ vref_reg: vrefddr {
++ regulator-boot-on;
++ regulator-always-on;
++ };
++
++ vgen1_reg: vgen1 {
++ regulator-min-microvolt = <800000>;
++ regulator-max-microvolt = <1550000>;
++ };
++
++ vgen2_reg: vgen2 {
++ regulator-min-microvolt = <800000>;
++ regulator-max-microvolt = <1550000>;
++ };
++
++ vgen3_reg: vgen3 {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ vgen4_reg: vgen4 {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ vgen5_reg: vgen5 {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++
++ vgen6_reg: vgen6 {
++ regulator-min-microvolt = <1800000>;
++ regulator-max-microvolt = <3300000>;
++ regulator-always-on;
++ };
++ };
++ };
++
++ mma8450@1c {
++ compatible = "fsl,mma8450";
++ reg = <0x1c>;
++ };
++};
++
++&i2c2 {
++ clock-frequency = <100000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c2_1>;
++ status = "okay";
++};
++
++&i2c3 {
++ clock-frequency = <100000>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_i2c3_1>;
++ status = "okay";
++
++ ov564x: ov564x@3c {
++ compatible = "ovti,ov564x";
++ reg = <0x3c>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_csi_0>;
++ clocks = <&clks IMX6SL_CLK_CSI>;
++ clock-names = "csi_mclk";
++ AVDD-supply = <&vgen6_reg>; /* 2.8v */
++ DVDD-supply = <&vgen2_reg>; /* 1.5v*/
++ pwn-gpios = <&gpio1 25 1>;
++ rst-gpios = <&gpio1 26 0>;
++ csi_id = <0>;
++ mclk = <24000000>;
++ mclk_source = <0>;
++ };
++};
++
+ &iomuxc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_hog>;
+
+- hog {
++ imx6sl-evk {
+ pinctrl_hog: hoggrp {
+ fsl,pins = <
+ MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059
+@@ -78,21 +444,270 @@
+ MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059
+ MX6SL_PAD_KEY_COL4__GPIO4_IO00 0x80000000
+ MX6SL_PAD_KEY_COL5__GPIO4_IO02 0x80000000
++ MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x4130b0
++ >;
++ };
++
++ pinctrl_audmux3: audmux3grp {
++ fsl,pins = <
++ MX6SL_PAD_AUD_RXD__AUD3_RXD 0x4130b0
++ MX6SL_PAD_AUD_TXC__AUD3_TXC 0x4130b0
++ MX6SL_PAD_AUD_TXD__AUD3_TXD 0x4110b0
++ MX6SL_PAD_AUD_TXFS__AUD3_TXFS 0x4130b0
++ >;
++ };
++
++ pinctrl_ecspi1: ecspi1grp {
++ fsl,pins = <
++ MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1
++ MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1
++ MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
++ MX6SL_PAD_ECSPI1_SS0__GPIO4_IO11 0x80000000
++ >;
++ };
++
++ pinctrl_fec: fecgrp {
++ fsl,pins = <
++ MX6SL_PAD_FEC_MDC__FEC_MDC 0x1b0b0
++ MX6SL_PAD_FEC_MDIO__FEC_MDIO 0x1b0b0
++ MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV 0x1b0b0
++ MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0 0x1b0b0
++ MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1 0x1b0b0
++ MX6SL_PAD_FEC_TX_EN__FEC_TX_EN 0x1b0b0
++ MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0 0x1b0b0
++ MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1 0x1b0b0
++ MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT 0x4001b0a8
++ >;
++ };
++
++ pinctrl_i2c1: i2c1grp {
++ fsl,pins = <
++ MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1
++ MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1
++ >;
++ };
++
++
++ pinctrl_i2c2: i2c2grp {
++ fsl,pins = <
++ MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1
++ MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1
++ >;
++ };
++
++ pinctrl_led: ledgrp {
++ fsl,pins = <
++ MX6SL_PAD_HSIC_STROBE__GPIO3_IO20 0x17059
++ >;
++ };
++
++ pinctrl_kpp: kppgrp {
++ fsl,pins = <
++ MX6SL_PAD_KEY_ROW0__KEY_ROW0 0x1b010
++ MX6SL_PAD_KEY_ROW1__KEY_ROW1 0x1b010
++ MX6SL_PAD_KEY_ROW2__KEY_ROW2 0x1b0b0
++ MX6SL_PAD_KEY_COL0__KEY_COL0 0x110b0
++ MX6SL_PAD_KEY_COL1__KEY_COL1 0x110b0
++ MX6SL_PAD_KEY_COL2__KEY_COL2 0x110b0
++ >;
++ };
++
++ pinctrl_uart1: uart1grp {
++ fsl,pins = <
++ MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1
++ MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
++ >;
++ };
++
++ pinctrl_usbotg1: usbotg1grp {
++ fsl,pins = <
++ MX6SL_PAD_EPDC_PWRCOM__USB_OTG1_ID 0x17059
++ >;
++ };
++
++ pinctrl_usdhc1: usdhc1grp {
++ fsl,pins = <
++ MX6SL_PAD_SD1_CMD__SD1_CMD 0x17059
++ MX6SL_PAD_SD1_CLK__SD1_CLK 0x10059
++ MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x17059
++ MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x17059
++ MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x17059
++ MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x17059
++ MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x17059
++ MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x17059
++ MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x17059
++ MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059
++ >;
++ };
++
++ pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
++ fsl,pins = <
++ MX6SL_PAD_SD1_CMD__SD1_CMD 0x170b9
++ MX6SL_PAD_SD1_CLK__SD1_CLK 0x100b9
++ MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170b9
++ MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170b9
++ MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170b9
++ MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170b9
++ MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170b9
++ MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170b9
++ MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170b9
++ MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170b9
++ >;
++ };
++
++ pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
++ fsl,pins = <
++ MX6SL_PAD_SD1_CMD__SD1_CMD 0x170f9
++ MX6SL_PAD_SD1_CLK__SD1_CLK 0x100f9
++ MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
++ MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
++ MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
++ MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
++ MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x170f9
++ MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x170f9
++ MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x170f9
++ MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x170f9
++ >;
++ };
++
++ pinctrl_usdhc2: usdhc2grp {
++ fsl,pins = <
++ MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059
++ MX6SL_PAD_SD2_CLK__SD2_CLK 0x10059
++ MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059
++ MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059
++ MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059
++ MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059
++ >;
++ };
++
++ pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
++ fsl,pins = <
++ MX6SL_PAD_SD2_CMD__SD2_CMD 0x170b9
++ MX6SL_PAD_SD2_CLK__SD2_CLK 0x100b9
++ MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
++ MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
++ MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
++ MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
++ >;
++ };
++
++ pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
++ fsl,pins = <
++ MX6SL_PAD_SD2_CMD__SD2_CMD 0x170f9
++ MX6SL_PAD_SD2_CLK__SD2_CLK 0x100f9
++ MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
++ MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
++ MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
++ MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
++ >;
++ };
++
++ pinctrl_usdhc3: usdhc3grp {
++ fsl,pins = <
++ MX6SL_PAD_SD3_CMD__SD3_CMD 0x17059
++ MX6SL_PAD_SD3_CLK__SD3_CLK 0x10059
++ MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x17059
++ MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x17059
++ MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x17059
++ MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059
++ >;
++ };
++
++ pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
++ fsl,pins = <
++ MX6SL_PAD_SD3_CMD__SD3_CMD 0x170b9
++ MX6SL_PAD_SD3_CLK__SD3_CLK 0x100b9
++ MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
++ MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
++ MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
++ MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
++ >;
++ };
++
++ pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
++ fsl,pins = <
++ MX6SL_PAD_SD3_CMD__SD3_CMD 0x170f9
++ MX6SL_PAD_SD3_CLK__SD3_CLK 0x100f9
++ MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
++ MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
++ MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
++ MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
+ >;
+ };
+ };
+ };
+
++&kpp {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_kpp>;
++ linux,keymap = <
++ MATRIX_KEY(0x0, 0x0, KEY_UP) /* ROW0, COL0 */
++ MATRIX_KEY(0x0, 0x1, KEY_DOWN) /* ROW0, COL1 */
++ MATRIX_KEY(0x0, 0x2, KEY_ENTER) /* ROW0, COL2 */
++ MATRIX_KEY(0x1, 0x0, KEY_HOME) /* ROW1, COL0 */
++ MATRIX_KEY(0x1, 0x1, KEY_RIGHT) /* ROW1, COL1 */
++ MATRIX_KEY(0x1, 0x2, KEY_LEFT) /* ROW1, COL2 */
++ MATRIX_KEY(0x2, 0x0, KEY_VOLUMEDOWN) /* ROW2, COL0 */
++ MATRIX_KEY(0x2, 0x1, KEY_VOLUMEUP) /* ROW2, COL1 */
++ >;
++ status = "okay";
++};
++
++&ssi2 {
++ fsl,mode = "i2s-slave";
++ status = "okay";
++};
++
++&lcdif {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_lcdif_dat_0
++ &pinctrl_lcdif_ctrl_0>;
++ lcd-supply = <&reg_lcd_3v3>;
++ display = <&display>;
++ status = "okay";
++
++ display: display {
++ bits-per-pixel = <16>;
++ bus-width = <24>;
++
++ display-timings {
++ native-mode = <&timing0>;
++ timing0: timing0 {
++ clock-frequency = <33500000>;
++ hactive = <800>;
++ vactive = <480>;
++ hback-porch = <89>;
++ hfront-porch = <164>;
++ vback-porch = <23>;
++ vfront-porch = <10>;
++ hsync-len = <10>;
++ vsync-len = <10>;
++ hsync-active = <0>;
++ vsync-active = <0>;
++ de-active = <1>;
++ pixelclk-active = <0>;
++ };
++ };
++ };
++};
++
++&pwm1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm1_0>;
++ status = "okay";
++};
++
+ &uart1 {
+ pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_uart1_1>;
++ pinctrl-0 = <&pinctrl_uart1>;
+ status = "okay";
+ };
+
+ &usbotg1 {
+ vbus-supply = <&reg_usb_otg1_vbus>;
+ pinctrl-names = "default";
+- pinctrl-0 = <&pinctrl_usbotg1_1>;
++ pinctrl-0 = <&pinctrl_usbotg1>;
+ disable-over-current;
+ status = "okay";
+ };
+@@ -106,9 +721,9 @@
+
+ &usdhc1 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+- pinctrl-0 = <&pinctrl_usdhc1_1>;
+- pinctrl-1 = <&pinctrl_usdhc1_1_100mhz>;
+- pinctrl-2 = <&pinctrl_usdhc1_1_200mhz>;
++ pinctrl-0 = <&pinctrl_usdhc1>;
++ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
++ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
+ bus-width = <8>;
+ cd-gpios = <&gpio4 7 0>;
+ wp-gpios = <&gpio4 6 0>;
+@@ -117,9 +732,9 @@
+
+ &usdhc2 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+- pinctrl-0 = <&pinctrl_usdhc2_1>;
+- pinctrl-1 = <&pinctrl_usdhc2_1_100mhz>;
+- pinctrl-2 = <&pinctrl_usdhc2_1_200mhz>;
++ pinctrl-0 = <&pinctrl_usdhc2>;
++ pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
++ pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
+ cd-gpios = <&gpio5 0 0>;
+ wp-gpios = <&gpio4 29 0>;
+ status = "okay";
+@@ -127,9 +742,26 @@
+
+ &usdhc3 {
+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
+- pinctrl-0 = <&pinctrl_usdhc3_1>;
+- pinctrl-1 = <&pinctrl_usdhc3_1_100mhz>;
+- pinctrl-2 = <&pinctrl_usdhc3_1_200mhz>;
++ pinctrl-0 = <&pinctrl_usdhc3>;
++ pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
++ pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
+ cd-gpios = <&gpio3 22 0>;
+ status = "okay";
+ };
++
++&pxp {
++ status = "okay";
++};
++
++&gpc {
++ fsl,cpu_pupscr_sw2iso = <0xf>;
++ fsl,cpu_pupscr_sw = <0xf>;
++ fsl,cpu_pdnscr_iso2sw = <0x1>;
++ fsl,cpu_pdnscr_iso = <0x1>;
++ fsl,ldo-bypass; /* use ldo-bypass, u-boot will check it and configure */
++ pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
++};
++
++&gpu {
++ pu-supply = <&pu_dummy>; /* ldo-bypass:use pu_dummy if VDDSOC share with VDDPU */
++};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/Makefile linux-3.14.54/arch/arm/boot/dts/Makefile
+--- linux-3.14.54.orig/arch/arm/boot/dts/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/Makefile 2015-10-15 15:51:21.656891997 +0200
+@@ -154,16 +154,37 @@
+ imx53-qsb.dtb \
+ imx53-smd.dtb \
+ imx6dl-cubox-i.dtb \
++ imx6dl-dfi-fs700-m60.dtb \
++ imx6dl-gw51xx.dtb \
++ imx6dl-gw52xx.dtb \
++ imx6dl-gw53xx.dtb \
++ imx6dl-gw54xx.dtb \
+ imx6dl-hummingboard.dtb \
++ imx6dl-nitrogen6x.dtb \
++ imx6dl-phytec-pbab01.dtb \
+ imx6dl-sabreauto.dtb \
++ imx6dl-sabrelite.dtb \
+ imx6dl-sabresd.dtb \
++ imx6dl-sabresd-hdcp.dtb \
+ imx6dl-wandboard.dtb \
+ imx6q-arm2.dtb \
++ imx6q-cm-fx6.dtb \
+ imx6q-cubox-i.dtb \
++ imx6q-hummingboard.dtb \
++ imx6q-dfi-fs700-m60.dtb \
++ imx6q-dmo-edmqmx6.dtb \
++ imx6q-gk802.dtb \
++ imx6q-gw51xx.dtb \
++ imx6q-gw52xx.dtb \
++ imx6q-gw53xx.dtb \
++ imx6q-gw5400-a.dtb \
++ imx6q-gw54xx.dtb \
++ imx6q-nitrogen6x.dtb \
+ imx6q-phytec-pbab01.dtb \
+ imx6q-sabreauto.dtb \
+ imx6q-sabrelite.dtb \
+ imx6q-sabresd.dtb \
++ imx6q-sabresd-hdcp.dtb \
+ imx6q-sbc6x.dtb \
+ imx6q-udoo.dtb \
+ imx6q-wandboard.dtb \
+@@ -312,7 +333,14 @@
+ dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
+ vexpress-v2p-ca9.dtb \
+ vexpress-v2p-ca15-tc1.dtb \
+- vexpress-v2p-ca15_a7.dtb
++ vexpress-v2p-ca15_a7.dtb \
++ rtsm_ve-cortex_a9x2.dtb \
++ rtsm_ve-cortex_a9x4.dtb \
++ rtsm_ve-cortex_a15x1.dtb \
++ rtsm_ve-cortex_a15x2.dtb \
++ rtsm_ve-cortex_a15x4.dtb \
++ rtsm_ve-v2p-ca15x1-ca7x1.dtb \
++ rtsm_ve-v2p-ca15x4-ca7x4.dtb
+ dtb-$(CONFIG_ARCH_VIRT) += xenvm-4.2.dtb
+ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
+ wm8505-ref.dtb \
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/marco.dtsi linux-3.14.54/arch/arm/boot/dts/marco.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/marco.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/marco.dtsi 2015-10-12 10:56:17.838351176 +0200
++++ linux-3.14.54/arch/arm/boot/dts/marco.dtsi 2015-10-15 15:51:21.656891997 +0200
@@ -36,7 +36,7 @@
ranges = <0x40000000 0x40000000 0xa0000000>;
@@ -14518,7 +13179,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/marco.dtsi linux-3.14.54/arch/arm
arm,tag-latency = <1 1 1>;
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/prima2.dtsi linux-3.14.54/arch/arm/boot/dts/prima2.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/prima2.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/prima2.dtsi 2015-10-12 10:56:17.839351176 +0200
++++ linux-3.14.54/arch/arm/boot/dts/prima2.dtsi 2015-10-15 15:51:21.656891997 +0200
@@ -48,7 +48,7 @@
ranges = <0x40000000 0x40000000 0x80000000>;
@@ -14530,7 +13191,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/prima2.dtsi linux-3.14.54/arch/ar
arm,tag-latency = <1 1 1>;
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-cortex_a15x1.dts linux-3.14.54/arch/arm/boot/dts/rtsm_ve-cortex_a15x1.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-cortex_a15x1.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/rtsm_ve-cortex_a15x1.dts 2015-10-12 10:56:17.841351176 +0200
++++ linux-3.14.54/arch/arm/boot/dts/rtsm_ve-cortex_a15x1.dts 2015-10-15 15:51:21.656891997 +0200
@@ -0,0 +1,159 @@
+/*
+ * ARM Ltd. Fast Models
@@ -14693,7 +13354,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-cortex_a15x1.dts linux-3.
+/include/ "clcd-panels.dtsi"
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-cortex_a15x2.dts linux-3.14.54/arch/arm/boot/dts/rtsm_ve-cortex_a15x2.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-cortex_a15x2.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/rtsm_ve-cortex_a15x2.dts 2015-10-12 10:56:17.841351176 +0200
++++ linux-3.14.54/arch/arm/boot/dts/rtsm_ve-cortex_a15x2.dts 2015-10-15 15:51:21.656891997 +0200
@@ -0,0 +1,165 @@
+/*
+ * ARM Ltd. Fast Models
@@ -14862,7 +13523,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-cortex_a15x2.dts linux-3.
+/include/ "clcd-panels.dtsi"
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-cortex_a15x4.dts linux-3.14.54/arch/arm/boot/dts/rtsm_ve-cortex_a15x4.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-cortex_a15x4.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/rtsm_ve-cortex_a15x4.dts 2015-10-12 10:56:17.841351176 +0200
++++ linux-3.14.54/arch/arm/boot/dts/rtsm_ve-cortex_a15x4.dts 2015-10-15 15:51:21.660891732 +0200
@@ -0,0 +1,177 @@
+/*
+ * ARM Ltd. Fast Models
@@ -15043,7 +13704,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-cortex_a15x4.dts linux-3.
+/include/ "clcd-panels.dtsi"
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-cortex_a9x2.dts linux-3.14.54/arch/arm/boot/dts/rtsm_ve-cortex_a9x2.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-cortex_a9x2.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/rtsm_ve-cortex_a9x2.dts 2015-10-12 10:56:17.841351176 +0200
++++ linux-3.14.54/arch/arm/boot/dts/rtsm_ve-cortex_a9x2.dts 2015-10-15 15:51:21.660891732 +0200
@@ -0,0 +1,171 @@
+/*
+ * ARM Ltd. Fast Models
@@ -15218,7 +13879,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-cortex_a9x2.dts linux-3.1
+/include/ "clcd-panels.dtsi"
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-cortex_a9x4.dts linux-3.14.54/arch/arm/boot/dts/rtsm_ve-cortex_a9x4.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-cortex_a9x4.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/rtsm_ve-cortex_a9x4.dts 2015-10-12 10:56:17.842351176 +0200
++++ linux-3.14.54/arch/arm/boot/dts/rtsm_ve-cortex_a9x4.dts 2015-10-15 15:51:21.684890152 +0200
@@ -0,0 +1,183 @@
+/*
+ * ARM Ltd. Fast Models
@@ -15405,7 +14066,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-cortex_a9x4.dts linux-3.1
+/include/ "clcd-panels.dtsi"
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-motherboard.dtsi linux-3.14.54/arch/arm/boot/dts/rtsm_ve-motherboard.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-motherboard.dtsi 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/rtsm_ve-motherboard.dtsi 2015-10-12 10:56:17.842351176 +0200
++++ linux-3.14.54/arch/arm/boot/dts/rtsm_ve-motherboard.dtsi 2015-10-15 15:51:21.684890152 +0200
@@ -0,0 +1,231 @@
+/*
+ * ARM Ltd. Fast Models
@@ -15640,7 +14301,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-motherboard.dtsi linux-3.
+ };
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-v2p-ca15x1-ca7x1.dts linux-3.14.54/arch/arm/boot/dts/rtsm_ve-v2p-ca15x1-ca7x1.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-v2p-ca15x1-ca7x1.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/rtsm_ve-v2p-ca15x1-ca7x1.dts 2015-10-12 10:56:17.842351176 +0200
++++ linux-3.14.54/arch/arm/boot/dts/rtsm_ve-v2p-ca15x1-ca7x1.dts 2015-10-15 15:51:21.684890152 +0200
@@ -0,0 +1,233 @@
+/*
+ * ARM Ltd. Fast Models
@@ -15877,7 +14538,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-v2p-ca15x1-ca7x1.dts linu
+/include/ "clcd-panels.dtsi"
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-v2p-ca15x4-ca7x4.dts linux-3.14.54/arch/arm/boot/dts/rtsm_ve-v2p-ca15x4-ca7x4.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-v2p-ca15x4-ca7x4.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/boot/dts/rtsm_ve-v2p-ca15x4-ca7x4.dts 2015-10-12 10:56:17.842351176 +0200
++++ linux-3.14.54/arch/arm/boot/dts/rtsm_ve-v2p-ca15x4-ca7x4.dts 2015-10-15 15:51:21.688889888 +0200
@@ -0,0 +1,317 @@
+/*
+ * ARM Ltd. Fast Models
@@ -16196,20 +14857,9 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/rtsm_ve-v2p-ca15x4-ca7x4.dts linu
+};
+
+/include/ "clcd-panels.dtsi"
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi linux-3.14.54/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
---- linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi 2015-10-12 10:56:17.843351176 +0200
-@@ -228,6 +228,7 @@
- };
-
- clcd@1f0000 {
-+ status = "disabled";
- compatible = "arm,pl111", "arm,primecell";
- reg = <0x1f0000 0x1000>;
- interrupts = <14>;
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2m.dtsi linux-3.14.54/arch/arm/boot/dts/vexpress-v2m.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2m.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/vexpress-v2m.dtsi 2015-10-12 10:56:17.842351176 +0200
++++ linux-3.14.54/arch/arm/boot/dts/vexpress-v2m.dtsi 2015-10-15 15:51:21.688889888 +0200
@@ -227,6 +227,7 @@
};
@@ -16218,30 +14868,20 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2m.dtsi linux-3.14.54/a
compatible = "arm,pl111", "arm,primecell";
reg = <0x1f000 0x1000>;
interrupts = <14>;
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts linux-3.14.54/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts 2015-10-12 10:56:17.844351176 +0200
-@@ -9,6 +9,8 @@
-
- /dts-v1/;
-
-+/memreserve/ 0xbf000000 0x01000000;
-+
- / {
- model = "V2P-CA15";
- arm,hbi = <0x237>;
-@@ -57,6 +59,8 @@
- interrupts = <0 85 4>;
- clocks = <&oscclk5>;
- clock-names = "pxlclk";
-+ mode = "1024x768-16@60";
-+ framebuffer = <0 0xbf000000 0 0x01000000>;
- };
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi linux-3.14.54/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi
+--- linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/vexpress-v2m-rs1.dtsi 2015-10-15 15:51:21.688889888 +0200
+@@ -228,6 +228,7 @@
+ };
- memory-controller@2b0a0000 {
+ clcd@1f0000 {
++ status = "disabled";
+ compatible = "arm,pl111", "arm,primecell";
+ reg = <0x1f0000 0x1000>;
+ interrupts = <14>;
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts linux-3.14.54/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts 2015-10-12 10:56:17.843351176 +0200
++++ linux-3.14.54/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts 2015-10-15 15:51:21.688889888 +0200
@@ -9,6 +9,8 @@
/dts-v1/;
@@ -16437,9 +15077,30 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts linux-3.
dcc {
compatible = "arm,vexpress,config-bus";
arm,vexpress,config-bridge = <&v2m_sysreg>;
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts linux-3.14.54/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts 2015-10-15 15:51:21.688889888 +0200
+@@ -9,6 +9,8 @@
+
+ /dts-v1/;
+
++/memreserve/ 0xbf000000 0x01000000;
++
+ / {
+ model = "V2P-CA15";
+ arm,hbi = <0x237>;
+@@ -57,6 +59,8 @@
+ interrupts = <0 85 4>;
+ clocks = <&oscclk5>;
+ clock-names = "pxlclk";
++ mode = "1024x768-16@60";
++ framebuffer = <0 0xbf000000 0 0x01000000>;
+ };
+
+ memory-controller@2b0a0000 {
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2p-ca5s.dts linux-3.14.54/arch/arm/boot/dts/vexpress-v2p-ca5s.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2p-ca5s.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/vexpress-v2p-ca5s.dts 2015-10-12 10:56:17.844351176 +0200
++++ linux-3.14.54/arch/arm/boot/dts/vexpress-v2p-ca5s.dts 2015-10-15 15:51:21.688889888 +0200
@@ -9,6 +9,8 @@
/dts-v1/;
@@ -16460,7 +15121,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2p-ca5s.dts linux-3.14.
memory-controller@2a150000 {
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2p-ca9.dts linux-3.14.54/arch/arm/boot/dts/vexpress-v2p-ca9.dts
--- linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2p-ca9.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/vexpress-v2p-ca9.dts 2015-10-12 10:56:17.844351176 +0200
++++ linux-3.14.54/arch/arm/boot/dts/vexpress-v2p-ca9.dts 2015-10-15 15:51:21.688889888 +0200
@@ -9,6 +9,8 @@
/dts-v1/;
@@ -16479,26 +15140,9 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/vexpress-v2p-ca9.dts linux-3.14.5
};
memory-controller@100e0000 {
-diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/vf610-twr.dts linux-3.14.54/arch/arm/boot/dts/vf610-twr.dts
---- linux-3.14.54.orig/arch/arm/boot/dts/vf610-twr.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/vf610-twr.dts 2015-10-12 10:56:17.845351176 +0200
-@@ -25,11 +25,13 @@
- clocks {
- audio_ext {
- compatible = "fixed-clock";
-+ #clock-cells = <0>;
- clock-frequency = <24576000>;
- };
-
- enet_ext {
- compatible = "fixed-clock";
-+ #clock-cells = <0>;
- clock-frequency = <50000000>;
- };
- };
diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/vf610.dtsi linux-3.14.54/arch/arm/boot/dts/vf610.dtsi
--- linux-3.14.54.orig/arch/arm/boot/dts/vf610.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/boot/dts/vf610.dtsi 2015-10-12 10:56:17.845351176 +0200
++++ linux-3.14.54/arch/arm/boot/dts/vf610.dtsi 2015-10-15 15:51:21.692889622 +0200
@@ -44,11 +44,13 @@
sxosc {
@@ -16513,9 +15157,26 @@ diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/vf610.dtsi linux-3.14.54/arch/arm
clock-frequency = <24000000>;
};
};
+diff -Nur linux-3.14.54.orig/arch/arm/boot/dts/vf610-twr.dts linux-3.14.54/arch/arm/boot/dts/vf610-twr.dts
+--- linux-3.14.54.orig/arch/arm/boot/dts/vf610-twr.dts 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/boot/dts/vf610-twr.dts 2015-10-15 15:51:21.692889622 +0200
+@@ -25,11 +25,13 @@
+ clocks {
+ audio_ext {
+ compatible = "fixed-clock";
++ #clock-cells = <0>;
+ clock-frequency = <24576000>;
+ };
+
+ enet_ext {
+ compatible = "fixed-clock";
++ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ };
+ };
diff -Nur linux-3.14.54.orig/arch/arm/common/Makefile linux-3.14.54/arch/arm/common/Makefile
--- linux-3.14.54.orig/arch/arm/common/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/common/Makefile 2015-10-12 10:56:17.845351176 +0200
++++ linux-3.14.54/arch/arm/common/Makefile 2015-10-15 15:51:21.692889622 +0200
@@ -13,6 +13,7 @@
obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o
obj-$(CONFIG_ARM_TIMER_SP804) += timer-sp.o
@@ -16526,7 +15187,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/common/Makefile linux-3.14.54/arch/arm/com
obj-$(CONFIG_TI_PRIV_EDMA) += edma.o
diff -Nur linux-3.14.54.orig/arch/arm/configs/imx_v6_v7_defconfig linux-3.14.54/arch/arm/configs/imx_v6_v7_defconfig
--- linux-3.14.54.orig/arch/arm/configs/imx_v6_v7_defconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/configs/imx_v6_v7_defconfig 2015-10-12 10:56:17.846351176 +0200
++++ linux-3.14.54/arch/arm/configs/imx_v6_v7_defconfig 2015-10-15 15:51:23.196790629 +0200
@@ -45,6 +45,9 @@
CONFIG_AEABI=y
CONFIG_HIGHMEM=y
@@ -16643,7 +15304,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/configs/imx_v6_v7_defconfig linux-3.14.54/
CONFIG_PWM=y
diff -Nur linux-3.14.54.orig/arch/arm/configs/imx_v7_cbi_hb_base_defconfig linux-3.14.54/arch/arm/configs/imx_v7_cbi_hb_base_defconfig
--- linux-3.14.54.orig/arch/arm/configs/imx_v7_cbi_hb_base_defconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/configs/imx_v7_cbi_hb_base_defconfig 2015-10-12 10:56:17.846351176 +0200
++++ linux-3.14.54/arch/arm/configs/imx_v7_cbi_hb_base_defconfig 2015-10-15 15:51:23.256786681 +0200
@@ -0,0 +1,367 @@
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_KERNEL_LZO=y
@@ -17014,7 +15675,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/configs/imx_v7_cbi_hb_base_defconfig linux
+CONFIG_IR_GPIO_CIR=m
diff -Nur linux-3.14.54.orig/arch/arm/configs/imx_v7_cbi_hb_defconfig linux-3.14.54/arch/arm/configs/imx_v7_cbi_hb_defconfig
--- linux-3.14.54.orig/arch/arm/configs/imx_v7_cbi_hb_defconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/configs/imx_v7_cbi_hb_defconfig 2015-10-12 10:56:17.847351176 +0200
++++ linux-3.14.54/arch/arm/configs/imx_v7_cbi_hb_defconfig 2015-10-15 15:51:23.260786417 +0200
@@ -0,0 +1,5138 @@
+#
+# Automatically generated make config: don't edit
@@ -22156,7 +20817,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/configs/imx_v7_cbi_hb_defconfig linux-3.14
+
diff -Nur linux-3.14.54.orig/arch/arm/configs/imx_v7_defconfig linux-3.14.54/arch/arm/configs/imx_v7_defconfig
--- linux-3.14.54.orig/arch/arm/configs/imx_v7_defconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/configs/imx_v7_defconfig 2015-10-12 10:56:17.848351176 +0200
++++ linux-3.14.54/arch/arm/configs/imx_v7_defconfig 2015-10-15 15:51:23.264786153 +0200
@@ -0,0 +1,343 @@
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_KERNEL_LZO=y
@@ -22503,7 +21164,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/configs/imx_v7_defconfig linux-3.14.54/arc
+CONFIG_LIBCRC32C=m
diff -Nur linux-3.14.54.orig/arch/arm/configs/imx_v7_mfg_defconfig linux-3.14.54/arch/arm/configs/imx_v7_mfg_defconfig
--- linux-3.14.54.orig/arch/arm/configs/imx_v7_mfg_defconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/configs/imx_v7_mfg_defconfig 2015-10-12 10:56:17.848351176 +0200
++++ linux-3.14.54/arch/arm/configs/imx_v7_mfg_defconfig 2015-10-15 15:51:23.264786153 +0200
@@ -0,0 +1,341 @@
+CONFIG_KERNEL_LZO=y
+CONFIG_SYSVIPC=y
@@ -22848,7 +21509,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/configs/imx_v7_mfg_defconfig linux-3.14.54
+CONFIG_LIBCRC32C=m
diff -Nur linux-3.14.54.orig/arch/arm/include/asm/arch_timer.h linux-3.14.54/arch/arm/include/asm/arch_timer.h
--- linux-3.14.54.orig/arch/arm/include/asm/arch_timer.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/include/asm/arch_timer.h 2015-10-12 10:56:17.848351176 +0200
++++ linux-3.14.54/arch/arm/include/asm/arch_timer.h 2015-10-15 15:51:23.264786153 +0200
@@ -107,7 +107,6 @@
/* Also disable virtual event stream */
cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN
@@ -22859,7 +21520,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/include/asm/arch_timer.h linux-3.14.54/arc
arch_timer_set_cntkctl(cntkctl);
diff -Nur linux-3.14.54.orig/arch/arm/include/asm/atomic.h linux-3.14.54/arch/arm/include/asm/atomic.h
--- linux-3.14.54.orig/arch/arm/include/asm/atomic.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/include/asm/atomic.h 2015-10-12 10:56:17.848351176 +0200
++++ linux-3.14.54/arch/arm/include/asm/atomic.h 2015-10-15 15:51:23.940739293 +0200
@@ -60,6 +60,7 @@
int result;
@@ -22990,7 +21651,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/include/asm/atomic.h linux-3.14.54/arch/ar
"1: ldrexd %0, %H0, [%4]\n"
diff -Nur linux-3.14.54.orig/arch/arm/include/asm/cmpxchg.h linux-3.14.54/arch/arm/include/asm/cmpxchg.h
--- linux-3.14.54.orig/arch/arm/include/asm/cmpxchg.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/include/asm/cmpxchg.h 2015-10-12 10:56:17.849351176 +0200
++++ linux-3.14.54/arch/arm/include/asm/cmpxchg.h 2015-10-15 15:51:23.944739382 +0200
@@ -2,6 +2,7 @@
#define __ASM_ARM_CMPXCHG_H
@@ -23027,7 +21688,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/include/asm/cmpxchg.h linux-3.14.54/arch/a
" teq %1, %4\n"
diff -Nur linux-3.14.54.orig/arch/arm/include/asm/ftrace.h linux-3.14.54/arch/arm/include/asm/ftrace.h
--- linux-3.14.54.orig/arch/arm/include/asm/ftrace.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/include/asm/ftrace.h 2015-10-12 10:56:17.849351176 +0200
++++ linux-3.14.54/arch/arm/include/asm/ftrace.h 2015-10-15 15:51:23.944739382 +0200
@@ -52,15 +52,7 @@
#endif
@@ -23047,7 +21708,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/include/asm/ftrace.h linux-3.14.54/arch/ar
diff -Nur linux-3.14.54.orig/arch/arm/include/asm/futex.h linux-3.14.54/arch/arm/include/asm/futex.h
--- linux-3.14.54.orig/arch/arm/include/asm/futex.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/include/asm/futex.h 2015-10-12 10:56:17.849351176 +0200
++++ linux-3.14.54/arch/arm/include/asm/futex.h 2015-10-15 15:51:23.944739382 +0200
@@ -23,6 +23,7 @@
#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \
@@ -23067,7 +21728,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/include/asm/futex.h linux-3.14.54/arch/arm
" teq %1, %2\n"
diff -Nur linux-3.14.54.orig/arch/arm/include/asm/glue-cache.h linux-3.14.54/arch/arm/include/asm/glue-cache.h
--- linux-3.14.54.orig/arch/arm/include/asm/glue-cache.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/include/asm/glue-cache.h 2015-10-12 10:56:17.850351176 +0200
++++ linux-3.14.54/arch/arm/include/asm/glue-cache.h 2015-10-15 15:51:23.944739382 +0200
@@ -102,19 +102,19 @@
#endif
@@ -23098,7 +21759,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/include/asm/glue-cache.h linux-3.14.54/arc
#if defined(CONFIG_CPU_V7M)
diff -Nur linux-3.14.54.orig/arch/arm/include/asm/hardware/cache-l2x0.h linux-3.14.54/arch/arm/include/asm/hardware/cache-l2x0.h
--- linux-3.14.54.orig/arch/arm/include/asm/hardware/cache-l2x0.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/include/asm/hardware/cache-l2x0.h 2015-10-12 10:56:17.850351176 +0200
++++ linux-3.14.54/arch/arm/include/asm/hardware/cache-l2x0.h 2015-10-15 15:51:23.944739382 +0200
@@ -26,8 +26,8 @@
#define L2X0_CACHE_TYPE 0x004
#define L2X0_CTRL 0x100
@@ -23239,7 +21900,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/include/asm/hardware/cache-l2x0.h linux-3.
diff -Nur linux-3.14.54.orig/arch/arm/include/asm/outercache.h linux-3.14.54/arch/arm/include/asm/outercache.h
--- linux-3.14.54.orig/arch/arm/include/asm/outercache.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/include/asm/outercache.h 2015-10-12 10:56:17.850351176 +0200
++++ linux-3.14.54/arch/arm/include/asm/outercache.h 2015-10-15 15:51:23.944739382 +0200
@@ -21,6 +21,7 @@
#ifndef __ASM_OUTERCACHE_H
#define __ASM_OUTERCACHE_H
@@ -23370,7 +22031,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/include/asm/outercache.h linux-3.14.54/arc
if (outer_cache.sync)
diff -Nur linux-3.14.54.orig/arch/arm/include/asm/pmu.h linux-3.14.54/arch/arm/include/asm/pmu.h
--- linux-3.14.54.orig/arch/arm/include/asm/pmu.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/include/asm/pmu.h 2015-10-12 10:56:17.851351175 +0200
++++ linux-3.14.54/arch/arm/include/asm/pmu.h 2015-10-15 15:51:23.944739382 +0200
@@ -62,9 +62,19 @@
raw_spinlock_t pmu_lock;
};
@@ -23402,7 +22063,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/include/asm/pmu.h linux-3.14.54/arch/arm/i
struct mutex reserve_mutex;
diff -Nur linux-3.14.54.orig/arch/arm/include/asm/psci.h linux-3.14.54/arch/arm/include/asm/psci.h
--- linux-3.14.54.orig/arch/arm/include/asm/psci.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/include/asm/psci.h 2015-10-12 10:56:17.851351175 +0200
++++ linux-3.14.54/arch/arm/include/asm/psci.h 2015-10-15 15:51:23.948739401 +0200
@@ -16,6 +16,10 @@
#define PSCI_POWER_STATE_TYPE_STANDBY 0
@@ -23429,7 +22090,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/include/asm/psci.h linux-3.14.54/arch/arm/
#endif /* __ASM_ARM_PSCI_H */
diff -Nur linux-3.14.54.orig/arch/arm/include/asm/topology.h linux-3.14.54/arch/arm/include/asm/topology.h
--- linux-3.14.54.orig/arch/arm/include/asm/topology.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/include/asm/topology.h 2015-10-12 10:56:17.851351175 +0200
++++ linux-3.14.54/arch/arm/include/asm/topology.h 2015-10-15 15:51:23.952739417 +0200
@@ -26,11 +26,14 @@
void init_cpu_topology(void);
void store_cpu_topology(unsigned int cpuid);
@@ -23445,9 +22106,129 @@ diff -Nur linux-3.14.54.orig/arch/arm/include/asm/topology.h linux-3.14.54/arch/
#endif
+diff -Nur linux-3.14.54.orig/arch/arm/Kconfig linux-3.14.54/arch/arm/Kconfig
+--- linux-3.14.54.orig/arch/arm/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/Kconfig 2015-10-15 15:51:23.952739417 +0200
+@@ -1216,19 +1216,6 @@
+ register of the Cortex-A9 which reduces the linefill issuing
+ capabilities of the processor.
+
+-config PL310_ERRATA_588369
+- bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
+- depends on CACHE_L2X0
+- help
+- The PL310 L2 cache controller implements three types of Clean &
+- Invalidate maintenance operations: by Physical Address
+- (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
+- They are architecturally defined to behave as the execution of a
+- clean operation followed immediately by an invalidate operation,
+- both performing to the same memory location. This functionality
+- is not correctly implemented in PL310 as clean lines are not
+- invalidated as a result of these operations.
+-
+ config ARM_ERRATA_643719
+ bool "ARM errata: LoUIS bit field in CLIDR register is incorrect"
+ depends on CPU_V7 && SMP
+@@ -1251,17 +1238,6 @@
+ tables. The workaround changes the TLB flushing routines to invalidate
+ entries regardless of the ASID.
+
+-config PL310_ERRATA_727915
+- bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
+- depends on CACHE_L2X0
+- help
+- PL310 implements the Clean & Invalidate by Way L2 cache maintenance
+- operation (offset 0x7FC). This operation runs in background so that
+- PL310 can handle normal accesses while it is in progress. Under very
+- rare circumstances, due to this erratum, write data can be lost when
+- PL310 treats a cacheable write transaction during a Clean &
+- Invalidate by Way operation.
+-
+ config ARM_ERRATA_743622
+ bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
+ depends on CPU_V7
+@@ -1287,21 +1263,6 @@
+ operation is received by a CPU before the ICIALLUIS has completed,
+ potentially leading to corrupted entries in the cache or TLB.
+
+-config PL310_ERRATA_753970
+- bool "PL310 errata: cache sync operation may be faulty"
+- depends on CACHE_PL310
+- help
+- This option enables the workaround for the 753970 PL310 (r3p0) erratum.
+-
+- Under some condition the effect of cache sync operation on
+- the store buffer still remains when the operation completes.
+- This means that the store buffer is always asked to drain and
+- this prevents it from merging any further writes. The workaround
+- is to replace the normal offset of cache sync operation (0x730)
+- by another offset targeting an unmapped PL310 register 0x740.
+- This has the same effect as the cache sync operation: store buffer
+- drain and waiting for all buffers empty.
+-
+ config ARM_ERRATA_754322
+ bool "ARM errata: possible faulty MMU translations following an ASID switch"
+ depends on CPU_V7
+@@ -1350,18 +1311,6 @@
+ relevant cache maintenance functions and sets a specific bit
+ in the diagnostic control register of the SCU.
+
+-config PL310_ERRATA_769419
+- bool "PL310 errata: no automatic Store Buffer drain"
+- depends on CACHE_L2X0
+- help
+- On revisions of the PL310 prior to r3p2, the Store Buffer does
+- not automatically drain. This can cause normal, non-cacheable
+- writes to be retained when the memory system is idle, leading
+- to suboptimal I/O performance for drivers using coherent DMA.
+- This option adds a write barrier to the cpu_idle loop so that,
+- on systems with an outer cache, the store buffer is drained
+- explicitly.
+-
+ config ARM_ERRATA_775420
+ bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
+ depends on CPU_V7
+@@ -1391,6 +1340,29 @@
+ loop buffer may deliver incorrect instructions. This
+ workaround disables the loop buffer to avoid the erratum.
+
++config ARM_ERRATA_794072
++ bool "ARM errata: A short loop including a DMB instruction might cause a denial of service"
++ depends on CPU_V7 && SMP
++ help
++ This option enables the workaround for the 794072 Cortex-A9
++ (all revisions). A processor which continuously executes a short
++ loop containing a DMB instruction might prevent a CP15 operation
++ broadcast by another processor making further progress, causing
++ a denial of service. This erratum can be worked around by setting
++ bit[4] of the undocumented Diagnostic Control Register to 1.
++
++config ARM_ERRATA_761320
++ bool "Full cache line writes to the same memory region from at least two processors might deadlock processor"
++ depends on CPU_V7 && SMP
++ help
++ This option enables the workaround for the 761320 Cortex-A9 (r0..r3).
++ Under very rare circumstances, full cache line writes
++ from (at least) 2 processors on cache lines in hazard with
++ other requests may cause arbitration issues in the SCU,
++ leading to processor deadlock. This erratum can be
++ worked around by setting bit[21] of the undocumented
++ Diagnostic Control Register to 1.
++
+ endmenu
+
+ source "arch/arm/common/Kconfig"
+@@ -1835,6 +1807,7 @@
+ range 11 64 if ARCH_SHMOBILE_LEGACY
+ default "12" if SOC_AM33XX
+ default "9" if SA1111 || ARCH_EFM32
++ default "14" if ARCH_MXC
+ default "11"
+ help
+ The kernel memory allocator divides physically contiguous memory
diff -Nur linux-3.14.54.orig/arch/arm/kernel/perf_event.c linux-3.14.54/arch/arm/kernel/perf_event.c
--- linux-3.14.54.orig/arch/arm/kernel/perf_event.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/kernel/perf_event.c 2015-10-12 10:56:17.852351175 +0200
++++ linux-3.14.54/arch/arm/kernel/perf_event.c 2015-10-15 15:51:23.952739417 +0200
@@ -12,6 +12,7 @@
*/
#define pr_fmt(fmt) "hw perfevents: " fmt
@@ -23518,7 +22299,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/kernel/perf_event.c linux-3.14.54/arch/arm
return -EOPNOTSUPP;
diff -Nur linux-3.14.54.orig/arch/arm/kernel/perf_event_cpu.c linux-3.14.54/arch/arm/kernel/perf_event_cpu.c
--- linux-3.14.54.orig/arch/arm/kernel/perf_event_cpu.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/kernel/perf_event_cpu.c 2015-10-12 10:56:17.852351175 +0200
++++ linux-3.14.54/arch/arm/kernel/perf_event_cpu.c 2015-10-15 15:51:23.956739363 +0200
@@ -19,6 +19,7 @@
#define pr_fmt(fmt) "CPU PMU: " fmt
@@ -23784,7 +22565,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/kernel/perf_event_cpu.c linux-3.14.54/arch
}
diff -Nur linux-3.14.54.orig/arch/arm/kernel/perf_event_v7.c linux-3.14.54/arch/arm/kernel/perf_event_v7.c
--- linux-3.14.54.orig/arch/arm/kernel/perf_event_v7.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/kernel/perf_event_v7.c 2015-10-12 10:56:17.853351175 +0200
++++ linux-3.14.54/arch/arm/kernel/perf_event_v7.c 2015-10-15 15:51:23.956739363 +0200
@@ -950,6 +950,51 @@
}
#endif
@@ -23893,7 +22674,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/kernel/perf_event_v7.c linux-3.14.54/arch/
cpu_pmu->set_event_filter = armv7pmu_set_event_filter;
diff -Nur linux-3.14.54.orig/arch/arm/kernel/process.c linux-3.14.54/arch/arm/kernel/process.c
--- linux-3.14.54.orig/arch/arm/kernel/process.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/kernel/process.c 2015-10-12 10:56:17.853351175 +0200
++++ linux-3.14.54/arch/arm/kernel/process.c 2015-10-15 15:51:23.956739363 +0200
@@ -172,8 +172,10 @@
*/
void arch_cpu_idle(void)
@@ -23907,7 +22688,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/kernel/process.c linux-3.14.54/arch/arm/ke
/*
diff -Nur linux-3.14.54.orig/arch/arm/kernel/psci.c linux-3.14.54/arch/arm/kernel/psci.c
--- linux-3.14.54.orig/arch/arm/kernel/psci.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/kernel/psci.c 2015-10-12 10:56:17.854351175 +0200
++++ linux-3.14.54/arch/arm/kernel/psci.c 2015-10-15 15:51:23.956739363 +0200
@@ -42,6 +42,7 @@
#define PSCI_RET_EOPNOTSUPP -1
#define PSCI_RET_EINVAL -2
@@ -23953,7 +22734,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/kernel/psci.c linux-3.14.54/arch/arm/kerne
+}
diff -Nur linux-3.14.54.orig/arch/arm/kernel/setup.c linux-3.14.54/arch/arm/kernel/setup.c
--- linux-3.14.54.orig/arch/arm/kernel/setup.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/kernel/setup.c 2015-10-12 10:56:17.854351175 +0200
++++ linux-3.14.54/arch/arm/kernel/setup.c 2015-10-15 15:51:23.960739182 +0200
@@ -273,6 +273,19 @@
int aliasing_icache;
unsigned int id_reg, num_sets, line_size;
@@ -23976,7 +22757,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/kernel/setup.c linux-3.14.54/arch/arm/kern
return 0;
diff -Nur linux-3.14.54.orig/arch/arm/kernel/topology.c linux-3.14.54/arch/arm/kernel/topology.c
--- linux-3.14.54.orig/arch/arm/kernel/topology.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/kernel/topology.c 2015-10-12 10:56:17.854351175 +0200
++++ linux-3.14.54/arch/arm/kernel/topology.c 2015-10-15 15:51:23.960739182 +0200
@@ -267,6 +267,33 @@
}
@@ -24013,7 +22794,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/kernel/topology.c linux-3.14.54/arch/arm/k
*/
diff -Nur linux-3.14.54.orig/arch/arm/lib/bitops.h linux-3.14.54/arch/arm/lib/bitops.h
--- linux-3.14.54.orig/arch/arm/lib/bitops.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/lib/bitops.h 2015-10-12 10:56:17.855351175 +0200
++++ linux-3.14.54/arch/arm/lib/bitops.h 2015-10-15 15:51:23.980739176 +0200
@@ -37,6 +37,11 @@
add r1, r1, r0, lsl #2 @ Get word offset
mov r3, r2, lsl r3 @ create mask
@@ -24028,7 +22809,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/lib/bitops.h linux-3.14.54/arch/arm/lib/bi
\instr r2, r2, r3 @ toggle bit
diff -Nur linux-3.14.54.orig/arch/arm/mach-berlin/berlin.c linux-3.14.54/arch/arm/mach-berlin/berlin.c
--- linux-3.14.54.orig/arch/arm/mach-berlin/berlin.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-berlin/berlin.c 2015-10-12 10:56:17.855351175 +0200
++++ linux-3.14.54/arch/arm/mach-berlin/berlin.c 2015-10-15 15:51:23.980739176 +0200
@@ -24,7 +24,7 @@
* with DT probing for L2CCs, berlin_init_machine can be removed.
* Note: 88DE3005 (Armada 1500-mini) uses pl310 l2cc
@@ -24040,7 +22821,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-berlin/berlin.c linux-3.14.54/arch/ar
diff -Nur linux-3.14.54.orig/arch/arm/mach-cns3xxx/core.c linux-3.14.54/arch/arm/mach-cns3xxx/core.c
--- linux-3.14.54.orig/arch/arm/mach-cns3xxx/core.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-cns3xxx/core.c 2015-10-12 10:56:17.855351175 +0200
++++ linux-3.14.54/arch/arm/mach-cns3xxx/core.c 2015-10-15 15:51:23.980739176 +0200
@@ -240,9 +240,9 @@
*
* 1 cycle of latency for setup, read and write accesses
@@ -24071,7 +22852,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-cns3xxx/core.c linux-3.14.54/arch/arm
#endif /* CONFIG_CACHE_L2X0 */
diff -Nur linux-3.14.54.orig/arch/arm/mach-exynos/common.c linux-3.14.54/arch/arm/mach-exynos/common.c
--- linux-3.14.54.orig/arch/arm/mach-exynos/common.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-exynos/common.c 2015-10-12 10:56:17.856351175 +0200
++++ linux-3.14.54/arch/arm/mach-exynos/common.c 2015-10-15 15:51:23.980739176 +0200
@@ -45,9 +45,6 @@
#include "common.h"
#include "regs-pmu.h"
@@ -24093,7 +22874,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-exynos/common.c linux-3.14.54/arch/ar
diff -Nur linux-3.14.54.orig/arch/arm/mach-highbank/highbank.c linux-3.14.54/arch/arm/mach-highbank/highbank.c
--- linux-3.14.54.orig/arch/arm/mach-highbank/highbank.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-highbank/highbank.c 2015-10-12 10:56:17.856351175 +0200
++++ linux-3.14.54/arch/arm/mach-highbank/highbank.c 2015-10-15 15:51:23.984739013 +0200
@@ -20,7 +20,7 @@
#include <linux/input.h>
#include <linux/io.h>
@@ -24136,91 +22917,9 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-highbank/highbank.c linux-3.14.54/arc
}
}
-diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/Kconfig linux-3.14.54/arch/arm/mach-imx/Kconfig
---- linux-3.14.54.orig/arch/arm/mach-imx/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/Kconfig 2015-10-12 10:56:17.862351175 +0200
-@@ -1,5 +1,6 @@
- config ARCH_MXC
- bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
-+ select ARCH_HAS_RESET_CONTROLLER
- select ARCH_REQUIRE_GPIOLIB
- select ARM_CPU_SUSPEND if PM
- select ARM_PATCH_PHYS_VIRT
-@@ -13,6 +14,7 @@
- select PINCTRL
- select SOC_BUS
- select SPARSE_IRQ
-+ select SRAM
- select USE_OF
- help
- Support for Freescale MXC/iMX-based family of processors
-@@ -63,7 +65,6 @@
-
- config HAVE_IMX_SRC
- def_bool y if SMP
-- select ARCH_HAS_RESET_CONTROLLER
-
- config IMX_HAVE_IOMUX_V1
- bool
-@@ -791,6 +792,8 @@
- select ARM_ERRATA_754322
- select ARM_ERRATA_764369 if SMP
- select ARM_ERRATA_775420
-+ select ARM_ERRATA_794072 if SMP
-+ select ARM_ERRATA_761320 if SMP
- select ARM_GIC
- select CPU_V7
- select HAVE_ARM_SCU if SMP
-@@ -803,11 +806,13 @@
- select MFD_SYSCON
- select MIGHT_HAVE_PCI
- select PCI_DOMAINS if PCI
-+ select ARCH_SUPPORTS_MSI
- select PINCTRL_IMX6Q
- select PL310_ERRATA_588369 if CACHE_PL310
- select PL310_ERRATA_727915 if CACHE_PL310
- select PL310_ERRATA_769419 if CACHE_PL310
- select PM_OPP if PM
-+ select ZONE_DMA
-
- help
- This enables support for Freescale i.MX6 Quad processor.
-diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/Makefile linux-3.14.54/arch/arm/mach-imx/Makefile
---- linux-3.14.54.orig/arch/arm/mach-imx/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/Makefile 2015-10-12 10:56:17.864351175 +0200
-@@ -30,6 +30,7 @@
- ifeq ($(CONFIG_CPU_IDLE),y)
- obj-$(CONFIG_SOC_IMX5) += cpuidle-imx5.o
- obj-$(CONFIG_SOC_IMX6Q) += cpuidle-imx6q.o
-+obj-$(CONFIG_SOC_IMX6SL) += cpuidle-imx6sl.o
- endif
-
- ifdef CONFIG_SND_IMX_SOC
-@@ -101,9 +102,18 @@
- obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o
- obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o mach-imx6sl.o
-
--obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o headsmp.o
--# i.MX6SL reuses i.MX6Q code
--obj-$(CONFIG_SOC_IMX6SL) += pm-imx6q.o headsmp.o
-+AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a
-+obj-$(CONFIG_PM) += suspend-imx6.o pm-imx6.o headsmp.o
-+
-+obj-y += busfreq-imx6.o
-+ifeq ($(CONFIG_ARM_IMX6_CPUFREQ),y)
-+obj-$(CONFIG_SOC_IMX6Q) += ddr3_freq_imx6.o busfreq_ddr3.o
-+obj-$(CONFIG_SOC_IMX6SL) += lpddr2_freq_imx6.o busfreq_lpddr2.o
-+endif
-+ifeq ($(CONFIG_CPU_IDLE), y)
-+obj-$(CONFIG_SOC_IMX6SL) += imx6sl_wfi.o
-+endif
-+
-
- # i.MX5 based machines
- obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/anatop.c linux-3.14.54/arch/arm/mach-imx/anatop.c
--- linux-3.14.54.orig/arch/arm/mach-imx/anatop.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/anatop.c 2015-10-12 10:56:17.856351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/anatop.c 2015-10-15 15:51:23.984739013 +0200
@@ -9,6 +9,7 @@
* http://www.gnu.org/copyleft/gpl.html
*/
@@ -24285,9 +22984,484 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/anatop.c linux-3.14.54/arch/arm/m
default:
revision = IMX_CHIP_REVISION_UNKNOWN;
}
+diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/busfreq_ddr3.c linux-3.14.54/arch/arm/mach-imx/busfreq_ddr3.c
+--- linux-3.14.54.orig/arch/arm/mach-imx/busfreq_ddr3.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm/mach-imx/busfreq_ddr3.c 2015-10-15 15:51:23.984739013 +0200
+@@ -0,0 +1,471 @@
++/*
++ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
++ */
++
++/*
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/*!
++ * @file busfreq_ddr3.c
++ *
++ * @brief iMX6 DDR3 frequency change specific file.
++ *
++ * @ingroup PM
++ */
++#include <asm/cacheflush.h>
++#include <asm/fncpy.h>
++#include <asm/io.h>
++#include <asm/mach/map.h>
++#include <asm/mach-types.h>
++#include <asm/tlb.h>
++#include <linux/clk.h>
++#include <linux/cpumask.h>
++#include <linux/delay.h>
++#include <linux/genalloc.h>
++#include <linux/interrupt.h>
++#include <linux/irqchip/arm-gic.h>
++#include <linux/kernel.h>
++#include <linux/mutex.h>
++#include <linux/of.h>
++#include <linux/of_address.h>
++#include <linux/of_device.h>
++#include <linux/platform_device.h>
++#include <linux/proc_fs.h>
++#include <linux/sched.h>
++#include <linux/smp.h>
++
++#include "hardware.h"
++
++/* DDR settings */
++static unsigned long (*iram_ddr_settings)[2];
++static unsigned long (*normal_mmdc_settings)[2];
++static unsigned long (*iram_iomux_settings)[2];
++static void __iomem *mmdc_base;
++static void __iomem *iomux_base;
++static void __iomem *ccm_base;
++static void __iomem *l2_base;
++static void __iomem *gic_dist_base;
++static u32 *irqs_used;
++
++static void *ddr_freq_change_iram_base;
++static int ddr_settings_size;
++static int iomux_settings_size;
++static volatile unsigned int cpus_in_wfe;
++static volatile bool wait_for_ddr_freq_update;
++static int curr_ddr_rate;
++
++void (*mx6_change_ddr_freq)(u32 freq, void *ddr_settings,
++ bool dll_mode, void *iomux_offsets) = NULL;
++
++extern unsigned int ddr_med_rate;
++extern unsigned int ddr_normal_rate;
++extern int low_bus_freq_mode;
++extern int audio_bus_freq_mode;
++extern void mx6_ddr3_freq_change(u32 freq, void *ddr_settings,
++ bool dll_mode, void *iomux_offsets);
++
++#define MIN_DLL_ON_FREQ 333000000
++#define MAX_DLL_OFF_FREQ 125000000
++#define DDR_FREQ_CHANGE_SIZE 0x2000
++
++unsigned long ddr3_dll_mx6q[][2] = {
++ {0x0c, 0x0},
++ {0x10, 0x0},
++ {0x1C, 0x04088032},
++ {0x1C, 0x0408803a},
++ {0x1C, 0x08408030},
++ {0x1C, 0x08408038},
++ {0x818, 0x0},
++};
++
++unsigned long ddr3_calibration[][2] = {
++ {0x83c, 0x0},
++ {0x840, 0x0},
++ {0x483c, 0x0},
++ {0x4840, 0x0},
++ {0x848, 0x0},
++ {0x4848, 0x0},
++ {0x850, 0x0},
++ {0x4850, 0x0},
++};
++
++unsigned long ddr3_dll_mx6dl[][2] = {
++ {0x0c, 0x0},
++ {0x10, 0x0},
++ {0x1C, 0x04008032},
++ {0x1C, 0x0400803a},
++ {0x1C, 0x07208030},
++ {0x1C, 0x07208038},
++ {0x818, 0x0},
++};
++
++unsigned long iomux_offsets_mx6q[][2] = {
++ {0x5A8, 0x0},
++ {0x5B0, 0x0},
++ {0x524, 0x0},
++ {0x51C, 0x0},
++ {0x518, 0x0},
++ {0x50C, 0x0},
++ {0x5B8, 0x0},
++ {0x5C0, 0x0},
++};
++
++unsigned long iomux_offsets_mx6dl[][2] = {
++ {0x4BC, 0x0},
++ {0x4C0, 0x0},
++ {0x4C4, 0x0},
++ {0x4C8, 0x0},
++ {0x4CC, 0x0},
++ {0x4D0, 0x0},
++ {0x4D4, 0x0},
++ {0x4D8, 0x0},
++};
++
++unsigned long ddr3_400[][2] = {
++ {0x83c, 0x42490249},
++ {0x840, 0x02470247},
++ {0x483c, 0x42570257},
++ {0x4840, 0x02400240},
++ {0x848, 0x4039363C},
++ {0x4848, 0x3A39333F},
++ {0x850, 0x38414441},
++ {0x4850, 0x472D4833}
++};
++
++int can_change_ddr_freq(void)
++{
++ return 1;
++}
++
++/*
++ * each active core apart from the one changing
++ * the DDR frequency will execute this function.
++ * the rest of the cores have to remain in WFE
++ * state until the frequency is changed.
++ */
++irqreturn_t wait_in_wfe_irq(int irq, void *dev_id)
++{
++ u32 me = smp_processor_id();
++
++ *((char *)(&cpus_in_wfe) + (u8)me) = 0xff;
++
++ while (wait_for_ddr_freq_update)
++ wfe();
++
++ *((char *)(&cpus_in_wfe) + (u8)me) = 0;
++
++ return IRQ_HANDLED;
++}
++
++/* change the DDR frequency. */
++int update_ddr_freq(int ddr_rate)
++{
++ int i, j;
++ unsigned int reg;
++ bool dll_off = false;
++ unsigned int online_cpus = 0;
++ int cpu = 0;
++ int me;
++
++ if (!can_change_ddr_freq())
++ return -1;
++
++ if (ddr_rate == curr_ddr_rate)
++ return 0;
++
++ pr_debug("Bus freq set to %d start...\n", ddr_rate);
++
++ if (low_bus_freq_mode || audio_bus_freq_mode)
++ dll_off = true;
++
++ iram_ddr_settings[0][0] = ddr_settings_size;
++ iram_iomux_settings[0][0] = iomux_settings_size;
++ if (ddr_rate == ddr_med_rate && cpu_is_imx6q()) {
++ for (i = 0; i < ARRAY_SIZE(ddr3_dll_mx6q); i++) {
++ iram_ddr_settings[i + 1][0] =
++ normal_mmdc_settings[i][0];
++ iram_ddr_settings[i + 1][1] =
++ normal_mmdc_settings[i][1];
++ }
++ for (j = 0, i = ARRAY_SIZE(ddr3_dll_mx6q);
++ i < iram_ddr_settings[0][0]; j++, i++) {
++ iram_ddr_settings[i + 1][0] =
++ ddr3_400[j][0];
++ iram_ddr_settings[i + 1][1] =
++ ddr3_400[j][1];
++ }
++ } else if (ddr_rate == ddr_normal_rate) {
++ for (i = 0; i < iram_ddr_settings[0][0]; i++) {
++ iram_ddr_settings[i + 1][0] =
++ normal_mmdc_settings[i][0];
++ iram_ddr_settings[i + 1][1] =
++ normal_mmdc_settings[i][1];
++ }
++ }
++
++ /* ensure that all Cores are in WFE. */
++ local_irq_disable();
++
++ me = smp_processor_id();
++
++ *((char *)(&cpus_in_wfe) + (u8)me) = 0xff;
++ wait_for_ddr_freq_update = true;
++ for_each_online_cpu(cpu) {
++ *((char *)(&online_cpus) + (u8)cpu) = 0xff;
++ if (cpu != me) {
++ /* set the interrupt to be pending in the GIC. */
++ reg = 1 << (irqs_used[cpu] % 32);
++ writel_relaxed(reg, gic_dist_base + GIC_DIST_PENDING_SET
++ + (irqs_used[cpu] / 32) * 4);
++ }
++ }
++ while (cpus_in_wfe != online_cpus)
++ udelay(5);
++
++ /*
++ * Flush the TLB, to ensure no TLB maintenance occurs
++ * when DDR is in self-refresh.
++ */
++ local_flush_tlb_all();
++ /* Now we can change the DDR frequency. */
++ mx6_change_ddr_freq(ddr_rate, iram_ddr_settings,
++ dll_off, iram_iomux_settings);
++
++ curr_ddr_rate = ddr_rate;
++
++ /* DDR frequency change is done . */
++ wait_for_ddr_freq_update = false;
++
++ /* wake up all the cores. */
++ sev();
++
++ *((char *)(&cpus_in_wfe) + (u8)me) = 0;
++
++ local_irq_enable();
++
++ pr_debug("Bus freq set to %d done!\n", ddr_rate);
++
++ return 0;
++}
++
++int init_mmdc_ddr3_settings(struct platform_device *busfreq_pdev)
++{
++ struct device *dev = &busfreq_pdev->dev;
++ struct platform_device *ocram_dev;
++ unsigned int iram_paddr;
++ int i, err;
++ u32 cpu;
++ struct device_node *node;
++ struct gen_pool *iram_pool;
++
++ node = of_find_compatible_node(NULL, NULL, "fsl,imx6q-mmdc-combine");
++ if (!node) {
++ pr_err("failed to find imx6q-mmdc device tree data!\n");
++ return -EINVAL;
++ }
++ mmdc_base = of_iomap(node, 0);
++ WARN(!mmdc_base, "unable to map mmdc registers\n");
++
++ node = NULL;
++ if (cpu_is_imx6q())
++ node = of_find_compatible_node(NULL, NULL, "fsl,imx6q-iomuxc");
++ if (cpu_is_imx6dl())
++ node = of_find_compatible_node(NULL, NULL,
++ "fsl,imx6dl-iomuxc");
++ if (!node) {
++ pr_err("failed to find imx6q-iomux device tree data!\n");
++ return -EINVAL;
++ }
++ iomux_base = of_iomap(node, 0);
++ WARN(!iomux_base, "unable to map iomux registers\n");
++
++ node = of_find_compatible_node(NULL, NULL, "fsl,imx6q-ccm");
++ if (!node) {
++ pr_err("failed to find imx6q-ccm device tree data!\n");
++ return -EINVAL;
++ }
++ ccm_base = of_iomap(node, 0);
++ WARN(!ccm_base, "unable to map mmdc registers\n");
++
++ node = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
++ if (!node) {
++ pr_err("failed to find imx6q-pl310-cache device tree data!\n");
++ return -EINVAL;
++ }
++ l2_base = of_iomap(node, 0);
++ WARN(!ccm_base, "unable to map mmdc registers\n");
++
++ node = NULL;
++ node = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic");
++ if (!node) {
++ pr_err("failed to find imx6q-a9-gic device tree data!\n");
++ return -EINVAL;
++ }
++ gic_dist_base = of_iomap(node, 0);
++ WARN(!gic_dist_base, "unable to map gic dist registers\n");
++
++ if (cpu_is_imx6q())
++ ddr_settings_size = ARRAY_SIZE(ddr3_dll_mx6q) +
++ ARRAY_SIZE(ddr3_calibration);
++ if (cpu_is_imx6dl())
++ ddr_settings_size = ARRAY_SIZE(ddr3_dll_mx6dl) +
++ ARRAY_SIZE(ddr3_calibration);
++
++ normal_mmdc_settings = kmalloc((ddr_settings_size * 8), GFP_KERNEL);
++ if (cpu_is_imx6q()) {
++ memcpy(normal_mmdc_settings, ddr3_dll_mx6q,
++ sizeof(ddr3_dll_mx6q));
++ memcpy(((char *)normal_mmdc_settings + sizeof(ddr3_dll_mx6q)),
++ ddr3_calibration, sizeof(ddr3_calibration));
++ }
++ if (cpu_is_imx6dl()) {
++ memcpy(normal_mmdc_settings, ddr3_dll_mx6dl,
++ sizeof(ddr3_dll_mx6dl));
++ memcpy(((char *)normal_mmdc_settings + sizeof(ddr3_dll_mx6dl)),
++ ddr3_calibration, sizeof(ddr3_calibration));
++ }
++ /* store the original DDR settings at boot. */
++ for (i = 0; i < ddr_settings_size; i++) {
++ /*
++ * writes via command mode register cannot be read back.
++ * hence hardcode them in the initial static array.
++ * this may require modification on a per customer basis.
++ */
++ if (normal_mmdc_settings[i][0] != 0x1C)
++ normal_mmdc_settings[i][1] =
++ readl_relaxed(mmdc_base
++ + normal_mmdc_settings[i][0]);
++ }
++
++ irqs_used = devm_kzalloc(dev, sizeof(u32) * num_present_cpus(),
++ GFP_KERNEL);
++
++ for_each_online_cpu(cpu) {
++ int irq;
++
++ /*
++ * set up a reserved interrupt to get all
++ * the active cores into a WFE state
++ * before changing the DDR frequency.
++ */
++ irq = platform_get_irq(busfreq_pdev, cpu);
++ err = request_irq(irq, wait_in_wfe_irq,
++ IRQF_PERCPU, "mmdc_1", NULL);
++ if (err) {
++ dev_err(dev,
++ "Busfreq:request_irq failed %d, err = %d\n",
++ irq, err);
++ return err;
++ }
++ err = irq_set_affinity(irq, cpumask_of(cpu));
++ if (err) {
++ dev_err(dev,
++ "Busfreq: Cannot set irq affinity irq=%d,\n",
++ irq);
++ return err;
++ }
++ irqs_used[cpu] = irq;
++ }
++
++ node = NULL;
++ node = of_find_compatible_node(NULL, NULL, "mmio-sram");
++ if (!node) {
++ dev_err(dev, "%s: failed to find ocram node\n",
++ __func__);
++ return -EINVAL;
++ }
++
++ ocram_dev = of_find_device_by_node(node);
++ if (!ocram_dev) {
++ dev_err(dev, "failed to find ocram device!\n");
++ return -EINVAL;
++ }
++
++ iram_pool = dev_get_gen_pool(&ocram_dev->dev);
++ if (!iram_pool) {
++ dev_err(dev, "iram pool unavailable!\n");
++ return -EINVAL;
++ }
++
++ iomux_settings_size = ARRAY_SIZE(iomux_offsets_mx6q);
++ iram_iomux_settings = gen_pool_alloc(iram_pool,
++ (iomux_settings_size * 8) + 8);
++ if (!iram_iomux_settings) {
++ dev_err(dev, "unable to alloc iram for IOMUX settings!\n");
++ return -ENOMEM;
++ }
++
++ /*
++ * Allocate extra space to store the number of entries in the
++ * ddr_settings plus 4 extra regsiter information that needs
++ * to be passed to the frequency change code.
++ * sizeof(iram_ddr_settings) = sizeof(ddr_settings) +
++ * entries in ddr_settings + 16.
++ * The last 4 enties store the addresses of the registers:
++ * CCM_BASE_ADDR
++ * MMDC_BASE_ADDR
++ * IOMUX_BASE_ADDR
++ * L2X0_BASE_ADDR
++ */
++ iram_ddr_settings = gen_pool_alloc(iram_pool,
++ (ddr_settings_size * 8) + 8 + 32);
++ if (!iram_ddr_settings) {
++ dev_err(dev, "unable to alloc iram for ddr settings!\n");
++ return -ENOMEM;
++ }
++ i = ddr_settings_size + 1;
++ iram_ddr_settings[i][0] = (unsigned long)mmdc_base;
++ iram_ddr_settings[i+1][0] = (unsigned long)ccm_base;
++ iram_ddr_settings[i+2][0] = (unsigned long)iomux_base;
++ iram_ddr_settings[i+3][0] = (unsigned long)l2_base;
++
++ if (cpu_is_imx6q()) {
++ /* store the IOMUX settings at boot. */
++ for (i = 0; i < iomux_settings_size; i++) {
++ iomux_offsets_mx6q[i][1] =
++ readl_relaxed(iomux_base +
++ iomux_offsets_mx6q[i][0]);
++ iram_iomux_settings[i+1][0] = iomux_offsets_mx6q[i][0];
++ iram_iomux_settings[i+1][1] = iomux_offsets_mx6q[i][1];
++ }
++ }
++
++ if (cpu_is_imx6dl()) {
++ for (i = 0; i < iomux_settings_size; i++) {
++ iomux_offsets_mx6dl[i][1] =
++ readl_relaxed(iomux_base +
++ iomux_offsets_mx6dl[i][0]);
++ iram_iomux_settings[i+1][0] = iomux_offsets_mx6dl[i][0];
++ iram_iomux_settings[i+1][1] = iomux_offsets_mx6dl[i][1];
++ }
++ }
++
++ ddr_freq_change_iram_base = gen_pool_alloc(iram_pool,
++ DDR_FREQ_CHANGE_SIZE);
++ if (!ddr_freq_change_iram_base) {
++ dev_err(dev, "Cannot alloc iram for ddr freq change code!\n");
++ return -ENOMEM;
++ }
++
++ iram_paddr = gen_pool_virt_to_phys(iram_pool,
++ (unsigned long)ddr_freq_change_iram_base);
++ /*
++ * Need to remap the area here since we want
++ * the memory region to be executable.
++ */
++ ddr_freq_change_iram_base = __arm_ioremap(iram_paddr,
++ DDR_FREQ_CHANGE_SIZE,
++ MT_MEMORY_RWX_NONCACHED);
++ mx6_change_ddr_freq = (void *)fncpy(ddr_freq_change_iram_base,
++ &mx6_ddr3_freq_change, DDR_FREQ_CHANGE_SIZE);
++
++ curr_ddr_rate = ddr_normal_rate;
++
++ return 0;
++}
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/busfreq-imx6.c linux-3.14.54/arch/arm/mach-imx/busfreq-imx6.c
--- linux-3.14.54.orig/arch/arm/mach-imx/busfreq-imx6.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/mach-imx/busfreq-imx6.c 2015-10-12 10:56:17.857351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/busfreq-imx6.c 2015-10-15 15:51:23.984739013 +0200
@@ -0,0 +1,952 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -25241,484 +24415,9 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/busfreq-imx6.c linux-3.14.54/arch
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
+MODULE_DESCRIPTION("BusFreq driver");
+MODULE_LICENSE("GPL");
-diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/busfreq_ddr3.c linux-3.14.54/arch/arm/mach-imx/busfreq_ddr3.c
---- linux-3.14.54.orig/arch/arm/mach-imx/busfreq_ddr3.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/mach-imx/busfreq_ddr3.c 2015-10-12 10:56:17.857351175 +0200
-@@ -0,0 +1,471 @@
-+/*
-+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
-+ */
-+
-+/*
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+/*!
-+ * @file busfreq_ddr3.c
-+ *
-+ * @brief iMX6 DDR3 frequency change specific file.
-+ *
-+ * @ingroup PM
-+ */
-+#include <asm/cacheflush.h>
-+#include <asm/fncpy.h>
-+#include <asm/io.h>
-+#include <asm/mach/map.h>
-+#include <asm/mach-types.h>
-+#include <asm/tlb.h>
-+#include <linux/clk.h>
-+#include <linux/cpumask.h>
-+#include <linux/delay.h>
-+#include <linux/genalloc.h>
-+#include <linux/interrupt.h>
-+#include <linux/irqchip/arm-gic.h>
-+#include <linux/kernel.h>
-+#include <linux/mutex.h>
-+#include <linux/of.h>
-+#include <linux/of_address.h>
-+#include <linux/of_device.h>
-+#include <linux/platform_device.h>
-+#include <linux/proc_fs.h>
-+#include <linux/sched.h>
-+#include <linux/smp.h>
-+
-+#include "hardware.h"
-+
-+/* DDR settings */
-+static unsigned long (*iram_ddr_settings)[2];
-+static unsigned long (*normal_mmdc_settings)[2];
-+static unsigned long (*iram_iomux_settings)[2];
-+static void __iomem *mmdc_base;
-+static void __iomem *iomux_base;
-+static void __iomem *ccm_base;
-+static void __iomem *l2_base;
-+static void __iomem *gic_dist_base;
-+static u32 *irqs_used;
-+
-+static void *ddr_freq_change_iram_base;
-+static int ddr_settings_size;
-+static int iomux_settings_size;
-+static volatile unsigned int cpus_in_wfe;
-+static volatile bool wait_for_ddr_freq_update;
-+static int curr_ddr_rate;
-+
-+void (*mx6_change_ddr_freq)(u32 freq, void *ddr_settings,
-+ bool dll_mode, void *iomux_offsets) = NULL;
-+
-+extern unsigned int ddr_med_rate;
-+extern unsigned int ddr_normal_rate;
-+extern int low_bus_freq_mode;
-+extern int audio_bus_freq_mode;
-+extern void mx6_ddr3_freq_change(u32 freq, void *ddr_settings,
-+ bool dll_mode, void *iomux_offsets);
-+
-+#define MIN_DLL_ON_FREQ 333000000
-+#define MAX_DLL_OFF_FREQ 125000000
-+#define DDR_FREQ_CHANGE_SIZE 0x2000
-+
-+unsigned long ddr3_dll_mx6q[][2] = {
-+ {0x0c, 0x0},
-+ {0x10, 0x0},
-+ {0x1C, 0x04088032},
-+ {0x1C, 0x0408803a},
-+ {0x1C, 0x08408030},
-+ {0x1C, 0x08408038},
-+ {0x818, 0x0},
-+};
-+
-+unsigned long ddr3_calibration[][2] = {
-+ {0x83c, 0x0},
-+ {0x840, 0x0},
-+ {0x483c, 0x0},
-+ {0x4840, 0x0},
-+ {0x848, 0x0},
-+ {0x4848, 0x0},
-+ {0x850, 0x0},
-+ {0x4850, 0x0},
-+};
-+
-+unsigned long ddr3_dll_mx6dl[][2] = {
-+ {0x0c, 0x0},
-+ {0x10, 0x0},
-+ {0x1C, 0x04008032},
-+ {0x1C, 0x0400803a},
-+ {0x1C, 0x07208030},
-+ {0x1C, 0x07208038},
-+ {0x818, 0x0},
-+};
-+
-+unsigned long iomux_offsets_mx6q[][2] = {
-+ {0x5A8, 0x0},
-+ {0x5B0, 0x0},
-+ {0x524, 0x0},
-+ {0x51C, 0x0},
-+ {0x518, 0x0},
-+ {0x50C, 0x0},
-+ {0x5B8, 0x0},
-+ {0x5C0, 0x0},
-+};
-+
-+unsigned long iomux_offsets_mx6dl[][2] = {
-+ {0x4BC, 0x0},
-+ {0x4C0, 0x0},
-+ {0x4C4, 0x0},
-+ {0x4C8, 0x0},
-+ {0x4CC, 0x0},
-+ {0x4D0, 0x0},
-+ {0x4D4, 0x0},
-+ {0x4D8, 0x0},
-+};
-+
-+unsigned long ddr3_400[][2] = {
-+ {0x83c, 0x42490249},
-+ {0x840, 0x02470247},
-+ {0x483c, 0x42570257},
-+ {0x4840, 0x02400240},
-+ {0x848, 0x4039363C},
-+ {0x4848, 0x3A39333F},
-+ {0x850, 0x38414441},
-+ {0x4850, 0x472D4833}
-+};
-+
-+int can_change_ddr_freq(void)
-+{
-+ return 1;
-+}
-+
-+/*
-+ * each active core apart from the one changing
-+ * the DDR frequency will execute this function.
-+ * the rest of the cores have to remain in WFE
-+ * state until the frequency is changed.
-+ */
-+irqreturn_t wait_in_wfe_irq(int irq, void *dev_id)
-+{
-+ u32 me = smp_processor_id();
-+
-+ *((char *)(&cpus_in_wfe) + (u8)me) = 0xff;
-+
-+ while (wait_for_ddr_freq_update)
-+ wfe();
-+
-+ *((char *)(&cpus_in_wfe) + (u8)me) = 0;
-+
-+ return IRQ_HANDLED;
-+}
-+
-+/* change the DDR frequency. */
-+int update_ddr_freq(int ddr_rate)
-+{
-+ int i, j;
-+ unsigned int reg;
-+ bool dll_off = false;
-+ unsigned int online_cpus = 0;
-+ int cpu = 0;
-+ int me;
-+
-+ if (!can_change_ddr_freq())
-+ return -1;
-+
-+ if (ddr_rate == curr_ddr_rate)
-+ return 0;
-+
-+ pr_debug("Bus freq set to %d start...\n", ddr_rate);
-+
-+ if (low_bus_freq_mode || audio_bus_freq_mode)
-+ dll_off = true;
-+
-+ iram_ddr_settings[0][0] = ddr_settings_size;
-+ iram_iomux_settings[0][0] = iomux_settings_size;
-+ if (ddr_rate == ddr_med_rate && cpu_is_imx6q()) {
-+ for (i = 0; i < ARRAY_SIZE(ddr3_dll_mx6q); i++) {
-+ iram_ddr_settings[i + 1][0] =
-+ normal_mmdc_settings[i][0];
-+ iram_ddr_settings[i + 1][1] =
-+ normal_mmdc_settings[i][1];
-+ }
-+ for (j = 0, i = ARRAY_SIZE(ddr3_dll_mx6q);
-+ i < iram_ddr_settings[0][0]; j++, i++) {
-+ iram_ddr_settings[i + 1][0] =
-+ ddr3_400[j][0];
-+ iram_ddr_settings[i + 1][1] =
-+ ddr3_400[j][1];
-+ }
-+ } else if (ddr_rate == ddr_normal_rate) {
-+ for (i = 0; i < iram_ddr_settings[0][0]; i++) {
-+ iram_ddr_settings[i + 1][0] =
-+ normal_mmdc_settings[i][0];
-+ iram_ddr_settings[i + 1][1] =
-+ normal_mmdc_settings[i][1];
-+ }
-+ }
-+
-+ /* ensure that all Cores are in WFE. */
-+ local_irq_disable();
-+
-+ me = smp_processor_id();
-+
-+ *((char *)(&cpus_in_wfe) + (u8)me) = 0xff;
-+ wait_for_ddr_freq_update = true;
-+ for_each_online_cpu(cpu) {
-+ *((char *)(&online_cpus) + (u8)cpu) = 0xff;
-+ if (cpu != me) {
-+ /* set the interrupt to be pending in the GIC. */
-+ reg = 1 << (irqs_used[cpu] % 32);
-+ writel_relaxed(reg, gic_dist_base + GIC_DIST_PENDING_SET
-+ + (irqs_used[cpu] / 32) * 4);
-+ }
-+ }
-+ while (cpus_in_wfe != online_cpus)
-+ udelay(5);
-+
-+ /*
-+ * Flush the TLB, to ensure no TLB maintenance occurs
-+ * when DDR is in self-refresh.
-+ */
-+ local_flush_tlb_all();
-+ /* Now we can change the DDR frequency. */
-+ mx6_change_ddr_freq(ddr_rate, iram_ddr_settings,
-+ dll_off, iram_iomux_settings);
-+
-+ curr_ddr_rate = ddr_rate;
-+
-+ /* DDR frequency change is done . */
-+ wait_for_ddr_freq_update = false;
-+
-+ /* wake up all the cores. */
-+ sev();
-+
-+ *((char *)(&cpus_in_wfe) + (u8)me) = 0;
-+
-+ local_irq_enable();
-+
-+ pr_debug("Bus freq set to %d done!\n", ddr_rate);
-+
-+ return 0;
-+}
-+
-+int init_mmdc_ddr3_settings(struct platform_device *busfreq_pdev)
-+{
-+ struct device *dev = &busfreq_pdev->dev;
-+ struct platform_device *ocram_dev;
-+ unsigned int iram_paddr;
-+ int i, err;
-+ u32 cpu;
-+ struct device_node *node;
-+ struct gen_pool *iram_pool;
-+
-+ node = of_find_compatible_node(NULL, NULL, "fsl,imx6q-mmdc-combine");
-+ if (!node) {
-+ pr_err("failed to find imx6q-mmdc device tree data!\n");
-+ return -EINVAL;
-+ }
-+ mmdc_base = of_iomap(node, 0);
-+ WARN(!mmdc_base, "unable to map mmdc registers\n");
-+
-+ node = NULL;
-+ if (cpu_is_imx6q())
-+ node = of_find_compatible_node(NULL, NULL, "fsl,imx6q-iomuxc");
-+ if (cpu_is_imx6dl())
-+ node = of_find_compatible_node(NULL, NULL,
-+ "fsl,imx6dl-iomuxc");
-+ if (!node) {
-+ pr_err("failed to find imx6q-iomux device tree data!\n");
-+ return -EINVAL;
-+ }
-+ iomux_base = of_iomap(node, 0);
-+ WARN(!iomux_base, "unable to map iomux registers\n");
-+
-+ node = of_find_compatible_node(NULL, NULL, "fsl,imx6q-ccm");
-+ if (!node) {
-+ pr_err("failed to find imx6q-ccm device tree data!\n");
-+ return -EINVAL;
-+ }
-+ ccm_base = of_iomap(node, 0);
-+ WARN(!ccm_base, "unable to map mmdc registers\n");
-+
-+ node = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
-+ if (!node) {
-+ pr_err("failed to find imx6q-pl310-cache device tree data!\n");
-+ return -EINVAL;
-+ }
-+ l2_base = of_iomap(node, 0);
-+ WARN(!ccm_base, "unable to map mmdc registers\n");
-+
-+ node = NULL;
-+ node = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-gic");
-+ if (!node) {
-+ pr_err("failed to find imx6q-a9-gic device tree data!\n");
-+ return -EINVAL;
-+ }
-+ gic_dist_base = of_iomap(node, 0);
-+ WARN(!gic_dist_base, "unable to map gic dist registers\n");
-+
-+ if (cpu_is_imx6q())
-+ ddr_settings_size = ARRAY_SIZE(ddr3_dll_mx6q) +
-+ ARRAY_SIZE(ddr3_calibration);
-+ if (cpu_is_imx6dl())
-+ ddr_settings_size = ARRAY_SIZE(ddr3_dll_mx6dl) +
-+ ARRAY_SIZE(ddr3_calibration);
-+
-+ normal_mmdc_settings = kmalloc((ddr_settings_size * 8), GFP_KERNEL);
-+ if (cpu_is_imx6q()) {
-+ memcpy(normal_mmdc_settings, ddr3_dll_mx6q,
-+ sizeof(ddr3_dll_mx6q));
-+ memcpy(((char *)normal_mmdc_settings + sizeof(ddr3_dll_mx6q)),
-+ ddr3_calibration, sizeof(ddr3_calibration));
-+ }
-+ if (cpu_is_imx6dl()) {
-+ memcpy(normal_mmdc_settings, ddr3_dll_mx6dl,
-+ sizeof(ddr3_dll_mx6dl));
-+ memcpy(((char *)normal_mmdc_settings + sizeof(ddr3_dll_mx6dl)),
-+ ddr3_calibration, sizeof(ddr3_calibration));
-+ }
-+ /* store the original DDR settings at boot. */
-+ for (i = 0; i < ddr_settings_size; i++) {
-+ /*
-+ * writes via command mode register cannot be read back.
-+ * hence hardcode them in the initial static array.
-+ * this may require modification on a per customer basis.
-+ */
-+ if (normal_mmdc_settings[i][0] != 0x1C)
-+ normal_mmdc_settings[i][1] =
-+ readl_relaxed(mmdc_base
-+ + normal_mmdc_settings[i][0]);
-+ }
-+
-+ irqs_used = devm_kzalloc(dev, sizeof(u32) * num_present_cpus(),
-+ GFP_KERNEL);
-+
-+ for_each_online_cpu(cpu) {
-+ int irq;
-+
-+ /*
-+ * set up a reserved interrupt to get all
-+ * the active cores into a WFE state
-+ * before changing the DDR frequency.
-+ */
-+ irq = platform_get_irq(busfreq_pdev, cpu);
-+ err = request_irq(irq, wait_in_wfe_irq,
-+ IRQF_PERCPU, "mmdc_1", NULL);
-+ if (err) {
-+ dev_err(dev,
-+ "Busfreq:request_irq failed %d, err = %d\n",
-+ irq, err);
-+ return err;
-+ }
-+ err = irq_set_affinity(irq, cpumask_of(cpu));
-+ if (err) {
-+ dev_err(dev,
-+ "Busfreq: Cannot set irq affinity irq=%d,\n",
-+ irq);
-+ return err;
-+ }
-+ irqs_used[cpu] = irq;
-+ }
-+
-+ node = NULL;
-+ node = of_find_compatible_node(NULL, NULL, "mmio-sram");
-+ if (!node) {
-+ dev_err(dev, "%s: failed to find ocram node\n",
-+ __func__);
-+ return -EINVAL;
-+ }
-+
-+ ocram_dev = of_find_device_by_node(node);
-+ if (!ocram_dev) {
-+ dev_err(dev, "failed to find ocram device!\n");
-+ return -EINVAL;
-+ }
-+
-+ iram_pool = dev_get_gen_pool(&ocram_dev->dev);
-+ if (!iram_pool) {
-+ dev_err(dev, "iram pool unavailable!\n");
-+ return -EINVAL;
-+ }
-+
-+ iomux_settings_size = ARRAY_SIZE(iomux_offsets_mx6q);
-+ iram_iomux_settings = gen_pool_alloc(iram_pool,
-+ (iomux_settings_size * 8) + 8);
-+ if (!iram_iomux_settings) {
-+ dev_err(dev, "unable to alloc iram for IOMUX settings!\n");
-+ return -ENOMEM;
-+ }
-+
-+ /*
-+ * Allocate extra space to store the number of entries in the
-+ * ddr_settings plus 4 extra regsiter information that needs
-+ * to be passed to the frequency change code.
-+ * sizeof(iram_ddr_settings) = sizeof(ddr_settings) +
-+ * entries in ddr_settings + 16.
-+ * The last 4 enties store the addresses of the registers:
-+ * CCM_BASE_ADDR
-+ * MMDC_BASE_ADDR
-+ * IOMUX_BASE_ADDR
-+ * L2X0_BASE_ADDR
-+ */
-+ iram_ddr_settings = gen_pool_alloc(iram_pool,
-+ (ddr_settings_size * 8) + 8 + 32);
-+ if (!iram_ddr_settings) {
-+ dev_err(dev, "unable to alloc iram for ddr settings!\n");
-+ return -ENOMEM;
-+ }
-+ i = ddr_settings_size + 1;
-+ iram_ddr_settings[i][0] = (unsigned long)mmdc_base;
-+ iram_ddr_settings[i+1][0] = (unsigned long)ccm_base;
-+ iram_ddr_settings[i+2][0] = (unsigned long)iomux_base;
-+ iram_ddr_settings[i+3][0] = (unsigned long)l2_base;
-+
-+ if (cpu_is_imx6q()) {
-+ /* store the IOMUX settings at boot. */
-+ for (i = 0; i < iomux_settings_size; i++) {
-+ iomux_offsets_mx6q[i][1] =
-+ readl_relaxed(iomux_base +
-+ iomux_offsets_mx6q[i][0]);
-+ iram_iomux_settings[i+1][0] = iomux_offsets_mx6q[i][0];
-+ iram_iomux_settings[i+1][1] = iomux_offsets_mx6q[i][1];
-+ }
-+ }
-+
-+ if (cpu_is_imx6dl()) {
-+ for (i = 0; i < iomux_settings_size; i++) {
-+ iomux_offsets_mx6dl[i][1] =
-+ readl_relaxed(iomux_base +
-+ iomux_offsets_mx6dl[i][0]);
-+ iram_iomux_settings[i+1][0] = iomux_offsets_mx6dl[i][0];
-+ iram_iomux_settings[i+1][1] = iomux_offsets_mx6dl[i][1];
-+ }
-+ }
-+
-+ ddr_freq_change_iram_base = gen_pool_alloc(iram_pool,
-+ DDR_FREQ_CHANGE_SIZE);
-+ if (!ddr_freq_change_iram_base) {
-+ dev_err(dev, "Cannot alloc iram for ddr freq change code!\n");
-+ return -ENOMEM;
-+ }
-+
-+ iram_paddr = gen_pool_virt_to_phys(iram_pool,
-+ (unsigned long)ddr_freq_change_iram_base);
-+ /*
-+ * Need to remap the area here since we want
-+ * the memory region to be executable.
-+ */
-+ ddr_freq_change_iram_base = __arm_ioremap(iram_paddr,
-+ DDR_FREQ_CHANGE_SIZE,
-+ MT_MEMORY_RWX_NONCACHED);
-+ mx6_change_ddr_freq = (void *)fncpy(ddr_freq_change_iram_base,
-+ &mx6_ddr3_freq_change, DDR_FREQ_CHANGE_SIZE);
-+
-+ curr_ddr_rate = ddr_normal_rate;
-+
-+ return 0;
-+}
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/busfreq_lpddr2.c linux-3.14.54/arch/arm/mach-imx/busfreq_lpddr2.c
--- linux-3.14.54.orig/arch/arm/mach-imx/busfreq_lpddr2.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/mach-imx/busfreq_lpddr2.c 2015-10-12 10:56:17.857351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/busfreq_lpddr2.c 2015-10-15 15:51:23.988738673 +0200
@@ -0,0 +1,183 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -25903,9 +24602,22 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/busfreq_lpddr2.c linux-3.14.54/ar
+
+ return 0;
+}
+diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/clk.h linux-3.14.54/arch/arm/mach-imx/clk.h
+--- linux-3.14.54.orig/arch/arm/mach-imx/clk.h 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/mach-imx/clk.h 2015-10-15 15:51:23.988738673 +0200
+@@ -23,7 +23,8 @@
+ };
+
+ struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
+- const char *parent_name, void __iomem *base, u32 div_mask);
++ const char *parent_name, void __iomem *base,
++ u32 div_mask, bool always_on);
+
+ struct clk *clk_register_gate2(struct device *dev, const char *name,
+ const char *parent_name, unsigned long flags,
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/clk-imx6q.c linux-3.14.54/arch/arm/mach-imx/clk-imx6q.c
--- linux-3.14.54.orig/arch/arm/mach-imx/clk-imx6q.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/clk-imx6q.c 2015-10-12 10:56:17.858351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/clk-imx6q.c 2015-10-15 15:51:23.992738307 +0200
@@ -1,5 +1,5 @@
/*
- * Copyright 2011-2013 Freescale Semiconductor, Inc.
@@ -26417,7 +25129,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/clk-imx6q.c linux-3.14.54/arch/ar
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/clk-imx6sl.c linux-3.14.54/arch/arm/mach-imx/clk-imx6sl.c
--- linux-3.14.54.orig/arch/arm/mach-imx/clk-imx6sl.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/clk-imx6sl.c 2015-10-12 10:56:17.858351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/clk-imx6sl.c 2015-10-15 15:51:23.992738307 +0200
@@ -7,9 +7,29 @@
*
*/
@@ -26741,7 +25453,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/clk-imx6sl.c linux-3.14.54/arch/a
WARN_ON(!base);
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/clk-pfd.c linux-3.14.54/arch/arm/mach-imx/clk-pfd.c
--- linux-3.14.54.orig/arch/arm/mach-imx/clk-pfd.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/clk-pfd.c 2015-10-12 10:56:17.859351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/clk-pfd.c 2015-10-15 15:51:23.996737965 +0200
@@ -1,5 +1,5 @@
/*
- * Copyright 2012 Freescale Semiconductor, Inc.
@@ -26822,7 +25534,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/clk-pfd.c linux-3.14.54/arch/arm/
frac = tmp;
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/clk-pllv3.c linux-3.14.54/arch/arm/mach-imx/clk-pllv3.c
--- linux-3.14.54.orig/arch/arm/mach-imx/clk-pllv3.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/clk-pllv3.c 2015-10-12 10:56:17.859351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/clk-pllv3.c 2015-10-15 15:51:23.996737965 +0200
@@ -26,12 +26,15 @@
#define BM_PLL_ENABLE (0x1 << 13)
#define BM_PLL_BYPASS (0x1 << 16)
@@ -27191,22 +25903,9 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/clk-pllv3.c linux-3.14.54/arch/ar
init.name = name;
init.ops = ops;
-diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/clk.h linux-3.14.54/arch/arm/mach-imx/clk.h
---- linux-3.14.54.orig/arch/arm/mach-imx/clk.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/clk.h 2015-10-12 10:56:17.857351175 +0200
-@@ -23,7 +23,8 @@
- };
-
- struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
-- const char *parent_name, void __iomem *base, u32 div_mask);
-+ const char *parent_name, void __iomem *base,
-+ u32 div_mask, bool always_on);
-
- struct clk *clk_register_gate2(struct device *dev, const char *name,
- const char *parent_name, unsigned long flags,
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/common.h linux-3.14.54/arch/arm/mach-imx/common.h
--- linux-3.14.54.orig/arch/arm/mach-imx/common.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/common.h 2015-10-12 10:56:17.860351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/common.h 2015-10-15 15:51:23.996737965 +0200
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -27261,9 +25960,36 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/common.h linux-3.14.54/arch/arm/m
#ifdef CONFIG_PM
void imx5_pm_init(void);
#else
+diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/cpuidle.h linux-3.14.54/arch/arm/mach-imx/cpuidle.h
+--- linux-3.14.54.orig/arch/arm/mach-imx/cpuidle.h 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/mach-imx/cpuidle.h 2015-10-15 15:51:23.996737965 +0200
+@@ -1,5 +1,5 @@
+ /*
+- * Copyright 2012 Freescale Semiconductor, Inc.
++ * Copyright 2012-2013 Freescale Semiconductor, Inc.
+ * Copyright 2012 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+@@ -13,6 +13,7 @@
+ #ifdef CONFIG_CPU_IDLE
+ extern int imx5_cpuidle_init(void);
+ extern int imx6q_cpuidle_init(void);
++extern int imx6sl_cpuidle_init(void);
+ #else
+ static inline int imx5_cpuidle_init(void)
+ {
+@@ -22,4 +23,8 @@
+ {
+ return 0;
+ }
++static inline int imx6sl_cpuidle_init(void)
++{
++ return 0;
++}
+ #endif
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/cpuidle-imx6q.c linux-3.14.54/arch/arm/mach-imx/cpuidle-imx6q.c
--- linux-3.14.54.orig/arch/arm/mach-imx/cpuidle-imx6q.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/cpuidle-imx6q.c 2015-10-12 10:56:17.860351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/cpuidle-imx6q.c 2015-10-15 15:51:23.996737965 +0200
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2012 Freescale Semiconductor, Inc.
@@ -27284,7 +26010,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/cpuidle-imx6q.c linux-3.14.54/arc
}
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/cpuidle-imx6sl.c linux-3.14.54/arch/arm/mach-imx/cpuidle-imx6sl.c
--- linux-3.14.54.orig/arch/arm/mach-imx/cpuidle-imx6sl.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/mach-imx/cpuidle-imx6sl.c 2015-10-12 10:56:17.860351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/cpuidle-imx6sl.c 2015-10-15 15:51:24.000737627 +0200
@@ -0,0 +1,149 @@
+/*
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc.
@@ -27435,36 +26161,9 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/cpuidle-imx6sl.c linux-3.14.54/ar
+
+ return cpuidle_register(&imx6sl_cpuidle_driver, NULL);
+}
-diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/cpuidle.h linux-3.14.54/arch/arm/mach-imx/cpuidle.h
---- linux-3.14.54.orig/arch/arm/mach-imx/cpuidle.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/cpuidle.h 2015-10-12 10:56:17.860351175 +0200
-@@ -1,5 +1,5 @@
- /*
-- * Copyright 2012 Freescale Semiconductor, Inc.
-+ * Copyright 2012-2013 Freescale Semiconductor, Inc.
- * Copyright 2012 Linaro Ltd.
- *
- * The code contained herein is licensed under the GNU General Public
-@@ -13,6 +13,7 @@
- #ifdef CONFIG_CPU_IDLE
- extern int imx5_cpuidle_init(void);
- extern int imx6q_cpuidle_init(void);
-+extern int imx6sl_cpuidle_init(void);
- #else
- static inline int imx5_cpuidle_init(void)
- {
-@@ -22,4 +23,8 @@
- {
- return 0;
- }
-+static inline int imx6sl_cpuidle_init(void)
-+{
-+ return 0;
-+}
- #endif
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/ddr3_freq_imx6.S linux-3.14.54/arch/arm/mach-imx/ddr3_freq_imx6.S
--- linux-3.14.54.orig/arch/arm/mach-imx/ddr3_freq_imx6.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/mach-imx/ddr3_freq_imx6.S 2015-10-12 10:56:17.861351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/ddr3_freq_imx6.S 2015-10-15 15:51:24.000737627 +0200
@@ -0,0 +1,893 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -28361,7 +27060,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/ddr3_freq_imx6.S linux-3.14.54/ar
+ .size mx6_ddr3_freq_change, . - mx6_ddr3_freq_change
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/gpc.c linux-3.14.54/arch/arm/mach-imx/gpc.c
--- linux-3.14.54.orig/arch/arm/mach-imx/gpc.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/gpc.c 2015-10-12 10:56:17.861351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/gpc.c 2015-10-15 15:51:24.000737627 +0200
@@ -10,30 +10,69 @@
* http://www.gnu.org/copyleft/gpl.html
*/
@@ -28748,7 +27447,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/gpc.c linux-3.14.54/arch/arm/mach
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/hardware.h linux-3.14.54/arch/arm/mach-imx/hardware.h
--- linux-3.14.54.orig/arch/arm/mach-imx/hardware.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/hardware.h 2015-10-12 10:56:17.861351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/hardware.h 2015-10-15 15:51:24.000737627 +0200
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -28768,7 +27467,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/hardware.h linux-3.14.54/arch/arm
#define addr_in_module(addr, mod) \
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/headsmp.S linux-3.14.54/arch/arm/mach-imx/headsmp.S
--- linux-3.14.54.orig/arch/arm/mach-imx/headsmp.S 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/headsmp.S 2015-10-12 10:56:17.862351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/headsmp.S 2015-10-15 15:51:24.000737627 +0200
@@ -12,8 +12,6 @@
#include <linux/linkage.h>
@@ -28818,7 +27517,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/headsmp.S linux-3.14.54/arch/arm/
-#endif
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/imx6sl_wfi.S linux-3.14.54/arch/arm/mach-imx/imx6sl_wfi.S
--- linux-3.14.54.orig/arch/arm/mach-imx/imx6sl_wfi.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/mach-imx/imx6sl_wfi.S 2015-10-12 10:56:17.862351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/imx6sl_wfi.S 2015-10-15 15:51:24.004737338 +0200
@@ -0,0 +1,639 @@
+/*
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -29459,9 +28158,58 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/imx6sl_wfi.S linux-3.14.54/arch/a
+
+ /* Restore registers */
+ mov pc, lr
+diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/Kconfig linux-3.14.54/arch/arm/mach-imx/Kconfig
+--- linux-3.14.54.orig/arch/arm/mach-imx/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/mach-imx/Kconfig 2015-10-15 15:51:24.004737338 +0200
+@@ -1,5 +1,6 @@
+ config ARCH_MXC
+ bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
++ select ARCH_HAS_RESET_CONTROLLER
+ select ARCH_REQUIRE_GPIOLIB
+ select ARM_CPU_SUSPEND if PM
+ select ARM_PATCH_PHYS_VIRT
+@@ -13,6 +14,7 @@
+ select PINCTRL
+ select SOC_BUS
+ select SPARSE_IRQ
++ select SRAM
+ select USE_OF
+ help
+ Support for Freescale MXC/iMX-based family of processors
+@@ -63,7 +65,6 @@
+
+ config HAVE_IMX_SRC
+ def_bool y if SMP
+- select ARCH_HAS_RESET_CONTROLLER
+
+ config IMX_HAVE_IOMUX_V1
+ bool
+@@ -791,6 +792,8 @@
+ select ARM_ERRATA_754322
+ select ARM_ERRATA_764369 if SMP
+ select ARM_ERRATA_775420
++ select ARM_ERRATA_794072 if SMP
++ select ARM_ERRATA_761320 if SMP
+ select ARM_GIC
+ select CPU_V7
+ select HAVE_ARM_SCU if SMP
+@@ -803,11 +806,13 @@
+ select MFD_SYSCON
+ select MIGHT_HAVE_PCI
+ select PCI_DOMAINS if PCI
++ select ARCH_SUPPORTS_MSI
+ select PINCTRL_IMX6Q
+ select PL310_ERRATA_588369 if CACHE_PL310
+ select PL310_ERRATA_727915 if CACHE_PL310
+ select PL310_ERRATA_769419 if CACHE_PL310
+ select PM_OPP if PM
++ select ZONE_DMA
+
+ help
+ This enables support for Freescale i.MX6 Quad processor.
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/lpddr2_freq_imx6.S linux-3.14.54/arch/arm/mach-imx/lpddr2_freq_imx6.S
--- linux-3.14.54.orig/arch/arm/mach-imx/lpddr2_freq_imx6.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/mach-imx/lpddr2_freq_imx6.S 2015-10-12 10:56:17.863351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/lpddr2_freq_imx6.S 2015-10-15 15:51:24.004737338 +0200
@@ -0,0 +1,484 @@
+/*
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -29949,7 +28697,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/lpddr2_freq_imx6.S linux-3.14.54/
+ .size mx6_lpddr2_freq_change, . - mx6_lpddr2_freq_change
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/mach-imx6q.c linux-3.14.54/arch/arm/mach-imx/mach-imx6q.c
--- linux-3.14.54.orig/arch/arm/mach-imx/mach-imx6q.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/mach-imx6q.c 2015-10-12 10:56:17.863351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/mach-imx6q.c 2015-10-15 15:51:24.008737159 +0200
@@ -1,5 +1,5 @@
/*
- * Copyright 2011-2013 Freescale Semiconductor, Inc.
@@ -30243,7 +28991,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/mach-imx6q.c linux-3.14.54/arch/a
.init_irq = imx6q_init_irq,
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/mach-imx6sl.c linux-3.14.54/arch/arm/mach-imx/mach-imx6sl.c
--- linux-3.14.54.orig/arch/arm/mach-imx/mach-imx6sl.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/mach-imx6sl.c 2015-10-12 10:56:17.863351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/mach-imx6sl.c 2015-10-15 15:51:24.008737159 +0200
@@ -17,8 +17,9 @@
#include <asm/mach/map.h>
@@ -30285,7 +29033,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/mach-imx6sl.c linux-3.14.54/arch/
static void __init imx6sl_init_irq(void)
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/mach-vf610.c linux-3.14.54/arch/arm/mach-imx/mach-vf610.c
--- linux-3.14.54.orig/arch/arm/mach-imx/mach-vf610.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/mach-vf610.c 2015-10-12 10:56:17.864351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/mach-vf610.c 2015-10-15 15:51:24.008737159 +0200
@@ -22,7 +22,7 @@
static void __init vf610_init_irq(void)
@@ -30295,9 +29043,42 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/mach-vf610.c linux-3.14.54/arch/a
irqchip_init();
}
+diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/Makefile linux-3.14.54/arch/arm/mach-imx/Makefile
+--- linux-3.14.54.orig/arch/arm/mach-imx/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/mach-imx/Makefile 2015-10-15 15:51:24.008737159 +0200
+@@ -30,6 +30,7 @@
+ ifeq ($(CONFIG_CPU_IDLE),y)
+ obj-$(CONFIG_SOC_IMX5) += cpuidle-imx5.o
+ obj-$(CONFIG_SOC_IMX6Q) += cpuidle-imx6q.o
++obj-$(CONFIG_SOC_IMX6SL) += cpuidle-imx6sl.o
+ endif
+
+ ifdef CONFIG_SND_IMX_SOC
+@@ -101,9 +102,18 @@
+ obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o
+ obj-$(CONFIG_SOC_IMX6SL) += clk-imx6sl.o mach-imx6sl.o
+
+-obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o headsmp.o
+-# i.MX6SL reuses i.MX6Q code
+-obj-$(CONFIG_SOC_IMX6SL) += pm-imx6q.o headsmp.o
++AFLAGS_suspend-imx6.o :=-Wa,-march=armv7-a
++obj-$(CONFIG_PM) += suspend-imx6.o pm-imx6.o headsmp.o
++
++obj-y += busfreq-imx6.o
++ifeq ($(CONFIG_ARM_IMX6_CPUFREQ),y)
++obj-$(CONFIG_SOC_IMX6Q) += ddr3_freq_imx6.o busfreq_ddr3.o
++obj-$(CONFIG_SOC_IMX6SL) += lpddr2_freq_imx6.o busfreq_lpddr2.o
++endif
++ifeq ($(CONFIG_CPU_IDLE), y)
++obj-$(CONFIG_SOC_IMX6SL) += imx6sl_wfi.o
++endif
++
+
+ # i.MX5 based machines
+ obj-$(CONFIG_MACH_MX51_BABBAGE) += mach-mx51_babbage.o
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/mx6.h linux-3.14.54/arch/arm/mach-imx/mx6.h
--- linux-3.14.54.orig/arch/arm/mach-imx/mx6.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/mach-imx/mx6.h 2015-10-12 10:56:17.864351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/mx6.h 2015-10-15 15:51:24.324716385 +0200
@@ -0,0 +1,35 @@
+/*
+ * Copyright 2004-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -30336,7 +29117,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/mx6.h linux-3.14.54/arch/arm/mach
+#endif
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/mxc.h linux-3.14.54/arch/arm/mach-imx/mxc.h
--- linux-3.14.54.orig/arch/arm/mach-imx/mxc.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/mxc.h 2015-10-12 10:56:17.864351175 +0200
++++ linux-3.14.54/arch/arm/mach-imx/mxc.h 2015-10-15 15:51:24.324716385 +0200
@@ -42,6 +42,8 @@
#define IMX_CHIP_REVISION_1_1 0x11
#define IMX_CHIP_REVISION_1_2 0x12
@@ -30356,7 +29137,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/mxc.h linux-3.14.54/arch/arm/mach
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/pm-imx6.c linux-3.14.54/arch/arm/mach-imx/pm-imx6.c
--- linux-3.14.54.orig/arch/arm/mach-imx/pm-imx6.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/mach-imx/pm-imx6.c 2015-10-12 10:56:17.865351174 +0200
++++ linux-3.14.54/arch/arm/mach-imx/pm-imx6.c 2015-10-15 15:51:24.468706910 +0200
@@ -0,0 +1,580 @@
+/*
+ * Copyright 2011-2014 Freescale Semiconductor, Inc.
@@ -31185,7 +29966,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/pm-imx6q.c linux-3.14.54/arch/arm
-}
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/suspend-imx6.S linux-3.14.54/arch/arm/mach-imx/suspend-imx6.S
--- linux-3.14.54.orig/arch/arm/mach-imx/suspend-imx6.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/mach-imx/suspend-imx6.S 2015-10-12 10:56:17.865351174 +0200
++++ linux-3.14.54/arch/arm/mach-imx/suspend-imx6.S 2015-10-15 15:51:24.496705068 +0200
@@ -0,0 +1,306 @@
+/*
+ * Copyright 2014 Freescale Semiconductor, Inc.
@@ -31495,7 +30276,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/suspend-imx6.S linux-3.14.54/arch
+ENDPROC(v7_cpu_resume)
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/system.c linux-3.14.54/arch/arm/mach-imx/system.c
--- linux-3.14.54.orig/arch/arm/mach-imx/system.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/system.c 2015-10-12 10:56:17.865351174 +0200
++++ linux-3.14.54/arch/arm/mach-imx/system.c 2015-10-15 15:51:24.496705068 +0200
@@ -34,6 +34,7 @@
static void __iomem *wdog_base;
@@ -31579,7 +30360,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/system.c linux-3.14.54/arch/arm/m
#endif
diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/time.c linux-3.14.54/arch/arm/mach-imx/time.c
--- linux-3.14.54.orig/arch/arm/mach-imx/time.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-imx/time.c 2015-10-12 10:56:17.865351174 +0200
++++ linux-3.14.54/arch/arm/mach-imx/time.c 2015-10-15 15:51:24.500704804 +0200
@@ -60,7 +60,11 @@
#define V2_TCTL_WAITEN (1 << 3) /* Wait enable mode */
#define V2_TCTL_CLK_IPG (1 << 6)
@@ -31645,7 +30426,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-imx/time.c linux-3.14.54/arch/arm/mac
diff -Nur linux-3.14.54.orig/arch/arm/mach-nomadik/cpu-8815.c linux-3.14.54/arch/arm/mach-nomadik/cpu-8815.c
--- linux-3.14.54.orig/arch/arm/mach-nomadik/cpu-8815.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-nomadik/cpu-8815.c 2015-10-12 10:56:17.866351174 +0200
++++ linux-3.14.54/arch/arm/mach-nomadik/cpu-8815.c 2015-10-15 15:51:24.500704804 +0200
@@ -147,7 +147,7 @@
{
#ifdef CONFIG_CACHE_L2X0
@@ -31655,20 +30436,9 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-nomadik/cpu-8815.c linux-3.14.54/arch
#endif
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
-diff -Nur linux-3.14.54.orig/arch/arm/mach-omap2/Kconfig linux-3.14.54/arch/arm/mach-omap2/Kconfig
---- linux-3.14.54.orig/arch/arm/mach-omap2/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-omap2/Kconfig 2015-10-12 10:56:17.867351174 +0200
-@@ -78,6 +78,7 @@
- select MULTI_IRQ_HANDLER
- select ARM_GIC
- select MACH_OMAP_GENERIC
-+ select MIGHT_HAVE_CACHE_L2X0
-
- config SOC_DRA7XX
- bool "TI DRA7XX"
diff -Nur linux-3.14.54.orig/arch/arm/mach-omap2/common.h linux-3.14.54/arch/arm/mach-omap2/common.h
--- linux-3.14.54.orig/arch/arm/mach-omap2/common.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-omap2/common.h 2015-10-12 10:56:17.866351174 +0200
++++ linux-3.14.54/arch/arm/mach-omap2/common.h 2015-10-15 15:51:24.500704804 +0200
@@ -91,6 +91,7 @@
extern void omap3_secure_sync32k_timer_init(void);
extern void omap3_gptimer_timer_init(void);
@@ -31679,7 +30449,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-omap2/common.h linux-3.14.54/arch/arm
void omap2420_init_early(void);
diff -Nur linux-3.14.54.orig/arch/arm/mach-omap2/io.c linux-3.14.54/arch/arm/mach-omap2/io.c
--- linux-3.14.54.orig/arch/arm/mach-omap2/io.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-omap2/io.c 2015-10-12 10:56:17.867351174 +0200
++++ linux-3.14.54/arch/arm/mach-omap2/io.c 2015-10-15 15:51:24.500704804 +0200
@@ -608,6 +608,7 @@
am43xx_clockdomains_init();
am43xx_hwmod_init();
@@ -31696,38 +30466,20 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-omap2/io.c linux-3.14.54/arch/arm/mac
omap_clk_soc_init = omap4xxx_dt_clk_init;
}
-diff -Nur linux-3.14.54.orig/arch/arm/mach-omap2/omap-mpuss-lowpower.c linux-3.14.54/arch/arm/mach-omap2/omap-mpuss-lowpower.c
---- linux-3.14.54.orig/arch/arm/mach-omap2/omap-mpuss-lowpower.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-omap2/omap-mpuss-lowpower.c 2015-10-12 10:56:17.868351174 +0200
-@@ -187,19 +187,15 @@
- * in every restore MPUSS OFF path.
- */
- #ifdef CONFIG_CACHE_L2X0
--static void save_l2x0_context(void)
-+static void __init save_l2x0_context(void)
- {
-- u32 val;
-- void __iomem *l2x0_base = omap4_get_l2cache_base();
-- if (l2x0_base) {
-- val = __raw_readl(l2x0_base + L2X0_AUX_CTRL);
-- __raw_writel(val, sar_base + L2X0_AUXCTRL_OFFSET);
-- val = __raw_readl(l2x0_base + L2X0_PREFETCH_CTRL);
-- __raw_writel(val, sar_base + L2X0_PREFETCH_CTRL_OFFSET);
-- }
-+ __raw_writel(l2x0_saved_regs.aux_ctrl,
-+ sar_base + L2X0_AUXCTRL_OFFSET);
-+ __raw_writel(l2x0_saved_regs.prefetch_ctrl,
-+ sar_base + L2X0_PREFETCH_CTRL_OFFSET);
- }
- #else
--static void save_l2x0_context(void)
-+static void __init save_l2x0_context(void)
- {}
- #endif
+diff -Nur linux-3.14.54.orig/arch/arm/mach-omap2/Kconfig linux-3.14.54/arch/arm/mach-omap2/Kconfig
+--- linux-3.14.54.orig/arch/arm/mach-omap2/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/mach-omap2/Kconfig 2015-10-15 15:51:24.500704804 +0200
+@@ -78,6 +78,7 @@
+ select MULTI_IRQ_HANDLER
+ select ARM_GIC
+ select MACH_OMAP_GENERIC
++ select MIGHT_HAVE_CACHE_L2X0
+ config SOC_DRA7XX
+ bool "TI DRA7XX"
diff -Nur linux-3.14.54.orig/arch/arm/mach-omap2/omap4-common.c linux-3.14.54/arch/arm/mach-omap2/omap4-common.c
--- linux-3.14.54.orig/arch/arm/mach-omap2/omap4-common.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-omap2/omap4-common.c 2015-10-12 10:56:17.868351174 +0200
++++ linux-3.14.54/arch/arm/mach-omap2/omap4-common.c 2015-10-15 15:51:24.500704804 +0200
@@ -166,75 +166,57 @@
return l2cache_base;
}
@@ -31838,9 +30590,38 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-omap2/omap4-common.c linux-3.14.54/ar
#endif
void __iomem *omap4_get_sar_ram_base(void)
+diff -Nur linux-3.14.54.orig/arch/arm/mach-omap2/omap-mpuss-lowpower.c linux-3.14.54/arch/arm/mach-omap2/omap-mpuss-lowpower.c
+--- linux-3.14.54.orig/arch/arm/mach-omap2/omap-mpuss-lowpower.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/mach-omap2/omap-mpuss-lowpower.c 2015-10-15 15:51:24.500704804 +0200
+@@ -187,19 +187,15 @@
+ * in every restore MPUSS OFF path.
+ */
+ #ifdef CONFIG_CACHE_L2X0
+-static void save_l2x0_context(void)
++static void __init save_l2x0_context(void)
+ {
+- u32 val;
+- void __iomem *l2x0_base = omap4_get_l2cache_base();
+- if (l2x0_base) {
+- val = __raw_readl(l2x0_base + L2X0_AUX_CTRL);
+- __raw_writel(val, sar_base + L2X0_AUXCTRL_OFFSET);
+- val = __raw_readl(l2x0_base + L2X0_PREFETCH_CTRL);
+- __raw_writel(val, sar_base + L2X0_PREFETCH_CTRL_OFFSET);
+- }
++ __raw_writel(l2x0_saved_regs.aux_ctrl,
++ sar_base + L2X0_AUXCTRL_OFFSET);
++ __raw_writel(l2x0_saved_regs.prefetch_ctrl,
++ sar_base + L2X0_PREFETCH_CTRL_OFFSET);
+ }
+ #else
+-static void save_l2x0_context(void)
++static void __init save_l2x0_context(void)
+ {}
+ #endif
+
diff -Nur linux-3.14.54.orig/arch/arm/mach-prima2/l2x0.c linux-3.14.54/arch/arm/mach-prima2/l2x0.c
--- linux-3.14.54.orig/arch/arm/mach-prima2/l2x0.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-prima2/l2x0.c 2015-10-12 10:56:17.868351174 +0200
++++ linux-3.14.54/arch/arm/mach-prima2/l2x0.c 2015-10-15 15:51:24.500704804 +0200
@@ -8,43 +8,10 @@
#include <linux/init.h>
@@ -31888,7 +30669,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-prima2/l2x0.c linux-3.14.54/arch/arm/
early_initcall(sirfsoc_l2x0_init);
diff -Nur linux-3.14.54.orig/arch/arm/mach-prima2/pm.c linux-3.14.54/arch/arm/mach-prima2/pm.c
--- linux-3.14.54.orig/arch/arm/mach-prima2/pm.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-prima2/pm.c 2015-10-12 10:56:17.868351174 +0200
++++ linux-3.14.54/arch/arm/mach-prima2/pm.c 2015-10-15 15:51:24.500704804 +0200
@@ -71,7 +71,6 @@
case PM_SUSPEND_MEM:
sirfsoc_pre_suspend_power_off();
@@ -31899,7 +30680,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-prima2/pm.c linux-3.14.54/arch/arm/ma
cpu_suspend(0, sirfsoc_finish_suspend);
diff -Nur linux-3.14.54.orig/arch/arm/mach-realview/realview_eb.c linux-3.14.54/arch/arm/mach-realview/realview_eb.c
--- linux-3.14.54.orig/arch/arm/mach-realview/realview_eb.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-realview/realview_eb.c 2015-10-12 10:56:17.869351174 +0200
++++ linux-3.14.54/arch/arm/mach-realview/realview_eb.c 2015-10-15 15:51:24.500704804 +0200
@@ -442,8 +442,13 @@
realview_eb11mp_fixup();
@@ -31918,7 +30699,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-realview/realview_eb.c linux-3.14.54/
platform_device_register(&pmu_device);
diff -Nur linux-3.14.54.orig/arch/arm/mach-realview/realview_pb1176.c linux-3.14.54/arch/arm/mach-realview/realview_pb1176.c
--- linux-3.14.54.orig/arch/arm/mach-realview/realview_pb1176.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-realview/realview_pb1176.c 2015-10-12 10:56:17.869351174 +0200
++++ linux-3.14.54/arch/arm/mach-realview/realview_pb1176.c 2015-10-15 15:51:24.500704804 +0200
@@ -355,7 +355,13 @@
int i;
@@ -31936,7 +30717,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-realview/realview_pb1176.c linux-3.14
diff -Nur linux-3.14.54.orig/arch/arm/mach-realview/realview_pb11mp.c linux-3.14.54/arch/arm/mach-realview/realview_pb11mp.c
--- linux-3.14.54.orig/arch/arm/mach-realview/realview_pb11mp.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-realview/realview_pb11mp.c 2015-10-12 10:56:17.869351174 +0200
++++ linux-3.14.54/arch/arm/mach-realview/realview_pb11mp.c 2015-10-15 15:51:24.500704804 +0200
@@ -337,8 +337,13 @@
int i;
@@ -31955,7 +30736,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-realview/realview_pb11mp.c linux-3.14
diff -Nur linux-3.14.54.orig/arch/arm/mach-realview/realview_pbx.c linux-3.14.54/arch/arm/mach-realview/realview_pbx.c
--- linux-3.14.54.orig/arch/arm/mach-realview/realview_pbx.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-realview/realview_pbx.c 2015-10-12 10:56:17.870351174 +0200
++++ linux-3.14.54/arch/arm/mach-realview/realview_pbx.c 2015-10-15 15:51:24.500704804 +0200
@@ -370,8 +370,8 @@
__io_address(REALVIEW_PBX_TILE_L220_BASE);
@@ -31969,7 +30750,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-realview/realview_pbx.c linux-3.14.54
* Bits: .. 0 0 0 0 1 00 1 0 1 001 0 000 0 .... .... .... */
diff -Nur linux-3.14.54.orig/arch/arm/mach-rockchip/rockchip.c linux-3.14.54/arch/arm/mach-rockchip/rockchip.c
--- linux-3.14.54.orig/arch/arm/mach-rockchip/rockchip.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-rockchip/rockchip.c 2015-10-12 10:56:17.870351174 +0200
++++ linux-3.14.54/arch/arm/mach-rockchip/rockchip.c 2015-10-15 15:51:24.500704804 +0200
@@ -25,7 +25,7 @@
static void __init rockchip_dt_init(void)
@@ -31979,11 +30760,11 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-rockchip/rockchip.c linux-3.14.54/arc
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
-diff -Nur linux-3.14.54.orig/arch/arm/mach-shmobile/board-armadillo800eva-reference.c linux-3.14.54/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
---- linux-3.14.54.orig/arch/arm/mach-shmobile/board-armadillo800eva-reference.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-shmobile/board-armadillo800eva-reference.c 2015-10-12 10:56:17.871351174 +0200
-@@ -164,8 +164,8 @@
- r8a7740_meram_workaround();
+diff -Nur linux-3.14.54.orig/arch/arm/mach-shmobile/board-armadillo800eva.c linux-3.14.54/arch/arm/mach-shmobile/board-armadillo800eva.c
+--- linux-3.14.54.orig/arch/arm/mach-shmobile/board-armadillo800eva.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/mach-shmobile/board-armadillo800eva.c 2015-10-15 15:51:24.500704804 +0200
+@@ -1270,8 +1270,8 @@
+
#ifdef CONFIG_CACHE_L2X0
- /* Early BRESP enable, Shared attribute override enable, 32K*8way */
@@ -31992,12 +30773,12 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-shmobile/board-armadillo800eva-refere
+ l2x0_init(IOMEM(0xf0002000), 0x00400000, 0xc20f0fff);
#endif
- r8a7740_add_standard_devices_dt();
-diff -Nur linux-3.14.54.orig/arch/arm/mach-shmobile/board-armadillo800eva.c linux-3.14.54/arch/arm/mach-shmobile/board-armadillo800eva.c
---- linux-3.14.54.orig/arch/arm/mach-shmobile/board-armadillo800eva.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-shmobile/board-armadillo800eva.c 2015-10-12 10:56:17.870351174 +0200
-@@ -1270,8 +1270,8 @@
-
+ i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
+diff -Nur linux-3.14.54.orig/arch/arm/mach-shmobile/board-armadillo800eva-reference.c linux-3.14.54/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
+--- linux-3.14.54.orig/arch/arm/mach-shmobile/board-armadillo800eva-reference.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/mach-shmobile/board-armadillo800eva-reference.c 2015-10-15 15:51:24.500704804 +0200
+@@ -164,8 +164,8 @@
+ r8a7740_meram_workaround();
#ifdef CONFIG_CACHE_L2X0
- /* Early BRESP enable, Shared attribute override enable, 32K*8way */
@@ -32006,12 +30787,12 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-shmobile/board-armadillo800eva.c linu
+ l2x0_init(IOMEM(0xf0002000), 0x00400000, 0xc20f0fff);
#endif
- i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
-diff -Nur linux-3.14.54.orig/arch/arm/mach-shmobile/board-kzm9g-reference.c linux-3.14.54/arch/arm/mach-shmobile/board-kzm9g-reference.c
---- linux-3.14.54.orig/arch/arm/mach-shmobile/board-kzm9g-reference.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-shmobile/board-kzm9g-reference.c 2015-10-12 10:56:17.871351174 +0200
-@@ -36,8 +36,8 @@
- sh73a0_add_standard_devices_dt();
+ r8a7740_add_standard_devices_dt();
+diff -Nur linux-3.14.54.orig/arch/arm/mach-shmobile/board-kzm9g.c linux-3.14.54/arch/arm/mach-shmobile/board-kzm9g.c
+--- linux-3.14.54.orig/arch/arm/mach-shmobile/board-kzm9g.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/mach-shmobile/board-kzm9g.c 2015-10-15 15:51:24.500704804 +0200
+@@ -878,8 +878,8 @@
+ gpio_request_one(223, GPIOF_IN, NULL); /* IRQ8 */
#ifdef CONFIG_CACHE_L2X0
- /* Early BRESP enable, Shared attribute override enable, 64K*8way */
@@ -32019,13 +30800,13 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-shmobile/board-kzm9g-reference.c linu
+ /* Shared attribute override enable, 64K*8way */
+ l2x0_init(IOMEM(0xf0100000), 0x00400000, 0xc20f0fff);
#endif
- }
-diff -Nur linux-3.14.54.orig/arch/arm/mach-shmobile/board-kzm9g.c linux-3.14.54/arch/arm/mach-shmobile/board-kzm9g.c
---- linux-3.14.54.orig/arch/arm/mach-shmobile/board-kzm9g.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-shmobile/board-kzm9g.c 2015-10-12 10:56:17.871351174 +0200
-@@ -878,8 +878,8 @@
- gpio_request_one(223, GPIOF_IN, NULL); /* IRQ8 */
+ i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
+diff -Nur linux-3.14.54.orig/arch/arm/mach-shmobile/board-kzm9g-reference.c linux-3.14.54/arch/arm/mach-shmobile/board-kzm9g-reference.c
+--- linux-3.14.54.orig/arch/arm/mach-shmobile/board-kzm9g-reference.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/mach-shmobile/board-kzm9g-reference.c 2015-10-15 15:51:24.500704804 +0200
+@@ -36,8 +36,8 @@
+ sh73a0_add_standard_devices_dt();
#ifdef CONFIG_CACHE_L2X0
- /* Early BRESP enable, Shared attribute override enable, 64K*8way */
@@ -32033,11 +30814,11 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-shmobile/board-kzm9g.c linux-3.14.54/
+ /* Shared attribute override enable, 64K*8way */
+ l2x0_init(IOMEM(0xf0100000), 0x00400000, 0xc20f0fff);
#endif
+ }
- i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
diff -Nur linux-3.14.54.orig/arch/arm/mach-shmobile/setup-r8a7778.c linux-3.14.54/arch/arm/mach-shmobile/setup-r8a7778.c
--- linux-3.14.54.orig/arch/arm/mach-shmobile/setup-r8a7778.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-shmobile/setup-r8a7778.c 2015-10-12 10:56:17.872351174 +0200
++++ linux-3.14.54/arch/arm/mach-shmobile/setup-r8a7778.c 2015-10-15 15:51:24.504704538 +0200
@@ -298,10 +298,10 @@
void __iomem *base = ioremap_nocache(0xf0100000, 0x1000);
if (base) {
@@ -32053,7 +30834,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-shmobile/setup-r8a7778.c linux-3.14.5
diff -Nur linux-3.14.54.orig/arch/arm/mach-shmobile/setup-r8a7779.c linux-3.14.54/arch/arm/mach-shmobile/setup-r8a7779.c
--- linux-3.14.54.orig/arch/arm/mach-shmobile/setup-r8a7779.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-shmobile/setup-r8a7779.c 2015-10-12 10:56:17.872351174 +0200
++++ linux-3.14.54/arch/arm/mach-shmobile/setup-r8a7779.c 2015-10-15 15:51:24.504704538 +0200
@@ -700,8 +700,8 @@
void __init r8a7779_add_standard_devices(void)
{
@@ -32067,7 +30848,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-shmobile/setup-r8a7779.c linux-3.14.5
diff -Nur linux-3.14.54.orig/arch/arm/mach-socfpga/socfpga.c linux-3.14.54/arch/arm/mach-socfpga/socfpga.c
--- linux-3.14.54.orig/arch/arm/mach-socfpga/socfpga.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-socfpga/socfpga.c 2015-10-12 10:56:17.872351174 +0200
++++ linux-3.14.54/arch/arm/mach-socfpga/socfpga.c 2015-10-15 15:51:24.504704538 +0200
@@ -104,7 +104,7 @@
static void __init socfpga_cyclone5_init(void)
@@ -32079,7 +30860,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-socfpga/socfpga.c linux-3.14.54/arch/
}
diff -Nur linux-3.14.54.orig/arch/arm/mach-spear/platsmp.c linux-3.14.54/arch/arm/mach-spear/platsmp.c
--- linux-3.14.54.orig/arch/arm/mach-spear/platsmp.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-spear/platsmp.c 2015-10-12 10:56:17.872351174 +0200
++++ linux-3.14.54/arch/arm/mach-spear/platsmp.c 2015-10-15 15:51:24.504704538 +0200
@@ -20,6 +20,18 @@
#include <mach/spear.h>
#include "generic.h"
@@ -32122,7 +30903,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-spear/platsmp.c linux-3.14.54/arch/ar
while (time_before(jiffies, timeout)) {
diff -Nur linux-3.14.54.orig/arch/arm/mach-spear/spear13xx.c linux-3.14.54/arch/arm/mach-spear/spear13xx.c
--- linux-3.14.54.orig/arch/arm/mach-spear/spear13xx.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-spear/spear13xx.c 2015-10-12 10:56:17.873351174 +0200
++++ linux-3.14.54/arch/arm/mach-spear/spear13xx.c 2015-10-15 15:51:24.504704538 +0200
@@ -38,15 +38,15 @@
if (!IS_ENABLED(CONFIG_CACHE_L2X0))
return;
@@ -32145,7 +30926,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-spear/spear13xx.c linux-3.14.54/arch/
/*
diff -Nur linux-3.14.54.orig/arch/arm/mach-sti/board-dt.c linux-3.14.54/arch/arm/mach-sti/board-dt.c
--- linux-3.14.54.orig/arch/arm/mach-sti/board-dt.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-sti/board-dt.c 2015-10-12 10:56:17.873351174 +0200
++++ linux-3.14.54/arch/arm/mach-sti/board-dt.c 2015-10-15 15:51:24.504704538 +0200
@@ -16,15 +16,9 @@
void __init stih41x_l2x0_init(void)
@@ -32167,7 +30948,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-sti/board-dt.c linux-3.14.54/arch/arm
static void __init stih41x_machine_init(void)
diff -Nur linux-3.14.54.orig/arch/arm/mach-tegra/pm.h linux-3.14.54/arch/arm/mach-tegra/pm.h
--- linux-3.14.54.orig/arch/arm/mach-tegra/pm.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-tegra/pm.h 2015-10-12 10:56:17.873351174 +0200
++++ linux-3.14.54/arch/arm/mach-tegra/pm.h 2015-10-15 15:51:24.504704538 +0200
@@ -35,8 +35,6 @@
void tegra30_lp1_iram_hook(void);
void tegra30_sleep_core_init(void);
@@ -32179,7 +30960,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-tegra/pm.h linux-3.14.54/arch/arm/mac
diff -Nur linux-3.14.54.orig/arch/arm/mach-tegra/reset-handler.S linux-3.14.54/arch/arm/mach-tegra/reset-handler.S
--- linux-3.14.54.orig/arch/arm/mach-tegra/reset-handler.S 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-tegra/reset-handler.S 2015-10-12 10:56:17.873351174 +0200
++++ linux-3.14.54/arch/arm/mach-tegra/reset-handler.S 2015-10-15 15:51:24.504704538 +0200
@@ -19,7 +19,6 @@
#include <asm/cache.h>
@@ -32215,7 +30996,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-tegra/reset-handler.S linux-3.14.54/a
diff -Nur linux-3.14.54.orig/arch/arm/mach-tegra/sleep.h linux-3.14.54/arch/arm/mach-tegra/sleep.h
--- linux-3.14.54.orig/arch/arm/mach-tegra/sleep.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-tegra/sleep.h 2015-10-12 10:56:17.873351174 +0200
++++ linux-3.14.54/arch/arm/mach-tegra/sleep.h 2015-10-15 15:51:24.504704538 +0200
@@ -120,37 +120,6 @@
mov \tmp1, \tmp1, lsr #8
.endm
@@ -32256,7 +31037,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-tegra/sleep.h linux-3.14.54/arch/arm/
void tegra_pen_unlock(void);
diff -Nur linux-3.14.54.orig/arch/arm/mach-tegra/tegra.c linux-3.14.54/arch/arm/mach-tegra/tegra.c
--- linux-3.14.54.orig/arch/arm/mach-tegra/tegra.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-tegra/tegra.c 2015-10-12 10:56:17.874351174 +0200
++++ linux-3.14.54/arch/arm/mach-tegra/tegra.c 2015-10-15 15:51:24.504704538 +0200
@@ -73,27 +73,7 @@
static void __init tegra_init_cache(void)
{
@@ -32288,7 +31069,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-tegra/tegra.c linux-3.14.54/arch/arm/
diff -Nur linux-3.14.54.orig/arch/arm/mach-ux500/board-mop500-audio.c linux-3.14.54/arch/arm/mach-ux500/board-mop500-audio.c
--- linux-3.14.54.orig/arch/arm/mach-ux500/board-mop500-audio.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-ux500/board-mop500-audio.c 2015-10-12 10:56:17.874351174 +0200
++++ linux-3.14.54/arch/arm/mach-ux500/board-mop500-audio.c 2015-10-15 15:51:24.504704538 +0200
@@ -9,7 +9,6 @@
#include <linux/gpio.h>
#include <linux/platform_data/dma-ste-dma40.h>
@@ -32299,7 +31080,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-ux500/board-mop500-audio.c linux-3.14
#include "ste-dma40-db8500.h"
diff -Nur linux-3.14.54.orig/arch/arm/mach-ux500/cache-l2x0.c linux-3.14.54/arch/arm/mach-ux500/cache-l2x0.c
--- linux-3.14.54.orig/arch/arm/mach-ux500/cache-l2x0.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-ux500/cache-l2x0.c 2015-10-12 10:56:17.874351174 +0200
++++ linux-3.14.54/arch/arm/mach-ux500/cache-l2x0.c 2015-10-15 15:51:24.504704538 +0200
@@ -35,10 +35,16 @@
return 0;
}
@@ -32353,7 +31134,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-ux500/cache-l2x0.c linux-3.14.54/arch
}
diff -Nur linux-3.14.54.orig/arch/arm/mach-ux500/cpu-db8500.c linux-3.14.54/arch/arm/mach-ux500/cpu-db8500.c
--- linux-3.14.54.orig/arch/arm/mach-ux500/cpu-db8500.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-ux500/cpu-db8500.c 2015-10-12 10:56:17.874351174 +0200
++++ linux-3.14.54/arch/arm/mach-ux500/cpu-db8500.c 2015-10-15 15:51:24.504704538 +0200
@@ -27,7 +27,6 @@
#include <asm/mach/map.h>
@@ -32618,39 +31399,9 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-ux500/irqs.h linux-3.14.54/arch/arm/m
-#define UX500_NR_IRQS IRQ_BOARD_END
-
-#endif /* ASM_ARCH_IRQS_H */
-diff -Nur linux-3.14.54.orig/arch/arm/mach-vexpress/Kconfig linux-3.14.54/arch/arm/mach-vexpress/Kconfig
---- linux-3.14.54.orig/arch/arm/mach-vexpress/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-vexpress/Kconfig 2015-10-12 10:56:17.909351171 +0200
-@@ -55,6 +55,7 @@
-
- config ARCH_VEXPRESS_CA9X4
- bool "Versatile Express Cortex-A9x4 tile"
-+ select ARM_ERRATA_643719
-
- config ARCH_VEXPRESS_DCSCB
- bool "Dual Cluster System Control Block (DCSCB) support"
-diff -Nur linux-3.14.54.orig/arch/arm/mach-vexpress/Makefile linux-3.14.54/arch/arm/mach-vexpress/Makefile
---- linux-3.14.54.orig/arch/arm/mach-vexpress/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-vexpress/Makefile 2015-10-12 10:56:17.909351171 +0200
-@@ -8,8 +8,15 @@
- obj-$(CONFIG_ARCH_VEXPRESS_CA9X4) += ct-ca9x4.o
- obj-$(CONFIG_ARCH_VEXPRESS_DCSCB) += dcscb.o dcscb_setup.o
- CFLAGS_dcscb.o += -march=armv7-a
-+CFLAGS_REMOVE_dcscb.o = -pg
- obj-$(CONFIG_ARCH_VEXPRESS_SPC) += spc.o
-+CFLAGS_REMOVE_spc.o = -pg
- obj-$(CONFIG_ARCH_VEXPRESS_TC2_PM) += tc2_pm.o
- CFLAGS_tc2_pm.o += -march=armv7-a
-+CFLAGS_REMOVE_tc2_pm.o = -pg
-+ifeq ($(CONFIG_ARCH_VEXPRESS_TC2_PM),y)
-+obj-$(CONFIG_ARM_PSCI) += tc2_pm_psci.o
-+CFLAGS_REMOVE_tc2_pm_psci.o = -pg
-+endif
- obj-$(CONFIG_SMP) += platsmp.o
- obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
diff -Nur linux-3.14.54.orig/arch/arm/mach-vexpress/ct-ca9x4.c linux-3.14.54/arch/arm/mach-vexpress/ct-ca9x4.c
--- linux-3.14.54.orig/arch/arm/mach-vexpress/ct-ca9x4.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-vexpress/ct-ca9x4.c 2015-10-12 10:56:17.875351174 +0200
++++ linux-3.14.54/arch/arm/mach-vexpress/ct-ca9x4.c 2015-10-15 15:51:24.504704538 +0200
@@ -45,6 +45,23 @@
iotable_init(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc));
}
@@ -32702,7 +31453,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-vexpress/ct-ca9x4.c linux-3.14.54/arc
diff -Nur linux-3.14.54.orig/arch/arm/mach-vexpress/dcscb.c linux-3.14.54/arch/arm/mach-vexpress/dcscb.c
--- linux-3.14.54.orig/arch/arm/mach-vexpress/dcscb.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-vexpress/dcscb.c 2015-10-12 10:56:17.876351174 +0200
++++ linux-3.14.54/arch/arm/mach-vexpress/dcscb.c 2015-10-15 15:51:24.504704538 +0200
@@ -23,6 +23,7 @@
#include <asm/cacheflush.h>
#include <asm/cputype.h>
@@ -32724,9 +31475,39 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-vexpress/dcscb.c linux-3.14.54/arch/a
if (!cci_probed())
return -ENODEV;
+diff -Nur linux-3.14.54.orig/arch/arm/mach-vexpress/Kconfig linux-3.14.54/arch/arm/mach-vexpress/Kconfig
+--- linux-3.14.54.orig/arch/arm/mach-vexpress/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/mach-vexpress/Kconfig 2015-10-15 15:51:24.504704538 +0200
+@@ -55,6 +55,7 @@
+
+ config ARCH_VEXPRESS_CA9X4
+ bool "Versatile Express Cortex-A9x4 tile"
++ select ARM_ERRATA_643719
+
+ config ARCH_VEXPRESS_DCSCB
+ bool "Dual Cluster System Control Block (DCSCB) support"
+diff -Nur linux-3.14.54.orig/arch/arm/mach-vexpress/Makefile linux-3.14.54/arch/arm/mach-vexpress/Makefile
+--- linux-3.14.54.orig/arch/arm/mach-vexpress/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/mach-vexpress/Makefile 2015-10-15 15:51:24.504704538 +0200
+@@ -8,8 +8,15 @@
+ obj-$(CONFIG_ARCH_VEXPRESS_CA9X4) += ct-ca9x4.o
+ obj-$(CONFIG_ARCH_VEXPRESS_DCSCB) += dcscb.o dcscb_setup.o
+ CFLAGS_dcscb.o += -march=armv7-a
++CFLAGS_REMOVE_dcscb.o = -pg
+ obj-$(CONFIG_ARCH_VEXPRESS_SPC) += spc.o
++CFLAGS_REMOVE_spc.o = -pg
+ obj-$(CONFIG_ARCH_VEXPRESS_TC2_PM) += tc2_pm.o
+ CFLAGS_tc2_pm.o += -march=armv7-a
++CFLAGS_REMOVE_tc2_pm.o = -pg
++ifeq ($(CONFIG_ARCH_VEXPRESS_TC2_PM),y)
++obj-$(CONFIG_ARM_PSCI) += tc2_pm_psci.o
++CFLAGS_REMOVE_tc2_pm_psci.o = -pg
++endif
+ obj-$(CONFIG_SMP) += platsmp.o
+ obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
diff -Nur linux-3.14.54.orig/arch/arm/mach-vexpress/spc.c linux-3.14.54/arch/arm/mach-vexpress/spc.c
--- linux-3.14.54.orig/arch/arm/mach-vexpress/spc.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-vexpress/spc.c 2015-10-12 10:56:17.909351171 +0200
++++ linux-3.14.54/arch/arm/mach-vexpress/spc.c 2015-10-15 15:51:24.504704538 +0200
@@ -392,7 +392,7 @@
* +--------------------------+
* | 31 20 | 19 0 |
@@ -32747,7 +31528,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-vexpress/spc.c linux-3.14.54/arch/arm
}
diff -Nur linux-3.14.54.orig/arch/arm/mach-vexpress/tc2_pm.c linux-3.14.54/arch/arm/mach-vexpress/tc2_pm.c
--- linux-3.14.54.orig/arch/arm/mach-vexpress/tc2_pm.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-vexpress/tc2_pm.c 2015-10-12 10:56:17.910351171 +0200
++++ linux-3.14.54/arch/arm/mach-vexpress/tc2_pm.c 2015-10-15 15:51:24.508704272 +0200
@@ -27,6 +27,7 @@
#include <asm/cacheflush.h>
#include <asm/cputype.h>
@@ -32771,7 +31552,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-vexpress/tc2_pm.c linux-3.14.54/arch/
* SCC registers. We need to extract runtime information like
diff -Nur linux-3.14.54.orig/arch/arm/mach-vexpress/tc2_pm_psci.c linux-3.14.54/arch/arm/mach-vexpress/tc2_pm_psci.c
--- linux-3.14.54.orig/arch/arm/mach-vexpress/tc2_pm_psci.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/mach-vexpress/tc2_pm_psci.c 2015-10-12 10:56:17.910351171 +0200
++++ linux-3.14.54/arch/arm/mach-vexpress/tc2_pm_psci.c 2015-10-15 15:51:24.508704272 +0200
@@ -0,0 +1,173 @@
+/*
+ * arch/arm/mach-vexpress/tc2_pm_psci.c - TC2 PSCI support
@@ -32948,7 +31729,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-vexpress/tc2_pm_psci.c linux-3.14.54/
+early_initcall(tc2_pm_psci_init);
diff -Nur linux-3.14.54.orig/arch/arm/mach-vexpress/v2m.c linux-3.14.54/arch/arm/mach-vexpress/v2m.c
--- linux-3.14.54.orig/arch/arm/mach-vexpress/v2m.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-vexpress/v2m.c 2015-10-12 10:56:17.910351171 +0200
++++ linux-3.14.54/arch/arm/mach-vexpress/v2m.c 2015-10-15 15:51:24.508704272 +0200
@@ -7,6 +7,7 @@
#include <linux/io.h>
#include <linux/smp.h>
@@ -33000,7 +31781,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-vexpress/v2m.c linux-3.14.54/arch/arm
static const struct of_device_id v2m_dt_bus_match[] __initconst = {
diff -Nur linux-3.14.54.orig/arch/arm/mach-zynq/common.c linux-3.14.54/arch/arm/mach-zynq/common.c
--- linux-3.14.54.orig/arch/arm/mach-zynq/common.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mach-zynq/common.c 2015-10-12 10:56:17.911351171 +0200
++++ linux-3.14.54/arch/arm/mach-zynq/common.c 2015-10-15 15:51:24.508704272 +0200
@@ -67,7 +67,7 @@
/*
* 64KB way size, 8-way associativity, parity disabled
@@ -33010,83 +31791,9 @@ diff -Nur linux-3.14.54.orig/arch/arm/mach-zynq/common.c linux-3.14.54/arch/arm/
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-diff -Nur linux-3.14.54.orig/arch/arm/mm/Kconfig linux-3.14.54/arch/arm/mm/Kconfig
---- linux-3.14.54.orig/arch/arm/mm/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mm/Kconfig 2015-10-12 10:56:17.914351171 +0200
-@@ -898,6 +898,57 @@
- This option enables optimisations for the PL310 cache
- controller.
-
-+config PL310_ERRATA_588369
-+ bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
-+ depends on CACHE_L2X0
-+ help
-+ The PL310 L2 cache controller implements three types of Clean &
-+ Invalidate maintenance operations: by Physical Address
-+ (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
-+ They are architecturally defined to behave as the execution of a
-+ clean operation followed immediately by an invalidate operation,
-+ both performing to the same memory location. This functionality
-+ is not correctly implemented in PL310 as clean lines are not
-+ invalidated as a result of these operations.
-+
-+config PL310_ERRATA_727915
-+ bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
-+ depends on CACHE_L2X0
-+ help
-+ PL310 implements the Clean & Invalidate by Way L2 cache maintenance
-+ operation (offset 0x7FC). This operation runs in background so that
-+ PL310 can handle normal accesses while it is in progress. Under very
-+ rare circumstances, due to this erratum, write data can be lost when
-+ PL310 treats a cacheable write transaction during a Clean &
-+ Invalidate by Way operation.
-+
-+config PL310_ERRATA_753970
-+ bool "PL310 errata: cache sync operation may be faulty"
-+ depends on CACHE_PL310
-+ help
-+ This option enables the workaround for the 753970 PL310 (r3p0) erratum.
-+
-+ Under some condition the effect of cache sync operation on
-+ the store buffer still remains when the operation completes.
-+ This means that the store buffer is always asked to drain and
-+ this prevents it from merging any further writes. The workaround
-+ is to replace the normal offset of cache sync operation (0x730)
-+ by another offset targeting an unmapped PL310 register 0x740.
-+ This has the same effect as the cache sync operation: store buffer
-+ drain and waiting for all buffers empty.
-+
-+config PL310_ERRATA_769419
-+ bool "PL310 errata: no automatic Store Buffer drain"
-+ depends on CACHE_L2X0
-+ help
-+ On revisions of the PL310 prior to r3p2, the Store Buffer does
-+ not automatically drain. This can cause normal, non-cacheable
-+ writes to be retained when the memory system is idle, leading
-+ to suboptimal I/O performance for drivers using coherent DMA.
-+ This option adds a write barrier to the cpu_idle loop so that,
-+ on systems with an outer cache, the store buffer is drained
-+ explicitly.
-+
- config CACHE_TAUROS2
- bool "Enable the Tauros2 L2 cache controller"
- depends on (ARCH_DOVE || ARCH_MMP || CPU_PJ4)
-diff -Nur linux-3.14.54.orig/arch/arm/mm/Makefile linux-3.14.54/arch/arm/mm/Makefile
---- linux-3.14.54.orig/arch/arm/mm/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mm/Makefile 2015-10-12 10:56:17.914351171 +0200
-@@ -95,7 +95,8 @@
- AFLAGS_proc-v6.o :=-Wa,-march=armv6
- AFLAGS_proc-v7.o :=-Wa,-march=armv7-a
-
-+obj-$(CONFIG_OUTER_CACHE) += l2c-common.o
- obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o
--obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
-+obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o l2c-l2x0-resume.o
- obj-$(CONFIG_CACHE_XSC3L2) += cache-xsc3l2.o
- obj-$(CONFIG_CACHE_TAUROS2) += cache-tauros2.o
diff -Nur linux-3.14.54.orig/arch/arm/mm/cache-feroceon-l2.c linux-3.14.54/arch/arm/mm/cache-feroceon-l2.c
--- linux-3.14.54.orig/arch/arm/mm/cache-feroceon-l2.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mm/cache-feroceon-l2.c 2015-10-12 10:56:17.911351171 +0200
++++ linux-3.14.54/arch/arm/mm/cache-feroceon-l2.c 2015-10-15 15:51:24.508704272 +0200
@@ -343,7 +343,6 @@
outer_cache.inv_range = feroceon_l2_inv_range;
outer_cache.clean_range = feroceon_l2_clean_range;
@@ -33097,7 +31804,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mm/cache-feroceon-l2.c linux-3.14.54/arch/
diff -Nur linux-3.14.54.orig/arch/arm/mm/cache-l2x0.c linux-3.14.54/arch/arm/mm/cache-l2x0.c
--- linux-3.14.54.orig/arch/arm/mm/cache-l2x0.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mm/cache-l2x0.c 2015-10-12 10:56:17.912351171 +0200
++++ linux-3.14.54/arch/arm/mm/cache-l2x0.c 2015-10-15 15:51:24.508704272 +0200
@@ -16,18 +16,33 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
@@ -34916,7 +33623,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mm/cache-l2x0.c linux-3.14.54/arch/arm/mm/
}
diff -Nur linux-3.14.54.orig/arch/arm/mm/dma-mapping.c linux-3.14.54/arch/arm/mm/dma-mapping.c
--- linux-3.14.54.orig/arch/arm/mm/dma-mapping.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mm/dma-mapping.c 2015-10-12 10:56:17.912351171 +0200
++++ linux-3.14.54/arch/arm/mm/dma-mapping.c 2015-10-15 15:51:24.508704272 +0200
@@ -26,6 +26,7 @@
#include <linux/io.h>
#include <linux/vmalloc.h>
@@ -34927,7 +33634,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mm/dma-mapping.c linux-3.14.54/arch/arm/mm
#include <asm/highmem.h>
diff -Nur linux-3.14.54.orig/arch/arm/mm/fault.c linux-3.14.54/arch/arm/mm/fault.c
--- linux-3.14.54.orig/arch/arm/mm/fault.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mm/fault.c 2015-10-12 10:56:17.913351171 +0200
++++ linux-3.14.54/arch/arm/mm/fault.c 2015-10-15 15:51:24.508704272 +0200
@@ -449,8 +449,16 @@
if (pud_none(*pud_k))
@@ -34959,7 +33666,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mm/fault.c linux-3.14.54/arch/arm/mm/fault
bad_area:
diff -Nur linux-3.14.54.orig/arch/arm/mm/init.c linux-3.14.54/arch/arm/mm/init.c
--- linux-3.14.54.orig/arch/arm/mm/init.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mm/init.c 2015-10-12 10:56:17.913351171 +0200
++++ linux-3.14.54/arch/arm/mm/init.c 2015-10-15 15:51:24.508704272 +0200
@@ -327,7 +327,7 @@
* reserve memory for DMA contigouos allocations,
* must come from DMA area inside low memory
@@ -34969,9 +33676,70 @@ diff -Nur linux-3.14.54.orig/arch/arm/mm/init.c linux-3.14.54/arch/arm/mm/init.c
arm_memblock_steal_permitted = false;
memblock_dump_all();
+diff -Nur linux-3.14.54.orig/arch/arm/mm/Kconfig linux-3.14.54/arch/arm/mm/Kconfig
+--- linux-3.14.54.orig/arch/arm/mm/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/mm/Kconfig 2015-10-15 15:51:24.512704008 +0200
+@@ -898,6 +898,57 @@
+ This option enables optimisations for the PL310 cache
+ controller.
+
++config PL310_ERRATA_588369
++ bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
++ depends on CACHE_L2X0
++ help
++ The PL310 L2 cache controller implements three types of Clean &
++ Invalidate maintenance operations: by Physical Address
++ (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
++ They are architecturally defined to behave as the execution of a
++ clean operation followed immediately by an invalidate operation,
++ both performing to the same memory location. This functionality
++ is not correctly implemented in PL310 as clean lines are not
++ invalidated as a result of these operations.
++
++config PL310_ERRATA_727915
++ bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
++ depends on CACHE_L2X0
++ help
++ PL310 implements the Clean & Invalidate by Way L2 cache maintenance
++ operation (offset 0x7FC). This operation runs in background so that
++ PL310 can handle normal accesses while it is in progress. Under very
++ rare circumstances, due to this erratum, write data can be lost when
++ PL310 treats a cacheable write transaction during a Clean &
++ Invalidate by Way operation.
++
++config PL310_ERRATA_753970
++ bool "PL310 errata: cache sync operation may be faulty"
++ depends on CACHE_PL310
++ help
++ This option enables the workaround for the 753970 PL310 (r3p0) erratum.
++
++ Under some condition the effect of cache sync operation on
++ the store buffer still remains when the operation completes.
++ This means that the store buffer is always asked to drain and
++ this prevents it from merging any further writes. The workaround
++ is to replace the normal offset of cache sync operation (0x730)
++ by another offset targeting an unmapped PL310 register 0x740.
++ This has the same effect as the cache sync operation: store buffer
++ drain and waiting for all buffers empty.
++
++config PL310_ERRATA_769419
++ bool "PL310 errata: no automatic Store Buffer drain"
++ depends on CACHE_L2X0
++ help
++ On revisions of the PL310 prior to r3p2, the Store Buffer does
++ not automatically drain. This can cause normal, non-cacheable
++ writes to be retained when the memory system is idle, leading
++ to suboptimal I/O performance for drivers using coherent DMA.
++ This option adds a write barrier to the cpu_idle loop so that,
++ on systems with an outer cache, the store buffer is drained
++ explicitly.
++
+ config CACHE_TAUROS2
+ bool "Enable the Tauros2 L2 cache controller"
+ depends on (ARCH_DOVE || ARCH_MMP || CPU_PJ4)
diff -Nur linux-3.14.54.orig/arch/arm/mm/l2c-common.c linux-3.14.54/arch/arm/mm/l2c-common.c
--- linux-3.14.54.orig/arch/arm/mm/l2c-common.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/mm/l2c-common.c 2015-10-12 10:56:17.914351171 +0200
++++ linux-3.14.54/arch/arm/mm/l2c-common.c 2015-10-15 15:51:24.512704008 +0200
@@ -0,0 +1,20 @@
+/*
+ * Copyright (C) 2010 ARM Ltd.
@@ -34995,7 +33763,7 @@ diff -Nur linux-3.14.54.orig/arch/arm/mm/l2c-common.c linux-3.14.54/arch/arm/mm/
+}
diff -Nur linux-3.14.54.orig/arch/arm/mm/l2c-l2x0-resume.S linux-3.14.54/arch/arm/mm/l2c-l2x0-resume.S
--- linux-3.14.54.orig/arch/arm/mm/l2c-l2x0-resume.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm/mm/l2c-l2x0-resume.S 2015-10-12 10:56:17.914351171 +0200
++++ linux-3.14.54/arch/arm/mm/l2c-l2x0-resume.S 2015-10-15 15:51:24.512704008 +0200
@@ -0,0 +1,58 @@
+/*
+ * L2C-310 early resume code. This can be used by platforms to restore
@@ -35055,9 +33823,22 @@ diff -Nur linux-3.14.54.orig/arch/arm/mm/l2c-l2x0-resume.S linux-3.14.54/arch/ar
+
+ .align
+1: .long l2x0_saved_regs - .
+diff -Nur linux-3.14.54.orig/arch/arm/mm/Makefile linux-3.14.54/arch/arm/mm/Makefile
+--- linux-3.14.54.orig/arch/arm/mm/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm/mm/Makefile 2015-10-15 15:51:24.512704008 +0200
+@@ -95,7 +95,8 @@
+ AFLAGS_proc-v6.o :=-Wa,-march=armv6
+ AFLAGS_proc-v7.o :=-Wa,-march=armv7-a
+
++obj-$(CONFIG_OUTER_CACHE) += l2c-common.o
+ obj-$(CONFIG_CACHE_FEROCEON_L2) += cache-feroceon-l2.o
+-obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
++obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o l2c-l2x0-resume.o
+ obj-$(CONFIG_CACHE_XSC3L2) += cache-xsc3l2.o
+ obj-$(CONFIG_CACHE_TAUROS2) += cache-tauros2.o
diff -Nur linux-3.14.54.orig/arch/arm/mm/proc-v7.S linux-3.14.54/arch/arm/mm/proc-v7.S
--- linux-3.14.54.orig/arch/arm/mm/proc-v7.S 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm/mm/proc-v7.S 2015-10-12 10:56:17.914351171 +0200
++++ linux-3.14.54/arch/arm/mm/proc-v7.S 2015-10-15 15:51:24.512704008 +0200
@@ -334,6 +334,17 @@
mcrlt p15, 0, r10, c15, c0, 1 @ write diagnostic register
1:
@@ -35076,673 +33857,9 @@ diff -Nur linux-3.14.54.orig/arch/arm/mm/proc-v7.S linux-3.14.54/arch/arm/mm/pro
/* Cortex-A15 Errata */
3: ldr r10, =0x00000c0f @ Cortex-A15 primary part number
-diff -Nur linux-3.14.54.orig/arch/arm64/Kconfig linux-3.14.54/arch/arm64/Kconfig
---- linux-3.14.54.orig/arch/arm64/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/Kconfig 2015-10-12 10:56:17.926351170 +0200
-@@ -4,6 +4,7 @@
- select ARCH_USE_CMPXCHG_LOCKREF
- select ARCH_SUPPORTS_ATOMIC_RMW
- select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
-+ select ARCH_HAS_OPP
- select ARCH_WANT_OPTIONAL_GPIOLIB
- select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
- select ARCH_WANT_FRAME_POINTERS
-@@ -17,6 +18,7 @@
- select DCACHE_WORD_ACCESS
- select GENERIC_CLOCKEVENTS
- select GENERIC_CLOCKEVENTS_BROADCAST if SMP
-+ select GENERIC_CPU_AUTOPROBE
- select GENERIC_IOMAP
- select GENERIC_IRQ_PROBE
- select GENERIC_IRQ_SHOW
-@@ -27,18 +29,27 @@
- select GENERIC_TIME_VSYSCALL
- select HARDIRQS_SW_RESEND
- select HAVE_ARCH_JUMP_LABEL
-+ select HAVE_ARCH_KGDB
- select HAVE_ARCH_TRACEHOOK
-+ select HAVE_C_RECORDMCOUNT
- select HAVE_DEBUG_BUGVERBOSE
- select HAVE_DEBUG_KMEMLEAK
- select HAVE_DMA_API_DEBUG
- select HAVE_DMA_ATTRS
- select HAVE_DMA_CONTIGUOUS
- select HAVE_EFFICIENT_UNALIGNED_ACCESS
-+ select HAVE_DYNAMIC_FTRACE
-+ select HAVE_FTRACE_MCOUNT_RECORD
-+ select HAVE_FUNCTION_TRACER
-+ select HAVE_FUNCTION_GRAPH_TRACER
- select HAVE_GENERIC_DMA_COHERENT
- select HAVE_HW_BREAKPOINT if PERF_EVENTS
- select HAVE_MEMBLOCK
- select HAVE_PATA_PLATFORM
- select HAVE_PERF_EVENTS
-+ select HAVE_PERF_REGS
-+ select HAVE_PERF_USER_STACK_DUMP
-+ select HAVE_SYSCALL_TRACEPOINTS
- select IRQ_DOMAIN
- select MODULES_USE_ELF_RELA
- select NO_BOOTMEM
-@@ -90,7 +101,7 @@
- config GENERIC_CALIBRATE_DELAY
- def_bool y
-
--config ZONE_DMA32
-+config ZONE_DMA
- def_bool y
-
- config ARCH_DMA_ADDR_T_64BIT
-@@ -169,6 +180,134 @@
-
- If you don't know what to do here, say N.
-
-+config SCHED_MC
-+ bool "Multi-core scheduler support"
-+ depends on SMP
-+ help
-+ Multi-core scheduler support improves the CPU scheduler's decision
-+ making when dealing with multi-core CPU chips at a cost of slightly
-+ increased overhead in some places. If unsure say N here.
-+
-+config SCHED_SMT
-+ bool "SMT scheduler support"
-+ depends on SMP
-+ help
-+ Improves the CPU scheduler's decision making when dealing with
-+ MultiThreading at a cost of slightly increased overhead in some
-+ places. If unsure say N here.
-+
-+config SCHED_MC
-+ bool "Multi-core scheduler support"
-+ depends on ARM_CPU_TOPOLOGY
-+ help
-+ Multi-core scheduler support improves the CPU scheduler's decision
-+ making when dealing with multi-core CPU chips at a cost of slightly
-+ increased overhead in some places. If unsure say N here.
-+
-+config SCHED_SMT
-+ bool "SMT scheduler support"
-+ depends on ARM_CPU_TOPOLOGY
-+ help
-+ Improves the CPU scheduler's decision making when dealing with
-+ MultiThreading at a cost of slightly increased overhead in some
-+ places. If unsure say N here.
-+
-+config DISABLE_CPU_SCHED_DOMAIN_BALANCE
-+ bool "(EXPERIMENTAL) Disable CPU level scheduler load-balancing"
-+ help
-+ Disables scheduler load-balancing at CPU sched domain level.
-+
-+config SCHED_HMP
-+ bool "(EXPERIMENTAL) Heterogenous multiprocessor scheduling"
-+ depends on DISABLE_CPU_SCHED_DOMAIN_BALANCE && SCHED_MC && FAIR_GROUP_SCHED && !SCHED_AUTOGROUP
-+ help
-+ Experimental scheduler optimizations for heterogeneous platforms.
-+ Attempts to introspectively select task affinity to optimize power
-+ and performance. Basic support for multiple (>2) cpu types is in place,
-+ but it has only been tested with two types of cpus.
-+ There is currently no support for migration of task groups, hence
-+ !SCHED_AUTOGROUP. Furthermore, normal load-balancing must be disabled
-+ between cpus of different type (DISABLE_CPU_SCHED_DOMAIN_BALANCE).
-+
-+config SCHED_HMP_PRIO_FILTER
-+ bool "(EXPERIMENTAL) Filter HMP migrations by task priority"
-+ depends on SCHED_HMP
-+ help
-+ Enables task priority based HMP migration filter. Any task with
-+ a NICE value above the threshold will always be on low-power cpus
-+ with less compute capacity.
-+
-+config SCHED_HMP_PRIO_FILTER_VAL
-+ int "NICE priority threshold"
-+ default 5
-+ depends on SCHED_HMP_PRIO_FILTER
-+
-+config HMP_FAST_CPU_MASK
-+ string "HMP scheduler fast CPU mask"
-+ depends on SCHED_HMP
-+ help
-+ Leave empty to use device tree information.
-+ Specify the cpuids of the fast CPUs in the system as a list string,
-+ e.g. cpuid 0+1 should be specified as 0-1.
-+
-+config HMP_SLOW_CPU_MASK
-+ string "HMP scheduler slow CPU mask"
-+ depends on SCHED_HMP
-+ help
-+ Leave empty to use device tree information.
-+ Specify the cpuids of the slow CPUs in the system as a list string,
-+ e.g. cpuid 0+1 should be specified as 0-1.
-+
-+config HMP_VARIABLE_SCALE
-+ bool "Allows changing the load tracking scale through sysfs"
-+ depends on SCHED_HMP
-+ help
-+ When turned on, this option exports the thresholds and load average
-+ period value for the load tracking patches through sysfs.
-+ The values can be modified to change the rate of load accumulation
-+ and the thresholds used for HMP migration.
-+ The load_avg_period_ms is the time in ms to reach a load average of
-+ 0.5 for an idle task of 0 load average ratio that start a busy loop.
-+ The up_threshold and down_threshold is the value to go to a faster
-+ CPU or to go back to a slower cpu.
-+ The {up,down}_threshold are devided by 1024 before being compared
-+ to the load average.
-+ For examples, with load_avg_period_ms = 128 and up_threshold = 512,
-+ a running task with a load of 0 will be migrated to a bigger CPU after
-+ 128ms, because after 128ms its load_avg_ratio is 0.5 and the real
-+ up_threshold is 0.5.
-+ This patch has the same behavior as changing the Y of the load
-+ average computation to
-+ (1002/1024)^(LOAD_AVG_PERIOD/load_avg_period_ms)
-+ but it remove intermadiate overflows in computation.
-+
-+config HMP_FREQUENCY_INVARIANT_SCALE
-+ bool "(EXPERIMENTAL) Frequency-Invariant Tracked Load for HMP"
-+ depends on HMP_VARIABLE_SCALE && CPU_FREQ
-+ help
-+ Scales the current load contribution in line with the frequency
-+ of the CPU that the task was executed on.
-+ In this version, we use a simple linear scale derived from the
-+ maximum frequency reported by CPUFreq.
-+ Restricting tracked load to be scaled by the CPU's frequency
-+ represents the consumption of possible compute capacity
-+ (rather than consumption of actual instantaneous capacity as
-+ normal) and allows the HMP migration's simple threshold
-+ migration strategy to interact more predictably with CPUFreq's
-+ asynchronous compute capacity changes.
-+
-+config SCHED_HMP_LITTLE_PACKING
-+ bool "Small task packing for HMP"
-+ depends on SCHED_HMP
-+ default n
-+ help
-+ Allows the HMP Scheduler to pack small tasks into CPUs in the
-+ smallest HMP domain.
-+ Controlled by two sysfs files in sys/kernel/hmp.
-+ packing_enable: 1 to enable, 0 to disable packing. Default 1.
-+ packing_limit: runqueue load ratio where a RQ is considered
-+ to be full. Default is NICE_0_LOAD * 9/8.
-+
- config NR_CPUS
- int "Maximum number of CPUs (2-32)"
- range 2 32
-@@ -337,5 +476,8 @@
- source "security/Kconfig"
-
- source "crypto/Kconfig"
-+if CRYPTO
-+source "arch/arm64/crypto/Kconfig"
-+endif
-
- source "lib/Kconfig"
-diff -Nur linux-3.14.54.orig/arch/arm64/Kconfig.orig linux-3.14.54/arch/arm64/Kconfig.orig
---- linux-3.14.54.orig/arch/arm64/Kconfig.orig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/Kconfig.orig 2015-10-01 11:36:53.000000000 +0200
-@@ -0,0 +1,341 @@
-+config ARM64
-+ def_bool y
-+ select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
-+ select ARCH_USE_CMPXCHG_LOCKREF
-+ select ARCH_SUPPORTS_ATOMIC_RMW
-+ select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
-+ select ARCH_WANT_OPTIONAL_GPIOLIB
-+ select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
-+ select ARCH_WANT_FRAME_POINTERS
-+ select ARM_AMBA
-+ select ARM_ARCH_TIMER
-+ select ARM_GIC
-+ select BUILDTIME_EXTABLE_SORT
-+ select CLONE_BACKWARDS
-+ select COMMON_CLK
-+ select CPU_PM if (SUSPEND || CPU_IDLE)
-+ select DCACHE_WORD_ACCESS
-+ select GENERIC_CLOCKEVENTS
-+ select GENERIC_CLOCKEVENTS_BROADCAST if SMP
-+ select GENERIC_IOMAP
-+ select GENERIC_IRQ_PROBE
-+ select GENERIC_IRQ_SHOW
-+ select GENERIC_SCHED_CLOCK
-+ select GENERIC_SMP_IDLE_THREAD
-+ select GENERIC_STRNCPY_FROM_USER
-+ select GENERIC_STRNLEN_USER
-+ select GENERIC_TIME_VSYSCALL
-+ select HARDIRQS_SW_RESEND
-+ select HAVE_ARCH_JUMP_LABEL
-+ select HAVE_ARCH_TRACEHOOK
-+ select HAVE_DEBUG_BUGVERBOSE
-+ select HAVE_DEBUG_KMEMLEAK
-+ select HAVE_DMA_API_DEBUG
-+ select HAVE_DMA_ATTRS
-+ select HAVE_DMA_CONTIGUOUS
-+ select HAVE_EFFICIENT_UNALIGNED_ACCESS
-+ select HAVE_GENERIC_DMA_COHERENT
-+ select HAVE_HW_BREAKPOINT if PERF_EVENTS
-+ select HAVE_MEMBLOCK
-+ select HAVE_PATA_PLATFORM
-+ select HAVE_PERF_EVENTS
-+ select IRQ_DOMAIN
-+ select MODULES_USE_ELF_RELA
-+ select NO_BOOTMEM
-+ select OF
-+ select OF_EARLY_FLATTREE
-+ select PERF_USE_VMALLOC
-+ select POWER_RESET
-+ select POWER_SUPPLY
-+ select RTC_LIB
-+ select SPARSE_IRQ
-+ select SYSCTL_EXCEPTION_TRACE
-+ help
-+ ARM 64-bit (AArch64) Linux support.
-+
-+config 64BIT
-+ def_bool y
-+
-+config ARCH_PHYS_ADDR_T_64BIT
-+ def_bool y
-+
-+config MMU
-+ def_bool y
-+
-+config NO_IOPORT
-+ def_bool y
-+
-+config STACKTRACE_SUPPORT
-+ def_bool y
-+
-+config ILLEGAL_POINTER_VALUE
-+ hex
-+ default 0xdead000000000000
-+
-+config LOCKDEP_SUPPORT
-+ def_bool y
-+
-+config TRACE_IRQFLAGS_SUPPORT
-+ def_bool y
-+
-+config RWSEM_GENERIC_SPINLOCK
-+ def_bool y
-+
-+config GENERIC_HWEIGHT
-+ def_bool y
-+
-+config GENERIC_CSUM
-+ def_bool y
-+
-+config GENERIC_CALIBRATE_DELAY
-+ def_bool y
-+
-+config ZONE_DMA32
-+ def_bool y
-+
-+config ARCH_DMA_ADDR_T_64BIT
-+ def_bool y
-+
-+config NEED_DMA_MAP_STATE
-+ def_bool y
-+
-+config NEED_SG_DMA_LENGTH
-+ def_bool y
-+
-+config SWIOTLB
-+ def_bool y
-+
-+config IOMMU_HELPER
-+ def_bool SWIOTLB
-+
-+config KERNEL_MODE_NEON
-+ def_bool y
-+
-+source "init/Kconfig"
-+
-+source "kernel/Kconfig.freezer"
-+
-+menu "Platform selection"
-+
-+config ARCH_VEXPRESS
-+ bool "ARMv8 software model (Versatile Express)"
-+ select ARCH_REQUIRE_GPIOLIB
-+ select COMMON_CLK_VERSATILE
-+ select POWER_RESET_VEXPRESS
-+ select VEXPRESS_CONFIG
-+ help
-+ This enables support for the ARMv8 software model (Versatile
-+ Express).
-+
-+config ARCH_XGENE
-+ bool "AppliedMicro X-Gene SOC Family"
-+ help
-+ This enables support for AppliedMicro X-Gene SOC Family
-+
-+endmenu
-+
-+menu "Bus support"
-+
-+config ARM_AMBA
-+ bool
-+
-+endmenu
-+
-+menu "Kernel Features"
-+
-+config ARM64_64K_PAGES
-+ bool "Enable 64KB pages support"
-+ help
-+ This feature enables 64KB pages support (4KB by default)
-+ allowing only two levels of page tables and faster TLB
-+ look-up. AArch32 emulation is not available when this feature
-+ is enabled.
-+
-+config CPU_BIG_ENDIAN
-+ bool "Build big-endian kernel"
-+ help
-+ Say Y if you plan on running a kernel in big-endian mode.
-+
-+config SMP
-+ bool "Symmetric Multi-Processing"
-+ help
-+ This enables support for systems with more than one CPU. If
-+ you say N here, the kernel will run on single and
-+ multiprocessor machines, but will use only one CPU of a
-+ multiprocessor machine. If you say Y here, the kernel will run
-+ on many, but not all, single processor machines. On a single
-+ processor machine, the kernel will run faster if you say N
-+ here.
-+
-+ If you don't know what to do here, say N.
-+
-+config NR_CPUS
-+ int "Maximum number of CPUs (2-32)"
-+ range 2 32
-+ depends on SMP
-+ # These have to remain sorted largest to smallest
-+ default "8"
-+
-+config HOTPLUG_CPU
-+ bool "Support for hot-pluggable CPUs"
-+ depends on SMP
-+ help
-+ Say Y here to experiment with turning CPUs off and on. CPUs
-+ can be controlled through /sys/devices/system/cpu.
-+
-+source kernel/Kconfig.preempt
-+
-+config HZ
-+ int
-+ default 100
-+
-+config ARCH_HAS_HOLES_MEMORYMODEL
-+ def_bool y if SPARSEMEM
-+
-+config ARCH_SPARSEMEM_ENABLE
-+ def_bool y
-+ select SPARSEMEM_VMEMMAP_ENABLE
-+
-+config ARCH_SPARSEMEM_DEFAULT
-+ def_bool ARCH_SPARSEMEM_ENABLE
-+
-+config ARCH_SELECT_MEMORY_MODEL
-+ def_bool ARCH_SPARSEMEM_ENABLE
-+
-+config HAVE_ARCH_PFN_VALID
-+ def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
-+
-+config HW_PERF_EVENTS
-+ bool "Enable hardware performance counter support for perf events"
-+ depends on PERF_EVENTS
-+ default y
-+ help
-+ Enable hardware performance counter support for perf events. If
-+ disabled, perf events will use software events only.
-+
-+config SYS_SUPPORTS_HUGETLBFS
-+ def_bool y
-+
-+config ARCH_WANT_GENERAL_HUGETLB
-+ def_bool y
-+
-+config ARCH_WANT_HUGE_PMD_SHARE
-+ def_bool y if !ARM64_64K_PAGES
-+
-+config HAVE_ARCH_TRANSPARENT_HUGEPAGE
-+ def_bool y
-+
-+source "mm/Kconfig"
-+
-+config XEN_DOM0
-+ def_bool y
-+ depends on XEN
-+
-+config XEN
-+ bool "Xen guest support on ARM64 (EXPERIMENTAL)"
-+ depends on ARM64 && OF
-+ select SWIOTLB_XEN
-+ help
-+ Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
-+
-+config FORCE_MAX_ZONEORDER
-+ int
-+ default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
-+ default "11"
-+
-+endmenu
-+
-+menu "Boot options"
-+
-+config CMDLINE
-+ string "Default kernel command string"
-+ default ""
-+ help
-+ Provide a set of default command-line options at build time by
-+ entering them here. As a minimum, you should specify the the
-+ root device (e.g. root=/dev/nfs).
-+
-+config CMDLINE_FORCE
-+ bool "Always use the default kernel command string"
-+ help
-+ Always use the default kernel command string, even if the boot
-+ loader passes other arguments to the kernel.
-+ This is useful if you cannot or don't want to change the
-+ command-line options your boot loader passes to the kernel.
-+
-+endmenu
-+
-+menu "Userspace binary formats"
-+
-+source "fs/Kconfig.binfmt"
-+
-+config COMPAT
-+ bool "Kernel support for 32-bit EL0"
-+ depends on !ARM64_64K_PAGES
-+ select COMPAT_BINFMT_ELF
-+ select HAVE_UID16
-+ select OLD_SIGSUSPEND3
-+ select COMPAT_OLD_SIGACTION
-+ help
-+ This option enables support for a 32-bit EL0 running under a 64-bit
-+ kernel at EL1. AArch32-specific components such as system calls,
-+ the user helper functions, VFP support and the ptrace interface are
-+ handled appropriately by the kernel.
-+
-+ If you want to execute 32-bit userspace applications, say Y.
-+
-+config SYSVIPC_COMPAT
-+ def_bool y
-+ depends on COMPAT && SYSVIPC
-+
-+endmenu
-+
-+menu "Power management options"
-+
-+source "kernel/power/Kconfig"
-+
-+config ARCH_SUSPEND_POSSIBLE
-+ def_bool y
-+
-+config ARM64_CPU_SUSPEND
-+ def_bool PM_SLEEP
-+
-+endmenu
-+
-+menu "CPU Power Management"
-+
-+source "drivers/cpuidle/Kconfig"
-+
-+config ARM64_ERRATUM_843419
-+ bool "Cortex-A53: 843419: A load or store might access an incorrect address"
-+ depends on MODULES
-+ default y
-+ help
-+ This option builds kernel modules using the large memory model in
-+ order to avoid the use of the ADRP instruction, which can cause
-+ a subsequent memory access to use an incorrect address on Cortex-A53
-+ parts up to r0p4.
-+
-+ Note that the kernel itself must be linked with a version of ld
-+ which fixes potentially affected ADRP instructions through the
-+ use of veneers.
-+
-+ If unsure, say Y.
-+
-+endmenu
-+
-+source "net/Kconfig"
-+
-+source "drivers/Kconfig"
-+
-+source "fs/Kconfig"
-+
-+source "arch/arm64/kvm/Kconfig"
-+
-+source "arch/arm64/Kconfig.debug"
-+
-+source "security/Kconfig"
-+
-+source "crypto/Kconfig"
-+
-+source "lib/Kconfig"
-diff -Nur linux-3.14.54.orig/arch/arm64/Makefile linux-3.14.54/arch/arm64/Makefile
---- linux-3.14.54.orig/arch/arm64/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/Makefile 2015-10-12 10:56:17.934351169 +0200
-@@ -49,6 +49,7 @@
- core-y += arch/arm64/kernel/ arch/arm64/mm/
- core-$(CONFIG_KVM) += arch/arm64/kvm/
- core-$(CONFIG_XEN) += arch/arm64/xen/
-+core-$(CONFIG_CRYPTO) += arch/arm64/crypto/
- libs-y := arch/arm64/lib/ $(libs-y)
- libs-y += $(LIBGCC)
-
-diff -Nur linux-3.14.54.orig/arch/arm64/Makefile.orig linux-3.14.54/arch/arm64/Makefile.orig
---- linux-3.14.54.orig/arch/arm64/Makefile.orig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/Makefile.orig 2015-10-01 11:36:53.000000000 +0200
-@@ -0,0 +1,92 @@
-+#
-+# arch/arm64/Makefile
-+#
-+# This file is included by the global makefile so that you can add your own
-+# architecture-specific flags and dependencies.
-+#
-+# This file is subject to the terms and conditions of the GNU General Public
-+# License. See the file "COPYING" in the main directory of this archive
-+# for more details.
-+#
-+# Copyright (C) 1995-2001 by Russell King
-+
-+LDFLAGS_vmlinux :=-p --no-undefined -X
-+CPPFLAGS_vmlinux.lds = -DTEXT_OFFSET=$(TEXT_OFFSET)
-+OBJCOPYFLAGS :=-O binary -R .note -R .note.gnu.build-id -R .comment -S
-+GZFLAGS :=-9
-+
-+LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
-+
-+KBUILD_DEFCONFIG := defconfig
-+
-+KBUILD_CFLAGS += -mgeneral-regs-only
-+ifeq ($(CONFIG_CPU_BIG_ENDIAN), y)
-+KBUILD_CPPFLAGS += -mbig-endian
-+AS += -EB
-+LD += -EB
-+else
-+KBUILD_CPPFLAGS += -mlittle-endian
-+AS += -EL
-+LD += -EL
-+endif
-+
-+comma = ,
-+
-+CHECKFLAGS += -D__aarch64__
-+
-+ifeq ($(CONFIG_ARM64_ERRATUM_843419), y)
-+CFLAGS_MODULE += -mcmodel=large
-+endif
-+
-+# Default value
-+head-y := arch/arm64/kernel/head.o
-+
-+# The byte offset of the kernel image in RAM from the start of RAM.
-+TEXT_OFFSET := 0x00080000
-+
-+export TEXT_OFFSET GZFLAGS
-+
-+core-y += arch/arm64/kernel/ arch/arm64/mm/
-+core-$(CONFIG_KVM) += arch/arm64/kvm/
-+core-$(CONFIG_XEN) += arch/arm64/xen/
-+libs-y := arch/arm64/lib/ $(libs-y)
-+libs-y += $(LIBGCC)
-+
-+# Default target when executing plain make
-+KBUILD_IMAGE := Image.gz
-+KBUILD_DTBS := dtbs
-+
-+all: $(KBUILD_IMAGE) $(KBUILD_DTBS)
-+
-+boot := arch/arm64/boot
-+
-+Image Image.gz: vmlinux
-+ $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
-+
-+zinstall install: vmlinux
-+ $(Q)$(MAKE) $(build)=$(boot) $@
-+
-+%.dtb: scripts
-+ $(Q)$(MAKE) $(build)=$(boot)/dts $(boot)/dts/$@
-+
-+dtbs: scripts
-+ $(Q)$(MAKE) $(build)=$(boot)/dts dtbs
-+
-+PHONY += vdso_install
-+vdso_install:
-+ $(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso $@
-+
-+# We use MRPROPER_FILES and CLEAN_FILES now
-+archclean:
-+ $(Q)$(MAKE) $(clean)=$(boot)
-+
-+define archhelp
-+ echo '* Image.gz - Compressed kernel image (arch/$(ARCH)/boot/Image.gz)'
-+ echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)'
-+ echo '* dtbs - Build device tree blobs for enabled boards'
-+ echo ' install - Install uncompressed kernel'
-+ echo ' zinstall - Install compressed kernel'
-+ echo ' Install using (your) ~/bin/installkernel or'
-+ echo ' (distribution) /sbin/installkernel or'
-+ echo ' install to $$(INSTALL_PATH) and run lilo'
-+endef
-diff -Nur linux-3.14.54.orig/arch/arm64/boot/dts/Makefile linux-3.14.54/arch/arm64/boot/dts/Makefile
---- linux-3.14.54.orig/arch/arm64/boot/dts/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/boot/dts/Makefile 2015-10-12 10:56:17.916351171 +0200
-@@ -1,5 +1,7 @@
--dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb foundation-v8.dtb
-+dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb foundation-v8.dtb \
-+ fvp-base-gicv2-psci.dtb
- dtb-$(CONFIG_ARCH_XGENE) += apm-mustang.dtb
-+dtb-$(CONFIG_ARCH_VEXPRESS) += juno.dtb
-
- targets += dtbs
- targets += $(dtb-y)
diff -Nur linux-3.14.54.orig/arch/arm64/boot/dts/apm-mustang.dts linux-3.14.54/arch/arm64/boot/dts/apm-mustang.dts
--- linux-3.14.54.orig/arch/arm64/boot/dts/apm-mustang.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/boot/dts/apm-mustang.dts 2015-10-12 10:56:17.915351171 +0200
++++ linux-3.14.54/arch/arm64/boot/dts/apm-mustang.dts 2015-10-15 15:51:24.512704008 +0200
@@ -24,3 +24,7 @@
reg = < 0x1 0x00000000 0x0 0x80000000 >; /* Updated by bootloader */
};
@@ -35753,7 +33870,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/boot/dts/apm-mustang.dts linux-3.14.54/a
+};
diff -Nur linux-3.14.54.orig/arch/arm64/boot/dts/apm-storm.dtsi linux-3.14.54/arch/arm64/boot/dts/apm-storm.dtsi
--- linux-3.14.54.orig/arch/arm64/boot/dts/apm-storm.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/boot/dts/apm-storm.dtsi 2015-10-12 10:56:17.915351171 +0200
++++ linux-3.14.54/arch/arm64/boot/dts/apm-storm.dtsi 2015-10-15 15:51:24.512704008 +0200
@@ -176,16 +176,226 @@
reg-names = "csr-reg";
clock-output-names = "eth8clk";
@@ -35984,7 +34101,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/boot/dts/apm-storm.dtsi linux-3.14.54/ar
};
diff -Nur linux-3.14.54.orig/arch/arm64/boot/dts/clcd-panels.dtsi linux-3.14.54/arch/arm64/boot/dts/clcd-panels.dtsi
--- linux-3.14.54.orig/arch/arm64/boot/dts/clcd-panels.dtsi 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/boot/dts/clcd-panels.dtsi 2015-10-12 10:56:17.916351171 +0200
++++ linux-3.14.54/arch/arm64/boot/dts/clcd-panels.dtsi 2015-10-15 15:51:24.512704008 +0200
@@ -0,0 +1,52 @@
+/*
+ * ARM Ltd. Versatile Express
@@ -36040,7 +34157,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/boot/dts/clcd-panels.dtsi linux-3.14.54/
+};
diff -Nur linux-3.14.54.orig/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts linux-3.14.54/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts
--- linux-3.14.54.orig/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts 2015-10-12 10:56:17.916351171 +0200
++++ linux-3.14.54/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts 2015-10-15 15:51:24.512704008 +0200
@@ -0,0 +1,266 @@
+/*
+ * Copyright (c) 2013, ARM Limited. All rights reserved.
@@ -36310,7 +34427,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts linux-3
+/include/ "clcd-panels.dtsi"
diff -Nur linux-3.14.54.orig/arch/arm64/boot/dts/juno.dts linux-3.14.54/arch/arm64/boot/dts/juno.dts
--- linux-3.14.54.orig/arch/arm64/boot/dts/juno.dts 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/boot/dts/juno.dts 2015-10-12 10:56:17.916351171 +0200
++++ linux-3.14.54/arch/arm64/boot/dts/juno.dts 2015-10-15 15:51:24.512704008 +0200
@@ -0,0 +1,498 @@
+/*
+ * ARM Ltd. Juno Plaform
@@ -36810,9 +34927,21 @@ diff -Nur linux-3.14.54.orig/arch/arm64/boot/dts/juno.dts linux-3.14.54/arch/arm
+ };
+ };
+};
+diff -Nur linux-3.14.54.orig/arch/arm64/boot/dts/Makefile linux-3.14.54/arch/arm64/boot/dts/Makefile
+--- linux-3.14.54.orig/arch/arm64/boot/dts/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm64/boot/dts/Makefile 2015-10-15 15:51:24.512704008 +0200
+@@ -1,5 +1,7 @@
+-dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb foundation-v8.dtb
++dtb-$(CONFIG_ARCH_VEXPRESS) += rtsm_ve-aemv8a.dtb foundation-v8.dtb \
++ fvp-base-gicv2-psci.dtb
+ dtb-$(CONFIG_ARCH_XGENE) += apm-mustang.dtb
++dtb-$(CONFIG_ARCH_VEXPRESS) += juno.dtb
+
+ targets += dtbs
+ targets += $(dtb-y)
diff -Nur linux-3.14.54.orig/arch/arm64/boot/dts/rtsm_ve-aemv8a.dts linux-3.14.54/arch/arm64/boot/dts/rtsm_ve-aemv8a.dts
--- linux-3.14.54.orig/arch/arm64/boot/dts/rtsm_ve-aemv8a.dts 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/boot/dts/rtsm_ve-aemv8a.dts 2015-10-12 10:56:17.916351171 +0200
++++ linux-3.14.54/arch/arm64/boot/dts/rtsm_ve-aemv8a.dts 2015-10-15 15:51:24.512704008 +0200
@@ -157,3 +157,5 @@
/include/ "rtsm_ve-motherboard.dtsi"
};
@@ -36821,7 +34950,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/boot/dts/rtsm_ve-aemv8a.dts linux-3.14.5
+/include/ "clcd-panels.dtsi"
diff -Nur linux-3.14.54.orig/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi linux-3.14.54/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi
--- linux-3.14.54.orig/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi 2015-10-12 10:56:17.916351171 +0200
++++ linux-3.14.54/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi 2015-10-15 15:51:24.512704008 +0200
@@ -182,6 +182,9 @@
interrupts = <14>;
clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>;
@@ -36832,108 +34961,9 @@ diff -Nur linux-3.14.54.orig/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi linux-
};
virtio_block@0130000 {
-diff -Nur linux-3.14.54.orig/arch/arm64/crypto/Kconfig linux-3.14.54/arch/arm64/crypto/Kconfig
---- linux-3.14.54.orig/arch/arm64/crypto/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/crypto/Kconfig 2015-10-12 10:56:17.920351170 +0200
-@@ -0,0 +1,53 @@
-+
-+menuconfig ARM64_CRYPTO
-+ bool "ARM64 Accelerated Cryptographic Algorithms"
-+ depends on ARM64
-+ help
-+ Say Y here to choose from a selection of cryptographic algorithms
-+ implemented using ARM64 specific CPU features or instructions.
-+
-+if ARM64_CRYPTO
-+
-+config CRYPTO_SHA1_ARM64_CE
-+ tristate "SHA-1 digest algorithm (ARMv8 Crypto Extensions)"
-+ depends on ARM64 && KERNEL_MODE_NEON
-+ select CRYPTO_HASH
-+
-+config CRYPTO_SHA2_ARM64_CE
-+ tristate "SHA-224/SHA-256 digest algorithm (ARMv8 Crypto Extensions)"
-+ depends on ARM64 && KERNEL_MODE_NEON
-+ select CRYPTO_HASH
-+
-+config CRYPTO_GHASH_ARM64_CE
-+ tristate "GHASH (for GCM chaining mode) using ARMv8 Crypto Extensions"
-+ depends on ARM64 && KERNEL_MODE_NEON
-+ select CRYPTO_HASH
-+
-+config CRYPTO_AES_ARM64_CE
-+ tristate "AES core cipher using ARMv8 Crypto Extensions"
-+ depends on ARM64 && KERNEL_MODE_NEON
-+ select CRYPTO_ALGAPI
-+ select CRYPTO_AES
-+
-+config CRYPTO_AES_ARM64_CE_CCM
-+ tristate "AES in CCM mode using ARMv8 Crypto Extensions"
-+ depends on ARM64 && KERNEL_MODE_NEON
-+ select CRYPTO_ALGAPI
-+ select CRYPTO_AES
-+ select CRYPTO_AEAD
-+
-+config CRYPTO_AES_ARM64_CE_BLK
-+ tristate "AES in ECB/CBC/CTR/XTS modes using ARMv8 Crypto Extensions"
-+ depends on ARM64 && KERNEL_MODE_NEON
-+ select CRYPTO_BLKCIPHER
-+ select CRYPTO_AES
-+ select CRYPTO_ABLK_HELPER
-+
-+config CRYPTO_AES_ARM64_NEON_BLK
-+ tristate "AES in ECB/CBC/CTR/XTS modes using NEON instructions"
-+ depends on ARM64 && KERNEL_MODE_NEON
-+ select CRYPTO_BLKCIPHER
-+ select CRYPTO_AES
-+ select CRYPTO_ABLK_HELPER
-+
-+endif
-diff -Nur linux-3.14.54.orig/arch/arm64/crypto/Makefile linux-3.14.54/arch/arm64/crypto/Makefile
---- linux-3.14.54.orig/arch/arm64/crypto/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/crypto/Makefile 2015-10-12 10:56:17.920351170 +0200
-@@ -0,0 +1,38 @@
-+#
-+# linux/arch/arm64/crypto/Makefile
-+#
-+# Copyright (C) 2014 Linaro Ltd <ard.biesheuvel@linaro.org>
-+#
-+# This program is free software; you can redistribute it and/or modify
-+# it under the terms of the GNU General Public License version 2 as
-+# published by the Free Software Foundation.
-+#
-+
-+obj-$(CONFIG_CRYPTO_SHA1_ARM64_CE) += sha1-ce.o
-+sha1-ce-y := sha1-ce-glue.o sha1-ce-core.o
-+
-+obj-$(CONFIG_CRYPTO_SHA2_ARM64_CE) += sha2-ce.o
-+sha2-ce-y := sha2-ce-glue.o sha2-ce-core.o
-+
-+obj-$(CONFIG_CRYPTO_GHASH_ARM64_CE) += ghash-ce.o
-+ghash-ce-y := ghash-ce-glue.o ghash-ce-core.o
-+
-+obj-$(CONFIG_CRYPTO_AES_ARM64_CE) += aes-ce-cipher.o
-+CFLAGS_aes-ce-cipher.o += -march=armv8-a+crypto
-+
-+obj-$(CONFIG_CRYPTO_AES_ARM64_CE_CCM) += aes-ce-ccm.o
-+aes-ce-ccm-y := aes-ce-ccm-glue.o aes-ce-ccm-core.o
-+
-+obj-$(CONFIG_CRYPTO_AES_ARM64_CE_BLK) += aes-ce-blk.o
-+aes-ce-blk-y := aes-glue-ce.o aes-ce.o
-+
-+obj-$(CONFIG_CRYPTO_AES_ARM64_NEON_BLK) += aes-neon-blk.o
-+aes-neon-blk-y := aes-glue-neon.o aes-neon.o
-+
-+AFLAGS_aes-ce.o := -DINTERLEAVE=2 -DINTERLEAVE_INLINE
-+AFLAGS_aes-neon.o := -DINTERLEAVE=4
-+
-+CFLAGS_aes-glue-ce.o := -DUSE_V8_CRYPTO_EXTENSIONS
-+
-+$(obj)/aes-glue-%.o: $(src)/aes-glue.c FORCE
-+ $(call if_changed_dep,cc_o_c)
diff -Nur linux-3.14.54.orig/arch/arm64/crypto/aes-ce-ccm-core.S linux-3.14.54/arch/arm64/crypto/aes-ce-ccm-core.S
--- linux-3.14.54.orig/arch/arm64/crypto/aes-ce-ccm-core.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/crypto/aes-ce-ccm-core.S 2015-10-12 10:56:17.917351171 +0200
++++ linux-3.14.54/arch/arm64/crypto/aes-ce-ccm-core.S 2015-10-15 15:51:24.512704008 +0200
@@ -0,0 +1,222 @@
+/*
+ * aesce-ccm-core.S - AES-CCM transform for ARMv8 with Crypto Extensions
@@ -37159,7 +35189,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/crypto/aes-ce-ccm-core.S linux-3.14.54/a
+ENDPROC(ce_aes_ccm_decrypt)
diff -Nur linux-3.14.54.orig/arch/arm64/crypto/aes-ce-ccm-glue.c linux-3.14.54/arch/arm64/crypto/aes-ce-ccm-glue.c
--- linux-3.14.54.orig/arch/arm64/crypto/aes-ce-ccm-glue.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/crypto/aes-ce-ccm-glue.c 2015-10-12 10:56:17.917351171 +0200
++++ linux-3.14.54/arch/arm64/crypto/aes-ce-ccm-glue.c 2015-10-15 15:51:24.868680580 +0200
@@ -0,0 +1,297 @@
+/*
+ * aes-ccm-glue.c - AES-CCM transform for ARMv8 with Crypto Extensions
@@ -37460,7 +35490,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/crypto/aes-ce-ccm-glue.c linux-3.14.54/a
+MODULE_ALIAS("ccm(aes)");
diff -Nur linux-3.14.54.orig/arch/arm64/crypto/aes-ce-cipher.c linux-3.14.54/arch/arm64/crypto/aes-ce-cipher.c
--- linux-3.14.54.orig/arch/arm64/crypto/aes-ce-cipher.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/crypto/aes-ce-cipher.c 2015-10-12 10:56:17.918351171 +0200
++++ linux-3.14.54/arch/arm64/crypto/aes-ce-cipher.c 2015-10-15 15:51:24.868680580 +0200
@@ -0,0 +1,155 @@
+/*
+ * aes-ce-cipher.c - core AES cipher using ARMv8 Crypto Extensions
@@ -37619,7 +35649,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/crypto/aes-ce-cipher.c linux-3.14.54/arc
+module_exit(aes_mod_exit);
diff -Nur linux-3.14.54.orig/arch/arm64/crypto/aes-ce.S linux-3.14.54/arch/arm64/crypto/aes-ce.S
--- linux-3.14.54.orig/arch/arm64/crypto/aes-ce.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/crypto/aes-ce.S 2015-10-12 10:56:17.919351170 +0200
++++ linux-3.14.54/arch/arm64/crypto/aes-ce.S 2015-10-15 15:51:24.868680580 +0200
@@ -0,0 +1,133 @@
+/*
+ * linux/arch/arm64/crypto/aes-ce.S - AES cipher for ARMv8 with
@@ -37756,7 +35786,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/crypto/aes-ce.S linux-3.14.54/arch/arm64
+#include "aes-modes.S"
diff -Nur linux-3.14.54.orig/arch/arm64/crypto/aes-glue.c linux-3.14.54/arch/arm64/crypto/aes-glue.c
--- linux-3.14.54.orig/arch/arm64/crypto/aes-glue.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/crypto/aes-glue.c 2015-10-12 10:56:17.919351170 +0200
++++ linux-3.14.54/arch/arm64/crypto/aes-glue.c 2015-10-15 15:51:24.868680580 +0200
@@ -0,0 +1,446 @@
+/*
+ * linux/arch/arm64/crypto/aes-glue.c - wrapper code for ARMv8 AES
@@ -38206,7 +36236,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/crypto/aes-glue.c linux-3.14.54/arch/arm
+module_exit(aes_exit);
diff -Nur linux-3.14.54.orig/arch/arm64/crypto/aes-modes.S linux-3.14.54/arch/arm64/crypto/aes-modes.S
--- linux-3.14.54.orig/arch/arm64/crypto/aes-modes.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/crypto/aes-modes.S 2015-10-12 10:56:17.919351170 +0200
++++ linux-3.14.54/arch/arm64/crypto/aes-modes.S 2015-10-15 15:51:24.868680580 +0200
@@ -0,0 +1,532 @@
+/*
+ * linux/arch/arm64/crypto/aes-modes.S - chaining mode wrappers for AES
@@ -38742,7 +36772,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/crypto/aes-modes.S linux-3.14.54/arch/ar
+AES_ENDPROC(aes_xts_decrypt)
diff -Nur linux-3.14.54.orig/arch/arm64/crypto/aes-neon.S linux-3.14.54/arch/arm64/crypto/aes-neon.S
--- linux-3.14.54.orig/arch/arm64/crypto/aes-neon.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/crypto/aes-neon.S 2015-10-12 10:56:17.919351170 +0200
++++ linux-3.14.54/arch/arm64/crypto/aes-neon.S 2015-10-15 15:51:24.868680580 +0200
@@ -0,0 +1,382 @@
+/*
+ * linux/arch/arm64/crypto/aes-neon.S - AES cipher for ARMv8 NEON
@@ -39128,7 +37158,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/crypto/aes-neon.S linux-3.14.54/arch/arm
+ .byte 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d
diff -Nur linux-3.14.54.orig/arch/arm64/crypto/ghash-ce-core.S linux-3.14.54/arch/arm64/crypto/ghash-ce-core.S
--- linux-3.14.54.orig/arch/arm64/crypto/ghash-ce-core.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/crypto/ghash-ce-core.S 2015-10-12 10:56:17.919351170 +0200
++++ linux-3.14.54/arch/arm64/crypto/ghash-ce-core.S 2015-10-15 15:51:24.868680580 +0200
@@ -0,0 +1,79 @@
+/*
+ * Accelerated GHASH implementation with ARMv8 PMULL instructions.
@@ -39211,7 +37241,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/crypto/ghash-ce-core.S linux-3.14.54/arc
+ENDPROC(pmull_ghash_update)
diff -Nur linux-3.14.54.orig/arch/arm64/crypto/ghash-ce-glue.c linux-3.14.54/arch/arm64/crypto/ghash-ce-glue.c
--- linux-3.14.54.orig/arch/arm64/crypto/ghash-ce-glue.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/crypto/ghash-ce-glue.c 2015-10-12 10:56:17.920351170 +0200
++++ linux-3.14.54/arch/arm64/crypto/ghash-ce-glue.c 2015-10-15 15:51:24.868680580 +0200
@@ -0,0 +1,156 @@
+/*
+ * Accelerated GHASH implementation with ARMv8 PMULL instructions.
@@ -39369,9 +37399,108 @@ diff -Nur linux-3.14.54.orig/arch/arm64/crypto/ghash-ce-glue.c linux-3.14.54/arc
+
+module_cpu_feature_match(PMULL, ghash_ce_mod_init);
+module_exit(ghash_ce_mod_exit);
+diff -Nur linux-3.14.54.orig/arch/arm64/crypto/Kconfig linux-3.14.54/arch/arm64/crypto/Kconfig
+--- linux-3.14.54.orig/arch/arm64/crypto/Kconfig 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm64/crypto/Kconfig 2015-10-15 15:51:24.868680580 +0200
+@@ -0,0 +1,53 @@
++
++menuconfig ARM64_CRYPTO
++ bool "ARM64 Accelerated Cryptographic Algorithms"
++ depends on ARM64
++ help
++ Say Y here to choose from a selection of cryptographic algorithms
++ implemented using ARM64 specific CPU features or instructions.
++
++if ARM64_CRYPTO
++
++config CRYPTO_SHA1_ARM64_CE
++ tristate "SHA-1 digest algorithm (ARMv8 Crypto Extensions)"
++ depends on ARM64 && KERNEL_MODE_NEON
++ select CRYPTO_HASH
++
++config CRYPTO_SHA2_ARM64_CE
++ tristate "SHA-224/SHA-256 digest algorithm (ARMv8 Crypto Extensions)"
++ depends on ARM64 && KERNEL_MODE_NEON
++ select CRYPTO_HASH
++
++config CRYPTO_GHASH_ARM64_CE
++ tristate "GHASH (for GCM chaining mode) using ARMv8 Crypto Extensions"
++ depends on ARM64 && KERNEL_MODE_NEON
++ select CRYPTO_HASH
++
++config CRYPTO_AES_ARM64_CE
++ tristate "AES core cipher using ARMv8 Crypto Extensions"
++ depends on ARM64 && KERNEL_MODE_NEON
++ select CRYPTO_ALGAPI
++ select CRYPTO_AES
++
++config CRYPTO_AES_ARM64_CE_CCM
++ tristate "AES in CCM mode using ARMv8 Crypto Extensions"
++ depends on ARM64 && KERNEL_MODE_NEON
++ select CRYPTO_ALGAPI
++ select CRYPTO_AES
++ select CRYPTO_AEAD
++
++config CRYPTO_AES_ARM64_CE_BLK
++ tristate "AES in ECB/CBC/CTR/XTS modes using ARMv8 Crypto Extensions"
++ depends on ARM64 && KERNEL_MODE_NEON
++ select CRYPTO_BLKCIPHER
++ select CRYPTO_AES
++ select CRYPTO_ABLK_HELPER
++
++config CRYPTO_AES_ARM64_NEON_BLK
++ tristate "AES in ECB/CBC/CTR/XTS modes using NEON instructions"
++ depends on ARM64 && KERNEL_MODE_NEON
++ select CRYPTO_BLKCIPHER
++ select CRYPTO_AES
++ select CRYPTO_ABLK_HELPER
++
++endif
+diff -Nur linux-3.14.54.orig/arch/arm64/crypto/Makefile linux-3.14.54/arch/arm64/crypto/Makefile
+--- linux-3.14.54.orig/arch/arm64/crypto/Makefile 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm64/crypto/Makefile 2015-10-15 15:51:24.868680580 +0200
+@@ -0,0 +1,38 @@
++#
++# linux/arch/arm64/crypto/Makefile
++#
++# Copyright (C) 2014 Linaro Ltd <ard.biesheuvel@linaro.org>
++#
++# This program is free software; you can redistribute it and/or modify
++# it under the terms of the GNU General Public License version 2 as
++# published by the Free Software Foundation.
++#
++
++obj-$(CONFIG_CRYPTO_SHA1_ARM64_CE) += sha1-ce.o
++sha1-ce-y := sha1-ce-glue.o sha1-ce-core.o
++
++obj-$(CONFIG_CRYPTO_SHA2_ARM64_CE) += sha2-ce.o
++sha2-ce-y := sha2-ce-glue.o sha2-ce-core.o
++
++obj-$(CONFIG_CRYPTO_GHASH_ARM64_CE) += ghash-ce.o
++ghash-ce-y := ghash-ce-glue.o ghash-ce-core.o
++
++obj-$(CONFIG_CRYPTO_AES_ARM64_CE) += aes-ce-cipher.o
++CFLAGS_aes-ce-cipher.o += -march=armv8-a+crypto
++
++obj-$(CONFIG_CRYPTO_AES_ARM64_CE_CCM) += aes-ce-ccm.o
++aes-ce-ccm-y := aes-ce-ccm-glue.o aes-ce-ccm-core.o
++
++obj-$(CONFIG_CRYPTO_AES_ARM64_CE_BLK) += aes-ce-blk.o
++aes-ce-blk-y := aes-glue-ce.o aes-ce.o
++
++obj-$(CONFIG_CRYPTO_AES_ARM64_NEON_BLK) += aes-neon-blk.o
++aes-neon-blk-y := aes-glue-neon.o aes-neon.o
++
++AFLAGS_aes-ce.o := -DINTERLEAVE=2 -DINTERLEAVE_INLINE
++AFLAGS_aes-neon.o := -DINTERLEAVE=4
++
++CFLAGS_aes-glue-ce.o := -DUSE_V8_CRYPTO_EXTENSIONS
++
++$(obj)/aes-glue-%.o: $(src)/aes-glue.c FORCE
++ $(call if_changed_dep,cc_o_c)
diff -Nur linux-3.14.54.orig/arch/arm64/crypto/sha1-ce-core.S linux-3.14.54/arch/arm64/crypto/sha1-ce-core.S
--- linux-3.14.54.orig/arch/arm64/crypto/sha1-ce-core.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/crypto/sha1-ce-core.S 2015-10-12 10:56:17.920351170 +0200
++++ linux-3.14.54/arch/arm64/crypto/sha1-ce-core.S 2015-10-15 15:51:24.872680318 +0200
@@ -0,0 +1,153 @@
+/*
+ * sha1-ce-core.S - SHA-1 secure hash using ARMv8 Crypto Extensions
@@ -39528,7 +37657,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/crypto/sha1-ce-core.S linux-3.14.54/arch
+ENDPROC(sha1_ce_transform)
diff -Nur linux-3.14.54.orig/arch/arm64/crypto/sha1-ce-glue.c linux-3.14.54/arch/arm64/crypto/sha1-ce-glue.c
--- linux-3.14.54.orig/arch/arm64/crypto/sha1-ce-glue.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/crypto/sha1-ce-glue.c 2015-10-12 10:56:17.920351170 +0200
++++ linux-3.14.54/arch/arm64/crypto/sha1-ce-glue.c 2015-10-15 15:51:24.872680318 +0200
@@ -0,0 +1,174 @@
+/*
+ * sha1-ce-glue.c - SHA-1 secure hash using ARMv8 Crypto Extensions
@@ -39706,7 +37835,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/crypto/sha1-ce-glue.c linux-3.14.54/arch
+module_exit(sha1_ce_mod_fini);
diff -Nur linux-3.14.54.orig/arch/arm64/crypto/sha2-ce-core.S linux-3.14.54/arch/arm64/crypto/sha2-ce-core.S
--- linux-3.14.54.orig/arch/arm64/crypto/sha2-ce-core.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/crypto/sha2-ce-core.S 2015-10-12 10:56:17.921351170 +0200
++++ linux-3.14.54/arch/arm64/crypto/sha2-ce-core.S 2015-10-15 15:51:24.872680318 +0200
@@ -0,0 +1,156 @@
+/*
+ * sha2-ce-core.S - core SHA-224/SHA-256 transform using v8 Crypto Extensions
@@ -39866,7 +37995,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/crypto/sha2-ce-core.S linux-3.14.54/arch
+ENDPROC(sha2_ce_transform)
diff -Nur linux-3.14.54.orig/arch/arm64/crypto/sha2-ce-glue.c linux-3.14.54/arch/arm64/crypto/sha2-ce-glue.c
--- linux-3.14.54.orig/arch/arm64/crypto/sha2-ce-glue.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/crypto/sha2-ce-glue.c 2015-10-12 10:56:17.921351170 +0200
++++ linux-3.14.54/arch/arm64/crypto/sha2-ce-glue.c 2015-10-15 15:51:24.872680318 +0200
@@ -0,0 +1,255 @@
+/*
+ * sha2-ce-glue.c - SHA-224/SHA-256 using ARMv8 Crypto Extensions
@@ -40123,20 +38252,9 @@ diff -Nur linux-3.14.54.orig/arch/arm64/crypto/sha2-ce-glue.c linux-3.14.54/arch
+
+module_cpu_feature_match(SHA2, sha2_ce_mod_init);
+module_exit(sha2_ce_mod_fini);
-diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/Kbuild linux-3.14.54/arch/arm64/include/asm/Kbuild
---- linux-3.14.54.orig/arch/arm64/include/asm/Kbuild 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/include/asm/Kbuild 2015-10-12 10:56:17.923351170 +0200
-@@ -35,6 +35,7 @@
- generic-y += sembuf.h
- generic-y += serial.h
- generic-y += shmbuf.h
-+generic-y += simd.h
- generic-y += sizes.h
- generic-y += socket.h
- generic-y += sockios.h
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/bL_switcher.h linux-3.14.54/arch/arm64/include/asm/bL_switcher.h
--- linux-3.14.54.orig/arch/arm64/include/asm/bL_switcher.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/include/asm/bL_switcher.h 2015-10-12 10:56:17.921351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/bL_switcher.h 2015-10-15 15:51:24.872680318 +0200
@@ -0,0 +1,54 @@
+/*
+ * Based on the stubs for the ARM implementation which is:
@@ -40194,7 +38312,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/bL_switcher.h linux-3.14.54/
+#endif
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/cacheflush.h linux-3.14.54/arch/arm64/include/asm/cacheflush.h
--- linux-3.14.54.orig/arch/arm64/include/asm/cacheflush.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/include/asm/cacheflush.h 2015-10-12 10:56:17.921351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/cacheflush.h 2015-10-15 15:51:24.872680318 +0200
@@ -85,6 +85,13 @@
}
@@ -40211,7 +38329,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/cacheflush.h linux-3.14.54/a
* space" model to handle this.
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/compat.h linux-3.14.54/arch/arm64/include/asm/compat.h
--- linux-3.14.54.orig/arch/arm64/include/asm/compat.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/include/asm/compat.h 2015-10-12 10:56:17.922351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/compat.h 2015-10-15 15:51:24.872680318 +0200
@@ -228,7 +228,7 @@
return (u32)(unsigned long)uptr;
}
@@ -40235,7 +38353,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/compat.h linux-3.14.54/arch/
return 0;
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/cpufeature.h linux-3.14.54/arch/arm64/include/asm/cpufeature.h
--- linux-3.14.54.orig/arch/arm64/include/asm/cpufeature.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/include/asm/cpufeature.h 2015-10-12 10:56:17.922351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/cpufeature.h 2015-10-15 15:51:24.872680318 +0200
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
@@ -40268,7 +38386,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/cpufeature.h linux-3.14.54/a
+#endif
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/debug-monitors.h linux-3.14.54/arch/arm64/include/asm/debug-monitors.h
--- linux-3.14.54.orig/arch/arm64/include/asm/debug-monitors.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/include/asm/debug-monitors.h 2015-10-12 10:56:17.922351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/debug-monitors.h 2015-10-15 15:51:24.876680055 +0200
@@ -26,6 +26,53 @@
#define DBG_ESR_EVT_HWWP 0x2
#define DBG_ESR_EVT_BRK 0x6
@@ -40349,7 +38467,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/debug-monitors.h linux-3.14.
#define DBG_HOOK_HANDLED 0
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/dma-mapping.h linux-3.14.54/arch/arm64/include/asm/dma-mapping.h
--- linux-3.14.54.orig/arch/arm64/include/asm/dma-mapping.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/include/asm/dma-mapping.h 2015-10-12 10:56:17.923351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/dma-mapping.h 2015-10-15 15:51:24.876680055 +0200
@@ -28,6 +28,8 @@
#define DMA_ERROR_CODE (~(dma_addr_t)0)
@@ -40373,7 +38491,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/dma-mapping.h linux-3.14.54/
static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/ftrace.h linux-3.14.54/arch/arm64/include/asm/ftrace.h
--- linux-3.14.54.orig/arch/arm64/include/asm/ftrace.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/include/asm/ftrace.h 2015-10-12 10:56:17.923351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/ftrace.h 2015-10-15 15:51:24.876680055 +0200
@@ -0,0 +1,59 @@
+/*
+ * arch/arm64/include/asm/ftrace.h
@@ -40436,7 +38554,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/ftrace.h linux-3.14.54/arch/
+#endif /* __ASM_FTRACE_H */
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/hwcap.h linux-3.14.54/arch/arm64/include/asm/hwcap.h
--- linux-3.14.54.orig/arch/arm64/include/asm/hwcap.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/include/asm/hwcap.h 2015-10-12 10:56:17.923351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/hwcap.h 2015-10-15 15:51:24.876680055 +0200
@@ -33,6 +33,12 @@
#define COMPAT_HWCAP_LPAE (1 << 20)
#define COMPAT_HWCAP_EVTSTRM (1 << 21)
@@ -40462,7 +38580,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/hwcap.h linux-3.14.54/arch/a
extern unsigned long elf_hwcap;
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/insn.h linux-3.14.54/arch/arm64/include/asm/insn.h
--- linux-3.14.54.orig/arch/arm64/include/asm/insn.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/include/asm/insn.h 2015-10-12 10:56:17.923351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/insn.h 2015-10-15 15:51:24.876680055 +0200
@@ -16,11 +16,14 @@
*/
#ifndef __ASM_INSN_H
@@ -40487,7 +38605,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/insn.h linux-3.14.54/arch/ar
#endif /* __ASM_INSN_H */
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/irqflags.h linux-3.14.54/arch/arm64/include/asm/irqflags.h
--- linux-3.14.54.orig/arch/arm64/include/asm/irqflags.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/include/asm/irqflags.h 2015-10-12 10:56:17.923351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/irqflags.h 2015-10-15 15:51:24.876680055 +0200
@@ -90,5 +90,28 @@
return flags & PSR_I_BIT;
}
@@ -40517,9 +38635,20 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/irqflags.h linux-3.14.54/arc
+
#endif
#endif
+diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/Kbuild linux-3.14.54/arch/arm64/include/asm/Kbuild
+--- linux-3.14.54.orig/arch/arm64/include/asm/Kbuild 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm64/include/asm/Kbuild 2015-10-15 15:51:24.876680055 +0200
+@@ -35,6 +35,7 @@
+ generic-y += sembuf.h
+ generic-y += serial.h
+ generic-y += shmbuf.h
++generic-y += simd.h
+ generic-y += sizes.h
+ generic-y += socket.h
+ generic-y += sockios.h
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/kgdb.h linux-3.14.54/arch/arm64/include/asm/kgdb.h
--- linux-3.14.54.orig/arch/arm64/include/asm/kgdb.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/include/asm/kgdb.h 2015-10-12 10:56:17.923351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/kgdb.h 2015-10-15 15:51:24.876680055 +0200
@@ -0,0 +1,84 @@
+/*
+ * AArch64 KGDB support
@@ -40607,7 +38736,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/kgdb.h linux-3.14.54/arch/ar
+#endif /* __ASM_KGDB_H */
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/page.h linux-3.14.54/arch/arm64/include/asm/page.h
--- linux-3.14.54.orig/arch/arm64/include/asm/page.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/include/asm/page.h 2015-10-12 10:56:17.924351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/page.h 2015-10-15 15:51:24.876680055 +0200
@@ -31,6 +31,15 @@
/* We do define AT_SYSINFO_EHDR but don't use the gate mechanism */
#define __HAVE_ARCH_GATE_AREA 1
@@ -40626,7 +38755,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/page.h linux-3.14.54/arch/ar
#ifdef CONFIG_ARM64_64K_PAGES
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/pgtable.h linux-3.14.54/arch/arm64/include/asm/pgtable.h
--- linux-3.14.54.orig/arch/arm64/include/asm/pgtable.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/include/asm/pgtable.h 2015-10-12 10:56:17.924351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/pgtable.h 2015-10-15 15:51:24.876680055 +0200
@@ -227,36 +227,36 @@
#define __HAVE_ARCH_PTE_SPECIAL
@@ -40721,7 +38850,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/pgtable.h linux-3.14.54/arch
* bits 0-1: present (must be zero)
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/ptrace.h linux-3.14.54/arch/arm64/include/asm/ptrace.h
--- linux-3.14.54.orig/arch/arm64/include/asm/ptrace.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/include/asm/ptrace.h 2015-10-12 10:56:17.924351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/ptrace.h 2015-10-15 15:51:24.876680055 +0200
@@ -68,6 +68,7 @@
/* Architecturally defined mapping between AArch32 and AArch64 registers */
@@ -40755,7 +38884,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/ptrace.h linux-3.14.54/arch/
extern unsigned long profile_pc(struct pt_regs *regs);
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/syscall.h linux-3.14.54/arch/arm64/include/asm/syscall.h
--- linux-3.14.54.orig/arch/arm64/include/asm/syscall.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/include/asm/syscall.h 2015-10-12 10:56:17.925351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/syscall.h 2015-10-15 15:51:24.876680055 +0200
@@ -18,6 +18,7 @@
#include <linux/err.h>
@@ -40766,7 +38895,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/syscall.h linux-3.14.54/arch
struct pt_regs *regs)
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/thread_info.h linux-3.14.54/arch/arm64/include/asm/thread_info.h
--- linux-3.14.54.orig/arch/arm64/include/asm/thread_info.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/include/asm/thread_info.h 2015-10-12 10:56:17.925351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/thread_info.h 2015-10-15 15:51:24.876680055 +0200
@@ -91,6 +91,9 @@
/*
* thread information flags:
@@ -40807,7 +38936,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/thread_info.h linux-3.14.54/
#endif /* __ASM_THREAD_INFO_H */
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/topology.h linux-3.14.54/arch/arm64/include/asm/topology.h
--- linux-3.14.54.orig/arch/arm64/include/asm/topology.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/include/asm/topology.h 2015-10-12 10:56:17.925351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/topology.h 2015-10-15 15:51:24.876680055 +0200
@@ -0,0 +1,70 @@
+#ifndef __ASM_TOPOLOGY_H
+#define __ASM_TOPOLOGY_H
@@ -40881,7 +39010,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/topology.h linux-3.14.54/arc
+#endif /* _ASM_ARM_TOPOLOGY_H */
diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/unistd.h linux-3.14.54/arch/arm64/include/asm/unistd.h
--- linux-3.14.54.orig/arch/arm64/include/asm/unistd.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/include/asm/unistd.h 2015-10-12 10:56:17.925351170 +0200
++++ linux-3.14.54/arch/arm64/include/asm/unistd.h 2015-10-15 15:51:24.876680055 +0200
@@ -28,3 +28,5 @@
#endif
#define __ARCH_WANT_SYS_CLONE
@@ -40890,7 +39019,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/asm/unistd.h linux-3.14.54/arch/
+#define NR_syscalls (__NR_syscalls)
diff -Nur linux-3.14.54.orig/arch/arm64/include/uapi/asm/Kbuild linux-3.14.54/arch/arm64/include/uapi/asm/Kbuild
--- linux-3.14.54.orig/arch/arm64/include/uapi/asm/Kbuild 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/include/uapi/asm/Kbuild 2015-10-12 10:56:17.926351170 +0200
++++ linux-3.14.54/arch/arm64/include/uapi/asm/Kbuild 2015-10-15 15:51:24.876680055 +0200
@@ -9,6 +9,7 @@
header-y += fcntl.h
header-y += hwcap.h
@@ -40901,7 +39030,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/uapi/asm/Kbuild linux-3.14.54/ar
header-y += setup.h
diff -Nur linux-3.14.54.orig/arch/arm64/include/uapi/asm/perf_regs.h linux-3.14.54/arch/arm64/include/uapi/asm/perf_regs.h
--- linux-3.14.54.orig/arch/arm64/include/uapi/asm/perf_regs.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/include/uapi/asm/perf_regs.h 2015-10-12 10:56:17.926351170 +0200
++++ linux-3.14.54/arch/arm64/include/uapi/asm/perf_regs.h 2015-10-15 15:51:24.876680055 +0200
@@ -0,0 +1,40 @@
+#ifndef _ASM_ARM64_PERF_REGS_H
+#define _ASM_ARM64_PERF_REGS_H
@@ -40943,44 +39072,554 @@ diff -Nur linux-3.14.54.orig/arch/arm64/include/uapi/asm/perf_regs.h linux-3.14.
+ PERF_REG_ARM64_MAX,
+};
+#endif /* _ASM_ARM64_PERF_REGS_H */
-diff -Nur linux-3.14.54.orig/arch/arm64/kernel/Makefile linux-3.14.54/arch/arm64/kernel/Makefile
---- linux-3.14.54.orig/arch/arm64/kernel/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/kernel/Makefile 2015-10-12 10:56:17.929351170 +0200
-@@ -5,21 +5,29 @@
- CPPFLAGS_vmlinux.lds := -DTEXT_OFFSET=$(TEXT_OFFSET)
- AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET)
+diff -Nur linux-3.14.54.orig/arch/arm64/Kconfig linux-3.14.54/arch/arm64/Kconfig
+--- linux-3.14.54.orig/arch/arm64/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm64/Kconfig 2015-10-15 15:51:24.876680055 +0200
+@@ -4,6 +4,7 @@
+ select ARCH_USE_CMPXCHG_LOCKREF
+ select ARCH_SUPPORTS_ATOMIC_RMW
+ select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
++ select ARCH_HAS_OPP
+ select ARCH_WANT_OPTIONAL_GPIOLIB
+ select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
+ select ARCH_WANT_FRAME_POINTERS
+@@ -17,6 +18,7 @@
+ select DCACHE_WORD_ACCESS
+ select GENERIC_CLOCKEVENTS
+ select GENERIC_CLOCKEVENTS_BROADCAST if SMP
++ select GENERIC_CPU_AUTOPROBE
+ select GENERIC_IOMAP
+ select GENERIC_IRQ_PROBE
+ select GENERIC_IRQ_SHOW
+@@ -27,18 +29,27 @@
+ select GENERIC_TIME_VSYSCALL
+ select HARDIRQS_SW_RESEND
+ select HAVE_ARCH_JUMP_LABEL
++ select HAVE_ARCH_KGDB
+ select HAVE_ARCH_TRACEHOOK
++ select HAVE_C_RECORDMCOUNT
+ select HAVE_DEBUG_BUGVERBOSE
+ select HAVE_DEBUG_KMEMLEAK
+ select HAVE_DMA_API_DEBUG
+ select HAVE_DMA_ATTRS
+ select HAVE_DMA_CONTIGUOUS
+ select HAVE_EFFICIENT_UNALIGNED_ACCESS
++ select HAVE_DYNAMIC_FTRACE
++ select HAVE_FTRACE_MCOUNT_RECORD
++ select HAVE_FUNCTION_TRACER
++ select HAVE_FUNCTION_GRAPH_TRACER
+ select HAVE_GENERIC_DMA_COHERENT
+ select HAVE_HW_BREAKPOINT if PERF_EVENTS
+ select HAVE_MEMBLOCK
+ select HAVE_PATA_PLATFORM
+ select HAVE_PERF_EVENTS
++ select HAVE_PERF_REGS
++ select HAVE_PERF_USER_STACK_DUMP
++ select HAVE_SYSCALL_TRACEPOINTS
+ select IRQ_DOMAIN
+ select MODULES_USE_ELF_RELA
+ select NO_BOOTMEM
+@@ -90,7 +101,7 @@
+ config GENERIC_CALIBRATE_DELAY
+ def_bool y
-+CFLAGS_REMOVE_ftrace.o = -pg
-+CFLAGS_REMOVE_insn.o = -pg
-+CFLAGS_REMOVE_return_address.o = -pg
+-config ZONE_DMA32
++config ZONE_DMA
+ def_bool y
+
+ config ARCH_DMA_ADDR_T_64BIT
+@@ -169,6 +180,134 @@
+
+ If you don't know what to do here, say N.
+
++config SCHED_MC
++ bool "Multi-core scheduler support"
++ depends on SMP
++ help
++ Multi-core scheduler support improves the CPU scheduler's decision
++ making when dealing with multi-core CPU chips at a cost of slightly
++ increased overhead in some places. If unsure say N here.
+
- # Object file lists.
- arm64-obj-y := cputable.o debug-monitors.o entry.o irq.o fpsimd.o \
- entry-fpsimd.o process.o ptrace.o setup.o signal.o \
- sys.o stacktrace.o time.o traps.o io.o vdso.o \
-- hyp-stub.o psci.o cpu_ops.o insn.o
-+ hyp-stub.o psci.o cpu_ops.o insn.o return_address.o
++config SCHED_SMT
++ bool "SMT scheduler support"
++ depends on SMP
++ help
++ Improves the CPU scheduler's decision making when dealing with
++ MultiThreading at a cost of slightly increased overhead in some
++ places. If unsure say N here.
++
++config SCHED_MC
++ bool "Multi-core scheduler support"
++ depends on ARM_CPU_TOPOLOGY
++ help
++ Multi-core scheduler support improves the CPU scheduler's decision
++ making when dealing with multi-core CPU chips at a cost of slightly
++ increased overhead in some places. If unsure say N here.
++
++config SCHED_SMT
++ bool "SMT scheduler support"
++ depends on ARM_CPU_TOPOLOGY
++ help
++ Improves the CPU scheduler's decision making when dealing with
++ MultiThreading at a cost of slightly increased overhead in some
++ places. If unsure say N here.
++
++config DISABLE_CPU_SCHED_DOMAIN_BALANCE
++ bool "(EXPERIMENTAL) Disable CPU level scheduler load-balancing"
++ help
++ Disables scheduler load-balancing at CPU sched domain level.
++
++config SCHED_HMP
++ bool "(EXPERIMENTAL) Heterogenous multiprocessor scheduling"
++ depends on DISABLE_CPU_SCHED_DOMAIN_BALANCE && SCHED_MC && FAIR_GROUP_SCHED && !SCHED_AUTOGROUP
++ help
++ Experimental scheduler optimizations for heterogeneous platforms.
++ Attempts to introspectively select task affinity to optimize power
++ and performance. Basic support for multiple (>2) cpu types is in place,
++ but it has only been tested with two types of cpus.
++ There is currently no support for migration of task groups, hence
++ !SCHED_AUTOGROUP. Furthermore, normal load-balancing must be disabled
++ between cpus of different type (DISABLE_CPU_SCHED_DOMAIN_BALANCE).
++
++config SCHED_HMP_PRIO_FILTER
++ bool "(EXPERIMENTAL) Filter HMP migrations by task priority"
++ depends on SCHED_HMP
++ help
++ Enables task priority based HMP migration filter. Any task with
++ a NICE value above the threshold will always be on low-power cpus
++ with less compute capacity.
++
++config SCHED_HMP_PRIO_FILTER_VAL
++ int "NICE priority threshold"
++ default 5
++ depends on SCHED_HMP_PRIO_FILTER
++
++config HMP_FAST_CPU_MASK
++ string "HMP scheduler fast CPU mask"
++ depends on SCHED_HMP
++ help
++ Leave empty to use device tree information.
++ Specify the cpuids of the fast CPUs in the system as a list string,
++ e.g. cpuid 0+1 should be specified as 0-1.
++
++config HMP_SLOW_CPU_MASK
++ string "HMP scheduler slow CPU mask"
++ depends on SCHED_HMP
++ help
++ Leave empty to use device tree information.
++ Specify the cpuids of the slow CPUs in the system as a list string,
++ e.g. cpuid 0+1 should be specified as 0-1.
++
++config HMP_VARIABLE_SCALE
++ bool "Allows changing the load tracking scale through sysfs"
++ depends on SCHED_HMP
++ help
++ When turned on, this option exports the thresholds and load average
++ period value for the load tracking patches through sysfs.
++ The values can be modified to change the rate of load accumulation
++ and the thresholds used for HMP migration.
++ The load_avg_period_ms is the time in ms to reach a load average of
++ 0.5 for an idle task of 0 load average ratio that start a busy loop.
++ The up_threshold and down_threshold is the value to go to a faster
++ CPU or to go back to a slower cpu.
++ The {up,down}_threshold are devided by 1024 before being compared
++ to the load average.
++ For examples, with load_avg_period_ms = 128 and up_threshold = 512,
++ a running task with a load of 0 will be migrated to a bigger CPU after
++ 128ms, because after 128ms its load_avg_ratio is 0.5 and the real
++ up_threshold is 0.5.
++ This patch has the same behavior as changing the Y of the load
++ average computation to
++ (1002/1024)^(LOAD_AVG_PERIOD/load_avg_period_ms)
++ but it remove intermadiate overflows in computation.
++
++config HMP_FREQUENCY_INVARIANT_SCALE
++ bool "(EXPERIMENTAL) Frequency-Invariant Tracked Load for HMP"
++ depends on HMP_VARIABLE_SCALE && CPU_FREQ
++ help
++ Scales the current load contribution in line with the frequency
++ of the CPU that the task was executed on.
++ In this version, we use a simple linear scale derived from the
++ maximum frequency reported by CPUFreq.
++ Restricting tracked load to be scaled by the CPU's frequency
++ represents the consumption of possible compute capacity
++ (rather than consumption of actual instantaneous capacity as
++ normal) and allows the HMP migration's simple threshold
++ migration strategy to interact more predictably with CPUFreq's
++ asynchronous compute capacity changes.
++
++config SCHED_HMP_LITTLE_PACKING
++ bool "Small task packing for HMP"
++ depends on SCHED_HMP
++ default n
++ help
++ Allows the HMP Scheduler to pack small tasks into CPUs in the
++ smallest HMP domain.
++ Controlled by two sysfs files in sys/kernel/hmp.
++ packing_enable: 1 to enable, 0 to disable packing. Default 1.
++ packing_limit: runqueue load ratio where a RQ is considered
++ to be full. Default is NICE_0_LOAD * 9/8.
++
+ config NR_CPUS
+ int "Maximum number of CPUs (2-32)"
+ range 2 32
+@@ -337,5 +476,8 @@
+ source "security/Kconfig"
- arm64-obj-$(CONFIG_COMPAT) += sys32.o kuser32.o signal32.o \
- sys_compat.o
-+arm64-obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o
- arm64-obj-$(CONFIG_MODULES) += arm64ksyms.o module.o
-+arm64-obj-$(CONFIG_SMP) += smp.o smp_spin_table.o topology.o
- arm64-obj-$(CONFIG_SMP) += smp.o smp_spin_table.o
-+arm64-obj-$(CONFIG_PERF_EVENTS) += perf_regs.o
- arm64-obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o
--arm64-obj-$(CONFIG_HAVE_HW_BREAKPOINT)+= hw_breakpoint.o
-+arm64-obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
- arm64-obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
- arm64-obj-$(CONFIG_ARM64_CPU_SUSPEND) += sleep.o suspend.o
- arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o
-+arm64-obj-$(CONFIG_KGDB) += kgdb.o
+ source "crypto/Kconfig"
++if CRYPTO
++source "arch/arm64/crypto/Kconfig"
++endif
- obj-y += $(arm64-obj-y) vdso/
- obj-m += $(arm64-obj-m)
+ source "lib/Kconfig"
+diff -Nur linux-3.14.54.orig/arch/arm64/Kconfig.orig linux-3.14.54/arch/arm64/Kconfig.orig
+--- linux-3.14.54.orig/arch/arm64/Kconfig.orig 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm64/Kconfig.orig 2015-10-01 11:36:53.000000000 +0200
+@@ -0,0 +1,341 @@
++config ARM64
++ def_bool y
++ select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
++ select ARCH_USE_CMPXCHG_LOCKREF
++ select ARCH_SUPPORTS_ATOMIC_RMW
++ select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
++ select ARCH_WANT_OPTIONAL_GPIOLIB
++ select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
++ select ARCH_WANT_FRAME_POINTERS
++ select ARM_AMBA
++ select ARM_ARCH_TIMER
++ select ARM_GIC
++ select BUILDTIME_EXTABLE_SORT
++ select CLONE_BACKWARDS
++ select COMMON_CLK
++ select CPU_PM if (SUSPEND || CPU_IDLE)
++ select DCACHE_WORD_ACCESS
++ select GENERIC_CLOCKEVENTS
++ select GENERIC_CLOCKEVENTS_BROADCAST if SMP
++ select GENERIC_IOMAP
++ select GENERIC_IRQ_PROBE
++ select GENERIC_IRQ_SHOW
++ select GENERIC_SCHED_CLOCK
++ select GENERIC_SMP_IDLE_THREAD
++ select GENERIC_STRNCPY_FROM_USER
++ select GENERIC_STRNLEN_USER
++ select GENERIC_TIME_VSYSCALL
++ select HARDIRQS_SW_RESEND
++ select HAVE_ARCH_JUMP_LABEL
++ select HAVE_ARCH_TRACEHOOK
++ select HAVE_DEBUG_BUGVERBOSE
++ select HAVE_DEBUG_KMEMLEAK
++ select HAVE_DMA_API_DEBUG
++ select HAVE_DMA_ATTRS
++ select HAVE_DMA_CONTIGUOUS
++ select HAVE_EFFICIENT_UNALIGNED_ACCESS
++ select HAVE_GENERIC_DMA_COHERENT
++ select HAVE_HW_BREAKPOINT if PERF_EVENTS
++ select HAVE_MEMBLOCK
++ select HAVE_PATA_PLATFORM
++ select HAVE_PERF_EVENTS
++ select IRQ_DOMAIN
++ select MODULES_USE_ELF_RELA
++ select NO_BOOTMEM
++ select OF
++ select OF_EARLY_FLATTREE
++ select PERF_USE_VMALLOC
++ select POWER_RESET
++ select POWER_SUPPLY
++ select RTC_LIB
++ select SPARSE_IRQ
++ select SYSCTL_EXCEPTION_TRACE
++ help
++ ARM 64-bit (AArch64) Linux support.
++
++config 64BIT
++ def_bool y
++
++config ARCH_PHYS_ADDR_T_64BIT
++ def_bool y
++
++config MMU
++ def_bool y
++
++config NO_IOPORT
++ def_bool y
++
++config STACKTRACE_SUPPORT
++ def_bool y
++
++config ILLEGAL_POINTER_VALUE
++ hex
++ default 0xdead000000000000
++
++config LOCKDEP_SUPPORT
++ def_bool y
++
++config TRACE_IRQFLAGS_SUPPORT
++ def_bool y
++
++config RWSEM_GENERIC_SPINLOCK
++ def_bool y
++
++config GENERIC_HWEIGHT
++ def_bool y
++
++config GENERIC_CSUM
++ def_bool y
++
++config GENERIC_CALIBRATE_DELAY
++ def_bool y
++
++config ZONE_DMA32
++ def_bool y
++
++config ARCH_DMA_ADDR_T_64BIT
++ def_bool y
++
++config NEED_DMA_MAP_STATE
++ def_bool y
++
++config NEED_SG_DMA_LENGTH
++ def_bool y
++
++config SWIOTLB
++ def_bool y
++
++config IOMMU_HELPER
++ def_bool SWIOTLB
++
++config KERNEL_MODE_NEON
++ def_bool y
++
++source "init/Kconfig"
++
++source "kernel/Kconfig.freezer"
++
++menu "Platform selection"
++
++config ARCH_VEXPRESS
++ bool "ARMv8 software model (Versatile Express)"
++ select ARCH_REQUIRE_GPIOLIB
++ select COMMON_CLK_VERSATILE
++ select POWER_RESET_VEXPRESS
++ select VEXPRESS_CONFIG
++ help
++ This enables support for the ARMv8 software model (Versatile
++ Express).
++
++config ARCH_XGENE
++ bool "AppliedMicro X-Gene SOC Family"
++ help
++ This enables support for AppliedMicro X-Gene SOC Family
++
++endmenu
++
++menu "Bus support"
++
++config ARM_AMBA
++ bool
++
++endmenu
++
++menu "Kernel Features"
++
++config ARM64_64K_PAGES
++ bool "Enable 64KB pages support"
++ help
++ This feature enables 64KB pages support (4KB by default)
++ allowing only two levels of page tables and faster TLB
++ look-up. AArch32 emulation is not available when this feature
++ is enabled.
++
++config CPU_BIG_ENDIAN
++ bool "Build big-endian kernel"
++ help
++ Say Y if you plan on running a kernel in big-endian mode.
++
++config SMP
++ bool "Symmetric Multi-Processing"
++ help
++ This enables support for systems with more than one CPU. If
++ you say N here, the kernel will run on single and
++ multiprocessor machines, but will use only one CPU of a
++ multiprocessor machine. If you say Y here, the kernel will run
++ on many, but not all, single processor machines. On a single
++ processor machine, the kernel will run faster if you say N
++ here.
++
++ If you don't know what to do here, say N.
++
++config NR_CPUS
++ int "Maximum number of CPUs (2-32)"
++ range 2 32
++ depends on SMP
++ # These have to remain sorted largest to smallest
++ default "8"
++
++config HOTPLUG_CPU
++ bool "Support for hot-pluggable CPUs"
++ depends on SMP
++ help
++ Say Y here to experiment with turning CPUs off and on. CPUs
++ can be controlled through /sys/devices/system/cpu.
++
++source kernel/Kconfig.preempt
++
++config HZ
++ int
++ default 100
++
++config ARCH_HAS_HOLES_MEMORYMODEL
++ def_bool y if SPARSEMEM
++
++config ARCH_SPARSEMEM_ENABLE
++ def_bool y
++ select SPARSEMEM_VMEMMAP_ENABLE
++
++config ARCH_SPARSEMEM_DEFAULT
++ def_bool ARCH_SPARSEMEM_ENABLE
++
++config ARCH_SELECT_MEMORY_MODEL
++ def_bool ARCH_SPARSEMEM_ENABLE
++
++config HAVE_ARCH_PFN_VALID
++ def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
++
++config HW_PERF_EVENTS
++ bool "Enable hardware performance counter support for perf events"
++ depends on PERF_EVENTS
++ default y
++ help
++ Enable hardware performance counter support for perf events. If
++ disabled, perf events will use software events only.
++
++config SYS_SUPPORTS_HUGETLBFS
++ def_bool y
++
++config ARCH_WANT_GENERAL_HUGETLB
++ def_bool y
++
++config ARCH_WANT_HUGE_PMD_SHARE
++ def_bool y if !ARM64_64K_PAGES
++
++config HAVE_ARCH_TRANSPARENT_HUGEPAGE
++ def_bool y
++
++source "mm/Kconfig"
++
++config XEN_DOM0
++ def_bool y
++ depends on XEN
++
++config XEN
++ bool "Xen guest support on ARM64 (EXPERIMENTAL)"
++ depends on ARM64 && OF
++ select SWIOTLB_XEN
++ help
++ Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
++
++config FORCE_MAX_ZONEORDER
++ int
++ default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
++ default "11"
++
++endmenu
++
++menu "Boot options"
++
++config CMDLINE
++ string "Default kernel command string"
++ default ""
++ help
++ Provide a set of default command-line options at build time by
++ entering them here. As a minimum, you should specify the the
++ root device (e.g. root=/dev/nfs).
++
++config CMDLINE_FORCE
++ bool "Always use the default kernel command string"
++ help
++ Always use the default kernel command string, even if the boot
++ loader passes other arguments to the kernel.
++ This is useful if you cannot or don't want to change the
++ command-line options your boot loader passes to the kernel.
++
++endmenu
++
++menu "Userspace binary formats"
++
++source "fs/Kconfig.binfmt"
++
++config COMPAT
++ bool "Kernel support for 32-bit EL0"
++ depends on !ARM64_64K_PAGES
++ select COMPAT_BINFMT_ELF
++ select HAVE_UID16
++ select OLD_SIGSUSPEND3
++ select COMPAT_OLD_SIGACTION
++ help
++ This option enables support for a 32-bit EL0 running under a 64-bit
++ kernel at EL1. AArch32-specific components such as system calls,
++ the user helper functions, VFP support and the ptrace interface are
++ handled appropriately by the kernel.
++
++ If you want to execute 32-bit userspace applications, say Y.
++
++config SYSVIPC_COMPAT
++ def_bool y
++ depends on COMPAT && SYSVIPC
++
++endmenu
++
++menu "Power management options"
++
++source "kernel/power/Kconfig"
++
++config ARCH_SUSPEND_POSSIBLE
++ def_bool y
++
++config ARM64_CPU_SUSPEND
++ def_bool PM_SLEEP
++
++endmenu
++
++menu "CPU Power Management"
++
++source "drivers/cpuidle/Kconfig"
++
++config ARM64_ERRATUM_843419
++ bool "Cortex-A53: 843419: A load or store might access an incorrect address"
++ depends on MODULES
++ default y
++ help
++ This option builds kernel modules using the large memory model in
++ order to avoid the use of the ADRP instruction, which can cause
++ a subsequent memory access to use an incorrect address on Cortex-A53
++ parts up to r0p4.
++
++ Note that the kernel itself must be linked with a version of ld
++ which fixes potentially affected ADRP instructions through the
++ use of veneers.
++
++ If unsure, say Y.
++
++endmenu
++
++source "net/Kconfig"
++
++source "drivers/Kconfig"
++
++source "fs/Kconfig"
++
++source "arch/arm64/kvm/Kconfig"
++
++source "arch/arm64/Kconfig.debug"
++
++source "security/Kconfig"
++
++source "crypto/Kconfig"
++
++source "lib/Kconfig"
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/arm64ksyms.c linux-3.14.54/arch/arm64/kernel/arm64ksyms.c
--- linux-3.14.54.orig/arch/arm64/kernel/arm64ksyms.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/kernel/arm64ksyms.c 2015-10-12 10:56:17.926351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/arm64ksyms.c 2015-10-15 15:51:24.876680055 +0200
@@ -56,3 +56,7 @@
EXPORT_SYMBOL(test_and_clear_bit);
EXPORT_SYMBOL(change_bit);
@@ -40991,7 +39630,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/arm64ksyms.c linux-3.14.54/arch/a
+#endif
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/debug-monitors.c linux-3.14.54/arch/arm64/kernel/debug-monitors.c
--- linux-3.14.54.orig/arch/arm64/kernel/debug-monitors.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/kernel/debug-monitors.c 2015-10-12 10:56:17.926351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/debug-monitors.c 2015-10-15 15:51:24.876680055 +0200
@@ -138,6 +138,7 @@
{
asm volatile("msr oslar_el1, %0" : : "r" (0));
@@ -41012,7 +39651,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/debug-monitors.c linux-3.14.54/ar
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/entry-ftrace.S linux-3.14.54/arch/arm64/kernel/entry-ftrace.S
--- linux-3.14.54.orig/arch/arm64/kernel/entry-ftrace.S 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/kernel/entry-ftrace.S 2015-10-12 10:56:17.927351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/entry-ftrace.S 2015-10-15 15:51:24.876680055 +0200
@@ -0,0 +1,218 @@
+/*
+ * arch/arm64/kernel/entry-ftrace.S
@@ -41234,7 +39873,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/entry-ftrace.S linux-3.14.54/arch
+#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/entry.S linux-3.14.54/arch/arm64/kernel/entry.S
--- linux-3.14.54.orig/arch/arm64/kernel/entry.S 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/kernel/entry.S 2015-10-12 10:56:17.927351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/entry.S 2015-10-15 15:51:24.876680055 +0200
@@ -630,8 +630,9 @@
enable_irq
@@ -41273,7 +39912,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/entry.S linux-3.14.54/arch/arm64/
/*
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/ftrace.c linux-3.14.54/arch/arm64/kernel/ftrace.c
--- linux-3.14.54.orig/arch/arm64/kernel/ftrace.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/kernel/ftrace.c 2015-10-12 10:56:17.927351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/ftrace.c 2015-10-15 15:51:24.876680055 +0200
@@ -0,0 +1,177 @@
+/*
+ * arch/arm64/kernel/ftrace.c
@@ -41454,7 +40093,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/ftrace.c linux-3.14.54/arch/arm64
+#endif /* CONFIG_FUNCTION_GRAPH_TRACER */
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/head.S linux-3.14.54/arch/arm64/kernel/head.S
--- linux-3.14.54.orig/arch/arm64/kernel/head.S 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/kernel/head.S 2015-10-12 10:56:17.928351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/head.S 2015-10-15 15:51:24.920677157 +0200
@@ -26,6 +26,7 @@
#include <asm/assembler.h>
#include <asm/ptrace.h>
@@ -42236,7 +40875,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/head.S.orig linux-3.14.54/arch/ar
+ENDPROC(__vet_fdt)
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/hw_breakpoint.c linux-3.14.54/arch/arm64/kernel/hw_breakpoint.c
--- linux-3.14.54.orig/arch/arm64/kernel/hw_breakpoint.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/kernel/hw_breakpoint.c 2015-10-12 10:56:17.928351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/hw_breakpoint.c 2015-10-15 15:51:24.920677157 +0200
@@ -20,6 +20,7 @@
#define pr_fmt(fmt) "hw-breakpoint: " fmt
@@ -42255,7 +40894,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/hw_breakpoint.c linux-3.14.54/arc
#include <asm/hw_breakpoint.h>
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/kgdb.c linux-3.14.54/arch/arm64/kernel/kgdb.c
--- linux-3.14.54.orig/arch/arm64/kernel/kgdb.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/kernel/kgdb.c 2015-10-12 10:56:17.929351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/kgdb.c 2015-10-15 15:51:24.924676893 +0200
@@ -0,0 +1,336 @@
+/*
+ * AArch64 KGDB support
@@ -42593,9 +41232,44 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/kgdb.c linux-3.14.54/arch/arm64/k
+ KGDB_DYN_BRK_INS_BYTE3,
+ }
+};
+diff -Nur linux-3.14.54.orig/arch/arm64/kernel/Makefile linux-3.14.54/arch/arm64/kernel/Makefile
+--- linux-3.14.54.orig/arch/arm64/kernel/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm64/kernel/Makefile 2015-10-15 15:51:24.924676893 +0200
+@@ -5,21 +5,29 @@
+ CPPFLAGS_vmlinux.lds := -DTEXT_OFFSET=$(TEXT_OFFSET)
+ AFLAGS_head.o := -DTEXT_OFFSET=$(TEXT_OFFSET)
+
++CFLAGS_REMOVE_ftrace.o = -pg
++CFLAGS_REMOVE_insn.o = -pg
++CFLAGS_REMOVE_return_address.o = -pg
++
+ # Object file lists.
+ arm64-obj-y := cputable.o debug-monitors.o entry.o irq.o fpsimd.o \
+ entry-fpsimd.o process.o ptrace.o setup.o signal.o \
+ sys.o stacktrace.o time.o traps.o io.o vdso.o \
+- hyp-stub.o psci.o cpu_ops.o insn.o
++ hyp-stub.o psci.o cpu_ops.o insn.o return_address.o
+
+ arm64-obj-$(CONFIG_COMPAT) += sys32.o kuser32.o signal32.o \
+ sys_compat.o
++arm64-obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o
+ arm64-obj-$(CONFIG_MODULES) += arm64ksyms.o module.o
++arm64-obj-$(CONFIG_SMP) += smp.o smp_spin_table.o topology.o
+ arm64-obj-$(CONFIG_SMP) += smp.o smp_spin_table.o
++arm64-obj-$(CONFIG_PERF_EVENTS) += perf_regs.o
+ arm64-obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o
+-arm64-obj-$(CONFIG_HAVE_HW_BREAKPOINT)+= hw_breakpoint.o
++arm64-obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
+ arm64-obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+ arm64-obj-$(CONFIG_ARM64_CPU_SUSPEND) += sleep.o suspend.o
+ arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o
++arm64-obj-$(CONFIG_KGDB) += kgdb.o
+
+ obj-y += $(arm64-obj-y) vdso/
+ obj-m += $(arm64-obj-m)
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/perf_event.c linux-3.14.54/arch/arm64/kernel/perf_event.c
--- linux-3.14.54.orig/arch/arm64/kernel/perf_event.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/kernel/perf_event.c 2015-10-12 10:56:17.929351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/perf_event.c 2015-10-15 15:51:24.924676893 +0200
@@ -1348,8 +1348,8 @@
* Callchain handling code.
*/
@@ -42708,7 +41382,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/perf_event.c linux-3.14.54/arch/a
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/perf_regs.c linux-3.14.54/arch/arm64/kernel/perf_regs.c
--- linux-3.14.54.orig/arch/arm64/kernel/perf_regs.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/kernel/perf_regs.c 2015-10-12 10:56:17.930351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/perf_regs.c 2015-10-15 15:51:24.948675315 +0200
@@ -0,0 +1,46 @@
+#include <linux/errno.h>
+#include <linux/kernel.h>
@@ -42758,7 +41432,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/perf_regs.c linux-3.14.54/arch/ar
+}
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/process.c linux-3.14.54/arch/arm64/kernel/process.c
--- linux-3.14.54.orig/arch/arm64/kernel/process.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/kernel/process.c 2015-10-12 10:56:17.930351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/process.c 2015-10-15 15:51:24.948675315 +0200
@@ -20,6 +20,7 @@
#include <stdarg.h>
@@ -42769,7 +41443,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/process.c linux-3.14.54/arch/arm6
#include <linux/kernel.h>
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/ptrace.c linux-3.14.54/arch/arm64/kernel/ptrace.c
--- linux-3.14.54.orig/arch/arm64/kernel/ptrace.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/kernel/ptrace.c 2015-10-12 10:56:17.930351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/ptrace.c 2015-10-15 15:51:24.948675315 +0200
@@ -19,6 +19,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
@@ -42861,7 +41535,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/ptrace.c linux-3.14.54/arch/arm64
+}
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/return_address.c linux-3.14.54/arch/arm64/kernel/return_address.c
--- linux-3.14.54.orig/arch/arm64/kernel/return_address.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/kernel/return_address.c 2015-10-12 10:56:17.931351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/return_address.c 2015-10-15 15:51:24.948675315 +0200
@@ -0,0 +1,55 @@
+/*
+ * arch/arm64/kernel/return_address.c
@@ -42920,7 +41594,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/return_address.c linux-3.14.54/ar
+EXPORT_SYMBOL_GPL(return_address);
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/setup.c linux-3.14.54/arch/arm64/kernel/setup.c
--- linux-3.14.54.orig/arch/arm64/kernel/setup.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/kernel/setup.c 2015-10-12 10:56:17.931351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/setup.c 2015-10-15 15:51:24.948675315 +0200
@@ -71,6 +71,7 @@
COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV|\
COMPAT_HWCAP_LPAE)
@@ -42979,7 +41653,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/setup.c linux-3.14.54/arch/arm64/
{
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/signal.c linux-3.14.54/arch/arm64/kernel/signal.c
--- linux-3.14.54.orig/arch/arm64/kernel/signal.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/kernel/signal.c 2015-10-12 10:56:17.931351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/signal.c 2015-10-15 15:51:24.948675315 +0200
@@ -17,6 +17,7 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
@@ -42998,7 +41672,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/signal.c linux-3.14.54/arch/arm64
#include <asm/cacheflush.h>
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/smp.c linux-3.14.54/arch/arm64/kernel/smp.c
--- linux-3.14.54.orig/arch/arm64/kernel/smp.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/kernel/smp.c 2015-10-12 10:56:17.932351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/smp.c 2015-10-15 15:51:24.952675051 +0200
@@ -114,6 +114,11 @@
return ret;
}
@@ -43033,7 +41707,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/smp.c linux-3.14.54/arch/arm64/ke
*/
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/stacktrace.c linux-3.14.54/arch/arm64/kernel/stacktrace.c
--- linux-3.14.54.orig/arch/arm64/kernel/stacktrace.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/kernel/stacktrace.c 2015-10-12 10:56:17.932351170 +0200
++++ linux-3.14.54/arch/arm64/kernel/stacktrace.c 2015-10-15 15:51:24.952675051 +0200
@@ -35,7 +35,7 @@
* ldp x29, x30, [sp]
* add sp, sp, #0x10
@@ -43045,7 +41719,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/stacktrace.c linux-3.14.54/arch/a
unsigned long fp = frame->fp;
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/topology.c linux-3.14.54/arch/arm64/kernel/topology.c
--- linux-3.14.54.orig/arch/arm64/kernel/topology.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/arch/arm64/kernel/topology.c 2015-10-12 10:56:17.933351169 +0200
++++ linux-3.14.54/arch/arm64/kernel/topology.c 2015-10-15 15:51:24.952675051 +0200
@@ -0,0 +1,558 @@
+/*
+ * arch/arm64/kernel/topology.c
@@ -43607,7 +42281,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/topology.c linux-3.14.54/arch/arm
+}
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/vdso/Makefile linux-3.14.54/arch/arm64/kernel/vdso/Makefile
--- linux-3.14.54.orig/arch/arm64/kernel/vdso/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/kernel/vdso/Makefile 2015-10-12 10:56:17.933351169 +0200
++++ linux-3.14.54/arch/arm64/kernel/vdso/Makefile 2015-10-15 15:51:24.952675051 +0200
@@ -51,9 +51,9 @@
$(call if_changed_dep,vdsoas)
@@ -43693,7 +42367,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/vdso/Makefile.orig linux-3.14.54/
+vdso_install: vdso.so
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/vdso.c linux-3.14.54/arch/arm64/kernel/vdso.c
--- linux-3.14.54.orig/arch/arm64/kernel/vdso.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/kernel/vdso.c 2015-10-12 10:56:17.933351169 +0200
++++ linux-3.14.54/arch/arm64/kernel/vdso.c 2015-10-15 15:51:24.952675051 +0200
@@ -156,11 +156,12 @@
int uses_interp)
{
@@ -43770,7 +42444,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/vdso.c linux-3.14.54/arch/arm64/k
return NULL;
diff -Nur linux-3.14.54.orig/arch/arm64/kernel/vmlinux.lds.S linux-3.14.54/arch/arm64/kernel/vmlinux.lds.S
--- linux-3.14.54.orig/arch/arm64/kernel/vmlinux.lds.S 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/kernel/vmlinux.lds.S 2015-10-12 10:56:17.933351169 +0200
++++ linux-3.14.54/arch/arm64/kernel/vmlinux.lds.S 2015-10-15 15:51:24.952675051 +0200
@@ -104,6 +104,13 @@
_edata = .;
@@ -43785,9 +42459,116 @@ diff -Nur linux-3.14.54.orig/arch/arm64/kernel/vmlinux.lds.S linux-3.14.54/arch/
_end = .;
STABS_DEBUG
+diff -Nur linux-3.14.54.orig/arch/arm64/Makefile linux-3.14.54/arch/arm64/Makefile
+--- linux-3.14.54.orig/arch/arm64/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/arch/arm64/Makefile 2015-10-15 15:51:24.952675051 +0200
+@@ -49,6 +49,7 @@
+ core-y += arch/arm64/kernel/ arch/arm64/mm/
+ core-$(CONFIG_KVM) += arch/arm64/kvm/
+ core-$(CONFIG_XEN) += arch/arm64/xen/
++core-$(CONFIG_CRYPTO) += arch/arm64/crypto/
+ libs-y := arch/arm64/lib/ $(libs-y)
+ libs-y += $(LIBGCC)
+
+diff -Nur linux-3.14.54.orig/arch/arm64/Makefile.orig linux-3.14.54/arch/arm64/Makefile.orig
+--- linux-3.14.54.orig/arch/arm64/Makefile.orig 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/arch/arm64/Makefile.orig 2015-10-01 11:36:53.000000000 +0200
+@@ -0,0 +1,92 @@
++#
++# arch/arm64/Makefile
++#
++# This file is included by the global makefile so that you can add your own
++# architecture-specific flags and dependencies.
++#
++# This file is subject to the terms and conditions of the GNU General Public
++# License. See the file "COPYING" in the main directory of this archive
++# for more details.
++#
++# Copyright (C) 1995-2001 by Russell King
++
++LDFLAGS_vmlinux :=-p --no-undefined -X
++CPPFLAGS_vmlinux.lds = -DTEXT_OFFSET=$(TEXT_OFFSET)
++OBJCOPYFLAGS :=-O binary -R .note -R .note.gnu.build-id -R .comment -S
++GZFLAGS :=-9
++
++LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
++
++KBUILD_DEFCONFIG := defconfig
++
++KBUILD_CFLAGS += -mgeneral-regs-only
++ifeq ($(CONFIG_CPU_BIG_ENDIAN), y)
++KBUILD_CPPFLAGS += -mbig-endian
++AS += -EB
++LD += -EB
++else
++KBUILD_CPPFLAGS += -mlittle-endian
++AS += -EL
++LD += -EL
++endif
++
++comma = ,
++
++CHECKFLAGS += -D__aarch64__
++
++ifeq ($(CONFIG_ARM64_ERRATUM_843419), y)
++CFLAGS_MODULE += -mcmodel=large
++endif
++
++# Default value
++head-y := arch/arm64/kernel/head.o
++
++# The byte offset of the kernel image in RAM from the start of RAM.
++TEXT_OFFSET := 0x00080000
++
++export TEXT_OFFSET GZFLAGS
++
++core-y += arch/arm64/kernel/ arch/arm64/mm/
++core-$(CONFIG_KVM) += arch/arm64/kvm/
++core-$(CONFIG_XEN) += arch/arm64/xen/
++libs-y := arch/arm64/lib/ $(libs-y)
++libs-y += $(LIBGCC)
++
++# Default target when executing plain make
++KBUILD_IMAGE := Image.gz
++KBUILD_DTBS := dtbs
++
++all: $(KBUILD_IMAGE) $(KBUILD_DTBS)
++
++boot := arch/arm64/boot
++
++Image Image.gz: vmlinux
++ $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
++
++zinstall install: vmlinux
++ $(Q)$(MAKE) $(build)=$(boot) $@
++
++%.dtb: scripts
++ $(Q)$(MAKE) $(build)=$(boot)/dts $(boot)/dts/$@
++
++dtbs: scripts
++ $(Q)$(MAKE) $(build)=$(boot)/dts dtbs
++
++PHONY += vdso_install
++vdso_install:
++ $(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso $@
++
++# We use MRPROPER_FILES and CLEAN_FILES now
++archclean:
++ $(Q)$(MAKE) $(clean)=$(boot)
++
++define archhelp
++ echo '* Image.gz - Compressed kernel image (arch/$(ARCH)/boot/Image.gz)'
++ echo ' Image - Uncompressed kernel image (arch/$(ARCH)/boot/Image)'
++ echo '* dtbs - Build device tree blobs for enabled boards'
++ echo ' install - Install uncompressed kernel'
++ echo ' zinstall - Install compressed kernel'
++ echo ' Install using (your) ~/bin/installkernel or'
++ echo ' (distribution) /sbin/installkernel or'
++ echo ' install to $$(INSTALL_PATH) and run lilo'
++endef
diff -Nur linux-3.14.54.orig/arch/arm64/mm/cache.S linux-3.14.54/arch/arm64/mm/cache.S
--- linux-3.14.54.orig/arch/arm64/mm/cache.S 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/mm/cache.S 2015-10-12 10:56:17.934351169 +0200
++++ linux-3.14.54/arch/arm64/mm/cache.S 2015-10-15 15:51:24.956674787 +0200
@@ -30,7 +30,7 @@
*
* Corrupted registers: x0-x7, x9-x11
@@ -43897,7 +42678,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/mm/cache.S linux-3.14.54/arch/arm64/mm/c
+ENDPROC(__dma_unmap_area)
diff -Nur linux-3.14.54.orig/arch/arm64/mm/copypage.c linux-3.14.54/arch/arm64/mm/copypage.c
--- linux-3.14.54.orig/arch/arm64/mm/copypage.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/mm/copypage.c 2015-10-12 10:56:17.934351169 +0200
++++ linux-3.14.54/arch/arm64/mm/copypage.c 2015-10-15 15:51:24.956674787 +0200
@@ -27,8 +27,10 @@
copy_page(kto, kfrom);
__flush_dcache_area(kto, PAGE_SIZE);
@@ -43911,7 +42692,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/mm/copypage.c linux-3.14.54/arch/arm64/m
+EXPORT_SYMBOL_GPL(__cpu_clear_user_page);
diff -Nur linux-3.14.54.orig/arch/arm64/mm/dma-mapping.c linux-3.14.54/arch/arm64/mm/dma-mapping.c
--- linux-3.14.54.orig/arch/arm64/mm/dma-mapping.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/mm/dma-mapping.c 2015-10-12 10:56:17.935351169 +0200
++++ linux-3.14.54/arch/arm64/mm/dma-mapping.c 2015-10-15 15:51:24.956674787 +0200
@@ -22,26 +22,39 @@
#include <linux/slab.h>
#include <linux/dma-mapping.h>
@@ -44355,7 +43136,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/mm/dma-mapping.c.orig linux-3.14.54/arch
+fs_initcall(dma_debug_do_init);
diff -Nur linux-3.14.54.orig/arch/arm64/mm/init.c linux-3.14.54/arch/arm64/mm/init.c
--- linux-3.14.54.orig/arch/arm64/mm/init.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/mm/init.c 2015-10-12 10:56:17.935351169 +0200
++++ linux-3.14.54/arch/arm64/mm/init.c 2015-10-15 15:51:24.996672154 +0200
@@ -30,6 +30,7 @@
#include <linux/memblock.h>
#include <linux/sort.h>
@@ -44454,7 +43235,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/mm/init.c linux-3.14.54/arch/arm64/mm/in
#ifndef CONFIG_SPARSEMEM_VMEMMAP
diff -Nur linux-3.14.54.orig/arch/arm64/mm/proc.S linux-3.14.54/arch/arm64/mm/proc.S
--- linux-3.14.54.orig/arch/arm64/mm/proc.S 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/arm64/mm/proc.S 2015-10-12 10:56:17.935351169 +0200
++++ linux-3.14.54/arch/arm64/mm/proc.S 2015-10-15 15:51:24.996672154 +0200
@@ -173,12 +173,6 @@
* value of the SCTLR_EL1 register.
*/
@@ -44470,7 +43251,7 @@ diff -Nur linux-3.14.54.orig/arch/arm64/mm/proc.S linux-3.14.54/arch/arm64/mm/pr
dsb sy
diff -Nur linux-3.14.54.orig/arch/avr32/kernel/cpu.c linux-3.14.54/arch/avr32/kernel/cpu.c
--- linux-3.14.54.orig/arch/avr32/kernel/cpu.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/avr32/kernel/cpu.c 2015-10-12 10:56:17.936351169 +0200
++++ linux-3.14.54/arch/avr32/kernel/cpu.c 2015-10-15 15:51:25.000671891 +0200
@@ -39,10 +39,12 @@
size_t count)
{
@@ -44569,7 +43350,7 @@ diff -Nur linux-3.14.54.orig/arch/avr32/kernel/cpu.c linux-3.14.54/arch/avr32/ke
diff -Nur linux-3.14.54.orig/arch/blackfin/include/asm/ftrace.h linux-3.14.54/arch/blackfin/include/asm/ftrace.h
--- linux-3.14.54.orig/arch/blackfin/include/asm/ftrace.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/blackfin/include/asm/ftrace.h 2015-10-12 10:56:17.936351169 +0200
++++ linux-3.14.54/arch/blackfin/include/asm/ftrace.h 2015-10-15 15:51:25.000671891 +0200
@@ -66,16 +66,7 @@
#endif /* CONFIG_FRAME_POINTER */
@@ -44590,7 +43371,7 @@ diff -Nur linux-3.14.54.orig/arch/blackfin/include/asm/ftrace.h linux-3.14.54/ar
diff -Nur linux-3.14.54.orig/arch/hexagon/include/asm/elf.h linux-3.14.54/arch/hexagon/include/asm/elf.h
--- linux-3.14.54.orig/arch/hexagon/include/asm/elf.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/hexagon/include/asm/elf.h 2015-10-12 10:56:17.936351169 +0200
++++ linux-3.14.54/arch/hexagon/include/asm/elf.h 2015-10-15 15:51:25.000671891 +0200
@@ -1,7 +1,7 @@
/*
* ELF definitions for the Hexagon architecture
@@ -44602,7 +43383,7 @@ diff -Nur linux-3.14.54.orig/arch/hexagon/include/asm/elf.h linux-3.14.54/arch/h
* it under the terms of the GNU General Public License version 2 and
diff -Nur linux-3.14.54.orig/arch/parisc/include/asm/ftrace.h linux-3.14.54/arch/parisc/include/asm/ftrace.h
--- linux-3.14.54.orig/arch/parisc/include/asm/ftrace.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/parisc/include/asm/ftrace.h 2015-10-12 10:56:17.937351169 +0200
++++ linux-3.14.54/arch/parisc/include/asm/ftrace.h 2015-10-15 15:51:25.000671891 +0200
@@ -24,15 +24,7 @@
extern unsigned long return_address(unsigned int);
@@ -44622,7 +43403,7 @@ diff -Nur linux-3.14.54.orig/arch/parisc/include/asm/ftrace.h linux-3.14.54/arch
diff -Nur linux-3.14.54.orig/arch/s390/include/asm/cio.h linux-3.14.54/arch/s390/include/asm/cio.h
--- linux-3.14.54.orig/arch/s390/include/asm/cio.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/s390/include/asm/cio.h 2015-10-12 10:56:17.937351169 +0200
++++ linux-3.14.54/arch/s390/include/asm/cio.h 2015-10-15 15:51:25.000671891 +0200
@@ -199,7 +199,7 @@
/**
* struct irb - interruption response block
@@ -44634,7 +43415,7 @@ diff -Nur linux-3.14.54.orig/arch/s390/include/asm/cio.h linux-3.14.54/arch/s390
* The irb that is handed to the device driver when an interrupt occurs. For
diff -Nur linux-3.14.54.orig/arch/sh/include/asm/ftrace.h linux-3.14.54/arch/sh/include/asm/ftrace.h
--- linux-3.14.54.orig/arch/sh/include/asm/ftrace.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/sh/include/asm/ftrace.h 2015-10-12 10:56:17.938351169 +0200
++++ linux-3.14.54/arch/sh/include/asm/ftrace.h 2015-10-15 15:51:25.000671891 +0200
@@ -40,15 +40,7 @@
/* arch/sh/kernel/return_address.c */
extern void *return_address(unsigned int);
@@ -44654,7 +43435,7 @@ diff -Nur linux-3.14.54.orig/arch/sh/include/asm/ftrace.h linux-3.14.54/arch/sh/
diff -Nur linux-3.14.54.orig/arch/x86/kernel/setup.c linux-3.14.54/arch/x86/kernel/setup.c
--- linux-3.14.54.orig/arch/x86/kernel/setup.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/arch/x86/kernel/setup.c 2015-10-12 10:56:17.938351169 +0200
++++ linux-3.14.54/arch/x86/kernel/setup.c 2015-10-15 15:51:25.000671891 +0200
@@ -1120,7 +1120,7 @@
setup_real_mode();
@@ -44664,76 +43445,9 @@ diff -Nur linux-3.14.54.orig/arch/x86/kernel/setup.c linux-3.14.54/arch/x86/kern
/*
* NOTE: On x86-32, only from this point on, fixmaps are ready for use.
-diff -Nur linux-3.14.54.orig/block/Kconfig.iosched linux-3.14.54/block/Kconfig.iosched
---- linux-3.14.54.orig/block/Kconfig.iosched 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/block/Kconfig.iosched 2015-10-12 10:56:17.943351169 +0200
-@@ -39,6 +39,27 @@
- ---help---
- Enable group IO scheduling in CFQ.
-
-+config IOSCHED_BFQ
-+ tristate "BFQ I/O scheduler"
-+ default n
-+ ---help---
-+ The BFQ I/O scheduler tries to distribute bandwidth among
-+ all processes according to their weights.
-+ It aims at distributing the bandwidth as desired, independently of
-+ the disk parameters and with any workload. It also tries to
-+ guarantee low latency to interactive and soft real-time
-+ applications. If compiled built-in (saying Y here), BFQ can
-+ be configured to support hierarchical scheduling.
-+
-+config CGROUP_BFQIO
-+ bool "BFQ hierarchical scheduling support"
-+ depends on CGROUPS && IOSCHED_BFQ=y
-+ default n
-+ ---help---
-+ Enable hierarchical scheduling in BFQ, using the cgroups
-+ filesystem interface. The name of the subsystem will be
-+ bfqio.
-+
- choice
- prompt "Default I/O scheduler"
- default DEFAULT_CFQ
-@@ -52,6 +73,16 @@
- config DEFAULT_CFQ
- bool "CFQ" if IOSCHED_CFQ=y
-
-+ config DEFAULT_BFQ
-+ bool "BFQ" if IOSCHED_BFQ=y
-+ help
-+ Selects BFQ as the default I/O scheduler which will be
-+ used by default for all block devices.
-+ The BFQ I/O scheduler aims at distributing the bandwidth
-+ as desired, independently of the disk parameters and with
-+ any workload. It also tries to guarantee low latency to
-+ interactive and soft real-time applications.
-+
- config DEFAULT_NOOP
- bool "No-op"
-
-@@ -61,6 +92,7 @@
- string
- default "deadline" if DEFAULT_DEADLINE
- default "cfq" if DEFAULT_CFQ
-+ default "bfq" if DEFAULT_BFQ
- default "noop" if DEFAULT_NOOP
-
- endmenu
-diff -Nur linux-3.14.54.orig/block/Makefile linux-3.14.54/block/Makefile
---- linux-3.14.54.orig/block/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/block/Makefile 2015-10-12 10:56:17.943351169 +0200
-@@ -16,6 +16,7 @@
- obj-$(CONFIG_IOSCHED_NOOP) += noop-iosched.o
- obj-$(CONFIG_IOSCHED_DEADLINE) += deadline-iosched.o
- obj-$(CONFIG_IOSCHED_CFQ) += cfq-iosched.o
-+obj-$(CONFIG_IOSCHED_BFQ) += bfq-iosched.o
-
- obj-$(CONFIG_BLOCK_COMPAT) += compat_ioctl.o
- obj-$(CONFIG_BLK_DEV_INTEGRITY) += blk-integrity.o
diff -Nur linux-3.14.54.orig/block/bfq-cgroup.c linux-3.14.54/block/bfq-cgroup.c
--- linux-3.14.54.orig/block/bfq-cgroup.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/block/bfq-cgroup.c 2015-10-12 10:56:17.939351169 +0200
++++ linux-3.14.54/block/bfq-cgroup.c 2015-10-15 15:51:25.004671628 +0200
@@ -0,0 +1,932 @@
+/*
+ * BFQ: CGROUPS support.
@@ -45667,9 +44381,783 @@ diff -Nur linux-3.14.54.orig/block/bfq-cgroup.c linux-3.14.54/block/bfq-cgroup.c
+ return bfqg;
+}
+#endif
+diff -Nur linux-3.14.54.orig/block/bfq.h linux-3.14.54/block/bfq.h
+--- linux-3.14.54.orig/block/bfq.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/block/bfq.h 2015-10-15 15:51:25.004671628 +0200
+@@ -0,0 +1,770 @@
++/*
++ * BFQ-v7r5 for 3.14.0: data structures and common functions prototypes.
++ *
++ * Based on ideas and code from CFQ:
++ * Copyright (C) 2003 Jens Axboe <axboe@kernel.dk>
++ *
++ * Copyright (C) 2008 Fabio Checconi <fabio@gandalf.sssup.it>
++ * Paolo Valente <paolo.valente@unimore.it>
++ *
++ * Copyright (C) 2010 Paolo Valente <paolo.valente@unimore.it>
++ */
++
++#ifndef _BFQ_H
++#define _BFQ_H
++
++#include <linux/blktrace_api.h>
++#include <linux/hrtimer.h>
++#include <linux/ioprio.h>
++#include <linux/rbtree.h>
++
++#define BFQ_IOPRIO_CLASSES 3
++#define BFQ_CL_IDLE_TIMEOUT (HZ/5)
++
++#define BFQ_MIN_WEIGHT 1
++#define BFQ_MAX_WEIGHT 1000
++
++#define BFQ_DEFAULT_GRP_WEIGHT 10
++#define BFQ_DEFAULT_GRP_IOPRIO 0
++#define BFQ_DEFAULT_GRP_CLASS IOPRIO_CLASS_BE
++
++struct bfq_entity;
++
++/**
++ * struct bfq_service_tree - per ioprio_class service tree.
++ * @active: tree for active entities (i.e., those backlogged).
++ * @idle: tree for idle entities (i.e., those not backlogged, with V <= F_i).
++ * @first_idle: idle entity with minimum F_i.
++ * @last_idle: idle entity with maximum F_i.
++ * @vtime: scheduler virtual time.
++ * @wsum: scheduler weight sum; active and idle entities contribute to it.
++ *
++ * Each service tree represents a B-WF2Q+ scheduler on its own. Each
++ * ioprio_class has its own independent scheduler, and so its own
++ * bfq_service_tree. All the fields are protected by the queue lock
++ * of the containing bfqd.
++ */
++struct bfq_service_tree {
++ struct rb_root active;
++ struct rb_root idle;
++
++ struct bfq_entity *first_idle;
++ struct bfq_entity *last_idle;
++
++ u64 vtime;
++ unsigned long wsum;
++};
++
++/**
++ * struct bfq_sched_data - multi-class scheduler.
++ * @in_service_entity: entity in service.
++ * @next_in_service: head-of-the-line entity in the scheduler.
++ * @service_tree: array of service trees, one per ioprio_class.
++ *
++ * bfq_sched_data is the basic scheduler queue. It supports three
++ * ioprio_classes, and can be used either as a toplevel queue or as
++ * an intermediate queue on a hierarchical setup.
++ * @next_in_service points to the active entity of the sched_data
++ * service trees that will be scheduled next.
++ *
++ * The supported ioprio_classes are the same as in CFQ, in descending
++ * priority order, IOPRIO_CLASS_RT, IOPRIO_CLASS_BE, IOPRIO_CLASS_IDLE.
++ * Requests from higher priority queues are served before all the
++ * requests from lower priority queues; among requests of the same
++ * queue requests are served according to B-WF2Q+.
++ * All the fields are protected by the queue lock of the containing bfqd.
++ */
++struct bfq_sched_data {
++ struct bfq_entity *in_service_entity;
++ struct bfq_entity *next_in_service;
++ struct bfq_service_tree service_tree[BFQ_IOPRIO_CLASSES];
++};
++
++/**
++ * struct bfq_weight_counter - counter of the number of all active entities
++ * with a given weight.
++ * @weight: weight of the entities that this counter refers to.
++ * @num_active: number of active entities with this weight.
++ * @weights_node: weights tree member (see bfq_data's @queue_weights_tree
++ * and @group_weights_tree).
++ */
++struct bfq_weight_counter {
++ short int weight;
++ unsigned int num_active;
++ struct rb_node weights_node;
++};
++
++/**
++ * struct bfq_entity - schedulable entity.
++ * @rb_node: service_tree member.
++ * @weight_counter: pointer to the weight counter associated with this entity.
++ * @on_st: flag, true if the entity is on a tree (either the active or
++ * the idle one of its service_tree).
++ * @finish: B-WF2Q+ finish timestamp (aka F_i).
++ * @start: B-WF2Q+ start timestamp (aka S_i).
++ * @tree: tree the entity is enqueued into; %NULL if not on a tree.
++ * @min_start: minimum start time of the (active) subtree rooted at
++ * this entity; used for O(log N) lookups into active trees.
++ * @service: service received during the last round of service.
++ * @budget: budget used to calculate F_i; F_i = S_i + @budget / @weight.
++ * @weight: weight of the queue
++ * @parent: parent entity, for hierarchical scheduling.
++ * @my_sched_data: for non-leaf nodes in the cgroup hierarchy, the
++ * associated scheduler queue, %NULL on leaf nodes.
++ * @sched_data: the scheduler queue this entity belongs to.
++ * @ioprio: the ioprio in use.
++ * @new_weight: when a weight change is requested, the new weight value.
++ * @orig_weight: original weight, used to implement weight boosting
++ * @new_ioprio: when an ioprio change is requested, the new ioprio value.
++ * @ioprio_class: the ioprio_class in use.
++ * @new_ioprio_class: when an ioprio_class change is requested, the new
++ * ioprio_class value.
++ * @ioprio_changed: flag, true when the user requested a weight, ioprio or
++ * ioprio_class change.
++ *
++ * A bfq_entity is used to represent either a bfq_queue (leaf node in the
++ * cgroup hierarchy) or a bfq_group into the upper level scheduler. Each
++ * entity belongs to the sched_data of the parent group in the cgroup
++ * hierarchy. Non-leaf entities have also their own sched_data, stored
++ * in @my_sched_data.
++ *
++ * Each entity stores independently its priority values; this would
++ * allow different weights on different devices, but this
++ * functionality is not exported to userspace by now. Priorities and
++ * weights are updated lazily, first storing the new values into the
++ * new_* fields, then setting the @ioprio_changed flag. As soon as
++ * there is a transition in the entity state that allows the priority
++ * update to take place the effective and the requested priority
++ * values are synchronized.
++ *
++ * Unless cgroups are used, the weight value is calculated from the
++ * ioprio to export the same interface as CFQ. When dealing with
++ * ``well-behaved'' queues (i.e., queues that do not spend too much
++ * time to consume their budget and have true sequential behavior, and
++ * when there are no external factors breaking anticipation) the
++ * relative weights at each level of the cgroups hierarchy should be
++ * guaranteed. All the fields are protected by the queue lock of the
++ * containing bfqd.
++ */
++struct bfq_entity {
++ struct rb_node rb_node;
++ struct bfq_weight_counter *weight_counter;
++
++ int on_st;
++
++ u64 finish;
++ u64 start;
++
++ struct rb_root *tree;
++
++ u64 min_start;
++
++ unsigned long service, budget;
++ unsigned short weight, new_weight;
++ unsigned short orig_weight;
++
++ struct bfq_entity *parent;
++
++ struct bfq_sched_data *my_sched_data;
++ struct bfq_sched_data *sched_data;
++
++ unsigned short ioprio, new_ioprio;
++ unsigned short ioprio_class, new_ioprio_class;
++
++ int ioprio_changed;
++};
++
++struct bfq_group;
++
++/**
++ * struct bfq_queue - leaf schedulable entity.
++ * @ref: reference counter.
++ * @bfqd: parent bfq_data.
++ * @new_bfqq: shared bfq_queue if queue is cooperating with
++ * one or more other queues.
++ * @pos_node: request-position tree member (see bfq_data's @rq_pos_tree).
++ * @pos_root: request-position tree root (see bfq_data's @rq_pos_tree).
++ * @sort_list: sorted list of pending requests.
++ * @next_rq: if fifo isn't expired, next request to serve.
++ * @queued: nr of requests queued in @sort_list.
++ * @allocated: currently allocated requests.
++ * @meta_pending: pending metadata requests.
++ * @fifo: fifo list of requests in sort_list.
++ * @entity: entity representing this queue in the scheduler.
++ * @max_budget: maximum budget allowed from the feedback mechanism.
++ * @budget_timeout: budget expiration (in jiffies).
++ * @dispatched: number of requests on the dispatch list or inside driver.
++ * @flags: status flags.
++ * @bfqq_list: node for active/idle bfqq list inside our bfqd.
++ * @seek_samples: number of seeks sampled
++ * @seek_total: sum of the distances of the seeks sampled
++ * @seek_mean: mean seek distance
++ * @last_request_pos: position of the last request enqueued
++ * @requests_within_timer: number of consecutive pairs of request completion
++ * and arrival, such that the queue becomes idle
++ * after the completion, but the next request arrives
++ * within an idle time slice; used only if the queue's
++ * IO_bound has been cleared.
++ * @pid: pid of the process owning the queue, used for logging purposes.
++ * @last_wr_start_finish: start time of the current weight-raising period if
++ * the @bfq-queue is being weight-raised, otherwise
++ * finish time of the last weight-raising period
++ * @wr_cur_max_time: current max raising time for this queue
++ * @soft_rt_next_start: minimum time instant such that, only if a new
++ * request is enqueued after this time instant in an
++ * idle @bfq_queue with no outstanding requests, then
++ * the task associated with the queue it is deemed as
++ * soft real-time (see the comments to the function
++ * bfq_bfqq_softrt_next_start())
++ * @last_idle_bklogged: time of the last transition of the @bfq_queue from
++ * idle to backlogged
++ * @service_from_backlogged: cumulative service received from the @bfq_queue
++ * since the last transition from idle to
++ * backlogged
++ * @bic: pointer to the bfq_io_cq owning the bfq_queue, set to %NULL if the
++ * queue is shared
++ *
++ * A bfq_queue is a leaf request queue; it can be associated with an
++ * io_context or more, if it is async or shared between cooperating
++ * processes. @cgroup holds a reference to the cgroup, to be sure that it
++ * does not disappear while a bfqq still references it (mostly to avoid
++ * races between request issuing and task migration followed by cgroup
++ * destruction).
++ * All the fields are protected by the queue lock of the containing bfqd.
++ */
++struct bfq_queue {
++ atomic_t ref;
++ struct bfq_data *bfqd;
++
++ /* fields for cooperating queues handling */
++ struct bfq_queue *new_bfqq;
++ struct rb_node pos_node;
++ struct rb_root *pos_root;
++
++ struct rb_root sort_list;
++ struct request *next_rq;
++ int queued[2];
++ int allocated[2];
++ int meta_pending;
++ struct list_head fifo;
++
++ struct bfq_entity entity;
++
++ unsigned long max_budget;
++ unsigned long budget_timeout;
++
++ int dispatched;
++
++ unsigned int flags;
++
++ struct list_head bfqq_list;
++
++ unsigned int seek_samples;
++ u64 seek_total;
++ sector_t seek_mean;
++ sector_t last_request_pos;
++
++ unsigned int requests_within_timer;
++
++ pid_t pid;
++ struct bfq_io_cq *bic;
++
++ /* weight-raising fields */
++ unsigned long wr_cur_max_time;
++ unsigned long soft_rt_next_start;
++ unsigned long last_wr_start_finish;
++ unsigned int wr_coeff;
++ unsigned long last_idle_bklogged;
++ unsigned long service_from_backlogged;
++};
++
++/**
++ * struct bfq_ttime - per process thinktime stats.
++ * @ttime_total: total process thinktime
++ * @ttime_samples: number of thinktime samples
++ * @ttime_mean: average process thinktime
++ */
++struct bfq_ttime {
++ unsigned long last_end_request;
++
++ unsigned long ttime_total;
++ unsigned long ttime_samples;
++ unsigned long ttime_mean;
++};
++
++/**
++ * struct bfq_io_cq - per (request_queue, io_context) structure.
++ * @icq: associated io_cq structure
++ * @bfqq: array of two process queues, the sync and the async
++ * @ttime: associated @bfq_ttime struct
++ * @wr_time_left: snapshot of the time left before weight raising ends
++ * for the sync queue associated to this process; this
++ * snapshot is taken to remember this value while the weight
++ * raising is suspended because the queue is merged with a
++ * shared queue, and is used to set @raising_cur_max_time
++ * when the queue is split from the shared queue and its
++ * weight is raised again
++ * @saved_idle_window: same purpose as the previous field for the idle
++ * window
++ * @saved_IO_bound: same purpose as the previous two fields for the I/O
++ * bound classification of a queue
++ * @cooperations: counter of consecutive successful queue merges underwent
++ * by any of the process' @bfq_queues
++ * @failed_cooperations: counter of consecutive failed queue merges of any
++ * of the process' @bfq_queues
++ */
++struct bfq_io_cq {
++ struct io_cq icq; /* must be the first member */
++ struct bfq_queue *bfqq[2];
++ struct bfq_ttime ttime;
++ int ioprio;
++
++ unsigned int wr_time_left;
++ unsigned int saved_idle_window;
++ unsigned int saved_IO_bound;
++
++ unsigned int cooperations;
++ unsigned int failed_cooperations;
++};
++
++enum bfq_device_speed {
++ BFQ_BFQD_FAST,
++ BFQ_BFQD_SLOW,
++};
++
++/**
++ * struct bfq_data - per device data structure.
++ * @queue: request queue for the managed device.
++ * @root_group: root bfq_group for the device.
++ * @rq_pos_tree: rbtree sorted by next_request position, used when
++ * determining if two or more queues have interleaving
++ * requests (see bfq_close_cooperator()).
++ * @active_numerous_groups: number of bfq_groups containing more than one
++ * active @bfq_entity.
++ * @queue_weights_tree: rbtree of weight counters of @bfq_queues, sorted by
++ * weight. Used to keep track of whether all @bfq_queues
++ * have the same weight. The tree contains one counter
++ * for each distinct weight associated to some active
++ * and not weight-raised @bfq_queue (see the comments to
++ * the functions bfq_weights_tree_[add|remove] for
++ * further details).
++ * @group_weights_tree: rbtree of non-queue @bfq_entity weight counters, sorted
++ * by weight. Used to keep track of whether all
++ * @bfq_groups have the same weight. The tree contains
++ * one counter for each distinct weight associated to
++ * some active @bfq_group (see the comments to the
++ * functions bfq_weights_tree_[add|remove] for further
++ * details).
++ * @busy_queues: number of bfq_queues containing requests (including the
++ * queue in service, even if it is idling).
++ * @busy_in_flight_queues: number of @bfq_queues containing pending or
++ * in-flight requests, plus the @bfq_queue in
++ * service, even if idle but waiting for the
++ * possible arrival of its next sync request. This
++ * field is updated only if the device is rotational,
++ * but used only if the device is also NCQ-capable.
++ * The reason why the field is updated also for non-
++ * NCQ-capable rotational devices is related to the
++ * fact that the value of @hw_tag may be set also
++ * later than when busy_in_flight_queues may need to
++ * be incremented for the first time(s). Taking also
++ * this possibility into account, to avoid unbalanced
++ * increments/decrements, would imply more overhead
++ * than just updating busy_in_flight_queues
++ * regardless of the value of @hw_tag.
++ * @const_seeky_busy_in_flight_queues: number of constantly-seeky @bfq_queues
++ * (that is, seeky queues that expired
++ * for budget timeout at least once)
++ * containing pending or in-flight
++ * requests, including the in-service
++ * @bfq_queue if constantly seeky. This
++ * field is updated only if the device
++ * is rotational, but used only if the
++ * device is also NCQ-capable (see the
++ * comments to @busy_in_flight_queues).
++ * @wr_busy_queues: number of weight-raised busy @bfq_queues.
++ * @queued: number of queued requests.
++ * @rq_in_driver: number of requests dispatched and waiting for completion.
++ * @sync_flight: number of sync requests in the driver.
++ * @max_rq_in_driver: max number of reqs in driver in the last
++ * @hw_tag_samples completed requests.
++ * @hw_tag_samples: nr of samples used to calculate hw_tag.
++ * @hw_tag: flag set to one if the driver is showing a queueing behavior.
++ * @budgets_assigned: number of budgets assigned.
++ * @idle_slice_timer: timer set when idling for the next sequential request
++ * from the queue in service.
++ * @unplug_work: delayed work to restart dispatching on the request queue.
++ * @in_service_queue: bfq_queue in service.
++ * @in_service_bic: bfq_io_cq (bic) associated with the @in_service_queue.
++ * @last_position: on-disk position of the last served request.
++ * @last_budget_start: beginning of the last budget.
++ * @last_idling_start: beginning of the last idle slice.
++ * @peak_rate: peak transfer rate observed for a budget.
++ * @peak_rate_samples: number of samples used to calculate @peak_rate.
++ * @bfq_max_budget: maximum budget allotted to a bfq_queue before
++ * rescheduling.
++ * @group_list: list of all the bfq_groups active on the device.
++ * @active_list: list of all the bfq_queues active on the device.
++ * @idle_list: list of all the bfq_queues idle on the device.
++ * @bfq_quantum: max number of requests dispatched per dispatch round.
++ * @bfq_fifo_expire: timeout for async/sync requests; when it expires
++ * requests are served in fifo order.
++ * @bfq_back_penalty: weight of backward seeks wrt forward ones.
++ * @bfq_back_max: maximum allowed backward seek.
++ * @bfq_slice_idle: maximum idling time.
++ * @bfq_user_max_budget: user-configured max budget value
++ * (0 for auto-tuning).
++ * @bfq_max_budget_async_rq: maximum budget (in nr of requests) allotted to
++ * async queues.
++ * @bfq_timeout: timeout for bfq_queues to consume their budget; used to
++ * to prevent seeky queues to impose long latencies to well
++ * behaved ones (this also implies that seeky queues cannot
++ * receive guarantees in the service domain; after a timeout
++ * they are charged for the whole allocated budget, to try
++ * to preserve a behavior reasonably fair among them, but
++ * without service-domain guarantees).
++ * @bfq_coop_thresh: number of queue merges after which a @bfq_queue is
++ * no more granted any weight-raising.
++ * @bfq_failed_cooperations: number of consecutive failed cooperation
++ * chances after which weight-raising is restored
++ * to a queue subject to more than bfq_coop_thresh
++ * queue merges.
++ * @bfq_requests_within_timer: number of consecutive requests that must be
++ * issued within the idle time slice to set
++ * again idling to a queue which was marked as
++ * non-I/O-bound (see the definition of the
++ * IO_bound flag for further details).
++ * @bfq_wr_coeff: Maximum factor by which the weight of a weight-raised
++ * queue is multiplied
++ * @bfq_wr_max_time: maximum duration of a weight-raising period (jiffies)
++ * @bfq_wr_rt_max_time: maximum duration for soft real-time processes
++ * @bfq_wr_min_idle_time: minimum idle period after which weight-raising
++ * may be reactivated for a queue (in jiffies)
++ * @bfq_wr_min_inter_arr_async: minimum period between request arrivals
++ * after which weight-raising may be
++ * reactivated for an already busy queue
++ * (in jiffies)
++ * @bfq_wr_max_softrt_rate: max service-rate for a soft real-time queue,
++ * sectors per seconds
++ * @RT_prod: cached value of the product R*T used for computing the maximum
++ * duration of the weight raising automatically
++ * @device_speed: device-speed class for the low-latency heuristic
++ * @oom_bfqq: fallback dummy bfqq for extreme OOM conditions
++ *
++ * All the fields are protected by the @queue lock.
++ */
++struct bfq_data {
++ struct request_queue *queue;
++
++ struct bfq_group *root_group;
++ struct rb_root rq_pos_tree;
++
++#ifdef CONFIG_CGROUP_BFQIO
++ int active_numerous_groups;
++#endif
++
++ struct rb_root queue_weights_tree;
++ struct rb_root group_weights_tree;
++
++ int busy_queues;
++ int busy_in_flight_queues;
++ int const_seeky_busy_in_flight_queues;
++ int wr_busy_queues;
++ int queued;
++ int rq_in_driver;
++ int sync_flight;
++
++ int max_rq_in_driver;
++ int hw_tag_samples;
++ int hw_tag;
++
++ int budgets_assigned;
++
++ struct timer_list idle_slice_timer;
++ struct work_struct unplug_work;
++
++ struct bfq_queue *in_service_queue;
++ struct bfq_io_cq *in_service_bic;
++
++ sector_t last_position;
++
++ ktime_t last_budget_start;
++ ktime_t last_idling_start;
++ int peak_rate_samples;
++ u64 peak_rate;
++ unsigned long bfq_max_budget;
++
++ struct hlist_head group_list;
++ struct list_head active_list;
++ struct list_head idle_list;
++
++ unsigned int bfq_quantum;
++ unsigned int bfq_fifo_expire[2];
++ unsigned int bfq_back_penalty;
++ unsigned int bfq_back_max;
++ unsigned int bfq_slice_idle;
++ u64 bfq_class_idle_last_service;
++
++ unsigned int bfq_user_max_budget;
++ unsigned int bfq_max_budget_async_rq;
++ unsigned int bfq_timeout[2];
++
++ unsigned int bfq_coop_thresh;
++ unsigned int bfq_failed_cooperations;
++ unsigned int bfq_requests_within_timer;
++
++ bool low_latency;
++
++ /* parameters of the low_latency heuristics */
++ unsigned int bfq_wr_coeff;
++ unsigned int bfq_wr_max_time;
++ unsigned int bfq_wr_rt_max_time;
++ unsigned int bfq_wr_min_idle_time;
++ unsigned long bfq_wr_min_inter_arr_async;
++ unsigned int bfq_wr_max_softrt_rate;
++ u64 RT_prod;
++ enum bfq_device_speed device_speed;
++
++ struct bfq_queue oom_bfqq;
++};
++
++enum bfqq_state_flags {
++ BFQ_BFQQ_FLAG_busy = 0, /* has requests or is in service */
++ BFQ_BFQQ_FLAG_wait_request, /* waiting for a request */
++ BFQ_BFQQ_FLAG_must_alloc, /* must be allowed rq alloc */
++ BFQ_BFQQ_FLAG_fifo_expire, /* FIFO checked in this slice */
++ BFQ_BFQQ_FLAG_idle_window, /* slice idling enabled */
++ BFQ_BFQQ_FLAG_prio_changed, /* task priority has changed */
++ BFQ_BFQQ_FLAG_sync, /* synchronous queue */
++ BFQ_BFQQ_FLAG_budget_new, /* no completion with this budget */
++ BFQ_BFQQ_FLAG_IO_bound, /*
++ * bfqq has timed-out at least once
++ * having consumed at most 2/10 of
++ * its budget
++ */
++ BFQ_BFQQ_FLAG_constantly_seeky, /*
++ * bfqq has proved to be slow and
++ * seeky until budget timeout
++ */
++ BFQ_BFQQ_FLAG_softrt_update, /*
++ * may need softrt-next-start
++ * update
++ */
++ BFQ_BFQQ_FLAG_coop, /* bfqq is shared */
++ BFQ_BFQQ_FLAG_split_coop, /* shared bfqq will be split */
++ BFQ_BFQQ_FLAG_just_split, /* queue has just been split */
++};
++
++#define BFQ_BFQQ_FNS(name) \
++static inline void bfq_mark_bfqq_##name(struct bfq_queue *bfqq) \
++{ \
++ (bfqq)->flags |= (1 << BFQ_BFQQ_FLAG_##name); \
++} \
++static inline void bfq_clear_bfqq_##name(struct bfq_queue *bfqq) \
++{ \
++ (bfqq)->flags &= ~(1 << BFQ_BFQQ_FLAG_##name); \
++} \
++static inline int bfq_bfqq_##name(const struct bfq_queue *bfqq) \
++{ \
++ return ((bfqq)->flags & (1 << BFQ_BFQQ_FLAG_##name)) != 0; \
++}
++
++BFQ_BFQQ_FNS(busy);
++BFQ_BFQQ_FNS(wait_request);
++BFQ_BFQQ_FNS(must_alloc);
++BFQ_BFQQ_FNS(fifo_expire);
++BFQ_BFQQ_FNS(idle_window);
++BFQ_BFQQ_FNS(prio_changed);
++BFQ_BFQQ_FNS(sync);
++BFQ_BFQQ_FNS(budget_new);
++BFQ_BFQQ_FNS(IO_bound);
++BFQ_BFQQ_FNS(constantly_seeky);
++BFQ_BFQQ_FNS(coop);
++BFQ_BFQQ_FNS(split_coop);
++BFQ_BFQQ_FNS(just_split);
++BFQ_BFQQ_FNS(softrt_update);
++#undef BFQ_BFQQ_FNS
++
++/* Logging facilities. */
++#define bfq_log_bfqq(bfqd, bfqq, fmt, args...) \
++ blk_add_trace_msg((bfqd)->queue, "bfq%d " fmt, (bfqq)->pid, ##args)
++
++#define bfq_log(bfqd, fmt, args...) \
++ blk_add_trace_msg((bfqd)->queue, "bfq " fmt, ##args)
++
++/* Expiration reasons. */
++enum bfqq_expiration {
++ BFQ_BFQQ_TOO_IDLE = 0, /*
++ * queue has been idling for
++ * too long
++ */
++ BFQ_BFQQ_BUDGET_TIMEOUT, /* budget took too long to be used */
++ BFQ_BFQQ_BUDGET_EXHAUSTED, /* budget consumed */
++ BFQ_BFQQ_NO_MORE_REQUESTS, /* the queue has no more requests */
++};
++
++#ifdef CONFIG_CGROUP_BFQIO
++/**
++ * struct bfq_group - per (device, cgroup) data structure.
++ * @entity: schedulable entity to insert into the parent group sched_data.
++ * @sched_data: own sched_data, to contain child entities (they may be
++ * both bfq_queues and bfq_groups).
++ * @group_node: node to be inserted into the bfqio_cgroup->group_data
++ * list of the containing cgroup's bfqio_cgroup.
++ * @bfqd_node: node to be inserted into the @bfqd->group_list list
++ * of the groups active on the same device; used for cleanup.
++ * @bfqd: the bfq_data for the device this group acts upon.
++ * @async_bfqq: array of async queues for all the tasks belonging to
++ * the group, one queue per ioprio value per ioprio_class,
++ * except for the idle class that has only one queue.
++ * @async_idle_bfqq: async queue for the idle class (ioprio is ignored).
++ * @my_entity: pointer to @entity, %NULL for the toplevel group; used
++ * to avoid too many special cases during group creation/
++ * migration.
++ * @active_entities: number of active entities belonging to the group;
++ * unused for the root group. Used to know whether there
++ * are groups with more than one active @bfq_entity
++ * (see the comments to the function
++ * bfq_bfqq_must_not_expire()).
++ *
++ * Each (device, cgroup) pair has its own bfq_group, i.e., for each cgroup
++ * there is a set of bfq_groups, each one collecting the lower-level
++ * entities belonging to the group that are acting on the same device.
++ *
++ * Locking works as follows:
++ * o @group_node is protected by the bfqio_cgroup lock, and is accessed
++ * via RCU from its readers.
++ * o @bfqd is protected by the queue lock, RCU is used to access it
++ * from the readers.
++ * o All the other fields are protected by the @bfqd queue lock.
++ */
++struct bfq_group {
++ struct bfq_entity entity;
++ struct bfq_sched_data sched_data;
++
++ struct hlist_node group_node;
++ struct hlist_node bfqd_node;
++
++ void *bfqd;
++
++ struct bfq_queue *async_bfqq[2][IOPRIO_BE_NR];
++ struct bfq_queue *async_idle_bfqq;
++
++ struct bfq_entity *my_entity;
++
++ int active_entities;
++};
++
++/**
++ * struct bfqio_cgroup - bfq cgroup data structure.
++ * @css: subsystem state for bfq in the containing cgroup.
++ * @online: flag marked when the subsystem is inserted.
++ * @weight: cgroup weight.
++ * @ioprio: cgroup ioprio.
++ * @ioprio_class: cgroup ioprio_class.
++ * @lock: spinlock that protects @ioprio, @ioprio_class and @group_data.
++ * @group_data: list containing the bfq_group belonging to this cgroup.
++ *
++ * @group_data is accessed using RCU, with @lock protecting the updates,
++ * @ioprio and @ioprio_class are protected by @lock.
++ */
++struct bfqio_cgroup {
++ struct cgroup_subsys_state css;
++ bool online;
++
++ unsigned short weight, ioprio, ioprio_class;
++
++ spinlock_t lock;
++ struct hlist_head group_data;
++};
++#else
++struct bfq_group {
++ struct bfq_sched_data sched_data;
++
++ struct bfq_queue *async_bfqq[2][IOPRIO_BE_NR];
++ struct bfq_queue *async_idle_bfqq;
++};
++#endif
++
++static inline struct bfq_service_tree *
++bfq_entity_service_tree(struct bfq_entity *entity)
++{
++ struct bfq_sched_data *sched_data = entity->sched_data;
++ unsigned int idx = entity->ioprio_class - 1;
++
++ BUG_ON(idx >= BFQ_IOPRIO_CLASSES);
++ BUG_ON(sched_data == NULL);
++
++ return sched_data->service_tree + idx;
++}
++
++static inline struct bfq_queue *bic_to_bfqq(struct bfq_io_cq *bic,
++ int is_sync)
++{
++ return bic->bfqq[!!is_sync];
++}
++
++static inline void bic_set_bfqq(struct bfq_io_cq *bic,
++ struct bfq_queue *bfqq, int is_sync)
++{
++ bic->bfqq[!!is_sync] = bfqq;
++}
++
++static inline struct bfq_data *bic_to_bfqd(struct bfq_io_cq *bic)
++{
++ return bic->icq.q->elevator->elevator_data;
++}
++
++/**
++ * bfq_get_bfqd_locked - get a lock to a bfqd using a RCU protected pointer.
++ * @ptr: a pointer to a bfqd.
++ * @flags: storage for the flags to be saved.
++ *
++ * This function allows bfqg->bfqd to be protected by the
++ * queue lock of the bfqd they reference; the pointer is dereferenced
++ * under RCU, so the storage for bfqd is assured to be safe as long
++ * as the RCU read side critical section does not end. After the
++ * bfqd->queue->queue_lock is taken the pointer is rechecked, to be
++ * sure that no other writer accessed it. If we raced with a writer,
++ * the function returns NULL, with the queue unlocked, otherwise it
++ * returns the dereferenced pointer, with the queue locked.
++ */
++static inline struct bfq_data *bfq_get_bfqd_locked(void **ptr,
++ unsigned long *flags)
++{
++ struct bfq_data *bfqd;
++
++ rcu_read_lock();
++ bfqd = rcu_dereference(*(struct bfq_data **)ptr);
++
++ if (bfqd != NULL) {
++ spin_lock_irqsave(bfqd->queue->queue_lock, *flags);
++ if (*ptr == bfqd)
++ goto out;
++ spin_unlock_irqrestore(bfqd->queue->queue_lock, *flags);
++ }
++
++ bfqd = NULL;
++out:
++ rcu_read_unlock();
++ return bfqd;
++}
++
++static inline void bfq_put_bfqd_unlock(struct bfq_data *bfqd,
++ unsigned long *flags)
++{
++ spin_unlock_irqrestore(bfqd->queue->queue_lock, *flags);
++}
++
++static void bfq_changed_ioprio(struct bfq_io_cq *bic);
++static void bfq_put_queue(struct bfq_queue *bfqq);
++static void bfq_dispatch_insert(struct request_queue *q, struct request *rq);
++static struct bfq_queue *bfq_get_queue(struct bfq_data *bfqd,
++ struct bfq_group *bfqg, int is_sync,
++ struct bfq_io_cq *bic, gfp_t gfp_mask);
++static void bfq_end_wr_async_queues(struct bfq_data *bfqd,
++ struct bfq_group *bfqg);
++static void bfq_put_async_queues(struct bfq_data *bfqd, struct bfq_group *bfqg);
++static void bfq_exit_bfqq(struct bfq_data *bfqd, struct bfq_queue *bfqq);
++
++#endif /* _BFQ_H */
diff -Nur linux-3.14.54.orig/block/bfq-ioc.c linux-3.14.54/block/bfq-ioc.c
--- linux-3.14.54.orig/block/bfq-ioc.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/block/bfq-ioc.c 2015-10-12 10:56:17.939351169 +0200
++++ linux-3.14.54/block/bfq-ioc.c 2015-10-15 15:51:25.004671628 +0200
@@ -0,0 +1,36 @@
+/*
+ * BFQ: I/O context handling.
@@ -45709,7 +45197,7 @@ diff -Nur linux-3.14.54.orig/block/bfq-ioc.c linux-3.14.54/block/bfq-ioc.c
+}
diff -Nur linux-3.14.54.orig/block/bfq-iosched.c linux-3.14.54/block/bfq-iosched.c
--- linux-3.14.54.orig/block/bfq-iosched.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/block/bfq-iosched.c 2015-10-12 10:56:17.941351169 +0200
++++ linux-3.14.54/block/bfq-iosched.c 2015-10-15 15:51:25.012671103 +0200
@@ -0,0 +1,3919 @@
+/*
+ * Budget Fair Queueing (BFQ) disk scheduler.
@@ -49632,7 +49120,7 @@ diff -Nur linux-3.14.54.orig/block/bfq-iosched.c linux-3.14.54/block/bfq-iosched
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/block/bfq-sched.c linux-3.14.54/block/bfq-sched.c
--- linux-3.14.54.orig/block/bfq-sched.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/block/bfq-sched.c 2015-10-12 10:56:17.941351169 +0200
++++ linux-3.14.54/block/bfq-sched.c 2015-10-15 15:51:25.016670839 +0200
@@ -0,0 +1,1179 @@
+/*
+ * BFQ: Hierarchical B-WF2Q+ scheduler.
@@ -50813,783 +50301,9 @@ diff -Nur linux-3.14.54.orig/block/bfq-sched.c linux-3.14.54/block/bfq-sched.c
+ if (bfqq->wr_coeff > 1)
+ bfqd->wr_busy_queues++;
+}
-diff -Nur linux-3.14.54.orig/block/bfq.h linux-3.14.54/block/bfq.h
---- linux-3.14.54.orig/block/bfq.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/block/bfq.h 2015-10-12 10:56:17.939351169 +0200
-@@ -0,0 +1,770 @@
-+/*
-+ * BFQ-v7r5 for 3.14.0: data structures and common functions prototypes.
-+ *
-+ * Based on ideas and code from CFQ:
-+ * Copyright (C) 2003 Jens Axboe <axboe@kernel.dk>
-+ *
-+ * Copyright (C) 2008 Fabio Checconi <fabio@gandalf.sssup.it>
-+ * Paolo Valente <paolo.valente@unimore.it>
-+ *
-+ * Copyright (C) 2010 Paolo Valente <paolo.valente@unimore.it>
-+ */
-+
-+#ifndef _BFQ_H
-+#define _BFQ_H
-+
-+#include <linux/blktrace_api.h>
-+#include <linux/hrtimer.h>
-+#include <linux/ioprio.h>
-+#include <linux/rbtree.h>
-+
-+#define BFQ_IOPRIO_CLASSES 3
-+#define BFQ_CL_IDLE_TIMEOUT (HZ/5)
-+
-+#define BFQ_MIN_WEIGHT 1
-+#define BFQ_MAX_WEIGHT 1000
-+
-+#define BFQ_DEFAULT_GRP_WEIGHT 10
-+#define BFQ_DEFAULT_GRP_IOPRIO 0
-+#define BFQ_DEFAULT_GRP_CLASS IOPRIO_CLASS_BE
-+
-+struct bfq_entity;
-+
-+/**
-+ * struct bfq_service_tree - per ioprio_class service tree.
-+ * @active: tree for active entities (i.e., those backlogged).
-+ * @idle: tree for idle entities (i.e., those not backlogged, with V <= F_i).
-+ * @first_idle: idle entity with minimum F_i.
-+ * @last_idle: idle entity with maximum F_i.
-+ * @vtime: scheduler virtual time.
-+ * @wsum: scheduler weight sum; active and idle entities contribute to it.
-+ *
-+ * Each service tree represents a B-WF2Q+ scheduler on its own. Each
-+ * ioprio_class has its own independent scheduler, and so its own
-+ * bfq_service_tree. All the fields are protected by the queue lock
-+ * of the containing bfqd.
-+ */
-+struct bfq_service_tree {
-+ struct rb_root active;
-+ struct rb_root idle;
-+
-+ struct bfq_entity *first_idle;
-+ struct bfq_entity *last_idle;
-+
-+ u64 vtime;
-+ unsigned long wsum;
-+};
-+
-+/**
-+ * struct bfq_sched_data - multi-class scheduler.
-+ * @in_service_entity: entity in service.
-+ * @next_in_service: head-of-the-line entity in the scheduler.
-+ * @service_tree: array of service trees, one per ioprio_class.
-+ *
-+ * bfq_sched_data is the basic scheduler queue. It supports three
-+ * ioprio_classes, and can be used either as a toplevel queue or as
-+ * an intermediate queue on a hierarchical setup.
-+ * @next_in_service points to the active entity of the sched_data
-+ * service trees that will be scheduled next.
-+ *
-+ * The supported ioprio_classes are the same as in CFQ, in descending
-+ * priority order, IOPRIO_CLASS_RT, IOPRIO_CLASS_BE, IOPRIO_CLASS_IDLE.
-+ * Requests from higher priority queues are served before all the
-+ * requests from lower priority queues; among requests of the same
-+ * queue requests are served according to B-WF2Q+.
-+ * All the fields are protected by the queue lock of the containing bfqd.
-+ */
-+struct bfq_sched_data {
-+ struct bfq_entity *in_service_entity;
-+ struct bfq_entity *next_in_service;
-+ struct bfq_service_tree service_tree[BFQ_IOPRIO_CLASSES];
-+};
-+
-+/**
-+ * struct bfq_weight_counter - counter of the number of all active entities
-+ * with a given weight.
-+ * @weight: weight of the entities that this counter refers to.
-+ * @num_active: number of active entities with this weight.
-+ * @weights_node: weights tree member (see bfq_data's @queue_weights_tree
-+ * and @group_weights_tree).
-+ */
-+struct bfq_weight_counter {
-+ short int weight;
-+ unsigned int num_active;
-+ struct rb_node weights_node;
-+};
-+
-+/**
-+ * struct bfq_entity - schedulable entity.
-+ * @rb_node: service_tree member.
-+ * @weight_counter: pointer to the weight counter associated with this entity.
-+ * @on_st: flag, true if the entity is on a tree (either the active or
-+ * the idle one of its service_tree).
-+ * @finish: B-WF2Q+ finish timestamp (aka F_i).
-+ * @start: B-WF2Q+ start timestamp (aka S_i).
-+ * @tree: tree the entity is enqueued into; %NULL if not on a tree.
-+ * @min_start: minimum start time of the (active) subtree rooted at
-+ * this entity; used for O(log N) lookups into active trees.
-+ * @service: service received during the last round of service.
-+ * @budget: budget used to calculate F_i; F_i = S_i + @budget / @weight.
-+ * @weight: weight of the queue
-+ * @parent: parent entity, for hierarchical scheduling.
-+ * @my_sched_data: for non-leaf nodes in the cgroup hierarchy, the
-+ * associated scheduler queue, %NULL on leaf nodes.
-+ * @sched_data: the scheduler queue this entity belongs to.
-+ * @ioprio: the ioprio in use.
-+ * @new_weight: when a weight change is requested, the new weight value.
-+ * @orig_weight: original weight, used to implement weight boosting
-+ * @new_ioprio: when an ioprio change is requested, the new ioprio value.
-+ * @ioprio_class: the ioprio_class in use.
-+ * @new_ioprio_class: when an ioprio_class change is requested, the new
-+ * ioprio_class value.
-+ * @ioprio_changed: flag, true when the user requested a weight, ioprio or
-+ * ioprio_class change.
-+ *
-+ * A bfq_entity is used to represent either a bfq_queue (leaf node in the
-+ * cgroup hierarchy) or a bfq_group into the upper level scheduler. Each
-+ * entity belongs to the sched_data of the parent group in the cgroup
-+ * hierarchy. Non-leaf entities have also their own sched_data, stored
-+ * in @my_sched_data.
-+ *
-+ * Each entity stores independently its priority values; this would
-+ * allow different weights on different devices, but this
-+ * functionality is not exported to userspace by now. Priorities and
-+ * weights are updated lazily, first storing the new values into the
-+ * new_* fields, then setting the @ioprio_changed flag. As soon as
-+ * there is a transition in the entity state that allows the priority
-+ * update to take place the effective and the requested priority
-+ * values are synchronized.
-+ *
-+ * Unless cgroups are used, the weight value is calculated from the
-+ * ioprio to export the same interface as CFQ. When dealing with
-+ * ``well-behaved'' queues (i.e., queues that do not spend too much
-+ * time to consume their budget and have true sequential behavior, and
-+ * when there are no external factors breaking anticipation) the
-+ * relative weights at each level of the cgroups hierarchy should be
-+ * guaranteed. All the fields are protected by the queue lock of the
-+ * containing bfqd.
-+ */
-+struct bfq_entity {
-+ struct rb_node rb_node;
-+ struct bfq_weight_counter *weight_counter;
-+
-+ int on_st;
-+
-+ u64 finish;
-+ u64 start;
-+
-+ struct rb_root *tree;
-+
-+ u64 min_start;
-+
-+ unsigned long service, budget;
-+ unsigned short weight, new_weight;
-+ unsigned short orig_weight;
-+
-+ struct bfq_entity *parent;
-+
-+ struct bfq_sched_data *my_sched_data;
-+ struct bfq_sched_data *sched_data;
-+
-+ unsigned short ioprio, new_ioprio;
-+ unsigned short ioprio_class, new_ioprio_class;
-+
-+ int ioprio_changed;
-+};
-+
-+struct bfq_group;
-+
-+/**
-+ * struct bfq_queue - leaf schedulable entity.
-+ * @ref: reference counter.
-+ * @bfqd: parent bfq_data.
-+ * @new_bfqq: shared bfq_queue if queue is cooperating with
-+ * one or more other queues.
-+ * @pos_node: request-position tree member (see bfq_data's @rq_pos_tree).
-+ * @pos_root: request-position tree root (see bfq_data's @rq_pos_tree).
-+ * @sort_list: sorted list of pending requests.
-+ * @next_rq: if fifo isn't expired, next request to serve.
-+ * @queued: nr of requests queued in @sort_list.
-+ * @allocated: currently allocated requests.
-+ * @meta_pending: pending metadata requests.
-+ * @fifo: fifo list of requests in sort_list.
-+ * @entity: entity representing this queue in the scheduler.
-+ * @max_budget: maximum budget allowed from the feedback mechanism.
-+ * @budget_timeout: budget expiration (in jiffies).
-+ * @dispatched: number of requests on the dispatch list or inside driver.
-+ * @flags: status flags.
-+ * @bfqq_list: node for active/idle bfqq list inside our bfqd.
-+ * @seek_samples: number of seeks sampled
-+ * @seek_total: sum of the distances of the seeks sampled
-+ * @seek_mean: mean seek distance
-+ * @last_request_pos: position of the last request enqueued
-+ * @requests_within_timer: number of consecutive pairs of request completion
-+ * and arrival, such that the queue becomes idle
-+ * after the completion, but the next request arrives
-+ * within an idle time slice; used only if the queue's
-+ * IO_bound has been cleared.
-+ * @pid: pid of the process owning the queue, used for logging purposes.
-+ * @last_wr_start_finish: start time of the current weight-raising period if
-+ * the @bfq-queue is being weight-raised, otherwise
-+ * finish time of the last weight-raising period
-+ * @wr_cur_max_time: current max raising time for this queue
-+ * @soft_rt_next_start: minimum time instant such that, only if a new
-+ * request is enqueued after this time instant in an
-+ * idle @bfq_queue with no outstanding requests, then
-+ * the task associated with the queue it is deemed as
-+ * soft real-time (see the comments to the function
-+ * bfq_bfqq_softrt_next_start())
-+ * @last_idle_bklogged: time of the last transition of the @bfq_queue from
-+ * idle to backlogged
-+ * @service_from_backlogged: cumulative service received from the @bfq_queue
-+ * since the last transition from idle to
-+ * backlogged
-+ * @bic: pointer to the bfq_io_cq owning the bfq_queue, set to %NULL if the
-+ * queue is shared
-+ *
-+ * A bfq_queue is a leaf request queue; it can be associated with an
-+ * io_context or more, if it is async or shared between cooperating
-+ * processes. @cgroup holds a reference to the cgroup, to be sure that it
-+ * does not disappear while a bfqq still references it (mostly to avoid
-+ * races between request issuing and task migration followed by cgroup
-+ * destruction).
-+ * All the fields are protected by the queue lock of the containing bfqd.
-+ */
-+struct bfq_queue {
-+ atomic_t ref;
-+ struct bfq_data *bfqd;
-+
-+ /* fields for cooperating queues handling */
-+ struct bfq_queue *new_bfqq;
-+ struct rb_node pos_node;
-+ struct rb_root *pos_root;
-+
-+ struct rb_root sort_list;
-+ struct request *next_rq;
-+ int queued[2];
-+ int allocated[2];
-+ int meta_pending;
-+ struct list_head fifo;
-+
-+ struct bfq_entity entity;
-+
-+ unsigned long max_budget;
-+ unsigned long budget_timeout;
-+
-+ int dispatched;
-+
-+ unsigned int flags;
-+
-+ struct list_head bfqq_list;
-+
-+ unsigned int seek_samples;
-+ u64 seek_total;
-+ sector_t seek_mean;
-+ sector_t last_request_pos;
-+
-+ unsigned int requests_within_timer;
-+
-+ pid_t pid;
-+ struct bfq_io_cq *bic;
-+
-+ /* weight-raising fields */
-+ unsigned long wr_cur_max_time;
-+ unsigned long soft_rt_next_start;
-+ unsigned long last_wr_start_finish;
-+ unsigned int wr_coeff;
-+ unsigned long last_idle_bklogged;
-+ unsigned long service_from_backlogged;
-+};
-+
-+/**
-+ * struct bfq_ttime - per process thinktime stats.
-+ * @ttime_total: total process thinktime
-+ * @ttime_samples: number of thinktime samples
-+ * @ttime_mean: average process thinktime
-+ */
-+struct bfq_ttime {
-+ unsigned long last_end_request;
-+
-+ unsigned long ttime_total;
-+ unsigned long ttime_samples;
-+ unsigned long ttime_mean;
-+};
-+
-+/**
-+ * struct bfq_io_cq - per (request_queue, io_context) structure.
-+ * @icq: associated io_cq structure
-+ * @bfqq: array of two process queues, the sync and the async
-+ * @ttime: associated @bfq_ttime struct
-+ * @wr_time_left: snapshot of the time left before weight raising ends
-+ * for the sync queue associated to this process; this
-+ * snapshot is taken to remember this value while the weight
-+ * raising is suspended because the queue is merged with a
-+ * shared queue, and is used to set @raising_cur_max_time
-+ * when the queue is split from the shared queue and its
-+ * weight is raised again
-+ * @saved_idle_window: same purpose as the previous field for the idle
-+ * window
-+ * @saved_IO_bound: same purpose as the previous two fields for the I/O
-+ * bound classification of a queue
-+ * @cooperations: counter of consecutive successful queue merges underwent
-+ * by any of the process' @bfq_queues
-+ * @failed_cooperations: counter of consecutive failed queue merges of any
-+ * of the process' @bfq_queues
-+ */
-+struct bfq_io_cq {
-+ struct io_cq icq; /* must be the first member */
-+ struct bfq_queue *bfqq[2];
-+ struct bfq_ttime ttime;
-+ int ioprio;
-+
-+ unsigned int wr_time_left;
-+ unsigned int saved_idle_window;
-+ unsigned int saved_IO_bound;
-+
-+ unsigned int cooperations;
-+ unsigned int failed_cooperations;
-+};
-+
-+enum bfq_device_speed {
-+ BFQ_BFQD_FAST,
-+ BFQ_BFQD_SLOW,
-+};
-+
-+/**
-+ * struct bfq_data - per device data structure.
-+ * @queue: request queue for the managed device.
-+ * @root_group: root bfq_group for the device.
-+ * @rq_pos_tree: rbtree sorted by next_request position, used when
-+ * determining if two or more queues have interleaving
-+ * requests (see bfq_close_cooperator()).
-+ * @active_numerous_groups: number of bfq_groups containing more than one
-+ * active @bfq_entity.
-+ * @queue_weights_tree: rbtree of weight counters of @bfq_queues, sorted by
-+ * weight. Used to keep track of whether all @bfq_queues
-+ * have the same weight. The tree contains one counter
-+ * for each distinct weight associated to some active
-+ * and not weight-raised @bfq_queue (see the comments to
-+ * the functions bfq_weights_tree_[add|remove] for
-+ * further details).
-+ * @group_weights_tree: rbtree of non-queue @bfq_entity weight counters, sorted
-+ * by weight. Used to keep track of whether all
-+ * @bfq_groups have the same weight. The tree contains
-+ * one counter for each distinct weight associated to
-+ * some active @bfq_group (see the comments to the
-+ * functions bfq_weights_tree_[add|remove] for further
-+ * details).
-+ * @busy_queues: number of bfq_queues containing requests (including the
-+ * queue in service, even if it is idling).
-+ * @busy_in_flight_queues: number of @bfq_queues containing pending or
-+ * in-flight requests, plus the @bfq_queue in
-+ * service, even if idle but waiting for the
-+ * possible arrival of its next sync request. This
-+ * field is updated only if the device is rotational,
-+ * but used only if the device is also NCQ-capable.
-+ * The reason why the field is updated also for non-
-+ * NCQ-capable rotational devices is related to the
-+ * fact that the value of @hw_tag may be set also
-+ * later than when busy_in_flight_queues may need to
-+ * be incremented for the first time(s). Taking also
-+ * this possibility into account, to avoid unbalanced
-+ * increments/decrements, would imply more overhead
-+ * than just updating busy_in_flight_queues
-+ * regardless of the value of @hw_tag.
-+ * @const_seeky_busy_in_flight_queues: number of constantly-seeky @bfq_queues
-+ * (that is, seeky queues that expired
-+ * for budget timeout at least once)
-+ * containing pending or in-flight
-+ * requests, including the in-service
-+ * @bfq_queue if constantly seeky. This
-+ * field is updated only if the device
-+ * is rotational, but used only if the
-+ * device is also NCQ-capable (see the
-+ * comments to @busy_in_flight_queues).
-+ * @wr_busy_queues: number of weight-raised busy @bfq_queues.
-+ * @queued: number of queued requests.
-+ * @rq_in_driver: number of requests dispatched and waiting for completion.
-+ * @sync_flight: number of sync requests in the driver.
-+ * @max_rq_in_driver: max number of reqs in driver in the last
-+ * @hw_tag_samples completed requests.
-+ * @hw_tag_samples: nr of samples used to calculate hw_tag.
-+ * @hw_tag: flag set to one if the driver is showing a queueing behavior.
-+ * @budgets_assigned: number of budgets assigned.
-+ * @idle_slice_timer: timer set when idling for the next sequential request
-+ * from the queue in service.
-+ * @unplug_work: delayed work to restart dispatching on the request queue.
-+ * @in_service_queue: bfq_queue in service.
-+ * @in_service_bic: bfq_io_cq (bic) associated with the @in_service_queue.
-+ * @last_position: on-disk position of the last served request.
-+ * @last_budget_start: beginning of the last budget.
-+ * @last_idling_start: beginning of the last idle slice.
-+ * @peak_rate: peak transfer rate observed for a budget.
-+ * @peak_rate_samples: number of samples used to calculate @peak_rate.
-+ * @bfq_max_budget: maximum budget allotted to a bfq_queue before
-+ * rescheduling.
-+ * @group_list: list of all the bfq_groups active on the device.
-+ * @active_list: list of all the bfq_queues active on the device.
-+ * @idle_list: list of all the bfq_queues idle on the device.
-+ * @bfq_quantum: max number of requests dispatched per dispatch round.
-+ * @bfq_fifo_expire: timeout for async/sync requests; when it expires
-+ * requests are served in fifo order.
-+ * @bfq_back_penalty: weight of backward seeks wrt forward ones.
-+ * @bfq_back_max: maximum allowed backward seek.
-+ * @bfq_slice_idle: maximum idling time.
-+ * @bfq_user_max_budget: user-configured max budget value
-+ * (0 for auto-tuning).
-+ * @bfq_max_budget_async_rq: maximum budget (in nr of requests) allotted to
-+ * async queues.
-+ * @bfq_timeout: timeout for bfq_queues to consume their budget; used to
-+ * to prevent seeky queues to impose long latencies to well
-+ * behaved ones (this also implies that seeky queues cannot
-+ * receive guarantees in the service domain; after a timeout
-+ * they are charged for the whole allocated budget, to try
-+ * to preserve a behavior reasonably fair among them, but
-+ * without service-domain guarantees).
-+ * @bfq_coop_thresh: number of queue merges after which a @bfq_queue is
-+ * no more granted any weight-raising.
-+ * @bfq_failed_cooperations: number of consecutive failed cooperation
-+ * chances after which weight-raising is restored
-+ * to a queue subject to more than bfq_coop_thresh
-+ * queue merges.
-+ * @bfq_requests_within_timer: number of consecutive requests that must be
-+ * issued within the idle time slice to set
-+ * again idling to a queue which was marked as
-+ * non-I/O-bound (see the definition of the
-+ * IO_bound flag for further details).
-+ * @bfq_wr_coeff: Maximum factor by which the weight of a weight-raised
-+ * queue is multiplied
-+ * @bfq_wr_max_time: maximum duration of a weight-raising period (jiffies)
-+ * @bfq_wr_rt_max_time: maximum duration for soft real-time processes
-+ * @bfq_wr_min_idle_time: minimum idle period after which weight-raising
-+ * may be reactivated for a queue (in jiffies)
-+ * @bfq_wr_min_inter_arr_async: minimum period between request arrivals
-+ * after which weight-raising may be
-+ * reactivated for an already busy queue
-+ * (in jiffies)
-+ * @bfq_wr_max_softrt_rate: max service-rate for a soft real-time queue,
-+ * sectors per seconds
-+ * @RT_prod: cached value of the product R*T used for computing the maximum
-+ * duration of the weight raising automatically
-+ * @device_speed: device-speed class for the low-latency heuristic
-+ * @oom_bfqq: fallback dummy bfqq for extreme OOM conditions
-+ *
-+ * All the fields are protected by the @queue lock.
-+ */
-+struct bfq_data {
-+ struct request_queue *queue;
-+
-+ struct bfq_group *root_group;
-+ struct rb_root rq_pos_tree;
-+
-+#ifdef CONFIG_CGROUP_BFQIO
-+ int active_numerous_groups;
-+#endif
-+
-+ struct rb_root queue_weights_tree;
-+ struct rb_root group_weights_tree;
-+
-+ int busy_queues;
-+ int busy_in_flight_queues;
-+ int const_seeky_busy_in_flight_queues;
-+ int wr_busy_queues;
-+ int queued;
-+ int rq_in_driver;
-+ int sync_flight;
-+
-+ int max_rq_in_driver;
-+ int hw_tag_samples;
-+ int hw_tag;
-+
-+ int budgets_assigned;
-+
-+ struct timer_list idle_slice_timer;
-+ struct work_struct unplug_work;
-+
-+ struct bfq_queue *in_service_queue;
-+ struct bfq_io_cq *in_service_bic;
-+
-+ sector_t last_position;
-+
-+ ktime_t last_budget_start;
-+ ktime_t last_idling_start;
-+ int peak_rate_samples;
-+ u64 peak_rate;
-+ unsigned long bfq_max_budget;
-+
-+ struct hlist_head group_list;
-+ struct list_head active_list;
-+ struct list_head idle_list;
-+
-+ unsigned int bfq_quantum;
-+ unsigned int bfq_fifo_expire[2];
-+ unsigned int bfq_back_penalty;
-+ unsigned int bfq_back_max;
-+ unsigned int bfq_slice_idle;
-+ u64 bfq_class_idle_last_service;
-+
-+ unsigned int bfq_user_max_budget;
-+ unsigned int bfq_max_budget_async_rq;
-+ unsigned int bfq_timeout[2];
-+
-+ unsigned int bfq_coop_thresh;
-+ unsigned int bfq_failed_cooperations;
-+ unsigned int bfq_requests_within_timer;
-+
-+ bool low_latency;
-+
-+ /* parameters of the low_latency heuristics */
-+ unsigned int bfq_wr_coeff;
-+ unsigned int bfq_wr_max_time;
-+ unsigned int bfq_wr_rt_max_time;
-+ unsigned int bfq_wr_min_idle_time;
-+ unsigned long bfq_wr_min_inter_arr_async;
-+ unsigned int bfq_wr_max_softrt_rate;
-+ u64 RT_prod;
-+ enum bfq_device_speed device_speed;
-+
-+ struct bfq_queue oom_bfqq;
-+};
-+
-+enum bfqq_state_flags {
-+ BFQ_BFQQ_FLAG_busy = 0, /* has requests or is in service */
-+ BFQ_BFQQ_FLAG_wait_request, /* waiting for a request */
-+ BFQ_BFQQ_FLAG_must_alloc, /* must be allowed rq alloc */
-+ BFQ_BFQQ_FLAG_fifo_expire, /* FIFO checked in this slice */
-+ BFQ_BFQQ_FLAG_idle_window, /* slice idling enabled */
-+ BFQ_BFQQ_FLAG_prio_changed, /* task priority has changed */
-+ BFQ_BFQQ_FLAG_sync, /* synchronous queue */
-+ BFQ_BFQQ_FLAG_budget_new, /* no completion with this budget */
-+ BFQ_BFQQ_FLAG_IO_bound, /*
-+ * bfqq has timed-out at least once
-+ * having consumed at most 2/10 of
-+ * its budget
-+ */
-+ BFQ_BFQQ_FLAG_constantly_seeky, /*
-+ * bfqq has proved to be slow and
-+ * seeky until budget timeout
-+ */
-+ BFQ_BFQQ_FLAG_softrt_update, /*
-+ * may need softrt-next-start
-+ * update
-+ */
-+ BFQ_BFQQ_FLAG_coop, /* bfqq is shared */
-+ BFQ_BFQQ_FLAG_split_coop, /* shared bfqq will be split */
-+ BFQ_BFQQ_FLAG_just_split, /* queue has just been split */
-+};
-+
-+#define BFQ_BFQQ_FNS(name) \
-+static inline void bfq_mark_bfqq_##name(struct bfq_queue *bfqq) \
-+{ \
-+ (bfqq)->flags |= (1 << BFQ_BFQQ_FLAG_##name); \
-+} \
-+static inline void bfq_clear_bfqq_##name(struct bfq_queue *bfqq) \
-+{ \
-+ (bfqq)->flags &= ~(1 << BFQ_BFQQ_FLAG_##name); \
-+} \
-+static inline int bfq_bfqq_##name(const struct bfq_queue *bfqq) \
-+{ \
-+ return ((bfqq)->flags & (1 << BFQ_BFQQ_FLAG_##name)) != 0; \
-+}
-+
-+BFQ_BFQQ_FNS(busy);
-+BFQ_BFQQ_FNS(wait_request);
-+BFQ_BFQQ_FNS(must_alloc);
-+BFQ_BFQQ_FNS(fifo_expire);
-+BFQ_BFQQ_FNS(idle_window);
-+BFQ_BFQQ_FNS(prio_changed);
-+BFQ_BFQQ_FNS(sync);
-+BFQ_BFQQ_FNS(budget_new);
-+BFQ_BFQQ_FNS(IO_bound);
-+BFQ_BFQQ_FNS(constantly_seeky);
-+BFQ_BFQQ_FNS(coop);
-+BFQ_BFQQ_FNS(split_coop);
-+BFQ_BFQQ_FNS(just_split);
-+BFQ_BFQQ_FNS(softrt_update);
-+#undef BFQ_BFQQ_FNS
-+
-+/* Logging facilities. */
-+#define bfq_log_bfqq(bfqd, bfqq, fmt, args...) \
-+ blk_add_trace_msg((bfqd)->queue, "bfq%d " fmt, (bfqq)->pid, ##args)
-+
-+#define bfq_log(bfqd, fmt, args...) \
-+ blk_add_trace_msg((bfqd)->queue, "bfq " fmt, ##args)
-+
-+/* Expiration reasons. */
-+enum bfqq_expiration {
-+ BFQ_BFQQ_TOO_IDLE = 0, /*
-+ * queue has been idling for
-+ * too long
-+ */
-+ BFQ_BFQQ_BUDGET_TIMEOUT, /* budget took too long to be used */
-+ BFQ_BFQQ_BUDGET_EXHAUSTED, /* budget consumed */
-+ BFQ_BFQQ_NO_MORE_REQUESTS, /* the queue has no more requests */
-+};
-+
-+#ifdef CONFIG_CGROUP_BFQIO
-+/**
-+ * struct bfq_group - per (device, cgroup) data structure.
-+ * @entity: schedulable entity to insert into the parent group sched_data.
-+ * @sched_data: own sched_data, to contain child entities (they may be
-+ * both bfq_queues and bfq_groups).
-+ * @group_node: node to be inserted into the bfqio_cgroup->group_data
-+ * list of the containing cgroup's bfqio_cgroup.
-+ * @bfqd_node: node to be inserted into the @bfqd->group_list list
-+ * of the groups active on the same device; used for cleanup.
-+ * @bfqd: the bfq_data for the device this group acts upon.
-+ * @async_bfqq: array of async queues for all the tasks belonging to
-+ * the group, one queue per ioprio value per ioprio_class,
-+ * except for the idle class that has only one queue.
-+ * @async_idle_bfqq: async queue for the idle class (ioprio is ignored).
-+ * @my_entity: pointer to @entity, %NULL for the toplevel group; used
-+ * to avoid too many special cases during group creation/
-+ * migration.
-+ * @active_entities: number of active entities belonging to the group;
-+ * unused for the root group. Used to know whether there
-+ * are groups with more than one active @bfq_entity
-+ * (see the comments to the function
-+ * bfq_bfqq_must_not_expire()).
-+ *
-+ * Each (device, cgroup) pair has its own bfq_group, i.e., for each cgroup
-+ * there is a set of bfq_groups, each one collecting the lower-level
-+ * entities belonging to the group that are acting on the same device.
-+ *
-+ * Locking works as follows:
-+ * o @group_node is protected by the bfqio_cgroup lock, and is accessed
-+ * via RCU from its readers.
-+ * o @bfqd is protected by the queue lock, RCU is used to access it
-+ * from the readers.
-+ * o All the other fields are protected by the @bfqd queue lock.
-+ */
-+struct bfq_group {
-+ struct bfq_entity entity;
-+ struct bfq_sched_data sched_data;
-+
-+ struct hlist_node group_node;
-+ struct hlist_node bfqd_node;
-+
-+ void *bfqd;
-+
-+ struct bfq_queue *async_bfqq[2][IOPRIO_BE_NR];
-+ struct bfq_queue *async_idle_bfqq;
-+
-+ struct bfq_entity *my_entity;
-+
-+ int active_entities;
-+};
-+
-+/**
-+ * struct bfqio_cgroup - bfq cgroup data structure.
-+ * @css: subsystem state for bfq in the containing cgroup.
-+ * @online: flag marked when the subsystem is inserted.
-+ * @weight: cgroup weight.
-+ * @ioprio: cgroup ioprio.
-+ * @ioprio_class: cgroup ioprio_class.
-+ * @lock: spinlock that protects @ioprio, @ioprio_class and @group_data.
-+ * @group_data: list containing the bfq_group belonging to this cgroup.
-+ *
-+ * @group_data is accessed using RCU, with @lock protecting the updates,
-+ * @ioprio and @ioprio_class are protected by @lock.
-+ */
-+struct bfqio_cgroup {
-+ struct cgroup_subsys_state css;
-+ bool online;
-+
-+ unsigned short weight, ioprio, ioprio_class;
-+
-+ spinlock_t lock;
-+ struct hlist_head group_data;
-+};
-+#else
-+struct bfq_group {
-+ struct bfq_sched_data sched_data;
-+
-+ struct bfq_queue *async_bfqq[2][IOPRIO_BE_NR];
-+ struct bfq_queue *async_idle_bfqq;
-+};
-+#endif
-+
-+static inline struct bfq_service_tree *
-+bfq_entity_service_tree(struct bfq_entity *entity)
-+{
-+ struct bfq_sched_data *sched_data = entity->sched_data;
-+ unsigned int idx = entity->ioprio_class - 1;
-+
-+ BUG_ON(idx >= BFQ_IOPRIO_CLASSES);
-+ BUG_ON(sched_data == NULL);
-+
-+ return sched_data->service_tree + idx;
-+}
-+
-+static inline struct bfq_queue *bic_to_bfqq(struct bfq_io_cq *bic,
-+ int is_sync)
-+{
-+ return bic->bfqq[!!is_sync];
-+}
-+
-+static inline void bic_set_bfqq(struct bfq_io_cq *bic,
-+ struct bfq_queue *bfqq, int is_sync)
-+{
-+ bic->bfqq[!!is_sync] = bfqq;
-+}
-+
-+static inline struct bfq_data *bic_to_bfqd(struct bfq_io_cq *bic)
-+{
-+ return bic->icq.q->elevator->elevator_data;
-+}
-+
-+/**
-+ * bfq_get_bfqd_locked - get a lock to a bfqd using a RCU protected pointer.
-+ * @ptr: a pointer to a bfqd.
-+ * @flags: storage for the flags to be saved.
-+ *
-+ * This function allows bfqg->bfqd to be protected by the
-+ * queue lock of the bfqd they reference; the pointer is dereferenced
-+ * under RCU, so the storage for bfqd is assured to be safe as long
-+ * as the RCU read side critical section does not end. After the
-+ * bfqd->queue->queue_lock is taken the pointer is rechecked, to be
-+ * sure that no other writer accessed it. If we raced with a writer,
-+ * the function returns NULL, with the queue unlocked, otherwise it
-+ * returns the dereferenced pointer, with the queue locked.
-+ */
-+static inline struct bfq_data *bfq_get_bfqd_locked(void **ptr,
-+ unsigned long *flags)
-+{
-+ struct bfq_data *bfqd;
-+
-+ rcu_read_lock();
-+ bfqd = rcu_dereference(*(struct bfq_data **)ptr);
-+
-+ if (bfqd != NULL) {
-+ spin_lock_irqsave(bfqd->queue->queue_lock, *flags);
-+ if (*ptr == bfqd)
-+ goto out;
-+ spin_unlock_irqrestore(bfqd->queue->queue_lock, *flags);
-+ }
-+
-+ bfqd = NULL;
-+out:
-+ rcu_read_unlock();
-+ return bfqd;
-+}
-+
-+static inline void bfq_put_bfqd_unlock(struct bfq_data *bfqd,
-+ unsigned long *flags)
-+{
-+ spin_unlock_irqrestore(bfqd->queue->queue_lock, *flags);
-+}
-+
-+static void bfq_changed_ioprio(struct bfq_io_cq *bic);
-+static void bfq_put_queue(struct bfq_queue *bfqq);
-+static void bfq_dispatch_insert(struct request_queue *q, struct request *rq);
-+static struct bfq_queue *bfq_get_queue(struct bfq_data *bfqd,
-+ struct bfq_group *bfqg, int is_sync,
-+ struct bfq_io_cq *bic, gfp_t gfp_mask);
-+static void bfq_end_wr_async_queues(struct bfq_data *bfqd,
-+ struct bfq_group *bfqg);
-+static void bfq_put_async_queues(struct bfq_data *bfqd, struct bfq_group *bfqg);
-+static void bfq_exit_bfqq(struct bfq_data *bfqd, struct bfq_queue *bfqq);
-+
-+#endif /* _BFQ_H */
diff -Nur linux-3.14.54.orig/block/blk-core.c linux-3.14.54/block/blk-core.c
--- linux-3.14.54.orig/block/blk-core.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/block/blk-core.c 2015-10-12 10:56:17.942351169 +0200
++++ linux-3.14.54/block/blk-core.c 2015-10-15 15:51:25.016670839 +0200
@@ -1928,7 +1928,7 @@
* in some cases below, so export this function.
* Request stacking drivers like request-based dm may change the queue
@@ -51601,7 +50315,7 @@ diff -Nur linux-3.14.54.orig/block/blk-core.c linux-3.14.54/block/blk-core.c
* when submitting requests.
diff -Nur linux-3.14.54.orig/block/blk-map.c linux-3.14.54/block/blk-map.c
--- linux-3.14.54.orig/block/blk-map.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/block/blk-map.c 2015-10-12 10:56:17.942351169 +0200
++++ linux-3.14.54/block/blk-map.c 2015-10-15 15:51:25.016670839 +0200
@@ -285,7 +285,7 @@
*
* Description:
@@ -51611,9 +50325,76 @@ diff -Nur linux-3.14.54.orig/block/blk-map.c linux-3.14.54/block/blk-map.c
* buffers.
*/
int blk_rq_map_kern(struct request_queue *q, struct request *rq, void *kbuf,
+diff -Nur linux-3.14.54.orig/block/Kconfig.iosched linux-3.14.54/block/Kconfig.iosched
+--- linux-3.14.54.orig/block/Kconfig.iosched 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/block/Kconfig.iosched 2015-10-15 15:51:25.020670575 +0200
+@@ -39,6 +39,27 @@
+ ---help---
+ Enable group IO scheduling in CFQ.
+
++config IOSCHED_BFQ
++ tristate "BFQ I/O scheduler"
++ default n
++ ---help---
++ The BFQ I/O scheduler tries to distribute bandwidth among
++ all processes according to their weights.
++ It aims at distributing the bandwidth as desired, independently of
++ the disk parameters and with any workload. It also tries to
++ guarantee low latency to interactive and soft real-time
++ applications. If compiled built-in (saying Y here), BFQ can
++ be configured to support hierarchical scheduling.
++
++config CGROUP_BFQIO
++ bool "BFQ hierarchical scheduling support"
++ depends on CGROUPS && IOSCHED_BFQ=y
++ default n
++ ---help---
++ Enable hierarchical scheduling in BFQ, using the cgroups
++ filesystem interface. The name of the subsystem will be
++ bfqio.
++
+ choice
+ prompt "Default I/O scheduler"
+ default DEFAULT_CFQ
+@@ -52,6 +73,16 @@
+ config DEFAULT_CFQ
+ bool "CFQ" if IOSCHED_CFQ=y
+
++ config DEFAULT_BFQ
++ bool "BFQ" if IOSCHED_BFQ=y
++ help
++ Selects BFQ as the default I/O scheduler which will be
++ used by default for all block devices.
++ The BFQ I/O scheduler aims at distributing the bandwidth
++ as desired, independently of the disk parameters and with
++ any workload. It also tries to guarantee low latency to
++ interactive and soft real-time applications.
++
+ config DEFAULT_NOOP
+ bool "No-op"
+
+@@ -61,6 +92,7 @@
+ string
+ default "deadline" if DEFAULT_DEADLINE
+ default "cfq" if DEFAULT_CFQ
++ default "bfq" if DEFAULT_BFQ
+ default "noop" if DEFAULT_NOOP
+
+ endmenu
+diff -Nur linux-3.14.54.orig/block/Makefile linux-3.14.54/block/Makefile
+--- linux-3.14.54.orig/block/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/block/Makefile 2015-10-15 15:51:25.020670575 +0200
+@@ -16,6 +16,7 @@
+ obj-$(CONFIG_IOSCHED_NOOP) += noop-iosched.o
+ obj-$(CONFIG_IOSCHED_DEADLINE) += deadline-iosched.o
+ obj-$(CONFIG_IOSCHED_CFQ) += cfq-iosched.o
++obj-$(CONFIG_IOSCHED_BFQ) += bfq-iosched.o
+
+ obj-$(CONFIG_BLOCK_COMPAT) += compat_ioctl.o
+ obj-$(CONFIG_BLK_DEV_INTEGRITY) += blk-integrity.o
diff -Nur linux-3.14.54.orig/crypto/blkcipher.c linux-3.14.54/crypto/blkcipher.c
--- linux-3.14.54.orig/crypto/blkcipher.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/crypto/blkcipher.c 2015-10-12 10:56:17.943351169 +0200
++++ linux-3.14.54/crypto/blkcipher.c 2015-10-15 15:51:25.020670575 +0200
@@ -70,14 +70,12 @@
return max(start, end_page);
}
@@ -51815,7 +50596,7 @@ diff -Nur linux-3.14.54.orig/crypto/blkcipher.c linux-3.14.54/crypto/blkcipher.c
{
diff -Nur linux-3.14.54.orig/crypto/tcrypt.c linux-3.14.54/crypto/tcrypt.c
--- linux-3.14.54.orig/crypto/tcrypt.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/crypto/tcrypt.c 2015-10-12 10:56:17.944351169 +0200
++++ linux-3.14.54/crypto/tcrypt.c 2015-10-15 15:51:25.020670575 +0200
@@ -33,6 +33,7 @@
#include <linux/jiffies.h>
#include <linux/timex.h>
@@ -51864,63 +50645,1210 @@ diff -Nur linux-3.14.54.orig/crypto/tcrypt.c linux-3.14.54/crypto/tcrypt.c
name++;
}
}
-diff -Nur linux-3.14.54.orig/drivers/Kconfig linux-3.14.54/drivers/Kconfig
---- linux-3.14.54.orig/drivers/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/Kconfig 2015-10-12 10:56:18.006351164 +0200
-@@ -96,6 +96,8 @@
+diff -Nur linux-3.14.54.orig/Documentation/ABI/testing/sysfs-class-net-statistics linux-3.14.54/Documentation/ABI/testing/sysfs-class-net-statistics
+--- linux-3.14.54.orig/Documentation/ABI/testing/sysfs-class-net-statistics 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/Documentation/ABI/testing/sysfs-class-net-statistics 2015-10-15 15:51:25.020670575 +0200
+@@ -0,0 +1,201 @@
++What: /sys/class/<iface>/statistics/collisions
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of collisions seen by this network device.
++ This value might not be relevant with all MAC layers.
++
++What: /sys/class/<iface>/statistics/multicast
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of multicast packets received by this
++ network device.
++
++What: /sys/class/<iface>/statistics/rx_bytes
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of bytes received by this network device.
++ See the network driver for the exact meaning of when this
++ value is incremented.
++
++What: /sys/class/<iface>/statistics/rx_compressed
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of compressed packets received by this
++ network device. This value might only be relevant for interfaces
++ that support packet compression (e.g: PPP).
++
++What: /sys/class/<iface>/statistics/rx_crc_errors
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of packets received with a CRC (FCS) error
++ by this network device. Note that the specific meaning might
++ depend on the MAC layer used by the interface.
++
++What: /sys/class/<iface>/statistics/rx_dropped
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of packets received by the network device
++ but dropped, that are not forwarded to the upper layers for
++ packet processing. See the network driver for the exact
++ meaning of this value.
++
++What: /sys/class/<iface>/statistics/rx_fifo_errors
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of receive FIFO errors seen by this
++ network device. See the network driver for the exact
++ meaning of this value.
++
++What: /sys/class/<iface>/statistics/rx_frame_errors
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of received frames with error, such as
++ alignment errors. Note that the specific meaning depends on
++ on the MAC layer protocol used. See the network driver for
++ the exact meaning of this value.
++
++What: /sys/class/<iface>/statistics/rx_length_errors
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of received error packet with a length
++ error, oversized or undersized. See the network driver for the
++ exact meaning of this value.
++
++What: /sys/class/<iface>/statistics/rx_missed_errors
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of received packets that have been missed
++ due to lack of capacity in the receive side. See the network
++ driver for the exact meaning of this value.
++
++What: /sys/class/<iface>/statistics/rx_over_errors
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of received packets that are oversized
++ compared to what the network device is configured to accept
++ (e.g: larger than MTU). See the network driver for the exact
++ meaning of this value.
++
++What: /sys/class/<iface>/statistics/rx_packets
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the total number of good packets received by this
++ network device.
++
++What: /sys/class/<iface>/statistics/tx_aborted_errors
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of packets that have been aborted
++ during transmission by a network device (e.g: because of
++ a medium collision). See the network driver for the exact
++ meaning of this value.
++
++What: /sys/class/<iface>/statistics/tx_bytes
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of bytes transmitted by a network
++ device. See the network driver for the exact meaning of this
++ value, in particular whether this accounts for all successfully
++ transmitted packets or all packets that have been queued for
++ transmission.
++
++What: /sys/class/<iface>/statistics/tx_carrier_errors
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of packets that could not be transmitted
++ because of carrier errors (e.g: physical link down). See the
++ network driver for the exact meaning of this value.
++
++What: /sys/class/<iface>/statistics/tx_compressed
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of transmitted compressed packets. Note
++ this might only be relevant for devices that support
++ compression (e.g: PPP).
++
++What: /sys/class/<iface>/statistics/tx_dropped
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of packets dropped during transmission.
++ See the driver for the exact reasons as to why the packets were
++ dropped.
++
++What: /sys/class/<iface>/statistics/tx_errors
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of packets in error during transmission by
++ a network device. See the driver for the exact reasons as to
++ why the packets were dropped.
++
++What: /sys/class/<iface>/statistics/tx_fifo_errors
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of packets having caused a transmit
++ FIFO error. See the driver for the exact reasons as to why the
++ packets were dropped.
++
++What: /sys/class/<iface>/statistics/tx_heartbeat_errors
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of packets transmitted that have been
++ reported as heartbeat errors. See the driver for the exact
++ reasons as to why the packets were dropped.
++
++What: /sys/class/<iface>/statistics/tx_packets
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of packets transmitted by a network
++ device. See the driver for whether this reports the number of all
++ attempted or successful transmissions.
++
++What: /sys/class/<iface>/statistics/tx_window_errors
++Date: April 2005
++KernelVersion: 2.6.12
++Contact: netdev@vger.kernel.org
++Description:
++ Indicates the number of packets not successfully transmitted
++ due to a window collision. The specific meaning depends on the
++ MAC layer used. On Ethernet this is usually used to report
++ late collisions errors.
+diff -Nur linux-3.14.54.orig/Documentation/arm64/booting.txt linux-3.14.54/Documentation/arm64/booting.txt
+--- linux-3.14.54.orig/Documentation/arm64/booting.txt 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/Documentation/arm64/booting.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -111,8 +111,14 @@
+ - Caches, MMUs
+ The MMU must be off.
+ Instruction cache may be on or off.
+- Data cache must be off and invalidated.
+- External caches (if present) must be configured and disabled.
++ The address range corresponding to the loaded kernel image must be
++ cleaned to the PoC. In the presence of a system cache or other
++ coherent masters with caches enabled, this will typically require
++ cache maintenance by VA rather than set/way operations.
++ System caches which respect the architected cache maintenance by VA
++ operations must be configured and may be enabled.
++ System caches which do not respect architected cache maintenance by VA
++ operations (not recommended) must be configured and disabled.
- source "drivers/memstick/Kconfig"
+ - Architected timers
+ CNTFRQ must be programmed with the timer frequency and CNTVOFF must
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/arm/imx/busfreq-imx6.txt linux-3.14.54/Documentation/devicetree/bindings/arm/imx/busfreq-imx6.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/arm/imx/busfreq-imx6.txt 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/Documentation/devicetree/bindings/arm/imx/busfreq-imx6.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -0,0 +1,64 @@
++Freescale Busfreq driver
++
++It is a generic driver that manages the frequency of the DDR, AHB and AXI buses in the iMX6x architecture.
++It works for both SMP and UP systems and for both DDR3 and LPDDR2 memory types.
++
++Required properties are listed below:
++- compatible: should be "fsl,imx6_busfreq"
++- clocks: Lists the various clocks used by the busfreq driver
++- interrupts - Lists the interrupts used by the busfreq driver. This is needed only for SMP architecutre.
++- fsl,max_ddr_freq - The max ddr freq for this chip
++
++Examples:
++For SOC imx6q.dtsi:
++ busfreq { /* BUSFREQ */
++ compatible = "fsl,imx6_busfreq";
++ clocks = <&clks 171>, <&clks 6>, <&clks 11>, <&clks 104>, <&clks 172>, <&clks 58>,
++ <&clks 18>, <&clks 60>, <&clks 20>, <&clks 3>;
++ clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm", "pll3_usb_otg", "periph",
++ "periph_pre", "periph_clk2", "periph_clk2_sel", "osc";
++ interrupts = <0 107 0x04>, <0 112 0x4>, <0 113 0x4>, <0 114 0x4>;
++ interrupt-names = "irq_busfreq_0", "irq_busfreq_1", "irq_busfreq_2", "irq_busfreq_3";
++ fsl,max_ddr_freq = <528000000>;
++ };
++
++The Freescale Busfreq driver supports the following setpoints for the DDR freq:
++enum bus_freq_mode {
++ BUS_FREQ_HIGH, -> The max freq the SOC supports
++ BUS_FREQ_MED, -> Medium setpoint (ex 400MHz for DDR3 when the max is 528MHz)
++ BUS_FREQ_AUDIO, -> Audio playback freq (50MHz)
++ BUS_FREQ_LOW, -> Low power IDLE freq (24MHz)
++};
++
++Currently the Freescale Busfreq driver implementation requires drivers to call the following APIs:
++1. request_bus_freq(enum bus_freq_mode):
++ The driver is requesting the system and ddr freq to be set to the requested value. The driver should call this
++ API before it even enables its clocks.
++
++2. release_bus_freq(enum bus_freq_mode):
++ The driver no longer needs the system and ddr freq at the required value. The driver should call this API after
++ its work is done and it has disabled its clocks.
++
++Examples:
++In the IPU driver, the requesting and releasing of the required bus frequency is tied into the runtime PM implementation:
++
++int ipu_runtime_suspend(struct device *dev)
++{
++ release_bus_freq(BUS_FREQ_HIGH);
++ dev_dbg(dev, "ipu busfreq high release.\n");
++
++ return 0;
++}
++
++int ipu_runtime_resume(struct device *dev)
++{
++ request_bus_freq(BUS_FREQ_HIGH);
++ dev_dbg(dev, "ipu busfreq high requst.\n");
++
++ return 0;
++}
++
++static const struct dev_pm_ops ipu_pm_ops = {
++ SET_RUNTIME_PM_OPS(ipu_runtime_suspend, ipu_runtime_resume, NULL)
++ SET_SYSTEM_SLEEP_PM_OPS(ipu_suspend, ipu_resume)
++};
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/arm/imx/gpc.txt linux-3.14.54/Documentation/devicetree/bindings/arm/imx/gpc.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/arm/imx/gpc.txt 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/Documentation/devicetree/bindings/arm/imx/gpc.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -0,0 +1,20 @@
++Freescale imx GPC bindings
++
++Optional properties:
++- fsl,cpu_pupscr_sw2iso: for powering up CPU, number of 32K clock cycle PGC will wait before negating isolation signal.
++- fsl,cpu_pupscr_sw: for powering up CPU, number of 32K clock cycle PGC will wait before asserting isolation signal.
++- fsl,cpu_pdnscr_iso2sw: for powering down CPU, number of ipg clock cycle PGC will wait before negating isolation signal.
++- fsl,cpu_pdnscr_iso: for powering down CPU, number of ipg clock cycle PGC will wait before asserting isolation signal.
++
++These properties are for adjusting the GPC PGC CPU power up/down setting, if there is no such property in dts, then default
++value in GPC PGC registers will be used.
++
++
++Example:
++
++ &gpc {
++ fsl,cpu_pupscr_sw2iso = <0xf>;
++ fsl,cpu_pupscr_sw = <0xf>;
++ fsl,cpu_pdnscr_iso2sw = <0x1>;
++ fsl,cpu_pdnscr_iso = <0x1>;
++ };
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/arm/pmu.txt linux-3.14.54/Documentation/devicetree/bindings/arm/pmu.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/arm/pmu.txt 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/Documentation/devicetree/bindings/arm/pmu.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -17,6 +17,9 @@
+ "arm,arm1176-pmu"
+ "arm,arm1136-pmu"
+ - interrupts : 1 combined interrupt or 1 per core.
++- cluster : a phandle to the cluster to which it belongs
++ If there are more than one cluster with same CPU type
++ then there should be separate PMU nodes per cluster.
-+source "drivers/mxc/Kconfig"
+ Example:
+
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/ata/ahci-platform.txt linux-3.14.54/Documentation/devicetree/bindings/ata/ahci-platform.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/ata/ahci-platform.txt 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/Documentation/devicetree/bindings/ata/ahci-platform.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -4,12 +4,19 @@
+ Each SATA controller should have its own node.
+
+ Required properties:
+-- compatible : compatible list, contains "snps,spear-ahci"
++- compatible : compatible list, contains "snps,spear-ahci",
++ "fsl,imx53-ahci" or "fsl,imx6q-ahci"
+ - interrupts : <interrupt mapping for SATA IRQ>
+ - reg : <registers mapping>
+
+ Optional properties:
+ - dma-coherent : Present if dma operations are coherent
++- clocks : a list of phandle + clock specifier pairs
++- target-supply : regulator for SATA target power
+
- source "drivers/leds/Kconfig"
++"fsl,imx53-ahci", "fsl,imx6q-ahci" required properties:
++- clocks : must contain the sata, sata_ref and ahb clocks
++- clock-names : must contain "ahb" for the ahb clock
- source "drivers/accessibility/Kconfig"
-diff -Nur linux-3.14.54.orig/drivers/Makefile linux-3.14.54/drivers/Makefile
---- linux-3.14.54.orig/drivers/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/Makefile 2015-10-12 10:56:18.009351164 +0200
-@@ -111,6 +111,7 @@
- obj-$(CONFIG_CPU_FREQ) += cpufreq/
- obj-$(CONFIG_CPU_IDLE) += cpuidle/
- obj-y += mmc/
-+obj-$(CONFIG_ARCH_MXC) += mxc/
- obj-$(CONFIG_MEMSTICK) += memstick/
- obj-y += leds/
- obj-$(CONFIG_INFINIBAND) += infiniband/
-diff -Nur linux-3.14.54.orig/drivers/ata/Kconfig linux-3.14.54/drivers/ata/Kconfig
---- linux-3.14.54.orig/drivers/ata/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/Kconfig 2015-10-12 10:56:17.957351168 +0200
-@@ -99,7 +99,7 @@
+ Example:
+ sata@ffe08000 {
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/clock/imx6q-clock.txt linux-3.14.54/Documentation/devicetree/bindings/clock/imx6q-clock.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/clock/imx6q-clock.txt 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/Documentation/devicetree/bindings/clock/imx6q-clock.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -89,8 +89,6 @@
+ gpu3d_shader 74
+ ipu1_podf 75
+ ipu2_podf 76
+- ldb_di0_podf 77
+- ldb_di1_podf 78
+ ipu1_di0_pre 79
+ ipu1_di1_pre 80
+ ipu2_di0_pre 81
+@@ -220,6 +218,20 @@
+ lvds2_sel 205
+ lvds1_gate 206
+ lvds2_gate 207
++ gpt_3m 208
++ video_27m 209
++ ldb_di0_div_7 210
++ ldb_di1_div_7 211
++ ldb_di0_div_sel 212
++ ldb_di1_div_sel 213
++ caam_mem 214
++ caam_aclk 215
++ caam_ipg 216
++ epit1 217
++ epit2 218
++ tzasc2 219
++ lvds1_in 220
++ lvds1_out 221
- config AHCI_IMX
- tristate "Freescale i.MX AHCI SATA support"
-- depends on SATA_AHCI_PLATFORM && MFD_SYSCON
-+ depends on MFD_SYSCON
- help
- This option enables support for the Freescale i.MX SoC's
- onboard AHCI SATA.
-diff -Nur linux-3.14.54.orig/drivers/ata/Makefile linux-3.14.54/drivers/ata/Makefile
---- linux-3.14.54.orig/drivers/ata/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/Makefile 2015-10-12 10:56:17.959351168 +0200
-@@ -4,13 +4,13 @@
- # non-SFF interface
- obj-$(CONFIG_SATA_AHCI) += ahci.o libahci.o
- obj-$(CONFIG_SATA_ACARD_AHCI) += acard-ahci.o libahci.o
--obj-$(CONFIG_SATA_AHCI_PLATFORM) += ahci_platform.o libahci.o
-+obj-$(CONFIG_SATA_AHCI_PLATFORM) += ahci_platform.o libahci.o libahci_platform.o
- obj-$(CONFIG_SATA_FSL) += sata_fsl.o
- obj-$(CONFIG_SATA_INIC162X) += sata_inic162x.o
- obj-$(CONFIG_SATA_SIL24) += sata_sil24.o
- obj-$(CONFIG_SATA_DWC) += sata_dwc_460ex.o
- obj-$(CONFIG_SATA_HIGHBANK) += sata_highbank.o libahci.o
--obj-$(CONFIG_AHCI_IMX) += ahci_imx.o
-+obj-$(CONFIG_AHCI_IMX) += ahci_imx.o libahci.o libahci_platform.o
+ Examples:
+
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt linux-3.14.54/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/Documentation/devicetree/bindings/dma/fsl-imx-sdma.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -47,6 +47,7 @@
+ 20 ASRC
+ 21 ESAI
+ 22 SSI Dual FIFO (needs firmware ver >= 2)
++ 23 HDMI Audio
+
+ The third cell specifies the transfer priority as below.
+
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/fb/fsl_ipuv3_fb.txt linux-3.14.54/Documentation/devicetree/bindings/fb/fsl_ipuv3_fb.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/fb/fsl_ipuv3_fb.txt 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/Documentation/devicetree/bindings/fb/fsl_ipuv3_fb.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -0,0 +1,146 @@
++* FSL IPUv3 Display/FB
++
++The FSL IPUv3 is Image Processing Unit version 3, a part of video and graphics
++subsystem in an application processor. The goal of the IPU is to provide
++comprehensive support for the flow of data from an image sensor or/and to a
++display device.
++
++Two IPU units are on the imx6q SOC while only one IPU unit on the imx6dl SOC.
++Each IPU unit has two display interfaces.
++
++For LDB/LVDS panel, there are two LVDS channels(LVDS0 and LVDS1) which can
++transfer video data, these two channels can be used as
++split/dual/single/separate mode.
++-split mode means display data from DI0 or DI1 will send to both channels
++ LVDS0+LVDS1.
++-dual mode means display data from DI0 or DI1 will be duplicated on LVDS0
++ and LVDS1, it said, LVDS0 and LVDS1 has the same content.
++-single mode means only work for DI0/DI1->LVDS0 or DI0/DI1->LVDS1.
++-separate mode means you can make DI0/DI1->LVDS0 and DI0/DI1->LVDS1 work
++ at the same time.
++ "ldb=spl0/1" -- split mode on DI0/1
++ "ldb=dul0/1" -- dual mode on DI0/1
++ "ldb=sin0/1" -- single mode on LVDS0/1
++ "ldb=sep0/1" -- separate mode begin from LVDS0/1
++
++Required properties for IPU:
++- bypass_reset :Bypass reset to avoid display channel being.
++ stopped by probe since it may start to work in bootloader: 0 or 1.
++- compatible : should be "fsl,imx6q-ipu".
++- reg : the register address range.
++- interrupts : the error and sync interrupts request.
++- clocks : the clock sources that it depends on.
++- clock-names: the related clock names.
++- resets : IPU reset specifier. See reset.txt and fsl,imx-src.txt in
++ Documentation/devicetree/bindings/reset/ for details.
++
++Required properties for fb:
++- compatible : should be "fsl,mxc_sdc_fb".
++- disp_dev : display device: "ldb", "lcd", "hdmi", "mipi_dsi".
++- mode_str : video mode string: "LDB-XGA" or "LDB-1080P60" for ldb,
++ "CLAA-WVGA" for lcd, "TRULY-WVGA" for TRULY mipi_dsi lcd panel,
++ "1920x1080M@60" for hdmi.
++- default_bpp : default bits per pixel: 8/16/24/32
++- int_clk : use internal clock as pixel clock: 0 or 1
++- late_init : to avoid display channel being re-initialized
++ as we've probably setup the channel in bootloader: 0 or 1
++- interface_pix_fmt : display interface pixel format as below:
++ RGB666 IPU_PIX_FMT_RGB666
++ RGB565 IPU_PIX_FMT_RGB565
++ RGB24 IPU_PIX_FMT_RGB24
++ BGR24 IPU_PIX_FMT_BGR24
++ GBR24 IPU_PIX_FMT_GBR24
++ YUV444 IPU_PIX_FMT_YUV444
++ LVDS666 IPU_PIX_FMT_LVDS666
++ YUYV IPU_PIX_FMT_YUYV
++ UYVY IPU_PIX_FMT_UYVY
++ YVYV IPU_PIX_FMT_YVYU
++ VYUY IPU_PIX_FMT_VYUY
++
++Required properties for display:
++- compatible : should be "fsl,lcd" for lcd panel, "fsl,imx6q-ldb" for ldb
++- reg : the register address range if necessary to have.
++- interrupts : the error and sync interrupts if necessary to have.
++- clocks : the clock sources that it depends on if necessary to have.
++- clock-names: the related clock names if necessary to have.
++- ipu_id : ipu id for the first display device: 0 or 1
++- disp_id : display interface id for the first display interface: 0 or 1
++- default_ifmt : save as above display interface pixel format for lcd
++- pinctrl-names : should be "default"
++- pinctrl-0 : should be pinctrl_ipu1_1 or pinctrl_ipu2_1, which depends on the
++ IPU connected.
++- sec_ipu_id : secondary ipu id for the second display device(ldb only): 0 or 1
++- sec_disp_id : secondary display interface id for the second display
++ device(ldb only): 0 or 1
++- ext_ref : reference resistor select for ldb only: 0 or 1
++- mode : ldb mode as below:
++ spl0 LDB_SPL_DI0
++ spl1 LDB_SPL_DI1
++ dul0 LDB_DUL_DI0
++ dul1 LDB_DUL_DI1
++ sin0 LDB_SIN0
++ sin1 LDB_SIN1
++ sep0 LDB_SEP0
++ sep1 LDB_SEP1
++- gpr : the mux controller for the display engine's display interfaces and the display encoder
++ (only valid for mipi dsi now).
++- disp-power-on-supply : the regulator to control display panel's power.
++ (only valid for mipi dsi now).
++- resets : the gpio pin to reset the display device(only valid for mipi display panel now).
++- lcd_panel : the video mode name for the display device(only valid for mipi display panel now).
++- dev_id : the display engine's identity within the system, which intends to replace ipu_id
++ (only valid for mipi dsi now).
++
++Example for IPU:
++ ipu1: ipu@02400000 {
++ compatible = "fsl,imx6q-ipu";
++ reg = <0x02400000 0x400000>;
++ interrupts = <0 6 0x4 0 5 0x4>;
++ clocks = <&clks 130>, <&clks 131>, <&clks 132>,
++ <&clks 39>, <&clks 40>,
++ <&clks 135>, <&clks 136>;
++ clock-names = "bus", "di0", "di1",
++ "di0_sel", "di1_sel",
++ "ldb_di0", "ldb_di1";
++ resets = <&src 2>;
++ bypass_reset = <0>;
++ };
++
++Example for fb:
++ fb0 {
++ compatible = "fsl,mxc_sdc_fb";
++ disp_dev = "ldb";
++ interface_pix_fmt = "RGB666";
++ mode_str ="LDB-XGA";
++ default_bpp = <16>;
++ int_clk = <0>;
++ late_init = <0>;
++ status = "okay";
++ };
++
++Example for ldb display:
++ ldb@020e0000 {
++ ipu_id = <1>;
++ disp_id = <0>;
++ ext_ref = <1>;
++ mode = "sep0";
++ sec_ipu_id = <1>;
++ sec_disp_id = <1>;
++ status = "okay";
++ };
++
++Example for mipi dsi display:
++ mipi_dsi: mipi@021e0000 {
++ compatible = "fsl,imx6q-mipi-dsi";
++ reg = <0x021e0000 0x4000>;
++ interrupts = <0 102 0x04>;
++ gpr = <&gpr>;
++ clocks = <&clks 138>, <&clks 204>;
++ clock-names = "mipi_pllref_clk", "mipi_cfg_clk";
++ dev_id = <0>;
++ disp_id = <0>;
++ lcd_panel = "TRULY-WVGA";
++ disp-power-on-supply = <&reg_mipi_dsi_pwr_on>
++ resets = <&mipi_dsi_reset>;
++ status = "okay";
++ };
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/leds/leds-pwm.txt linux-3.14.54/Documentation/devicetree/bindings/leds/leds-pwm.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/leds/leds-pwm.txt 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/Documentation/devicetree/bindings/leds/leds-pwm.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -13,6 +13,8 @@
+ For the pwms and pwm-names property please refer to:
+ Documentation/devicetree/bindings/pwm/pwm.txt
+ - max-brightness : Maximum brightness possible for the LED
++- active-low : (optional) For PWMs where the LED is wired to supply
++ rather than ground.
+ - label : (optional)
+ see Documentation/devicetree/bindings/leds/common.txt
+ - linux,default-trigger : (optional)
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/mailbox/mailbox.txt linux-3.14.54/Documentation/devicetree/bindings/mailbox/mailbox.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/mailbox/mailbox.txt 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/Documentation/devicetree/bindings/mailbox/mailbox.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -0,0 +1,33 @@
++* Generic Mailbox Controller and client driver bindings
++
++Generic binding to provide a way for Mailbox controller drivers to
++assign appropriate mailbox channel to client drivers.
++
++* Mailbox Controller
++
++Required property:
++- #mbox-cells: Must be at least 1. Number of cells in a mailbox
++ specifier.
++
++Example:
++ mailbox: mailbox {
++ ...
++ #mbox-cells = <1>;
++ };
++
++
++* Mailbox Client
++
++Required property:
++- mbox: List of phandle and mailbox channel specifier.
++
++- mbox-names: List of identifier strings for each mailbox channel
++ required by the client.
++
++Example:
++ pwr_cntrl: power {
++ ...
++ mbox-names = "pwr-ctrl", "rpc";
++ mbox = <&mailbox 0
++ &mailbox 1>;
++ };
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/mlb/mlb150.txt linux-3.14.54/Documentation/devicetree/bindings/mlb/mlb150.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/mlb/mlb150.txt 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/Documentation/devicetree/bindings/mlb/mlb150.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -0,0 +1,22 @@
++* Freescale Media Local Bus Host Controller (MLB) for i.MX6Q/DL
++
++The Media Local Bus Host Controller on Freescale i.MX family
++provides an interface for MOST network.
++
++Required properties:
++- compatible : Should be "fsl,<chip>-mlb150"
++- reg : Should contain mlb registers location and length
++- interrupts : Should contain mlb interrupt
++- clocks: Should contain the mlb clock sources
++- clock-names: Should be the names of mlb clock sources
++- iram : phandle pointing to the SRAM device node
++
++Examples:
++mlb@0218c000 {
++ compatible = "fsl,imx6q-mlb150";
++ reg = <0x0218c000 0x4000>;
++ interrupts = <0 53 0x04 0 117 0x04 0 126 0x04>;
++ clocks = <&clks 139>, <&clks 175>;
++ clock-names = "mlb", "pll8_mlb";
++ iram = <&ocram>;
++};
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/mmc/mmc.txt linux-3.14.54/Documentation/devicetree/bindings/mmc/mmc.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/mmc/mmc.txt 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/Documentation/devicetree/bindings/mmc/mmc.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -5,6 +5,8 @@
+ Interpreted by the OF core:
+ - reg: Registers location and length.
+ - interrupts: Interrupts used by the MMC controller.
++- clocks: Clocks needed for the host controller, if any.
++- clock-names: Goes with clocks above.
+
+ Card detection:
+ If no property below is supplied, host native card detect is used.
+@@ -30,6 +32,15 @@
+ - cap-sdio-irq: enable SDIO IRQ signalling on this interface
+ - full-pwr-cycle: full power cycle of the card is supported
+
++Card power and reset control:
++The following properties can be specified for cases where the MMC
++peripheral needs additional reset, regulator and clock lines. It is for
++example common for WiFi/BT adapters to have these separate from the main
++MMC bus:
++ - card-reset-gpios: Specify GPIOs for card reset (reset active low)
++ - card-external-vcc-supply: Regulator to drive (independent) card VCC
++ - clock with name "card_ext_clock": External clock provided to the card
++
+ *NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line
+ polarity properties, we have to fix the meaning of the "normal" and "inverted"
+ line levels. We choose to follow the SDHCI standard, which specifies both those
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt linux-3.14.54/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -71,6 +71,13 @@
+ name for integer state ID 0, list entry 1 for state ID 1, and
+ so on.
+
++pinctrl-assert-gpios:
++ List of phandles, each pointing at a GPIO which is used by some
++ board design to steer pins between two peripherals on the board.
++ It plays like a board level pin multiplexer to choose different
++ functions for given pins by pulling up/down the GPIOs. See
++ bindings/gpio/gpio.txt for details of how to specify GPIO.
++
+ For example:
+
+ /* For a client device requiring named states */
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/reset/gpio-reset.txt linux-3.14.54/Documentation/devicetree/bindings/reset/gpio-reset.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/reset/gpio-reset.txt 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/Documentation/devicetree/bindings/reset/gpio-reset.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -0,0 +1,35 @@
++GPIO reset controller
++=====================
++
++A GPIO reset controller controls a single GPIO that is connected to the reset
++pin of a peripheral IC. Please also refer to reset.txt in this directory for
++common reset controller binding usage.
++
++Required properties:
++- compatible: Should be "gpio-reset"
++- reset-gpios: A gpio used as reset line. The gpio specifier for this property
++ depends on the gpio controller that provides the gpio.
++- #reset-cells: 0, see below
++
++Optional properties:
++- reset-delay-us: delay in microseconds. The gpio reset line will be asserted for
++ this duration to reset.
++- initially-in-reset: boolean. If not set, the initial state should be a
++ deasserted reset line. If this property exists, the
++ reset line should be kept in reset.
++
++example:
++
++sii902x_reset: gpio-reset {
++ compatible = "gpio-reset";
++ reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
++ reset-delay-us = <10000>;
++ initially-in-reset;
++ #reset-cells = <0>;
++};
++
++/* Device with nRESET pin connected to GPIO5_0 */
++sii902x@39 {
++ /* ... */
++ resets = <&sii902x_reset>; /* active-low GPIO5_0, 10 ms delay */
++};
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/sound/cs42888.txt linux-3.14.54/Documentation/devicetree/bindings/sound/cs42888.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/sound/cs42888.txt 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/Documentation/devicetree/bindings/sound/cs42888.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -0,0 +1,29 @@
++CS42888 audio CODEC
++
++This device supports I2C only.
++
++Required properties:
++
++ - compatible: "cirrus,cs42888"
++ - reg: the I2C address of the device.
++ - clocks: Phandle to the clock node.
++ - clock-names: Contains name for each entry in clocks.
++ "codec_osc" : the external oscillator.
++ "esai" : the hckt clock from esai.
++ - <name>-supply: Phandle to the regulator <name>.
++
++Note: cs42888 needs a regulators node and a clocks node.
++
++Example:
++In this case, the clock is external oscillator.
++
++codec: cs42888@48 {
++ compatible = "cirrus,cs42888";
++ reg = <0x048>;
++ clocks = <&codec_osc 0>;
++ clock-names = "codec_osc";
++ VA-supply = <&reg_audio>;
++ VD-supply = <&reg_audio>;
++ VLS-supply = <&reg_audio>;
++ VLC-supply = <&reg_audio>;
++};
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/sound/fsl-asrc-p2p.txt linux-3.14.54/Documentation/devicetree/bindings/sound/fsl-asrc-p2p.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/sound/fsl-asrc-p2p.txt 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/Documentation/devicetree/bindings/sound/fsl-asrc-p2p.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -0,0 +1,23 @@
++* Freescale Asynchronous Sample Rate Converter (ASRC)
++
++This document is for asrc p2p node. p2p is one of asrc mode. asrc p2p depend on
++MXC_ASRC.
++
++Required properties:
++ - compatible: Should be "fsl,<chip>-asrc-p2p".
++ - fsl,output-rate: the output rate of asrc p2p. which can be <32000> to <192000>,
++ - fsl,output-width: the output width of asrc p2p. which can be <16>, <24>.
++ - fsl,asrc-dma-rx-events: The rx dma event of the asrc, <a b c> corresponding
++ to 3 pair of asrc.
++ - fsl,asrc-dma-tx-events: The tx dma event of the esai, <a b c> corresponding
++ to 3 pair of asrc.
++
++Example:
++asrc_p2p: asrc_p2p {
++ compatible = "fsl,imx6q-asrc-p2p";
++ fsl,output-rate = <48000>;
++ fsl,output-width = <16>;
++ fsl,asrc-dma-rx-events = <17 18 19>;
++ fsl,asrc-dma-tx-events = <20 21 22>;
++ status = "okay";
++};
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/sound/imx-audio-cs42888.txt linux-3.14.54/Documentation/devicetree/bindings/sound/imx-audio-cs42888.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/sound/imx-audio-cs42888.txt 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/Documentation/devicetree/bindings/sound/imx-audio-cs42888.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -0,0 +1,25 @@
++Freescale i.MX audio complex with CS42888 codec
++
++Required properties:
++- compatible : "fsl,imx-audio-cs42888"
++- model : The user-visible name of this sound complex
++- esai-controller : The phandle of the i.MX SSI controller
++- audio-codec : The phandle of the CS42888 audio codec
++
++Optional properties:
++- asrc-controller : The phandle of the i.MX ASRC controller
++- audio-routing : A list of the connections between audio components.
++ Each entry is a pair of strings, the first being the connection's sink,
++ the second being the connection's source. Valid names could be power
++ supplies, CS42888 pins, and the jacks on the board:
++
++Example:
++
++sound {
++ compatible = "fsl,imx6q-sabresd-wm8962",
++ "fsl,imx-audio-wm8962";
++ model = "cs42888-audio";
++ esai-controller = <&esai>;
++ asrc-controller = <&asrc_p2p>;
++ audio-codec = <&codec>;
++};
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/sound/imx-audio-wm8962.txt linux-3.14.54/Documentation/devicetree/bindings/sound/imx-audio-wm8962.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/sound/imx-audio-wm8962.txt 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/Documentation/devicetree/bindings/sound/imx-audio-wm8962.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -24,6 +24,12 @@
+ Note: The AUDMUX port numbering should start at 1, which is consistent with
+ hardware manual.
+
++Optional properties:
++- hp-det-gpios : The gpio pin to detect plug in/out event that happens to
++ Headphone jack.
++- mic-det-gpios: The gpio pin to detect plug in/out event that happens to
++ Microphone jack.
++
+ Example:
+
+ sound {
+@@ -43,4 +49,6 @@
+ "DMICDAT", "DMIC";
+ mux-int-port = <2>;
+ mux-ext-port = <3>;
++ hp-det-gpios = <&gpio7 8 1>;
++ mic-det-gpios = <&gpio1 9 1>;
+ };
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/sound/wm8962.txt linux-3.14.54/Documentation/devicetree/bindings/sound/wm8962.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/sound/wm8962.txt 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/Documentation/devicetree/bindings/sound/wm8962.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -13,6 +13,14 @@
+ of R51 (Class D Control 2) gets set, indicating that the speaker is
+ in mono mode.
+
++ - amic-mono: This is a boolean property. If present, indicating that the
++ analog micphone is hardware mono input, the driver would enable monomix
++ for it.
++
++ - dmic-mono: This is a boolean property. If present, indicating that the
++ digital micphone is hardware mono input, the driver would enable monomix
++ for it.
++
+ - mic-cfg : Default register value for R48 (Additional Control 4).
+ If absent, the default should be the register default.
+
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/usb/mxs-phy.txt linux-3.14.54/Documentation/devicetree/bindings/usb/mxs-phy.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/usb/mxs-phy.txt 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/Documentation/devicetree/bindings/usb/mxs-phy.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -1,13 +1,16 @@
+ * Freescale MXS USB Phy Device
+
+ Required properties:
+-- compatible: Should be "fsl,imx23-usbphy"
++- compatible: "fsl,imx23-usbphy" for imx23 and imx28, "fsl,imx6q-usbphy"
++for imx6dq and imx6dl, "fsl,imx6sl-usbphy" for imx6sl
+ - reg: Should contain registers location and length
+ - interrupts: Should contain phy interrupt
++- fsl,anatop: phandle for anatop register, it is only for imx6 SoC series
+
+ Example:
+ usbphy1: usbphy@020c9000 {
+ compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
+ reg = <0x020c9000 0x1000>;
+ interrupts = <0 44 0x04>;
++ fsl,anatop = <&anatop>;
+ };
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/video/fsl,csi-v4l2-capture.txt linux-3.14.54/Documentation/devicetree/bindings/video/fsl,csi-v4l2-capture.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/video/fsl,csi-v4l2-capture.txt 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/Documentation/devicetree/bindings/video/fsl,csi-v4l2-capture.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -0,0 +1,61 @@
++* Freescale CMOS Sensor Interface (CSI) V4L2 Capture
++
++Required properties for CSI
++- compatible: "fsl,<soc>-csi". Supported chip includes imx6sl
++- reg: Address and length of the register set for CSI
++- interrupts: Should contain CSI interrupts
++
++Required properties for v4l2_capture
++- compatible: should be "fsl,<soc>-csi-v4l2", supported socs include imx6sl
++
++Required properties for sensor
++- compatible: "<vendor>,<sensor>"
++ please check the supported sensor in the Supported Sensor fields.
++- reg: sensor I2C slave address
++- pinctrl-names: should be "default" for parallel sensor
++- pinctrl-0: should depend on the connection between sensor and i.MX
++ connection between sensor and i.MX could be only legacy parallel on i.MX6SL
++- clocks: should be the clock source provided to sensor.
++- clock-names: should be "csi_mclk"
++- AVDD-supply: set according to the board.
++- DVDD-supply: set according to the board.
++- pwn-gpios: set according to the board.
++- rst-gpios: set according to the board.
++- csi_id: csi id for v4l2 capture device
++ should be 0 for i.MX6SL
++- mclk: should the value of mclk clock send out the sensor. unit is Hz.
++- mclk_source: should be 0 for i.MX6SL
++
++Supported Sensor
++- ovti, ov5640
++
++Example for CSI:
++ csi: csi@020e4000 {
++ compatible = "fsl,imx6sl-csi";
++ reg = <0x020e4000 0x4000>;
++ interrupts = <0 7 0x04>;
++ status = "disabled";
++ };
++
++Examples for v4l2_capture:
++ csi_v4l2_cap {
++ compatible = "fsl,imx6q-v4l2-capture";
++ status = "okay";
++ };
++
++Examples for sensors:
++ ov564x: ov564x@3c {
++ compatible = "ovti,ov564x";
++ reg = <0x3c>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_csi_0>;
++ clocks = <&clks IMX6SL_CLK_CSI>;
++ clock-names = "csi_mclk";
++ AVDD-supply = <&vgen6_reg>; /* 2.8v */
++ DVDD-supply = <&vgen2_reg>; /* 1.5v*/
++ pwn-gpios = <&gpio1 25 1>;
++ rst-gpios = <&gpio1 26 0>;
++ csi_id = <0>;
++ mclk = <24000000>;
++ mclk_source = <0>;
++ };
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/video/fsl,mipi-csi2.txt linux-3.14.54/Documentation/devicetree/bindings/video/fsl,mipi-csi2.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/video/fsl,mipi-csi2.txt 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/Documentation/devicetree/bindings/video/fsl,mipi-csi2.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -0,0 +1,42 @@
++* Freescale MIPI CSI2 Controller for i.MX6DQ/i.MX6SDL
++
++Required properties for mipi csi2 controller:
++- compatible: should be "fsl,imx6q-mipi-csi2"
++- reg: <base addr, range> contains mipi csi2 register base address and range
++- interrupts: <type num flag> where type is a interrupt type, num is the
++ interrupt number and flag is a field that level/trigger information for
++ the interrupt.
++- clocks: the clock sources that mipi csi2 depends on.
++- clock-names: the name is related to the clock source one by one.
++- status: should be set to "disable".
++
++Required properties for mipi csi2 on specified board:
++- ipu_id: ipu id which mipi csi2 connected to.
++ should be 0 or 1 for i.MX6DQ; should be 0 for i.MX6SDL
++- csi_id: csi id which mipi csi2 connected to.
++ should be 0 or 1 for i.MX6DQ/i.MX6SDL
++- v_channel: virtual channel which send to MIPI CSI2 controller
++ should keep consistent with the input MIPI signal.
++- lanes: data lanes of input MIPI signal. The maximum data lanes is 4.
++ should keep consistent with the input MIPI signal.
++- status: should be set to "okay".
++
++Examples:
++for SOC imx6qdl.dtsi:
++ mipi_csi@021dc000 {
++ compatible = "fsl,imx6q-mipi-csi2";
++ reg = <0x021dc000 0x4000>;
++ interrupts = <0 100 0x04>, <0 101 0x04>;
++ clocks = <&clks 138>, <&clks 53>, <&clks 204>;
++ clock-names = "dphy_clk", "pixel_clk", "cfg_clk";
++ status = "disabled";
++ };
++
++for board imx6qdl-sabresd.dtsi:
++ mipi_csi@021dc000 {
++ status = "okay";
++ ipu_id = <0>;
++ csi_id = <1>;
++ v_channel = <0>;
++ lanes = <2>;
++ };
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/video/fsl,pxp.txt linux-3.14.54/Documentation/devicetree/bindings/video/fsl,pxp.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/video/fsl,pxp.txt 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/Documentation/devicetree/bindings/video/fsl,pxp.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -0,0 +1,30 @@
++* Freescale PxP Controller for i.MX6DL, i.MX6SL
++
++Required properties for PxP controller:
++- compatible: should be "fsl,<soc>-pxp-dma"
++- reg: <base addr, range> contains pxp register base address and range
++- interrupts: <type num flag> where type is an interrupt type, num is the
++ interrupt number and flag is a field that level/trigger information for
++ the interrupt.
++- clocks: the clock sources that pxp depends on.
++- clock-names: the name is related to the clock source
++
++Required properties for pxp on specified board:
++- status: should be set to "okay" if want to use PxP
++
++Examples:
++for SOC imx6dl.dtsi:
++ pxp@020f0000 {
++ compatible = "fsl,imx6dl-pxp-dma";
++ reg = <0x020f0000 0x4000>;
++ interrupts = <0 98 0x04>;
++ clocks = <&clks 133>;
++ clock-names = "pxp-axi";
++ status = "disabled";
++ };
++
++
++for board imx6dl-sabresd.dts:
++ &pxp {
++ status = "okay";
++ };
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/video/fsl,v4l2-capture.txt linux-3.14.54/Documentation/devicetree/bindings/video/fsl,v4l2-capture.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/video/fsl,v4l2-capture.txt 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/Documentation/devicetree/bindings/video/fsl,v4l2-capture.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -0,0 +1,102 @@
++* Freescale V4L2 Capture for i.MX6DQ/i.MX6SDL
++
++Required board properties for IPUv3 capture:
++- clocks: should include the clock provided by i.MX6 to sensor
++- clock-names: sensor clock's name should be "ipux_csiy"
++ x should be 1 or 2 for i.MX6DQ; should be 1 for i.MX6SDL
++ y is 0 or 1 for i.MX6DQ/i.MX6SDL
++Note: other detailed information for IPUv3, please refer to
++Documentation/devicetree/bindings/fb/fsl_ipuv3_fb.txt
++
++Required properties for v4l2_capture
++- compatible: should be "fsl,imx6q-v4l2-capture"
++- ipu_id: ipu id for v4l2 capture device
++ should be 0 or 1 for i.MX6DQ; should be 0 for i.MX6SDL
++- csi_id: csi id for v4l2 capture device
++ should be 0 or 1 for i.MX6DQ/i.MX6SDL
++- mclk_source: should be 0 or 1. two mclk sources at most now
++- status: should be set to "okay" to enable this device
++
++Required properties for sensor
++- compatible: "<vendor>,<sensor>"
++ please check the supported sensor in the Supported Sensor fields.
++- reg: sensor I2C slave address
++- pinctrl-names: should be "default" for parallel sensor
++- pinctrl-0: should depend on the connection between sensor and i.MX
++ connection between sensor and i.MX could be MIPI-CSI2 or legacy parallel
++- clocks: should be the clock source provided to sensor.
++- clock-names: should be "csi_mclk"
++- DOVDD-supply: set according to the board.
++- AVDD-supply: set according to the board.
++- DVDD-supply: set according to the board.
++- pwn-gpios: set according to the board.
++- rst-gpios: set according to the board.
++- csi_id: csi id for v4l2 capture device
++ should be 0 or 1 for i.MX6DQ/i.MX6SDL.
++- mclk: should the value of mclk clock send out the sensor. unit is Hz.
++- mclk_source: should be 0 or 1 and should be the same as the setting in
++ v4l2_capture.
++- cvbs: 1 for CVBS input, 0 YPbPr input. This property is only needed for
++ adv7180 tv decoder.
++
++Supported Sensor
++- ov5640
++- ov5642
++- ov5640_mipi
++- adv7180
++
++
++Example for IPUv3 including capture settings on imx6q-sabresd.dts:
++ ipu1: ipu@02400000 { /* IPU1 */
++ compatible = "fsl,imx6q-ipuv3";
++ reg = <0x02400000 0x400000>;
++ interrupts = <0 5 0x04>, < 0 6 0x04>;
++ clocks = <&clks 130>, <&clks 131>, <&clks 132>, <&clks 39>, <&clks 40>, <&clks 169>;
++ clock-names = "ipu1", "ipu1_di0", "ipu1_di1", "ipu1_di0_sel", "ipu1_di1_sel", "ipu1_csi0";
++ status = "disabled";
++ };
++
++Examples for v4l2_capture:
++ v4l2_cap {
++ compatible = "fsl,imx6q-v4l2-capture";
++ ipu_id = <0>;
++ csi_id = <0>;
++ mclk_source = <0>;
++ status = "okay";
++ };
++
++Examples for sensors:
++ ov5642: ov5642@3c {
++ compatible = "ovti,ov5642";
++ reg = <0x3c>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ipu1_2>;
++ clocks = <&clks 201>;
++ clock-names = "csi_mclk";
++ DOVDD-supply = <&vgen4_reg>; /* 1.8v */
++ AVDD-supply = <&vgen3_reg>; /* 2.8v, on rev C board is VGEN3 */
++ DVDD-supply = <&vgen2_reg>; /* 1.5v*/
++ pwn-gpios = <&gpio1 16 1>; /* active low: SD1_DAT0 */
++ rst-gpios = <&gpio1 17 0>; /* active high: SD1_DAT1 */
++ csi_id = <0>;
++ mclk = <24000000>;
++ mclk_source = <0>;
++ };
++
++ adv7180: adv7180@21 {
++ compatible = "adv,adv7180";
++ reg = <0x21>;
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_ipu1_3>;
++ clocks = <&clks 201>;
++ clock-names = "csi_mclk";
++ DOVDD-supply = <&reg_3p3v>; /* 3.3v, enabled via 2.8 VGEN6 */
++ AVDD-supply = <&reg_3p3v>; /* 1.8v */
++ DVDD-supply = <&reg_3p3v>; /* 1.8v */
++ PVDD-supply = <&reg_3p3v>; /* 1.8v */
++ pwn-gpios = <&max7310_b 2 0>;
++ csi_id = <0>;
++ mclk = <24000000>;
++ mclk_source = <0>;
++ cvbs = <1>;
++ };
+diff -Nur linux-3.14.54.orig/Documentation/devicetree/bindings/video/mxc_hdmi_video.txt linux-3.14.54/Documentation/devicetree/bindings/video/mxc_hdmi_video.txt
+--- linux-3.14.54.orig/Documentation/devicetree/bindings/video/mxc_hdmi_video.txt 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/Documentation/devicetree/bindings/video/mxc_hdmi_video.txt 2015-10-15 15:51:25.020670575 +0200
+@@ -0,0 +1,20 @@
++Device-Tree bindings for hdmi video driver
++
++Required properties:
++- compatible: value should be "fsl,imx6q-hdmi-video".
++- fsl,hdcp: define the property in dts, hdmi driver will initalize for hdcp,
++ otherwise hdcp function will not supported.
++- fsl,phy_reg_vlev: hdmi phy register,Voltage Level Control Register offset 0x0e,
++ adjust hdmi phy signal voltage level.
++- fsl,phy_reg_cksymtx: hdmi phy register, clock symbol and transmitter control
++ register offset 0x09, adjust hdmi signal pre-emphasis.
++
++Example:
++
++ hdmi_video {
++ compatible = "fsl,imx6q-hdmi-video";
++ fsl,hdcp;
++ fsl,phy_reg_vlev = <0x0294>;
++ fsl,phy_reg_cksymtx = <0x800d>;
++ };
++
+diff -Nur linux-3.14.54.orig/Documentation/filesystems/hfsplus.txt linux-3.14.54/Documentation/filesystems/hfsplus.txt
+--- linux-3.14.54.orig/Documentation/filesystems/hfsplus.txt 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/Documentation/filesystems/hfsplus.txt 2015-10-15 15:51:25.024670313 +0200
+@@ -56,4 +56,4 @@
+
+ kernel source: <file:fs/hfsplus>
+
+-Apple Technote 1150 http://developer.apple.com/technotes/tn/tn1150.html
++Apple Technote 1150 https://developer.apple.com/legacy/library/technotes/tn/tn1150.html
+diff -Nur linux-3.14.54.orig/Documentation/kernel-parameters.txt linux-3.14.54/Documentation/kernel-parameters.txt
+--- linux-3.14.54.orig/Documentation/kernel-parameters.txt 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/Documentation/kernel-parameters.txt 2015-10-15 15:51:25.024670313 +0200
+@@ -603,8 +603,11 @@
+ Also note the kernel might malfunction if you disable
+ some critical bits.
+
+- cma=nn[MG] [ARM,KNL]
+- Sets the size of kernel global memory area for contiguous
++ cma=nn[MG]@[start[MG][-end[MG]]]
++ [ARM,X86,KNL]
++ Sets the size of kernel global memory area for
++ contiguous memory allocations and optionally the
++ placement constraint by the physical address range of
+ memory allocations. For more information, see
+ include/linux/dma-contiguous.h
+
+diff -Nur linux-3.14.54.orig/Documentation/networking/gianfar.txt linux-3.14.54/Documentation/networking/gianfar.txt
+--- linux-3.14.54.orig/Documentation/networking/gianfar.txt 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/Documentation/networking/gianfar.txt 2015-10-15 15:51:25.024670313 +0200
+@@ -1,38 +1,8 @@
+ The Gianfar Ethernet Driver
+-Sysfs File description
+
+ Author: Andy Fleming <afleming@freescale.com>
+ Updated: 2005-07-28
+
+-SYSFS
+-
+-Several of the features of the gianfar driver are controlled
+-through sysfs files. These are:
+-
+-bd_stash:
+-To stash RX Buffer Descriptors in the L2, echo 'on' or '1' to
+-bd_stash, echo 'off' or '0' to disable
+-
+-rx_stash_len:
+-To stash the first n bytes of the packet in L2, echo the number
+-of bytes to buf_stash_len. echo 0 to disable.
+-
+-WARNING: You could really screw these up if you set them too low or high!
+-fifo_threshold:
+-To change the number of bytes the controller needs in the
+-fifo before it starts transmission, echo the number of bytes to
+-fifo_thresh. Range should be 0-511.
+-
+-fifo_starve:
+-When the FIFO has less than this many bytes during a transmit, it
+-enters starve mode, and increases the priority of TX memory
+-transactions. To change, echo the number of bytes to
+-fifo_starve. Range should be 0-511.
+-
+-fifo_starve_off:
+-Once in starve mode, the FIFO remains there until it has this
+-many bytes. To change, echo the number of bytes to
+-fifo_starve_off. Range should be 0-511.
+
+ CHECKSUM OFFLOADING
- # SFF w/ custom DMA
- obj-$(CONFIG_PDC_ADMA) += pdc_adma.o
diff -Nur linux-3.14.54.orig/drivers/ata/acard-ahci.c linux-3.14.54/drivers/ata/acard-ahci.c
--- linux-3.14.54.orig/drivers/ata/acard-ahci.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/acard-ahci.c 2015-10-12 10:56:17.954351168 +0200
++++ linux-3.14.54/drivers/ata/acard-ahci.c 2015-10-15 15:51:25.024670313 +0200
@@ -36,7 +36,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -51931,7 +51859,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/acard-ahci.c linux-3.14.54/drivers/ata/
#include <linux/interrupt.h>
diff -Nur linux-3.14.54.orig/drivers/ata/ahci.c linux-3.14.54/drivers/ata/ahci.c
--- linux-3.14.54.orig/drivers/ata/ahci.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/ahci.c 2015-10-12 10:56:17.954351168 +0200
++++ linux-3.14.54/drivers/ata/ahci.c 2015-10-15 15:51:25.024670313 +0200
@@ -35,7 +35,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -52005,7 +51933,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/ahci.c linux-3.14.54/drivers/ata/ahci.c
diff -Nur linux-3.14.54.orig/drivers/ata/ahci.h linux-3.14.54/drivers/ata/ahci.h
--- linux-3.14.54.orig/drivers/ata/ahci.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/ahci.h 2015-10-12 10:56:17.955351168 +0200
++++ linux-3.14.54/drivers/ata/ahci.h 2015-10-15 15:51:25.024670313 +0200
@@ -37,6 +37,8 @@
#include <linux/clk.h>
@@ -52053,7 +51981,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/ahci.h linux-3.14.54/drivers/ata/ahci.h
extern int ahci_ignore_sss;
diff -Nur linux-3.14.54.orig/drivers/ata/ahci_imx.c linux-3.14.54/drivers/ata/ahci_imx.c
--- linux-3.14.54.orig/drivers/ata/ahci_imx.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/ahci_imx.c 2015-10-12 10:56:17.956351168 +0200
++++ linux-3.14.54/drivers/ata/ahci_imx.c 2015-10-15 15:51:25.024670313 +0200
@@ -26,12 +26,29 @@
#include <linux/mfd/syscon.h>
#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
@@ -52876,7 +52804,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/ahci_imx.c linux-3.14.54/drivers/ata/ah
module_platform_driver(imx_ahci_driver);
diff -Nur linux-3.14.54.orig/drivers/ata/ahci_platform.c linux-3.14.54/drivers/ata/ahci_platform.c
--- linux-3.14.54.orig/drivers/ata/ahci_platform.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/ahci_platform.c 2015-10-12 10:56:17.956351168 +0200
++++ linux-3.14.54/drivers/ata/ahci_platform.c 2015-10-15 15:51:25.024670313 +0200
@@ -12,135 +12,36 @@
* any later version.
*/
@@ -53227,7 +53155,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/ahci_platform.c linux-3.14.54/drivers/a
diff -Nur linux-3.14.54.orig/drivers/ata/ata_generic.c linux-3.14.54/drivers/ata/ata_generic.c
--- linux-3.14.54.orig/drivers/ata/ata_generic.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/ata_generic.c 2015-10-12 10:56:17.956351168 +0200
++++ linux-3.14.54/drivers/ata/ata_generic.c 2015-10-15 15:51:25.024670313 +0200
@@ -19,7 +19,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -53236,9 +53164,21 @@ diff -Nur linux-3.14.54.orig/drivers/ata/ata_generic.c linux-3.14.54/drivers/ata
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <scsi/scsi_host.h>
+diff -Nur linux-3.14.54.orig/drivers/ata/Kconfig linux-3.14.54/drivers/ata/Kconfig
+--- linux-3.14.54.orig/drivers/ata/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/ata/Kconfig 2015-10-15 15:51:25.024670313 +0200
+@@ -99,7 +99,7 @@
+
+ config AHCI_IMX
+ tristate "Freescale i.MX AHCI SATA support"
+- depends on SATA_AHCI_PLATFORM && MFD_SYSCON
++ depends on MFD_SYSCON
+ help
+ This option enables support for the Freescale i.MX SoC's
+ onboard AHCI SATA.
diff -Nur linux-3.14.54.orig/drivers/ata/libahci.c linux-3.14.54/drivers/ata/libahci.c
--- linux-3.14.54.orig/drivers/ata/libahci.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/libahci.c 2015-10-12 10:56:17.958351168 +0200
++++ linux-3.14.54/drivers/ata/libahci.c 2015-10-15 15:51:25.024670313 +0200
@@ -35,7 +35,6 @@
#include <linux/kernel.h>
#include <linux/gfp.h>
@@ -55850,7 +55790,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/libahci.c.orig linux-3.14.54/drivers/at
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/ata/libahci_platform.c linux-3.14.54/drivers/ata/libahci_platform.c
--- linux-3.14.54.orig/drivers/ata/libahci_platform.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/ata/libahci_platform.c 2015-10-12 10:56:17.958351168 +0200
++++ linux-3.14.54/drivers/ata/libahci_platform.c 2015-10-15 15:51:25.024670313 +0200
@@ -0,0 +1,544 @@
+/*
+ * AHCI SATA platform library
@@ -56398,7 +56338,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/libahci_platform.c linux-3.14.54/driver
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/ata/libata-core.c linux-3.14.54/drivers/ata/libata-core.c
--- linux-3.14.54.orig/drivers/ata/libata-core.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/libata-core.c 2015-10-12 10:56:17.959351168 +0200
++++ linux-3.14.54/drivers/ata/libata-core.c 2015-10-15 15:51:25.028670049 +0200
@@ -1524,7 +1524,7 @@
* @dev: Device to which the command is sent
* @tf: Taskfile registers for the command and the result
@@ -56417,9 +56357,28 @@ diff -Nur linux-3.14.54.orig/drivers/ata/libata-core.c linux-3.14.54/drivers/ata
* @buf: Data buffer of the command
* @buflen: Length of data buffer
* @timeout: Timeout in msecs (0 for default)
+diff -Nur linux-3.14.54.orig/drivers/ata/Makefile linux-3.14.54/drivers/ata/Makefile
+--- linux-3.14.54.orig/drivers/ata/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/ata/Makefile 2015-10-15 15:51:25.028670049 +0200
+@@ -4,13 +4,13 @@
+ # non-SFF interface
+ obj-$(CONFIG_SATA_AHCI) += ahci.o libahci.o
+ obj-$(CONFIG_SATA_ACARD_AHCI) += acard-ahci.o libahci.o
+-obj-$(CONFIG_SATA_AHCI_PLATFORM) += ahci_platform.o libahci.o
++obj-$(CONFIG_SATA_AHCI_PLATFORM) += ahci_platform.o libahci.o libahci_platform.o
+ obj-$(CONFIG_SATA_FSL) += sata_fsl.o
+ obj-$(CONFIG_SATA_INIC162X) += sata_inic162x.o
+ obj-$(CONFIG_SATA_SIL24) += sata_sil24.o
+ obj-$(CONFIG_SATA_DWC) += sata_dwc_460ex.o
+ obj-$(CONFIG_SATA_HIGHBANK) += sata_highbank.o libahci.o
+-obj-$(CONFIG_AHCI_IMX) += ahci_imx.o
++obj-$(CONFIG_AHCI_IMX) += ahci_imx.o libahci.o libahci_platform.o
+
+ # SFF w/ custom DMA
+ obj-$(CONFIG_PDC_ADMA) += pdc_adma.o
diff -Nur linux-3.14.54.orig/drivers/ata/pata_acpi.c linux-3.14.54/drivers/ata/pata_acpi.c
--- linux-3.14.54.orig/drivers/ata/pata_acpi.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_acpi.c 2015-10-12 10:56:17.960351167 +0200
++++ linux-3.14.54/drivers/ata/pata_acpi.c 2015-10-15 15:51:25.028670049 +0200
@@ -7,7 +7,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56430,7 +56389,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_acpi.c linux-3.14.54/drivers/ata/p
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_amd.c linux-3.14.54/drivers/ata/pata_amd.c
--- linux-3.14.54.orig/drivers/ata/pata_amd.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_amd.c 2015-10-12 10:56:17.961351167 +0200
++++ linux-3.14.54/drivers/ata/pata_amd.c 2015-10-15 15:51:25.028670049 +0200
@@ -17,7 +17,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56441,7 +56400,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_amd.c linux-3.14.54/drivers/ata/pa
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_artop.c linux-3.14.54/drivers/ata/pata_artop.c
--- linux-3.14.54.orig/drivers/ata/pata_artop.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_artop.c 2015-10-12 10:56:17.961351167 +0200
++++ linux-3.14.54/drivers/ata/pata_artop.c 2015-10-15 15:51:25.028670049 +0200
@@ -19,7 +19,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56452,7 +56411,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_artop.c linux-3.14.54/drivers/ata/
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_at91.c linux-3.14.54/drivers/ata/pata_at91.c
--- linux-3.14.54.orig/drivers/ata/pata_at91.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_at91.c 2015-10-12 10:56:17.961351167 +0200
++++ linux-3.14.54/drivers/ata/pata_at91.c 2015-10-15 15:51:25.028670049 +0200
@@ -18,7 +18,6 @@
#include <linux/kernel.h>
@@ -56463,7 +56422,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_at91.c linux-3.14.54/drivers/ata/p
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_atiixp.c linux-3.14.54/drivers/ata/pata_atiixp.c
--- linux-3.14.54.orig/drivers/ata/pata_atiixp.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_atiixp.c 2015-10-12 10:56:17.962351167 +0200
++++ linux-3.14.54/drivers/ata/pata_atiixp.c 2015-10-15 15:51:25.028670049 +0200
@@ -15,7 +15,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56474,7 +56433,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_atiixp.c linux-3.14.54/drivers/ata
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_atp867x.c linux-3.14.54/drivers/ata/pata_atp867x.c
--- linux-3.14.54.orig/drivers/ata/pata_atp867x.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_atp867x.c 2015-10-12 10:56:17.962351167 +0200
++++ linux-3.14.54/drivers/ata/pata_atp867x.c 2015-10-15 15:51:25.028670049 +0200
@@ -29,7 +29,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56485,7 +56444,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_atp867x.c linux-3.14.54/drivers/at
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_cmd640.c linux-3.14.54/drivers/ata/pata_cmd640.c
--- linux-3.14.54.orig/drivers/ata/pata_cmd640.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_cmd640.c 2015-10-12 10:56:17.963351167 +0200
++++ linux-3.14.54/drivers/ata/pata_cmd640.c 2015-10-15 15:51:25.028670049 +0200
@@ -15,7 +15,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56496,7 +56455,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_cmd640.c linux-3.14.54/drivers/ata
#include <linux/gfp.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_cmd64x.c linux-3.14.54/drivers/ata/pata_cmd64x.c
--- linux-3.14.54.orig/drivers/ata/pata_cmd64x.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_cmd64x.c 2015-10-12 10:56:17.963351167 +0200
++++ linux-3.14.54/drivers/ata/pata_cmd64x.c 2015-10-15 15:51:25.028670049 +0200
@@ -26,7 +26,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56507,7 +56466,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_cmd64x.c linux-3.14.54/drivers/ata
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_cs5520.c linux-3.14.54/drivers/ata/pata_cs5520.c
--- linux-3.14.54.orig/drivers/ata/pata_cs5520.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_cs5520.c 2015-10-12 10:56:17.963351167 +0200
++++ linux-3.14.54/drivers/ata/pata_cs5520.c 2015-10-15 15:51:25.028670049 +0200
@@ -34,7 +34,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56518,7 +56477,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_cs5520.c linux-3.14.54/drivers/ata
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_cs5530.c linux-3.14.54/drivers/ata/pata_cs5530.c
--- linux-3.14.54.orig/drivers/ata/pata_cs5530.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_cs5530.c 2015-10-12 10:56:17.964351167 +0200
++++ linux-3.14.54/drivers/ata/pata_cs5530.c 2015-10-15 15:51:25.028670049 +0200
@@ -26,7 +26,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56529,7 +56488,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_cs5530.c linux-3.14.54/drivers/ata
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_cs5535.c linux-3.14.54/drivers/ata/pata_cs5535.c
--- linux-3.14.54.orig/drivers/ata/pata_cs5535.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_cs5535.c 2015-10-12 10:56:17.964351167 +0200
++++ linux-3.14.54/drivers/ata/pata_cs5535.c 2015-10-15 15:51:25.028670049 +0200
@@ -31,7 +31,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56540,7 +56499,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_cs5535.c linux-3.14.54/drivers/ata
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_cs5536.c linux-3.14.54/drivers/ata/pata_cs5536.c
--- linux-3.14.54.orig/drivers/ata/pata_cs5536.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_cs5536.c 2015-10-12 10:56:17.965351167 +0200
++++ linux-3.14.54/drivers/ata/pata_cs5536.c 2015-10-15 15:51:25.028670049 +0200
@@ -33,7 +33,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56551,7 +56510,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_cs5536.c linux-3.14.54/drivers/ata
#include <linux/libata.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_cypress.c linux-3.14.54/drivers/ata/pata_cypress.c
--- linux-3.14.54.orig/drivers/ata/pata_cypress.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_cypress.c 2015-10-12 10:56:17.966351167 +0200
++++ linux-3.14.54/drivers/ata/pata_cypress.c 2015-10-15 15:51:25.028670049 +0200
@@ -11,7 +11,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56562,7 +56521,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_cypress.c linux-3.14.54/drivers/at
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_efar.c linux-3.14.54/drivers/ata/pata_efar.c
--- linux-3.14.54.orig/drivers/ata/pata_efar.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_efar.c 2015-10-12 10:56:17.966351167 +0200
++++ linux-3.14.54/drivers/ata/pata_efar.c 2015-10-15 15:51:25.028670049 +0200
@@ -14,7 +14,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56573,7 +56532,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_efar.c linux-3.14.54/drivers/ata/p
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_ep93xx.c linux-3.14.54/drivers/ata/pata_ep93xx.c
--- linux-3.14.54.orig/drivers/ata/pata_ep93xx.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_ep93xx.c 2015-10-12 10:56:17.967351167 +0200
++++ linux-3.14.54/drivers/ata/pata_ep93xx.c 2015-10-15 15:51:25.028670049 +0200
@@ -34,7 +34,6 @@
#include <linux/err.h>
#include <linux/kernel.h>
@@ -56584,7 +56543,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_ep93xx.c linux-3.14.54/drivers/ata
#include <linux/ata.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_hpt366.c linux-3.14.54/drivers/ata/pata_hpt366.c
--- linux-3.14.54.orig/drivers/ata/pata_hpt366.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_hpt366.c 2015-10-12 10:56:17.967351167 +0200
++++ linux-3.14.54/drivers/ata/pata_hpt366.c 2015-10-15 15:51:25.028670049 +0200
@@ -19,7 +19,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56595,7 +56554,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_hpt366.c linux-3.14.54/drivers/ata
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_hpt37x.c linux-3.14.54/drivers/ata/pata_hpt37x.c
--- linux-3.14.54.orig/drivers/ata/pata_hpt37x.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_hpt37x.c 2015-10-12 10:56:17.968351167 +0200
++++ linux-3.14.54/drivers/ata/pata_hpt37x.c 2015-10-15 15:51:25.028670049 +0200
@@ -19,7 +19,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56606,7 +56565,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_hpt37x.c linux-3.14.54/drivers/ata
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_hpt3x2n.c linux-3.14.54/drivers/ata/pata_hpt3x2n.c
--- linux-3.14.54.orig/drivers/ata/pata_hpt3x2n.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_hpt3x2n.c 2015-10-12 10:56:17.968351167 +0200
++++ linux-3.14.54/drivers/ata/pata_hpt3x2n.c 2015-10-15 15:51:25.028670049 +0200
@@ -20,7 +20,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56617,7 +56576,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_hpt3x2n.c linux-3.14.54/drivers/at
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_hpt3x3.c linux-3.14.54/drivers/ata/pata_hpt3x3.c
--- linux-3.14.54.orig/drivers/ata/pata_hpt3x3.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_hpt3x3.c 2015-10-12 10:56:17.969351167 +0200
++++ linux-3.14.54/drivers/ata/pata_hpt3x3.c 2015-10-15 15:51:25.028670049 +0200
@@ -16,7 +16,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56628,7 +56587,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_hpt3x3.c linux-3.14.54/drivers/ata
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_imx.c linux-3.14.54/drivers/ata/pata_imx.c
--- linux-3.14.54.orig/drivers/ata/pata_imx.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_imx.c 2015-10-12 10:56:17.969351167 +0200
++++ linux-3.14.54/drivers/ata/pata_imx.c 2015-10-15 15:51:25.028670049 +0200
@@ -15,7 +15,6 @@
*/
#include <linux/kernel.h>
@@ -56639,7 +56598,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_imx.c linux-3.14.54/drivers/ata/pa
#include <linux/ata.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_it8213.c linux-3.14.54/drivers/ata/pata_it8213.c
--- linux-3.14.54.orig/drivers/ata/pata_it8213.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_it8213.c 2015-10-12 10:56:17.970351167 +0200
++++ linux-3.14.54/drivers/ata/pata_it8213.c 2015-10-15 15:51:25.028670049 +0200
@@ -10,7 +10,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56650,7 +56609,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_it8213.c linux-3.14.54/drivers/ata
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_it821x.c linux-3.14.54/drivers/ata/pata_it821x.c
--- linux-3.14.54.orig/drivers/ata/pata_it821x.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_it821x.c 2015-10-12 10:56:17.970351167 +0200
++++ linux-3.14.54/drivers/ata/pata_it821x.c 2015-10-15 15:51:25.028670049 +0200
@@ -72,7 +72,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56661,7 +56620,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_it821x.c linux-3.14.54/drivers/ata
#include <linux/slab.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_jmicron.c linux-3.14.54/drivers/ata/pata_jmicron.c
--- linux-3.14.54.orig/drivers/ata/pata_jmicron.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_jmicron.c 2015-10-12 10:56:17.970351167 +0200
++++ linux-3.14.54/drivers/ata/pata_jmicron.c 2015-10-15 15:51:25.032669785 +0200
@@ -10,7 +10,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56672,7 +56631,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_jmicron.c linux-3.14.54/drivers/at
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_marvell.c linux-3.14.54/drivers/ata/pata_marvell.c
--- linux-3.14.54.orig/drivers/ata/pata_marvell.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_marvell.c 2015-10-12 10:56:17.971351167 +0200
++++ linux-3.14.54/drivers/ata/pata_marvell.c 2015-10-15 15:51:25.032669785 +0200
@@ -11,7 +11,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56683,7 +56642,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_marvell.c linux-3.14.54/drivers/at
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_mpiix.c linux-3.14.54/drivers/ata/pata_mpiix.c
--- linux-3.14.54.orig/drivers/ata/pata_mpiix.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_mpiix.c 2015-10-12 10:56:17.971351167 +0200
++++ linux-3.14.54/drivers/ata/pata_mpiix.c 2015-10-15 15:51:25.032669785 +0200
@@ -28,7 +28,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56694,7 +56653,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_mpiix.c linux-3.14.54/drivers/ata/
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_netcell.c linux-3.14.54/drivers/ata/pata_netcell.c
--- linux-3.14.54.orig/drivers/ata/pata_netcell.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_netcell.c 2015-10-12 10:56:17.972351167 +0200
++++ linux-3.14.54/drivers/ata/pata_netcell.c 2015-10-15 15:51:25.032669785 +0200
@@ -7,7 +7,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56705,7 +56664,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_netcell.c linux-3.14.54/drivers/at
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_ninja32.c linux-3.14.54/drivers/ata/pata_ninja32.c
--- linux-3.14.54.orig/drivers/ata/pata_ninja32.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_ninja32.c 2015-10-12 10:56:17.972351167 +0200
++++ linux-3.14.54/drivers/ata/pata_ninja32.c 2015-10-15 15:51:25.032669785 +0200
@@ -37,7 +37,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56716,7 +56675,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_ninja32.c linux-3.14.54/drivers/at
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_ns87410.c linux-3.14.54/drivers/ata/pata_ns87410.c
--- linux-3.14.54.orig/drivers/ata/pata_ns87410.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_ns87410.c 2015-10-12 10:56:17.972351167 +0200
++++ linux-3.14.54/drivers/ata/pata_ns87410.c 2015-10-15 15:51:25.032669785 +0200
@@ -20,7 +20,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56727,7 +56686,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_ns87410.c linux-3.14.54/drivers/at
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_ns87415.c linux-3.14.54/drivers/ata/pata_ns87415.c
--- linux-3.14.54.orig/drivers/ata/pata_ns87415.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_ns87415.c 2015-10-12 10:56:17.973351167 +0200
++++ linux-3.14.54/drivers/ata/pata_ns87415.c 2015-10-15 15:51:25.032669785 +0200
@@ -25,7 +25,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56738,7 +56697,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_ns87415.c linux-3.14.54/drivers/at
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_oldpiix.c linux-3.14.54/drivers/ata/pata_oldpiix.c
--- linux-3.14.54.orig/drivers/ata/pata_oldpiix.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_oldpiix.c 2015-10-12 10:56:17.973351167 +0200
++++ linux-3.14.54/drivers/ata/pata_oldpiix.c 2015-10-15 15:51:25.032669785 +0200
@@ -16,7 +16,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56749,7 +56708,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_oldpiix.c linux-3.14.54/drivers/at
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_opti.c linux-3.14.54/drivers/ata/pata_opti.c
--- linux-3.14.54.orig/drivers/ata/pata_opti.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_opti.c 2015-10-12 10:56:17.974351166 +0200
++++ linux-3.14.54/drivers/ata/pata_opti.c 2015-10-15 15:51:25.032669785 +0200
@@ -26,7 +26,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56760,7 +56719,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_opti.c linux-3.14.54/drivers/ata/p
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_optidma.c linux-3.14.54/drivers/ata/pata_optidma.c
--- linux-3.14.54.orig/drivers/ata/pata_optidma.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_optidma.c 2015-10-12 10:56:17.974351166 +0200
++++ linux-3.14.54/drivers/ata/pata_optidma.c 2015-10-15 15:51:25.032669785 +0200
@@ -25,7 +25,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56771,7 +56730,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_optidma.c linux-3.14.54/drivers/at
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_pcmcia.c linux-3.14.54/drivers/ata/pata_pcmcia.c
--- linux-3.14.54.orig/drivers/ata/pata_pcmcia.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_pcmcia.c 2015-10-12 10:56:17.974351166 +0200
++++ linux-3.14.54/drivers/ata/pata_pcmcia.c 2015-10-15 15:51:25.032669785 +0200
@@ -26,7 +26,6 @@
#include <linux/kernel.h>
@@ -56782,7 +56741,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_pcmcia.c linux-3.14.54/drivers/ata
#include <linux/slab.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_pdc2027x.c linux-3.14.54/drivers/ata/pata_pdc2027x.c
--- linux-3.14.54.orig/drivers/ata/pata_pdc2027x.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_pdc2027x.c 2015-10-12 10:56:17.975351166 +0200
++++ linux-3.14.54/drivers/ata/pata_pdc2027x.c 2015-10-15 15:51:25.032669785 +0200
@@ -25,7 +25,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56793,7 +56752,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_pdc2027x.c linux-3.14.54/drivers/a
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_pdc202xx_old.c linux-3.14.54/drivers/ata/pata_pdc202xx_old.c
--- linux-3.14.54.orig/drivers/ata/pata_pdc202xx_old.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_pdc202xx_old.c 2015-10-12 10:56:17.975351166 +0200
++++ linux-3.14.54/drivers/ata/pata_pdc202xx_old.c 2015-10-15 15:51:25.032669785 +0200
@@ -15,7 +15,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56804,7 +56763,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_pdc202xx_old.c linux-3.14.54/drive
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_piccolo.c linux-3.14.54/drivers/ata/pata_piccolo.c
--- linux-3.14.54.orig/drivers/ata/pata_piccolo.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_piccolo.c 2015-10-12 10:56:17.976351166 +0200
++++ linux-3.14.54/drivers/ata/pata_piccolo.c 2015-10-15 15:51:25.032669785 +0200
@@ -18,7 +18,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56815,7 +56774,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_piccolo.c linux-3.14.54/drivers/at
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_platform.c linux-3.14.54/drivers/ata/pata_platform.c
--- linux-3.14.54.orig/drivers/ata/pata_platform.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_platform.c 2015-10-12 10:56:17.976351166 +0200
++++ linux-3.14.54/drivers/ata/pata_platform.c 2015-10-15 15:51:25.032669785 +0200
@@ -13,7 +13,6 @@
*/
#include <linux/kernel.h>
@@ -56826,7 +56785,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_platform.c linux-3.14.54/drivers/a
#include <linux/ata.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_pxa.c linux-3.14.54/drivers/ata/pata_pxa.c
--- linux-3.14.54.orig/drivers/ata/pata_pxa.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_pxa.c 2015-10-12 10:56:17.976351166 +0200
++++ linux-3.14.54/drivers/ata/pata_pxa.c 2015-10-15 15:51:25.032669785 +0200
@@ -20,7 +20,6 @@
#include <linux/kernel.h>
@@ -56837,7 +56796,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_pxa.c linux-3.14.54/drivers/ata/pa
#include <linux/libata.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_radisys.c linux-3.14.54/drivers/ata/pata_radisys.c
--- linux-3.14.54.orig/drivers/ata/pata_radisys.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_radisys.c 2015-10-12 10:56:17.977351166 +0200
++++ linux-3.14.54/drivers/ata/pata_radisys.c 2015-10-15 15:51:25.032669785 +0200
@@ -15,7 +15,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56848,7 +56807,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_radisys.c linux-3.14.54/drivers/at
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_rdc.c linux-3.14.54/drivers/ata/pata_rdc.c
--- linux-3.14.54.orig/drivers/ata/pata_rdc.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_rdc.c 2015-10-12 10:56:17.977351166 +0200
++++ linux-3.14.54/drivers/ata/pata_rdc.c 2015-10-15 15:51:25.032669785 +0200
@@ -24,7 +24,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56859,7 +56818,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_rdc.c linux-3.14.54/drivers/ata/pa
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_rz1000.c linux-3.14.54/drivers/ata/pata_rz1000.c
--- linux-3.14.54.orig/drivers/ata/pata_rz1000.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_rz1000.c 2015-10-12 10:56:17.978351166 +0200
++++ linux-3.14.54/drivers/ata/pata_rz1000.c 2015-10-15 15:51:25.032669785 +0200
@@ -14,7 +14,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56870,7 +56829,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_rz1000.c linux-3.14.54/drivers/ata
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_sc1200.c linux-3.14.54/drivers/ata/pata_sc1200.c
--- linux-3.14.54.orig/drivers/ata/pata_sc1200.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_sc1200.c 2015-10-12 10:56:17.978351166 +0200
++++ linux-3.14.54/drivers/ata/pata_sc1200.c 2015-10-15 15:51:25.032669785 +0200
@@ -32,7 +32,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56881,7 +56840,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_sc1200.c linux-3.14.54/drivers/ata
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_scc.c linux-3.14.54/drivers/ata/pata_scc.c
--- linux-3.14.54.orig/drivers/ata/pata_scc.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_scc.c 2015-10-12 10:56:17.978351166 +0200
++++ linux-3.14.54/drivers/ata/pata_scc.c 2015-10-15 15:51:25.032669785 +0200
@@ -35,7 +35,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56892,7 +56851,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_scc.c linux-3.14.54/drivers/ata/pa
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_sch.c linux-3.14.54/drivers/ata/pata_sch.c
--- linux-3.14.54.orig/drivers/ata/pata_sch.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_sch.c 2015-10-12 10:56:17.979351166 +0200
++++ linux-3.14.54/drivers/ata/pata_sch.c 2015-10-15 15:51:25.032669785 +0200
@@ -27,7 +27,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56903,7 +56862,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_sch.c linux-3.14.54/drivers/ata/pa
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_serverworks.c linux-3.14.54/drivers/ata/pata_serverworks.c
--- linux-3.14.54.orig/drivers/ata/pata_serverworks.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_serverworks.c 2015-10-12 10:56:17.979351166 +0200
++++ linux-3.14.54/drivers/ata/pata_serverworks.c 2015-10-15 15:51:25.032669785 +0200
@@ -34,7 +34,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56914,7 +56873,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_serverworks.c linux-3.14.54/driver
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_sil680.c linux-3.14.54/drivers/ata/pata_sil680.c
--- linux-3.14.54.orig/drivers/ata/pata_sil680.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_sil680.c 2015-10-12 10:56:17.979351166 +0200
++++ linux-3.14.54/drivers/ata/pata_sil680.c 2015-10-15 15:51:25.032669785 +0200
@@ -25,7 +25,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56925,7 +56884,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_sil680.c linux-3.14.54/drivers/ata
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_sis.c linux-3.14.54/drivers/ata/pata_sis.c
--- linux-3.14.54.orig/drivers/ata/pata_sis.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_sis.c 2015-10-12 10:56:17.980351166 +0200
++++ linux-3.14.54/drivers/ata/pata_sis.c 2015-10-15 15:51:25.032669785 +0200
@@ -26,7 +26,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56936,7 +56895,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_sis.c linux-3.14.54/drivers/ata/pa
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_sl82c105.c linux-3.14.54/drivers/ata/pata_sl82c105.c
--- linux-3.14.54.orig/drivers/ata/pata_sl82c105.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_sl82c105.c 2015-10-12 10:56:17.980351166 +0200
++++ linux-3.14.54/drivers/ata/pata_sl82c105.c 2015-10-15 15:51:25.032669785 +0200
@@ -19,7 +19,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56947,7 +56906,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_sl82c105.c linux-3.14.54/drivers/a
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_triflex.c linux-3.14.54/drivers/ata/pata_triflex.c
--- linux-3.14.54.orig/drivers/ata/pata_triflex.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_triflex.c 2015-10-12 10:56:17.981351166 +0200
++++ linux-3.14.54/drivers/ata/pata_triflex.c 2015-10-15 15:51:25.032669785 +0200
@@ -36,7 +36,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56958,7 +56917,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_triflex.c linux-3.14.54/drivers/at
#include <scsi/scsi_host.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pata_via.c linux-3.14.54/drivers/ata/pata_via.c
--- linux-3.14.54.orig/drivers/ata/pata_via.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pata_via.c 2015-10-12 10:56:17.981351166 +0200
++++ linux-3.14.54/drivers/ata/pata_via.c 2015-10-15 15:51:25.032669785 +0200
@@ -55,7 +55,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -56969,7 +56928,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pata_via.c linux-3.14.54/drivers/ata/pa
#include <linux/gfp.h>
diff -Nur linux-3.14.54.orig/drivers/ata/pdc_adma.c linux-3.14.54/drivers/ata/pdc_adma.c
--- linux-3.14.54.orig/drivers/ata/pdc_adma.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/pdc_adma.c 2015-10-12 10:56:17.982351166 +0200
++++ linux-3.14.54/drivers/ata/pdc_adma.c 2015-10-15 15:51:25.036669522 +0200
@@ -36,7 +36,6 @@
#include <linux/module.h>
#include <linux/gfp.h>
@@ -56980,7 +56939,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/pdc_adma.c linux-3.14.54/drivers/ata/pd
#include <linux/interrupt.h>
diff -Nur linux-3.14.54.orig/drivers/ata/sata_dwc_460ex.c linux-3.14.54/drivers/ata/sata_dwc_460ex.c
--- linux-3.14.54.orig/drivers/ata/sata_dwc_460ex.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/sata_dwc_460ex.c 2015-10-12 10:56:17.982351166 +0200
++++ linux-3.14.54/drivers/ata/sata_dwc_460ex.c 2015-10-15 15:51:25.036669522 +0200
@@ -29,7 +29,6 @@
#include <linux/kernel.h>
@@ -56991,7 +56950,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/sata_dwc_460ex.c linux-3.14.54/drivers/
#include <linux/of_irq.h>
diff -Nur linux-3.14.54.orig/drivers/ata/sata_highbank.c linux-3.14.54/drivers/ata/sata_highbank.c
--- linux-3.14.54.orig/drivers/ata/sata_highbank.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/sata_highbank.c 2015-10-12 10:56:17.983351166 +0200
++++ linux-3.14.54/drivers/ata/sata_highbank.c 2015-10-15 15:51:25.036669522 +0200
@@ -19,7 +19,6 @@
#include <linux/kernel.h>
#include <linux/gfp.h>
@@ -57019,7 +56978,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/sata_highbank.c linux-3.14.54/drivers/a
*class = ahci_dev_classify(ap);
diff -Nur linux-3.14.54.orig/drivers/ata/sata_nv.c linux-3.14.54/drivers/ata/sata_nv.c
--- linux-3.14.54.orig/drivers/ata/sata_nv.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/sata_nv.c 2015-10-12 10:56:17.983351166 +0200
++++ linux-3.14.54/drivers/ata/sata_nv.c 2015-10-15 15:51:25.036669522 +0200
@@ -40,7 +40,6 @@
#include <linux/module.h>
#include <linux/gfp.h>
@@ -57030,7 +56989,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/sata_nv.c linux-3.14.54/drivers/ata/sat
#include <linux/interrupt.h>
diff -Nur linux-3.14.54.orig/drivers/ata/sata_promise.c linux-3.14.54/drivers/ata/sata_promise.c
--- linux-3.14.54.orig/drivers/ata/sata_promise.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/sata_promise.c 2015-10-12 10:56:17.984351166 +0200
++++ linux-3.14.54/drivers/ata/sata_promise.c 2015-10-15 15:51:25.036669522 +0200
@@ -35,7 +35,6 @@
#include <linux/module.h>
#include <linux/gfp.h>
@@ -57041,7 +57000,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/sata_promise.c linux-3.14.54/drivers/at
#include <linux/interrupt.h>
diff -Nur linux-3.14.54.orig/drivers/ata/sata_qstor.c linux-3.14.54/drivers/ata/sata_qstor.c
--- linux-3.14.54.orig/drivers/ata/sata_qstor.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/sata_qstor.c 2015-10-12 10:56:17.984351166 +0200
++++ linux-3.14.54/drivers/ata/sata_qstor.c 2015-10-15 15:51:25.036669522 +0200
@@ -31,7 +31,6 @@
#include <linux/module.h>
#include <linux/gfp.h>
@@ -57052,7 +57011,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/sata_qstor.c linux-3.14.54/drivers/ata/
#include <linux/interrupt.h>
diff -Nur linux-3.14.54.orig/drivers/ata/sata_sil.c linux-3.14.54/drivers/ata/sata_sil.c
--- linux-3.14.54.orig/drivers/ata/sata_sil.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/sata_sil.c 2015-10-12 10:56:17.984351166 +0200
++++ linux-3.14.54/drivers/ata/sata_sil.c 2015-10-15 15:51:25.036669522 +0200
@@ -37,7 +37,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -57063,7 +57022,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/sata_sil.c linux-3.14.54/drivers/ata/sa
#include <linux/interrupt.h>
diff -Nur linux-3.14.54.orig/drivers/ata/sata_sis.c linux-3.14.54/drivers/ata/sata_sis.c
--- linux-3.14.54.orig/drivers/ata/sata_sis.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/sata_sis.c 2015-10-12 10:56:17.985351166 +0200
++++ linux-3.14.54/drivers/ata/sata_sis.c 2015-10-15 15:51:25.036669522 +0200
@@ -33,7 +33,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -57074,7 +57033,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/sata_sis.c linux-3.14.54/drivers/ata/sa
#include <linux/interrupt.h>
diff -Nur linux-3.14.54.orig/drivers/ata/sata_svw.c linux-3.14.54/drivers/ata/sata_svw.c
--- linux-3.14.54.orig/drivers/ata/sata_svw.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/sata_svw.c 2015-10-12 10:56:17.985351166 +0200
++++ linux-3.14.54/drivers/ata/sata_svw.c 2015-10-15 15:51:25.036669522 +0200
@@ -39,7 +39,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -57085,7 +57044,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/sata_svw.c linux-3.14.54/drivers/ata/sa
#include <linux/interrupt.h>
diff -Nur linux-3.14.54.orig/drivers/ata/sata_sx4.c linux-3.14.54/drivers/ata/sata_sx4.c
--- linux-3.14.54.orig/drivers/ata/sata_sx4.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/sata_sx4.c 2015-10-12 10:56:17.986351166 +0200
++++ linux-3.14.54/drivers/ata/sata_sx4.c 2015-10-15 15:51:25.036669522 +0200
@@ -82,7 +82,6 @@
#include <linux/module.h>
#include <linux/pci.h>
@@ -57096,7 +57055,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/sata_sx4.c linux-3.14.54/drivers/ata/sa
#include <linux/interrupt.h>
diff -Nur linux-3.14.54.orig/drivers/ata/sata_uli.c linux-3.14.54/drivers/ata/sata_uli.c
--- linux-3.14.54.orig/drivers/ata/sata_uli.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/sata_uli.c 2015-10-12 10:56:17.986351166 +0200
++++ linux-3.14.54/drivers/ata/sata_uli.c 2015-10-15 15:51:25.036669522 +0200
@@ -28,7 +28,6 @@
#include <linux/module.h>
#include <linux/gfp.h>
@@ -57107,7 +57066,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/sata_uli.c linux-3.14.54/drivers/ata/sa
#include <linux/interrupt.h>
diff -Nur linux-3.14.54.orig/drivers/ata/sata_via.c linux-3.14.54/drivers/ata/sata_via.c
--- linux-3.14.54.orig/drivers/ata/sata_via.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/sata_via.c 2015-10-12 10:56:17.987351165 +0200
++++ linux-3.14.54/drivers/ata/sata_via.c 2015-10-15 15:51:25.036669522 +0200
@@ -36,7 +36,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -57118,7 +57077,7 @@ diff -Nur linux-3.14.54.orig/drivers/ata/sata_via.c linux-3.14.54/drivers/ata/sa
#include <linux/device.h>
diff -Nur linux-3.14.54.orig/drivers/ata/sata_vsc.c linux-3.14.54/drivers/ata/sata_vsc.c
--- linux-3.14.54.orig/drivers/ata/sata_vsc.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ata/sata_vsc.c 2015-10-12 10:56:17.987351165 +0200
++++ linux-3.14.54/drivers/ata/sata_vsc.c 2015-10-15 15:51:25.036669522 +0200
@@ -37,7 +37,6 @@
#include <linux/kernel.h>
#include <linux/module.h>
@@ -57127,44 +57086,9 @@ diff -Nur linux-3.14.54.orig/drivers/ata/sata_vsc.c linux-3.14.54/drivers/ata/sa
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-diff -Nur linux-3.14.54.orig/drivers/base/Kconfig linux-3.14.54/drivers/base/Kconfig
---- linux-3.14.54.orig/drivers/base/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/base/Kconfig 2015-10-12 10:56:17.989351165 +0200
-@@ -185,6 +185,14 @@
- bool
- default n
-
-+config HAVE_CPU_AUTOPROBE
-+ def_bool ARCH_HAS_CPU_AUTOPROBE
-+
-+config GENERIC_CPU_AUTOPROBE
-+ bool
-+ depends on !ARCH_HAS_CPU_AUTOPROBE
-+ select HAVE_CPU_AUTOPROBE
-+
- config SOC_BUS
- bool
-
-@@ -266,16 +274,6 @@
-
- If unsure, leave the default value "8".
-
--config CMA_AREAS
-- int "Maximum count of the CMA device-private areas"
-- default 7
-- help
-- CMA allows to create CMA areas for particular devices. This parameter
-- sets the maximum number of such device private CMA areas in the
-- system.
--
-- If unsure, leave the default value "7".
--
- endif
-
- endmenu
diff -Nur linux-3.14.54.orig/drivers/base/bus.c linux-3.14.54/drivers/base/bus.c
--- linux-3.14.54.orig/drivers/base/bus.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/base/bus.c 2015-10-12 10:56:17.987351165 +0200
++++ linux-3.14.54/drivers/base/bus.c 2015-10-15 15:51:25.036669522 +0200
@@ -1220,7 +1220,7 @@
* with the name of the subsystem. The root device can carry subsystem-
* wide attributes. All registered devices are below this single root
@@ -57176,7 +57100,7 @@ diff -Nur linux-3.14.54.orig/drivers/base/bus.c linux-3.14.54/drivers/base/bus.c
* Do not use this interface for anything new, it exists for compatibility
diff -Nur linux-3.14.54.orig/drivers/base/cpu.c linux-3.14.54/drivers/base/cpu.c
--- linux-3.14.54.orig/drivers/base/cpu.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/base/cpu.c 2015-10-12 10:56:17.988351165 +0200
++++ linux-3.14.54/drivers/base/cpu.c 2015-10-15 15:51:25.036669522 +0200
@@ -15,6 +15,7 @@
#include <linux/percpu.h>
#include <linux/acpi.h>
@@ -57264,7 +57188,7 @@ diff -Nur linux-3.14.54.orig/drivers/base/cpu.c linux-3.14.54/drivers/base/cpu.c
NULL
diff -Nur linux-3.14.54.orig/drivers/base/dma-buf.c linux-3.14.54/drivers/base/dma-buf.c
--- linux-3.14.54.orig/drivers/base/dma-buf.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/base/dma-buf.c 2015-10-12 10:56:17.988351165 +0200
++++ linux-3.14.54/drivers/base/dma-buf.c 2015-10-15 15:51:25.036669522 +0200
@@ -251,9 +251,8 @@
* @dmabuf: [in] buffer to attach device to.
* @dev: [in] device to be attached.
@@ -57320,7 +57244,7 @@ diff -Nur linux-3.14.54.orig/drivers/base/dma-buf.c linux-3.14.54/drivers/base/d
dmabuf->vmap_ptr = ptr;
diff -Nur linux-3.14.54.orig/drivers/base/dma-contiguous.c linux-3.14.54/drivers/base/dma-contiguous.c
--- linux-3.14.54.orig/drivers/base/dma-contiguous.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/base/dma-contiguous.c 2015-10-12 10:56:17.989351165 +0200
++++ linux-3.14.54/drivers/base/dma-contiguous.c 2015-10-15 15:51:25.036669522 +0200
@@ -24,22 +24,9 @@
#include <linux/memblock.h>
@@ -57648,9 +57572,44 @@ diff -Nur linux-3.14.54.orig/drivers/base/dma-contiguous.c linux-3.14.54/drivers
- return true;
+ return cma_release(dev_get_cma_area(dev), pages, count);
}
+diff -Nur linux-3.14.54.orig/drivers/base/Kconfig linux-3.14.54/drivers/base/Kconfig
+--- linux-3.14.54.orig/drivers/base/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/base/Kconfig 2015-10-15 15:51:25.036669522 +0200
+@@ -185,6 +185,14 @@
+ bool
+ default n
+
++config HAVE_CPU_AUTOPROBE
++ def_bool ARCH_HAS_CPU_AUTOPROBE
++
++config GENERIC_CPU_AUTOPROBE
++ bool
++ depends on !ARCH_HAS_CPU_AUTOPROBE
++ select HAVE_CPU_AUTOPROBE
++
+ config SOC_BUS
+ bool
+
+@@ -266,16 +274,6 @@
+
+ If unsure, leave the default value "8".
+
+-config CMA_AREAS
+- int "Maximum count of the CMA device-private areas"
+- default 7
+- help
+- CMA allows to create CMA areas for particular devices. This parameter
+- sets the maximum number of such device private CMA areas in the
+- system.
+-
+- If unsure, leave the default value "7".
+-
+ endif
+
+ endmenu
diff -Nur linux-3.14.54.orig/drivers/bus/arm-cci.c linux-3.14.54/drivers/bus/arm-cci.c
--- linux-3.14.54.orig/drivers/bus/arm-cci.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/bus/arm-cci.c 2015-10-12 10:56:17.990351165 +0200
++++ linux-3.14.54/drivers/bus/arm-cci.c 2015-10-15 15:51:25.036669522 +0200
@@ -26,6 +26,7 @@
#include <asm/cacheflush.h>
@@ -57679,45 +57638,9 @@ diff -Nur linux-3.14.54.orig/drivers/bus/arm-cci.c linux-3.14.54/drivers/bus/arm
np = of_find_matching_node(NULL, arm_cci_matches);
if (!np)
return -ENODEV;
-diff -Nur linux-3.14.54.orig/drivers/char/Kconfig linux-3.14.54/drivers/char/Kconfig
---- linux-3.14.54.orig/drivers/char/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/char/Kconfig 2015-10-12 10:56:17.990351165 +0200
-@@ -82,6 +82,21 @@
-
- If unsure, say N.
-
-+config FSL_OTP
-+ tristate "Freescale On-Chip OTP Memory Support"
-+ depends on HAS_IOMEM && OF
-+ help
-+ If you say Y here, you will get support for a character device
-+ interface into the One Time Programmable memory pages that are
-+ stored on the some Freescale i.MX processors. This will not get
-+ you access to the secure memory pages however. You will need to
-+ write your own secure code and reader for that.
-+
-+ To compile this driver as a module, choose M here: the module
-+ will be called fsl_otp.
-+
-+ If unsure, it is safe to say Y.
-+
- config PRINTER
- tristate "Parallel printer support"
- depends on PARPORT
-diff -Nur linux-3.14.54.orig/drivers/char/Makefile linux-3.14.54/drivers/char/Makefile
---- linux-3.14.54.orig/drivers/char/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/char/Makefile 2015-10-12 10:56:17.991351165 +0200
-@@ -16,6 +16,7 @@
- obj-$(CONFIG_IBM_BSR) += bsr.o
- obj-$(CONFIG_SGI_MBCS) += mbcs.o
- obj-$(CONFIG_BFIN_OTP) += bfin-otp.o
-+obj-$(CONFIG_FSL_OTP) += fsl_otp.o
-
- obj-$(CONFIG_PRINTER) += lp.o
-
diff -Nur linux-3.14.54.orig/drivers/char/fsl_otp.c linux-3.14.54/drivers/char/fsl_otp.c
--- linux-3.14.54.orig/drivers/char/fsl_otp.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/char/fsl_otp.c 2015-10-12 10:56:17.990351165 +0200
++++ linux-3.14.54/drivers/char/fsl_otp.c 2015-10-15 15:51:25.040669260 +0200
@@ -0,0 +1,316 @@
+/*
+ * Freescale On-Chip OTP driver
@@ -58035,21 +57958,45 @@ diff -Nur linux-3.14.54.orig/drivers/char/fsl_otp.c linux-3.14.54/drivers/char/f
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Huang Shijie <b32955@freescale.com>");
+MODULE_DESCRIPTION("Freescale i.MX OCOTP driver");
-diff -Nur linux-3.14.54.orig/drivers/clk/clk-mux.c linux-3.14.54/drivers/clk/clk-mux.c
---- linux-3.14.54.orig/drivers/clk/clk-mux.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/clk/clk-mux.c 2015-10-12 10:56:17.991351165 +0200
-@@ -143,7 +143,7 @@
- init.ops = &clk_mux_ro_ops;
- else
- init.ops = &clk_mux_ops;
-- init.flags = flags | CLK_IS_BASIC;
-+ init.flags = flags | CLK_IS_BASIC | CLK_IS_BASIC_MUX;
- init.parent_names = parent_names;
- init.num_parents = num_parents;
+diff -Nur linux-3.14.54.orig/drivers/char/Kconfig linux-3.14.54/drivers/char/Kconfig
+--- linux-3.14.54.orig/drivers/char/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/char/Kconfig 2015-10-15 15:51:25.040669260 +0200
+@@ -82,6 +82,21 @@
+
+ If unsure, say N.
+
++config FSL_OTP
++ tristate "Freescale On-Chip OTP Memory Support"
++ depends on HAS_IOMEM && OF
++ help
++ If you say Y here, you will get support for a character device
++ interface into the One Time Programmable memory pages that are
++ stored on the some Freescale i.MX processors. This will not get
++ you access to the secure memory pages however. You will need to
++ write your own secure code and reader for that.
++
++ To compile this driver as a module, choose M here: the module
++ will be called fsl_otp.
++
++ If unsure, it is safe to say Y.
++
+ config PRINTER
+ tristate "Parallel printer support"
+ depends on PARPORT
+diff -Nur linux-3.14.54.orig/drivers/char/Makefile linux-3.14.54/drivers/char/Makefile
+--- linux-3.14.54.orig/drivers/char/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/char/Makefile 2015-10-15 15:51:25.040669260 +0200
+@@ -16,6 +16,7 @@
+ obj-$(CONFIG_IBM_BSR) += bsr.o
+ obj-$(CONFIG_SGI_MBCS) += mbcs.o
+ obj-$(CONFIG_BFIN_OTP) += bfin-otp.o
++obj-$(CONFIG_FSL_OTP) += fsl_otp.o
+
+ obj-$(CONFIG_PRINTER) += lp.o
diff -Nur linux-3.14.54.orig/drivers/clk/clk.c linux-3.14.54/drivers/clk/clk.c
--- linux-3.14.54.orig/drivers/clk/clk.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/clk/clk.c 2015-10-12 10:56:17.991351165 +0200
++++ linux-3.14.54/drivers/clk/clk.c 2015-10-15 15:51:25.040669260 +0200
@@ -1707,6 +1707,7 @@
*/
int clk_set_parent(struct clk *clk, struct clk *parent)
@@ -58077,95 +58024,21 @@ diff -Nur linux-3.14.54.orig/drivers/clk/clk.c linux-3.14.54/drivers/clk/clk.c
/* try finding the new parent index */
if (parent) {
p_index = clk_fetch_parent_index(clk, parent);
-diff -Nur linux-3.14.54.orig/drivers/cpufreq/Kconfig linux-3.14.54/drivers/cpufreq/Kconfig
---- linux-3.14.54.orig/drivers/cpufreq/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/cpufreq/Kconfig 2015-10-12 10:56:17.993351165 +0200
-@@ -91,6 +91,15 @@
- governor. If unsure have a look at the help section of the
- driver. Fallback governor will be the performance governor.
-
-+config CPU_FREQ_DEFAULT_GOV_INTERACTIVE
-+ bool "interactive"
-+ select CPU_FREQ_GOV_INTERACTIVE
-+ help
-+ Use the CPUFreq governor 'interactive' as default. This allows
-+ you to get a full dynamic cpu frequency capable system by simply
-+ loading your cpufreq low-level hardware driver, using the
-+ 'interactive' governor for latency-sensitive workloads.
-+
- config CPU_FREQ_DEFAULT_GOV_CONSERVATIVE
- bool "conservative"
- select CPU_FREQ_GOV_CONSERVATIVE
-@@ -157,6 +166,24 @@
-
- For details, take a look at linux/Documentation/cpu-freq.
-
-+ If in doubt, say N.
-+
-+config CPU_FREQ_GOV_INTERACTIVE
-+ tristate "'interactive' cpufreq policy governor"
-+ default n
-+ help
-+ 'interactive' - This driver adds a dynamic cpufreq policy governor
-+ designed for latency-sensitive workloads.
-+
-+ This governor attempts to reduce the latency of clock
-+ increases so that the system is more responsive to
-+ interactive workloads.
-+
-+ To compile this driver as a module, choose M here: the
-+ module will be called cpufreq_interactive.
-+
-+ For details, take a look at linux/Documentation/cpu-freq.
-+
- If in doubt, say N.
-
- config CPU_FREQ_GOV_CONSERVATIVE
-diff -Nur linux-3.14.54.orig/drivers/cpufreq/Kconfig.arm linux-3.14.54/drivers/cpufreq/Kconfig.arm
---- linux-3.14.54.orig/drivers/cpufreq/Kconfig.arm 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/cpufreq/Kconfig.arm 2015-10-12 10:56:17.994351165 +0200
-@@ -4,7 +4,8 @@
-
- config ARM_BIG_LITTLE_CPUFREQ
- tristate "Generic ARM big LITTLE CPUfreq driver"
-- depends on ARM && BIG_LITTLE && ARM_CPU_TOPOLOGY && HAVE_CLK
-+ depends on (BIG_LITTLE && ARM_CPU_TOPOLOGY) || (ARM64 && SMP)
-+ depends on HAVE_CLK
- select PM_OPP
- help
- This enables the Generic CPUfreq driver for ARM big.LITTLE platforms.
-@@ -95,7 +96,7 @@
-
- If in doubt, say N.
-
--config ARM_IMX6Q_CPUFREQ
-+config ARM_IMX6_CPUFREQ
- tristate "Freescale i.MX6 cpufreq support"
- depends on ARCH_MXC
- depends on REGULATOR_ANATOP
-diff -Nur linux-3.14.54.orig/drivers/cpufreq/Makefile linux-3.14.54/drivers/cpufreq/Makefile
---- linux-3.14.54.orig/drivers/cpufreq/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/cpufreq/Makefile 2015-10-12 10:56:17.994351165 +0200
-@@ -8,6 +8,7 @@
- obj-$(CONFIG_CPU_FREQ_GOV_POWERSAVE) += cpufreq_powersave.o
- obj-$(CONFIG_CPU_FREQ_GOV_USERSPACE) += cpufreq_userspace.o
- obj-$(CONFIG_CPU_FREQ_GOV_ONDEMAND) += cpufreq_ondemand.o
-+obj-$(CONFIG_CPU_FREQ_GOV_INTERACTIVE) += cpufreq_interactive.o
- obj-$(CONFIG_CPU_FREQ_GOV_CONSERVATIVE) += cpufreq_conservative.o
- obj-$(CONFIG_CPU_FREQ_GOV_COMMON) += cpufreq_governor.o
+diff -Nur linux-3.14.54.orig/drivers/clk/clk-mux.c linux-3.14.54/drivers/clk/clk-mux.c
+--- linux-3.14.54.orig/drivers/clk/clk-mux.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/clk/clk-mux.c 2015-10-15 15:51:25.040669260 +0200
+@@ -143,7 +143,7 @@
+ init.ops = &clk_mux_ro_ops;
+ else
+ init.ops = &clk_mux_ops;
+- init.flags = flags | CLK_IS_BASIC;
++ init.flags = flags | CLK_IS_BASIC | CLK_IS_BASIC_MUX;
+ init.parent_names = parent_names;
+ init.num_parents = num_parents;
-@@ -55,7 +56,7 @@
- obj-$(CONFIG_ARM_EXYNOS5250_CPUFREQ) += exynos5250-cpufreq.o
- obj-$(CONFIG_ARM_EXYNOS5440_CPUFREQ) += exynos5440-cpufreq.o
- obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += highbank-cpufreq.o
--obj-$(CONFIG_ARM_IMX6Q_CPUFREQ) += imx6q-cpufreq.o
-+obj-$(CONFIG_ARM_IMX6_CPUFREQ) += imx6-cpufreq.o
- obj-$(CONFIG_ARM_INTEGRATOR) += integrator-cpufreq.o
- obj-$(CONFIG_ARM_KIRKWOOD_CPUFREQ) += kirkwood-cpufreq.o
- obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o
diff -Nur linux-3.14.54.orig/drivers/cpufreq/cpufreq_interactive.c linux-3.14.54/drivers/cpufreq/cpufreq_interactive.c
--- linux-3.14.54.orig/drivers/cpufreq/cpufreq_interactive.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/cpufreq/cpufreq_interactive.c 2015-10-12 10:56:17.992351165 +0200
++++ linux-3.14.54/drivers/cpufreq/cpufreq_interactive.c 2015-10-15 15:51:25.040669260 +0200
@@ -0,0 +1,1349 @@
+/*
+ * drivers/cpufreq/cpufreq_interactive.c
@@ -59518,7 +59391,7 @@ diff -Nur linux-3.14.54.orig/drivers/cpufreq/cpufreq_interactive.c linux-3.14.54
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/cpufreq/highbank-cpufreq.c linux-3.14.54/drivers/cpufreq/highbank-cpufreq.c
--- linux-3.14.54.orig/drivers/cpufreq/highbank-cpufreq.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/cpufreq/highbank-cpufreq.c 2015-10-12 10:56:17.993351165 +0200
++++ linux-3.14.54/drivers/cpufreq/highbank-cpufreq.c 2015-10-15 15:51:25.040669260 +0200
@@ -19,7 +19,7 @@
#include <linux/cpu.h>
#include <linux/err.h>
@@ -59530,7 +59403,7 @@ diff -Nur linux-3.14.54.orig/drivers/cpufreq/highbank-cpufreq.c linux-3.14.54/dr
#define HB_CPUFREQ_CHANGE_NOTE 0x80000001
diff -Nur linux-3.14.54.orig/drivers/cpufreq/imx6-cpufreq.c linux-3.14.54/drivers/cpufreq/imx6-cpufreq.c
--- linux-3.14.54.orig/drivers/cpufreq/imx6-cpufreq.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/cpufreq/imx6-cpufreq.c 2015-10-12 10:56:17.993351165 +0200
++++ linux-3.14.54/drivers/cpufreq/imx6-cpufreq.c 2015-10-15 15:51:25.040669260 +0200
@@ -0,0 +1,393 @@
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
@@ -60259,9 +60132,95 @@ diff -Nur linux-3.14.54.orig/drivers/cpufreq/imx6q-cpufreq.c linux-3.14.54/drive
-MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
-MODULE_DESCRIPTION("Freescale i.MX6Q cpufreq driver");
-MODULE_LICENSE("GPL");
+diff -Nur linux-3.14.54.orig/drivers/cpufreq/Kconfig linux-3.14.54/drivers/cpufreq/Kconfig
+--- linux-3.14.54.orig/drivers/cpufreq/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/cpufreq/Kconfig 2015-10-15 15:51:25.052668469 +0200
+@@ -91,6 +91,15 @@
+ governor. If unsure have a look at the help section of the
+ driver. Fallback governor will be the performance governor.
+
++config CPU_FREQ_DEFAULT_GOV_INTERACTIVE
++ bool "interactive"
++ select CPU_FREQ_GOV_INTERACTIVE
++ help
++ Use the CPUFreq governor 'interactive' as default. This allows
++ you to get a full dynamic cpu frequency capable system by simply
++ loading your cpufreq low-level hardware driver, using the
++ 'interactive' governor for latency-sensitive workloads.
++
+ config CPU_FREQ_DEFAULT_GOV_CONSERVATIVE
+ bool "conservative"
+ select CPU_FREQ_GOV_CONSERVATIVE
+@@ -157,6 +166,24 @@
+
+ For details, take a look at linux/Documentation/cpu-freq.
+
++ If in doubt, say N.
++
++config CPU_FREQ_GOV_INTERACTIVE
++ tristate "'interactive' cpufreq policy governor"
++ default n
++ help
++ 'interactive' - This driver adds a dynamic cpufreq policy governor
++ designed for latency-sensitive workloads.
++
++ This governor attempts to reduce the latency of clock
++ increases so that the system is more responsive to
++ interactive workloads.
++
++ To compile this driver as a module, choose M here: the
++ module will be called cpufreq_interactive.
++
++ For details, take a look at linux/Documentation/cpu-freq.
++
+ If in doubt, say N.
+
+ config CPU_FREQ_GOV_CONSERVATIVE
+diff -Nur linux-3.14.54.orig/drivers/cpufreq/Kconfig.arm linux-3.14.54/drivers/cpufreq/Kconfig.arm
+--- linux-3.14.54.orig/drivers/cpufreq/Kconfig.arm 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/cpufreq/Kconfig.arm 2015-10-15 15:51:25.052668469 +0200
+@@ -4,7 +4,8 @@
+
+ config ARM_BIG_LITTLE_CPUFREQ
+ tristate "Generic ARM big LITTLE CPUfreq driver"
+- depends on ARM && BIG_LITTLE && ARM_CPU_TOPOLOGY && HAVE_CLK
++ depends on (BIG_LITTLE && ARM_CPU_TOPOLOGY) || (ARM64 && SMP)
++ depends on HAVE_CLK
+ select PM_OPP
+ help
+ This enables the Generic CPUfreq driver for ARM big.LITTLE platforms.
+@@ -95,7 +96,7 @@
+
+ If in doubt, say N.
+
+-config ARM_IMX6Q_CPUFREQ
++config ARM_IMX6_CPUFREQ
+ tristate "Freescale i.MX6 cpufreq support"
+ depends on ARCH_MXC
+ depends on REGULATOR_ANATOP
+diff -Nur linux-3.14.54.orig/drivers/cpufreq/Makefile linux-3.14.54/drivers/cpufreq/Makefile
+--- linux-3.14.54.orig/drivers/cpufreq/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/cpufreq/Makefile 2015-10-15 15:51:25.052668469 +0200
+@@ -8,6 +8,7 @@
+ obj-$(CONFIG_CPU_FREQ_GOV_POWERSAVE) += cpufreq_powersave.o
+ obj-$(CONFIG_CPU_FREQ_GOV_USERSPACE) += cpufreq_userspace.o
+ obj-$(CONFIG_CPU_FREQ_GOV_ONDEMAND) += cpufreq_ondemand.o
++obj-$(CONFIG_CPU_FREQ_GOV_INTERACTIVE) += cpufreq_interactive.o
+ obj-$(CONFIG_CPU_FREQ_GOV_CONSERVATIVE) += cpufreq_conservative.o
+ obj-$(CONFIG_CPU_FREQ_GOV_COMMON) += cpufreq_governor.o
+
+@@ -55,7 +56,7 @@
+ obj-$(CONFIG_ARM_EXYNOS5250_CPUFREQ) += exynos5250-cpufreq.o
+ obj-$(CONFIG_ARM_EXYNOS5440_CPUFREQ) += exynos5440-cpufreq.o
+ obj-$(CONFIG_ARM_HIGHBANK_CPUFREQ) += highbank-cpufreq.o
+-obj-$(CONFIG_ARM_IMX6Q_CPUFREQ) += imx6q-cpufreq.o
++obj-$(CONFIG_ARM_IMX6_CPUFREQ) += imx6-cpufreq.o
+ obj-$(CONFIG_ARM_INTEGRATOR) += integrator-cpufreq.o
+ obj-$(CONFIG_ARM_KIRKWOOD_CPUFREQ) += kirkwood-cpufreq.o
+ obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ) += omap-cpufreq.o
diff -Nur linux-3.14.54.orig/drivers/crypto/caam/secvio.c linux-3.14.54/drivers/crypto/caam/secvio.c
--- linux-3.14.54.orig/drivers/crypto/caam/secvio.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/crypto/caam/secvio.c 2015-10-12 10:56:17.995351165 +0200
++++ linux-3.14.54/drivers/crypto/caam/secvio.c 2015-10-15 15:51:25.052668469 +0200
@@ -0,0 +1,335 @@
+
+/*
@@ -60600,7 +60559,7 @@ diff -Nur linux-3.14.54.orig/drivers/crypto/caam/secvio.c linux-3.14.54/drivers/
+#endif
diff -Nur linux-3.14.54.orig/drivers/crypto/caam/secvio.h linux-3.14.54/drivers/crypto/caam/secvio.h
--- linux-3.14.54.orig/drivers/crypto/caam/secvio.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/crypto/caam/secvio.h 2015-10-12 10:56:17.995351165 +0200
++++ linux-3.14.54/drivers/crypto/caam/secvio.h 2015-10-15 15:51:25.052668469 +0200
@@ -0,0 +1,64 @@
+
+/*
@@ -60668,7 +60627,7 @@ diff -Nur linux-3.14.54.orig/drivers/crypto/caam/secvio.h linux-3.14.54/drivers/
+#endif /* SECVIO_H */
diff -Nur linux-3.14.54.orig/drivers/crypto/caam/sm.h linux-3.14.54/drivers/crypto/caam/sm.h
--- linux-3.14.54.orig/drivers/crypto/caam/sm.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/crypto/caam/sm.h 2015-10-12 10:56:17.995351165 +0200
++++ linux-3.14.54/drivers/crypto/caam/sm.h 2015-10-15 15:51:25.052668469 +0200
@@ -0,0 +1,88 @@
+
+/*
@@ -60760,7 +60719,7 @@ diff -Nur linux-3.14.54.orig/drivers/crypto/caam/sm.h linux-3.14.54/drivers/cryp
+#endif /* SM_H */
diff -Nur linux-3.14.54.orig/drivers/crypto/caam/sm_store.c linux-3.14.54/drivers/crypto/caam/sm_store.c
--- linux-3.14.54.orig/drivers/crypto/caam/sm_store.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/crypto/caam/sm_store.c 2015-10-12 10:56:17.995351165 +0200
++++ linux-3.14.54/drivers/crypto/caam/sm_store.c 2015-10-15 15:51:25.052668469 +0200
@@ -0,0 +1,896 @@
+
+/*
@@ -61660,7 +61619,7 @@ diff -Nur linux-3.14.54.orig/drivers/crypto/caam/sm_store.c linux-3.14.54/driver
+#endif
diff -Nur linux-3.14.54.orig/drivers/crypto/caam/sm_test.c linux-3.14.54/drivers/crypto/caam/sm_test.c
--- linux-3.14.54.orig/drivers/crypto/caam/sm_test.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/crypto/caam/sm_test.c 2015-10-12 10:56:17.995351165 +0200
++++ linux-3.14.54/drivers/crypto/caam/sm_test.c 2015-10-15 15:51:25.052668469 +0200
@@ -0,0 +1,844 @@
+/*
+ * Secure Memory / Keystore Exemplification Module
@@ -62508,7 +62467,7 @@ diff -Nur linux-3.14.54.orig/drivers/crypto/caam/sm_test.c linux-3.14.54/drivers
+#endif
diff -Nur linux-3.14.54.orig/drivers/crypto/caam/snvsregs.h linux-3.14.54/drivers/crypto/caam/snvsregs.h
--- linux-3.14.54.orig/drivers/crypto/caam/snvsregs.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/crypto/caam/snvsregs.h 2015-10-12 10:56:17.996351165 +0200
++++ linux-3.14.54/drivers/crypto/caam/snvsregs.h 2015-10-15 15:51:25.056668207 +0200
@@ -0,0 +1,237 @@
+/*
+ * SNVS hardware register-level view
@@ -62747,43 +62706,9 @@ diff -Nur linux-3.14.54.orig/drivers/crypto/caam/snvsregs.h linux-3.14.54/driver
+};
+
+#endif /* SNVSREGS_H */
-diff -Nur linux-3.14.54.orig/drivers/dma/Kconfig linux-3.14.54/drivers/dma/Kconfig
---- linux-3.14.54.orig/drivers/dma/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/dma/Kconfig 2015-10-12 10:56:17.997351165 +0200
-@@ -137,6 +137,19 @@
- To avoid bloating the irq_desc[] array we allocate a sufficient
- number of IRQ slots and map them dynamically to specific sources.
-
-+config MXC_PXP_V2
-+ bool "MXC PxP V2 support"
-+ depends on ARM
-+ select DMA_ENGINE
-+ help
-+ Support the PxP (Pixel Pipeline) on i.MX6 DualLite and i.MX6 SoloLite.
-+ If unsure, select N.
-+
-+config MXC_PXP_CLIENT_DEVICE
-+ bool "MXC PxP Client Device"
-+ default y
-+ depends on MXC_PXP_V2
-+
- config TXX9_DMAC
- tristate "Toshiba TXx9 SoC DMA support"
- depends on MACH_TX49XX || MACH_TX39XX
-diff -Nur linux-3.14.54.orig/drivers/dma/Makefile linux-3.14.54/drivers/dma/Makefile
---- linux-3.14.54.orig/drivers/dma/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/dma/Makefile 2015-10-12 10:56:17.997351165 +0200
-@@ -18,6 +18,7 @@
- obj-$(CONFIG_DW_DMAC_CORE) += dw/
- obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
- obj-$(CONFIG_MX3_IPU) += ipu/
-+obj-$(CONFIG_MXC_PXP_V2) += pxp/
- obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o
- obj-$(CONFIG_SH_DMAE_BASE) += sh/
- obj-$(CONFIG_COH901318) += coh901318.o coh901318_lli.o
diff -Nur linux-3.14.54.orig/drivers/dma/imx-sdma.c linux-3.14.54/drivers/dma/imx-sdma.c
--- linux-3.14.54.orig/drivers/dma/imx-sdma.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/dma/imx-sdma.c 2015-10-12 10:56:17.996351165 +0200
++++ linux-3.14.54/drivers/dma/imx-sdma.c 2015-10-15 15:51:25.056668207 +0200
@@ -29,6 +29,7 @@
#include <linux/semaphore.h>
#include <linux/spinlock.h>
@@ -63380,15 +63305,49 @@ diff -Nur linux-3.14.54.orig/drivers/dma/imx-sdma.c linux-3.14.54/drivers/dma/im
ret = sdma_init(sdma);
if (ret)
goto err_init;
+diff -Nur linux-3.14.54.orig/drivers/dma/Kconfig linux-3.14.54/drivers/dma/Kconfig
+--- linux-3.14.54.orig/drivers/dma/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/dma/Kconfig 2015-10-15 15:51:25.056668207 +0200
+@@ -137,6 +137,19 @@
+ To avoid bloating the irq_desc[] array we allocate a sufficient
+ number of IRQ slots and map them dynamically to specific sources.
+
++config MXC_PXP_V2
++ bool "MXC PxP V2 support"
++ depends on ARM
++ select DMA_ENGINE
++ help
++ Support the PxP (Pixel Pipeline) on i.MX6 DualLite and i.MX6 SoloLite.
++ If unsure, select N.
++
++config MXC_PXP_CLIENT_DEVICE
++ bool "MXC PxP Client Device"
++ default y
++ depends on MXC_PXP_V2
++
+ config TXX9_DMAC
+ tristate "Toshiba TXx9 SoC DMA support"
+ depends on MACH_TX49XX || MACH_TX39XX
+diff -Nur linux-3.14.54.orig/drivers/dma/Makefile linux-3.14.54/drivers/dma/Makefile
+--- linux-3.14.54.orig/drivers/dma/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/dma/Makefile 2015-10-15 15:51:25.056668207 +0200
+@@ -18,6 +18,7 @@
+ obj-$(CONFIG_DW_DMAC_CORE) += dw/
+ obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
+ obj-$(CONFIG_MX3_IPU) += ipu/
++obj-$(CONFIG_MXC_PXP_V2) += pxp/
+ obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o
+ obj-$(CONFIG_SH_DMAE_BASE) += sh/
+ obj-$(CONFIG_COH901318) += coh901318.o coh901318_lli.o
diff -Nur linux-3.14.54.orig/drivers/dma/pxp/Makefile linux-3.14.54/drivers/dma/pxp/Makefile
--- linux-3.14.54.orig/drivers/dma/pxp/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/dma/pxp/Makefile 2015-10-12 10:56:17.997351165 +0200
++++ linux-3.14.54/drivers/dma/pxp/Makefile 2015-10-15 15:51:25.056668207 +0200
@@ -0,0 +1,2 @@
+obj-$(CONFIG_MXC_PXP_V2) += pxp_dma_v2.o
+obj-$(CONFIG_MXC_PXP_CLIENT_DEVICE) += pxp_device.o
diff -Nur linux-3.14.54.orig/drivers/dma/pxp/pxp_device.c linux-3.14.54/drivers/dma/pxp/pxp_device.c
--- linux-3.14.54.orig/drivers/dma/pxp/pxp_device.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/dma/pxp/pxp_device.c 2015-10-12 10:56:17.998351165 +0200
++++ linux-3.14.54/drivers/dma/pxp/pxp_device.c 2015-10-15 15:51:25.056668207 +0200
@@ -0,0 +1,765 @@
+/*
+ * Copyright (C) 2010-2014 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -64157,7 +64116,7 @@ diff -Nur linux-3.14.54.orig/drivers/dma/pxp/pxp_device.c linux-3.14.54/drivers/
+}
diff -Nur linux-3.14.54.orig/drivers/dma/pxp/pxp_dma_v2.c linux-3.14.54/drivers/dma/pxp/pxp_dma_v2.c
--- linux-3.14.54.orig/drivers/dma/pxp/pxp_dma_v2.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/dma/pxp/pxp_dma_v2.c 2015-10-12 10:56:17.998351165 +0200
++++ linux-3.14.54/drivers/dma/pxp/pxp_dma_v2.c 2015-10-15 15:51:25.056668207 +0200
@@ -0,0 +1,1854 @@
+/*
+ * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
@@ -66015,7 +65974,7 @@ diff -Nur linux-3.14.54.orig/drivers/dma/pxp/pxp_dma_v2.c linux-3.14.54/drivers/
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/dma/pxp/regs-pxp_v2.h linux-3.14.54/drivers/dma/pxp/regs-pxp_v2.h
--- linux-3.14.54.orig/drivers/dma/pxp/regs-pxp_v2.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/dma/pxp/regs-pxp_v2.h 2015-10-12 10:56:17.999351165 +0200
++++ linux-3.14.54/drivers/dma/pxp/regs-pxp_v2.h 2015-10-15 15:51:25.056668207 +0200
@@ -0,0 +1,1152 @@
+/*
+ * Freescale PXP Register Definitions
@@ -67171,7 +67130,7 @@ diff -Nur linux-3.14.54.orig/drivers/dma/pxp/regs-pxp_v2.h linux-3.14.54/drivers
+#endif /* __ARCH_ARM___PXP_H */
diff -Nur linux-3.14.54.orig/drivers/gpio/gpio-pca953x.c linux-3.14.54/drivers/gpio/gpio-pca953x.c
--- linux-3.14.54.orig/drivers/gpio/gpio-pca953x.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/gpio/gpio-pca953x.c 2015-10-12 10:56:17.999351165 +0200
++++ linux-3.14.54/drivers/gpio/gpio-pca953x.c 2015-10-15 15:51:25.056668207 +0200
@@ -19,6 +19,7 @@
#include <linux/irqdomain.h>
#include <linux/i2c.h>
@@ -67191,9 +67150,45 @@ diff -Nur linux-3.14.54.orig/drivers/gpio/gpio-pca953x.c linux-3.14.54/drivers/g
/* initialize cached registers from their original values.
* we can't share this chip with another i2c master.
*/
+diff -Nur linux-3.14.54.orig/drivers/gpu/drm/drm_crtc_helper.c linux-3.14.54/drivers/gpu/drm/drm_crtc_helper.c
+--- linux-3.14.54.orig/drivers/gpu/drm/drm_crtc_helper.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/gpu/drm/drm_crtc_helper.c 2015-10-15 15:51:25.056668207 +0200
+@@ -564,7 +564,7 @@
+ * Caller must hold mode config lock.
+ *
+ * Setup a new configuration, provided by the upper layers (either an ioctl call
+- * from userspace or internally e.g. from the fbdev suppport code) in @set, and
++ * from userspace or internally e.g. from the fbdev support code) in @set, and
+ * enable it. This is the main helper functions for drivers that implement
+ * kernel mode setting with the crtc helper functions and the assorted
+ * ->prepare(), ->modeset() and ->commit() helper callbacks.
+diff -Nur linux-3.14.54.orig/drivers/gpu/drm/drm_prime.c linux-3.14.54/drivers/gpu/drm/drm_prime.c
+--- linux-3.14.54.orig/drivers/gpu/drm/drm_prime.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/gpu/drm/drm_prime.c 2015-10-15 15:51:25.056668207 +0200
+@@ -471,7 +471,7 @@
+ get_dma_buf(dma_buf);
+
+ sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
+- if (IS_ERR_OR_NULL(sgt)) {
++ if (IS_ERR(sgt)) {
+ ret = PTR_ERR(sgt);
+ goto fail_detach;
+ }
+diff -Nur linux-3.14.54.orig/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c linux-3.14.54/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
+--- linux-3.14.54.orig/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c 2015-10-15 15:51:25.056668207 +0200
+@@ -224,7 +224,7 @@
+ get_dma_buf(dma_buf);
+
+ sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
+- if (IS_ERR_OR_NULL(sgt)) {
++ if (IS_ERR(sgt)) {
+ ret = PTR_ERR(sgt);
+ goto err_buf_detach;
+ }
diff -Nur linux-3.14.54.orig/drivers/gpu/drm/Kconfig linux-3.14.54/drivers/gpu/drm/Kconfig
--- linux-3.14.54.orig/drivers/gpu/drm/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/gpu/drm/Kconfig 2015-10-12 10:56:18.001351164 +0200
++++ linux-3.14.54/drivers/gpu/drm/Kconfig 2015-10-15 15:51:25.056668207 +0200
@@ -166,6 +166,13 @@
Choose this option if you have a Savage3D/4/SuperSavage/Pro/Twister
chipset. If M is selected the module will be called savage.
@@ -67210,7 +67205,7 @@ diff -Nur linux-3.14.54.orig/drivers/gpu/drm/Kconfig linux-3.14.54/drivers/gpu/d
source "drivers/gpu/drm/vmwgfx/Kconfig"
diff -Nur linux-3.14.54.orig/drivers/gpu/drm/Makefile linux-3.14.54/drivers/gpu/drm/Makefile
--- linux-3.14.54.orig/drivers/gpu/drm/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/gpu/drm/Makefile 2015-10-12 10:56:18.002351164 +0200
++++ linux-3.14.54/drivers/gpu/drm/Makefile 2015-10-15 15:51:25.056668207 +0200
@@ -1,3 +1,24 @@
+##############################################################################
+#
@@ -67244,45 +67239,9 @@ diff -Nur linux-3.14.54.orig/drivers/gpu/drm/Makefile linux-3.14.54/drivers/gpu/
obj-$(CONFIG_DRM_TDFX) += tdfx/
obj-$(CONFIG_DRM_R128) += r128/
obj-$(CONFIG_DRM_RADEON)+= radeon/
-diff -Nur linux-3.14.54.orig/drivers/gpu/drm/drm_crtc_helper.c linux-3.14.54/drivers/gpu/drm/drm_crtc_helper.c
---- linux-3.14.54.orig/drivers/gpu/drm/drm_crtc_helper.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/gpu/drm/drm_crtc_helper.c 2015-10-12 10:56:18.000351165 +0200
-@@ -564,7 +564,7 @@
- * Caller must hold mode config lock.
- *
- * Setup a new configuration, provided by the upper layers (either an ioctl call
-- * from userspace or internally e.g. from the fbdev suppport code) in @set, and
-+ * from userspace or internally e.g. from the fbdev support code) in @set, and
- * enable it. This is the main helper functions for drivers that implement
- * kernel mode setting with the crtc helper functions and the assorted
- * ->prepare(), ->modeset() and ->commit() helper callbacks.
-diff -Nur linux-3.14.54.orig/drivers/gpu/drm/drm_prime.c linux-3.14.54/drivers/gpu/drm/drm_prime.c
---- linux-3.14.54.orig/drivers/gpu/drm/drm_prime.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/gpu/drm/drm_prime.c 2015-10-12 10:56:18.000351165 +0200
-@@ -471,7 +471,7 @@
- get_dma_buf(dma_buf);
-
- sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
-- if (IS_ERR_OR_NULL(sgt)) {
-+ if (IS_ERR(sgt)) {
- ret = PTR_ERR(sgt);
- goto fail_detach;
- }
-diff -Nur linux-3.14.54.orig/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c linux-3.14.54/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c
---- linux-3.14.54.orig/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/gpu/drm/exynos/exynos_drm_dmabuf.c 2015-10-12 10:56:18.001351164 +0200
-@@ -224,7 +224,7 @@
- get_dma_buf(dma_buf);
-
- sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
-- if (IS_ERR_OR_NULL(sgt)) {
-+ if (IS_ERR(sgt)) {
- ret = PTR_ERR(sgt);
- goto err_buf_detach;
- }
diff -Nur linux-3.14.54.orig/drivers/gpu/drm/vivante/Makefile linux-3.14.54/drivers/gpu/drm/vivante/Makefile
--- linux-3.14.54.orig/drivers/gpu/drm/vivante/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/gpu/drm/vivante/Makefile 2015-10-12 10:56:18.002351164 +0200
++++ linux-3.14.54/drivers/gpu/drm/vivante/Makefile 2015-10-15 15:51:25.056668207 +0200
@@ -0,0 +1,29 @@
+##############################################################################
+#
@@ -67315,7 +67274,7 @@ diff -Nur linux-3.14.54.orig/drivers/gpu/drm/vivante/Makefile linux-3.14.54/driv
+obj-$(CONFIG_DRM_VIVANTE) += vivante.o
diff -Nur linux-3.14.54.orig/drivers/gpu/drm/vivante/vivante_drv.c linux-3.14.54/drivers/gpu/drm/vivante/vivante_drv.c
--- linux-3.14.54.orig/drivers/gpu/drm/vivante/vivante_drv.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/gpu/drm/vivante/vivante_drv.c 2015-10-12 10:56:18.002351164 +0200
++++ linux-3.14.54/drivers/gpu/drm/vivante/vivante_drv.c 2015-10-15 15:51:25.060667943 +0200
@@ -0,0 +1,108 @@
+/****************************************************************************
+*
@@ -67427,7 +67386,7 @@ diff -Nur linux-3.14.54.orig/drivers/gpu/drm/vivante/vivante_drv.c linux-3.14.54
+MODULE_LICENSE("GPL and additional rights");
diff -Nur linux-3.14.54.orig/drivers/gpu/drm/vivante/vivante_drv.h linux-3.14.54/drivers/gpu/drm/vivante/vivante_drv.h
--- linux-3.14.54.orig/drivers/gpu/drm/vivante/vivante_drv.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/gpu/drm/vivante/vivante_drv.h 2015-10-12 10:56:18.002351164 +0200
++++ linux-3.14.54/drivers/gpu/drm/vivante/vivante_drv.h 2015-10-15 15:51:25.060667943 +0200
@@ -0,0 +1,66 @@
+/****************************************************************************
+*
@@ -67497,7 +67456,7 @@ diff -Nur linux-3.14.54.orig/drivers/gpu/drm/vivante/vivante_drv.h linux-3.14.54
+#endif
diff -Nur linux-3.14.54.orig/drivers/hwmon/Kconfig linux-3.14.54/drivers/hwmon/Kconfig
--- linux-3.14.54.orig/drivers/hwmon/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/hwmon/Kconfig 2015-10-12 10:56:18.002351164 +0200
++++ linux-3.14.54/drivers/hwmon/Kconfig 2015-10-15 15:51:25.060667943 +0200
@@ -1584,4 +1584,19 @@
endif # ACPI
@@ -67518,21 +67477,9 @@ diff -Nur linux-3.14.54.orig/drivers/hwmon/Kconfig linux-3.14.54/drivers/hwmon/K
+ default y
+
endif # HWMON
-diff -Nur linux-3.14.54.orig/drivers/hwmon/Makefile linux-3.14.54/drivers/hwmon/Makefile
---- linux-3.14.54.orig/drivers/hwmon/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/hwmon/Makefile 2015-10-12 10:56:18.003351164 +0200
-@@ -142,6 +142,8 @@
- obj-$(CONFIG_SENSORS_W83L786NG) += w83l786ng.o
- obj-$(CONFIG_SENSORS_WM831X) += wm831x-hwmon.o
- obj-$(CONFIG_SENSORS_WM8350) += wm8350-hwmon.o
-+obj-$(CONFIG_SENSORS_MAG3110) += mag3110.o
-+obj-$(CONFIG_MXC_MMA8451) += mxc_mma8451.o
-
- obj-$(CONFIG_PMBUS) += pmbus/
-
diff -Nur linux-3.14.54.orig/drivers/hwmon/mag3110.c linux-3.14.54/drivers/hwmon/mag3110.c
--- linux-3.14.54.orig/drivers/hwmon/mag3110.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/hwmon/mag3110.c 2015-10-12 10:56:18.003351164 +0200
++++ linux-3.14.54/drivers/hwmon/mag3110.c 2015-10-15 15:51:25.060667943 +0200
@@ -0,0 +1,611 @@
+/*
+ *
@@ -68145,9 +68092,21 @@ diff -Nur linux-3.14.54.orig/drivers/hwmon/mag3110.c linux-3.14.54/drivers/hwmon
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
+MODULE_DESCRIPTION("Freescale mag3110 3-axis magnetometer driver");
+MODULE_LICENSE("GPL");
+diff -Nur linux-3.14.54.orig/drivers/hwmon/Makefile linux-3.14.54/drivers/hwmon/Makefile
+--- linux-3.14.54.orig/drivers/hwmon/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/hwmon/Makefile 2015-10-15 15:51:25.060667943 +0200
+@@ -142,6 +142,8 @@
+ obj-$(CONFIG_SENSORS_W83L786NG) += w83l786ng.o
+ obj-$(CONFIG_SENSORS_WM831X) += wm831x-hwmon.o
+ obj-$(CONFIG_SENSORS_WM8350) += wm8350-hwmon.o
++obj-$(CONFIG_SENSORS_MAG3110) += mag3110.o
++obj-$(CONFIG_MXC_MMA8451) += mxc_mma8451.o
+
+ obj-$(CONFIG_PMBUS) += pmbus/
+
diff -Nur linux-3.14.54.orig/drivers/hwmon/mxc_mma8451.c linux-3.14.54/drivers/hwmon/mxc_mma8451.c
--- linux-3.14.54.orig/drivers/hwmon/mxc_mma8451.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/hwmon/mxc_mma8451.c 2015-10-12 10:56:18.004351164 +0200
++++ linux-3.14.54/drivers/hwmon/mxc_mma8451.c 2015-10-15 15:51:25.060667943 +0200
@@ -0,0 +1,598 @@
+/*
+ * mma8451.c - Linux kernel modules for 3-Axis Orientation/Motion
@@ -68749,7 +68708,7 @@ diff -Nur linux-3.14.54.orig/drivers/hwmon/mxc_mma8451.c linux-3.14.54/drivers/h
+module_exit(mma8451_exit);
diff -Nur linux-3.14.54.orig/drivers/i2c/busses/i2c-imx.c linux-3.14.54/drivers/i2c/busses/i2c-imx.c
--- linux-3.14.54.orig/drivers/i2c/busses/i2c-imx.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/i2c/busses/i2c-imx.c 2015-10-12 10:56:18.004351164 +0200
++++ linux-3.14.54/drivers/i2c/busses/i2c-imx.c 2015-10-15 15:51:25.060667943 +0200
@@ -184,6 +184,9 @@
int stopped;
unsigned int ifdr; /* IMX_I2C_IFDR */
@@ -68893,7 +68852,7 @@ diff -Nur linux-3.14.54.orig/drivers/i2c/busses/i2c-imx.c linux-3.14.54/drivers/
imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode ^ I2CR_IEN,
diff -Nur linux-3.14.54.orig/drivers/input/keyboard/gpio_keys.c linux-3.14.54/drivers/input/keyboard/gpio_keys.c
--- linux-3.14.54.orig/drivers/input/keyboard/gpio_keys.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/input/keyboard/gpio_keys.c 2015-10-12 10:56:18.005351164 +0200
++++ linux-3.14.54/drivers/input/keyboard/gpio_keys.c 2015-10-15 15:51:25.060667943 +0200
@@ -3,6 +3,7 @@
*
* Copyright 2005 Phil Blundell
@@ -68913,7 +68872,7 @@ diff -Nur linux-3.14.54.orig/drivers/input/keyboard/gpio_keys.c linux-3.14.54/dr
if (!button->irq) {
diff -Nur linux-3.14.54.orig/drivers/input/keyboard/imx_keypad.c linux-3.14.54/drivers/input/keyboard/imx_keypad.c
--- linux-3.14.54.orig/drivers/input/keyboard/imx_keypad.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/input/keyboard/imx_keypad.c 2015-10-12 10:56:18.005351164 +0200
++++ linux-3.14.54/drivers/input/keyboard/imx_keypad.c 2015-10-15 15:51:25.060667943 +0200
@@ -1,6 +1,7 @@
/*
* Driver for the IMX keypad port.
@@ -68942,7 +68901,7 @@ diff -Nur linux-3.14.54.orig/drivers/input/keyboard/imx_keypad.c linux-3.14.54/d
diff -Nur linux-3.14.54.orig/drivers/input/misc/mma8450.c linux-3.14.54/drivers/input/misc/mma8450.c
--- linux-3.14.54.orig/drivers/input/misc/mma8450.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/input/misc/mma8450.c 2015-10-12 10:56:18.006351164 +0200
++++ linux-3.14.54/drivers/input/misc/mma8450.c 2015-10-15 15:51:25.060667943 +0200
@@ -1,7 +1,7 @@
/*
* Driver for Freescale's 3-Axis Accelerometer MMA8450
@@ -69215,7 +69174,7 @@ diff -Nur linux-3.14.54.orig/drivers/input/misc/mma8450.c linux-3.14.54/drivers/
kfree(m);
diff -Nur linux-3.14.54.orig/drivers/input/sparse-keymap.c linux-3.14.54/drivers/input/sparse-keymap.c
--- linux-3.14.54.orig/drivers/input/sparse-keymap.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/input/sparse-keymap.c 2015-10-12 10:56:18.006351164 +0200
++++ linux-3.14.54/drivers/input/sparse-keymap.c 2015-10-15 15:51:25.060667943 +0200
@@ -236,7 +236,7 @@
* in an input device that was set up by sparse_keymap_setup().
* NOTE: It is safe to cal this function while input device is
@@ -69225,9 +69184,21 @@ diff -Nur linux-3.14.54.orig/drivers/input/sparse-keymap.c linux-3.14.54/drivers
* before freeing the keymap).
*/
void sparse_keymap_free(struct input_dev *dev)
+diff -Nur linux-3.14.54.orig/drivers/Kconfig linux-3.14.54/drivers/Kconfig
+--- linux-3.14.54.orig/drivers/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/Kconfig 2015-10-15 15:51:25.060667943 +0200
+@@ -96,6 +96,8 @@
+
+ source "drivers/memstick/Kconfig"
+
++source "drivers/mxc/Kconfig"
++
+ source "drivers/leds/Kconfig"
+
+ source "drivers/accessibility/Kconfig"
diff -Nur linux-3.14.54.orig/drivers/leds/leds-gpio.c linux-3.14.54/drivers/leds/leds-gpio.c
--- linux-3.14.54.orig/drivers/leds/leds-gpio.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/leds/leds-gpio.c 2015-10-12 10:56:18.007351164 +0200
++++ linux-3.14.54/drivers/leds/leds-gpio.c 2015-10-15 15:51:25.060667943 +0200
@@ -3,7 +3,7 @@
*
* Copyright (C) 2007 8D Technologies inc.
@@ -69248,7 +69219,7 @@ diff -Nur linux-3.14.54.orig/drivers/leds/leds-gpio.c linux-3.14.54/drivers/leds
&pdev->dev, NULL);
diff -Nur linux-3.14.54.orig/drivers/leds/leds-pwm.c linux-3.14.54/drivers/leds/leds-pwm.c
--- linux-3.14.54.orig/drivers/leds/leds-pwm.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/leds/leds-pwm.c 2015-10-12 10:56:18.007351164 +0200
++++ linux-3.14.54/drivers/leds/leds-pwm.c 2015-10-15 15:51:25.060667943 +0200
@@ -70,6 +70,10 @@
duty *= brightness;
@@ -69434,20 +69405,9 @@ diff -Nur linux-3.14.54.orig/drivers/leds/leds-pwm.c linux-3.14.54/drivers/leds/
}
static int led_pwm_remove(struct platform_device *pdev)
-diff -Nur linux-3.14.54.orig/drivers/mailbox/Makefile linux-3.14.54/drivers/mailbox/Makefile
---- linux-3.14.54.orig/drivers/mailbox/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mailbox/Makefile 2015-10-12 10:56:18.008351164 +0200
-@@ -1,3 +1,7 @@
-+# Generic MAILBOX API
-+
-+obj-$(CONFIG_MAILBOX) += mailbox.o
-+
- obj-$(CONFIG_PL320_MBOX) += pl320-ipc.o
-
- obj-$(CONFIG_OMAP_MBOX) += omap-mailbox.o
diff -Nur linux-3.14.54.orig/drivers/mailbox/mailbox.c linux-3.14.54/drivers/mailbox/mailbox.c
--- linux-3.14.54.orig/drivers/mailbox/mailbox.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mailbox/mailbox.c 2015-10-12 10:56:18.008351164 +0200
++++ linux-3.14.54/drivers/mailbox/mailbox.c 2015-10-15 15:51:25.060667943 +0200
@@ -0,0 +1,488 @@
+/*
+ * Mailbox: Common code for Mailbox controllers and users
@@ -69937,9 +69897,20 @@ diff -Nur linux-3.14.54.orig/drivers/mailbox/mailbox.c linux-3.14.54/drivers/mai
+ mutex_unlock(&con_mutex);
+}
+EXPORT_SYMBOL_GPL(mbox_controller_unregister);
+diff -Nur linux-3.14.54.orig/drivers/mailbox/Makefile linux-3.14.54/drivers/mailbox/Makefile
+--- linux-3.14.54.orig/drivers/mailbox/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mailbox/Makefile 2015-10-15 15:51:25.060667943 +0200
+@@ -1,3 +1,7 @@
++# Generic MAILBOX API
++
++obj-$(CONFIG_MAILBOX) += mailbox.o
++
+ obj-$(CONFIG_PL320_MBOX) += pl320-ipc.o
+
+ obj-$(CONFIG_OMAP_MBOX) += omap-mailbox.o
diff -Nur linux-3.14.54.orig/drivers/mailbox/pl320-ipc.c linux-3.14.54/drivers/mailbox/pl320-ipc.c
--- linux-3.14.54.orig/drivers/mailbox/pl320-ipc.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mailbox/pl320-ipc.c 2015-10-12 10:56:18.008351164 +0200
++++ linux-3.14.54/drivers/mailbox/pl320-ipc.c 2015-10-15 15:51:25.060667943 +0200
@@ -26,7 +26,7 @@
#include <linux/device.h>
#include <linux/amba/bus.h>
@@ -69949,9 +69920,20 @@ diff -Nur linux-3.14.54.orig/drivers/mailbox/pl320-ipc.c linux-3.14.54/drivers/m
#define IPCMxSOURCE(m) ((m) * 0x40)
#define IPCMxDSET(m) (((m) * 0x40) + 0x004)
+diff -Nur linux-3.14.54.orig/drivers/Makefile linux-3.14.54/drivers/Makefile
+--- linux-3.14.54.orig/drivers/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/Makefile 2015-10-15 15:51:25.060667943 +0200
+@@ -111,6 +111,7 @@
+ obj-$(CONFIG_CPU_FREQ) += cpufreq/
+ obj-$(CONFIG_CPU_IDLE) += cpuidle/
+ obj-y += mmc/
++obj-$(CONFIG_ARCH_MXC) += mxc/
+ obj-$(CONFIG_MEMSTICK) += memstick/
+ obj-y += leds/
+ obj-$(CONFIG_INFINIBAND) += infiniband/
diff -Nur linux-3.14.54.orig/drivers/media/platform/Kconfig linux-3.14.54/drivers/media/platform/Kconfig
--- linux-3.14.54.orig/drivers/media/platform/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/media/platform/Kconfig 2015-10-12 10:56:18.009351164 +0200
++++ linux-3.14.54/drivers/media/platform/Kconfig 2015-10-15 15:51:25.060667943 +0200
@@ -115,6 +115,21 @@
To compile this driver as a module, choose M here: the module
will be called s3c-camif.
@@ -69976,7 +69958,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/Kconfig linux-3.14.54/driver
source "drivers/media/platform/s5p-tv/Kconfig"
diff -Nur linux-3.14.54.orig/drivers/media/platform/Makefile linux-3.14.54/drivers/media/platform/Makefile
--- linux-3.14.54.orig/drivers/media/platform/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/media/platform/Makefile 2015-10-12 10:56:18.009351164 +0200
++++ linux-3.14.54/drivers/media/platform/Makefile 2015-10-15 15:51:25.060667943 +0200
@@ -51,4 +51,7 @@
obj-$(CONFIG_ARCH_OMAP) += omap/
@@ -69985,124 +69967,9 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/Makefile linux-3.14.54/drive
+obj-$(CONFIG_VIDEO_MXC_OUTPUT) += mxc/output/
+
ccflags-y += -I$(srctree)/drivers/media/i2c
-diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/Kconfig linux-3.14.54/drivers/media/platform/mxc/capture/Kconfig
---- linux-3.14.54.orig/drivers/media/platform/mxc/capture/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/Kconfig 2015-10-12 10:56:18.013351164 +0200
-@@ -0,0 +1,86 @@
-+if VIDEO_MXC_CAPTURE
-+
-+menu "MXC Camera/V4L2 PRP Features support"
-+config VIDEO_MXC_IPU_CAMERA
-+ bool
-+ depends on VIDEO_MXC_CAPTURE && MXC_IPU
-+ default y
-+
-+config VIDEO_MXC_CSI_CAMERA
-+ tristate "CSI camera support"
-+ depends on VIDEO_MXC_CAPTURE && VIDEO_V4L2
-+ ---help---
-+ This is the video4linux2 capture driver based on CSI module.
-+
-+config MXC_CAMERA_OV5640
-+ tristate "OmniVision ov5640 camera support"
-+ depends on !VIDEO_MXC_EMMA_CAMERA && I2C
-+ ---help---
-+ If you plan to use the ov5640 Camera with your MXC system, say Y here.
-+
-+config MXC_CAMERA_OV5642
-+ tristate "OmniVision ov5642 camera support"
-+ depends on !VIDEO_MXC_EMMA_CAMERA && I2C
-+ ---help---
-+ If you plan to use the ov5642 Camera with your MXC system, say Y here.
-+
-+config MXC_CAMERA_OV5640_MIPI
-+ tristate "OmniVision ov5640 camera support using mipi"
-+ depends on !VIDEO_MXC_EMMA_CAMERA && I2C
-+ ---help---
-+ If you plan to use the ov5640 Camera with mipi interface in your MXC system, say Y here.
-+
-+config MXC_TVIN_ADV7180
-+ tristate "Analog Device adv7180 TV Decoder Input support"
-+ depends on !VIDEO_MXC_EMMA_CAMERA && I2C
-+ ---help---
-+ If you plan to use the adv7180 video decoder with your MXC system, say Y here.
-+
-+choice
-+ prompt "Select Overlay Rounting"
-+ default MXC_IPU_DEVICE_QUEUE_SDC
-+ depends on VIDEO_MXC_IPU_CAMERA && FB_MXC_SYNC_PANEL
-+
-+config MXC_IPU_DEVICE_QUEUE_SDC
-+ tristate "Queue ipu device for overlay library"
-+ depends on VIDEO_MXC_IPU_CAMERA
-+ ---help---
-+ Use case CSI->MEM->IPU DEVICE->SDC:
-+ Images from sensor will be frist recieved in memory,then
-+ queue to ipu device for processing if needed, and displaying
-+ it on synchronous display with SDC use case.
-+
-+config MXC_IPU_PRP_VF_SDC
-+ bool "Pre-Processor VF SDC library"
-+ depends on VIDEO_MXC_IPU_CAMERA
-+ ---help---
-+ Use case PRP_VF_SDC:
-+ Preprocessing image from smart sensor for viewfinder and
-+ displaying it on synchronous display with SDC use case.
-+ If SDC BG is selected, Rotation will not be supported.
-+ CSI -> IC (PRP VF) -> MEM
-+ MEM -> IC (ROT) -> MEM
-+ MEM -> SDC (FG/BG)
-+
-+endchoice
-+
-+config MXC_IPU_PRP_ENC
-+ tristate "Pre-processor Encoder library"
-+ depends on VIDEO_MXC_IPU_CAMERA
-+ default y
-+ ---help---
-+ Use case PRP_ENC:
-+ Preprocessing image from smart sensor for encoder.
-+ CSI -> IC (PRP ENC) -> MEM
-+
-+config MXC_IPU_CSI_ENC
-+ tristate "IPU CSI Encoder library"
-+ depends on VIDEO_MXC_IPU_CAMERA
-+ default y
-+ ---help---
-+ Use case IPU_CSI_ENC:
-+ Get raw image with CSI from smart sensor for encoder.
-+ CSI -> MEM
-+endmenu
-+
-+endif
-diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/Makefile linux-3.14.54/drivers/media/platform/mxc/capture/Makefile
---- linux-3.14.54.orig/drivers/media/platform/mxc/capture/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/Makefile 2015-10-12 10:56:18.013351164 +0200
-@@ -0,0 +1,21 @@
-+obj-$(CONFIG_VIDEO_MXC_CSI_CAMERA) += fsl_csi.o csi_v4l2_capture.o
-+
-+ifeq ($(CONFIG_VIDEO_MXC_IPU_CAMERA),y)
-+ obj-$(CONFIG_VIDEO_MXC_CAPTURE) += mxc_v4l2_capture.o
-+ obj-$(CONFIG_MXC_IPU_PRP_VF_SDC) += ipu_prp_vf_sdc.o ipu_prp_vf_sdc_bg.o
-+ obj-$(CONFIG_MXC_IPU_DEVICE_QUEUE_SDC) += ipu_fg_overlay_sdc.o ipu_bg_overlay_sdc.o
-+ obj-$(CONFIG_MXC_IPU_PRP_ENC) += ipu_prp_enc.o ipu_still.o
-+ obj-$(CONFIG_MXC_IPU_CSI_ENC) += ipu_csi_enc.o ipu_still.o
-+endif
-+
-+ov5640_camera-objs := ov5640.o
-+obj-$(CONFIG_MXC_CAMERA_OV5640) += ov5640_camera.o
-+
-+ov5642_camera-objs := ov5642.o
-+obj-$(CONFIG_MXC_CAMERA_OV5642) += ov5642_camera.o
-+
-+ov5640_camera_mipi-objs := ov5640_mipi.o
-+obj-$(CONFIG_MXC_CAMERA_OV5640_MIPI) += ov5640_camera_mipi.o
-+
-+adv7180_tvin-objs := adv7180.o
-+obj-$(CONFIG_MXC_TVIN_ADV7180) += adv7180_tvin.o
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/adv7180.c linux-3.14.54/drivers/media/platform/mxc/capture/adv7180.c
--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/adv7180.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/adv7180.c 2015-10-12 10:56:18.010351164 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/capture/adv7180.c 2015-10-15 15:51:25.064667679 +0200
@@ -0,0 +1,1344 @@
+/*
+ * Copyright 2005-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -71450,7 +71317,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/adv7180.c linux-
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/csi_v4l2_capture.c linux-3.14.54/drivers/media/platform/mxc/capture/csi_v4l2_capture.c
--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/csi_v4l2_capture.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/csi_v4l2_capture.c 2015-10-12 10:56:18.011351164 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/capture/csi_v4l2_capture.c 2015-10-15 15:51:25.064667679 +0200
@@ -0,0 +1,2047 @@
+/*
+ * Copyright 2009-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -73501,7 +73368,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/csi_v4l2_capture
+MODULE_SUPPORTED_DEVICE("video");
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/fsl_csi.c linux-3.14.54/drivers/media/platform/mxc/capture/fsl_csi.c
--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/fsl_csi.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/fsl_csi.c 2015-10-12 10:56:18.011351164 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/capture/fsl_csi.c 2015-10-15 15:51:25.064667679 +0200
@@ -0,0 +1,302 @@
+/*
+ * Copyright 2009-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -73807,7 +73674,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/fsl_csi.c linux-
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/fsl_csi.h linux-3.14.54/drivers/media/platform/mxc/capture/fsl_csi.h
--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/fsl_csi.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/fsl_csi.h 2015-10-12 10:56:18.011351164 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/capture/fsl_csi.h 2015-10-15 15:51:25.064667679 +0200
@@ -0,0 +1,198 @@
+/*
+ * Copyright 2009-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -74009,7 +73876,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/fsl_csi.h linux-
+void csi_dmareq_rff_disable(void);
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_bg_overlay_sdc.c linux-3.14.54/drivers/media/platform/mxc/capture/ipu_bg_overlay_sdc.c
--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_bg_overlay_sdc.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/ipu_bg_overlay_sdc.c 2015-10-12 10:56:18.012351164 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/capture/ipu_bg_overlay_sdc.c 2015-10-15 15:51:25.064667679 +0200
@@ -0,0 +1,546 @@
+
+/*
@@ -74559,7 +74426,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_bg_overlay_s
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_csi_enc.c linux-3.14.54/drivers/media/platform/mxc/capture/ipu_csi_enc.c
--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_csi_enc.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/ipu_csi_enc.c 2015-10-12 10:56:18.012351164 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/capture/ipu_csi_enc.c 2015-10-15 15:51:25.064667679 +0200
@@ -0,0 +1,418 @@
+/*
+ * Copyright 2009-2014 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -74981,7 +74848,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_csi_enc.c li
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_fg_overlay_sdc.c linux-3.14.54/drivers/media/platform/mxc/capture/ipu_fg_overlay_sdc.c
--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_fg_overlay_sdc.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/ipu_fg_overlay_sdc.c 2015-10-12 10:56:18.012351164 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/capture/ipu_fg_overlay_sdc.c 2015-10-15 15:51:25.064667679 +0200
@@ -0,0 +1,634 @@
+/*
+ * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -75619,7 +75486,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_fg_overlay_s
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_enc.c linux-3.14.54/drivers/media/platform/mxc/capture/ipu_prp_enc.c
--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_enc.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/ipu_prp_enc.c 2015-10-12 10:56:18.012351164 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/capture/ipu_prp_enc.c 2015-10-15 15:51:25.064667679 +0200
@@ -0,0 +1,595 @@
+/*
+ * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -76218,7 +76085,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_enc.c li
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_sw.h linux-3.14.54/drivers/media/platform/mxc/capture/ipu_prp_sw.h
--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_sw.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/ipu_prp_sw.h 2015-10-12 10:56:18.013351164 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/capture/ipu_prp_sw.h 2015-10-15 15:51:25.064667679 +0200
@@ -0,0 +1,43 @@
+/*
+ * Copyright 2004-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -76263,14 +76130,16 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_sw.h lin
+int prp_still_deselect(void *private);
+
+#endif
-diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c linux-3.14.54/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
---- linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c 2015-10-12 10:56:18.013351164 +0200
-@@ -0,0 +1,582 @@
+diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_bg.c linux-3.14.54/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_bg.c
+--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_bg.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_bg.c 2015-10-15 15:51:25.064667679 +0200
+@@ -0,0 +1,521 @@
+/*
+ * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
-+/* * The code contained herein is licensed under the GNU General Public
++
++/*
++ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
@@ -76279,24 +76148,22 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
+ */
+
+/*!
-+ * @file ipu_prp_vf_sdc.c
++ * @file ipu_prp_vf_sdc_bg.c
+ *
-+ * @brief IPU Use case for PRP-VF
++ * @brief IPU Use case for PRP-VF back-ground
+ *
+ * @ingroup IPU
+ */
-+
+#include <linux/dma-mapping.h>
-+#include <linux/console.h>
++#include <linux/fb.h>
+#include <linux/ipu.h>
+#include <linux/module.h>
-+#include <linux/mxcfb.h>
-+#include <mach/hardware.h>
+#include <mach/mipi_csi2.h>
+#include "mxc_v4l2_capture.h"
+#include "ipu_prp_sw.h"
+
+static int buffer_num;
++static int buffer_ready;
+static struct ipu_soc *disp_ipu;
+
+static void get_disp_ipu(cam_data *cam)
@@ -76307,29 +76174,51 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
+ disp_ipu = ipu_get_soc(0);
+}
+
-+static irqreturn_t prpvf_rot_eof_callback(int irq, void *dev_id)
++/*
++ * Function definitions
++ */
++
++/*!
++ * SDC V-Sync callback function.
++ *
++ * @param irq int irq line
++ * @param dev_id void * device id
++ *
++ * @return status IRQ_HANDLED for handled
++ */
++static irqreturn_t prpvf_sdc_vsync_callback(int irq, void *dev_id)
+{
+ cam_data *cam = dev_id;
-+ pr_debug("buffer_num %d\n", buffer_num);
-+
-+ if (cam->vf_rotation >= IPU_ROTATE_VERT_FLIP) {
-+ ipu_select_buffer(disp_ipu, MEM_FG_SYNC,
-+ IPU_INPUT_BUFFER, buffer_num);
-+ buffer_num = (buffer_num == 0) ? 1 : 0;
++ if (buffer_ready > 0) {
+ ipu_select_buffer(cam->ipu, MEM_ROT_VF_MEM,
-+ IPU_OUTPUT_BUFFER, buffer_num);
-+ } else {
-+ ipu_select_buffer(disp_ipu, MEM_FG_SYNC,
-+ IPU_INPUT_BUFFER, buffer_num);
-+ buffer_num = (buffer_num == 0) ? 1 : 0;
-+ ipu_select_buffer(cam->ipu, CSI_PRP_VF_MEM,
-+ IPU_OUTPUT_BUFFER, buffer_num);
++ IPU_OUTPUT_BUFFER, 0);
++ buffer_ready--;
+ }
++
+ return IRQ_HANDLED;
+}
-+/*
-+ * Function definitions
++
++/*!
++ * VF EOF callback function.
++ *
++ * @param irq int irq line
++ * @param dev_id void * device id
++ *
++ * @return status IRQ_HANDLED for handled
+ */
++static irqreturn_t prpvf_vf_eof_callback(int irq, void *dev_id)
++{
++ cam_data *cam = dev_id;
++ pr_debug("buffer_ready %d buffer_num %d\n", buffer_ready, buffer_num);
++
++ ipu_select_buffer(cam->ipu, MEM_ROT_VF_MEM,
++ IPU_INPUT_BUFFER, buffer_num);
++ buffer_num = (buffer_num == 0) ? 1 : 0;
++ ipu_select_buffer(cam->ipu, CSI_PRP_VF_MEM,
++ IPU_OUTPUT_BUFFER, buffer_num);
++ buffer_ready++;
++ return IRQ_HANDLED;
++}
+
+/*!
+ * prpvf_start - start the vf task
@@ -76339,14 +76228,12 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
+ */
+static int prpvf_start(void *private)
+{
-+ struct fb_var_screeninfo fbvar;
-+ struct fb_info *fbi = NULL;
+ cam_data *cam = (cam_data *) private;
+ ipu_channel_params_t vf;
-+ u32 vf_out_format = 0;
-+ u32 size = 2, temp = 0;
-+ int err = 0, i = 0;
-+ short *tmp, color;
++ u32 format;
++ u32 offset;
++ u32 bpp, size = 3;
++ int err = 0;
+#ifdef CONFIG_MXC_MIPI_CSI2
+ void *mipi_csi2_info;
+ int ipu_id;
@@ -76359,70 +76246,35 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
+ }
+
+ if (cam->overlay_active == true) {
-+ pr_debug("already started.\n");
++ pr_debug("already start.\n");
+ return 0;
+ }
+
+ get_disp_ipu(cam);
+
-+ for (i = 0; i < num_registered_fb; i++) {
-+ char *idstr = registered_fb[i]->fix.id;
-+ if (((strcmp(idstr, "DISP3 FG") == 0) && (cam->output < 3)) ||
-+ ((strcmp(idstr, "DISP4 FG") == 0) && (cam->output >= 3))) {
-+ fbi = registered_fb[i];
-+ break;
-+ }
-+ }
-+
-+ if (fbi == NULL) {
-+ printk(KERN_ERR "DISP FG fb not found\n");
-+ return -EPERM;
-+ }
-+
-+ fbvar = fbi->var;
-+
-+ /* Store the overlay frame buffer's original std */
-+ cam->fb_origin_std = fbvar.nonstd;
-+
-+ if (cam->devtype == IMX5_V4L2 || cam->devtype == IMX6_V4L2) {
-+ /* Use DP to do CSC so that we can get better performance */
-+ vf_out_format = IPU_PIX_FMT_UYVY;
-+ fbvar.nonstd = vf_out_format;
-+ color = 0x80;
++ format = cam->v4l2_fb.fmt.pixelformat;
++ if (cam->v4l2_fb.fmt.pixelformat == IPU_PIX_FMT_BGR24) {
++ bpp = 3, size = 3;
++ pr_info("BGR24\n");
++ } else if (cam->v4l2_fb.fmt.pixelformat == IPU_PIX_FMT_RGB565) {
++ bpp = 2, size = 2;
++ pr_info("RGB565\n");
++ } else if (cam->v4l2_fb.fmt.pixelformat == IPU_PIX_FMT_BGR32) {
++ bpp = 4, size = 4;
++ pr_info("BGR32\n");
+ } else {
-+ vf_out_format = IPU_PIX_FMT_RGB565;
-+ fbvar.nonstd = 0;
-+ color = 0x0;
++ printk(KERN_ERR
++ "unsupported fix format from the framebuffer.\n");
++ return -EINVAL;
+ }
+
-+ fbvar.bits_per_pixel = 16;
-+ fbvar.xres = fbvar.xres_virtual = cam->win.w.width;
-+ fbvar.yres = cam->win.w.height;
-+ fbvar.yres_virtual = cam->win.w.height * 2;
-+ fbvar.yoffset = 0;
-+ fbvar.accel_flags = FB_ACCEL_DOUBLE_FLAG;
-+ fbvar.activate |= FB_ACTIVATE_FORCE;
-+ fb_set_var(fbi, &fbvar);
-+
-+ ipu_disp_set_window_pos(disp_ipu, MEM_FG_SYNC, cam->win.w.left,
-+ cam->win.w.top);
-+
-+ /* Fill black color for framebuffer */
-+ tmp = (short *) fbi->screen_base;
-+ for (i = 0; i < (fbi->fix.line_length * fbi->var.yres)/2;
-+ i++, tmp++)
-+ *tmp = color;
-+
-+ console_lock();
-+ fb_blank(fbi, FB_BLANK_UNBLANK);
-+ console_unlock();
++ offset = cam->v4l2_fb.fmt.bytesperline * cam->win.w.top +
++ size * cam->win.w.left;
+
-+ /* correct display ch buffer address */
-+ ipu_update_channel_buffer(disp_ipu, MEM_FG_SYNC, IPU_INPUT_BUFFER,
-+ 0, fbi->fix.smem_start +
-+ (fbi->fix.line_length * fbvar.yres));
-+ ipu_update_channel_buffer(disp_ipu, MEM_FG_SYNC, IPU_INPUT_BUFFER,
-+ 1, fbi->fix.smem_start);
++ if (cam->v4l2_fb.base == 0)
++ printk(KERN_ERR "invalid frame buffer address.\n");
++ else
++ offset += (u32) cam->v4l2_fb.base;
+
+ memset(&vf, 0, sizeof(ipu_channel_params_t));
+ ipu_csi_get_window_size(cam->ipu, &vf.csi_prp_vf_mem.in_width,
@@ -76435,7 +76287,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
+ vf.csi_prp_vf_mem.out_width = cam->win.w.height;
+ vf.csi_prp_vf_mem.out_height = cam->win.w.width;
+ }
-+ vf.csi_prp_vf_mem.out_pixel_fmt = vf_out_format;
++ vf.csi_prp_vf_mem.out_pixel_fmt = format;
+ size = cam->win.w.width * cam->win.w.height * size;
+
+#ifdef CONFIG_MXC_MIPI_CSI2
@@ -76470,35 +76322,31 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
+
+ err = ipu_init_channel(cam->ipu, CSI_PRP_VF_MEM, &vf);
+ if (err != 0)
-+ goto out_5;
++ goto out_4;
+
+ if (cam->vf_bufs_vaddr[0]) {
+ dma_free_coherent(0, cam->vf_bufs_size[0],
-+ cam->vf_bufs_vaddr[0],
-+ (dma_addr_t) cam->vf_bufs[0]);
++ cam->vf_bufs_vaddr[0], cam->vf_bufs[0]);
+ }
+ if (cam->vf_bufs_vaddr[1]) {
+ dma_free_coherent(0, cam->vf_bufs_size[1],
-+ cam->vf_bufs_vaddr[1],
-+ (dma_addr_t) cam->vf_bufs[1]);
++ cam->vf_bufs_vaddr[1], cam->vf_bufs[1]);
+ }
+ cam->vf_bufs_size[0] = PAGE_ALIGN(size);
+ cam->vf_bufs_vaddr[0] = (void *)dma_alloc_coherent(0,
+ cam->vf_bufs_size[0],
-+ (dma_addr_t *) &
-+ cam->vf_bufs[0],
++ &cam->vf_bufs[0],
+ GFP_DMA |
+ GFP_KERNEL);
+ if (cam->vf_bufs_vaddr[0] == NULL) {
+ printk(KERN_ERR "Error to allocate vf buffer\n");
+ err = -ENOMEM;
-+ goto out_4;
++ goto out_3;
+ }
+ cam->vf_bufs_size[1] = PAGE_ALIGN(size);
+ cam->vf_bufs_vaddr[1] = (void *)dma_alloc_coherent(0,
+ cam->vf_bufs_size[1],
-+ (dma_addr_t *) &
-+ cam->vf_bufs[1],
++ &cam->vf_bufs[1],
+ GFP_DMA |
+ GFP_KERNEL);
+ if (cam->vf_bufs_vaddr[1] == NULL) {
@@ -76506,121 +76354,94 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
+ err = -ENOMEM;
+ goto out_3;
+ }
-+ pr_debug("vf_bufs %x %x\n", cam->vf_bufs[0], cam->vf_bufs[1]);
+
-+ if (cam->vf_rotation >= IPU_ROTATE_VERT_FLIP) {
-+ err = ipu_init_channel_buffer(cam->ipu, CSI_PRP_VF_MEM,
-+ IPU_OUTPUT_BUFFER,
-+ vf_out_format,
-+ vf.csi_prp_vf_mem.out_width,
-+ vf.csi_prp_vf_mem.out_height,
-+ vf.csi_prp_vf_mem.out_width,
-+ IPU_ROTATE_NONE,
-+ cam->vf_bufs[0], cam->vf_bufs[1],
-+ 0, 0, 0);
-+ if (err != 0)
-+ goto out_3;
++ err = ipu_init_channel_buffer(cam->ipu, CSI_PRP_VF_MEM,
++ IPU_OUTPUT_BUFFER,
++ format, vf.csi_prp_vf_mem.out_width,
++ vf.csi_prp_vf_mem.out_height,
++ vf.csi_prp_vf_mem.out_width,
++ IPU_ROTATE_NONE,
++ cam->vf_bufs[0],
++ cam->vf_bufs[1],
++ 0, 0, 0);
++ if (err != 0) {
++ printk(KERN_ERR "Error initializing CSI_PRP_VF_MEM\n");
++ goto out_3;
++ }
++ err = ipu_init_channel(cam->ipu, MEM_ROT_VF_MEM, NULL);
++ if (err != 0) {
++ printk(KERN_ERR "Error MEM_ROT_VF_MEM channel\n");
++ goto out_3;
++ }
+
-+ err = ipu_init_channel(cam->ipu, MEM_ROT_VF_MEM, NULL);
-+ if (err != 0) {
-+ printk(KERN_ERR "Error MEM_ROT_VF_MEM channel\n");
-+ goto out_3;
-+ }
++ err = ipu_init_channel_buffer(cam->ipu, MEM_ROT_VF_MEM,
++ IPU_INPUT_BUFFER,
++ format, vf.csi_prp_vf_mem.out_width,
++ vf.csi_prp_vf_mem.out_height,
++ vf.csi_prp_vf_mem.out_width,
++ cam->vf_rotation,
++ cam->vf_bufs[0],
++ cam->vf_bufs[1],
++ 0, 0, 0);
++ if (err != 0) {
++ printk(KERN_ERR "Error MEM_ROT_VF_MEM input buffer\n");
++ goto out_2;
++ }
+
++ if (cam->vf_rotation >= IPU_ROTATE_90_RIGHT) {
+ err = ipu_init_channel_buffer(cam->ipu, MEM_ROT_VF_MEM,
-+ IPU_INPUT_BUFFER,
-+ vf_out_format,
-+ vf.csi_prp_vf_mem.out_width,
++ IPU_OUTPUT_BUFFER,
++ format,
+ vf.csi_prp_vf_mem.out_height,
+ vf.csi_prp_vf_mem.out_width,
-+ cam->vf_rotation,
-+ cam->vf_bufs[0],
-+ cam->vf_bufs[1],
-+ 0, 0, 0);
++ cam->overlay_fb->var.xres * bpp,
++ IPU_ROTATE_NONE,
++ offset, 0, 0, 0, 0);
++
+ if (err != 0) {
-+ printk(KERN_ERR "Error MEM_ROT_VF_MEM input buffer\n");
++ printk(KERN_ERR "Error MEM_ROT_VF_MEM output buffer\n");
+ goto out_2;
+ }
-+
-+ if (cam->vf_rotation < IPU_ROTATE_90_RIGHT) {
-+ temp = vf.csi_prp_vf_mem.out_width;
-+ vf.csi_prp_vf_mem.out_width =
-+ vf.csi_prp_vf_mem.out_height;
-+ vf.csi_prp_vf_mem.out_height = temp;
-+ }
-+
++ } else {
+ err = ipu_init_channel_buffer(cam->ipu, MEM_ROT_VF_MEM,
+ IPU_OUTPUT_BUFFER,
-+ vf_out_format,
-+ vf.csi_prp_vf_mem.out_height,
++ format,
+ vf.csi_prp_vf_mem.out_width,
+ vf.csi_prp_vf_mem.out_height,
++ cam->overlay_fb->var.xres * bpp,
+ IPU_ROTATE_NONE,
-+ fbi->fix.smem_start +
-+ (fbi->fix.line_length *
-+ fbi->var.yres),
-+ fbi->fix.smem_start, 0, 0, 0);
-+
++ offset, 0, 0, 0, 0);
+ if (err != 0) {
+ printk(KERN_ERR "Error MEM_ROT_VF_MEM output buffer\n");
+ goto out_2;
+ }
++ }
+
-+ ipu_clear_irq(cam->ipu, IPU_IRQ_PRP_VF_ROT_OUT_EOF);
-+ err = ipu_request_irq(cam->ipu, IPU_IRQ_PRP_VF_ROT_OUT_EOF,
-+ prpvf_rot_eof_callback,
++ ipu_clear_irq(cam->ipu, IPU_IRQ_PRP_VF_OUT_EOF);
++ err = ipu_request_irq(cam->ipu, IPU_IRQ_PRP_VF_OUT_EOF,
++ prpvf_vf_eof_callback,
+ 0, "Mxc Camera", cam);
-+ if (err < 0) {
-+ printk(KERN_ERR "Error request irq:IPU_IRQ_PRP_VF_ROT_OUT_EOF\n");
-+ goto out_2;
-+ }
-+
-+ err = ipu_link_channels(cam->ipu,
-+ CSI_PRP_VF_MEM, MEM_ROT_VF_MEM);
-+ if (err < 0) {
-+ printk(KERN_ERR
-+ "Error link CSI_PRP_VF_MEM-MEM_ROT_VF_MEM\n");
-+ goto out_1;
-+ }
-+
-+ ipu_enable_channel(cam->ipu, CSI_PRP_VF_MEM);
-+ ipu_enable_channel(cam->ipu, MEM_ROT_VF_MEM);
++ if (err != 0) {
++ printk(KERN_ERR
++ "Error registering IPU_IRQ_PRP_VF_OUT_EOF irq.\n");
++ goto out_2;
++ }
+
-+ ipu_select_buffer(cam->ipu, CSI_PRP_VF_MEM,
-+ IPU_OUTPUT_BUFFER, 0);
-+ ipu_select_buffer(cam->ipu, CSI_PRP_VF_MEM,
-+ IPU_OUTPUT_BUFFER, 1);
-+ ipu_select_buffer(cam->ipu, MEM_ROT_VF_MEM,
-+ IPU_OUTPUT_BUFFER, 0);
-+ } else {
-+ err = ipu_init_channel_buffer(cam->ipu, CSI_PRP_VF_MEM,
-+ IPU_OUTPUT_BUFFER,
-+ vf_out_format, cam->win.w.width,
-+ cam->win.w.height,
-+ cam->win.w.width,
-+ cam->vf_rotation,
-+ fbi->fix.smem_start +
-+ (fbi->fix.line_length *
-+ fbi->var.yres),
-+ fbi->fix.smem_start, 0, 0, 0);
-+ if (err != 0) {
-+ printk(KERN_ERR "Error initializing CSI_PRP_VF_MEM\n");
-+ goto out_4;
-+ }
-+ ipu_clear_irq(cam->ipu, IPU_IRQ_PRP_VF_OUT_EOF);
-+ err = ipu_request_irq(cam->ipu, IPU_IRQ_PRP_VF_OUT_EOF,
-+ prpvf_rot_eof_callback,
++ ipu_clear_irq(disp_ipu, IPU_IRQ_BG_SF_END);
++ err = ipu_request_irq(disp_ipu, IPU_IRQ_BG_SF_END,
++ prpvf_sdc_vsync_callback,
+ 0, "Mxc Camera", cam);
-+ if (err < 0) {
-+ printk(KERN_ERR "Error request irq:IPU_IRQ_PRP_VF_OUT_EOF\n");
-+ goto out_4;
-+ }
++ if (err != 0) {
++ printk(KERN_ERR "Error registering IPU_IRQ_BG_SF_END irq.\n");
++ goto out_1;
++ }
+
-+ ipu_enable_channel(cam->ipu, CSI_PRP_VF_MEM);
++ ipu_enable_channel(cam->ipu, CSI_PRP_VF_MEM);
++ ipu_enable_channel(cam->ipu, MEM_ROT_VF_MEM);
+
-+ ipu_select_buffer(cam->ipu, CSI_PRP_VF_MEM,
-+ IPU_OUTPUT_BUFFER, 0);
-+ }
++ buffer_num = 0;
++ buffer_ready = 0;
++ ipu_select_buffer(cam->ipu, CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, 0);
+
+ cam->overlay_active = true;
+ return err;
@@ -76628,26 +76449,36 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
+out_1:
+ ipu_free_irq(cam->ipu, IPU_IRQ_PRP_VF_OUT_EOF, NULL);
+out_2:
-+ if (cam->vf_rotation >= IPU_ROTATE_VERT_FLIP)
-+ ipu_uninit_channel(cam->ipu, MEM_ROT_VF_MEM);
++ ipu_uninit_channel(cam->ipu, MEM_ROT_VF_MEM);
+out_3:
++ ipu_uninit_channel(cam->ipu, CSI_PRP_VF_MEM);
++out_4:
+ if (cam->vf_bufs_vaddr[0]) {
+ dma_free_coherent(0, cam->vf_bufs_size[0],
-+ cam->vf_bufs_vaddr[0],
-+ (dma_addr_t) cam->vf_bufs[0]);
++ cam->vf_bufs_vaddr[0], cam->vf_bufs[0]);
+ cam->vf_bufs_vaddr[0] = NULL;
+ cam->vf_bufs[0] = 0;
+ }
+ if (cam->vf_bufs_vaddr[1]) {
+ dma_free_coherent(0, cam->vf_bufs_size[1],
-+ cam->vf_bufs_vaddr[1],
-+ (dma_addr_t) cam->vf_bufs[1]);
++ cam->vf_bufs_vaddr[1], cam->vf_bufs[1]);
+ cam->vf_bufs_vaddr[1] = NULL;
+ cam->vf_bufs[1] = 0;
+ }
-+out_4:
-+ ipu_uninit_channel(cam->ipu, CSI_PRP_VF_MEM);
-+out_5:
++ if (cam->rot_vf_bufs_vaddr[0]) {
++ dma_free_coherent(0, cam->rot_vf_buf_size[0],
++ cam->rot_vf_bufs_vaddr[0],
++ cam->rot_vf_bufs[0]);
++ cam->rot_vf_bufs_vaddr[0] = NULL;
++ cam->rot_vf_bufs[0] = 0;
++ }
++ if (cam->rot_vf_bufs_vaddr[1]) {
++ dma_free_coherent(0, cam->rot_vf_buf_size[1],
++ cam->rot_vf_bufs_vaddr[1],
++ cam->rot_vf_bufs[1]);
++ cam->rot_vf_bufs_vaddr[1] = NULL;
++ cam->rot_vf_bufs[1] = 0;
++ }
+ return err;
+}
+
@@ -76660,9 +76491,6 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
+static int prpvf_stop(void *private)
+{
+ cam_data *cam = (cam_data *) private;
-+ int err = 0, i = 0;
-+ struct fb_info *fbi = NULL;
-+ struct fb_var_screeninfo fbvar;
+#ifdef CONFIG_MXC_MIPI_CSI2
+ void *mipi_csi2_info;
+ int ipu_id;
@@ -76672,44 +76500,12 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
+ if (cam->overlay_active == false)
+ return 0;
+
-+ for (i = 0; i < num_registered_fb; i++) {
-+ char *idstr = registered_fb[i]->fix.id;
-+ if (((strcmp(idstr, "DISP3 FG") == 0) && (cam->output < 3)) ||
-+ ((strcmp(idstr, "DISP4 FG") == 0) && (cam->output >= 3))) {
-+ fbi = registered_fb[i];
-+ break;
-+ }
-+ }
-+
-+ if (fbi == NULL) {
-+ printk(KERN_ERR "DISP FG fb not found\n");
-+ return -EPERM;
-+ }
-+
-+ if (cam->vf_rotation >= IPU_ROTATE_VERT_FLIP) {
-+ ipu_unlink_channels(cam->ipu, CSI_PRP_VF_MEM, MEM_ROT_VF_MEM);
-+ ipu_free_irq(cam->ipu, IPU_IRQ_PRP_VF_ROT_OUT_EOF, cam);
-+ }
-+ buffer_num = 0;
++ ipu_free_irq(disp_ipu, IPU_IRQ_BG_SF_END, cam);
+
+ ipu_disable_channel(cam->ipu, CSI_PRP_VF_MEM, true);
-+
-+ if (cam->vf_rotation >= IPU_ROTATE_VERT_FLIP) {
-+ ipu_disable_channel(cam->ipu, MEM_ROT_VF_MEM, true);
-+ ipu_uninit_channel(cam->ipu, MEM_ROT_VF_MEM);
-+ }
++ ipu_disable_channel(cam->ipu, MEM_ROT_VF_MEM, true);
+ ipu_uninit_channel(cam->ipu, CSI_PRP_VF_MEM);
-+
-+ console_lock();
-+ fb_blank(fbi, FB_BLANK_POWERDOWN);
-+ console_unlock();
-+
-+ /* Set the overlay frame buffer std to what it is used to be */
-+ fbvar = fbi->var;
-+ fbvar.accel_flags = FB_ACCEL_TRIPLE_FLAG;
-+ fbvar.nonstd = cam->fb_origin_std;
-+ fbvar.activate |= FB_ACTIVATE_FORCE;
-+ fb_set_var(fbi, &fbvar);
++ ipu_uninit_channel(cam->ipu, MEM_ROT_VF_MEM);
+
+#ifdef CONFIG_MXC_MIPI_CSI2
+ mipi_csi2_info = mipi_csi2_get_info();
@@ -76728,21 +76524,35 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
+
+ if (cam->vf_bufs_vaddr[0]) {
+ dma_free_coherent(0, cam->vf_bufs_size[0],
-+ cam->vf_bufs_vaddr[0],
-+ (dma_addr_t) cam->vf_bufs[0]);
++ cam->vf_bufs_vaddr[0], cam->vf_bufs[0]);
+ cam->vf_bufs_vaddr[0] = NULL;
+ cam->vf_bufs[0] = 0;
+ }
+ if (cam->vf_bufs_vaddr[1]) {
+ dma_free_coherent(0, cam->vf_bufs_size[1],
-+ cam->vf_bufs_vaddr[1],
-+ (dma_addr_t) cam->vf_bufs[1]);
++ cam->vf_bufs_vaddr[1], cam->vf_bufs[1]);
+ cam->vf_bufs_vaddr[1] = NULL;
+ cam->vf_bufs[1] = 0;
+ }
++ if (cam->rot_vf_bufs_vaddr[0]) {
++ dma_free_coherent(0, cam->rot_vf_buf_size[0],
++ cam->rot_vf_bufs_vaddr[0],
++ cam->rot_vf_bufs[0]);
++ cam->rot_vf_bufs_vaddr[0] = NULL;
++ cam->rot_vf_bufs[0] = 0;
++ }
++ if (cam->rot_vf_bufs_vaddr[1]) {
++ dma_free_coherent(0, cam->rot_vf_buf_size[1],
++ cam->rot_vf_bufs_vaddr[1],
++ cam->rot_vf_bufs[1]);
++ cam->rot_vf_bufs_vaddr[1] = NULL;
++ cam->rot_vf_bufs[1] = 0;
++ }
+
++ buffer_num = 0;
++ buffer_ready = 0;
+ cam->overlay_active = false;
-+ return err;
++ return 0;
+}
+
+/*!
@@ -76771,8 +76581,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
+ /* free csi eof irq firstly.
+ * when disable csi, wait for idmac eof.
+ * it requests eof irq again */
-+ if (cam->vf_rotation < IPU_ROTATE_VERT_FLIP)
-+ ipu_free_irq(cam->ipu, IPU_IRQ_PRP_VF_OUT_EOF, cam);
++ ipu_free_irq(cam->ipu, IPU_IRQ_PRP_VF_OUT_EOF, cam);
+
+ return ipu_disable_csi(cam->ipu, cam->csi);
+}
@@ -76784,37 +76593,34 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
+ *
+ * @return status
+ */
-+int prp_vf_sdc_select(void *private)
++int prp_vf_sdc_select_bg(void *private)
+{
-+ cam_data *cam;
-+ int err = 0;
-+ if (private) {
-+ cam = (cam_data *) private;
++ cam_data *cam = (cam_data *) private;
++
++ if (cam) {
+ cam->vf_start_sdc = prpvf_start;
+ cam->vf_stop_sdc = prpvf_stop;
+ cam->vf_enable_csi = prp_vf_enable_csi;
+ cam->vf_disable_csi = prp_vf_disable_csi;
+ cam->overlay_active = false;
-+ } else
-+ err = -EIO;
++ }
+
-+ return err;
++ return 0;
+}
-+EXPORT_SYMBOL(prp_vf_sdc_select);
++EXPORT_SYMBOL(prp_vf_sdc_select_bg);
+
+/*!
+ * function to de-select PRP-VF as the working path
+ *
+ * @param private cam_data * mxc v4l2 main structure
+ *
-+ * @return int
++ * @return status
+ */
-+int prp_vf_sdc_deselect(void *private)
++int prp_vf_sdc_deselect_bg(void *private)
+{
-+ cam_data *cam;
++ cam_data *cam = (cam_data *) private;
+
-+ if (private) {
-+ cam = (cam_data *) private;
++ if (cam) {
+ cam->vf_start_sdc = NULL;
+ cam->vf_stop_sdc = NULL;
+ cam->vf_enable_csi = NULL;
@@ -76822,14 +76628,14 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
+ }
+ return 0;
+}
-+EXPORT_SYMBOL(prp_vf_sdc_deselect);
++EXPORT_SYMBOL(prp_vf_sdc_deselect_bg);
+
+/*!
+ * Init viewfinder task.
+ *
+ * @return Error code indicating success or failure
+ */
-+__init int prp_vf_sdc_init(void)
++__init int prp_vf_sdc_init_bg(void)
+{
+ return 0;
+}
@@ -76839,26 +76645,24 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
+ *
+ * @return Error code indicating success or failure
+ */
-+void __exit prp_vf_sdc_exit(void)
++void __exit prp_vf_sdc_exit_bg(void)
+{
+}
+
-+module_init(prp_vf_sdc_init);
-+module_exit(prp_vf_sdc_exit);
++module_init(prp_vf_sdc_init_bg);
++module_exit(prp_vf_sdc_exit_bg);
+
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
-+MODULE_DESCRIPTION("IPU PRP VF SDC Driver");
++MODULE_DESCRIPTION("IPU PRP VF SDC Backgroud Driver");
+MODULE_LICENSE("GPL");
-diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_bg.c linux-3.14.54/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_bg.c
---- linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_bg.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_bg.c 2015-10-12 10:56:18.013351164 +0200
-@@ -0,0 +1,521 @@
+diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c linux-3.14.54/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c
+--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc.c 2015-10-15 15:51:25.064667679 +0200
+@@ -0,0 +1,582 @@
+/*
+ * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
-+
-+/*
-+ * The code contained herein is licensed under the GNU General Public
++/* * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
@@ -76867,22 +76671,24 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_b
+ */
+
+/*!
-+ * @file ipu_prp_vf_sdc_bg.c
++ * @file ipu_prp_vf_sdc.c
+ *
-+ * @brief IPU Use case for PRP-VF back-ground
++ * @brief IPU Use case for PRP-VF
+ *
+ * @ingroup IPU
+ */
++
+#include <linux/dma-mapping.h>
-+#include <linux/fb.h>
++#include <linux/console.h>
+#include <linux/ipu.h>
+#include <linux/module.h>
++#include <linux/mxcfb.h>
++#include <mach/hardware.h>
+#include <mach/mipi_csi2.h>
+#include "mxc_v4l2_capture.h"
+#include "ipu_prp_sw.h"
+
+static int buffer_num;
-+static int buffer_ready;
+static struct ipu_soc *disp_ipu;
+
+static void get_disp_ipu(cam_data *cam)
@@ -76893,51 +76699,29 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_b
+ disp_ipu = ipu_get_soc(0);
+}
+
-+/*
-+ * Function definitions
-+ */
-+
-+/*!
-+ * SDC V-Sync callback function.
-+ *
-+ * @param irq int irq line
-+ * @param dev_id void * device id
-+ *
-+ * @return status IRQ_HANDLED for handled
-+ */
-+static irqreturn_t prpvf_sdc_vsync_callback(int irq, void *dev_id)
++static irqreturn_t prpvf_rot_eof_callback(int irq, void *dev_id)
+{
+ cam_data *cam = dev_id;
-+ if (buffer_ready > 0) {
++ pr_debug("buffer_num %d\n", buffer_num);
++
++ if (cam->vf_rotation >= IPU_ROTATE_VERT_FLIP) {
++ ipu_select_buffer(disp_ipu, MEM_FG_SYNC,
++ IPU_INPUT_BUFFER, buffer_num);
++ buffer_num = (buffer_num == 0) ? 1 : 0;
+ ipu_select_buffer(cam->ipu, MEM_ROT_VF_MEM,
-+ IPU_OUTPUT_BUFFER, 0);
-+ buffer_ready--;
++ IPU_OUTPUT_BUFFER, buffer_num);
++ } else {
++ ipu_select_buffer(disp_ipu, MEM_FG_SYNC,
++ IPU_INPUT_BUFFER, buffer_num);
++ buffer_num = (buffer_num == 0) ? 1 : 0;
++ ipu_select_buffer(cam->ipu, CSI_PRP_VF_MEM,
++ IPU_OUTPUT_BUFFER, buffer_num);
+ }
-+
+ return IRQ_HANDLED;
+}
-+
-+/*!
-+ * VF EOF callback function.
-+ *
-+ * @param irq int irq line
-+ * @param dev_id void * device id
-+ *
-+ * @return status IRQ_HANDLED for handled
++/*
++ * Function definitions
+ */
-+static irqreturn_t prpvf_vf_eof_callback(int irq, void *dev_id)
-+{
-+ cam_data *cam = dev_id;
-+ pr_debug("buffer_ready %d buffer_num %d\n", buffer_ready, buffer_num);
-+
-+ ipu_select_buffer(cam->ipu, MEM_ROT_VF_MEM,
-+ IPU_INPUT_BUFFER, buffer_num);
-+ buffer_num = (buffer_num == 0) ? 1 : 0;
-+ ipu_select_buffer(cam->ipu, CSI_PRP_VF_MEM,
-+ IPU_OUTPUT_BUFFER, buffer_num);
-+ buffer_ready++;
-+ return IRQ_HANDLED;
-+}
+
+/*!
+ * prpvf_start - start the vf task
@@ -76947,12 +76731,14 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_b
+ */
+static int prpvf_start(void *private)
+{
++ struct fb_var_screeninfo fbvar;
++ struct fb_info *fbi = NULL;
+ cam_data *cam = (cam_data *) private;
+ ipu_channel_params_t vf;
-+ u32 format;
-+ u32 offset;
-+ u32 bpp, size = 3;
-+ int err = 0;
++ u32 vf_out_format = 0;
++ u32 size = 2, temp = 0;
++ int err = 0, i = 0;
++ short *tmp, color;
+#ifdef CONFIG_MXC_MIPI_CSI2
+ void *mipi_csi2_info;
+ int ipu_id;
@@ -76965,35 +76751,70 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_b
+ }
+
+ if (cam->overlay_active == true) {
-+ pr_debug("already start.\n");
++ pr_debug("already started.\n");
+ return 0;
+ }
+
+ get_disp_ipu(cam);
+
-+ format = cam->v4l2_fb.fmt.pixelformat;
-+ if (cam->v4l2_fb.fmt.pixelformat == IPU_PIX_FMT_BGR24) {
-+ bpp = 3, size = 3;
-+ pr_info("BGR24\n");
-+ } else if (cam->v4l2_fb.fmt.pixelformat == IPU_PIX_FMT_RGB565) {
-+ bpp = 2, size = 2;
-+ pr_info("RGB565\n");
-+ } else if (cam->v4l2_fb.fmt.pixelformat == IPU_PIX_FMT_BGR32) {
-+ bpp = 4, size = 4;
-+ pr_info("BGR32\n");
++ for (i = 0; i < num_registered_fb; i++) {
++ char *idstr = registered_fb[i]->fix.id;
++ if (((strcmp(idstr, "DISP3 FG") == 0) && (cam->output < 3)) ||
++ ((strcmp(idstr, "DISP4 FG") == 0) && (cam->output >= 3))) {
++ fbi = registered_fb[i];
++ break;
++ }
++ }
++
++ if (fbi == NULL) {
++ printk(KERN_ERR "DISP FG fb not found\n");
++ return -EPERM;
++ }
++
++ fbvar = fbi->var;
++
++ /* Store the overlay frame buffer's original std */
++ cam->fb_origin_std = fbvar.nonstd;
++
++ if (cam->devtype == IMX5_V4L2 || cam->devtype == IMX6_V4L2) {
++ /* Use DP to do CSC so that we can get better performance */
++ vf_out_format = IPU_PIX_FMT_UYVY;
++ fbvar.nonstd = vf_out_format;
++ color = 0x80;
+ } else {
-+ printk(KERN_ERR
-+ "unsupported fix format from the framebuffer.\n");
-+ return -EINVAL;
++ vf_out_format = IPU_PIX_FMT_RGB565;
++ fbvar.nonstd = 0;
++ color = 0x0;
+ }
+
-+ offset = cam->v4l2_fb.fmt.bytesperline * cam->win.w.top +
-+ size * cam->win.w.left;
++ fbvar.bits_per_pixel = 16;
++ fbvar.xres = fbvar.xres_virtual = cam->win.w.width;
++ fbvar.yres = cam->win.w.height;
++ fbvar.yres_virtual = cam->win.w.height * 2;
++ fbvar.yoffset = 0;
++ fbvar.accel_flags = FB_ACCEL_DOUBLE_FLAG;
++ fbvar.activate |= FB_ACTIVATE_FORCE;
++ fb_set_var(fbi, &fbvar);
+
-+ if (cam->v4l2_fb.base == 0)
-+ printk(KERN_ERR "invalid frame buffer address.\n");
-+ else
-+ offset += (u32) cam->v4l2_fb.base;
++ ipu_disp_set_window_pos(disp_ipu, MEM_FG_SYNC, cam->win.w.left,
++ cam->win.w.top);
++
++ /* Fill black color for framebuffer */
++ tmp = (short *) fbi->screen_base;
++ for (i = 0; i < (fbi->fix.line_length * fbi->var.yres)/2;
++ i++, tmp++)
++ *tmp = color;
++
++ console_lock();
++ fb_blank(fbi, FB_BLANK_UNBLANK);
++ console_unlock();
++
++ /* correct display ch buffer address */
++ ipu_update_channel_buffer(disp_ipu, MEM_FG_SYNC, IPU_INPUT_BUFFER,
++ 0, fbi->fix.smem_start +
++ (fbi->fix.line_length * fbvar.yres));
++ ipu_update_channel_buffer(disp_ipu, MEM_FG_SYNC, IPU_INPUT_BUFFER,
++ 1, fbi->fix.smem_start);
+
+ memset(&vf, 0, sizeof(ipu_channel_params_t));
+ ipu_csi_get_window_size(cam->ipu, &vf.csi_prp_vf_mem.in_width,
@@ -77006,7 +76827,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_b
+ vf.csi_prp_vf_mem.out_width = cam->win.w.height;
+ vf.csi_prp_vf_mem.out_height = cam->win.w.width;
+ }
-+ vf.csi_prp_vf_mem.out_pixel_fmt = format;
++ vf.csi_prp_vf_mem.out_pixel_fmt = vf_out_format;
+ size = cam->win.w.width * cam->win.w.height * size;
+
+#ifdef CONFIG_MXC_MIPI_CSI2
@@ -77041,31 +76862,35 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_b
+
+ err = ipu_init_channel(cam->ipu, CSI_PRP_VF_MEM, &vf);
+ if (err != 0)
-+ goto out_4;
++ goto out_5;
+
+ if (cam->vf_bufs_vaddr[0]) {
+ dma_free_coherent(0, cam->vf_bufs_size[0],
-+ cam->vf_bufs_vaddr[0], cam->vf_bufs[0]);
++ cam->vf_bufs_vaddr[0],
++ (dma_addr_t) cam->vf_bufs[0]);
+ }
+ if (cam->vf_bufs_vaddr[1]) {
+ dma_free_coherent(0, cam->vf_bufs_size[1],
-+ cam->vf_bufs_vaddr[1], cam->vf_bufs[1]);
++ cam->vf_bufs_vaddr[1],
++ (dma_addr_t) cam->vf_bufs[1]);
+ }
+ cam->vf_bufs_size[0] = PAGE_ALIGN(size);
+ cam->vf_bufs_vaddr[0] = (void *)dma_alloc_coherent(0,
+ cam->vf_bufs_size[0],
-+ &cam->vf_bufs[0],
++ (dma_addr_t *) &
++ cam->vf_bufs[0],
+ GFP_DMA |
+ GFP_KERNEL);
+ if (cam->vf_bufs_vaddr[0] == NULL) {
+ printk(KERN_ERR "Error to allocate vf buffer\n");
+ err = -ENOMEM;
-+ goto out_3;
++ goto out_4;
+ }
+ cam->vf_bufs_size[1] = PAGE_ALIGN(size);
+ cam->vf_bufs_vaddr[1] = (void *)dma_alloc_coherent(0,
+ cam->vf_bufs_size[1],
-+ &cam->vf_bufs[1],
++ (dma_addr_t *) &
++ cam->vf_bufs[1],
+ GFP_DMA |
+ GFP_KERNEL);
+ if (cam->vf_bufs_vaddr[1] == NULL) {
@@ -77073,94 +76898,121 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_b
+ err = -ENOMEM;
+ goto out_3;
+ }
++ pr_debug("vf_bufs %x %x\n", cam->vf_bufs[0], cam->vf_bufs[1]);
+
-+ err = ipu_init_channel_buffer(cam->ipu, CSI_PRP_VF_MEM,
-+ IPU_OUTPUT_BUFFER,
-+ format, vf.csi_prp_vf_mem.out_width,
-+ vf.csi_prp_vf_mem.out_height,
-+ vf.csi_prp_vf_mem.out_width,
-+ IPU_ROTATE_NONE,
-+ cam->vf_bufs[0],
-+ cam->vf_bufs[1],
-+ 0, 0, 0);
-+ if (err != 0) {
-+ printk(KERN_ERR "Error initializing CSI_PRP_VF_MEM\n");
-+ goto out_3;
-+ }
-+ err = ipu_init_channel(cam->ipu, MEM_ROT_VF_MEM, NULL);
-+ if (err != 0) {
-+ printk(KERN_ERR "Error MEM_ROT_VF_MEM channel\n");
-+ goto out_3;
-+ }
-+
-+ err = ipu_init_channel_buffer(cam->ipu, MEM_ROT_VF_MEM,
-+ IPU_INPUT_BUFFER,
-+ format, vf.csi_prp_vf_mem.out_width,
-+ vf.csi_prp_vf_mem.out_height,
-+ vf.csi_prp_vf_mem.out_width,
-+ cam->vf_rotation,
-+ cam->vf_bufs[0],
-+ cam->vf_bufs[1],
-+ 0, 0, 0);
-+ if (err != 0) {
-+ printk(KERN_ERR "Error MEM_ROT_VF_MEM input buffer\n");
-+ goto out_2;
-+ }
-+
-+ if (cam->vf_rotation >= IPU_ROTATE_90_RIGHT) {
-+ err = ipu_init_channel_buffer(cam->ipu, MEM_ROT_VF_MEM,
++ if (cam->vf_rotation >= IPU_ROTATE_VERT_FLIP) {
++ err = ipu_init_channel_buffer(cam->ipu, CSI_PRP_VF_MEM,
+ IPU_OUTPUT_BUFFER,
-+ format,
++ vf_out_format,
++ vf.csi_prp_vf_mem.out_width,
+ vf.csi_prp_vf_mem.out_height,
+ vf.csi_prp_vf_mem.out_width,
-+ cam->overlay_fb->var.xres * bpp,
+ IPU_ROTATE_NONE,
-+ offset, 0, 0, 0, 0);
++ cam->vf_bufs[0], cam->vf_bufs[1],
++ 0, 0, 0);
++ if (err != 0)
++ goto out_3;
+
++ err = ipu_init_channel(cam->ipu, MEM_ROT_VF_MEM, NULL);
+ if (err != 0) {
-+ printk(KERN_ERR "Error MEM_ROT_VF_MEM output buffer\n");
++ printk(KERN_ERR "Error MEM_ROT_VF_MEM channel\n");
++ goto out_3;
++ }
++
++ err = ipu_init_channel_buffer(cam->ipu, MEM_ROT_VF_MEM,
++ IPU_INPUT_BUFFER,
++ vf_out_format,
++ vf.csi_prp_vf_mem.out_width,
++ vf.csi_prp_vf_mem.out_height,
++ vf.csi_prp_vf_mem.out_width,
++ cam->vf_rotation,
++ cam->vf_bufs[0],
++ cam->vf_bufs[1],
++ 0, 0, 0);
++ if (err != 0) {
++ printk(KERN_ERR "Error MEM_ROT_VF_MEM input buffer\n");
+ goto out_2;
+ }
-+ } else {
++
++ if (cam->vf_rotation < IPU_ROTATE_90_RIGHT) {
++ temp = vf.csi_prp_vf_mem.out_width;
++ vf.csi_prp_vf_mem.out_width =
++ vf.csi_prp_vf_mem.out_height;
++ vf.csi_prp_vf_mem.out_height = temp;
++ }
++
+ err = ipu_init_channel_buffer(cam->ipu, MEM_ROT_VF_MEM,
+ IPU_OUTPUT_BUFFER,
-+ format,
++ vf_out_format,
++ vf.csi_prp_vf_mem.out_height,
+ vf.csi_prp_vf_mem.out_width,
+ vf.csi_prp_vf_mem.out_height,
-+ cam->overlay_fb->var.xres * bpp,
+ IPU_ROTATE_NONE,
-+ offset, 0, 0, 0, 0);
++ fbi->fix.smem_start +
++ (fbi->fix.line_length *
++ fbi->var.yres),
++ fbi->fix.smem_start, 0, 0, 0);
++
+ if (err != 0) {
+ printk(KERN_ERR "Error MEM_ROT_VF_MEM output buffer\n");
+ goto out_2;
+ }
-+ }
+
-+ ipu_clear_irq(cam->ipu, IPU_IRQ_PRP_VF_OUT_EOF);
-+ err = ipu_request_irq(cam->ipu, IPU_IRQ_PRP_VF_OUT_EOF,
-+ prpvf_vf_eof_callback,
++ ipu_clear_irq(cam->ipu, IPU_IRQ_PRP_VF_ROT_OUT_EOF);
++ err = ipu_request_irq(cam->ipu, IPU_IRQ_PRP_VF_ROT_OUT_EOF,
++ prpvf_rot_eof_callback,
+ 0, "Mxc Camera", cam);
-+ if (err != 0) {
-+ printk(KERN_ERR
-+ "Error registering IPU_IRQ_PRP_VF_OUT_EOF irq.\n");
-+ goto out_2;
-+ }
++ if (err < 0) {
++ printk(KERN_ERR "Error request irq:IPU_IRQ_PRP_VF_ROT_OUT_EOF\n");
++ goto out_2;
++ }
+
-+ ipu_clear_irq(disp_ipu, IPU_IRQ_BG_SF_END);
-+ err = ipu_request_irq(disp_ipu, IPU_IRQ_BG_SF_END,
-+ prpvf_sdc_vsync_callback,
++ err = ipu_link_channels(cam->ipu,
++ CSI_PRP_VF_MEM, MEM_ROT_VF_MEM);
++ if (err < 0) {
++ printk(KERN_ERR
++ "Error link CSI_PRP_VF_MEM-MEM_ROT_VF_MEM\n");
++ goto out_1;
++ }
++
++ ipu_enable_channel(cam->ipu, CSI_PRP_VF_MEM);
++ ipu_enable_channel(cam->ipu, MEM_ROT_VF_MEM);
++
++ ipu_select_buffer(cam->ipu, CSI_PRP_VF_MEM,
++ IPU_OUTPUT_BUFFER, 0);
++ ipu_select_buffer(cam->ipu, CSI_PRP_VF_MEM,
++ IPU_OUTPUT_BUFFER, 1);
++ ipu_select_buffer(cam->ipu, MEM_ROT_VF_MEM,
++ IPU_OUTPUT_BUFFER, 0);
++ } else {
++ err = ipu_init_channel_buffer(cam->ipu, CSI_PRP_VF_MEM,
++ IPU_OUTPUT_BUFFER,
++ vf_out_format, cam->win.w.width,
++ cam->win.w.height,
++ cam->win.w.width,
++ cam->vf_rotation,
++ fbi->fix.smem_start +
++ (fbi->fix.line_length *
++ fbi->var.yres),
++ fbi->fix.smem_start, 0, 0, 0);
++ if (err != 0) {
++ printk(KERN_ERR "Error initializing CSI_PRP_VF_MEM\n");
++ goto out_4;
++ }
++ ipu_clear_irq(cam->ipu, IPU_IRQ_PRP_VF_OUT_EOF);
++ err = ipu_request_irq(cam->ipu, IPU_IRQ_PRP_VF_OUT_EOF,
++ prpvf_rot_eof_callback,
+ 0, "Mxc Camera", cam);
-+ if (err != 0) {
-+ printk(KERN_ERR "Error registering IPU_IRQ_BG_SF_END irq.\n");
-+ goto out_1;
-+ }
++ if (err < 0) {
++ printk(KERN_ERR "Error request irq:IPU_IRQ_PRP_VF_OUT_EOF\n");
++ goto out_4;
++ }
+
-+ ipu_enable_channel(cam->ipu, CSI_PRP_VF_MEM);
-+ ipu_enable_channel(cam->ipu, MEM_ROT_VF_MEM);
++ ipu_enable_channel(cam->ipu, CSI_PRP_VF_MEM);
+
-+ buffer_num = 0;
-+ buffer_ready = 0;
-+ ipu_select_buffer(cam->ipu, CSI_PRP_VF_MEM, IPU_OUTPUT_BUFFER, 0);
++ ipu_select_buffer(cam->ipu, CSI_PRP_VF_MEM,
++ IPU_OUTPUT_BUFFER, 0);
++ }
+
+ cam->overlay_active = true;
+ return err;
@@ -77168,36 +77020,26 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_b
+out_1:
+ ipu_free_irq(cam->ipu, IPU_IRQ_PRP_VF_OUT_EOF, NULL);
+out_2:
-+ ipu_uninit_channel(cam->ipu, MEM_ROT_VF_MEM);
++ if (cam->vf_rotation >= IPU_ROTATE_VERT_FLIP)
++ ipu_uninit_channel(cam->ipu, MEM_ROT_VF_MEM);
+out_3:
-+ ipu_uninit_channel(cam->ipu, CSI_PRP_VF_MEM);
-+out_4:
+ if (cam->vf_bufs_vaddr[0]) {
+ dma_free_coherent(0, cam->vf_bufs_size[0],
-+ cam->vf_bufs_vaddr[0], cam->vf_bufs[0]);
++ cam->vf_bufs_vaddr[0],
++ (dma_addr_t) cam->vf_bufs[0]);
+ cam->vf_bufs_vaddr[0] = NULL;
+ cam->vf_bufs[0] = 0;
+ }
+ if (cam->vf_bufs_vaddr[1]) {
+ dma_free_coherent(0, cam->vf_bufs_size[1],
-+ cam->vf_bufs_vaddr[1], cam->vf_bufs[1]);
++ cam->vf_bufs_vaddr[1],
++ (dma_addr_t) cam->vf_bufs[1]);
+ cam->vf_bufs_vaddr[1] = NULL;
+ cam->vf_bufs[1] = 0;
+ }
-+ if (cam->rot_vf_bufs_vaddr[0]) {
-+ dma_free_coherent(0, cam->rot_vf_buf_size[0],
-+ cam->rot_vf_bufs_vaddr[0],
-+ cam->rot_vf_bufs[0]);
-+ cam->rot_vf_bufs_vaddr[0] = NULL;
-+ cam->rot_vf_bufs[0] = 0;
-+ }
-+ if (cam->rot_vf_bufs_vaddr[1]) {
-+ dma_free_coherent(0, cam->rot_vf_buf_size[1],
-+ cam->rot_vf_bufs_vaddr[1],
-+ cam->rot_vf_bufs[1]);
-+ cam->rot_vf_bufs_vaddr[1] = NULL;
-+ cam->rot_vf_bufs[1] = 0;
-+ }
++out_4:
++ ipu_uninit_channel(cam->ipu, CSI_PRP_VF_MEM);
++out_5:
+ return err;
+}
+
@@ -77210,6 +77052,9 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_b
+static int prpvf_stop(void *private)
+{
+ cam_data *cam = (cam_data *) private;
++ int err = 0, i = 0;
++ struct fb_info *fbi = NULL;
++ struct fb_var_screeninfo fbvar;
+#ifdef CONFIG_MXC_MIPI_CSI2
+ void *mipi_csi2_info;
+ int ipu_id;
@@ -77219,12 +77064,44 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_b
+ if (cam->overlay_active == false)
+ return 0;
+
-+ ipu_free_irq(disp_ipu, IPU_IRQ_BG_SF_END, cam);
++ for (i = 0; i < num_registered_fb; i++) {
++ char *idstr = registered_fb[i]->fix.id;
++ if (((strcmp(idstr, "DISP3 FG") == 0) && (cam->output < 3)) ||
++ ((strcmp(idstr, "DISP4 FG") == 0) && (cam->output >= 3))) {
++ fbi = registered_fb[i];
++ break;
++ }
++ }
++
++ if (fbi == NULL) {
++ printk(KERN_ERR "DISP FG fb not found\n");
++ return -EPERM;
++ }
++
++ if (cam->vf_rotation >= IPU_ROTATE_VERT_FLIP) {
++ ipu_unlink_channels(cam->ipu, CSI_PRP_VF_MEM, MEM_ROT_VF_MEM);
++ ipu_free_irq(cam->ipu, IPU_IRQ_PRP_VF_ROT_OUT_EOF, cam);
++ }
++ buffer_num = 0;
+
+ ipu_disable_channel(cam->ipu, CSI_PRP_VF_MEM, true);
-+ ipu_disable_channel(cam->ipu, MEM_ROT_VF_MEM, true);
++
++ if (cam->vf_rotation >= IPU_ROTATE_VERT_FLIP) {
++ ipu_disable_channel(cam->ipu, MEM_ROT_VF_MEM, true);
++ ipu_uninit_channel(cam->ipu, MEM_ROT_VF_MEM);
++ }
+ ipu_uninit_channel(cam->ipu, CSI_PRP_VF_MEM);
-+ ipu_uninit_channel(cam->ipu, MEM_ROT_VF_MEM);
++
++ console_lock();
++ fb_blank(fbi, FB_BLANK_POWERDOWN);
++ console_unlock();
++
++ /* Set the overlay frame buffer std to what it is used to be */
++ fbvar = fbi->var;
++ fbvar.accel_flags = FB_ACCEL_TRIPLE_FLAG;
++ fbvar.nonstd = cam->fb_origin_std;
++ fbvar.activate |= FB_ACTIVATE_FORCE;
++ fb_set_var(fbi, &fbvar);
+
+#ifdef CONFIG_MXC_MIPI_CSI2
+ mipi_csi2_info = mipi_csi2_get_info();
@@ -77243,35 +77120,21 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_b
+
+ if (cam->vf_bufs_vaddr[0]) {
+ dma_free_coherent(0, cam->vf_bufs_size[0],
-+ cam->vf_bufs_vaddr[0], cam->vf_bufs[0]);
++ cam->vf_bufs_vaddr[0],
++ (dma_addr_t) cam->vf_bufs[0]);
+ cam->vf_bufs_vaddr[0] = NULL;
+ cam->vf_bufs[0] = 0;
+ }
+ if (cam->vf_bufs_vaddr[1]) {
+ dma_free_coherent(0, cam->vf_bufs_size[1],
-+ cam->vf_bufs_vaddr[1], cam->vf_bufs[1]);
++ cam->vf_bufs_vaddr[1],
++ (dma_addr_t) cam->vf_bufs[1]);
+ cam->vf_bufs_vaddr[1] = NULL;
+ cam->vf_bufs[1] = 0;
+ }
-+ if (cam->rot_vf_bufs_vaddr[0]) {
-+ dma_free_coherent(0, cam->rot_vf_buf_size[0],
-+ cam->rot_vf_bufs_vaddr[0],
-+ cam->rot_vf_bufs[0]);
-+ cam->rot_vf_bufs_vaddr[0] = NULL;
-+ cam->rot_vf_bufs[0] = 0;
-+ }
-+ if (cam->rot_vf_bufs_vaddr[1]) {
-+ dma_free_coherent(0, cam->rot_vf_buf_size[1],
-+ cam->rot_vf_bufs_vaddr[1],
-+ cam->rot_vf_bufs[1]);
-+ cam->rot_vf_bufs_vaddr[1] = NULL;
-+ cam->rot_vf_bufs[1] = 0;
-+ }
+
-+ buffer_num = 0;
-+ buffer_ready = 0;
+ cam->overlay_active = false;
-+ return 0;
++ return err;
+}
+
+/*!
@@ -77300,7 +77163,8 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_b
+ /* free csi eof irq firstly.
+ * when disable csi, wait for idmac eof.
+ * it requests eof irq again */
-+ ipu_free_irq(cam->ipu, IPU_IRQ_PRP_VF_OUT_EOF, cam);
++ if (cam->vf_rotation < IPU_ROTATE_VERT_FLIP)
++ ipu_free_irq(cam->ipu, IPU_IRQ_PRP_VF_OUT_EOF, cam);
+
+ return ipu_disable_csi(cam->ipu, cam->csi);
+}
@@ -77312,34 +77176,37 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_b
+ *
+ * @return status
+ */
-+int prp_vf_sdc_select_bg(void *private)
++int prp_vf_sdc_select(void *private)
+{
-+ cam_data *cam = (cam_data *) private;
-+
-+ if (cam) {
++ cam_data *cam;
++ int err = 0;
++ if (private) {
++ cam = (cam_data *) private;
+ cam->vf_start_sdc = prpvf_start;
+ cam->vf_stop_sdc = prpvf_stop;
+ cam->vf_enable_csi = prp_vf_enable_csi;
+ cam->vf_disable_csi = prp_vf_disable_csi;
+ cam->overlay_active = false;
-+ }
++ } else
++ err = -EIO;
+
-+ return 0;
++ return err;
+}
-+EXPORT_SYMBOL(prp_vf_sdc_select_bg);
++EXPORT_SYMBOL(prp_vf_sdc_select);
+
+/*!
+ * function to de-select PRP-VF as the working path
+ *
+ * @param private cam_data * mxc v4l2 main structure
+ *
-+ * @return status
++ * @return int
+ */
-+int prp_vf_sdc_deselect_bg(void *private)
++int prp_vf_sdc_deselect(void *private)
+{
-+ cam_data *cam = (cam_data *) private;
++ cam_data *cam;
+
-+ if (cam) {
++ if (private) {
++ cam = (cam_data *) private;
+ cam->vf_start_sdc = NULL;
+ cam->vf_stop_sdc = NULL;
+ cam->vf_enable_csi = NULL;
@@ -77347,14 +77214,14 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_b
+ }
+ return 0;
+}
-+EXPORT_SYMBOL(prp_vf_sdc_deselect_bg);
++EXPORT_SYMBOL(prp_vf_sdc_deselect);
+
+/*!
+ * Init viewfinder task.
+ *
+ * @return Error code indicating success or failure
+ */
-+__init int prp_vf_sdc_init_bg(void)
++__init int prp_vf_sdc_init(void)
+{
+ return 0;
+}
@@ -77364,19 +77231,19 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_prp_vf_sdc_b
+ *
+ * @return Error code indicating success or failure
+ */
-+void __exit prp_vf_sdc_exit_bg(void)
++void __exit prp_vf_sdc_exit(void)
+{
+}
+
-+module_init(prp_vf_sdc_init_bg);
-+module_exit(prp_vf_sdc_exit_bg);
++module_init(prp_vf_sdc_init);
++module_exit(prp_vf_sdc_exit);
+
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
-+MODULE_DESCRIPTION("IPU PRP VF SDC Backgroud Driver");
++MODULE_DESCRIPTION("IPU PRP VF SDC Driver");
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_still.c linux-3.14.54/drivers/media/platform/mxc/capture/ipu_still.c
--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_still.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/ipu_still.c 2015-10-12 10:56:18.013351164 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/capture/ipu_still.c 2015-10-15 15:51:25.064667679 +0200
@@ -0,0 +1,268 @@
+/*
+ * Copyright 2004-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -77646,9 +77513,124 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ipu_still.c linu
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
+MODULE_DESCRIPTION("IPU PRP STILL IMAGE Driver");
+MODULE_LICENSE("GPL");
+diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/Kconfig linux-3.14.54/drivers/media/platform/mxc/capture/Kconfig
+--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/Kconfig 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/media/platform/mxc/capture/Kconfig 2015-10-15 15:51:25.064667679 +0200
+@@ -0,0 +1,86 @@
++if VIDEO_MXC_CAPTURE
++
++menu "MXC Camera/V4L2 PRP Features support"
++config VIDEO_MXC_IPU_CAMERA
++ bool
++ depends on VIDEO_MXC_CAPTURE && MXC_IPU
++ default y
++
++config VIDEO_MXC_CSI_CAMERA
++ tristate "CSI camera support"
++ depends on VIDEO_MXC_CAPTURE && VIDEO_V4L2
++ ---help---
++ This is the video4linux2 capture driver based on CSI module.
++
++config MXC_CAMERA_OV5640
++ tristate "OmniVision ov5640 camera support"
++ depends on !VIDEO_MXC_EMMA_CAMERA && I2C
++ ---help---
++ If you plan to use the ov5640 Camera with your MXC system, say Y here.
++
++config MXC_CAMERA_OV5642
++ tristate "OmniVision ov5642 camera support"
++ depends on !VIDEO_MXC_EMMA_CAMERA && I2C
++ ---help---
++ If you plan to use the ov5642 Camera with your MXC system, say Y here.
++
++config MXC_CAMERA_OV5640_MIPI
++ tristate "OmniVision ov5640 camera support using mipi"
++ depends on !VIDEO_MXC_EMMA_CAMERA && I2C
++ ---help---
++ If you plan to use the ov5640 Camera with mipi interface in your MXC system, say Y here.
++
++config MXC_TVIN_ADV7180
++ tristate "Analog Device adv7180 TV Decoder Input support"
++ depends on !VIDEO_MXC_EMMA_CAMERA && I2C
++ ---help---
++ If you plan to use the adv7180 video decoder with your MXC system, say Y here.
++
++choice
++ prompt "Select Overlay Rounting"
++ default MXC_IPU_DEVICE_QUEUE_SDC
++ depends on VIDEO_MXC_IPU_CAMERA && FB_MXC_SYNC_PANEL
++
++config MXC_IPU_DEVICE_QUEUE_SDC
++ tristate "Queue ipu device for overlay library"
++ depends on VIDEO_MXC_IPU_CAMERA
++ ---help---
++ Use case CSI->MEM->IPU DEVICE->SDC:
++ Images from sensor will be frist recieved in memory,then
++ queue to ipu device for processing if needed, and displaying
++ it on synchronous display with SDC use case.
++
++config MXC_IPU_PRP_VF_SDC
++ bool "Pre-Processor VF SDC library"
++ depends on VIDEO_MXC_IPU_CAMERA
++ ---help---
++ Use case PRP_VF_SDC:
++ Preprocessing image from smart sensor for viewfinder and
++ displaying it on synchronous display with SDC use case.
++ If SDC BG is selected, Rotation will not be supported.
++ CSI -> IC (PRP VF) -> MEM
++ MEM -> IC (ROT) -> MEM
++ MEM -> SDC (FG/BG)
++
++endchoice
++
++config MXC_IPU_PRP_ENC
++ tristate "Pre-processor Encoder library"
++ depends on VIDEO_MXC_IPU_CAMERA
++ default y
++ ---help---
++ Use case PRP_ENC:
++ Preprocessing image from smart sensor for encoder.
++ CSI -> IC (PRP ENC) -> MEM
++
++config MXC_IPU_CSI_ENC
++ tristate "IPU CSI Encoder library"
++ depends on VIDEO_MXC_IPU_CAMERA
++ default y
++ ---help---
++ Use case IPU_CSI_ENC:
++ Get raw image with CSI from smart sensor for encoder.
++ CSI -> MEM
++endmenu
++
++endif
+diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/Makefile linux-3.14.54/drivers/media/platform/mxc/capture/Makefile
+--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/Makefile 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/media/platform/mxc/capture/Makefile 2015-10-15 15:51:25.064667679 +0200
+@@ -0,0 +1,21 @@
++obj-$(CONFIG_VIDEO_MXC_CSI_CAMERA) += fsl_csi.o csi_v4l2_capture.o
++
++ifeq ($(CONFIG_VIDEO_MXC_IPU_CAMERA),y)
++ obj-$(CONFIG_VIDEO_MXC_CAPTURE) += mxc_v4l2_capture.o
++ obj-$(CONFIG_MXC_IPU_PRP_VF_SDC) += ipu_prp_vf_sdc.o ipu_prp_vf_sdc_bg.o
++ obj-$(CONFIG_MXC_IPU_DEVICE_QUEUE_SDC) += ipu_fg_overlay_sdc.o ipu_bg_overlay_sdc.o
++ obj-$(CONFIG_MXC_IPU_PRP_ENC) += ipu_prp_enc.o ipu_still.o
++ obj-$(CONFIG_MXC_IPU_CSI_ENC) += ipu_csi_enc.o ipu_still.o
++endif
++
++ov5640_camera-objs := ov5640.o
++obj-$(CONFIG_MXC_CAMERA_OV5640) += ov5640_camera.o
++
++ov5642_camera-objs := ov5642.o
++obj-$(CONFIG_MXC_CAMERA_OV5642) += ov5642_camera.o
++
++ov5640_camera_mipi-objs := ov5640_mipi.o
++obj-$(CONFIG_MXC_CAMERA_OV5640_MIPI) += ov5640_camera_mipi.o
++
++adv7180_tvin-objs := adv7180.o
++obj-$(CONFIG_MXC_TVIN_ADV7180) += adv7180_tvin.o
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/mxc_v4l2_capture.c linux-3.14.54/drivers/media/platform/mxc/capture/mxc_v4l2_capture.c
--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/mxc_v4l2_capture.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/mxc_v4l2_capture.c 2015-10-12 10:56:18.014351164 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/capture/mxc_v4l2_capture.c 2015-10-15 15:51:25.068667415 +0200
@@ -0,0 +1,3102 @@
+/*
+ * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -80754,7 +80736,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/mxc_v4l2_capture
+MODULE_SUPPORTED_DEVICE("video");
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/mxc_v4l2_capture.h linux-3.14.54/drivers/media/platform/mxc/capture/mxc_v4l2_capture.h
--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/mxc_v4l2_capture.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/mxc_v4l2_capture.h 2015-10-12 10:56:18.015351163 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/capture/mxc_v4l2_capture.h 2015-10-15 15:51:25.068667415 +0200
@@ -0,0 +1,260 @@
+/*
+ * Copyright 2004-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -81018,7 +81000,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/mxc_v4l2_capture
+#endif /* __MXC_V4L2_CAPTURE_H__ */
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ov5640.c linux-3.14.54/drivers/media/platform/mxc/capture/ov5640.c
--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/ov5640.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/ov5640.c 2015-10-12 10:56:18.015351163 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/capture/ov5640.c 2015-10-15 15:51:25.068667415 +0200
@@ -0,0 +1,1951 @@
+/*
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -82973,7 +82955,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ov5640.c linux-3
+MODULE_ALIAS("CSI");
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ov5640_mipi.c linux-3.14.54/drivers/media/platform/mxc/capture/ov5640_mipi.c
--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/ov5640_mipi.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/ov5640_mipi.c 2015-10-12 10:56:18.016351163 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/capture/ov5640_mipi.c 2015-10-15 15:51:25.068667415 +0200
@@ -0,0 +1,2104 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -85081,7 +85063,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ov5640_mipi.c li
+MODULE_ALIAS("CSI");
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ov5642.c linux-3.14.54/drivers/media/platform/mxc/capture/ov5642.c
--- linux-3.14.54.orig/drivers/media/platform/mxc/capture/ov5642.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/capture/ov5642.c 2015-10-12 10:56:18.019351163 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/capture/ov5642.c 2015-10-15 15:51:25.072667152 +0200
@@ -0,0 +1,4252 @@
+/*
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -89337,7 +89319,7 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/capture/ov5642.c linux-3
+MODULE_ALIAS("CSI");
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/output/Kconfig linux-3.14.54/drivers/media/platform/mxc/output/Kconfig
--- linux-3.14.54.orig/drivers/media/platform/mxc/output/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/output/Kconfig 2015-10-12 10:56:18.020351163 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/output/Kconfig 2015-10-15 15:51:25.072667152 +0200
@@ -0,0 +1,5 @@
+config VIDEO_MXC_IPU_OUTPUT
+ tristate "IPU v4l2 output support"
@@ -89346,12 +89328,12 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/output/Kconfig linux-3.1
+ This is the video4linux2 driver for IPU post processing video output.
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/output/Makefile linux-3.14.54/drivers/media/platform/mxc/output/Makefile
--- linux-3.14.54.orig/drivers/media/platform/mxc/output/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/output/Makefile 2015-10-12 10:56:18.020351163 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/output/Makefile 2015-10-15 15:51:25.072667152 +0200
@@ -0,0 +1 @@
+obj-$(CONFIG_VIDEO_MXC_IPU_OUTPUT) += mxc_vout.o
diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/output/mxc_vout.c linux-3.14.54/drivers/media/platform/mxc/output/mxc_vout.c
--- linux-3.14.54.orig/drivers/media/platform/mxc/output/mxc_vout.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/media/platform/mxc/output/mxc_vout.c 2015-10-12 10:56:18.020351163 +0200
++++ linux-3.14.54/drivers/media/platform/mxc/output/mxc_vout.c 2015-10-15 15:51:25.124663730 +0200
@@ -0,0 +1,2265 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -91618,21 +91600,9 @@ diff -Nur linux-3.14.54.orig/drivers/media/platform/mxc/output/mxc_vout.c linux-
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
+MODULE_DESCRIPTION("V4L2-driver for MXC video output");
+MODULE_LICENSE("GPL");
-diff -Nur linux-3.14.54.orig/drivers/media/v4l2-core/videobuf-dma-contig.c linux-3.14.54/drivers/media/v4l2-core/videobuf-dma-contig.c
---- linux-3.14.54.orig/drivers/media/v4l2-core/videobuf-dma-contig.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/media/v4l2-core/videobuf-dma-contig.c 2015-10-12 10:56:18.021351163 +0200
-@@ -304,7 +304,7 @@
-
- /* Try to remap memory */
- size = vma->vm_end - vma->vm_start;
-- vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
-+ vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
- retval = vm_iomap_memory(vma, vma->vm_start, size);
- if (retval) {
- dev_err(q->dev, "mmap: remap failed with error %d. ",
diff -Nur linux-3.14.54.orig/drivers/media/v4l2-core/videobuf2-dma-contig.c linux-3.14.54/drivers/media/v4l2-core/videobuf2-dma-contig.c
--- linux-3.14.54.orig/drivers/media/v4l2-core/videobuf2-dma-contig.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/media/v4l2-core/videobuf2-dma-contig.c 2015-10-12 10:56:18.021351163 +0200
++++ linux-3.14.54/drivers/media/v4l2-core/videobuf2-dma-contig.c 2015-10-15 15:51:25.128663468 +0200
@@ -719,7 +719,7 @@
/* get the associated scatterlist for this buffer */
@@ -91642,40 +91612,21 @@ diff -Nur linux-3.14.54.orig/drivers/media/v4l2-core/videobuf2-dma-contig.c linu
pr_err("Error getting dmabuf scatterlist\n");
return -EINVAL;
}
-diff -Nur linux-3.14.54.orig/drivers/mfd/Kconfig linux-3.14.54/drivers/mfd/Kconfig
---- linux-3.14.54.orig/drivers/mfd/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mfd/Kconfig 2015-10-12 10:56:18.023351163 +0200
-@@ -163,6 +163,14 @@
- Additional drivers must be enabled in order to use the functionality
- of the device.
+diff -Nur linux-3.14.54.orig/drivers/media/v4l2-core/videobuf-dma-contig.c linux-3.14.54/drivers/media/v4l2-core/videobuf-dma-contig.c
+--- linux-3.14.54.orig/drivers/media/v4l2-core/videobuf-dma-contig.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/media/v4l2-core/videobuf-dma-contig.c 2015-10-15 15:51:25.128663468 +0200
+@@ -304,7 +304,7 @@
-+config MFD_MXC_HDMI
-+ tristate "Freescale HDMI Core"
-+ select MFD_CORE
-+ help
-+ This is the core driver for the Freescale i.MX6 on-chip HDMI.
-+ This MFD driver connects with the video and audio drivers for HDMI.
-+
-+
- config MFD_MC13XXX
- tristate
- depends on (SPI_MASTER || I2C)
-@@ -1226,3 +1234,4 @@
- help
- Platform configuration infrastructure for the ARM Ltd.
- Versatile Express.
-+
-diff -Nur linux-3.14.54.orig/drivers/mfd/Makefile linux-3.14.54/drivers/mfd/Makefile
---- linux-3.14.54.orig/drivers/mfd/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mfd/Makefile 2015-10-12 10:56:18.024351163 +0200
-@@ -166,3 +166,4 @@
- obj-$(CONFIG_MFD_AS3711) += as3711.o
- obj-$(CONFIG_MFD_AS3722) += as3722.o
- obj-$(CONFIG_MFD_STW481X) += stw481x.o
-+obj-$(CONFIG_MFD_MXC_HDMI) += mxc-hdmi-core.o
+ /* Try to remap memory */
+ size = vma->vm_end - vma->vm_start;
+- vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
++ vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
+ retval = vm_iomap_memory(vma, vma->vm_start, size);
+ if (retval) {
+ dev_err(q->dev, "mmap: remap failed with error %d. ",
diff -Nur linux-3.14.54.orig/drivers/mfd/ab8500-core.c linux-3.14.54/drivers/mfd/ab8500-core.c
--- linux-3.14.54.orig/drivers/mfd/ab8500-core.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mfd/ab8500-core.c 2015-10-12 10:56:18.022351163 +0200
++++ linux-3.14.54/drivers/mfd/ab8500-core.c 2015-10-15 15:51:25.128663468 +0200
@@ -592,7 +592,7 @@
/* If ->irq_base is zero this will give a linear mapping */
@@ -91763,7 +91714,7 @@ diff -Nur linux-3.14.54.orig/drivers/mfd/ab8500-core.c linux-3.14.54/drivers/mfd
}
diff -Nur linux-3.14.54.orig/drivers/mfd/db8500-prcmu.c linux-3.14.54/drivers/mfd/db8500-prcmu.c
--- linux-3.14.54.orig/drivers/mfd/db8500-prcmu.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mfd/db8500-prcmu.c 2015-10-12 10:56:18.023351163 +0200
++++ linux-3.14.54/drivers/mfd/db8500-prcmu.c 2015-10-15 15:51:25.132663204 +0200
@@ -25,6 +25,7 @@
#include <linux/bitops.h>
#include <linux/fs.h>
@@ -91845,9 +91796,40 @@ diff -Nur linux-3.14.54.orig/drivers/mfd/db8500-prcmu.c linux-3.14.54/drivers/mf
if (err) {
mfd_remove_devices(&pdev->dev);
pr_err("prcmu: Failed to add ab8500 subdevice\n");
+diff -Nur linux-3.14.54.orig/drivers/mfd/Kconfig linux-3.14.54/drivers/mfd/Kconfig
+--- linux-3.14.54.orig/drivers/mfd/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mfd/Kconfig 2015-10-15 15:51:25.132663204 +0200
+@@ -163,6 +163,14 @@
+ Additional drivers must be enabled in order to use the functionality
+ of the device.
+
++config MFD_MXC_HDMI
++ tristate "Freescale HDMI Core"
++ select MFD_CORE
++ help
++ This is the core driver for the Freescale i.MX6 on-chip HDMI.
++ This MFD driver connects with the video and audio drivers for HDMI.
++
++
+ config MFD_MC13XXX
+ tristate
+ depends on (SPI_MASTER || I2C)
+@@ -1226,3 +1234,4 @@
+ help
+ Platform configuration infrastructure for the ARM Ltd.
+ Versatile Express.
++
+diff -Nur linux-3.14.54.orig/drivers/mfd/Makefile linux-3.14.54/drivers/mfd/Makefile
+--- linux-3.14.54.orig/drivers/mfd/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mfd/Makefile 2015-10-15 15:51:25.132663204 +0200
+@@ -166,3 +166,4 @@
+ obj-$(CONFIG_MFD_AS3711) += as3711.o
+ obj-$(CONFIG_MFD_AS3722) += as3722.o
+ obj-$(CONFIG_MFD_STW481X) += stw481x.o
++obj-$(CONFIG_MFD_MXC_HDMI) += mxc-hdmi-core.o
diff -Nur linux-3.14.54.orig/drivers/mfd/mxc-hdmi-core.c linux-3.14.54/drivers/mfd/mxc-hdmi-core.c
--- linux-3.14.54.orig/drivers/mfd/mxc-hdmi-core.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mfd/mxc-hdmi-core.c 2015-10-12 10:56:18.025351163 +0200
++++ linux-3.14.54/drivers/mfd/mxc-hdmi-core.c 2015-10-15 15:51:25.156661625 +0200
@@ -0,0 +1,798 @@
+/*
+ * Copyright (C) 2011-2014 Freescale Semiconductor, Inc.
@@ -92649,7 +92631,7 @@ diff -Nur linux-3.14.54.orig/drivers/mfd/mxc-hdmi-core.c linux-3.14.54/drivers/m
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/mfd/si476x-cmd.c linux-3.14.54/drivers/mfd/si476x-cmd.c
--- linux-3.14.54.orig/drivers/mfd/si476x-cmd.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mfd/si476x-cmd.c 2015-10-12 10:56:18.025351163 +0200
++++ linux-3.14.54/drivers/mfd/si476x-cmd.c 2015-10-15 15:51:25.156661625 +0200
@@ -303,13 +303,13 @@
* possible racing conditions when working in polling mode */
atomic_set(&core->cts, 0);
@@ -92673,7 +92655,7 @@ diff -Nur linux-3.14.54.orig/drivers/mfd/si476x-cmd.c linux-3.14.54/drivers/mfd/
When working in polling mode, for some reason the tuner will
diff -Nur linux-3.14.54.orig/drivers/mfd/si476x-i2c.c linux-3.14.54/drivers/mfd/si476x-i2c.c
--- linux-3.14.54.orig/drivers/mfd/si476x-i2c.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mfd/si476x-i2c.c 2015-10-12 10:56:18.025351163 +0200
++++ linux-3.14.54/drivers/mfd/si476x-i2c.c 2015-10-15 15:51:25.156661625 +0200
@@ -303,7 +303,7 @@
*/
udelay(100);
@@ -92723,7 +92705,7 @@ diff -Nur linux-3.14.54.orig/drivers/mfd/si476x-i2c.c linux-3.14.54/drivers/mfd/
rval = -ENODEV;
diff -Nur linux-3.14.54.orig/drivers/mfd/si476x-prop.c linux-3.14.54/drivers/mfd/si476x-prop.c
--- linux-3.14.54.orig/drivers/mfd/si476x-prop.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mfd/si476x-prop.c 2015-10-12 10:56:18.026351163 +0200
++++ linux-3.14.54/drivers/mfd/si476x-prop.c 2015-10-15 15:51:25.160661361 +0200
@@ -217,15 +217,36 @@
return 0;
}
@@ -92763,7 +92745,7 @@ diff -Nur linux-3.14.54.orig/drivers/mfd/si476x-prop.c linux-3.14.54/drivers/mfd
.reg_write = si476x_core_regmap_write,
diff -Nur linux-3.14.54.orig/drivers/misc/sram.c linux-3.14.54/drivers/misc/sram.c
--- linux-3.14.54.orig/drivers/misc/sram.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/misc/sram.c 2015-10-12 10:56:18.026351163 +0200
++++ linux-3.14.54/drivers/misc/sram.c 2015-10-15 15:51:25.160661361 +0200
@@ -29,7 +29,7 @@
#include <linux/spinlock.h>
#include <linux/genalloc.h>
@@ -92775,7 +92757,7 @@ diff -Nur linux-3.14.54.orig/drivers/misc/sram.c linux-3.14.54/drivers/misc/sram
struct gen_pool *pool;
diff -Nur linux-3.14.54.orig/drivers/mmc/core/core.c linux-3.14.54/drivers/mmc/core/core.c
--- linux-3.14.54.orig/drivers/mmc/core/core.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/core/core.c 2015-10-12 10:56:18.027351163 +0200
++++ linux-3.14.54/drivers/mmc/core/core.c 2015-10-15 15:51:25.160661361 +0200
@@ -13,11 +13,13 @@
#include <linux/module.h>
#include <linux/init.h>
@@ -95611,7 +95593,7 @@ diff -Nur linux-3.14.54.orig/drivers/mmc/core/core.c.orig linux-3.14.54/drivers/
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/mmc/core/host.c linux-3.14.54/drivers/mmc/core/host.c
--- linux-3.14.54.orig/drivers/mmc/core/host.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/core/host.c 2015-10-12 10:56:18.027351163 +0200
++++ linux-3.14.54/drivers/mmc/core/host.c 2015-10-15 15:51:25.160661361 +0200
@@ -12,14 +12,18 @@
* MMC host class device management
*/
@@ -95711,7 +95693,7 @@ diff -Nur linux-3.14.54.orig/drivers/mmc/core/host.c linux-3.14.54/drivers/mmc/c
diff -Nur linux-3.14.54.orig/drivers/mmc/core/mmc.c linux-3.14.54/drivers/mmc/core/mmc.c
--- linux-3.14.54.orig/drivers/mmc/core/mmc.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/core/mmc.c 2015-10-12 10:56:18.028351162 +0200
++++ linux-3.14.54/drivers/mmc/core/mmc.c 2015-10-15 15:51:25.164661097 +0200
@@ -317,6 +317,11 @@
mmc_card_set_blockaddr(card);
}
@@ -96119,7 +96101,7 @@ diff -Nur linux-3.14.54.orig/drivers/mmc/core/mmc.c linux-3.14.54/drivers/mmc/co
diff -Nur linux-3.14.54.orig/drivers/mmc/core/sdio_irq.c linux-3.14.54/drivers/mmc/core/sdio_irq.c
--- linux-3.14.54.orig/drivers/mmc/core/sdio_irq.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/core/sdio_irq.c 2015-10-12 10:56:18.029351162 +0200
++++ linux-3.14.54/drivers/mmc/core/sdio_irq.c 2015-10-15 15:51:25.164661097 +0200
@@ -90,6 +90,15 @@
return ret;
}
@@ -96182,9 +96164,21 @@ diff -Nur linux-3.14.54.orig/drivers/mmc/core/sdio_irq.c linux-3.14.54/drivers/m
}
return 0;
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/dw_mmc.c linux-3.14.54/drivers/mmc/host/dw_mmc.c
+--- linux-3.14.54.orig/drivers/mmc/host/dw_mmc.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/dw_mmc.c 2015-10-15 15:51:25.164661097 +0200
+@@ -2147,6 +2147,8 @@
+ if (!mmc)
+ return -ENOMEM;
+
++ mmc_of_parse(mmc);
++
+ slot = mmc_priv(mmc);
+ slot->id = id;
+ slot->mmc = mmc;
diff -Nur linux-3.14.54.orig/drivers/mmc/host/Kconfig linux-3.14.54/drivers/mmc/host/Kconfig
--- linux-3.14.54.orig/drivers/mmc/host/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/Kconfig 2015-10-12 10:56:18.030351162 +0200
++++ linux-3.14.54/drivers/mmc/host/Kconfig 2015-10-15 15:51:25.168660834 +0200
@@ -25,8 +25,7 @@
If unsure, say N.
@@ -96380,21 +96374,9 @@ diff -Nur linux-3.14.54.orig/drivers/mmc/host/Kconfig linux-3.14.54/drivers/mmc/
help
This selects the BCM2835 SD/MMC controller. If you have a BCM2835
platform with SD or MMC devices, say Y or M here.
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/dw_mmc.c linux-3.14.54/drivers/mmc/host/dw_mmc.c
---- linux-3.14.54.orig/drivers/mmc/host/dw_mmc.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/dw_mmc.c 2015-10-12 10:56:18.029351162 +0200
-@@ -2147,6 +2147,8 @@
- if (!mmc)
- return -ENOMEM;
-
-+ mmc_of_parse(mmc);
-+
- slot = mmc_priv(mmc);
- slot->id = id;
- slot->mmc = mmc;
diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-acpi.c linux-3.14.54/drivers/mmc/host/sdhci-acpi.c
--- linux-3.14.54.orig/drivers/mmc/host/sdhci-acpi.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-acpi.c 2015-10-12 10:56:18.030351162 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-acpi.c 2015-10-15 15:51:25.168660834 +0200
@@ -101,11 +101,19 @@
}
@@ -96415,26 +96397,9 @@ diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-acpi.c linux-3.14.54/drivers
.hw_reset = sdhci_acpi_int_hw_reset,
};
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-bcm-kona.c linux-3.14.54/drivers/mmc/host/sdhci-bcm-kona.c
---- linux-3.14.54.orig/drivers/mmc/host/sdhci-bcm-kona.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-bcm-kona.c 2015-10-12 10:56:18.031351162 +0200
-@@ -205,9 +205,13 @@
- }
-
- static struct sdhci_ops sdhci_bcm_kona_ops = {
-+ .set_clock = sdhci_set_clock,
- .get_max_clock = sdhci_bcm_kona_get_max_clk,
- .get_timeout_clock = sdhci_bcm_kona_get_timeout_clock,
- .platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
-+ .set_bus_width = sdhci_set_bus_width,
-+ .reset = sdhci_reset,
-+ .set_uhs_signaling = sdhci_set_uhs_signaling,
- .card_event = sdhci_bcm_kona_card_event,
- };
-
diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-bcm2835.c linux-3.14.54/drivers/mmc/host/sdhci-bcm2835.c
--- linux-3.14.54.orig/drivers/mmc/host/sdhci-bcm2835.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-bcm2835.c 2015-10-12 10:56:18.031351162 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-bcm2835.c 2015-10-15 15:51:25.168660834 +0200
@@ -131,8 +131,12 @@
.read_l = bcm2835_sdhci_readl,
.read_w = bcm2835_sdhci_readw,
@@ -96448,1038 +96413,26 @@ diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-bcm2835.c linux-3.14.54/driv
};
static const struct sdhci_pltfm_data bcm2835_sdhci_pdata = {
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-cns3xxx.c linux-3.14.54/drivers/mmc/host/sdhci-cns3xxx.c
---- linux-3.14.54.orig/drivers/mmc/host/sdhci-cns3xxx.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-cns3xxx.c 2015-10-12 10:56:18.033351162 +0200
-@@ -30,13 +30,12 @@
- u16 clk;
- unsigned long timeout;
-
-- if (clock == host->clock)
-- return;
-+ host->mmc->actual_clock = 0;
-
- sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
-
- if (clock == 0)
-- goto out;
-+ return;
-
- while (host->max_clk / div > clock) {
- /*
-@@ -75,13 +74,14 @@
-
- clk |= SDHCI_CLOCK_CARD_EN;
- sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
--out:
-- host->clock = clock;
- }
-
- static const struct sdhci_ops sdhci_cns3xxx_ops = {
- .get_max_clock = sdhci_cns3xxx_get_max_clk,
- .set_clock = sdhci_cns3xxx_set_clock,
-+ .set_bus_width = sdhci_set_bus_width,
-+ .reset = sdhci_reset,
-+ .set_uhs_signaling = sdhci_set_uhs_signaling,
- };
-
- static const struct sdhci_pltfm_data sdhci_cns3xxx_pdata = {
-@@ -90,8 +90,7 @@
- SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
- SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
- SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
-- SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
-- SDHCI_QUIRK_NONSTANDARD_CLOCK,
-+ SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
- };
-
- static int sdhci_cns3xxx_probe(struct platform_device *pdev)
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-dove.c linux-3.14.54/drivers/mmc/host/sdhci-dove.c
---- linux-3.14.54.orig/drivers/mmc/host/sdhci-dove.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-dove.c 2015-10-12 10:56:18.033351162 +0200
-@@ -86,6 +86,10 @@
- static const struct sdhci_ops sdhci_dove_ops = {
- .read_w = sdhci_dove_readw,
- .read_l = sdhci_dove_readl,
-+ .set_clock = sdhci_set_clock,
-+ .set_bus_width = sdhci_set_bus_width,
-+ .reset = sdhci_reset,
-+ .set_uhs_signaling = sdhci_set_uhs_signaling,
- };
-
- static const struct sdhci_pltfm_data sdhci_dove_pdata = {
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-esdhc-imx.c linux-3.14.54/drivers/mmc/host/sdhci-esdhc-imx.c
---- linux-3.14.54.orig/drivers/mmc/host/sdhci-esdhc-imx.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-esdhc-imx.c 2015-10-12 10:56:18.034351162 +0200
-@@ -11,6 +11,7 @@
- * the Free Software Foundation; either version 2 of the License.
- */
-
-+#include <linux/busfreq-imx6.h>
- #include <linux/io.h>
- #include <linux/delay.h>
- #include <linux/err.h>
-@@ -114,6 +115,10 @@
- #define ESDHC_FLAG_STD_TUNING BIT(5)
- /* The IP has SDHCI_CAPABILITIES_1 register */
- #define ESDHC_FLAG_HAVE_CAP1 BIT(6)
-+/* The IP has errata ERR004536 */
-+#define ESDHC_FLAG_ERR004536 BIT(7)
-+/* need request bus freq during low power */
-+#define ESDHC_FLAG_BUSFREQ BIT(8)
-
- struct esdhc_soc_data {
- u32 flags;
-@@ -141,7 +146,8 @@
-
- static struct esdhc_soc_data usdhc_imx6sl_data = {
- .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING
-- | ESDHC_FLAG_HAVE_CAP1,
-+ | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_ERR004536
-+ | ESDHC_FLAG_BUSFREQ,
- };
-
- struct pltfm_imx_data {
-@@ -160,7 +166,6 @@
- MULTIBLK_IN_PROCESS, /* exact multiblock cmd in process */
- WAIT_FOR_INT, /* sent CMD12, waiting for response INT */
- } multiblock_status;
-- u32 uhs_mode;
- u32 is_ddr;
- };
-
-@@ -382,7 +387,6 @@
- if (val & ESDHC_MIX_CTRL_SMPCLK_SEL)
- ret |= SDHCI_CTRL_TUNED_CLK;
-
-- ret |= (imx_data->uhs_mode & SDHCI_CTRL_UHS_MASK);
- ret &= ~SDHCI_CTRL_PRESET_VAL_ENABLE;
-
- return ret;
-@@ -429,7 +433,6 @@
- else
- new_val &= ~ESDHC_VENDOR_SPEC_VSELECT;
- writel(new_val, host->ioaddr + ESDHC_VENDOR_SPEC);
-- imx_data->uhs_mode = val & SDHCI_CTRL_UHS_MASK;
- if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING) {
- new_val = readl(host->ioaddr + ESDHC_MIX_CTRL);
- if (val & SDHCI_CTRL_TUNED_CLK)
-@@ -600,12 +603,14 @@
- u32 temp, val;
-
- if (clock == 0) {
-+ host->mmc->actual_clock = 0;
-+
- if (esdhc_is_usdhc(imx_data)) {
- val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
- writel(val & ~ESDHC_VENDOR_SPEC_FRC_SDCLK_ON,
- host->ioaddr + ESDHC_VENDOR_SPEC);
- }
-- goto out;
-+ return;
- }
-
- if (esdhc_is_usdhc(imx_data) && !imx_data->is_ddr)
-@@ -645,8 +650,6 @@
- }
-
- mdelay(1);
--out:
-- host->clock = clock;
- }
-
- static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)
-@@ -668,7 +671,7 @@
- return -ENOSYS;
- }
-
--static int esdhc_pltfm_bus_width(struct sdhci_host *host, int width)
-+static void esdhc_pltfm_set_bus_width(struct sdhci_host *host, int width)
- {
- u32 ctrl;
-
-@@ -686,17 +689,56 @@
-
- esdhc_clrset_le(host, ESDHC_CTRL_BUSWIDTH_MASK, ctrl,
- SDHCI_HOST_CONTROL);
-+}
-
-- return 0;
-+static void esdhc_tuning_reset(struct sdhci_host *host, u32 rst_bits)
-+{
-+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
-+ struct pltfm_imx_data *imx_data = pltfm_host->priv;
-+ u32 timeout;
-+ u32 reg;
-+
-+ reg = readl(host->ioaddr + ESDHC_SYSTEM_CONTROL);
-+ reg |= rst_bits;
-+ writel(reg, host->ioaddr + ESDHC_SYSTEM_CONTROL);
-+
-+ /* Wait for max 100ms */
-+ timeout = 100;
-+
-+ /* hw clears the bit when it's done */
-+ while (readl(host->ioaddr + ESDHC_SYSTEM_CONTROL) & rst_bits) {
-+ if (timeout == 0) {
-+ dev_err(mmc_dev(host->mmc),
-+ "Reset never completes!\n");
-+ return;
-+ }
-+ timeout--;
-+ mdelay(1);
-+ }
-+
-+ /*
-+ * The RSTA, reset all, on usdhc will not clear following regs:
-+ * > SDHCI_MIX_CTRL
-+ * > SDHCI_TUNE_CTRL_STATUS
-+ *
-+ * Do it manually here.
-+ */
-+ if ((rst_bits & ESDHC_SYS_CTRL_RSTA) && is_imx6q_usdhc(imx_data)) {
-+ writel(0, host->ioaddr + ESDHC_MIX_CTRL);
-+ writel(0, host->ioaddr + ESDHC_TUNE_CTRL_STATUS);
-+ /* FIXME: delay for clear tuning status or some cards may not work */
-+ mdelay(1);
-+ }
- }
-
- static void esdhc_prepare_tuning(struct sdhci_host *host, u32 val)
- {
- u32 reg;
-
-- /* FIXME: delay a bit for card to be ready for next tuning due to errors */
-- mdelay(1);
-+ /* reset controller before tuning or it may fail on some cards */
-+ esdhc_tuning_reset(host, ESDHC_SYS_CTRL_RSTA);
-
-+ /* This is balanced by the runtime put in sdhci_tasklet_finish */
- pm_runtime_get_sync(host->mmc->parent);
- reg = readl(host->ioaddr + ESDHC_MIX_CTRL);
- reg |= ESDHC_MIX_CTRL_EXE_TUNE | ESDHC_MIX_CTRL_SMPCLK_SEL |
-@@ -713,13 +755,12 @@
- complete(&mrq->completion);
- }
-
--static int esdhc_send_tuning_cmd(struct sdhci_host *host, u32 opcode)
-+static int esdhc_send_tuning_cmd(struct sdhci_host *host, u32 opcode,
-+ struct scatterlist *sg)
- {
- struct mmc_command cmd = {0};
- struct mmc_request mrq = {NULL};
- struct mmc_data data = {0};
-- struct scatterlist sg;
-- char tuning_pattern[ESDHC_TUNING_BLOCK_PATTERN_LEN];
-
- cmd.opcode = opcode;
- cmd.arg = 0;
-@@ -728,11 +769,9 @@
- data.blksz = ESDHC_TUNING_BLOCK_PATTERN_LEN;
- data.blocks = 1;
- data.flags = MMC_DATA_READ;
-- data.sg = &sg;
-+ data.sg = sg;
- data.sg_len = 1;
-
-- sg_init_one(&sg, tuning_pattern, sizeof(tuning_pattern));
--
- mrq.cmd = &cmd;
- mrq.cmd->mrq = &mrq;
- mrq.data = &data;
-@@ -742,14 +781,12 @@
- mrq.done = esdhc_request_done;
- init_completion(&(mrq.completion));
-
-- disable_irq(host->irq);
-- spin_lock(&host->lock);
-+ spin_lock_irq(&host->lock);
- host->mrq = &mrq;
-
- sdhci_send_command(host, mrq.cmd);
-
-- spin_unlock(&host->lock);
-- enable_irq(host->irq);
-+ spin_unlock_irq(&host->lock);
-
- wait_for_completion(&mrq.completion);
-
-@@ -772,13 +809,21 @@
-
- static int esdhc_executing_tuning(struct sdhci_host *host, u32 opcode)
- {
-+ struct scatterlist sg;
-+ char *tuning_pattern;
- int min, max, avg, ret;
-
-+ tuning_pattern = kmalloc(ESDHC_TUNING_BLOCK_PATTERN_LEN, GFP_KERNEL);
-+ if (!tuning_pattern)
-+ return -ENOMEM;
-+
-+ sg_init_one(&sg, tuning_pattern, ESDHC_TUNING_BLOCK_PATTERN_LEN);
-+
- /* find the mininum delay first which can pass tuning */
- min = ESDHC_TUNE_CTRL_MIN;
- while (min < ESDHC_TUNE_CTRL_MAX) {
- esdhc_prepare_tuning(host, min);
-- if (!esdhc_send_tuning_cmd(host, opcode))
-+ if (!esdhc_send_tuning_cmd(host, opcode, &sg))
- break;
- min += ESDHC_TUNE_CTRL_STEP;
- }
-@@ -787,7 +832,7 @@
- max = min + ESDHC_TUNE_CTRL_STEP;
- while (max < ESDHC_TUNE_CTRL_MAX) {
- esdhc_prepare_tuning(host, max);
-- if (esdhc_send_tuning_cmd(host, opcode)) {
-+ if (esdhc_send_tuning_cmd(host, opcode, &sg)) {
- max -= ESDHC_TUNE_CTRL_STEP;
- break;
- }
-@@ -797,9 +842,11 @@
- /* use average delay to get the best timing */
- avg = (min + max) / 2;
- esdhc_prepare_tuning(host, avg);
-- ret = esdhc_send_tuning_cmd(host, opcode);
-+ ret = esdhc_send_tuning_cmd(host, opcode, &sg);
- esdhc_post_tuning(host);
-
-+ kfree(tuning_pattern);
-+
- dev_dbg(mmc_dev(host->mmc), "tunning %s at 0x%x ret %d\n",
- ret ? "failed" : "passed", avg, ret);
-
-@@ -837,28 +884,20 @@
- return pinctrl_select_state(imx_data->pinctrl, pinctrl);
- }
-
--static int esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
-+static void esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned timing)
- {
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct pltfm_imx_data *imx_data = pltfm_host->priv;
- struct esdhc_platform_data *boarddata = &imx_data->boarddata;
-
-- switch (uhs) {
-+ switch (timing) {
- case MMC_TIMING_UHS_SDR12:
-- imx_data->uhs_mode = SDHCI_CTRL_UHS_SDR12;
-- break;
- case MMC_TIMING_UHS_SDR25:
-- imx_data->uhs_mode = SDHCI_CTRL_UHS_SDR25;
-- break;
- case MMC_TIMING_UHS_SDR50:
-- imx_data->uhs_mode = SDHCI_CTRL_UHS_SDR50;
-- break;
- case MMC_TIMING_UHS_SDR104:
- case MMC_TIMING_MMC_HS200:
-- imx_data->uhs_mode = SDHCI_CTRL_UHS_SDR104;
- break;
- case MMC_TIMING_UHS_DDR50:
-- imx_data->uhs_mode = SDHCI_CTRL_UHS_DDR50;
- writel(readl(host->ioaddr + ESDHC_MIX_CTRL) |
- ESDHC_MIX_CTRL_DDREN,
- host->ioaddr + ESDHC_MIX_CTRL);
-@@ -875,7 +914,20 @@
- break;
- }
-
-- return esdhc_change_pinstate(host, uhs);
-+ esdhc_change_pinstate(host, timing);
-+}
-+
-+static void esdhc_reset(struct sdhci_host *host, u8 mask)
-+{
-+ sdhci_reset(host, mask);
-+
-+ sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
-+ sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
-+}
-+
-+static unsigned int esdhc_get_max_timeout_counter(struct sdhci_host *host)
-+{
-+ return 1 << 28;
- }
-
- static struct sdhci_ops sdhci_esdhc_ops = {
-@@ -888,8 +940,9 @@
- .get_max_clock = esdhc_pltfm_get_max_clock,
- .get_min_clock = esdhc_pltfm_get_min_clock,
- .get_ro = esdhc_pltfm_get_ro,
-- .platform_bus_width = esdhc_pltfm_bus_width,
-+ .set_bus_width = esdhc_pltfm_set_bus_width,
- .set_uhs_signaling = esdhc_set_uhs_signaling,
-+ .reset = esdhc_reset,
- };
-
- static const struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = {
-@@ -906,6 +959,7 @@
- struct esdhc_platform_data *boarddata)
- {
- struct device_node *np = pdev->dev.of_node;
-+ struct sdhci_host *host = platform_get_drvdata(pdev);
-
- if (!np)
- return -ENODEV;
-@@ -939,6 +993,12 @@
- if (of_property_read_u32(np, "fsl,delay-line", &boarddata->delay_line))
- boarddata->delay_line = 0;
-
-+ if (of_find_property(np, "keep-power-in-suspend", NULL))
-+ host->mmc->pm_caps |= MMC_PM_KEEP_POWER;
-+
-+ if (of_find_property(np, "enable-sdio-wakeup", NULL))
-+ host->mmc->pm_caps |= MMC_PM_WAKE_SDIO_IRQ;
-+
- return 0;
- }
- #else
-@@ -994,6 +1054,9 @@
- goto free_sdhci;
- }
-
-+ if (imx_data->socdata->flags & ESDHC_FLAG_BUSFREQ)
-+ request_bus_freq(BUS_FREQ_HIGH);
-+
- pltfm_host->clk = imx_data->clk_per;
- pltfm_host->clock = clk_get_rate(pltfm_host->clk);
- clk_prepare_enable(imx_data->clk_per);
-@@ -1027,8 +1090,17 @@
- */
- if (esdhc_is_usdhc(imx_data)) {
- writel(0x08100810, host->ioaddr + ESDHC_WTMK_LVL);
-- host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
-+ host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
-+ SDHCI_QUIRK2_NOSTD_TIMEOUT_COUNTER;
- host->mmc->caps |= MMC_CAP_1_8V_DDR;
-+
-+ /*
-+ * errata ESDHC_FLAG_ERR004536 fix for MX6Q TO1.2 and MX6DL
-+ * TO1.1, it's harmless for MX6SL
-+ */
-+ writel(readl(host->ioaddr + 0x6c) | BIT(7), host->ioaddr + 0x6c);
-+ sdhci_esdhc_ops.get_max_timeout_counter =
-+ esdhc_get_max_timeout_counter;
- }
-
- if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING)
-@@ -1040,6 +1112,9 @@
- ESDHC_STD_TUNING_EN | ESDHC_TUNING_START_TAP,
- host->ioaddr + ESDHC_TUNING_CTRL);
-
-+ if (imx_data->socdata->flags & ESDHC_FLAG_ERR004536)
-+ host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
-+
- boarddata = &imx_data->boarddata;
- if (sdhci_esdhc_imx_probe_dt(pdev, boarddata) < 0) {
- if (!host->mmc->parent->platform_data) {
-@@ -1116,6 +1191,10 @@
- host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
- }
-
-+ if (host->mmc->pm_caps & MMC_PM_KEEP_POWER &&
-+ host->mmc->pm_caps & MMC_PM_WAKE_SDIO_IRQ)
-+ device_init_wakeup(&pdev->dev, 1);
-+
- err = sdhci_add_host(host);
- if (err)
- goto disable_clk;
-@@ -1132,6 +1211,8 @@
- clk_disable_unprepare(imx_data->clk_per);
- clk_disable_unprepare(imx_data->clk_ipg);
- clk_disable_unprepare(imx_data->clk_ahb);
-+ if (imx_data->socdata->flags & ESDHC_FLAG_BUSFREQ)
-+ release_bus_freq(BUS_FREQ_HIGH);
- free_sdhci:
- sdhci_pltfm_free(pdev);
- return err;
-@@ -1170,10 +1251,15 @@
-
- ret = sdhci_runtime_suspend_host(host);
-
-- clk_disable_unprepare(imx_data->clk_per);
-- clk_disable_unprepare(imx_data->clk_ipg);
-+ if (!sdhci_sdio_irq_enabled(host)) {
-+ clk_disable_unprepare(imx_data->clk_per);
-+ clk_disable_unprepare(imx_data->clk_ipg);
-+ }
- clk_disable_unprepare(imx_data->clk_ahb);
-
-+ if (imx_data->socdata->flags & ESDHC_FLAG_BUSFREQ)
-+ release_bus_freq(BUS_FREQ_HIGH);
-+
- return ret;
- }
-
-@@ -1183,8 +1269,10 @@
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct pltfm_imx_data *imx_data = pltfm_host->priv;
-
-- clk_prepare_enable(imx_data->clk_per);
-- clk_prepare_enable(imx_data->clk_ipg);
-+ if (!sdhci_sdio_irq_enabled(host)) {
-+ clk_prepare_enable(imx_data->clk_per);
-+ clk_prepare_enable(imx_data->clk_ipg);
-+ }
- clk_prepare_enable(imx_data->clk_ahb);
-
- return sdhci_runtime_resume_host(host);
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-esdhc.h linux-3.14.54/drivers/mmc/host/sdhci-esdhc.h
---- linux-3.14.54.orig/drivers/mmc/host/sdhci-esdhc.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-esdhc.h 2015-10-12 10:56:18.034351162 +0200
-@@ -20,12 +20,11 @@
-
- #define ESDHC_DEFAULT_QUIRKS (SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \
- SDHCI_QUIRK_NO_BUSY_IRQ | \
-- SDHCI_QUIRK_NONSTANDARD_CLOCK | \
- SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \
-- SDHCI_QUIRK_PIO_NEEDS_DELAY | \
-- SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET)
-+ SDHCI_QUIRK_PIO_NEEDS_DELAY)
-
- #define ESDHC_SYSTEM_CONTROL 0x2c
-+#define ESDHC_SYS_CTRL_RSTA (1 << 24)
- #define ESDHC_CLOCK_MASK 0x0000fff0
- #define ESDHC_PREDIV_SHIFT 8
- #define ESDHC_DIVIDER_SHIFT 4
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-of-arasan.c linux-3.14.54/drivers/mmc/host/sdhci-of-arasan.c
---- linux-3.14.54.orig/drivers/mmc/host/sdhci-of-arasan.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-of-arasan.c 2015-10-12 10:56:18.035351162 +0200
-@@ -52,8 +52,12 @@
- }
-
- static struct sdhci_ops sdhci_arasan_ops = {
-+ .set_clock = sdhci_set_clock,
- .get_max_clock = sdhci_pltfm_clk_get_max_clock,
- .get_timeout_clock = sdhci_arasan_get_timeout_clock,
-+ .set_bus_width = sdhci_set_bus_width,
-+ .reset = sdhci_reset,
-+ .set_uhs_signaling = sdhci_set_uhs_signaling,
- };
-
- static struct sdhci_pltfm_data sdhci_arasan_pdata = {
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-of-esdhc.c linux-3.14.54/drivers/mmc/host/sdhci-of-esdhc.c
---- linux-3.14.54.orig/drivers/mmc/host/sdhci-of-esdhc.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-of-esdhc.c 2015-10-12 10:56:18.035351162 +0200
-@@ -199,13 +199,14 @@
-
- static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock)
- {
--
- int pre_div = 2;
- int div = 1;
- u32 temp;
-
-+ host->mmc->actual_clock = 0;
-+
- if (clock == 0)
-- goto out;
-+ return;
-
- /* Workaround to reduce the clock frequency for p1010 esdhc */
- if (of_find_compatible_node(NULL, NULL, "fsl,p1010-esdhc")) {
-@@ -238,24 +239,8 @@
- | (pre_div << ESDHC_PREDIV_SHIFT));
- sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
- mdelay(1);
--out:
-- host->clock = clock;
- }
-
--#ifdef CONFIG_PM
--static u32 esdhc_proctl;
--static void esdhc_of_suspend(struct sdhci_host *host)
--{
-- esdhc_proctl = sdhci_be32bs_readl(host, SDHCI_HOST_CONTROL);
--}
--
--static void esdhc_of_resume(struct sdhci_host *host)
--{
-- esdhc_of_enable_dma(host);
-- sdhci_be32bs_writel(host, esdhc_proctl, SDHCI_HOST_CONTROL);
--}
--#endif
--
- static void esdhc_of_platform_init(struct sdhci_host *host)
- {
- u32 vvn;
-@@ -269,7 +254,7 @@
- host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
- }
-
--static int esdhc_pltfm_bus_width(struct sdhci_host *host, int width)
-+static void esdhc_pltfm_set_bus_width(struct sdhci_host *host, int width)
- {
- u32 ctrl;
-
-@@ -289,8 +274,6 @@
-
- clrsetbits_be32(host->ioaddr + SDHCI_HOST_CONTROL,
- ESDHC_CTRL_BUSWIDTH_MASK, ctrl);
--
-- return 0;
- }
-
- static const struct sdhci_ops sdhci_esdhc_ops = {
-@@ -305,13 +288,46 @@
- .get_max_clock = esdhc_of_get_max_clock,
- .get_min_clock = esdhc_of_get_min_clock,
- .platform_init = esdhc_of_platform_init,
--#ifdef CONFIG_PM
-- .platform_suspend = esdhc_of_suspend,
-- .platform_resume = esdhc_of_resume,
--#endif
- .adma_workaround = esdhci_of_adma_workaround,
-- .platform_bus_width = esdhc_pltfm_bus_width,
-+ .set_bus_width = esdhc_pltfm_set_bus_width,
-+ .reset = sdhci_reset,
-+ .set_uhs_signaling = sdhci_set_uhs_signaling,
-+};
-+
-+#ifdef CONFIG_PM
-+
-+static u32 esdhc_proctl;
-+static int esdhc_of_suspend(struct device *dev)
-+{
-+ struct sdhci_host *host = dev_get_drvdata(dev);
-+
-+ esdhc_proctl = sdhci_be32bs_readl(host, SDHCI_HOST_CONTROL);
-+
-+ return sdhci_suspend_host(host);
-+}
-+
-+static void esdhc_of_resume(device *dev)
-+{
-+ struct sdhci_host *host = dev_get_drvdata(dev);
-+ int ret = sdhci_resume_host(host);
-+
-+ if (ret == 0) {
-+ /* Isn't this already done by sdhci_resume_host() ? --rmk */
-+ esdhc_of_enable_dma(host);
-+ sdhci_be32bs_writel(host, esdhc_proctl, SDHCI_HOST_CONTROL);
-+ }
-+
-+ return ret;
-+}
-+
-+static const struct dev_pm_ops esdhc_pmops = {
-+ .suspend = esdhci_of_suspend,
-+ .resume = esdhci_of_resume,
- };
-+#define ESDHC_PMOPS (&esdhc_pmops)
-+#else
-+#define ESDHC_PMOPS NULL
-+#endif
-
- static const struct sdhci_pltfm_data sdhci_esdhc_pdata = {
- /*
-@@ -374,7 +390,7 @@
- .name = "sdhci-esdhc",
- .owner = THIS_MODULE,
- .of_match_table = sdhci_esdhc_of_match,
-- .pm = SDHCI_PLTFM_PMOPS,
-+ .pm = ESDHC_PMOPS,
- },
- .probe = sdhci_esdhc_probe,
- .remove = sdhci_esdhc_remove,
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-of-hlwd.c linux-3.14.54/drivers/mmc/host/sdhci-of-hlwd.c
---- linux-3.14.54.orig/drivers/mmc/host/sdhci-of-hlwd.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-of-hlwd.c 2015-10-12 10:56:18.036351162 +0200
-@@ -58,6 +58,10 @@
- .write_l = sdhci_hlwd_writel,
- .write_w = sdhci_hlwd_writew,
- .write_b = sdhci_hlwd_writeb,
-+ .set_clock = sdhci_set_clock,
-+ .set_bus_width = sdhci_set_bus_width,
-+ .reset = sdhci_reset,
-+ .set_uhs_signaling = sdhci_set_uhs_signaling,
- };
-
- static const struct sdhci_pltfm_data sdhci_hlwd_pdata = {
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-pci.c linux-3.14.54/drivers/mmc/host/sdhci-pci.c
---- linux-3.14.54.orig/drivers/mmc/host/sdhci-pci.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-pci.c 2015-10-12 10:56:18.036351162 +0200
-@@ -1023,7 +1023,7 @@
- return 0;
- }
-
--static int sdhci_pci_bus_width(struct sdhci_host *host, int width)
-+static void sdhci_pci_set_bus_width(struct sdhci_host *host, int width)
- {
- u8 ctrl;
-
-@@ -1044,8 +1044,6 @@
- }
-
- sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
--
-- return 0;
- }
-
- static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
-@@ -1072,8 +1070,11 @@
- }
-
- static const struct sdhci_ops sdhci_pci_ops = {
-+ .set_clock = sdhci_set_clock,
- .enable_dma = sdhci_pci_enable_dma,
-- .platform_bus_width = sdhci_pci_bus_width,
-+ .set_bus_width = sdhci_pci_set_bus_width,
-+ .reset = sdhci_reset,
-+ .set_uhs_signaling = sdhci_set_uhs_signaling,
- .hw_reset = sdhci_pci_hw_reset,
- };
-
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-pltfm.c linux-3.14.54/drivers/mmc/host/sdhci-pltfm.c
---- linux-3.14.54.orig/drivers/mmc/host/sdhci-pltfm.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-pltfm.c 2015-10-12 10:56:18.037351162 +0200
-@@ -45,6 +45,10 @@
- EXPORT_SYMBOL_GPL(sdhci_pltfm_clk_get_max_clock);
-
- static const struct sdhci_ops sdhci_pltfm_ops = {
-+ .set_clock = sdhci_set_clock,
-+ .set_bus_width = sdhci_set_bus_width,
-+ .reset = sdhci_reset,
-+ .set_uhs_signaling = sdhci_set_uhs_signaling,
- };
-
- #ifdef CONFIG_OF
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-pxav2.c linux-3.14.54/drivers/mmc/host/sdhci-pxav2.c
---- linux-3.14.54.orig/drivers/mmc/host/sdhci-pxav2.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-pxav2.c 2015-10-12 10:56:18.037351162 +0200
-@@ -51,11 +51,13 @@
- #define MMC_CARD 0x1000
- #define MMC_WIDTH 0x0100
-
--static void pxav2_set_private_registers(struct sdhci_host *host, u8 mask)
-+static void pxav2_reset(struct sdhci_host *host, u8 mask)
- {
- struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc));
- struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data;
-
-+ sdhci_reset(host, mask);
-+
- if (mask == SDHCI_RESET_ALL) {
- u16 tmp = 0;
-
-@@ -88,7 +90,7 @@
- }
- }
-
--static int pxav2_mmc_set_width(struct sdhci_host *host, int width)
-+static void pxav2_mmc_set_bus_width(struct sdhci_host *host, int width)
- {
- u8 ctrl;
- u16 tmp;
-@@ -107,14 +109,14 @@
- }
- writew(tmp, host->ioaddr + SD_CE_ATA_2);
- writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
--
-- return 0;
- }
-
- static const struct sdhci_ops pxav2_sdhci_ops = {
-+ .set_clock = sdhci_set_clock,
- .get_max_clock = sdhci_pltfm_clk_get_max_clock,
-- .platform_reset_exit = pxav2_set_private_registers,
-- .platform_bus_width = pxav2_mmc_set_width,
-+ .set_bus_width = pxav2_mmc_set_bus_width,
-+ .reset = pxav2_reset,
-+ .set_uhs_signaling = sdhci_set_uhs_signaling,
- };
-
- #ifdef CONFIG_OF
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-pxav3.c linux-3.14.54/drivers/mmc/host/sdhci-pxav3.c
---- linux-3.14.54.orig/drivers/mmc/host/sdhci-pxav3.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-pxav3.c 2015-10-12 10:56:18.037351162 +0200
-@@ -57,11 +57,13 @@
- #define SDCE_MISC_INT (1<<2)
- #define SDCE_MISC_INT_EN (1<<1)
-
--static void pxav3_set_private_registers(struct sdhci_host *host, u8 mask)
-+static void pxav3_reset(struct sdhci_host *host, u8 mask)
- {
- struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc));
- struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data;
-
-+ sdhci_reset(host, mask);
-+
- if (mask == SDHCI_RESET_ALL) {
- /*
- * tune timing of read data/command when crc error happen
-@@ -129,7 +131,7 @@
- pxa->power_mode = power_mode;
- }
-
--static int pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
-+static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
- {
- u16 ctrl_2;
-
-@@ -163,15 +165,16 @@
- dev_dbg(mmc_dev(host->mmc),
- "%s uhs = %d, ctrl_2 = %04X\n",
- __func__, uhs, ctrl_2);
--
-- return 0;
- }
-
- static const struct sdhci_ops pxav3_sdhci_ops = {
-- .platform_reset_exit = pxav3_set_private_registers,
-+ .set_clock = sdhci_set_clock,
- .set_uhs_signaling = pxav3_set_uhs_signaling,
- .platform_send_init_74_clocks = pxav3_gen_init_74_clocks,
- .get_max_clock = sdhci_pltfm_clk_get_max_clock,
-+ .set_bus_width = sdhci_set_bus_width,
-+ .reset = pxav3_reset,
-+ .set_uhs_signaling = sdhci_set_uhs_signaling,
- };
-
- static struct sdhci_pltfm_data sdhci_pxav3_pdata = {
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-s3c.c linux-3.14.54/drivers/mmc/host/sdhci-s3c.c
---- linux-3.14.54.orig/drivers/mmc/host/sdhci-s3c.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-s3c.c 2015-10-12 10:56:18.038351162 +0200
-@@ -57,6 +57,8 @@
-
- struct clk *clk_io;
- struct clk *clk_bus[MAX_BUS_CLK];
-+
-+ bool no_divider;
- };
-
- /**
-@@ -69,6 +71,7 @@
- */
- struct sdhci_s3c_drv_data {
- unsigned int sdhci_quirks;
-+ bool no_divider;
- };
-
- static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host)
-@@ -153,7 +156,7 @@
- * If controller uses a non-standard clock division, find the best clock
- * speed possible with selected clock source and skip the division.
- */
-- if (ourhost->host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) {
-+ if (ourhost->no_divider) {
- rate = clk_round_rate(clksrc, wanted);
- return wanted - rate;
- }
-@@ -188,9 +191,13 @@
- int src;
- u32 ctrl;
-
-+ host->mmc->actual_clock = 0;
-+
- /* don't bother if the clock is going off. */
-- if (clock == 0)
-+ if (clock == 0) {
-+ sdhci_set_clock(host, clock);
- return;
-+ }
-
- for (src = 0; src < MAX_BUS_CLK; src++) {
- delta = sdhci_s3c_consider_clock(ourhost, src, clock);
-@@ -240,6 +247,8 @@
- if (clock < 25 * 1000000)
- ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 | S3C_SDHCI_CTRL3_FCSEL2);
- writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);
-+
-+ sdhci_set_clock(host, clock);
- }
-
- /**
-@@ -296,10 +305,11 @@
- unsigned long timeout;
- u16 clk = 0;
-
-+ host->mmc->actual_clock = 0;
-+
- /* If the clock is going off, set to 0 at clock control register */
- if (clock == 0) {
- sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
-- host->clock = clock;
- return;
- }
-
-@@ -307,8 +317,6 @@
-
- clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock);
-
-- host->clock = clock;
--
- clk = SDHCI_CLOCK_INT_EN;
- sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
-
-@@ -330,14 +338,14 @@
- }
-
- /**
-- * sdhci_s3c_platform_bus_width - support 8bit buswidth
-+ * sdhci_s3c_set_bus_width - support 8bit buswidth
- * @host: The SDHCI host being queried
- * @width: MMC_BUS_WIDTH_ macro for the bus width being requested
- *
- * We have 8-bit width support but is not a v3 controller.
- * So we add platform_bus_width() and support 8bit width.
- */
--static int sdhci_s3c_platform_bus_width(struct sdhci_host *host, int width)
-+static void sdhci_s3c_set_bus_width(struct sdhci_host *host, int width)
- {
- u8 ctrl;
-
-@@ -359,15 +367,15 @@
- }
-
- sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
--
-- return 0;
- }
-
- static struct sdhci_ops sdhci_s3c_ops = {
- .get_max_clock = sdhci_s3c_get_max_clk,
- .set_clock = sdhci_s3c_set_clock,
- .get_min_clock = sdhci_s3c_get_min_clock,
-- .platform_bus_width = sdhci_s3c_platform_bus_width,
-+ .set_bus_width = sdhci_s3c_set_bus_width,
-+ .reset = sdhci_reset,
-+ .set_uhs_signaling = sdhci_set_uhs_signaling,
- };
-
- static void sdhci_s3c_notify_change(struct platform_device *dev, int state)
-@@ -617,8 +625,10 @@
- /* Setup quirks for the controller */
- host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
- host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
-- if (drv_data)
-+ if (drv_data) {
- host->quirks |= drv_data->sdhci_quirks;
-+ sc->no_divider = drv_data->no_divider;
-+ }
-
- #ifndef CONFIG_MMC_SDHCI_S3C_DMA
-
-@@ -667,7 +677,7 @@
- * If controller does not have internal clock divider,
- * we can use overriding functions instead of default.
- */
-- if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) {
-+ if (sc->no_divider) {
- sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock;
- sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock;
- sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock;
-@@ -813,7 +823,7 @@
-
- #if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS4212)
- static struct sdhci_s3c_drv_data exynos4_sdhci_drv_data = {
-- .sdhci_quirks = SDHCI_QUIRK_NONSTANDARD_CLOCK,
-+ .no_divider = true,
- };
- #define EXYNOS4_SDHCI_DRV_DATA ((kernel_ulong_t)&exynos4_sdhci_drv_data)
- #else
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-sirf.c linux-3.14.54/drivers/mmc/host/sdhci-sirf.c
---- linux-3.14.54.orig/drivers/mmc/host/sdhci-sirf.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-sirf.c 2015-10-12 10:56:18.038351162 +0200
-@@ -28,7 +28,11 @@
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-bcm-kona.c linux-3.14.54/drivers/mmc/host/sdhci-bcm-kona.c
+--- linux-3.14.54.orig/drivers/mmc/host/sdhci-bcm-kona.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-bcm-kona.c 2015-10-15 15:51:25.168660834 +0200
+@@ -205,9 +205,13 @@
}
- static struct sdhci_ops sdhci_sirf_ops = {
-+ .set_clock = sdhci_set_clock,
- .get_max_clock = sdhci_sirf_get_max_clk,
-+ .set_bus_width = sdhci_set_bus_width,
-+ .reset = sdhci_reset,
-+ .set_uhs_signaling = sdhci_set_uhs_signaling,
- };
-
- static struct sdhci_pltfm_data sdhci_sirf_pdata = {
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-spear.c linux-3.14.54/drivers/mmc/host/sdhci-spear.c
---- linux-3.14.54.orig/drivers/mmc/host/sdhci-spear.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-spear.c 2015-10-12 10:56:18.039351162 +0200
-@@ -37,7 +37,10 @@
-
- /* sdhci ops */
- static const struct sdhci_ops sdhci_pltfm_ops = {
-- /* Nothing to do for now. */
+ static struct sdhci_ops sdhci_bcm_kona_ops = {
+ .set_clock = sdhci_set_clock,
+ .get_max_clock = sdhci_bcm_kona_get_max_clk,
+ .get_timeout_clock = sdhci_bcm_kona_get_timeout_clock,
+ .platform_send_init_74_clocks = sdhci_bcm_kona_init_74_clocks,
+ .set_bus_width = sdhci_set_bus_width,
+ .reset = sdhci_reset,
+ .set_uhs_signaling = sdhci_set_uhs_signaling,
+ .card_event = sdhci_bcm_kona_card_event,
};
- /* gpio card detection interrupt handler */
-diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-tegra.c linux-3.14.54/drivers/mmc/host/sdhci-tegra.c
---- linux-3.14.54.orig/drivers/mmc/host/sdhci-tegra.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci-tegra.c 2015-10-12 10:56:18.039351162 +0200
-@@ -48,19 +48,6 @@
- int power_gpio;
- };
-
--static u32 tegra_sdhci_readl(struct sdhci_host *host, int reg)
--{
-- u32 val;
--
-- if (unlikely(reg == SDHCI_PRESENT_STATE)) {
-- /* Use wp_gpio here instead? */
-- val = readl(host->ioaddr + reg);
-- return val | SDHCI_WRITE_PROTECT;
-- }
--
-- return readl(host->ioaddr + reg);
--}
--
- static u16 tegra_sdhci_readw(struct sdhci_host *host, int reg)
- {
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
-@@ -108,12 +95,14 @@
- return mmc_gpio_get_ro(host->mmc);
- }
-
--static void tegra_sdhci_reset_exit(struct sdhci_host *host, u8 mask)
-+static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask)
- {
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct sdhci_tegra *tegra_host = pltfm_host->priv;
- const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;
-
-+ sdhci_reset(host, mask);
-+
- if (!(mask & SDHCI_RESET_ALL))
- return;
-
-@@ -127,7 +116,7 @@
- }
- }
-
--static int tegra_sdhci_buswidth(struct sdhci_host *host, int bus_width)
-+static void tegra_sdhci_set_bus_width(struct sdhci_host *host, int bus_width)
- {
- u32 ctrl;
-
-@@ -144,16 +133,16 @@
- ctrl &= ~SDHCI_CTRL_4BITBUS;
- }
- sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
-- return 0;
- }
-
- static const struct sdhci_ops tegra_sdhci_ops = {
- .get_ro = tegra_sdhci_get_ro,
-- .read_l = tegra_sdhci_readl,
- .read_w = tegra_sdhci_readw,
- .write_l = tegra_sdhci_writel,
-- .platform_bus_width = tegra_sdhci_buswidth,
-- .platform_reset_exit = tegra_sdhci_reset_exit,
-+ .set_clock = sdhci_set_clock,
-+ .set_bus_width = tegra_sdhci_set_bus_width,
-+ .reset = tegra_sdhci_reset,
-+ .set_uhs_signaling = sdhci_set_uhs_signaling,
- };
-
- static const struct sdhci_pltfm_data sdhci_tegra20_pdata = {
diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci.c linux-3.14.54/drivers/mmc/host/sdhci.c
--- linux-3.14.54.orig/drivers/mmc/host/sdhci.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci.c 2015-10-12 10:56:18.033351162 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci.c 2015-10-15 15:51:25.172660572 +0200
@@ -44,6 +44,8 @@
#define MAX_TUNING_LOOP 40
@@ -98733,9 +97686,503 @@ diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci.c linux-3.14.54/drivers/mmc/
kfree(host->align_buffer);
host->adma_desc = NULL;
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-cns3xxx.c linux-3.14.54/drivers/mmc/host/sdhci-cns3xxx.c
+--- linux-3.14.54.orig/drivers/mmc/host/sdhci-cns3xxx.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-cns3xxx.c 2015-10-15 15:51:25.172660572 +0200
+@@ -30,13 +30,12 @@
+ u16 clk;
+ unsigned long timeout;
+
+- if (clock == host->clock)
+- return;
++ host->mmc->actual_clock = 0;
+
+ sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
+
+ if (clock == 0)
+- goto out;
++ return;
+
+ while (host->max_clk / div > clock) {
+ /*
+@@ -75,13 +74,14 @@
+
+ clk |= SDHCI_CLOCK_CARD_EN;
+ sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+-out:
+- host->clock = clock;
+ }
+
+ static const struct sdhci_ops sdhci_cns3xxx_ops = {
+ .get_max_clock = sdhci_cns3xxx_get_max_clk,
+ .set_clock = sdhci_cns3xxx_set_clock,
++ .set_bus_width = sdhci_set_bus_width,
++ .reset = sdhci_reset,
++ .set_uhs_signaling = sdhci_set_uhs_signaling,
+ };
+
+ static const struct sdhci_pltfm_data sdhci_cns3xxx_pdata = {
+@@ -90,8 +90,7 @@
+ SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
+ SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
+ SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
+- SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
+- SDHCI_QUIRK_NONSTANDARD_CLOCK,
++ SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
+ };
+
+ static int sdhci_cns3xxx_probe(struct platform_device *pdev)
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-dove.c linux-3.14.54/drivers/mmc/host/sdhci-dove.c
+--- linux-3.14.54.orig/drivers/mmc/host/sdhci-dove.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-dove.c 2015-10-15 15:51:25.176660308 +0200
+@@ -86,6 +86,10 @@
+ static const struct sdhci_ops sdhci_dove_ops = {
+ .read_w = sdhci_dove_readw,
+ .read_l = sdhci_dove_readl,
++ .set_clock = sdhci_set_clock,
++ .set_bus_width = sdhci_set_bus_width,
++ .reset = sdhci_reset,
++ .set_uhs_signaling = sdhci_set_uhs_signaling,
+ };
+
+ static const struct sdhci_pltfm_data sdhci_dove_pdata = {
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-esdhc.h linux-3.14.54/drivers/mmc/host/sdhci-esdhc.h
+--- linux-3.14.54.orig/drivers/mmc/host/sdhci-esdhc.h 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-esdhc.h 2015-10-15 15:51:25.176660308 +0200
+@@ -20,12 +20,11 @@
+
+ #define ESDHC_DEFAULT_QUIRKS (SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \
+ SDHCI_QUIRK_NO_BUSY_IRQ | \
+- SDHCI_QUIRK_NONSTANDARD_CLOCK | \
+ SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | \
+- SDHCI_QUIRK_PIO_NEEDS_DELAY | \
+- SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET)
++ SDHCI_QUIRK_PIO_NEEDS_DELAY)
+
+ #define ESDHC_SYSTEM_CONTROL 0x2c
++#define ESDHC_SYS_CTRL_RSTA (1 << 24)
+ #define ESDHC_CLOCK_MASK 0x0000fff0
+ #define ESDHC_PREDIV_SHIFT 8
+ #define ESDHC_DIVIDER_SHIFT 4
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-esdhc-imx.c linux-3.14.54/drivers/mmc/host/sdhci-esdhc-imx.c
+--- linux-3.14.54.orig/drivers/mmc/host/sdhci-esdhc-imx.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-esdhc-imx.c 2015-10-15 15:51:25.176660308 +0200
+@@ -11,6 +11,7 @@
+ * the Free Software Foundation; either version 2 of the License.
+ */
+
++#include <linux/busfreq-imx6.h>
+ #include <linux/io.h>
+ #include <linux/delay.h>
+ #include <linux/err.h>
+@@ -114,6 +115,10 @@
+ #define ESDHC_FLAG_STD_TUNING BIT(5)
+ /* The IP has SDHCI_CAPABILITIES_1 register */
+ #define ESDHC_FLAG_HAVE_CAP1 BIT(6)
++/* The IP has errata ERR004536 */
++#define ESDHC_FLAG_ERR004536 BIT(7)
++/* need request bus freq during low power */
++#define ESDHC_FLAG_BUSFREQ BIT(8)
+
+ struct esdhc_soc_data {
+ u32 flags;
+@@ -141,7 +146,8 @@
+
+ static struct esdhc_soc_data usdhc_imx6sl_data = {
+ .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_STD_TUNING
+- | ESDHC_FLAG_HAVE_CAP1,
++ | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_ERR004536
++ | ESDHC_FLAG_BUSFREQ,
+ };
+
+ struct pltfm_imx_data {
+@@ -160,7 +166,6 @@
+ MULTIBLK_IN_PROCESS, /* exact multiblock cmd in process */
+ WAIT_FOR_INT, /* sent CMD12, waiting for response INT */
+ } multiblock_status;
+- u32 uhs_mode;
+ u32 is_ddr;
+ };
+
+@@ -382,7 +387,6 @@
+ if (val & ESDHC_MIX_CTRL_SMPCLK_SEL)
+ ret |= SDHCI_CTRL_TUNED_CLK;
+
+- ret |= (imx_data->uhs_mode & SDHCI_CTRL_UHS_MASK);
+ ret &= ~SDHCI_CTRL_PRESET_VAL_ENABLE;
+
+ return ret;
+@@ -429,7 +433,6 @@
+ else
+ new_val &= ~ESDHC_VENDOR_SPEC_VSELECT;
+ writel(new_val, host->ioaddr + ESDHC_VENDOR_SPEC);
+- imx_data->uhs_mode = val & SDHCI_CTRL_UHS_MASK;
+ if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING) {
+ new_val = readl(host->ioaddr + ESDHC_MIX_CTRL);
+ if (val & SDHCI_CTRL_TUNED_CLK)
+@@ -600,12 +603,14 @@
+ u32 temp, val;
+
+ if (clock == 0) {
++ host->mmc->actual_clock = 0;
++
+ if (esdhc_is_usdhc(imx_data)) {
+ val = readl(host->ioaddr + ESDHC_VENDOR_SPEC);
+ writel(val & ~ESDHC_VENDOR_SPEC_FRC_SDCLK_ON,
+ host->ioaddr + ESDHC_VENDOR_SPEC);
+ }
+- goto out;
++ return;
+ }
+
+ if (esdhc_is_usdhc(imx_data) && !imx_data->is_ddr)
+@@ -645,8 +650,6 @@
+ }
+
+ mdelay(1);
+-out:
+- host->clock = clock;
+ }
+
+ static unsigned int esdhc_pltfm_get_ro(struct sdhci_host *host)
+@@ -668,7 +671,7 @@
+ return -ENOSYS;
+ }
+
+-static int esdhc_pltfm_bus_width(struct sdhci_host *host, int width)
++static void esdhc_pltfm_set_bus_width(struct sdhci_host *host, int width)
+ {
+ u32 ctrl;
+
+@@ -686,17 +689,56 @@
+
+ esdhc_clrset_le(host, ESDHC_CTRL_BUSWIDTH_MASK, ctrl,
+ SDHCI_HOST_CONTROL);
++}
+
+- return 0;
++static void esdhc_tuning_reset(struct sdhci_host *host, u32 rst_bits)
++{
++ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
++ struct pltfm_imx_data *imx_data = pltfm_host->priv;
++ u32 timeout;
++ u32 reg;
++
++ reg = readl(host->ioaddr + ESDHC_SYSTEM_CONTROL);
++ reg |= rst_bits;
++ writel(reg, host->ioaddr + ESDHC_SYSTEM_CONTROL);
++
++ /* Wait for max 100ms */
++ timeout = 100;
++
++ /* hw clears the bit when it's done */
++ while (readl(host->ioaddr + ESDHC_SYSTEM_CONTROL) & rst_bits) {
++ if (timeout == 0) {
++ dev_err(mmc_dev(host->mmc),
++ "Reset never completes!\n");
++ return;
++ }
++ timeout--;
++ mdelay(1);
++ }
++
++ /*
++ * The RSTA, reset all, on usdhc will not clear following regs:
++ * > SDHCI_MIX_CTRL
++ * > SDHCI_TUNE_CTRL_STATUS
++ *
++ * Do it manually here.
++ */
++ if ((rst_bits & ESDHC_SYS_CTRL_RSTA) && is_imx6q_usdhc(imx_data)) {
++ writel(0, host->ioaddr + ESDHC_MIX_CTRL);
++ writel(0, host->ioaddr + ESDHC_TUNE_CTRL_STATUS);
++ /* FIXME: delay for clear tuning status or some cards may not work */
++ mdelay(1);
++ }
+ }
+
+ static void esdhc_prepare_tuning(struct sdhci_host *host, u32 val)
+ {
+ u32 reg;
+
+- /* FIXME: delay a bit for card to be ready for next tuning due to errors */
+- mdelay(1);
++ /* reset controller before tuning or it may fail on some cards */
++ esdhc_tuning_reset(host, ESDHC_SYS_CTRL_RSTA);
+
++ /* This is balanced by the runtime put in sdhci_tasklet_finish */
+ pm_runtime_get_sync(host->mmc->parent);
+ reg = readl(host->ioaddr + ESDHC_MIX_CTRL);
+ reg |= ESDHC_MIX_CTRL_EXE_TUNE | ESDHC_MIX_CTRL_SMPCLK_SEL |
+@@ -713,13 +755,12 @@
+ complete(&mrq->completion);
+ }
+
+-static int esdhc_send_tuning_cmd(struct sdhci_host *host, u32 opcode)
++static int esdhc_send_tuning_cmd(struct sdhci_host *host, u32 opcode,
++ struct scatterlist *sg)
+ {
+ struct mmc_command cmd = {0};
+ struct mmc_request mrq = {NULL};
+ struct mmc_data data = {0};
+- struct scatterlist sg;
+- char tuning_pattern[ESDHC_TUNING_BLOCK_PATTERN_LEN];
+
+ cmd.opcode = opcode;
+ cmd.arg = 0;
+@@ -728,11 +769,9 @@
+ data.blksz = ESDHC_TUNING_BLOCK_PATTERN_LEN;
+ data.blocks = 1;
+ data.flags = MMC_DATA_READ;
+- data.sg = &sg;
++ data.sg = sg;
+ data.sg_len = 1;
+
+- sg_init_one(&sg, tuning_pattern, sizeof(tuning_pattern));
+-
+ mrq.cmd = &cmd;
+ mrq.cmd->mrq = &mrq;
+ mrq.data = &data;
+@@ -742,14 +781,12 @@
+ mrq.done = esdhc_request_done;
+ init_completion(&(mrq.completion));
+
+- disable_irq(host->irq);
+- spin_lock(&host->lock);
++ spin_lock_irq(&host->lock);
+ host->mrq = &mrq;
+
+ sdhci_send_command(host, mrq.cmd);
+
+- spin_unlock(&host->lock);
+- enable_irq(host->irq);
++ spin_unlock_irq(&host->lock);
+
+ wait_for_completion(&mrq.completion);
+
+@@ -772,13 +809,21 @@
+
+ static int esdhc_executing_tuning(struct sdhci_host *host, u32 opcode)
+ {
++ struct scatterlist sg;
++ char *tuning_pattern;
+ int min, max, avg, ret;
+
++ tuning_pattern = kmalloc(ESDHC_TUNING_BLOCK_PATTERN_LEN, GFP_KERNEL);
++ if (!tuning_pattern)
++ return -ENOMEM;
++
++ sg_init_one(&sg, tuning_pattern, ESDHC_TUNING_BLOCK_PATTERN_LEN);
++
+ /* find the mininum delay first which can pass tuning */
+ min = ESDHC_TUNE_CTRL_MIN;
+ while (min < ESDHC_TUNE_CTRL_MAX) {
+ esdhc_prepare_tuning(host, min);
+- if (!esdhc_send_tuning_cmd(host, opcode))
++ if (!esdhc_send_tuning_cmd(host, opcode, &sg))
+ break;
+ min += ESDHC_TUNE_CTRL_STEP;
+ }
+@@ -787,7 +832,7 @@
+ max = min + ESDHC_TUNE_CTRL_STEP;
+ while (max < ESDHC_TUNE_CTRL_MAX) {
+ esdhc_prepare_tuning(host, max);
+- if (esdhc_send_tuning_cmd(host, opcode)) {
++ if (esdhc_send_tuning_cmd(host, opcode, &sg)) {
+ max -= ESDHC_TUNE_CTRL_STEP;
+ break;
+ }
+@@ -797,9 +842,11 @@
+ /* use average delay to get the best timing */
+ avg = (min + max) / 2;
+ esdhc_prepare_tuning(host, avg);
+- ret = esdhc_send_tuning_cmd(host, opcode);
++ ret = esdhc_send_tuning_cmd(host, opcode, &sg);
+ esdhc_post_tuning(host);
+
++ kfree(tuning_pattern);
++
+ dev_dbg(mmc_dev(host->mmc), "tunning %s at 0x%x ret %d\n",
+ ret ? "failed" : "passed", avg, ret);
+
+@@ -837,28 +884,20 @@
+ return pinctrl_select_state(imx_data->pinctrl, pinctrl);
+ }
+
+-static int esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
++static void esdhc_set_uhs_signaling(struct sdhci_host *host, unsigned timing)
+ {
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct pltfm_imx_data *imx_data = pltfm_host->priv;
+ struct esdhc_platform_data *boarddata = &imx_data->boarddata;
+
+- switch (uhs) {
++ switch (timing) {
+ case MMC_TIMING_UHS_SDR12:
+- imx_data->uhs_mode = SDHCI_CTRL_UHS_SDR12;
+- break;
+ case MMC_TIMING_UHS_SDR25:
+- imx_data->uhs_mode = SDHCI_CTRL_UHS_SDR25;
+- break;
+ case MMC_TIMING_UHS_SDR50:
+- imx_data->uhs_mode = SDHCI_CTRL_UHS_SDR50;
+- break;
+ case MMC_TIMING_UHS_SDR104:
+ case MMC_TIMING_MMC_HS200:
+- imx_data->uhs_mode = SDHCI_CTRL_UHS_SDR104;
+ break;
+ case MMC_TIMING_UHS_DDR50:
+- imx_data->uhs_mode = SDHCI_CTRL_UHS_DDR50;
+ writel(readl(host->ioaddr + ESDHC_MIX_CTRL) |
+ ESDHC_MIX_CTRL_DDREN,
+ host->ioaddr + ESDHC_MIX_CTRL);
+@@ -875,7 +914,20 @@
+ break;
+ }
+
+- return esdhc_change_pinstate(host, uhs);
++ esdhc_change_pinstate(host, timing);
++}
++
++static void esdhc_reset(struct sdhci_host *host, u8 mask)
++{
++ sdhci_reset(host, mask);
++
++ sdhci_writel(host, host->ier, SDHCI_INT_ENABLE);
++ sdhci_writel(host, host->ier, SDHCI_SIGNAL_ENABLE);
++}
++
++static unsigned int esdhc_get_max_timeout_counter(struct sdhci_host *host)
++{
++ return 1 << 28;
+ }
+
+ static struct sdhci_ops sdhci_esdhc_ops = {
+@@ -888,8 +940,9 @@
+ .get_max_clock = esdhc_pltfm_get_max_clock,
+ .get_min_clock = esdhc_pltfm_get_min_clock,
+ .get_ro = esdhc_pltfm_get_ro,
+- .platform_bus_width = esdhc_pltfm_bus_width,
++ .set_bus_width = esdhc_pltfm_set_bus_width,
+ .set_uhs_signaling = esdhc_set_uhs_signaling,
++ .reset = esdhc_reset,
+ };
+
+ static const struct sdhci_pltfm_data sdhci_esdhc_imx_pdata = {
+@@ -906,6 +959,7 @@
+ struct esdhc_platform_data *boarddata)
+ {
+ struct device_node *np = pdev->dev.of_node;
++ struct sdhci_host *host = platform_get_drvdata(pdev);
+
+ if (!np)
+ return -ENODEV;
+@@ -939,6 +993,12 @@
+ if (of_property_read_u32(np, "fsl,delay-line", &boarddata->delay_line))
+ boarddata->delay_line = 0;
+
++ if (of_find_property(np, "keep-power-in-suspend", NULL))
++ host->mmc->pm_caps |= MMC_PM_KEEP_POWER;
++
++ if (of_find_property(np, "enable-sdio-wakeup", NULL))
++ host->mmc->pm_caps |= MMC_PM_WAKE_SDIO_IRQ;
++
+ return 0;
+ }
+ #else
+@@ -994,6 +1054,9 @@
+ goto free_sdhci;
+ }
+
++ if (imx_data->socdata->flags & ESDHC_FLAG_BUSFREQ)
++ request_bus_freq(BUS_FREQ_HIGH);
++
+ pltfm_host->clk = imx_data->clk_per;
+ pltfm_host->clock = clk_get_rate(pltfm_host->clk);
+ clk_prepare_enable(imx_data->clk_per);
+@@ -1027,8 +1090,17 @@
+ */
+ if (esdhc_is_usdhc(imx_data)) {
+ writel(0x08100810, host->ioaddr + ESDHC_WTMK_LVL);
+- host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
++ host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
++ SDHCI_QUIRK2_NOSTD_TIMEOUT_COUNTER;
+ host->mmc->caps |= MMC_CAP_1_8V_DDR;
++
++ /*
++ * errata ESDHC_FLAG_ERR004536 fix for MX6Q TO1.2 and MX6DL
++ * TO1.1, it's harmless for MX6SL
++ */
++ writel(readl(host->ioaddr + 0x6c) | BIT(7), host->ioaddr + 0x6c);
++ sdhci_esdhc_ops.get_max_timeout_counter =
++ esdhc_get_max_timeout_counter;
+ }
+
+ if (imx_data->socdata->flags & ESDHC_FLAG_MAN_TUNING)
+@@ -1040,6 +1112,9 @@
+ ESDHC_STD_TUNING_EN | ESDHC_TUNING_START_TAP,
+ host->ioaddr + ESDHC_TUNING_CTRL);
+
++ if (imx_data->socdata->flags & ESDHC_FLAG_ERR004536)
++ host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
++
+ boarddata = &imx_data->boarddata;
+ if (sdhci_esdhc_imx_probe_dt(pdev, boarddata) < 0) {
+ if (!host->mmc->parent->platform_data) {
+@@ -1116,6 +1191,10 @@
+ host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
+ }
+
++ if (host->mmc->pm_caps & MMC_PM_KEEP_POWER &&
++ host->mmc->pm_caps & MMC_PM_WAKE_SDIO_IRQ)
++ device_init_wakeup(&pdev->dev, 1);
++
+ err = sdhci_add_host(host);
+ if (err)
+ goto disable_clk;
+@@ -1132,6 +1211,8 @@
+ clk_disable_unprepare(imx_data->clk_per);
+ clk_disable_unprepare(imx_data->clk_ipg);
+ clk_disable_unprepare(imx_data->clk_ahb);
++ if (imx_data->socdata->flags & ESDHC_FLAG_BUSFREQ)
++ release_bus_freq(BUS_FREQ_HIGH);
+ free_sdhci:
+ sdhci_pltfm_free(pdev);
+ return err;
+@@ -1170,10 +1251,15 @@
+
+ ret = sdhci_runtime_suspend_host(host);
+
+- clk_disable_unprepare(imx_data->clk_per);
+- clk_disable_unprepare(imx_data->clk_ipg);
++ if (!sdhci_sdio_irq_enabled(host)) {
++ clk_disable_unprepare(imx_data->clk_per);
++ clk_disable_unprepare(imx_data->clk_ipg);
++ }
+ clk_disable_unprepare(imx_data->clk_ahb);
+
++ if (imx_data->socdata->flags & ESDHC_FLAG_BUSFREQ)
++ release_bus_freq(BUS_FREQ_HIGH);
++
+ return ret;
+ }
+
+@@ -1183,8 +1269,10 @@
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct pltfm_imx_data *imx_data = pltfm_host->priv;
+
+- clk_prepare_enable(imx_data->clk_per);
+- clk_prepare_enable(imx_data->clk_ipg);
++ if (!sdhci_sdio_irq_enabled(host)) {
++ clk_prepare_enable(imx_data->clk_per);
++ clk_prepare_enable(imx_data->clk_ipg);
++ }
+ clk_prepare_enable(imx_data->clk_ahb);
+
+ return sdhci_runtime_resume_host(host);
diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci.h linux-3.14.54/drivers/mmc/host/sdhci.h
--- linux-3.14.54.orig/drivers/mmc/host/sdhci.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mmc/host/sdhci.h 2015-10-12 10:56:18.035351162 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci.h 2015-10-15 15:51:25.176660308 +0200
@@ -281,18 +281,15 @@
unsigned int (*get_max_clock)(struct sdhci_host *host);
unsigned int (*get_min_clock)(struct sdhci_host *host);
@@ -98776,9 +98223,544 @@ diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci.h linux-3.14.54/drivers/mmc/
#ifdef CONFIG_PM
extern int sdhci_suspend_host(struct sdhci_host *host);
extern int sdhci_resume_host(struct sdhci_host *host);
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-of-arasan.c linux-3.14.54/drivers/mmc/host/sdhci-of-arasan.c
+--- linux-3.14.54.orig/drivers/mmc/host/sdhci-of-arasan.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-of-arasan.c 2015-10-15 15:51:25.176660308 +0200
+@@ -52,8 +52,12 @@
+ }
+
+ static struct sdhci_ops sdhci_arasan_ops = {
++ .set_clock = sdhci_set_clock,
+ .get_max_clock = sdhci_pltfm_clk_get_max_clock,
+ .get_timeout_clock = sdhci_arasan_get_timeout_clock,
++ .set_bus_width = sdhci_set_bus_width,
++ .reset = sdhci_reset,
++ .set_uhs_signaling = sdhci_set_uhs_signaling,
+ };
+
+ static struct sdhci_pltfm_data sdhci_arasan_pdata = {
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-of-esdhc.c linux-3.14.54/drivers/mmc/host/sdhci-of-esdhc.c
+--- linux-3.14.54.orig/drivers/mmc/host/sdhci-of-esdhc.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-of-esdhc.c 2015-10-15 15:51:25.176660308 +0200
+@@ -199,13 +199,14 @@
+
+ static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock)
+ {
+-
+ int pre_div = 2;
+ int div = 1;
+ u32 temp;
+
++ host->mmc->actual_clock = 0;
++
+ if (clock == 0)
+- goto out;
++ return;
+
+ /* Workaround to reduce the clock frequency for p1010 esdhc */
+ if (of_find_compatible_node(NULL, NULL, "fsl,p1010-esdhc")) {
+@@ -238,24 +239,8 @@
+ | (pre_div << ESDHC_PREDIV_SHIFT));
+ sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
+ mdelay(1);
+-out:
+- host->clock = clock;
+ }
+
+-#ifdef CONFIG_PM
+-static u32 esdhc_proctl;
+-static void esdhc_of_suspend(struct sdhci_host *host)
+-{
+- esdhc_proctl = sdhci_be32bs_readl(host, SDHCI_HOST_CONTROL);
+-}
+-
+-static void esdhc_of_resume(struct sdhci_host *host)
+-{
+- esdhc_of_enable_dma(host);
+- sdhci_be32bs_writel(host, esdhc_proctl, SDHCI_HOST_CONTROL);
+-}
+-#endif
+-
+ static void esdhc_of_platform_init(struct sdhci_host *host)
+ {
+ u32 vvn;
+@@ -269,7 +254,7 @@
+ host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
+ }
+
+-static int esdhc_pltfm_bus_width(struct sdhci_host *host, int width)
++static void esdhc_pltfm_set_bus_width(struct sdhci_host *host, int width)
+ {
+ u32 ctrl;
+
+@@ -289,8 +274,6 @@
+
+ clrsetbits_be32(host->ioaddr + SDHCI_HOST_CONTROL,
+ ESDHC_CTRL_BUSWIDTH_MASK, ctrl);
+-
+- return 0;
+ }
+
+ static const struct sdhci_ops sdhci_esdhc_ops = {
+@@ -305,13 +288,46 @@
+ .get_max_clock = esdhc_of_get_max_clock,
+ .get_min_clock = esdhc_of_get_min_clock,
+ .platform_init = esdhc_of_platform_init,
+-#ifdef CONFIG_PM
+- .platform_suspend = esdhc_of_suspend,
+- .platform_resume = esdhc_of_resume,
+-#endif
+ .adma_workaround = esdhci_of_adma_workaround,
+- .platform_bus_width = esdhc_pltfm_bus_width,
++ .set_bus_width = esdhc_pltfm_set_bus_width,
++ .reset = sdhci_reset,
++ .set_uhs_signaling = sdhci_set_uhs_signaling,
++};
++
++#ifdef CONFIG_PM
++
++static u32 esdhc_proctl;
++static int esdhc_of_suspend(struct device *dev)
++{
++ struct sdhci_host *host = dev_get_drvdata(dev);
++
++ esdhc_proctl = sdhci_be32bs_readl(host, SDHCI_HOST_CONTROL);
++
++ return sdhci_suspend_host(host);
++}
++
++static void esdhc_of_resume(device *dev)
++{
++ struct sdhci_host *host = dev_get_drvdata(dev);
++ int ret = sdhci_resume_host(host);
++
++ if (ret == 0) {
++ /* Isn't this already done by sdhci_resume_host() ? --rmk */
++ esdhc_of_enable_dma(host);
++ sdhci_be32bs_writel(host, esdhc_proctl, SDHCI_HOST_CONTROL);
++ }
++
++ return ret;
++}
++
++static const struct dev_pm_ops esdhc_pmops = {
++ .suspend = esdhci_of_suspend,
++ .resume = esdhci_of_resume,
+ };
++#define ESDHC_PMOPS (&esdhc_pmops)
++#else
++#define ESDHC_PMOPS NULL
++#endif
+
+ static const struct sdhci_pltfm_data sdhci_esdhc_pdata = {
+ /*
+@@ -374,7 +390,7 @@
+ .name = "sdhci-esdhc",
+ .owner = THIS_MODULE,
+ .of_match_table = sdhci_esdhc_of_match,
+- .pm = SDHCI_PLTFM_PMOPS,
++ .pm = ESDHC_PMOPS,
+ },
+ .probe = sdhci_esdhc_probe,
+ .remove = sdhci_esdhc_remove,
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-of-hlwd.c linux-3.14.54/drivers/mmc/host/sdhci-of-hlwd.c
+--- linux-3.14.54.orig/drivers/mmc/host/sdhci-of-hlwd.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-of-hlwd.c 2015-10-15 15:51:25.176660308 +0200
+@@ -58,6 +58,10 @@
+ .write_l = sdhci_hlwd_writel,
+ .write_w = sdhci_hlwd_writew,
+ .write_b = sdhci_hlwd_writeb,
++ .set_clock = sdhci_set_clock,
++ .set_bus_width = sdhci_set_bus_width,
++ .reset = sdhci_reset,
++ .set_uhs_signaling = sdhci_set_uhs_signaling,
+ };
+
+ static const struct sdhci_pltfm_data sdhci_hlwd_pdata = {
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-pci.c linux-3.14.54/drivers/mmc/host/sdhci-pci.c
+--- linux-3.14.54.orig/drivers/mmc/host/sdhci-pci.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-pci.c 2015-10-15 15:51:25.176660308 +0200
+@@ -1023,7 +1023,7 @@
+ return 0;
+ }
+
+-static int sdhci_pci_bus_width(struct sdhci_host *host, int width)
++static void sdhci_pci_set_bus_width(struct sdhci_host *host, int width)
+ {
+ u8 ctrl;
+
+@@ -1044,8 +1044,6 @@
+ }
+
+ sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
+-
+- return 0;
+ }
+
+ static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
+@@ -1072,8 +1070,11 @@
+ }
+
+ static const struct sdhci_ops sdhci_pci_ops = {
++ .set_clock = sdhci_set_clock,
+ .enable_dma = sdhci_pci_enable_dma,
+- .platform_bus_width = sdhci_pci_bus_width,
++ .set_bus_width = sdhci_pci_set_bus_width,
++ .reset = sdhci_reset,
++ .set_uhs_signaling = sdhci_set_uhs_signaling,
+ .hw_reset = sdhci_pci_hw_reset,
+ };
+
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-pltfm.c linux-3.14.54/drivers/mmc/host/sdhci-pltfm.c
+--- linux-3.14.54.orig/drivers/mmc/host/sdhci-pltfm.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-pltfm.c 2015-10-15 15:51:25.176660308 +0200
+@@ -45,6 +45,10 @@
+ EXPORT_SYMBOL_GPL(sdhci_pltfm_clk_get_max_clock);
+
+ static const struct sdhci_ops sdhci_pltfm_ops = {
++ .set_clock = sdhci_set_clock,
++ .set_bus_width = sdhci_set_bus_width,
++ .reset = sdhci_reset,
++ .set_uhs_signaling = sdhci_set_uhs_signaling,
+ };
+
+ #ifdef CONFIG_OF
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-pxav2.c linux-3.14.54/drivers/mmc/host/sdhci-pxav2.c
+--- linux-3.14.54.orig/drivers/mmc/host/sdhci-pxav2.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-pxav2.c 2015-10-15 15:51:25.176660308 +0200
+@@ -51,11 +51,13 @@
+ #define MMC_CARD 0x1000
+ #define MMC_WIDTH 0x0100
+
+-static void pxav2_set_private_registers(struct sdhci_host *host, u8 mask)
++static void pxav2_reset(struct sdhci_host *host, u8 mask)
+ {
+ struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc));
+ struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data;
+
++ sdhci_reset(host, mask);
++
+ if (mask == SDHCI_RESET_ALL) {
+ u16 tmp = 0;
+
+@@ -88,7 +90,7 @@
+ }
+ }
+
+-static int pxav2_mmc_set_width(struct sdhci_host *host, int width)
++static void pxav2_mmc_set_bus_width(struct sdhci_host *host, int width)
+ {
+ u8 ctrl;
+ u16 tmp;
+@@ -107,14 +109,14 @@
+ }
+ writew(tmp, host->ioaddr + SD_CE_ATA_2);
+ writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
+-
+- return 0;
+ }
+
+ static const struct sdhci_ops pxav2_sdhci_ops = {
++ .set_clock = sdhci_set_clock,
+ .get_max_clock = sdhci_pltfm_clk_get_max_clock,
+- .platform_reset_exit = pxav2_set_private_registers,
+- .platform_bus_width = pxav2_mmc_set_width,
++ .set_bus_width = pxav2_mmc_set_bus_width,
++ .reset = pxav2_reset,
++ .set_uhs_signaling = sdhci_set_uhs_signaling,
+ };
+
+ #ifdef CONFIG_OF
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-pxav3.c linux-3.14.54/drivers/mmc/host/sdhci-pxav3.c
+--- linux-3.14.54.orig/drivers/mmc/host/sdhci-pxav3.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-pxav3.c 2015-10-15 15:51:25.176660308 +0200
+@@ -57,11 +57,13 @@
+ #define SDCE_MISC_INT (1<<2)
+ #define SDCE_MISC_INT_EN (1<<1)
+
+-static void pxav3_set_private_registers(struct sdhci_host *host, u8 mask)
++static void pxav3_reset(struct sdhci_host *host, u8 mask)
+ {
+ struct platform_device *pdev = to_platform_device(mmc_dev(host->mmc));
+ struct sdhci_pxa_platdata *pdata = pdev->dev.platform_data;
+
++ sdhci_reset(host, mask);
++
+ if (mask == SDHCI_RESET_ALL) {
+ /*
+ * tune timing of read data/command when crc error happen
+@@ -129,7 +131,7 @@
+ pxa->power_mode = power_mode;
+ }
+
+-static int pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
++static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs)
+ {
+ u16 ctrl_2;
+
+@@ -163,15 +165,16 @@
+ dev_dbg(mmc_dev(host->mmc),
+ "%s uhs = %d, ctrl_2 = %04X\n",
+ __func__, uhs, ctrl_2);
+-
+- return 0;
+ }
+
+ static const struct sdhci_ops pxav3_sdhci_ops = {
+- .platform_reset_exit = pxav3_set_private_registers,
++ .set_clock = sdhci_set_clock,
+ .set_uhs_signaling = pxav3_set_uhs_signaling,
+ .platform_send_init_74_clocks = pxav3_gen_init_74_clocks,
+ .get_max_clock = sdhci_pltfm_clk_get_max_clock,
++ .set_bus_width = sdhci_set_bus_width,
++ .reset = pxav3_reset,
++ .set_uhs_signaling = sdhci_set_uhs_signaling,
+ };
+
+ static struct sdhci_pltfm_data sdhci_pxav3_pdata = {
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-s3c.c linux-3.14.54/drivers/mmc/host/sdhci-s3c.c
+--- linux-3.14.54.orig/drivers/mmc/host/sdhci-s3c.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-s3c.c 2015-10-15 15:51:25.176660308 +0200
+@@ -57,6 +57,8 @@
+
+ struct clk *clk_io;
+ struct clk *clk_bus[MAX_BUS_CLK];
++
++ bool no_divider;
+ };
+
+ /**
+@@ -69,6 +71,7 @@
+ */
+ struct sdhci_s3c_drv_data {
+ unsigned int sdhci_quirks;
++ bool no_divider;
+ };
+
+ static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host)
+@@ -153,7 +156,7 @@
+ * If controller uses a non-standard clock division, find the best clock
+ * speed possible with selected clock source and skip the division.
+ */
+- if (ourhost->host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) {
++ if (ourhost->no_divider) {
+ rate = clk_round_rate(clksrc, wanted);
+ return wanted - rate;
+ }
+@@ -188,9 +191,13 @@
+ int src;
+ u32 ctrl;
+
++ host->mmc->actual_clock = 0;
++
+ /* don't bother if the clock is going off. */
+- if (clock == 0)
++ if (clock == 0) {
++ sdhci_set_clock(host, clock);
+ return;
++ }
+
+ for (src = 0; src < MAX_BUS_CLK; src++) {
+ delta = sdhci_s3c_consider_clock(ourhost, src, clock);
+@@ -240,6 +247,8 @@
+ if (clock < 25 * 1000000)
+ ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 | S3C_SDHCI_CTRL3_FCSEL2);
+ writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);
++
++ sdhci_set_clock(host, clock);
+ }
+
+ /**
+@@ -296,10 +305,11 @@
+ unsigned long timeout;
+ u16 clk = 0;
+
++ host->mmc->actual_clock = 0;
++
+ /* If the clock is going off, set to 0 at clock control register */
+ if (clock == 0) {
+ sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
+- host->clock = clock;
+ return;
+ }
+
+@@ -307,8 +317,6 @@
+
+ clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock);
+
+- host->clock = clock;
+-
+ clk = SDHCI_CLOCK_INT_EN;
+ sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
+
+@@ -330,14 +338,14 @@
+ }
+
+ /**
+- * sdhci_s3c_platform_bus_width - support 8bit buswidth
++ * sdhci_s3c_set_bus_width - support 8bit buswidth
+ * @host: The SDHCI host being queried
+ * @width: MMC_BUS_WIDTH_ macro for the bus width being requested
+ *
+ * We have 8-bit width support but is not a v3 controller.
+ * So we add platform_bus_width() and support 8bit width.
+ */
+-static int sdhci_s3c_platform_bus_width(struct sdhci_host *host, int width)
++static void sdhci_s3c_set_bus_width(struct sdhci_host *host, int width)
+ {
+ u8 ctrl;
+
+@@ -359,15 +367,15 @@
+ }
+
+ sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
+-
+- return 0;
+ }
+
+ static struct sdhci_ops sdhci_s3c_ops = {
+ .get_max_clock = sdhci_s3c_get_max_clk,
+ .set_clock = sdhci_s3c_set_clock,
+ .get_min_clock = sdhci_s3c_get_min_clock,
+- .platform_bus_width = sdhci_s3c_platform_bus_width,
++ .set_bus_width = sdhci_s3c_set_bus_width,
++ .reset = sdhci_reset,
++ .set_uhs_signaling = sdhci_set_uhs_signaling,
+ };
+
+ static void sdhci_s3c_notify_change(struct platform_device *dev, int state)
+@@ -617,8 +625,10 @@
+ /* Setup quirks for the controller */
+ host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
+ host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
+- if (drv_data)
++ if (drv_data) {
+ host->quirks |= drv_data->sdhci_quirks;
++ sc->no_divider = drv_data->no_divider;
++ }
+
+ #ifndef CONFIG_MMC_SDHCI_S3C_DMA
+
+@@ -667,7 +677,7 @@
+ * If controller does not have internal clock divider,
+ * we can use overriding functions instead of default.
+ */
+- if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) {
++ if (sc->no_divider) {
+ sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock;
+ sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock;
+ sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock;
+@@ -813,7 +823,7 @@
+
+ #if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS4212)
+ static struct sdhci_s3c_drv_data exynos4_sdhci_drv_data = {
+- .sdhci_quirks = SDHCI_QUIRK_NONSTANDARD_CLOCK,
++ .no_divider = true,
+ };
+ #define EXYNOS4_SDHCI_DRV_DATA ((kernel_ulong_t)&exynos4_sdhci_drv_data)
+ #else
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-sirf.c linux-3.14.54/drivers/mmc/host/sdhci-sirf.c
+--- linux-3.14.54.orig/drivers/mmc/host/sdhci-sirf.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-sirf.c 2015-10-15 15:51:25.176660308 +0200
+@@ -28,7 +28,11 @@
+ }
+
+ static struct sdhci_ops sdhci_sirf_ops = {
++ .set_clock = sdhci_set_clock,
+ .get_max_clock = sdhci_sirf_get_max_clk,
++ .set_bus_width = sdhci_set_bus_width,
++ .reset = sdhci_reset,
++ .set_uhs_signaling = sdhci_set_uhs_signaling,
+ };
+
+ static struct sdhci_pltfm_data sdhci_sirf_pdata = {
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-spear.c linux-3.14.54/drivers/mmc/host/sdhci-spear.c
+--- linux-3.14.54.orig/drivers/mmc/host/sdhci-spear.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-spear.c 2015-10-15 15:51:25.176660308 +0200
+@@ -37,7 +37,10 @@
+
+ /* sdhci ops */
+ static const struct sdhci_ops sdhci_pltfm_ops = {
+- /* Nothing to do for now. */
++ .set_clock = sdhci_set_clock,
++ .set_bus_width = sdhci_set_bus_width,
++ .reset = sdhci_reset,
++ .set_uhs_signaling = sdhci_set_uhs_signaling,
+ };
+
+ /* gpio card detection interrupt handler */
+diff -Nur linux-3.14.54.orig/drivers/mmc/host/sdhci-tegra.c linux-3.14.54/drivers/mmc/host/sdhci-tegra.c
+--- linux-3.14.54.orig/drivers/mmc/host/sdhci-tegra.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/mmc/host/sdhci-tegra.c 2015-10-15 15:51:25.176660308 +0200
+@@ -48,19 +48,6 @@
+ int power_gpio;
+ };
+
+-static u32 tegra_sdhci_readl(struct sdhci_host *host, int reg)
+-{
+- u32 val;
+-
+- if (unlikely(reg == SDHCI_PRESENT_STATE)) {
+- /* Use wp_gpio here instead? */
+- val = readl(host->ioaddr + reg);
+- return val | SDHCI_WRITE_PROTECT;
+- }
+-
+- return readl(host->ioaddr + reg);
+-}
+-
+ static u16 tegra_sdhci_readw(struct sdhci_host *host, int reg)
+ {
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+@@ -108,12 +95,14 @@
+ return mmc_gpio_get_ro(host->mmc);
+ }
+
+-static void tegra_sdhci_reset_exit(struct sdhci_host *host, u8 mask)
++static void tegra_sdhci_reset(struct sdhci_host *host, u8 mask)
+ {
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ struct sdhci_tegra *tegra_host = pltfm_host->priv;
+ const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data;
+
++ sdhci_reset(host, mask);
++
+ if (!(mask & SDHCI_RESET_ALL))
+ return;
+
+@@ -127,7 +116,7 @@
+ }
+ }
+
+-static int tegra_sdhci_buswidth(struct sdhci_host *host, int bus_width)
++static void tegra_sdhci_set_bus_width(struct sdhci_host *host, int bus_width)
+ {
+ u32 ctrl;
+
+@@ -144,16 +133,16 @@
+ ctrl &= ~SDHCI_CTRL_4BITBUS;
+ }
+ sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
+- return 0;
+ }
+
+ static const struct sdhci_ops tegra_sdhci_ops = {
+ .get_ro = tegra_sdhci_get_ro,
+- .read_l = tegra_sdhci_readl,
+ .read_w = tegra_sdhci_readw,
+ .write_l = tegra_sdhci_writel,
+- .platform_bus_width = tegra_sdhci_buswidth,
+- .platform_reset_exit = tegra_sdhci_reset_exit,
++ .set_clock = sdhci_set_clock,
++ .set_bus_width = tegra_sdhci_set_bus_width,
++ .reset = tegra_sdhci_reset,
++ .set_uhs_signaling = sdhci_set_uhs_signaling,
+ };
+
+ static const struct sdhci_pltfm_data sdhci_tegra20_pdata = {
diff -Nur linux-3.14.54.orig/drivers/mtd/chips/cfi_cmdset_0002.c linux-3.14.54/drivers/mtd/chips/cfi_cmdset_0002.c
--- linux-3.14.54.orig/drivers/mtd/chips/cfi_cmdset_0002.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mtd/chips/cfi_cmdset_0002.c 2015-10-12 10:56:18.040351162 +0200
++++ linux-3.14.54/drivers/mtd/chips/cfi_cmdset_0002.c 2015-10-15 15:51:25.176660308 +0200
@@ -1058,17 +1058,13 @@
#define UDELAY(map, chip, adr, usec) \
@@ -98799,7 +98781,7 @@ diff -Nur linux-3.14.54.orig/drivers/mtd/chips/cfi_cmdset_0002.c linux-3.14.54/d
#endif
diff -Nur linux-3.14.54.orig/drivers/mtd/ubi/build.c linux-3.14.54/drivers/mtd/ubi/build.c
--- linux-3.14.54.orig/drivers/mtd/ubi/build.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/mtd/ubi/build.c 2015-10-12 10:56:18.041351162 +0200
++++ linux-3.14.54/drivers/mtd/ubi/build.c 2015-10-15 15:51:25.176660308 +0200
@@ -640,7 +640,7 @@
dbg_gen("sizeof(struct ubi_ainf_peb) %zu", sizeof(struct ubi_ainf_peb));
dbg_gen("sizeof(struct ubi_wl_entry) %zu", sizeof(struct ubi_wl_entry));
@@ -98809,52 +98791,9 @@ diff -Nur linux-3.14.54.orig/drivers/mtd/ubi/build.c linux-3.14.54/drivers/mtd/u
/*
* Some flashes have several erase regions. Different regions
* may have different eraseblock size and other
-diff -Nur linux-3.14.54.orig/drivers/mxc/Kconfig linux-3.14.54/drivers/mxc/Kconfig
---- linux-3.14.54.orig/drivers/mxc/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/Kconfig 2015-10-12 10:56:18.111351156 +0200
-@@ -0,0 +1,24 @@
-+# drivers/mxc/Kconfig
-+
-+if ARCH_MXC
-+
-+menu "MXC support drivers"
-+
-+config MXC_IPU
-+ bool "Image Processing Unit Driver"
-+ select MXC_IPU_V3
-+ help
-+ If you plan to use the Image Processing unit, say
-+ Y here. IPU is needed by Framebuffer and V4L2 drivers.
-+
-+source "drivers/mxc/gpu-viv/Kconfig"
-+source "drivers/mxc/ipu3/Kconfig"
-+source "drivers/mxc/asrc/Kconfig"
-+source "drivers/mxc/vpu/Kconfig"
-+source "drivers/mxc/hdmi-cec/Kconfig"
-+source "drivers/mxc/mipi/Kconfig"
-+source "drivers/mxc/mlb/Kconfig"
-+
-+endmenu
-+
-+endif
-diff -Nur linux-3.14.54.orig/drivers/mxc/Makefile linux-3.14.54/drivers/mxc/Makefile
---- linux-3.14.54.orig/drivers/mxc/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/Makefile 2015-10-12 10:56:18.111351156 +0200
-@@ -0,0 +1,11 @@
-+ifeq ($(CONFIG_MXC_GPU_VIV_V5),y)
-+obj-$(CONFIG_MXC_GPU_VIV) += gpu-viv/v5/
-+else
-+obj-$(CONFIG_MXC_GPU_VIV) += gpu-viv/v4/
-+endif
-+obj-$(CONFIG_MXC_IPU_V3) += ipu3/
-+obj-$(CONFIG_MXC_ASRC) += asrc/
-+obj-$(CONFIG_MXC_VPU) += vpu/
-+obj-$(CONFIG_MXC_HDMI_CEC) += hdmi-cec/
-+obj-$(CONFIG_MXC_MIPI_CSI2) += mipi/
-+obj-$(CONFIG_MXC_MLB) += mlb/
diff -Nur linux-3.14.54.orig/drivers/mxc/asrc/Kconfig linux-3.14.54/drivers/mxc/asrc/Kconfig
--- linux-3.14.54.orig/drivers/mxc/asrc/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/asrc/Kconfig 2015-10-12 10:56:18.041351162 +0200
++++ linux-3.14.54/drivers/mxc/asrc/Kconfig 2015-10-15 15:51:25.176660308 +0200
@@ -0,0 +1,14 @@
+#
+# ASRC configuration
@@ -98872,7 +98811,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/asrc/Kconfig linux-3.14.54/drivers/mxc/
+endmenu
diff -Nur linux-3.14.54.orig/drivers/mxc/asrc/Makefile linux-3.14.54/drivers/mxc/asrc/Makefile
--- linux-3.14.54.orig/drivers/mxc/asrc/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/asrc/Makefile 2015-10-12 10:56:18.041351162 +0200
++++ linux-3.14.54/drivers/mxc/asrc/Makefile 2015-10-15 15:51:25.176660308 +0200
@@ -0,0 +1,4 @@
+#
+# Makefile for the kernel Asynchronous Sample Rate Converter driver
@@ -98880,7 +98819,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/asrc/Makefile linux-3.14.54/drivers/mxc
+obj-$(CONFIG_MXC_ASRC) += mxc_asrc.o
diff -Nur linux-3.14.54.orig/drivers/mxc/asrc/mxc_asrc.c linux-3.14.54/drivers/mxc/asrc/mxc_asrc.c
--- linux-3.14.54.orig/drivers/mxc/asrc/mxc_asrc.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/asrc/mxc_asrc.c 2015-10-12 10:56:18.042351161 +0200
++++ linux-3.14.54/drivers/mxc/asrc/mxc_asrc.c 2015-10-15 15:51:25.180660044 +0200
@@ -0,0 +1,1957 @@
+/*
+ * Freescale Asynchronous Sample Rate Converter (ASRC) driver
@@ -100841,7 +100780,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/asrc/mxc_asrc.c linux-3.14.54/drivers/m
+MODULE_ALIAS("platform:mxc_asrc");
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/Kconfig linux-3.14.54/drivers/mxc/gpu-viv/Kconfig
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/Kconfig 2015-10-12 10:56:18.042351161 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/Kconfig 2015-10-15 15:51:25.180660044 +0200
@@ -0,0 +1,20 @@
+menu "MXC Vivante GPU support"
+ depends on SOC_IMX6Q
@@ -100863,249 +100802,9 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/Kconfig linux-3.14.54/drivers/m
+endchoice
+
+endmenu
-diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/Kbuild linux-3.14.54/drivers/mxc/gpu-viv/v4/Kbuild
---- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/Kbuild 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/Kbuild 2015-10-12 10:56:18.072351159 +0200
-@@ -0,0 +1,236 @@
-+##############################################################################
-+#
-+# Copyright (C) 2005 - 2013 by Vivante Corp.
-+#
-+# This program is free software; you can redistribute it and/or modify
-+# it under the terms of the GNU General Public License as published by
-+# the Free Software Foundation; either version 2 of the license, or
-+# (at your option) any later version.
-+#
-+# This program is distributed in the hope that it will be useful,
-+# but WITHOUT ANY WARRANTY; without even the implied warranty of
-+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+# GNU General Public License for more details.
-+#
-+# You should have received a copy of the GNU General Public License
-+# along with this program; if not write to the Free Software
-+# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-+#
-+##############################################################################
-+
-+
-+#
-+# Linux build file for kernel HAL driver.
-+#
-+
-+AQROOT := $(srctree)/drivers/mxc/gpu-viv/v4
-+AQARCH := $(AQROOT)/arch/XAQ2
-+AQVGARCH := $(AQROOT)/arch/GC350
-+
-+include $(AQROOT)/config
-+
-+KERNEL_DIR ?= $(TOOL_DIR)/kernel
-+
-+OS_KERNEL_DIR := hal/os/linux/kernel
-+ARCH_KERNEL_DIR := arch/$(notdir $(AQARCH))/hal/kernel
-+ARCH_VG_KERNEL_DIR := arch/$(notdir $(AQVGARCH))/hal/kernel
-+HAL_KERNEL_DIR := hal/kernel
-+
-+# EXTRA_CFLAGS += -Werror
-+
-+OBJS := $(OS_KERNEL_DIR)/gc_hal_kernel_device.o \
-+ $(OS_KERNEL_DIR)/gc_hal_kernel_driver.o \
-+ $(OS_KERNEL_DIR)/gc_hal_kernel_linux.o \
-+ $(OS_KERNEL_DIR)/gc_hal_kernel_math.o \
-+ $(OS_KERNEL_DIR)/gc_hal_kernel_os.o \
-+ $(OS_KERNEL_DIR)/gc_hal_kernel_debugfs.o
-+
-+OBJS += $(HAL_KERNEL_DIR)/gc_hal_kernel.o \
-+ $(HAL_KERNEL_DIR)/gc_hal_kernel_command.o \
-+ $(HAL_KERNEL_DIR)/gc_hal_kernel_db.o \
-+ $(HAL_KERNEL_DIR)/gc_hal_kernel_debug.o \
-+ $(HAL_KERNEL_DIR)/gc_hal_kernel_event.o \
-+ $(HAL_KERNEL_DIR)/gc_hal_kernel_heap.o \
-+ $(HAL_KERNEL_DIR)/gc_hal_kernel_mmu.o \
-+ $(HAL_KERNEL_DIR)/gc_hal_kernel_video_memory.o \
-+ $(HAL_KERNEL_DIR)/gc_hal_kernel_power.o
-+
-+OBJS += $(ARCH_KERNEL_DIR)/gc_hal_kernel_context.o \
-+ $(ARCH_KERNEL_DIR)/gc_hal_kernel_hardware.o
-+
-+ifeq ($(VIVANTE_ENABLE_VG), 1)
-+OBJS +=\
-+ $(HAL_KERNEL_DIR)/gc_hal_kernel_vg.o\
-+ $(HAL_KERNEL_DIR)/gc_hal_kernel_command_vg.o\
-+ $(HAL_KERNEL_DIR)/gc_hal_kernel_interrupt_vg.o\
-+ $(HAL_KERNEL_DIR)/gc_hal_kernel_mmu_vg.o\
-+ $(ARCH_VG_KERNEL_DIR)/gc_hal_kernel_hardware_command_vg.o\
-+ $(ARCH_VG_KERNEL_DIR)/gc_hal_kernel_hardware_vg.o
-+endif
-+
-+ifneq ($(CONFIG_SYNC),)
-+OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_sync.o
-+endif
-+
-+ifeq ($(KERNELRELEASE), )
-+
-+.PHONY: all clean install
-+
-+# Define targets.
-+all:
-+ @make V=$(V) ARCH=$(ARCH_TYPE) -C $(KERNEL_DIR) SUBDIRS=`pwd` modules
-+
-+clean:
-+ @rm -rf $(OBJS)
-+ @rm -rf modules.order Module.symvers
-+ @find $(AQROOT) -name ".gc_*.cmd" | xargs rm -f
-+
-+install: all
-+ @mkdir -p $(SDK_DIR)/drivers
-+
-+else
-+
-+
-+EXTRA_CFLAGS += -DLINUX -DDRIVER
-+
-+ifeq ($(ENUM_WORKAROUND), 1)
-+EXTRA_CFLAGS += -DENUM_WORKAROUND=1
-+else
-+EXTRA_CFLAGS += -DENUM_WORKAROUND=0
-+endif
-+
-+ifeq ($(FLAREON),1)
-+EXTRA_CFLAGS += -DFLAREON
-+endif
-+
-+ifeq ($(DEBUG), 1)
-+EXTRA_CFLAGS += -DDBG=1 -DDEBUG -D_DEBUG
-+else
-+EXTRA_CFLAGS += -DDBG=0
-+endif
-+
-+ifeq ($(NO_DMA_COHERENT), 1)
-+EXTRA_CFLAGS += -DNO_DMA_COHERENT
-+endif
-+
-+ifeq ($(CONFIG_DOVE_GPU), 1)
-+EXTRA_CFLAGS += -DCONFIG_DOVE_GPU=1
-+endif
-+
-+ifneq ($(USE_PLATFORM_DRIVER), 0)
-+EXTRA_CFLAGS += -DUSE_PLATFORM_DRIVER=1
-+else
-+EXTRA_CFLAGS += -DUSE_PLATFORM_DRIVER=0
-+endif
-+
-+
-+EXTRA_CFLAGS += -DVIVANTE_PROFILER=1
-+EXTRA_CFLAGS += -DVIVANTE_PROFILER_CONTEXT=1
-+
-+
-+ifeq ($(ANDROID), 1)
-+EXTRA_CFLAGS += -DANDROID=1
-+endif
-+
-+ifeq ($(ENABLE_GPU_CLOCK_BY_DRIVER), 1)
-+EXTRA_CFLAGS += -DENABLE_GPU_CLOCK_BY_DRIVER=1
-+else
-+EXTRA_CFLAGS += -DENABLE_GPU_CLOCK_BY_DRIVER=0
-+endif
-+
-+ifeq ($(USE_NEW_LINUX_SIGNAL), 1)
-+EXTRA_CFLAGS += -DUSE_NEW_LINUX_SIGNAL=1
-+else
-+EXTRA_CFLAGS += -DUSE_NEW_LINUX_SIGNAL=0
-+endif
-+
-+ifeq ($(NO_USER_DIRECT_ACCESS_FROM_KERNEL), 1)
-+EXTRA_CFLAGS += -DNO_USER_DIRECT_ACCESS_FROM_KERNEL=1
-+else
-+EXTRA_CFLAGS += -DNO_USER_DIRECT_ACCESS_FROM_KERNEL=0
-+endif
-+
-+ifeq ($(FORCE_ALL_VIDEO_MEMORY_CACHED), 1)
-+EXTRA_CFLAGS += -DgcdPAGED_MEMORY_CACHEABLE=1
-+else
-+EXTRA_CFLAGS += -DgcdPAGED_MEMORY_CACHEABLE=0
-+endif
-+
-+ifeq ($(NONPAGED_MEMORY_CACHEABLE), 1)
-+EXTRA_CFLAGS += -DgcdNONPAGED_MEMORY_CACHEABLE=1
-+else
-+EXTRA_CFLAGS += -DgcdNONPAGED_MEMORY_CACHEABLE=0
-+endif
-+
-+ifeq ($(NONPAGED_MEMORY_BUFFERABLE), 1)
-+EXTRA_CFLAGS += -DgcdNONPAGED_MEMORY_BUFFERABLE=1
-+else
-+EXTRA_CFLAGS += -DgcdNONPAGED_MEMORY_BUFFERABLE=0
-+endif
-+
-+ifeq ($(CACHE_FUNCTION_UNIMPLEMENTED), 1)
-+EXTRA_CFLAGS += -DgcdCACHE_FUNCTION_UNIMPLEMENTED=1
-+else
-+EXTRA_CFLAGS += -DgcdCACHE_FUNCTION_UNIMPLEMENTED=0
-+endif
-+
-+ifeq ($(SUPPORT_SWAP_RECTANGLE), 1)
-+EXTRA_CFLAGS += -DgcdSUPPORT_SWAP_RECTANGLE=1
-+else
-+EXTRA_CFLAGS += -DgcdSUPPORT_SWAP_RECTANGLE=0
-+endif
-+
-+ifeq ($(VIVANTE_ENABLE_VG), 1)
-+EXTRA_CFLAGS += -DgcdENABLE_VG=1
-+else
-+EXTRA_CFLAGS += -DgcdENABLE_VG=0
-+endif
-+
-+ifeq ($(CONFIG_SMP), y)
-+EXTRA_CFLAGS += -DgcdSMP=1
-+else
-+EXTRA_CFLAGS += -DgcdSMP=0
-+endif
-+
-+ifeq ($(VIVANTE_NO_3D),1)
-+EXTRA_CFLAGS += -DVIVANTE_NO_3D
-+endif
-+
-+ifeq ($(ENABLE_OUTER_CACHE_PATCH), 1)
-+EXTRA_CFLAGS += -DgcdENABLE_OUTER_CACHE_PATCH=1
-+else
-+EXTRA_CFLAGS += -DgcdENABLE_OUTER_CACHE_PATCH=0
-+endif
-+
-+ifeq ($(USE_BANK_ALIGNMENT), 1)
-+ EXTRA_CFLAGS += -DgcdENABLE_BANK_ALIGNMENT=1
-+ ifneq ($(BANK_BIT_START), 0)
-+ ifneq ($(BANK_BIT_END), 0)
-+ EXTRA_CFLAGS += -DgcdBANK_BIT_START=$(BANK_BIT_START)
-+ EXTRA_CFLAGS += -DgcdBANK_BIT_END=$(BANK_BIT_END)
-+ endif
-+ endif
-+
-+ ifneq ($(BANK_CHANNEL_BIT), 0)
-+ EXTRA_CFLAGS += -DgcdBANK_CHANNEL_BIT=$(BANK_CHANNEL_BIT)
-+ endif
-+endif
-+
-+ifneq ($(CONFIG_SYNC),)
-+EXTRA_CFLAGS += -DgcdANDROID_NATIVE_FENCE_SYNC=1
-+endif
-+
-+EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel/inc
-+EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel
-+EXTRA_CFLAGS += -I$(AQARCH)/hal/kernel
-+EXTRA_CFLAGS += -I$(AQROOT)/hal/os/linux/kernel
-+
-+ifeq ($(VIVANTE_ENABLE_VG), 1)
-+EXTRA_CFLAGS += -I$(AQVGARCH)/hal/kernel
-+endif
-+
-+obj-$(CONFIG_MXC_GPU_VIV) += galcore.o
-+
-+galcore-objs := $(OBJS)
-+
-+endif
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_command_vg.c linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_command_vg.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_command_vg.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_command_vg.c 2015-10-12 10:56:18.042351161 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_command_vg.c 2015-10-15 15:51:25.180660044 +0200
@@ -0,0 +1,932 @@
+/****************************************************************************
+*
@@ -102041,7 +101740,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_command_vg.h linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_command_vg.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_command_vg.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_command_vg.h 2015-10-12 10:56:18.043351161 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_command_vg.h 2015-10-15 15:51:25.180660044 +0200
@@ -0,0 +1,319 @@
+/****************************************************************************
+*
@@ -102364,7 +102063,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.c linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.c 2015-10-12 10:56:18.043351161 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.c 2015-10-15 15:51:25.180660044 +0200
@@ -0,0 +1,2114 @@
+/****************************************************************************
+*
@@ -104482,7 +104181,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.h linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.h 2015-10-12 10:56:18.044351161 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal_kernel_hardware_vg.h 2015-10-15 15:51:25.180660044 +0200
@@ -0,0 +1,75 @@
+/****************************************************************************
+*
@@ -104561,7 +104260,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/GC350/hal/kernel/gc_hal
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_context.c linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_context.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_context.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_context.c 2015-10-12 10:56:18.045351161 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_context.c 2015-10-15 15:51:25.184659780 +0200
@@ -0,0 +1,1735 @@
+/****************************************************************************
+*
@@ -106300,7 +105999,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_context.h linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_context.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_context.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_context.h 2015-10-12 10:56:18.045351161 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_context.h 2015-10-15 15:51:25.184659780 +0200
@@ -0,0 +1,157 @@
+/****************************************************************************
+*
@@ -106461,7 +106160,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c 2015-10-12 10:56:18.048351161 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c 2015-10-15 15:51:25.188659517 +0200
@@ -0,0 +1,7280 @@
+/****************************************************************************
+*
@@ -113745,7 +113444,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.h linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.h 2015-10-12 10:56:18.048351161 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.h 2015-10-15 15:51:25.188659517 +0200
@@ -0,0 +1,136 @@
+/****************************************************************************
+*
@@ -113885,7 +113584,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/arch/XAQ2/hal/kernel/gc_hal_
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/config linux-3.14.54/drivers/mxc/gpu-viv/v4/config
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/config 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/config 2015-10-12 10:56:18.049351161 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/config 2015-10-15 15:51:25.188659517 +0200
@@ -0,0 +1,38 @@
+##############################################################################
+#
@@ -113927,7 +113626,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/config linux-3.14.54/drivers
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel.c 2015-10-12 10:56:18.050351161 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel.c 2015-10-15 15:51:25.188659517 +0200
@@ -0,0 +1,3967 @@
+/****************************************************************************
+*
@@ -117896,1024 +117595,9 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel.c l
+***** Test Code ****************************************************************
+*******************************************************************************/
+
-diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel.h
---- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel.h 2015-10-12 10:56:18.055351160 +0200
-@@ -0,0 +1,1011 @@
-+/****************************************************************************
-+*
-+* Copyright (C) 2005 - 2013 by Vivante Corp.
-+*
-+* This program is free software; you can redistribute it and/or modify
-+* it under the terms of the GNU General Public License as published by
-+* the Free Software Foundation; either version 2 of the license, or
-+* (at your option) any later version.
-+*
-+* This program is distributed in the hope that it will be useful,
-+* but WITHOUT ANY WARRANTY; without even the implied warranty of
-+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+* GNU General Public License for more details.
-+*
-+* You should have received a copy of the GNU General Public License
-+* along with this program; if not write to the Free Software
-+* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-+*
-+*****************************************************************************/
-+
-+
-+#ifndef __gc_hal_kernel_h_
-+#define __gc_hal_kernel_h_
-+
-+#include <linux/spinlock.h>
-+
-+#include "gc_hal.h"
-+#include "gc_hal_kernel_hardware.h"
-+#include "gc_hal_driver.h"
-+
-+#if gcdENABLE_VG
-+#include "gc_hal_kernel_vg.h"
-+#endif
-+
-+#ifdef __cplusplus
-+extern "C" {
-+#endif
-+
-+
-+/*******************************************************************************
-+***** New MMU Defination *******************************************************/
-+#define gcdMMU_MTLB_SHIFT 22
-+#define gcdMMU_STLB_4K_SHIFT 12
-+#define gcdMMU_STLB_64K_SHIFT 16
-+
-+#define gcdMMU_MTLB_BITS (32 - gcdMMU_MTLB_SHIFT)
-+#define gcdMMU_PAGE_4K_BITS gcdMMU_STLB_4K_SHIFT
-+#define gcdMMU_STLB_4K_BITS (32 - gcdMMU_MTLB_BITS - gcdMMU_PAGE_4K_BITS)
-+#define gcdMMU_PAGE_64K_BITS gcdMMU_STLB_64K_SHIFT
-+#define gcdMMU_STLB_64K_BITS (32 - gcdMMU_MTLB_BITS - gcdMMU_PAGE_64K_BITS)
-+
-+#define gcdMMU_MTLB_ENTRY_NUM (1 << gcdMMU_MTLB_BITS)
-+#define gcdMMU_MTLB_SIZE (gcdMMU_MTLB_ENTRY_NUM << 2)
-+#define gcdMMU_STLB_4K_ENTRY_NUM (1 << gcdMMU_STLB_4K_BITS)
-+#define gcdMMU_STLB_4K_SIZE (gcdMMU_STLB_4K_ENTRY_NUM << 2)
-+#define gcdMMU_PAGE_4K_SIZE (1 << gcdMMU_STLB_4K_SHIFT)
-+#define gcdMMU_STLB_64K_ENTRY_NUM (1 << gcdMMU_STLB_64K_BITS)
-+#define gcdMMU_STLB_64K_SIZE (gcdMMU_STLB_64K_ENTRY_NUM << 2)
-+#define gcdMMU_PAGE_64K_SIZE (1 << gcdMMU_STLB_64K_SHIFT)
-+
-+#define gcdMMU_MTLB_MASK (~((1U << gcdMMU_MTLB_SHIFT)-1))
-+#define gcdMMU_STLB_4K_MASK ((~0U << gcdMMU_STLB_4K_SHIFT) ^ gcdMMU_MTLB_MASK)
-+#define gcdMMU_PAGE_4K_MASK (gcdMMU_PAGE_4K_SIZE - 1)
-+#define gcdMMU_STLB_64K_MASK ((~((1U << gcdMMU_STLB_64K_SHIFT)-1)) ^ gcdMMU_MTLB_MASK)
-+#define gcdMMU_PAGE_64K_MASK (gcdMMU_PAGE_64K_SIZE - 1)
-+
-+/* Page offset definitions. */
-+#define gcdMMU_OFFSET_4K_BITS (32 - gcdMMU_MTLB_BITS - gcdMMU_STLB_4K_BITS)
-+#define gcdMMU_OFFSET_4K_MASK ((1U << gcdMMU_OFFSET_4K_BITS) - 1)
-+#define gcdMMU_OFFSET_16K_BITS (32 - gcdMMU_MTLB_BITS - gcdMMU_STLB_16K_BITS)
-+#define gcdMMU_OFFSET_16K_MASK ((1U << gcdMMU_OFFSET_16K_BITS) - 1)
-+
-+/*******************************************************************************
-+***** Process Secure Cache ****************************************************/
-+
-+#define gcdSECURE_CACHE_LRU 1
-+#define gcdSECURE_CACHE_LINEAR 2
-+#define gcdSECURE_CACHE_HASH 3
-+#define gcdSECURE_CACHE_TABLE 4
-+
-+typedef struct _gcskLOGICAL_CACHE * gcskLOGICAL_CACHE_PTR;
-+typedef struct _gcskLOGICAL_CACHE gcskLOGICAL_CACHE;
-+struct _gcskLOGICAL_CACHE
-+{
-+ /* Logical address. */
-+ gctPOINTER logical;
-+
-+ /* DMAable address. */
-+ gctUINT32 dma;
-+
-+#if gcdSECURE_CACHE_METHOD == gcdSECURE_CACHE_HASH
-+ /* Pointer to the previous and next hash tables. */
-+ gcskLOGICAL_CACHE_PTR nextHash;
-+ gcskLOGICAL_CACHE_PTR prevHash;
-+#endif
-+
-+#if gcdSECURE_CACHE_METHOD != gcdSECURE_CACHE_TABLE
-+ /* Pointer to the previous and next slot. */
-+ gcskLOGICAL_CACHE_PTR next;
-+ gcskLOGICAL_CACHE_PTR prev;
-+#endif
-+
-+#if gcdSECURE_CACHE_METHOD == gcdSECURE_CACHE_LINEAR
-+ /* Time stamp. */
-+ gctUINT64 stamp;
-+#endif
-+};
-+
-+typedef struct _gcskSECURE_CACHE * gcskSECURE_CACHE_PTR;
-+typedef struct _gcskSECURE_CACHE
-+{
-+ /* Cache memory. */
-+ gcskLOGICAL_CACHE cache[1 + gcdSECURE_CACHE_SLOTS];
-+
-+ /* Last known index for LINEAR mode. */
-+ gcskLOGICAL_CACHE_PTR cacheIndex;
-+
-+ /* Current free slot for LINEAR mode. */
-+ gctUINT32 cacheFree;
-+
-+ /* Time stamp for LINEAR mode. */
-+ gctUINT64 cacheStamp;
-+
-+#if gcdSECURE_CACHE_METHOD == gcdSECURE_CACHE_HASH
-+ /* Hash table for HASH mode. */
-+ gcskLOGICAL_CACHE hash[256];
-+#endif
-+}
-+gcskSECURE_CACHE;
-+
-+/*******************************************************************************
-+***** Process Database Management *********************************************/
-+
-+typedef enum _gceDATABASE_TYPE
-+{
-+ gcvDB_VIDEO_MEMORY = 1, /* Video memory created. */
-+ gcvDB_COMMAND_BUFFER, /* Command Buffer. */
-+ gcvDB_NON_PAGED, /* Non paged memory. */
-+ gcvDB_CONTIGUOUS, /* Contiguous memory. */
-+ gcvDB_SIGNAL, /* Signal. */
-+ gcvDB_VIDEO_MEMORY_LOCKED, /* Video memory locked. */
-+ gcvDB_CONTEXT, /* Context */
-+ gcvDB_IDLE, /* GPU idle. */
-+ gcvDB_MAP_MEMORY, /* Map memory */
-+ gcvDB_SHARED_INFO, /* Private data */
-+ gcvDB_MAP_USER_MEMORY, /* Map user memory */
-+ gcvDB_SYNC_POINT, /* Sync point. */
-+ gcvDB_VIDEO_MEMORY_RESERVED, /* Reserved video memory */
-+ gcvDB_VIDEO_MEMORY_CONTIGUOUS, /* Contiguous video memory */
-+ gcvDB_VIDEO_MEMORY_VIRTUAL, /* Virtual video memory */
-+}
-+gceDATABASE_TYPE;
-+
-+typedef struct _gcsDATABASE_RECORD * gcsDATABASE_RECORD_PTR;
-+typedef struct _gcsDATABASE_RECORD
-+{
-+ /* Pointer to kernel. */
-+ gckKERNEL kernel;
-+
-+ /* Pointer to next database record. */
-+ gcsDATABASE_RECORD_PTR next;
-+
-+ /* Type of record. */
-+ gceDATABASE_TYPE type;
-+
-+ /* Data for record. */
-+ gctPOINTER data;
-+ gctPHYS_ADDR physical;
-+ gctSIZE_T bytes;
-+}
-+gcsDATABASE_RECORD;
-+
-+typedef struct _gcsDATABASE * gcsDATABASE_PTR;
-+typedef struct _gcsDATABASE
-+{
-+ /* Pointer to next entry is hash list. */
-+ gcsDATABASE_PTR next;
-+ gctSIZE_T slot;
-+
-+ /* Process ID. */
-+ gctUINT32 processID;
-+
-+ /* Sizes to query. */
-+ gcsDATABASE_COUNTERS vidMem;
-+ gcsDATABASE_COUNTERS nonPaged;
-+ gcsDATABASE_COUNTERS contiguous;
-+ gcsDATABASE_COUNTERS mapUserMemory;
-+ gcsDATABASE_COUNTERS mapMemory;
-+ gcsDATABASE_COUNTERS vidMemResv;
-+ gcsDATABASE_COUNTERS vidMemCont;
-+ gcsDATABASE_COUNTERS vidMemVirt;
-+
-+ /* Idle time management. */
-+ gctUINT64 lastIdle;
-+ gctUINT64 idle;
-+
-+ /* Pointer to database. */
-+ gcsDATABASE_RECORD_PTR list[48];
-+
-+#if gcdSECURE_USER
-+ /* Secure cache. */
-+ gcskSECURE_CACHE cache;
-+#endif
-+
-+ gctPOINTER handleDatabase;
-+ gctPOINTER handleDatabaseMutex;
-+}
-+gcsDATABASE;
-+
-+/* Create a process database that will contain all its allocations. */
-+gceSTATUS
-+gckKERNEL_CreateProcessDB(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID
-+ );
-+
-+/* Add a record to the process database. */
-+gceSTATUS
-+gckKERNEL_AddProcessDB(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ IN gceDATABASE_TYPE Type,
-+ IN gctPOINTER Pointer,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Size
-+ );
-+
-+/* Remove a record to the process database. */
-+gceSTATUS
-+gckKERNEL_RemoveProcessDB(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ IN gceDATABASE_TYPE Type,
-+ IN gctPOINTER Pointer
-+ );
-+
-+/* Destroy the process database. */
-+gceSTATUS
-+gckKERNEL_DestroyProcessDB(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID
-+ );
-+
-+/* Find a record to the process database. */
-+gceSTATUS
-+gckKERNEL_FindProcessDB(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ IN gctUINT32 ThreadID,
-+ IN gceDATABASE_TYPE Type,
-+ IN gctPOINTER Pointer,
-+ OUT gcsDATABASE_RECORD_PTR Record
-+ );
-+
-+/* Query the process database. */
-+gceSTATUS
-+gckKERNEL_QueryProcessDB(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ IN gctBOOL LastProcessID,
-+ IN gceDATABASE_TYPE Type,
-+ OUT gcuDATABASE_INFO * Info
-+ );
-+
-+/* Dump the process database. */
-+gceSTATUS
-+gckKERNEL_DumpProcessDB(
-+ IN gckKERNEL Kernel
-+ );
-+
-+/* ID database */
-+gceSTATUS
-+gckKERNEL_CreateIntegerDatabase(
-+ IN gckKERNEL Kernel,
-+ OUT gctPOINTER * Database
-+ );
-+
-+gceSTATUS
-+gckKERNEL_DestroyIntegerDatabase(
-+ IN gckKERNEL Kernel,
-+ IN gctPOINTER Database
-+ );
-+
-+gceSTATUS
-+gckKERNEL_AllocateIntegerId(
-+ IN gctPOINTER Database,
-+ IN gctPOINTER Pointer,
-+ OUT gctUINT32 * Id
-+ );
-+
-+gceSTATUS
-+gckKERNEL_FreeIntegerId(
-+ IN gctPOINTER Database,
-+ IN gctUINT32 Id
-+ );
-+
-+gceSTATUS
-+gckKERNEL_QueryIntegerId(
-+ IN gctPOINTER Database,
-+ IN gctUINT32 Id,
-+ OUT gctPOINTER * Pointer
-+ );
-+
-+gctUINT32
-+gckKERNEL_AllocateNameFromPointer(
-+ IN gckKERNEL Kernel,
-+ IN gctPOINTER Pointer
-+ );
-+
-+gctPOINTER
-+gckKERNEL_QueryPointerFromName(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 Name
-+ );
-+
-+gceSTATUS
-+gckKERNEL_DeleteName(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 Name
-+ );
-+
-+#if gcdSECURE_USER
-+/* Get secure cache from the process database. */
-+gceSTATUS
-+gckKERNEL_GetProcessDBCache(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ OUT gcskSECURE_CACHE_PTR * Cache
-+ );
-+#endif
-+
-+/*******************************************************************************
-+********* Timer Management ****************************************************/
-+typedef struct _gcsTIMER * gcsTIMER_PTR;
-+typedef struct _gcsTIMER
-+{
-+ /* Start and Stop time holders. */
-+ gctUINT64 startTime;
-+ gctUINT64 stopTime;
-+}
-+gcsTIMER;
-+
-+/******************************************************************************\
-+********************************** Structures **********************************
-+\******************************************************************************/
-+
-+/* gckDB object. */
-+struct _gckDB
-+{
-+ /* Database management. */
-+ gcsDATABASE_PTR db[16];
-+ gctPOINTER dbMutex;
-+ gcsDATABASE_PTR freeDatabase;
-+ gcsDATABASE_RECORD_PTR freeRecord;
-+ gcsDATABASE_PTR lastDatabase;
-+ gctUINT32 lastProcessID;
-+ gctUINT64 lastIdle;
-+ gctUINT64 idleTime;
-+ gctUINT64 lastSlowdown;
-+ gctUINT64 lastSlowdownIdle;
-+ /* ID - Pointer database*/
-+ gctPOINTER pointerDatabase;
-+ gctPOINTER pointerDatabaseMutex;
-+};
-+
-+#if gcdVIRTUAL_COMMAND_BUFFER
-+typedef struct _gckVIRTUAL_COMMAND_BUFFER * gckVIRTUAL_COMMAND_BUFFER_PTR;
-+typedef struct _gckVIRTUAL_COMMAND_BUFFER
-+{
-+ gctPHYS_ADDR physical;
-+ gctPOINTER userLogical;
-+ gctPOINTER kernelLogical;
-+ gctSIZE_T pageCount;
-+ gctPOINTER pageTable;
-+ gctUINT32 gpuAddress;
-+ gctUINT pid;
-+ gckVIRTUAL_COMMAND_BUFFER_PTR next;
-+ gckVIRTUAL_COMMAND_BUFFER_PTR prev;
-+ gckKERNEL kernel;
-+}
-+gckVIRTUAL_COMMAND_BUFFER;
-+#endif
-+
-+/* gckKERNEL object. */
-+struct _gckKERNEL
-+{
-+ /* Object. */
-+ gcsOBJECT object;
-+
-+ /* Pointer to gckOS object. */
-+ gckOS os;
-+
-+ /* Core */
-+ gceCORE core;
-+
-+ /* Pointer to gckHARDWARE object. */
-+ gckHARDWARE hardware;
-+
-+ /* Pointer to gckCOMMAND object. */
-+ gckCOMMAND command;
-+
-+ /* Pointer to gckEVENT object. */
-+ gckEVENT eventObj;
-+
-+ /* Pointer to context. */
-+ gctPOINTER context;
-+
-+ /* Pointer to gckMMU object. */
-+ gckMMU mmu;
-+
-+ /* Arom holding number of clients. */
-+ gctPOINTER atomClients;
-+
-+#if VIVANTE_PROFILER
-+ /* Enable profiling */
-+ gctBOOL profileEnable;
-+
-+ /* Clear profile register or not*/
-+ gctBOOL profileCleanRegister;
-+
-+#endif
-+
-+#ifdef QNX_SINGLE_THREADED_DEBUGGING
-+ gctPOINTER debugMutex;
-+#endif
-+
-+ /* Database management. */
-+ gckDB db;
-+ gctBOOL dbCreated;
-+
-+#if gcdENABLE_RECOVERY
-+ gctPOINTER resetFlagClearTimer;
-+ gctPOINTER resetAtom;
-+ gctUINT64 resetTimeStamp;
-+#endif
-+
-+ /* Pointer to gckEVENT object. */
-+ gcsTIMER timers[8];
-+ gctUINT32 timeOut;
-+
-+#if gcdENABLE_VG
-+ gckVGKERNEL vg;
-+#endif
-+
-+#if gcdVIRTUAL_COMMAND_BUFFER
-+ gckVIRTUAL_COMMAND_BUFFER_PTR virtualBufferHead;
-+ gckVIRTUAL_COMMAND_BUFFER_PTR virtualBufferTail;
-+ gctPOINTER virtualBufferLock;
-+#endif
-+
-+#if gcdDVFS
-+ gckDVFS dvfs;
-+#endif
-+
-+#if gcdANDROID_NATIVE_FENCE_SYNC
-+ gctHANDLE timeline;
-+#endif
-+
-+ spinlock_t irq_lock;
-+};
-+
-+struct _FrequencyHistory
-+{
-+ gctUINT32 frequency;
-+ gctUINT32 count;
-+};
-+
-+/* gckDVFS object. */
-+struct _gckDVFS
-+{
-+ gckOS os;
-+ gckHARDWARE hardware;
-+ gctPOINTER timer;
-+ gctUINT32 pollingTime;
-+ gctBOOL stop;
-+ gctUINT32 totalConfig;
-+ gctUINT32 loads[8];
-+ gctUINT8 currentScale;
-+ struct _FrequencyHistory frequencyHistory[16];
-+};
-+
-+/* gckCOMMAND object. */
-+struct _gckCOMMAND
-+{
-+ /* Object. */
-+ gcsOBJECT object;
-+
-+ /* Pointer to required object. */
-+ gckKERNEL kernel;
-+ gckOS os;
-+
-+ /* Number of bytes per page. */
-+ gctSIZE_T pageSize;
-+
-+ /* Current pipe select. */
-+ gcePIPE_SELECT pipeSelect;
-+
-+ /* Command queue running flag. */
-+ gctBOOL running;
-+
-+ /* Idle flag and commit stamp. */
-+ gctBOOL idle;
-+ gctUINT64 commitStamp;
-+
-+ /* Command queue mutex. */
-+ gctPOINTER mutexQueue;
-+
-+ /* Context switching mutex. */
-+ gctPOINTER mutexContext;
-+
-+#if VIVANTE_PROFILER_CONTEXT
-+ /* Context sequence mutex. */
-+ gctPOINTER mutexContextSeq;
-+#endif
-+
-+ /* Command queue power semaphore. */
-+ gctPOINTER powerSemaphore;
-+
-+ /* Current command queue. */
-+ struct _gcskCOMMAND_QUEUE
-+ {
-+ gctSIGNAL signal;
-+ gctPHYS_ADDR physical;
-+ gctPOINTER logical;
-+ }
-+ queues[gcdCOMMAND_QUEUES];
-+
-+ gctPHYS_ADDR physical;
-+ gctPOINTER logical;
-+ gctUINT32 offset;
-+ gctINT index;
-+#if gcmIS_DEBUG(gcdDEBUG_TRACE)
-+ gctUINT wrapCount;
-+#endif
-+
-+ /* The command queue is new. */
-+ gctBOOL newQueue;
-+
-+ /* Context management. */
-+ gckCONTEXT currContext;
-+
-+ /* Pointer to last WAIT command. */
-+ gctPHYS_ADDR waitPhysical;
-+ gctPOINTER waitLogical;
-+ gctSIZE_T waitSize;
-+
-+ /* Command buffer alignment. */
-+ gctSIZE_T alignment;
-+ gctSIZE_T reservedHead;
-+ gctSIZE_T reservedTail;
-+
-+ /* Commit counter. */
-+ gctPOINTER atomCommit;
-+
-+ /* Kernel process ID. */
-+ gctUINT32 kernelProcessID;
-+
-+ /* End Event signal. */
-+ gctSIGNAL endEventSignal;
-+
-+#if gcdSECURE_USER
-+ /* Hint array copy buffer. */
-+ gctBOOL hintArrayAllocated;
-+ gctUINT hintArraySize;
-+ gctUINT32_PTR hintArray;
-+#endif
-+};
-+
-+typedef struct _gcsEVENT * gcsEVENT_PTR;
-+
-+/* Structure holding one event to be processed. */
-+typedef struct _gcsEVENT
-+{
-+ /* Pointer to next event in queue. */
-+ gcsEVENT_PTR next;
-+
-+ /* Event information. */
-+ gcsHAL_INTERFACE info;
-+
-+ /* Process ID owning the event. */
-+ gctUINT32 processID;
-+
-+#ifdef __QNXNTO__
-+ /* Kernel. */
-+ gckKERNEL kernel;
-+#endif
-+
-+ gctBOOL fromKernel;
-+}
-+gcsEVENT;
-+
-+/* Structure holding a list of events to be processed by an interrupt. */
-+typedef struct _gcsEVENT_QUEUE * gcsEVENT_QUEUE_PTR;
-+typedef struct _gcsEVENT_QUEUE
-+{
-+ /* Time stamp. */
-+ gctUINT64 stamp;
-+
-+ /* Source of the event. */
-+ gceKERNEL_WHERE source;
-+
-+ /* Pointer to head of event queue. */
-+ gcsEVENT_PTR head;
-+
-+ /* Pointer to tail of event queue. */
-+ gcsEVENT_PTR tail;
-+
-+ /* Next list of events. */
-+ gcsEVENT_QUEUE_PTR next;
-+}
-+gcsEVENT_QUEUE;
-+
-+/*
-+ gcdREPO_LIST_COUNT defines the maximum number of event queues with different
-+ hardware module sources that may coexist at the same time. Only two sources
-+ are supported - gcvKERNEL_COMMAND and gcvKERNEL_PIXEL. gcvKERNEL_COMMAND
-+ source is used only for managing the kernel command queue and is only issued
-+ when the current command queue gets full. Since we commit event queues every
-+ time we commit command buffers, in the worst case we can have up to three
-+ pending event queues:
-+ - gcvKERNEL_PIXEL
-+ - gcvKERNEL_COMMAND (queue overflow)
-+ - gcvKERNEL_PIXEL
-+*/
-+#define gcdREPO_LIST_COUNT 3
-+
-+/* gckEVENT object. */
-+struct _gckEVENT
-+{
-+ /* The object. */
-+ gcsOBJECT object;
-+
-+ /* Pointer to required objects. */
-+ gckOS os;
-+ gckKERNEL kernel;
-+
-+ /* Time stamp. */
-+ gctUINT64 stamp;
-+ gctUINT64 lastCommitStamp;
-+
-+ /* Queue mutex. */
-+ gctPOINTER eventQueueMutex;
-+
-+ /* Array of event queues. */
-+ gcsEVENT_QUEUE queues[30];
-+ gctUINT8 lastID;
-+ gctPOINTER freeAtom;
-+
-+ /* Pending events. */
-+#if gcdSMP
-+ gctPOINTER pending;
-+#else
-+ volatile gctUINT pending;
-+#endif
-+
-+ /* List of free event structures and its mutex. */
-+ gcsEVENT_PTR freeEventList;
-+ gctSIZE_T freeEventCount;
-+ gctPOINTER freeEventMutex;
-+
-+ /* Event queues. */
-+ gcsEVENT_QUEUE_PTR queueHead;
-+ gcsEVENT_QUEUE_PTR queueTail;
-+ gcsEVENT_QUEUE_PTR freeList;
-+ gcsEVENT_QUEUE repoList[gcdREPO_LIST_COUNT];
-+ gctPOINTER eventListMutex;
-+
-+ gctPOINTER submitTimer;
-+
-+ volatile gctBOOL inNotify;
-+};
-+
-+/* Free all events belonging to a process. */
-+gceSTATUS
-+gckEVENT_FreeProcess(
-+ IN gckEVENT Event,
-+ IN gctUINT32 ProcessID
-+ );
-+
-+gceSTATUS
-+gckEVENT_Stop(
-+ IN gckEVENT Event,
-+ IN gctUINT32 ProcessID,
-+ IN gctPHYS_ADDR Handle,
-+ IN gctPOINTER Logical,
-+ IN gctSIGNAL Signal,
-+ IN OUT gctSIZE_T * waitSize
-+ );
-+
-+gceSTATUS
-+gckEVENT_WaitEmpty(
-+ IN gckEVENT Event
-+ );
-+
-+/* gcuVIDMEM_NODE structure. */
-+typedef union _gcuVIDMEM_NODE
-+{
-+ /* Allocated from gckVIDMEM. */
-+ struct _gcsVIDMEM_NODE_VIDMEM
-+ {
-+ /* Owner of this node. */
-+ gckVIDMEM memory;
-+
-+ /* Dual-linked list of nodes. */
-+ gcuVIDMEM_NODE_PTR next;
-+ gcuVIDMEM_NODE_PTR prev;
-+
-+ /* Dual linked list of free nodes. */
-+ gcuVIDMEM_NODE_PTR nextFree;
-+ gcuVIDMEM_NODE_PTR prevFree;
-+
-+ /* Information for this node. */
-+ gctUINT32 offset;
-+ gctSIZE_T bytes;
-+ gctUINT32 alignment;
-+
-+#ifdef __QNXNTO__
-+ /* Client/server vaddr (mapped using mmap_join). */
-+ gctPOINTER logical;
-+#endif
-+
-+ /* Locked counter. */
-+ gctINT32 locked;
-+
-+ /* Memory pool. */
-+ gcePOOL pool;
-+ gctUINT32 physical;
-+
-+ /* Process ID owning this memory. */
-+ gctUINT32 processID;
-+
-+ /* Prevent compositor from freeing until client unlocks. */
-+ gctBOOL freePending;
-+
-+ /* */
-+ gcsVIDMEM_NODE_SHARED_INFO sharedInfo;
-+
-+#if gcdDYNAMIC_MAP_RESERVED_MEMORY && gcdENABLE_VG
-+ gctPOINTER kernelVirtual;
-+#endif
-+
-+ /* Surface type. */
-+ gceSURF_TYPE type;
-+ }
-+ VidMem;
-+
-+ /* Allocated from gckOS. */
-+ struct _gcsVIDMEM_NODE_VIRTUAL
-+ {
-+ /* Pointer to gckKERNEL object. */
-+ gckKERNEL kernel;
-+
-+ /* Information for this node. */
-+ /* Contiguously allocated? */
-+ gctBOOL contiguous;
-+ /* mdl record pointer... a kmalloc address. Process agnostic. */
-+ gctPHYS_ADDR physical;
-+ gctSIZE_T bytes;
-+ /* do_mmap_pgoff address... mapped per-process. */
-+ gctPOINTER logical;
-+
-+ /* Page table information. */
-+ /* Used only when node is not contiguous */
-+ gctSIZE_T pageCount;
-+
-+ /* Used only when node is not contiguous */
-+ gctPOINTER pageTables[gcdMAX_GPU_COUNT];
-+ /* Pointer to gckKERNEL object who lock this. */
-+ gckKERNEL lockKernels[gcdMAX_GPU_COUNT];
-+ /* Actual physical address */
-+ gctUINT32 addresses[gcdMAX_GPU_COUNT];
-+
-+ /* Mutex. */
-+ gctPOINTER mutex;
-+
-+ /* Locked counter. */
-+ gctINT32 lockeds[gcdMAX_GPU_COUNT];
-+
-+#ifdef __QNXNTO__
-+ /* Single linked list of nodes. */
-+ gcuVIDMEM_NODE_PTR next;
-+
-+ /* Unlock pending flag. */
-+ gctBOOL unlockPendings[gcdMAX_GPU_COUNT];
-+
-+ /* Free pending flag. */
-+ gctBOOL freePending;
-+#endif
-+
-+ /* Process ID owning this memory. */
-+ gctUINT32 processID;
-+
-+ /* Owner process sets freed to true
-+ * when it trys to free a locked
-+ * node */
-+ gctBOOL freed;
-+
-+ /* */
-+ gcsVIDMEM_NODE_SHARED_INFO sharedInfo;
-+
-+ /* Surface type. */
-+ gceSURF_TYPE type;
-+ }
-+ Virtual;
-+}
-+gcuVIDMEM_NODE;
-+
-+/* gckVIDMEM object. */
-+struct _gckVIDMEM
-+{
-+ /* Object. */
-+ gcsOBJECT object;
-+
-+ /* Pointer to gckOS object. */
-+ gckOS os;
-+
-+ /* Information for this video memory heap. */
-+ gctUINT32 baseAddress;
-+ gctSIZE_T bytes;
-+ gctSIZE_T freeBytes;
-+
-+ /* Mapping for each type of surface. */
-+ gctINT mapping[gcvSURF_NUM_TYPES];
-+
-+ /* Sentinel nodes for up to 8 banks. */
-+ gcuVIDMEM_NODE sentinel[8];
-+
-+ /* Allocation threshold. */
-+ gctSIZE_T threshold;
-+
-+ /* The heap mutex. */
-+ gctPOINTER mutex;
-+
-+#if gcdUSE_VIDMEM_PER_PID
-+ /* The Pid this VidMem belongs to. */
-+ gctUINT32 pid;
-+
-+ struct _gckVIDMEM* next;
-+#endif
-+};
-+
-+/* gckMMU object. */
-+struct _gckMMU
-+{
-+ /* The object. */
-+ gcsOBJECT object;
-+
-+ /* Pointer to gckOS object. */
-+ gckOS os;
-+
-+ /* Pointer to gckHARDWARE object. */
-+ gckHARDWARE hardware;
-+
-+ /* The page table mutex. */
-+ gctPOINTER pageTableMutex;
-+
-+ /* Page table information. */
-+ gctSIZE_T pageTableSize;
-+ gctPHYS_ADDR pageTablePhysical;
-+ gctUINT32_PTR pageTableLogical;
-+ gctUINT32 pageTableEntries;
-+
-+ /* Master TLB information. */
-+ gctSIZE_T mtlbSize;
-+ gctPHYS_ADDR mtlbPhysical;
-+ gctUINT32_PTR mtlbLogical;
-+ gctUINT32 mtlbEntries;
-+
-+ /* Free entries. */
-+ gctUINT32 heapList;
-+ gctBOOL freeNodes;
-+
-+ gctPOINTER staticSTLB;
-+ gctBOOL enabled;
-+
-+ gctUINT32 dynamicMappingStart;
-+
-+#ifdef __QNXNTO__
-+ /* Single linked list of all allocated nodes. */
-+ gctPOINTER nodeMutex;
-+ gcuVIDMEM_NODE_PTR nodeList;
-+#endif
-+};
-+
-+#if gcdVIRTUAL_COMMAND_BUFFER
-+gceSTATUS
-+gckOS_CreateKernelVirtualMapping(
-+ IN gctPHYS_ADDR Physical,
-+ OUT gctSIZE_T * PageCount,
-+ OUT gctPOINTER * Logical
-+ );
-+
-+gceSTATUS
-+gckOS_DestroyKernelVirtualMapping(
-+ IN gctPOINTER Logical
-+ );
-+
-+gceSTATUS
-+gckKERNEL_AllocateVirtualCommandBuffer(
-+ IN gckKERNEL Kernel,
-+ IN gctBOOL InUserSpace,
-+ IN OUT gctSIZE_T * Bytes,
-+ OUT gctPHYS_ADDR * Physical,
-+ OUT gctPOINTER * Logical
-+ );
-+
-+gceSTATUS
-+gckKERNEL_DestroyVirtualCommandBuffer(
-+ IN gckKERNEL Kernel,
-+ IN gctSIZE_T Bytes,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctPOINTER Logical
-+ );
-+
-+gceSTATUS
-+gckKERNEL_GetGPUAddress(
-+ IN gckKERNEL Kernel,
-+ IN gctPOINTER Logical,
-+ OUT gctUINT32 * Address
-+ );
-+
-+gceSTATUS
-+gckKERNEL_QueryGPUAddress(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 GpuAddress,
-+ OUT gckVIRTUAL_COMMAND_BUFFER_PTR * Buffer
-+ );
-+#endif
-+
-+gceSTATUS
-+gckKERNEL_AttachProcess(
-+ IN gckKERNEL Kernel,
-+ IN gctBOOL Attach
-+ );
-+
-+gceSTATUS
-+gckKERNEL_AttachProcessEx(
-+ IN gckKERNEL Kernel,
-+ IN gctBOOL Attach,
-+ IN gctUINT32 PID
-+ );
-+
-+#if gcdSECURE_USER
-+gceSTATUS
-+gckKERNEL_MapLogicalToPhysical(
-+ IN gckKERNEL Kernel,
-+ IN gcskSECURE_CACHE_PTR Cache,
-+ IN OUT gctPOINTER * Data
-+ );
-+
-+gceSTATUS
-+gckKERNEL_FlushTranslationCache(
-+ IN gckKERNEL Kernel,
-+ IN gcskSECURE_CACHE_PTR Cache,
-+ IN gctPOINTER Logical,
-+ IN gctSIZE_T Bytes
-+ );
-+#endif
-+
-+gceSTATUS
-+gckHARDWARE_QueryIdle(
-+ IN gckHARDWARE Hardware,
-+ OUT gctBOOL_PTR IsIdle
-+ );
-+
-+/******************************************************************************\
-+******************************* gckCONTEXT Object *******************************
-+\******************************************************************************/
-+
-+gceSTATUS
-+gckCONTEXT_Construct(
-+ IN gckOS Os,
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT32 ProcessID,
-+ OUT gckCONTEXT * Context
-+ );
-+
-+gceSTATUS
-+gckCONTEXT_Destroy(
-+ IN gckCONTEXT Context
-+ );
-+
-+gceSTATUS
-+gckCONTEXT_Update(
-+ IN gckCONTEXT Context,
-+ IN gctUINT32 ProcessID,
-+ IN gcsSTATE_DELTA_PTR StateDelta
-+ );
-+
-+#if gcdLINK_QUEUE_SIZE
-+void
-+gckLINKQUEUE_Enqueue(
-+ IN gckLINKQUEUE LinkQueue,
-+ IN gctUINT32 start,
-+ IN gctUINT32 end
-+ );
-+
-+void
-+gckLINKQUEUE_GetData(
-+ IN gckLINKQUEUE LinkQueue,
-+ IN gctUINT32 Index,
-+ OUT gckLINKDATA * Data
-+ );
-+#endif
-+
-+
-+#ifdef __cplusplus
-+}
-+#endif
-+
-+#endif /* __gc_hal_kernel_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_command.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_command.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_command.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_command.c 2015-10-12 10:56:18.051351161 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_command.c 2015-10-15 15:51:25.192659254 +0200
@@ -0,0 +1,3042 @@
+/****************************************************************************
+*
@@ -121959,7 +120643,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_com
+#endif
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_command_vg.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_command_vg.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_command_vg.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_command_vg.c 2015-10-12 10:56:18.052351161 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_command_vg.c 2015-10-15 15:51:25.192659254 +0200
@@ -0,0 +1,3677 @@
+/****************************************************************************
+*
@@ -125640,7 +124324,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_com
+#endif /* gcdENABLE_VG */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_db.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_db.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_db.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_db.c 2015-10-12 10:56:18.053351161 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_db.c 2015-10-15 15:51:25.192659254 +0200
@@ -0,0 +1,1604 @@
+/****************************************************************************
+*
@@ -127248,7 +125932,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_db.
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_debug.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_debug.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_debug.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_debug.c 2015-10-12 10:56:18.054351161 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_debug.c 2015-10-15 15:51:25.216657675 +0200
@@ -0,0 +1,2559 @@
+/****************************************************************************
+*
@@ -129811,7 +128495,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_deb
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_event.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_event.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_event.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_event.c 2015-10-12 10:56:18.055351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_event.c 2015-10-15 15:51:25.220657411 +0200
@@ -0,0 +1,2898 @@
+/****************************************************************************
+*
@@ -132711,9 +131395,1024 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_eve
+
+ return gcvSTATUS_OK;
+}
+diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel.h
+--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel.h 2015-10-15 15:51:25.220657411 +0200
+@@ -0,0 +1,1011 @@
++/****************************************************************************
++*
++* Copyright (C) 2005 - 2013 by Vivante Corp.
++*
++* This program is free software; you can redistribute it and/or modify
++* it under the terms of the GNU General Public License as published by
++* the Free Software Foundation; either version 2 of the license, or
++* (at your option) any later version.
++*
++* This program is distributed in the hope that it will be useful,
++* but WITHOUT ANY WARRANTY; without even the implied warranty of
++* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++* GNU General Public License for more details.
++*
++* You should have received a copy of the GNU General Public License
++* along with this program; if not write to the Free Software
++* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*
++*****************************************************************************/
++
++
++#ifndef __gc_hal_kernel_h_
++#define __gc_hal_kernel_h_
++
++#include <linux/spinlock.h>
++
++#include "gc_hal.h"
++#include "gc_hal_kernel_hardware.h"
++#include "gc_hal_driver.h"
++
++#if gcdENABLE_VG
++#include "gc_hal_kernel_vg.h"
++#endif
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++
++/*******************************************************************************
++***** New MMU Defination *******************************************************/
++#define gcdMMU_MTLB_SHIFT 22
++#define gcdMMU_STLB_4K_SHIFT 12
++#define gcdMMU_STLB_64K_SHIFT 16
++
++#define gcdMMU_MTLB_BITS (32 - gcdMMU_MTLB_SHIFT)
++#define gcdMMU_PAGE_4K_BITS gcdMMU_STLB_4K_SHIFT
++#define gcdMMU_STLB_4K_BITS (32 - gcdMMU_MTLB_BITS - gcdMMU_PAGE_4K_BITS)
++#define gcdMMU_PAGE_64K_BITS gcdMMU_STLB_64K_SHIFT
++#define gcdMMU_STLB_64K_BITS (32 - gcdMMU_MTLB_BITS - gcdMMU_PAGE_64K_BITS)
++
++#define gcdMMU_MTLB_ENTRY_NUM (1 << gcdMMU_MTLB_BITS)
++#define gcdMMU_MTLB_SIZE (gcdMMU_MTLB_ENTRY_NUM << 2)
++#define gcdMMU_STLB_4K_ENTRY_NUM (1 << gcdMMU_STLB_4K_BITS)
++#define gcdMMU_STLB_4K_SIZE (gcdMMU_STLB_4K_ENTRY_NUM << 2)
++#define gcdMMU_PAGE_4K_SIZE (1 << gcdMMU_STLB_4K_SHIFT)
++#define gcdMMU_STLB_64K_ENTRY_NUM (1 << gcdMMU_STLB_64K_BITS)
++#define gcdMMU_STLB_64K_SIZE (gcdMMU_STLB_64K_ENTRY_NUM << 2)
++#define gcdMMU_PAGE_64K_SIZE (1 << gcdMMU_STLB_64K_SHIFT)
++
++#define gcdMMU_MTLB_MASK (~((1U << gcdMMU_MTLB_SHIFT)-1))
++#define gcdMMU_STLB_4K_MASK ((~0U << gcdMMU_STLB_4K_SHIFT) ^ gcdMMU_MTLB_MASK)
++#define gcdMMU_PAGE_4K_MASK (gcdMMU_PAGE_4K_SIZE - 1)
++#define gcdMMU_STLB_64K_MASK ((~((1U << gcdMMU_STLB_64K_SHIFT)-1)) ^ gcdMMU_MTLB_MASK)
++#define gcdMMU_PAGE_64K_MASK (gcdMMU_PAGE_64K_SIZE - 1)
++
++/* Page offset definitions. */
++#define gcdMMU_OFFSET_4K_BITS (32 - gcdMMU_MTLB_BITS - gcdMMU_STLB_4K_BITS)
++#define gcdMMU_OFFSET_4K_MASK ((1U << gcdMMU_OFFSET_4K_BITS) - 1)
++#define gcdMMU_OFFSET_16K_BITS (32 - gcdMMU_MTLB_BITS - gcdMMU_STLB_16K_BITS)
++#define gcdMMU_OFFSET_16K_MASK ((1U << gcdMMU_OFFSET_16K_BITS) - 1)
++
++/*******************************************************************************
++***** Process Secure Cache ****************************************************/
++
++#define gcdSECURE_CACHE_LRU 1
++#define gcdSECURE_CACHE_LINEAR 2
++#define gcdSECURE_CACHE_HASH 3
++#define gcdSECURE_CACHE_TABLE 4
++
++typedef struct _gcskLOGICAL_CACHE * gcskLOGICAL_CACHE_PTR;
++typedef struct _gcskLOGICAL_CACHE gcskLOGICAL_CACHE;
++struct _gcskLOGICAL_CACHE
++{
++ /* Logical address. */
++ gctPOINTER logical;
++
++ /* DMAable address. */
++ gctUINT32 dma;
++
++#if gcdSECURE_CACHE_METHOD == gcdSECURE_CACHE_HASH
++ /* Pointer to the previous and next hash tables. */
++ gcskLOGICAL_CACHE_PTR nextHash;
++ gcskLOGICAL_CACHE_PTR prevHash;
++#endif
++
++#if gcdSECURE_CACHE_METHOD != gcdSECURE_CACHE_TABLE
++ /* Pointer to the previous and next slot. */
++ gcskLOGICAL_CACHE_PTR next;
++ gcskLOGICAL_CACHE_PTR prev;
++#endif
++
++#if gcdSECURE_CACHE_METHOD == gcdSECURE_CACHE_LINEAR
++ /* Time stamp. */
++ gctUINT64 stamp;
++#endif
++};
++
++typedef struct _gcskSECURE_CACHE * gcskSECURE_CACHE_PTR;
++typedef struct _gcskSECURE_CACHE
++{
++ /* Cache memory. */
++ gcskLOGICAL_CACHE cache[1 + gcdSECURE_CACHE_SLOTS];
++
++ /* Last known index for LINEAR mode. */
++ gcskLOGICAL_CACHE_PTR cacheIndex;
++
++ /* Current free slot for LINEAR mode. */
++ gctUINT32 cacheFree;
++
++ /* Time stamp for LINEAR mode. */
++ gctUINT64 cacheStamp;
++
++#if gcdSECURE_CACHE_METHOD == gcdSECURE_CACHE_HASH
++ /* Hash table for HASH mode. */
++ gcskLOGICAL_CACHE hash[256];
++#endif
++}
++gcskSECURE_CACHE;
++
++/*******************************************************************************
++***** Process Database Management *********************************************/
++
++typedef enum _gceDATABASE_TYPE
++{
++ gcvDB_VIDEO_MEMORY = 1, /* Video memory created. */
++ gcvDB_COMMAND_BUFFER, /* Command Buffer. */
++ gcvDB_NON_PAGED, /* Non paged memory. */
++ gcvDB_CONTIGUOUS, /* Contiguous memory. */
++ gcvDB_SIGNAL, /* Signal. */
++ gcvDB_VIDEO_MEMORY_LOCKED, /* Video memory locked. */
++ gcvDB_CONTEXT, /* Context */
++ gcvDB_IDLE, /* GPU idle. */
++ gcvDB_MAP_MEMORY, /* Map memory */
++ gcvDB_SHARED_INFO, /* Private data */
++ gcvDB_MAP_USER_MEMORY, /* Map user memory */
++ gcvDB_SYNC_POINT, /* Sync point. */
++ gcvDB_VIDEO_MEMORY_RESERVED, /* Reserved video memory */
++ gcvDB_VIDEO_MEMORY_CONTIGUOUS, /* Contiguous video memory */
++ gcvDB_VIDEO_MEMORY_VIRTUAL, /* Virtual video memory */
++}
++gceDATABASE_TYPE;
++
++typedef struct _gcsDATABASE_RECORD * gcsDATABASE_RECORD_PTR;
++typedef struct _gcsDATABASE_RECORD
++{
++ /* Pointer to kernel. */
++ gckKERNEL kernel;
++
++ /* Pointer to next database record. */
++ gcsDATABASE_RECORD_PTR next;
++
++ /* Type of record. */
++ gceDATABASE_TYPE type;
++
++ /* Data for record. */
++ gctPOINTER data;
++ gctPHYS_ADDR physical;
++ gctSIZE_T bytes;
++}
++gcsDATABASE_RECORD;
++
++typedef struct _gcsDATABASE * gcsDATABASE_PTR;
++typedef struct _gcsDATABASE
++{
++ /* Pointer to next entry is hash list. */
++ gcsDATABASE_PTR next;
++ gctSIZE_T slot;
++
++ /* Process ID. */
++ gctUINT32 processID;
++
++ /* Sizes to query. */
++ gcsDATABASE_COUNTERS vidMem;
++ gcsDATABASE_COUNTERS nonPaged;
++ gcsDATABASE_COUNTERS contiguous;
++ gcsDATABASE_COUNTERS mapUserMemory;
++ gcsDATABASE_COUNTERS mapMemory;
++ gcsDATABASE_COUNTERS vidMemResv;
++ gcsDATABASE_COUNTERS vidMemCont;
++ gcsDATABASE_COUNTERS vidMemVirt;
++
++ /* Idle time management. */
++ gctUINT64 lastIdle;
++ gctUINT64 idle;
++
++ /* Pointer to database. */
++ gcsDATABASE_RECORD_PTR list[48];
++
++#if gcdSECURE_USER
++ /* Secure cache. */
++ gcskSECURE_CACHE cache;
++#endif
++
++ gctPOINTER handleDatabase;
++ gctPOINTER handleDatabaseMutex;
++}
++gcsDATABASE;
++
++/* Create a process database that will contain all its allocations. */
++gceSTATUS
++gckKERNEL_CreateProcessDB(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID
++ );
++
++/* Add a record to the process database. */
++gceSTATUS
++gckKERNEL_AddProcessDB(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ IN gceDATABASE_TYPE Type,
++ IN gctPOINTER Pointer,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Size
++ );
++
++/* Remove a record to the process database. */
++gceSTATUS
++gckKERNEL_RemoveProcessDB(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ IN gceDATABASE_TYPE Type,
++ IN gctPOINTER Pointer
++ );
++
++/* Destroy the process database. */
++gceSTATUS
++gckKERNEL_DestroyProcessDB(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID
++ );
++
++/* Find a record to the process database. */
++gceSTATUS
++gckKERNEL_FindProcessDB(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ IN gctUINT32 ThreadID,
++ IN gceDATABASE_TYPE Type,
++ IN gctPOINTER Pointer,
++ OUT gcsDATABASE_RECORD_PTR Record
++ );
++
++/* Query the process database. */
++gceSTATUS
++gckKERNEL_QueryProcessDB(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ IN gctBOOL LastProcessID,
++ IN gceDATABASE_TYPE Type,
++ OUT gcuDATABASE_INFO * Info
++ );
++
++/* Dump the process database. */
++gceSTATUS
++gckKERNEL_DumpProcessDB(
++ IN gckKERNEL Kernel
++ );
++
++/* ID database */
++gceSTATUS
++gckKERNEL_CreateIntegerDatabase(
++ IN gckKERNEL Kernel,
++ OUT gctPOINTER * Database
++ );
++
++gceSTATUS
++gckKERNEL_DestroyIntegerDatabase(
++ IN gckKERNEL Kernel,
++ IN gctPOINTER Database
++ );
++
++gceSTATUS
++gckKERNEL_AllocateIntegerId(
++ IN gctPOINTER Database,
++ IN gctPOINTER Pointer,
++ OUT gctUINT32 * Id
++ );
++
++gceSTATUS
++gckKERNEL_FreeIntegerId(
++ IN gctPOINTER Database,
++ IN gctUINT32 Id
++ );
++
++gceSTATUS
++gckKERNEL_QueryIntegerId(
++ IN gctPOINTER Database,
++ IN gctUINT32 Id,
++ OUT gctPOINTER * Pointer
++ );
++
++gctUINT32
++gckKERNEL_AllocateNameFromPointer(
++ IN gckKERNEL Kernel,
++ IN gctPOINTER Pointer
++ );
++
++gctPOINTER
++gckKERNEL_QueryPointerFromName(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 Name
++ );
++
++gceSTATUS
++gckKERNEL_DeleteName(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 Name
++ );
++
++#if gcdSECURE_USER
++/* Get secure cache from the process database. */
++gceSTATUS
++gckKERNEL_GetProcessDBCache(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ OUT gcskSECURE_CACHE_PTR * Cache
++ );
++#endif
++
++/*******************************************************************************
++********* Timer Management ****************************************************/
++typedef struct _gcsTIMER * gcsTIMER_PTR;
++typedef struct _gcsTIMER
++{
++ /* Start and Stop time holders. */
++ gctUINT64 startTime;
++ gctUINT64 stopTime;
++}
++gcsTIMER;
++
++/******************************************************************************\
++********************************** Structures **********************************
++\******************************************************************************/
++
++/* gckDB object. */
++struct _gckDB
++{
++ /* Database management. */
++ gcsDATABASE_PTR db[16];
++ gctPOINTER dbMutex;
++ gcsDATABASE_PTR freeDatabase;
++ gcsDATABASE_RECORD_PTR freeRecord;
++ gcsDATABASE_PTR lastDatabase;
++ gctUINT32 lastProcessID;
++ gctUINT64 lastIdle;
++ gctUINT64 idleTime;
++ gctUINT64 lastSlowdown;
++ gctUINT64 lastSlowdownIdle;
++ /* ID - Pointer database*/
++ gctPOINTER pointerDatabase;
++ gctPOINTER pointerDatabaseMutex;
++};
++
++#if gcdVIRTUAL_COMMAND_BUFFER
++typedef struct _gckVIRTUAL_COMMAND_BUFFER * gckVIRTUAL_COMMAND_BUFFER_PTR;
++typedef struct _gckVIRTUAL_COMMAND_BUFFER
++{
++ gctPHYS_ADDR physical;
++ gctPOINTER userLogical;
++ gctPOINTER kernelLogical;
++ gctSIZE_T pageCount;
++ gctPOINTER pageTable;
++ gctUINT32 gpuAddress;
++ gctUINT pid;
++ gckVIRTUAL_COMMAND_BUFFER_PTR next;
++ gckVIRTUAL_COMMAND_BUFFER_PTR prev;
++ gckKERNEL kernel;
++}
++gckVIRTUAL_COMMAND_BUFFER;
++#endif
++
++/* gckKERNEL object. */
++struct _gckKERNEL
++{
++ /* Object. */
++ gcsOBJECT object;
++
++ /* Pointer to gckOS object. */
++ gckOS os;
++
++ /* Core */
++ gceCORE core;
++
++ /* Pointer to gckHARDWARE object. */
++ gckHARDWARE hardware;
++
++ /* Pointer to gckCOMMAND object. */
++ gckCOMMAND command;
++
++ /* Pointer to gckEVENT object. */
++ gckEVENT eventObj;
++
++ /* Pointer to context. */
++ gctPOINTER context;
++
++ /* Pointer to gckMMU object. */
++ gckMMU mmu;
++
++ /* Arom holding number of clients. */
++ gctPOINTER atomClients;
++
++#if VIVANTE_PROFILER
++ /* Enable profiling */
++ gctBOOL profileEnable;
++
++ /* Clear profile register or not*/
++ gctBOOL profileCleanRegister;
++
++#endif
++
++#ifdef QNX_SINGLE_THREADED_DEBUGGING
++ gctPOINTER debugMutex;
++#endif
++
++ /* Database management. */
++ gckDB db;
++ gctBOOL dbCreated;
++
++#if gcdENABLE_RECOVERY
++ gctPOINTER resetFlagClearTimer;
++ gctPOINTER resetAtom;
++ gctUINT64 resetTimeStamp;
++#endif
++
++ /* Pointer to gckEVENT object. */
++ gcsTIMER timers[8];
++ gctUINT32 timeOut;
++
++#if gcdENABLE_VG
++ gckVGKERNEL vg;
++#endif
++
++#if gcdVIRTUAL_COMMAND_BUFFER
++ gckVIRTUAL_COMMAND_BUFFER_PTR virtualBufferHead;
++ gckVIRTUAL_COMMAND_BUFFER_PTR virtualBufferTail;
++ gctPOINTER virtualBufferLock;
++#endif
++
++#if gcdDVFS
++ gckDVFS dvfs;
++#endif
++
++#if gcdANDROID_NATIVE_FENCE_SYNC
++ gctHANDLE timeline;
++#endif
++
++ spinlock_t irq_lock;
++};
++
++struct _FrequencyHistory
++{
++ gctUINT32 frequency;
++ gctUINT32 count;
++};
++
++/* gckDVFS object. */
++struct _gckDVFS
++{
++ gckOS os;
++ gckHARDWARE hardware;
++ gctPOINTER timer;
++ gctUINT32 pollingTime;
++ gctBOOL stop;
++ gctUINT32 totalConfig;
++ gctUINT32 loads[8];
++ gctUINT8 currentScale;
++ struct _FrequencyHistory frequencyHistory[16];
++};
++
++/* gckCOMMAND object. */
++struct _gckCOMMAND
++{
++ /* Object. */
++ gcsOBJECT object;
++
++ /* Pointer to required object. */
++ gckKERNEL kernel;
++ gckOS os;
++
++ /* Number of bytes per page. */
++ gctSIZE_T pageSize;
++
++ /* Current pipe select. */
++ gcePIPE_SELECT pipeSelect;
++
++ /* Command queue running flag. */
++ gctBOOL running;
++
++ /* Idle flag and commit stamp. */
++ gctBOOL idle;
++ gctUINT64 commitStamp;
++
++ /* Command queue mutex. */
++ gctPOINTER mutexQueue;
++
++ /* Context switching mutex. */
++ gctPOINTER mutexContext;
++
++#if VIVANTE_PROFILER_CONTEXT
++ /* Context sequence mutex. */
++ gctPOINTER mutexContextSeq;
++#endif
++
++ /* Command queue power semaphore. */
++ gctPOINTER powerSemaphore;
++
++ /* Current command queue. */
++ struct _gcskCOMMAND_QUEUE
++ {
++ gctSIGNAL signal;
++ gctPHYS_ADDR physical;
++ gctPOINTER logical;
++ }
++ queues[gcdCOMMAND_QUEUES];
++
++ gctPHYS_ADDR physical;
++ gctPOINTER logical;
++ gctUINT32 offset;
++ gctINT index;
++#if gcmIS_DEBUG(gcdDEBUG_TRACE)
++ gctUINT wrapCount;
++#endif
++
++ /* The command queue is new. */
++ gctBOOL newQueue;
++
++ /* Context management. */
++ gckCONTEXT currContext;
++
++ /* Pointer to last WAIT command. */
++ gctPHYS_ADDR waitPhysical;
++ gctPOINTER waitLogical;
++ gctSIZE_T waitSize;
++
++ /* Command buffer alignment. */
++ gctSIZE_T alignment;
++ gctSIZE_T reservedHead;
++ gctSIZE_T reservedTail;
++
++ /* Commit counter. */
++ gctPOINTER atomCommit;
++
++ /* Kernel process ID. */
++ gctUINT32 kernelProcessID;
++
++ /* End Event signal. */
++ gctSIGNAL endEventSignal;
++
++#if gcdSECURE_USER
++ /* Hint array copy buffer. */
++ gctBOOL hintArrayAllocated;
++ gctUINT hintArraySize;
++ gctUINT32_PTR hintArray;
++#endif
++};
++
++typedef struct _gcsEVENT * gcsEVENT_PTR;
++
++/* Structure holding one event to be processed. */
++typedef struct _gcsEVENT
++{
++ /* Pointer to next event in queue. */
++ gcsEVENT_PTR next;
++
++ /* Event information. */
++ gcsHAL_INTERFACE info;
++
++ /* Process ID owning the event. */
++ gctUINT32 processID;
++
++#ifdef __QNXNTO__
++ /* Kernel. */
++ gckKERNEL kernel;
++#endif
++
++ gctBOOL fromKernel;
++}
++gcsEVENT;
++
++/* Structure holding a list of events to be processed by an interrupt. */
++typedef struct _gcsEVENT_QUEUE * gcsEVENT_QUEUE_PTR;
++typedef struct _gcsEVENT_QUEUE
++{
++ /* Time stamp. */
++ gctUINT64 stamp;
++
++ /* Source of the event. */
++ gceKERNEL_WHERE source;
++
++ /* Pointer to head of event queue. */
++ gcsEVENT_PTR head;
++
++ /* Pointer to tail of event queue. */
++ gcsEVENT_PTR tail;
++
++ /* Next list of events. */
++ gcsEVENT_QUEUE_PTR next;
++}
++gcsEVENT_QUEUE;
++
++/*
++ gcdREPO_LIST_COUNT defines the maximum number of event queues with different
++ hardware module sources that may coexist at the same time. Only two sources
++ are supported - gcvKERNEL_COMMAND and gcvKERNEL_PIXEL. gcvKERNEL_COMMAND
++ source is used only for managing the kernel command queue and is only issued
++ when the current command queue gets full. Since we commit event queues every
++ time we commit command buffers, in the worst case we can have up to three
++ pending event queues:
++ - gcvKERNEL_PIXEL
++ - gcvKERNEL_COMMAND (queue overflow)
++ - gcvKERNEL_PIXEL
++*/
++#define gcdREPO_LIST_COUNT 3
++
++/* gckEVENT object. */
++struct _gckEVENT
++{
++ /* The object. */
++ gcsOBJECT object;
++
++ /* Pointer to required objects. */
++ gckOS os;
++ gckKERNEL kernel;
++
++ /* Time stamp. */
++ gctUINT64 stamp;
++ gctUINT64 lastCommitStamp;
++
++ /* Queue mutex. */
++ gctPOINTER eventQueueMutex;
++
++ /* Array of event queues. */
++ gcsEVENT_QUEUE queues[30];
++ gctUINT8 lastID;
++ gctPOINTER freeAtom;
++
++ /* Pending events. */
++#if gcdSMP
++ gctPOINTER pending;
++#else
++ volatile gctUINT pending;
++#endif
++
++ /* List of free event structures and its mutex. */
++ gcsEVENT_PTR freeEventList;
++ gctSIZE_T freeEventCount;
++ gctPOINTER freeEventMutex;
++
++ /* Event queues. */
++ gcsEVENT_QUEUE_PTR queueHead;
++ gcsEVENT_QUEUE_PTR queueTail;
++ gcsEVENT_QUEUE_PTR freeList;
++ gcsEVENT_QUEUE repoList[gcdREPO_LIST_COUNT];
++ gctPOINTER eventListMutex;
++
++ gctPOINTER submitTimer;
++
++ volatile gctBOOL inNotify;
++};
++
++/* Free all events belonging to a process. */
++gceSTATUS
++gckEVENT_FreeProcess(
++ IN gckEVENT Event,
++ IN gctUINT32 ProcessID
++ );
++
++gceSTATUS
++gckEVENT_Stop(
++ IN gckEVENT Event,
++ IN gctUINT32 ProcessID,
++ IN gctPHYS_ADDR Handle,
++ IN gctPOINTER Logical,
++ IN gctSIGNAL Signal,
++ IN OUT gctSIZE_T * waitSize
++ );
++
++gceSTATUS
++gckEVENT_WaitEmpty(
++ IN gckEVENT Event
++ );
++
++/* gcuVIDMEM_NODE structure. */
++typedef union _gcuVIDMEM_NODE
++{
++ /* Allocated from gckVIDMEM. */
++ struct _gcsVIDMEM_NODE_VIDMEM
++ {
++ /* Owner of this node. */
++ gckVIDMEM memory;
++
++ /* Dual-linked list of nodes. */
++ gcuVIDMEM_NODE_PTR next;
++ gcuVIDMEM_NODE_PTR prev;
++
++ /* Dual linked list of free nodes. */
++ gcuVIDMEM_NODE_PTR nextFree;
++ gcuVIDMEM_NODE_PTR prevFree;
++
++ /* Information for this node. */
++ gctUINT32 offset;
++ gctSIZE_T bytes;
++ gctUINT32 alignment;
++
++#ifdef __QNXNTO__
++ /* Client/server vaddr (mapped using mmap_join). */
++ gctPOINTER logical;
++#endif
++
++ /* Locked counter. */
++ gctINT32 locked;
++
++ /* Memory pool. */
++ gcePOOL pool;
++ gctUINT32 physical;
++
++ /* Process ID owning this memory. */
++ gctUINT32 processID;
++
++ /* Prevent compositor from freeing until client unlocks. */
++ gctBOOL freePending;
++
++ /* */
++ gcsVIDMEM_NODE_SHARED_INFO sharedInfo;
++
++#if gcdDYNAMIC_MAP_RESERVED_MEMORY && gcdENABLE_VG
++ gctPOINTER kernelVirtual;
++#endif
++
++ /* Surface type. */
++ gceSURF_TYPE type;
++ }
++ VidMem;
++
++ /* Allocated from gckOS. */
++ struct _gcsVIDMEM_NODE_VIRTUAL
++ {
++ /* Pointer to gckKERNEL object. */
++ gckKERNEL kernel;
++
++ /* Information for this node. */
++ /* Contiguously allocated? */
++ gctBOOL contiguous;
++ /* mdl record pointer... a kmalloc address. Process agnostic. */
++ gctPHYS_ADDR physical;
++ gctSIZE_T bytes;
++ /* do_mmap_pgoff address... mapped per-process. */
++ gctPOINTER logical;
++
++ /* Page table information. */
++ /* Used only when node is not contiguous */
++ gctSIZE_T pageCount;
++
++ /* Used only when node is not contiguous */
++ gctPOINTER pageTables[gcdMAX_GPU_COUNT];
++ /* Pointer to gckKERNEL object who lock this. */
++ gckKERNEL lockKernels[gcdMAX_GPU_COUNT];
++ /* Actual physical address */
++ gctUINT32 addresses[gcdMAX_GPU_COUNT];
++
++ /* Mutex. */
++ gctPOINTER mutex;
++
++ /* Locked counter. */
++ gctINT32 lockeds[gcdMAX_GPU_COUNT];
++
++#ifdef __QNXNTO__
++ /* Single linked list of nodes. */
++ gcuVIDMEM_NODE_PTR next;
++
++ /* Unlock pending flag. */
++ gctBOOL unlockPendings[gcdMAX_GPU_COUNT];
++
++ /* Free pending flag. */
++ gctBOOL freePending;
++#endif
++
++ /* Process ID owning this memory. */
++ gctUINT32 processID;
++
++ /* Owner process sets freed to true
++ * when it trys to free a locked
++ * node */
++ gctBOOL freed;
++
++ /* */
++ gcsVIDMEM_NODE_SHARED_INFO sharedInfo;
++
++ /* Surface type. */
++ gceSURF_TYPE type;
++ }
++ Virtual;
++}
++gcuVIDMEM_NODE;
++
++/* gckVIDMEM object. */
++struct _gckVIDMEM
++{
++ /* Object. */
++ gcsOBJECT object;
++
++ /* Pointer to gckOS object. */
++ gckOS os;
++
++ /* Information for this video memory heap. */
++ gctUINT32 baseAddress;
++ gctSIZE_T bytes;
++ gctSIZE_T freeBytes;
++
++ /* Mapping for each type of surface. */
++ gctINT mapping[gcvSURF_NUM_TYPES];
++
++ /* Sentinel nodes for up to 8 banks. */
++ gcuVIDMEM_NODE sentinel[8];
++
++ /* Allocation threshold. */
++ gctSIZE_T threshold;
++
++ /* The heap mutex. */
++ gctPOINTER mutex;
++
++#if gcdUSE_VIDMEM_PER_PID
++ /* The Pid this VidMem belongs to. */
++ gctUINT32 pid;
++
++ struct _gckVIDMEM* next;
++#endif
++};
++
++/* gckMMU object. */
++struct _gckMMU
++{
++ /* The object. */
++ gcsOBJECT object;
++
++ /* Pointer to gckOS object. */
++ gckOS os;
++
++ /* Pointer to gckHARDWARE object. */
++ gckHARDWARE hardware;
++
++ /* The page table mutex. */
++ gctPOINTER pageTableMutex;
++
++ /* Page table information. */
++ gctSIZE_T pageTableSize;
++ gctPHYS_ADDR pageTablePhysical;
++ gctUINT32_PTR pageTableLogical;
++ gctUINT32 pageTableEntries;
++
++ /* Master TLB information. */
++ gctSIZE_T mtlbSize;
++ gctPHYS_ADDR mtlbPhysical;
++ gctUINT32_PTR mtlbLogical;
++ gctUINT32 mtlbEntries;
++
++ /* Free entries. */
++ gctUINT32 heapList;
++ gctBOOL freeNodes;
++
++ gctPOINTER staticSTLB;
++ gctBOOL enabled;
++
++ gctUINT32 dynamicMappingStart;
++
++#ifdef __QNXNTO__
++ /* Single linked list of all allocated nodes. */
++ gctPOINTER nodeMutex;
++ gcuVIDMEM_NODE_PTR nodeList;
++#endif
++};
++
++#if gcdVIRTUAL_COMMAND_BUFFER
++gceSTATUS
++gckOS_CreateKernelVirtualMapping(
++ IN gctPHYS_ADDR Physical,
++ OUT gctSIZE_T * PageCount,
++ OUT gctPOINTER * Logical
++ );
++
++gceSTATUS
++gckOS_DestroyKernelVirtualMapping(
++ IN gctPOINTER Logical
++ );
++
++gceSTATUS
++gckKERNEL_AllocateVirtualCommandBuffer(
++ IN gckKERNEL Kernel,
++ IN gctBOOL InUserSpace,
++ IN OUT gctSIZE_T * Bytes,
++ OUT gctPHYS_ADDR * Physical,
++ OUT gctPOINTER * Logical
++ );
++
++gceSTATUS
++gckKERNEL_DestroyVirtualCommandBuffer(
++ IN gckKERNEL Kernel,
++ IN gctSIZE_T Bytes,
++ IN gctPHYS_ADDR Physical,
++ IN gctPOINTER Logical
++ );
++
++gceSTATUS
++gckKERNEL_GetGPUAddress(
++ IN gckKERNEL Kernel,
++ IN gctPOINTER Logical,
++ OUT gctUINT32 * Address
++ );
++
++gceSTATUS
++gckKERNEL_QueryGPUAddress(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 GpuAddress,
++ OUT gckVIRTUAL_COMMAND_BUFFER_PTR * Buffer
++ );
++#endif
++
++gceSTATUS
++gckKERNEL_AttachProcess(
++ IN gckKERNEL Kernel,
++ IN gctBOOL Attach
++ );
++
++gceSTATUS
++gckKERNEL_AttachProcessEx(
++ IN gckKERNEL Kernel,
++ IN gctBOOL Attach,
++ IN gctUINT32 PID
++ );
++
++#if gcdSECURE_USER
++gceSTATUS
++gckKERNEL_MapLogicalToPhysical(
++ IN gckKERNEL Kernel,
++ IN gcskSECURE_CACHE_PTR Cache,
++ IN OUT gctPOINTER * Data
++ );
++
++gceSTATUS
++gckKERNEL_FlushTranslationCache(
++ IN gckKERNEL Kernel,
++ IN gcskSECURE_CACHE_PTR Cache,
++ IN gctPOINTER Logical,
++ IN gctSIZE_T Bytes
++ );
++#endif
++
++gceSTATUS
++gckHARDWARE_QueryIdle(
++ IN gckHARDWARE Hardware,
++ OUT gctBOOL_PTR IsIdle
++ );
++
++/******************************************************************************\
++******************************* gckCONTEXT Object *******************************
++\******************************************************************************/
++
++gceSTATUS
++gckCONTEXT_Construct(
++ IN gckOS Os,
++ IN gckHARDWARE Hardware,
++ IN gctUINT32 ProcessID,
++ OUT gckCONTEXT * Context
++ );
++
++gceSTATUS
++gckCONTEXT_Destroy(
++ IN gckCONTEXT Context
++ );
++
++gceSTATUS
++gckCONTEXT_Update(
++ IN gckCONTEXT Context,
++ IN gctUINT32 ProcessID,
++ IN gcsSTATE_DELTA_PTR StateDelta
++ );
++
++#if gcdLINK_QUEUE_SIZE
++void
++gckLINKQUEUE_Enqueue(
++ IN gckLINKQUEUE LinkQueue,
++ IN gctUINT32 start,
++ IN gctUINT32 end
++ );
++
++void
++gckLINKQUEUE_GetData(
++ IN gckLINKQUEUE LinkQueue,
++ IN gctUINT32 Index,
++ OUT gckLINKDATA * Data
++ );
++#endif
++
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* __gc_hal_kernel_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_heap.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_heap.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_heap.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_heap.c 2015-10-12 10:56:18.055351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_heap.c 2015-10-15 15:51:25.224657148 +0200
@@ -0,0 +1,859 @@
+/****************************************************************************
+*
@@ -133576,7 +133275,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_hea
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_interrupt_vg.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_interrupt_vg.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_interrupt_vg.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_interrupt_vg.c 2015-10-12 10:56:18.056351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_interrupt_vg.c 2015-10-15 15:51:25.224657148 +0200
@@ -0,0 +1,877 @@
+/****************************************************************************
+*
@@ -134457,7 +134156,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_int
+#endif /* gcdENABLE_VG */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_mmu.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_mmu.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_mmu.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_mmu.c 2015-10-12 10:56:18.056351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_mmu.c 2015-10-15 15:51:25.228656886 +0200
@@ -0,0 +1,1982 @@
+/****************************************************************************
+*
@@ -136443,7 +136142,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_mmu
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_mmu_vg.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_mmu_vg.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_mmu_vg.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_mmu_vg.c 2015-10-12 10:56:18.057351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_mmu_vg.c 2015-10-15 15:51:25.228656886 +0200
@@ -0,0 +1,522 @@
+/****************************************************************************
+*
@@ -136969,7 +136668,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_mmu
+#endif /* gcdENABLE_VG */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_power.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_power.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_power.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_power.c 2015-10-12 10:56:18.057351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_power.c 2015-10-15 15:51:25.232656622 +0200
@@ -0,0 +1,347 @@
+/****************************************************************************
+*
@@ -137320,7 +137019,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_pow
+#endif
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_precomp.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_precomp.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_precomp.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_precomp.h 2015-10-12 10:56:18.057351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_precomp.h 2015-10-15 15:51:25.232656622 +0200
@@ -0,0 +1,29 @@
+/****************************************************************************
+*
@@ -137353,7 +137052,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_pre
+#endif /* __gc_hal_kernel_precomp_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_vg.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_vg.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_vg.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_vg.c 2015-10-12 10:56:18.057351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_vg.c 2015-10-15 15:51:25.232656622 +0200
@@ -0,0 +1,895 @@
+/****************************************************************************
+*
@@ -138252,7 +137951,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_vg.
+#endif /* gcdENABLE_VG */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_vg.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_vg.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_vg.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_vg.h 2015-10-12 10:56:18.057351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_vg.h 2015-10-15 15:51:25.232656622 +0200
@@ -0,0 +1,85 @@
+/****************************************************************************
+*
@@ -138341,7 +138040,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_vg.
+#endif /* __gc_hal_kernel_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_video_memory.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_video_memory.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_video_memory.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_video_memory.c 2015-10-12 10:56:18.058351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_video_memory.c 2015-10-15 15:51:25.280653462 +0200
@@ -0,0 +1,2264 @@
+/****************************************************************************
+*
@@ -140607,2674 +140306,9 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/gc_hal_kernel_vid
+ gcmkFOOTER();
+ return status;
+}
-diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal.h
---- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal.h 2015-10-12 10:56:18.064351160 +0200
-@@ -0,0 +1,2661 @@
-+/****************************************************************************
-+*
-+* Copyright (C) 2005 - 2013 by Vivante Corp.
-+*
-+* This program is free software; you can redistribute it and/or modify
-+* it under the terms of the GNU General Public License as published by
-+* the Free Software Foundation; either version 2 of the license, or
-+* (at your option) any later version.
-+*
-+* This program is distributed in the hope that it will be useful,
-+* but WITHOUT ANY WARRANTY; without even the implied warranty of
-+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+* GNU General Public License for more details.
-+*
-+* You should have received a copy of the GNU General Public License
-+* along with this program; if not write to the Free Software
-+* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-+*
-+*****************************************************************************/
-+
-+
-+#ifndef __gc_hal_h_
-+#define __gc_hal_h_
-+
-+#include "gc_hal_rename.h"
-+#include "gc_hal_types.h"
-+#include "gc_hal_enum.h"
-+#include "gc_hal_base.h"
-+#include "gc_hal_profiler.h"
-+#include "gc_hal_driver.h"
-+#ifndef VIVANTE_NO_3D
-+#include "gc_hal_statistics.h"
-+#endif
-+
-+#ifdef __cplusplus
-+extern "C" {
-+#endif
-+
-+/******************************************************************************\
-+******************************* Alignment Macros *******************************
-+\******************************************************************************/
-+
-+#define gcmALIGN(n, align) \
-+( \
-+ ((n) + ((align) - 1)) & ~((align) - 1) \
-+)
-+
-+#define gcmALIGN_BASE(n, align) \
-+( \
-+ ((n) & ~((align) - 1)) \
-+)
-+
-+/******************************************************************************\
-+***************************** Element Count Macro *****************************
-+\******************************************************************************/
-+
-+#define gcmSIZEOF(a) \
-+( \
-+ (gctSIZE_T) (sizeof(a)) \
-+)
-+
-+#define gcmCOUNTOF(a) \
-+( \
-+ sizeof(a) / sizeof(a[0]) \
-+)
-+
-+/******************************************************************************\
-+********************************* Cast Macro **********************************
-+\******************************************************************************/
-+#define gcmNAME_TO_PTR(na) \
-+ gckKERNEL_QueryPointerFromName(kernel, gcmALL_TO_UINT32(na))
-+
-+#define gcmPTR_TO_NAME(ptr) \
-+ gckKERNEL_AllocateNameFromPointer(kernel, ptr)
-+
-+#define gcmRELEASE_NAME(na) \
-+ gckKERNEL_DeleteName(kernel, gcmALL_TO_UINT32(na))
-+
-+#ifdef __LP64__
-+
-+#define gcmALL_TO_UINT32(t) \
-+( \
-+ (gctUINT32) (gctUINTPTR_T) (t)\
-+)
-+
-+#define gcmPTR_TO_UINT64(p) \
-+( \
-+ (gctUINT64) (p)\
-+)
-+
-+#define gcmUINT64_TO_PTR(u) \
-+( \
-+ (gctPOINTER) (u)\
-+)
-+
-+#else /* 32 bit */
-+
-+#define gcmALL_TO_UINT32(t) \
-+( \
-+ (gctUINT32) (t)\
-+)
-+
-+#define gcmPTR_TO_UINT64(p) \
-+( \
-+ (gctUINT64) (gctUINTPTR_T) (p)\
-+)
-+
-+#define gcmUINT64_TO_PTR(u) \
-+( \
-+ (gctPOINTER) (gctUINTPTR_T) (u)\
-+)
-+
-+#endif
-+
-+#define gcmUINT64_TO_TYPE(u, t) \
-+( \
-+ (t) (gctUINTPTR_T) (u)\
-+)
-+
-+/******************************************************************************\
-+******************************** Useful Macro *********************************
-+\******************************************************************************/
-+
-+#define gcvINVALID_ADDRESS ~0U
-+
-+#define gcmGET_PRE_ROTATION(rotate) \
-+ ((rotate) & (~(gcvSURF_POST_FLIP_X | gcvSURF_POST_FLIP_Y)))
-+
-+#define gcmGET_POST_ROTATION(rotate) \
-+ ((rotate) & (gcvSURF_POST_FLIP_X | gcvSURF_POST_FLIP_Y))
-+
-+/******************************************************************************\
-+******************************** gcsOBJECT Object *******************************
-+\******************************************************************************/
-+
-+/* Type of objects. */
-+typedef enum _gceOBJECT_TYPE
-+{
-+ gcvOBJ_UNKNOWN = 0,
-+ gcvOBJ_2D = gcmCC('2','D',' ',' '),
-+ gcvOBJ_3D = gcmCC('3','D',' ',' '),
-+ gcvOBJ_ATTRIBUTE = gcmCC('A','T','T','R'),
-+ gcvOBJ_BRUSHCACHE = gcmCC('B','R','U','$'),
-+ gcvOBJ_BRUSHNODE = gcmCC('B','R','U','n'),
-+ gcvOBJ_BRUSH = gcmCC('B','R','U','o'),
-+ gcvOBJ_BUFFER = gcmCC('B','U','F','R'),
-+ gcvOBJ_COMMAND = gcmCC('C','M','D',' '),
-+ gcvOBJ_COMMANDBUFFER = gcmCC('C','M','D','B'),
-+ gcvOBJ_CONTEXT = gcmCC('C','T','X','T'),
-+ gcvOBJ_DEVICE = gcmCC('D','E','V',' '),
-+ gcvOBJ_DUMP = gcmCC('D','U','M','P'),
-+ gcvOBJ_EVENT = gcmCC('E','V','N','T'),
-+ gcvOBJ_FUNCTION = gcmCC('F','U','N','C'),
-+ gcvOBJ_HAL = gcmCC('H','A','L',' '),
-+ gcvOBJ_HARDWARE = gcmCC('H','A','R','D'),
-+ gcvOBJ_HEAP = gcmCC('H','E','A','P'),
-+ gcvOBJ_INDEX = gcmCC('I','N','D','X'),
-+ gcvOBJ_INTERRUPT = gcmCC('I','N','T','R'),
-+ gcvOBJ_KERNEL = gcmCC('K','E','R','N'),
-+ gcvOBJ_KERNEL_FUNCTION = gcmCC('K','F','C','N'),
-+ gcvOBJ_MEMORYBUFFER = gcmCC('M','E','M','B'),
-+ gcvOBJ_MMU = gcmCC('M','M','U',' '),
-+ gcvOBJ_OS = gcmCC('O','S',' ',' '),
-+ gcvOBJ_OUTPUT = gcmCC('O','U','T','P'),
-+ gcvOBJ_PAINT = gcmCC('P','N','T',' '),
-+ gcvOBJ_PATH = gcmCC('P','A','T','H'),
-+ gcvOBJ_QUEUE = gcmCC('Q','U','E',' '),
-+ gcvOBJ_SAMPLER = gcmCC('S','A','M','P'),
-+ gcvOBJ_SHADER = gcmCC('S','H','D','R'),
-+ gcvOBJ_STREAM = gcmCC('S','T','R','M'),
-+ gcvOBJ_SURF = gcmCC('S','U','R','F'),
-+ gcvOBJ_TEXTURE = gcmCC('T','X','T','R'),
-+ gcvOBJ_UNIFORM = gcmCC('U','N','I','F'),
-+ gcvOBJ_VARIABLE = gcmCC('V','A','R','I'),
-+ gcvOBJ_VERTEX = gcmCC('V','R','T','X'),
-+ gcvOBJ_VIDMEM = gcmCC('V','M','E','M'),
-+ gcvOBJ_VG = gcmCC('V','G',' ',' '),
-+}
-+gceOBJECT_TYPE;
-+
-+/* gcsOBJECT object defintinon. */
-+typedef struct _gcsOBJECT
-+{
-+ /* Type of an object. */
-+ gceOBJECT_TYPE type;
-+}
-+gcsOBJECT;
-+
-+typedef struct _gckHARDWARE * gckHARDWARE;
-+
-+/* CORE flags. */
-+typedef enum _gceCORE
-+{
-+ gcvCORE_MAJOR = 0x0,
-+ gcvCORE_2D = 0x1,
-+ gcvCORE_VG = 0x2
-+}
-+gceCORE;
-+
-+#define gcdMAX_GPU_COUNT 3
-+
-+/*******************************************************************************
-+**
-+** gcmVERIFY_OBJECT
-+**
-+** Assert if an object is invalid or is not of the specified type. If the
-+** object is invalid or not of the specified type, gcvSTATUS_INVALID_OBJECT
-+** will be returned from the current function. In retail mode this macro
-+** does nothing.
-+**
-+** ARGUMENTS:
-+**
-+** obj Object to test.
-+** t Expected type of the object.
-+*/
-+#if gcmIS_DEBUG(gcdDEBUG_TRACE)
-+#define _gcmVERIFY_OBJECT(prefix, obj, t) \
-+ if ((obj) == gcvNULL) \
-+ { \
-+ prefix##TRACE(gcvLEVEL_ERROR, \
-+ #prefix "VERIFY_OBJECT failed: NULL"); \
-+ prefix##TRACE(gcvLEVEL_ERROR, " expected: %c%c%c%c", \
-+ gcmCC_PRINT(t)); \
-+ prefix##ASSERT((obj) != gcvNULL); \
-+ prefix##FOOTER_ARG("status=%d", gcvSTATUS_INVALID_OBJECT); \
-+ return gcvSTATUS_INVALID_OBJECT; \
-+ } \
-+ else if (((gcsOBJECT*) (obj))->type != t) \
-+ { \
-+ prefix##TRACE(gcvLEVEL_ERROR, \
-+ #prefix "VERIFY_OBJECT failed: %c%c%c%c", \
-+ gcmCC_PRINT(((gcsOBJECT*) (obj))->type)); \
-+ prefix##TRACE(gcvLEVEL_ERROR, " expected: %c%c%c%c", \
-+ gcmCC_PRINT(t)); \
-+ prefix##ASSERT(((gcsOBJECT*)(obj))->type == t); \
-+ prefix##FOOTER_ARG("status=%d", gcvSTATUS_INVALID_OBJECT); \
-+ return gcvSTATUS_INVALID_OBJECT; \
-+ }
-+
-+# define gcmVERIFY_OBJECT(obj, t) _gcmVERIFY_OBJECT(gcm, obj, t)
-+# define gcmkVERIFY_OBJECT(obj, t) _gcmVERIFY_OBJECT(gcmk, obj, t)
-+#else
-+# define gcmVERIFY_OBJECT(obj, t) do {} while (gcvFALSE)
-+# define gcmkVERIFY_OBJECT(obj, t) do {} while (gcvFALSE)
-+#endif
-+
-+/******************************************************************************/
-+/*VERIFY_OBJECT if special return expected*/
-+/******************************************************************************/
-+#ifndef EGL_API_ANDROID
-+# define _gcmVERIFY_OBJECT_RETURN(prefix, obj, t, retVal) \
-+ do \
-+ { \
-+ if ((obj) == gcvNULL) \
-+ { \
-+ prefix##PRINT_VERSION(); \
-+ prefix##TRACE(gcvLEVEL_ERROR, \
-+ #prefix "VERIFY_OBJECT_RETURN failed: NULL"); \
-+ prefix##TRACE(gcvLEVEL_ERROR, " expected: %c%c%c%c", \
-+ gcmCC_PRINT(t)); \
-+ prefix##ASSERT((obj) != gcvNULL); \
-+ prefix##FOOTER_ARG("retVal=%d", retVal); \
-+ return retVal; \
-+ } \
-+ else if (((gcsOBJECT*) (obj))->type != t) \
-+ { \
-+ prefix##PRINT_VERSION(); \
-+ prefix##TRACE(gcvLEVEL_ERROR, \
-+ #prefix "VERIFY_OBJECT_RETURN failed: %c%c%c%c", \
-+ gcmCC_PRINT(((gcsOBJECT*) (obj))->type)); \
-+ prefix##TRACE(gcvLEVEL_ERROR, " expected: %c%c%c%c", \
-+ gcmCC_PRINT(t)); \
-+ prefix##ASSERT(((gcsOBJECT*)(obj))->type == t); \
-+ prefix##FOOTER_ARG("retVal=%d", retVal); \
-+ return retVal; \
-+ } \
-+ } \
-+ while (gcvFALSE)
-+# define gcmVERIFY_OBJECT_RETURN(obj, t, retVal) \
-+ _gcmVERIFY_OBJECT_RETURN(gcm, obj, t, retVal)
-+# define gcmkVERIFY_OBJECT_RETURN(obj, t, retVal) \
-+ _gcmVERIFY_OBJECT_RETURN(gcmk, obj, t, retVal)
-+#else
-+# define gcmVERIFY_OBJECT_RETURN(obj, t) do {} while (gcvFALSE)
-+# define gcmVERIFY_OBJECT_RETURN(obj, t) do {} while (gcvFALSE)
-+#endif
-+
-+/******************************************************************************\
-+********************************** gckOS Object *********************************
-+\******************************************************************************/
-+
-+/* Construct a new gckOS object. */
-+gceSTATUS
-+gckOS_Construct(
-+ IN gctPOINTER Context,
-+ OUT gckOS * Os
-+ );
-+
-+/* Destroy an gckOS object. */
-+gceSTATUS
-+gckOS_Destroy(
-+ IN gckOS Os
-+ );
-+
-+/* Query the video memory. */
-+gceSTATUS
-+gckOS_QueryVideoMemory(
-+ IN gckOS Os,
-+ OUT gctPHYS_ADDR * InternalAddress,
-+ OUT gctSIZE_T * InternalSize,
-+ OUT gctPHYS_ADDR * ExternalAddress,
-+ OUT gctSIZE_T * ExternalSize,
-+ OUT gctPHYS_ADDR * ContiguousAddress,
-+ OUT gctSIZE_T * ContiguousSize
-+ );
-+
-+/* Allocate memory from the heap. */
-+gceSTATUS
-+gckOS_Allocate(
-+ IN gckOS Os,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPOINTER * Memory
-+ );
-+
-+/* Free allocated memory. */
-+gceSTATUS
-+gckOS_Free(
-+ IN gckOS Os,
-+ IN gctPOINTER Memory
-+ );
-+
-+/* Wrapper for allocation memory.. */
-+gceSTATUS
-+gckOS_AllocateMemory(
-+ IN gckOS Os,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPOINTER * Memory
-+ );
-+
-+/* Wrapper for freeing memory. */
-+gceSTATUS
-+gckOS_FreeMemory(
-+ IN gckOS Os,
-+ IN gctPOINTER Memory
-+ );
-+
-+/* Allocate paged memory. */
-+gceSTATUS
-+gckOS_AllocatePagedMemory(
-+ IN gckOS Os,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPHYS_ADDR * Physical
-+ );
-+
-+/* Allocate paged memory. */
-+gceSTATUS
-+gckOS_AllocatePagedMemoryEx(
-+ IN gckOS Os,
-+ IN gctBOOL Contiguous,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPHYS_ADDR * Physical
-+ );
-+
-+/* Lock pages. */
-+gceSTATUS
-+gckOS_LockPages(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ IN gctBOOL Cacheable,
-+ OUT gctPOINTER * Logical,
-+ OUT gctSIZE_T * PageCount
-+ );
-+
-+/* Map pages. */
-+gceSTATUS
-+gckOS_MapPages(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+#ifdef __QNXNTO__
-+ IN gctPOINTER Logical,
-+#endif
-+ IN gctSIZE_T PageCount,
-+ IN gctPOINTER PageTable
-+ );
-+
-+/* Map pages. */
-+gceSTATUS
-+gckOS_MapPagesEx(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctPHYS_ADDR Physical,
-+#ifdef __QNXNTO__
-+ IN gctPOINTER Logical,
-+#endif
-+ IN gctSIZE_T PageCount,
-+ IN gctPOINTER PageTable
-+ );
-+
-+/* Unlock pages. */
-+gceSTATUS
-+gckOS_UnlockPages(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ IN gctPOINTER Logical
-+ );
-+
-+/* Free paged memory. */
-+gceSTATUS
-+gckOS_FreePagedMemory(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes
-+ );
-+
-+/* Allocate non-paged memory. */
-+gceSTATUS
-+gckOS_AllocateNonPagedMemory(
-+ IN gckOS Os,
-+ IN gctBOOL InUserSpace,
-+ IN OUT gctSIZE_T * Bytes,
-+ OUT gctPHYS_ADDR * Physical,
-+ OUT gctPOINTER * Logical
-+ );
-+
-+/* Free non-paged memory. */
-+gceSTATUS
-+gckOS_FreeNonPagedMemory(
-+ IN gckOS Os,
-+ IN gctSIZE_T Bytes,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctPOINTER Logical
-+ );
-+
-+/* Allocate contiguous memory. */
-+gceSTATUS
-+gckOS_AllocateContiguous(
-+ IN gckOS Os,
-+ IN gctBOOL InUserSpace,
-+ IN OUT gctSIZE_T * Bytes,
-+ OUT gctPHYS_ADDR * Physical,
-+ OUT gctPOINTER * Logical
-+ );
-+
-+/* Free contiguous memory. */
-+gceSTATUS
-+gckOS_FreeContiguous(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctPOINTER Logical,
-+ IN gctSIZE_T Bytes
-+ );
-+
-+/* Get the number fo bytes per page. */
-+gceSTATUS
-+gckOS_GetPageSize(
-+ IN gckOS Os,
-+ OUT gctSIZE_T * PageSize
-+ );
-+
-+/* Get the physical address of a corresponding logical address. */
-+gceSTATUS
-+gckOS_GetPhysicalAddress(
-+ IN gckOS Os,
-+ IN gctPOINTER Logical,
-+ OUT gctUINT32 * Address
-+ );
-+
-+/* Get the physical address of a corresponding logical address. */
-+gceSTATUS
-+gckOS_GetPhysicalAddressProcess(
-+ IN gckOS Os,
-+ IN gctPOINTER Logical,
-+ IN gctUINT32 ProcessID,
-+ OUT gctUINT32 * Address
-+ );
-+
-+/* Map physical memory. */
-+gceSTATUS
-+gckOS_MapPhysical(
-+ IN gckOS Os,
-+ IN gctUINT32 Physical,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPOINTER * Logical
-+ );
-+
-+/* Unmap previously mapped physical memory. */
-+gceSTATUS
-+gckOS_UnmapPhysical(
-+ IN gckOS Os,
-+ IN gctPOINTER Logical,
-+ IN gctSIZE_T Bytes
-+ );
-+
-+/* Read data from a hardware register. */
-+gceSTATUS
-+gckOS_ReadRegister(
-+ IN gckOS Os,
-+ IN gctUINT32 Address,
-+ OUT gctUINT32 * Data
-+ );
-+
-+/* Read data from a hardware register. */
-+gceSTATUS
-+gckOS_ReadRegisterEx(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctUINT32 Address,
-+ OUT gctUINT32 * Data
-+ );
-+
-+/* Write data to a hardware register. */
-+gceSTATUS
-+gckOS_WriteRegister(
-+ IN gckOS Os,
-+ IN gctUINT32 Address,
-+ IN gctUINT32 Data
-+ );
-+
-+/* Write data to a hardware register. */
-+gceSTATUS
-+gckOS_WriteRegisterEx(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctUINT32 Address,
-+ IN gctUINT32 Data
-+ );
-+
-+/* Write data to a 32-bit memory location. */
-+gceSTATUS
-+gckOS_WriteMemory(
-+ IN gckOS Os,
-+ IN gctPOINTER Address,
-+ IN gctUINT32 Data
-+ );
-+
-+/* Map physical memory into the process space. */
-+gceSTATUS
-+gckOS_MapMemory(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPOINTER * Logical
-+ );
-+
-+/* Unmap physical memory from the specified process space. */
-+gceSTATUS
-+gckOS_UnmapMemoryEx(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ IN gctPOINTER Logical,
-+ IN gctUINT32 PID
-+ );
-+
-+/* Unmap physical memory from the process space. */
-+gceSTATUS
-+gckOS_UnmapMemory(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ IN gctPOINTER Logical
-+ );
-+
-+/* Unmap user logical memory out of physical memory.
-+ * This function is only supported in Linux currently.
-+ */
-+gceSTATUS
-+gckOS_UnmapUserLogical(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ IN gctPOINTER Logical
-+ );
-+
-+/* Create a new mutex. */
-+gceSTATUS
-+gckOS_CreateMutex(
-+ IN gckOS Os,
-+ OUT gctPOINTER * Mutex
-+ );
-+
-+/* Delete a mutex. */
-+gceSTATUS
-+gckOS_DeleteMutex(
-+ IN gckOS Os,
-+ IN gctPOINTER Mutex
-+ );
-+
-+/* Acquire a mutex. */
-+gceSTATUS
-+gckOS_AcquireMutex(
-+ IN gckOS Os,
-+ IN gctPOINTER Mutex,
-+ IN gctUINT32 Timeout
-+ );
-+
-+/* Release a mutex. */
-+gceSTATUS
-+gckOS_ReleaseMutex(
-+ IN gckOS Os,
-+ IN gctPOINTER Mutex
-+ );
-+
-+/* Atomically exchange a pair of 32-bit values. */
-+gceSTATUS
-+gckOS_AtomicExchange(
-+ IN gckOS Os,
-+ IN OUT gctUINT32_PTR Target,
-+ IN gctUINT32 NewValue,
-+ OUT gctUINT32_PTR OldValue
-+ );
-+
-+/* Atomically exchange a pair of pointers. */
-+gceSTATUS
-+gckOS_AtomicExchangePtr(
-+ IN gckOS Os,
-+ IN OUT gctPOINTER * Target,
-+ IN gctPOINTER NewValue,
-+ OUT gctPOINTER * OldValue
-+ );
-+
-+#if gcdSMP
-+gceSTATUS
-+gckOS_AtomSetMask(
-+ IN gctPOINTER Atom,
-+ IN gctUINT32 Mask
-+ );
-+
-+gceSTATUS
-+gckOS_AtomClearMask(
-+ IN gctPOINTER Atom,
-+ IN gctUINT32 Mask
-+ );
-+#endif
-+
-+gceSTATUS
-+gckOS_DumpCallStack(
-+ IN gckOS Os
-+ );
-+
-+gceSTATUS
-+gckOS_GetProcessNameByPid(
-+ IN gctINT Pid,
-+ IN gctSIZE_T Length,
-+ OUT gctUINT8_PTR String
-+ );
-+
-+
-+
-+/*******************************************************************************
-+**
-+** gckOS_AtomConstruct
-+**
-+** Create an atom.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to a gckOS object.
-+**
-+** OUTPUT:
-+**
-+** gctPOINTER * Atom
-+** Pointer to a variable receiving the constructed atom.
-+*/
-+gceSTATUS
-+gckOS_AtomConstruct(
-+ IN gckOS Os,
-+ OUT gctPOINTER * Atom
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_AtomDestroy
-+**
-+** Destroy an atom.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to a gckOS object.
-+**
-+** gctPOINTER Atom
-+** Pointer to the atom to destroy.
-+**
-+** OUTPUT:
-+**
-+** Nothing.
-+*/
-+gceSTATUS
-+gckOS_AtomDestroy(
-+ IN gckOS Os,
-+ OUT gctPOINTER Atom
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_AtomGet
-+**
-+** Get the 32-bit value protected by an atom.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to a gckOS object.
-+**
-+** gctPOINTER Atom
-+** Pointer to the atom.
-+**
-+** OUTPUT:
-+**
-+** gctINT32_PTR Value
-+** Pointer to a variable the receives the value of the atom.
-+*/
-+gceSTATUS
-+gckOS_AtomGet(
-+ IN gckOS Os,
-+ IN gctPOINTER Atom,
-+ OUT gctINT32_PTR Value
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_AtomSet
-+**
-+** Set the 32-bit value protected by an atom.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to a gckOS object.
-+**
-+** gctPOINTER Atom
-+** Pointer to the atom.
-+**
-+** gctINT32 Value
-+** The value of the atom.
-+**
-+** OUTPUT:
-+**
-+** Nothing.
-+*/
-+gceSTATUS
-+gckOS_AtomSet(
-+ IN gckOS Os,
-+ IN gctPOINTER Atom,
-+ IN gctINT32 Value
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_AtomIncrement
-+**
-+** Atomically increment the 32-bit integer value inside an atom.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to a gckOS object.
-+**
-+** gctPOINTER Atom
-+** Pointer to the atom.
-+**
-+** OUTPUT:
-+**
-+** gctINT32_PTR Value
-+** Pointer to a variable the receives the original value of the atom.
-+*/
-+gceSTATUS
-+gckOS_AtomIncrement(
-+ IN gckOS Os,
-+ IN gctPOINTER Atom,
-+ OUT gctINT32_PTR Value
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_AtomDecrement
-+**
-+** Atomically decrement the 32-bit integer value inside an atom.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to a gckOS object.
-+**
-+** gctPOINTER Atom
-+** Pointer to the atom.
-+**
-+** OUTPUT:
-+**
-+** gctINT32_PTR Value
-+** Pointer to a variable the receives the original value of the atom.
-+*/
-+gceSTATUS
-+gckOS_AtomDecrement(
-+ IN gckOS Os,
-+ IN gctPOINTER Atom,
-+ OUT gctINT32_PTR Value
-+ );
-+
-+/* Delay a number of microseconds. */
-+gceSTATUS
-+gckOS_Delay(
-+ IN gckOS Os,
-+ IN gctUINT32 Delay
-+ );
-+
-+/* Get time in milliseconds. */
-+gceSTATUS
-+gckOS_GetTicks(
-+ OUT gctUINT32_PTR Time
-+ );
-+
-+/* Compare time value. */
-+gceSTATUS
-+gckOS_TicksAfter(
-+ IN gctUINT32 Time1,
-+ IN gctUINT32 Time2,
-+ OUT gctBOOL_PTR IsAfter
-+ );
-+
-+/* Get time in microseconds. */
-+gceSTATUS
-+gckOS_GetTime(
-+ OUT gctUINT64_PTR Time
-+ );
-+
-+/* Memory barrier. */
-+gceSTATUS
-+gckOS_MemoryBarrier(
-+ IN gckOS Os,
-+ IN gctPOINTER Address
-+ );
-+
-+/* Map user pointer. */
-+gceSTATUS
-+gckOS_MapUserPointer(
-+ IN gckOS Os,
-+ IN gctPOINTER Pointer,
-+ IN gctSIZE_T Size,
-+ OUT gctPOINTER * KernelPointer
-+ );
-+
-+/* Unmap user pointer. */
-+gceSTATUS
-+gckOS_UnmapUserPointer(
-+ IN gckOS Os,
-+ IN gctPOINTER Pointer,
-+ IN gctSIZE_T Size,
-+ IN gctPOINTER KernelPointer
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_QueryNeedCopy
-+**
-+** Query whether the memory can be accessed or mapped directly or it has to be
-+** copied.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to an gckOS object.
-+**
-+** gctUINT32 ProcessID
-+** Process ID of the current process.
-+**
-+** OUTPUT:
-+**
-+** gctBOOL_PTR NeedCopy
-+** Pointer to a boolean receiving gcvTRUE if the memory needs a copy or
-+** gcvFALSE if the memory can be accessed or mapped dircetly.
-+*/
-+gceSTATUS
-+gckOS_QueryNeedCopy(
-+ IN gckOS Os,
-+ IN gctUINT32 ProcessID,
-+ OUT gctBOOL_PTR NeedCopy
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_CopyFromUserData
-+**
-+** Copy data from user to kernel memory.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to an gckOS object.
-+**
-+** gctPOINTER KernelPointer
-+** Pointer to kernel memory.
-+**
-+** gctPOINTER Pointer
-+** Pointer to user memory.
-+**
-+** gctSIZE_T Size
-+** Number of bytes to copy.
-+**
-+** OUTPUT:
-+**
-+** Nothing.
-+*/
-+gceSTATUS
-+gckOS_CopyFromUserData(
-+ IN gckOS Os,
-+ IN gctPOINTER KernelPointer,
-+ IN gctPOINTER Pointer,
-+ IN gctSIZE_T Size
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_CopyToUserData
-+**
-+** Copy data from kernel to user memory.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to an gckOS object.
-+**
-+** gctPOINTER KernelPointer
-+** Pointer to kernel memory.
-+**
-+** gctPOINTER Pointer
-+** Pointer to user memory.
-+**
-+** gctSIZE_T Size
-+** Number of bytes to copy.
-+**
-+** OUTPUT:
-+**
-+** Nothing.
-+*/
-+gceSTATUS
-+gckOS_CopyToUserData(
-+ IN gckOS Os,
-+ IN gctPOINTER KernelPointer,
-+ IN gctPOINTER Pointer,
-+ IN gctSIZE_T Size
-+ );
-+
-+#ifdef __QNXNTO__
-+/* Map user physical address. */
-+gceSTATUS
-+gckOS_MapUserPhysical(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Phys,
-+ OUT gctPOINTER * KernelPointer
-+ );
-+#endif
-+
-+gceSTATUS
-+gckOS_SuspendInterrupt(
-+ IN gckOS Os
-+ );
-+
-+gceSTATUS
-+gckOS_SuspendInterruptEx(
-+ IN gckOS Os,
-+ IN gceCORE Core
-+ );
-+
-+gceSTATUS
-+gckOS_ResumeInterrupt(
-+ IN gckOS Os
-+ );
-+
-+gceSTATUS
-+gckOS_ResumeInterruptEx(
-+ IN gckOS Os,
-+ IN gceCORE Core
-+ );
-+
-+/* Get the base address for the physical memory. */
-+gceSTATUS
-+gckOS_GetBaseAddress(
-+ IN gckOS Os,
-+ OUT gctUINT32_PTR BaseAddress
-+ );
-+
-+/* Perform a memory copy. */
-+gceSTATUS
-+gckOS_MemCopy(
-+ IN gctPOINTER Destination,
-+ IN gctCONST_POINTER Source,
-+ IN gctSIZE_T Bytes
-+ );
-+
-+/* Zero memory. */
-+gceSTATUS
-+gckOS_ZeroMemory(
-+ IN gctPOINTER Memory,
-+ IN gctSIZE_T Bytes
-+ );
-+
-+/* Device I/O control to the kernel HAL layer. */
-+gceSTATUS
-+gckOS_DeviceControl(
-+ IN gckOS Os,
-+ IN gctBOOL FromUser,
-+ IN gctUINT32 IoControlCode,
-+ IN gctPOINTER InputBuffer,
-+ IN gctSIZE_T InputBufferSize,
-+ OUT gctPOINTER OutputBuffer,
-+ IN gctSIZE_T OutputBufferSize
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_GetProcessID
-+**
-+** Get current process ID.
-+**
-+** INPUT:
-+**
-+** Nothing.
-+**
-+** OUTPUT:
-+**
-+** gctUINT32_PTR ProcessID
-+** Pointer to the variable that receives the process ID.
-+*/
-+gceSTATUS
-+gckOS_GetProcessID(
-+ OUT gctUINT32_PTR ProcessID
-+ );
-+
-+gceSTATUS
-+gckOS_GetCurrentProcessID(
-+ OUT gctUINT32_PTR ProcessID
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_GetThreadID
-+**
-+** Get current thread ID.
-+**
-+** INPUT:
-+**
-+** Nothing.
-+**
-+** OUTPUT:
-+**
-+** gctUINT32_PTR ThreadID
-+** Pointer to the variable that receives the thread ID.
-+*/
-+gceSTATUS
-+gckOS_GetThreadID(
-+ OUT gctUINT32_PTR ThreadID
-+ );
-+
-+/******************************************************************************\
-+********************************** Signal Object *********************************
-+\******************************************************************************/
-+
-+/* Create a signal. */
-+gceSTATUS
-+gckOS_CreateSignal(
-+ IN gckOS Os,
-+ IN gctBOOL ManualReset,
-+ OUT gctSIGNAL * Signal
-+ );
-+
-+/* Destroy a signal. */
-+gceSTATUS
-+gckOS_DestroySignal(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal
-+ );
-+
-+/* Signal a signal. */
-+gceSTATUS
-+gckOS_Signal(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal,
-+ IN gctBOOL State
-+ );
-+
-+/* Wait for a signal. */
-+gceSTATUS
-+gckOS_WaitSignal(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal,
-+ IN gctUINT32 Wait
-+ );
-+
-+/* Map a user signal to the kernel space. */
-+gceSTATUS
-+gckOS_MapSignal(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal,
-+ IN gctHANDLE Process,
-+ OUT gctSIGNAL * MappedSignal
-+ );
-+
-+/* Unmap a user signal */
-+gceSTATUS
-+gckOS_UnmapSignal(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal
-+ );
-+
-+/* Map user memory. */
-+gceSTATUS
-+gckOS_MapUserMemory(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctPOINTER Memory,
-+ IN gctUINT32 Physical,
-+ IN gctSIZE_T Size,
-+ OUT gctPOINTER * Info,
-+ OUT gctUINT32_PTR Address
-+ );
-+
-+/* Unmap user memory. */
-+gceSTATUS
-+gckOS_UnmapUserMemory(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctPOINTER Memory,
-+ IN gctSIZE_T Size,
-+ IN gctPOINTER Info,
-+ IN gctUINT32 Address
-+ );
-+
-+/******************************************************************************\
-+************************** Android Native Fence Sync ***************************
-+\******************************************************************************/
-+gceSTATUS
-+gckOS_CreateSyncTimeline(
-+ IN gckOS Os,
-+ OUT gctHANDLE * Timeline
-+ );
-+
-+gceSTATUS
-+gckOS_DestroySyncTimeline(
-+ IN gckOS Os,
-+ IN gctHANDLE Timeline
-+ );
-+
-+gceSTATUS
-+gckOS_CreateSyncPoint(
-+ IN gckOS Os,
-+ OUT gctSYNC_POINT * SyncPoint
-+ );
-+
-+gceSTATUS
-+gckOS_ReferenceSyncPoint(
-+ IN gckOS Os,
-+ IN gctSYNC_POINT SyncPoint
-+ );
-+
-+gceSTATUS
-+gckOS_DestroySyncPoint(
-+ IN gckOS Os,
-+ IN gctSYNC_POINT SyncPoint
-+ );
-+
-+gceSTATUS
-+gckOS_SignalSyncPoint(
-+ IN gckOS Os,
-+ IN gctSYNC_POINT SyncPoint
-+ );
-+
-+gceSTATUS
-+gckOS_QuerySyncPoint(
-+ IN gckOS Os,
-+ IN gctSYNC_POINT SyncPoint,
-+ OUT gctBOOL_PTR State
-+ );
-+
-+gceSTATUS
-+gckOS_CreateNativeFence(
-+ IN gckOS Os,
-+ IN gctHANDLE Timeline,
-+ IN gctSYNC_POINT SyncPoint,
-+ OUT gctINT * FenceFD
-+ );
-+
-+#if !USE_NEW_LINUX_SIGNAL
-+/* Create signal to be used in the user space. */
-+gceSTATUS
-+gckOS_CreateUserSignal(
-+ IN gckOS Os,
-+ IN gctBOOL ManualReset,
-+ OUT gctINT * SignalID
-+ );
-+
-+/* Destroy signal used in the user space. */
-+gceSTATUS
-+gckOS_DestroyUserSignal(
-+ IN gckOS Os,
-+ IN gctINT SignalID
-+ );
-+
-+/* Wait for signal used in the user space. */
-+gceSTATUS
-+gckOS_WaitUserSignal(
-+ IN gckOS Os,
-+ IN gctINT SignalID,
-+ IN gctUINT32 Wait
-+ );
-+
-+/* Signal a signal used in the user space. */
-+gceSTATUS
-+gckOS_SignalUserSignal(
-+ IN gckOS Os,
-+ IN gctINT SignalID,
-+ IN gctBOOL State
-+ );
-+#endif /* USE_NEW_LINUX_SIGNAL */
-+
-+/* Set a signal owned by a process. */
-+#if defined(__QNXNTO__)
-+gceSTATUS
-+gckOS_UserSignal(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal,
-+ IN gctINT Recvid,
-+ IN gctINT Coid
-+ );
-+#else
-+gceSTATUS
-+gckOS_UserSignal(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal,
-+ IN gctHANDLE Process
-+ );
-+#endif
-+
-+/******************************************************************************\
-+** Cache Support
-+*/
-+
-+gceSTATUS
-+gckOS_CacheClean(
-+ gckOS Os,
-+ gctUINT32 ProcessID,
-+ gctPHYS_ADDR Handle,
-+ gctPOINTER Physical,
-+ gctPOINTER Logical,
-+ gctSIZE_T Bytes
-+ );
-+
-+gceSTATUS
-+gckOS_CacheFlush(
-+ gckOS Os,
-+ gctUINT32 ProcessID,
-+ gctPHYS_ADDR Handle,
-+ gctPOINTER Physical,
-+ gctPOINTER Logical,
-+ gctSIZE_T Bytes
-+ );
-+
-+gceSTATUS
-+gckOS_CacheInvalidate(
-+ gckOS Os,
-+ gctUINT32 ProcessID,
-+ gctPHYS_ADDR Handle,
-+ gctPOINTER Physical,
-+ gctPOINTER Logical,
-+ gctSIZE_T Bytes
-+ );
-+
-+/******************************************************************************\
-+** Debug Support
-+*/
-+
-+void
-+gckOS_SetDebugLevel(
-+ IN gctUINT32 Level
-+ );
-+
-+void
-+gckOS_SetDebugZone(
-+ IN gctUINT32 Zone
-+ );
-+
-+void
-+gckOS_SetDebugLevelZone(
-+ IN gctUINT32 Level,
-+ IN gctUINT32 Zone
-+ );
-+
-+void
-+gckOS_SetDebugZones(
-+ IN gctUINT32 Zones,
-+ IN gctBOOL Enable
-+ );
-+
-+void
-+gckOS_SetDebugFile(
-+ IN gctCONST_STRING FileName
-+ );
-+
-+/*******************************************************************************
-+** Broadcast interface.
-+*/
-+
-+typedef enum _gceBROADCAST
-+{
-+ /* GPU might be idle. */
-+ gcvBROADCAST_GPU_IDLE,
-+
-+ /* A commit is going to happen. */
-+ gcvBROADCAST_GPU_COMMIT,
-+
-+ /* GPU seems to be stuck. */
-+ gcvBROADCAST_GPU_STUCK,
-+
-+ /* First process gets attached. */
-+ gcvBROADCAST_FIRST_PROCESS,
-+
-+ /* Last process gets detached. */
-+ gcvBROADCAST_LAST_PROCESS,
-+
-+ /* AXI bus error. */
-+ gcvBROADCAST_AXI_BUS_ERROR,
-+}
-+gceBROADCAST;
-+
-+gceSTATUS
-+gckOS_Broadcast(
-+ IN gckOS Os,
-+ IN gckHARDWARE Hardware,
-+ IN gceBROADCAST Reason
-+ );
-+
-+gceSTATUS
-+gckOS_BroadcastHurry(
-+ IN gckOS Os,
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT Urgency
-+ );
-+
-+gceSTATUS
-+gckOS_BroadcastCalibrateSpeed(
-+ IN gckOS Os,
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT Idle,
-+ IN gctUINT Time
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_SetGPUPower
-+**
-+** Set the power of the GPU on or off.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to a gckOS object.ß
-+**
-+** gckCORE Core
-+** GPU whose power is set.
-+**
-+** gctBOOL Clock
-+** gcvTRUE to turn on the clock, or gcvFALSE to turn off the clock.
-+**
-+** gctBOOL Power
-+** gcvTRUE to turn on the power, or gcvFALSE to turn off the power.
-+**
-+** OUTPUT:
-+**
-+** Nothing.
-+*/
-+gceSTATUS
-+gckOS_SetGPUPower(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctBOOL Clock,
-+ IN gctBOOL Power
-+ );
-+
-+gceSTATUS
-+gckOS_ResetGPU(
-+ IN gckOS Os,
-+ IN gceCORE Core
-+ );
-+
-+gceSTATUS
-+gckOS_PrepareGPUFrequency(
-+ IN gckOS Os,
-+ IN gceCORE Core
-+ );
-+
-+gceSTATUS
-+gckOS_FinishGPUFrequency(
-+ IN gckOS Os,
-+ IN gceCORE Core
-+ );
-+
-+gceSTATUS
-+gckOS_QueryGPUFrequency(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ OUT gctUINT32 * Frequency,
-+ OUT gctUINT8 * Scale
-+ );
-+
-+gceSTATUS
-+gckOS_SetGPUFrequency(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctUINT8 Scale
-+ );
-+
-+/*******************************************************************************
-+** Semaphores.
-+*/
-+
-+/* Create a new semaphore. */
-+gceSTATUS
-+gckOS_CreateSemaphore(
-+ IN gckOS Os,
-+ OUT gctPOINTER * Semaphore
-+ );
-+
-+#if gcdENABLE_VG
-+gceSTATUS
-+gckOS_CreateSemaphoreVG(
-+ IN gckOS Os,
-+ OUT gctPOINTER * Semaphore
-+ );
-+#endif
-+
-+/* Delete a semahore. */
-+gceSTATUS
-+gckOS_DestroySemaphore(
-+ IN gckOS Os,
-+ IN gctPOINTER Semaphore
-+ );
-+
-+/* Acquire a semahore. */
-+gceSTATUS
-+gckOS_AcquireSemaphore(
-+ IN gckOS Os,
-+ IN gctPOINTER Semaphore
-+ );
-+
-+/* Try to acquire a semahore. */
-+gceSTATUS
-+gckOS_TryAcquireSemaphore(
-+ IN gckOS Os,
-+ IN gctPOINTER Semaphore
-+ );
-+
-+/* Release a semahore. */
-+gceSTATUS
-+gckOS_ReleaseSemaphore(
-+ IN gckOS Os,
-+ IN gctPOINTER Semaphore
-+ );
-+
-+/*******************************************************************************
-+** Timer API.
-+*/
-+
-+typedef void (*gctTIMERFUNCTION)(gctPOINTER);
-+
-+/* Create a timer. */
-+gceSTATUS
-+gckOS_CreateTimer(
-+ IN gckOS Os,
-+ IN gctTIMERFUNCTION Function,
-+ IN gctPOINTER Data,
-+ OUT gctPOINTER * Timer
-+ );
-+
-+/* Destory a timer. */
-+gceSTATUS
-+gckOS_DestroyTimer(
-+ IN gckOS Os,
-+ IN gctPOINTER Timer
-+ );
-+
-+/* Start a timer. */
-+gceSTATUS
-+gckOS_StartTimer(
-+ IN gckOS Os,
-+ IN gctPOINTER Timer,
-+ IN gctUINT32 Delay
-+ );
-+
-+/* Stop a timer. */
-+gceSTATUS
-+gckOS_StopTimer(
-+ IN gckOS Os,
-+ IN gctPOINTER Timer
-+ );
-+
-+/******************************************************************************\
-+********************************* gckHEAP Object ********************************
-+\******************************************************************************/
-+
-+typedef struct _gckHEAP * gckHEAP;
-+
-+/* Construct a new gckHEAP object. */
-+gceSTATUS
-+gckHEAP_Construct(
-+ IN gckOS Os,
-+ IN gctSIZE_T AllocationSize,
-+ OUT gckHEAP * Heap
-+ );
-+
-+/* Destroy an gckHEAP object. */
-+gceSTATUS
-+gckHEAP_Destroy(
-+ IN gckHEAP Heap
-+ );
-+
-+/* Allocate memory. */
-+gceSTATUS
-+gckHEAP_Allocate(
-+ IN gckHEAP Heap,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPOINTER * Node
-+ );
-+
-+/* Free memory. */
-+gceSTATUS
-+gckHEAP_Free(
-+ IN gckHEAP Heap,
-+ IN gctPOINTER Node
-+ );
-+
-+/* Profile the heap. */
-+gceSTATUS
-+gckHEAP_ProfileStart(
-+ IN gckHEAP Heap
-+ );
-+
-+gceSTATUS
-+gckHEAP_ProfileEnd(
-+ IN gckHEAP Heap,
-+ IN gctCONST_STRING Title
-+ );
-+
-+
-+/******************************************************************************\
-+******************************** gckVIDMEM Object ******************************
-+\******************************************************************************/
-+
-+typedef struct _gckVIDMEM * gckVIDMEM;
-+typedef struct _gckKERNEL * gckKERNEL;
-+typedef struct _gckDB * gckDB;
-+typedef struct _gckDVFS * gckDVFS;
-+
-+/* Construct a new gckVIDMEM object. */
-+gceSTATUS
-+gckVIDMEM_Construct(
-+ IN gckOS Os,
-+ IN gctUINT32 BaseAddress,
-+ IN gctSIZE_T Bytes,
-+ IN gctSIZE_T Threshold,
-+ IN gctSIZE_T Banking,
-+ OUT gckVIDMEM * Memory
-+ );
-+
-+/* Destroy an gckVDIMEM object. */
-+gceSTATUS
-+gckVIDMEM_Destroy(
-+ IN gckVIDMEM Memory
-+ );
-+
-+/* Allocate rectangular memory. */
-+gceSTATUS
-+gckVIDMEM_Allocate(
-+ IN gckVIDMEM Memory,
-+ IN gctUINT Width,
-+ IN gctUINT Height,
-+ IN gctUINT Depth,
-+ IN gctUINT BytesPerPixel,
-+ IN gctUINT32 Alignment,
-+ IN gceSURF_TYPE Type,
-+ OUT gcuVIDMEM_NODE_PTR * Node
-+ );
-+
-+/* Allocate linear memory. */
-+gceSTATUS
-+gckVIDMEM_AllocateLinear(
-+ IN gckVIDMEM Memory,
-+ IN gctSIZE_T Bytes,
-+ IN gctUINT32 Alignment,
-+ IN gceSURF_TYPE Type,
-+ OUT gcuVIDMEM_NODE_PTR * Node
-+ );
-+
-+/* Free memory. */
-+gceSTATUS
-+gckVIDMEM_Free(
-+ IN gcuVIDMEM_NODE_PTR Node
-+ );
-+
-+/* Lock memory. */
-+gceSTATUS
-+gckVIDMEM_Lock(
-+ IN gckKERNEL Kernel,
-+ IN gcuVIDMEM_NODE_PTR Node,
-+ IN gctBOOL Cacheable,
-+ OUT gctUINT32 * Address
-+ );
-+
-+/* Unlock memory. */
-+gceSTATUS
-+gckVIDMEM_Unlock(
-+ IN gckKERNEL Kernel,
-+ IN gcuVIDMEM_NODE_PTR Node,
-+ IN gceSURF_TYPE Type,
-+ IN OUT gctBOOL * Asynchroneous
-+ );
-+
-+/* Construct a gcuVIDMEM_NODE union for virtual memory. */
-+gceSTATUS
-+gckVIDMEM_ConstructVirtual(
-+ IN gckKERNEL Kernel,
-+ IN gctBOOL Contiguous,
-+ IN gctSIZE_T Bytes,
-+ OUT gcuVIDMEM_NODE_PTR * Node
-+ );
-+
-+/* Destroy a gcuVIDMEM_NODE union for virtual memory. */
-+gceSTATUS
-+gckVIDMEM_DestroyVirtual(
-+ IN gcuVIDMEM_NODE_PTR Node
-+ );
-+
-+/******************************************************************************\
-+******************************** gckKERNEL Object ******************************
-+\******************************************************************************/
-+
-+struct _gcsHAL_INTERFACE;
-+
-+/* Notifications. */
-+typedef enum _gceNOTIFY
-+{
-+ gcvNOTIFY_INTERRUPT,
-+ gcvNOTIFY_COMMAND_QUEUE,
-+}
-+gceNOTIFY;
-+
-+/* Flush flags. */
-+typedef enum _gceKERNEL_FLUSH
-+{
-+ gcvFLUSH_COLOR = 0x01,
-+ gcvFLUSH_DEPTH = 0x02,
-+ gcvFLUSH_TEXTURE = 0x04,
-+ gcvFLUSH_2D = 0x08,
-+ gcvFLUSH_ALL = gcvFLUSH_COLOR
-+ | gcvFLUSH_DEPTH
-+ | gcvFLUSH_TEXTURE
-+ | gcvFLUSH_2D,
-+}
-+gceKERNEL_FLUSH;
-+
-+/* Construct a new gckKERNEL object. */
-+gceSTATUS
-+gckKERNEL_Construct(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctPOINTER Context,
-+ IN gckDB SharedDB,
-+ OUT gckKERNEL * Kernel
-+ );
-+
-+/* Destroy an gckKERNEL object. */
-+gceSTATUS
-+gckKERNEL_Destroy(
-+ IN gckKERNEL Kernel
-+ );
-+
-+/* Dispatch a user-level command. */
-+gceSTATUS
-+gckKERNEL_Dispatch(
-+ IN gckKERNEL Kernel,
-+ IN gctBOOL FromUser,
-+ IN OUT struct _gcsHAL_INTERFACE * Interface
-+ );
-+
-+/* Query the video memory. */
-+gceSTATUS
-+gckKERNEL_QueryVideoMemory(
-+ IN gckKERNEL Kernel,
-+ OUT struct _gcsHAL_INTERFACE * Interface
-+ );
-+
-+/* Lookup the gckVIDMEM object for a pool. */
-+gceSTATUS
-+gckKERNEL_GetVideoMemoryPool(
-+ IN gckKERNEL Kernel,
-+ IN gcePOOL Pool,
-+ OUT gckVIDMEM * VideoMemory
-+ );
-+
-+#if gcdUSE_VIDMEM_PER_PID
-+gceSTATUS
-+gckKERNEL_GetVideoMemoryPoolPid(
-+ IN gckKERNEL Kernel,
-+ IN gcePOOL Pool,
-+ IN gctUINT32 Pid,
-+ OUT gckVIDMEM * VideoMemory
-+ );
-+
-+gceSTATUS
-+gckKERNEL_CreateVideoMemoryPoolPid(
-+ IN gckKERNEL Kernel,
-+ IN gcePOOL Pool,
-+ IN gctUINT32 Pid,
-+ OUT gckVIDMEM * VideoMemory
-+ );
-+
-+gceSTATUS
-+gckKERNEL_RemoveVideoMemoryPoolPid(
-+ IN gckKERNEL Kernel,
-+ IN gckVIDMEM VideoMemory
-+ );
-+#endif
-+
-+/* Map video memory. */
-+gceSTATUS
-+gckKERNEL_MapVideoMemory(
-+ IN gckKERNEL Kernel,
-+ IN gctBOOL InUserSpace,
-+ IN gctUINT32 Address,
-+#ifdef __QNXNTO__
-+ IN gctUINT32 Pid,
-+ IN gctUINT32 Bytes,
-+#endif
-+ OUT gctPOINTER * Logical
-+ );
-+
-+/* Map video memory. */
-+gceSTATUS
-+gckKERNEL_MapVideoMemoryEx(
-+ IN gckKERNEL Kernel,
-+ IN gceCORE Core,
-+ IN gctBOOL InUserSpace,
-+ IN gctUINT32 Address,
-+#ifdef __QNXNTO__
-+ IN gctUINT32 Pid,
-+ IN gctUINT32 Bytes,
-+#endif
-+ OUT gctPOINTER * Logical
-+ );
-+
-+#ifdef __QNXNTO__
-+/* Unmap video memory. */
-+gceSTATUS
-+gckKERNEL_UnmapVideoMemory(
-+ IN gckKERNEL Kernel,
-+ IN gctPOINTER Logical,
-+ IN gctUINT32 Pid,
-+ IN gctUINT32 Bytes
-+ );
-+#endif
-+
-+/* Map memory. */
-+gceSTATUS
-+gckKERNEL_MapMemory(
-+ IN gckKERNEL Kernel,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPOINTER * Logical
-+ );
-+
-+/* Unmap memory. */
-+gceSTATUS
-+gckKERNEL_UnmapMemory(
-+ IN gckKERNEL Kernel,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ IN gctPOINTER Logical
-+ );
-+
-+/* Notification of events. */
-+gceSTATUS
-+gckKERNEL_Notify(
-+ IN gckKERNEL Kernel,
-+ IN gceNOTIFY Notifcation,
-+ IN gctBOOL Data
-+ );
-+
-+gceSTATUS
-+gckKERNEL_QuerySettings(
-+ IN gckKERNEL Kernel,
-+ OUT gcsKERNEL_SETTINGS * Settings
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckKERNEL_Recovery
-+**
-+** Try to recover the GPU from a fatal error.
-+**
-+** INPUT:
-+**
-+** gckKERNEL Kernel
-+** Pointer to an gckKERNEL object.
-+**
-+** OUTPUT:
-+**
-+** Nothing.
-+*/
-+gceSTATUS
-+gckKERNEL_Recovery(
-+ IN gckKERNEL Kernel
-+ );
-+
-+/* Set the value of timeout on HW operation. */
-+void
-+gckKERNEL_SetTimeOut(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 timeOut
-+ );
-+
-+/* Get access to the user data. */
-+gceSTATUS
-+gckKERNEL_OpenUserData(
-+ IN gckKERNEL Kernel,
-+ IN gctBOOL NeedCopy,
-+ IN gctPOINTER StaticStorage,
-+ IN gctPOINTER UserPointer,
-+ IN gctSIZE_T Size,
-+ OUT gctPOINTER * KernelPointer
-+ );
-+
-+/* Release resources associated with the user data connection. */
-+gceSTATUS
-+gckKERNEL_CloseUserData(
-+ IN gckKERNEL Kernel,
-+ IN gctBOOL NeedCopy,
-+ IN gctBOOL FlushData,
-+ IN gctPOINTER UserPointer,
-+ IN gctSIZE_T Size,
-+ OUT gctPOINTER * KernelPointer
-+ );
-+
-+gceSTATUS
-+gckDVFS_Construct(
-+ IN gckHARDWARE Hardware,
-+ OUT gckDVFS * Frequency
-+ );
-+
-+gceSTATUS
-+gckDVFS_Destroy(
-+ IN gckDVFS Dvfs
-+ );
-+
-+gceSTATUS
-+gckDVFS_Start(
-+ IN gckDVFS Dvfs
-+ );
-+
-+gceSTATUS
-+gckDVFS_Stop(
-+ IN gckDVFS Dvfs
-+ );
-+
-+/******************************************************************************\
-+******************************* gckHARDWARE Object *****************************
-+\******************************************************************************/
-+
-+/* Construct a new gckHARDWARE object. */
-+gceSTATUS
-+gckHARDWARE_Construct(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ OUT gckHARDWARE * Hardware
-+ );
-+
-+/* Destroy an gckHARDWARE object. */
-+gceSTATUS
-+gckHARDWARE_Destroy(
-+ IN gckHARDWARE Hardware
-+ );
-+
-+/* Get hardware type. */
-+gceSTATUS
-+gckHARDWARE_GetType(
-+ IN gckHARDWARE Hardware,
-+ OUT gceHARDWARE_TYPE * Type
-+ );
-+
-+/* Query system memory requirements. */
-+gceSTATUS
-+gckHARDWARE_QuerySystemMemory(
-+ IN gckHARDWARE Hardware,
-+ OUT gctSIZE_T * SystemSize,
-+ OUT gctUINT32 * SystemBaseAddress
-+ );
-+
-+/* Build virtual address. */
-+gceSTATUS
-+gckHARDWARE_BuildVirtualAddress(
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT32 Index,
-+ IN gctUINT32 Offset,
-+ OUT gctUINT32 * Address
-+ );
-+
-+/* Query command buffer requirements. */
-+gceSTATUS
-+gckHARDWARE_QueryCommandBuffer(
-+ IN gckHARDWARE Hardware,
-+ OUT gctSIZE_T * Alignment,
-+ OUT gctSIZE_T * ReservedHead,
-+ OUT gctSIZE_T * ReservedTail
-+ );
-+
-+/* Add a WAIT/LINK pair in the command queue. */
-+gceSTATUS
-+gckHARDWARE_WaitLink(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN gctUINT32 Offset,
-+ IN OUT gctSIZE_T * Bytes,
-+ OUT gctUINT32 * WaitOffset,
-+ OUT gctSIZE_T * WaitBytes
-+ );
-+
-+/* Kickstart the command processor. */
-+gceSTATUS
-+gckHARDWARE_Execute(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+#ifdef __QNXNTO__
-+ IN gctPOINTER Physical,
-+ IN gctBOOL PhysicalAddresses,
-+#endif
-+ IN gctSIZE_T Bytes
-+ );
-+
-+/* Add an END command in the command queue. */
-+gceSTATUS
-+gckHARDWARE_End(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN OUT gctSIZE_T * Bytes
-+ );
-+
-+/* Add a NOP command in the command queue. */
-+gceSTATUS
-+gckHARDWARE_Nop(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN OUT gctSIZE_T * Bytes
-+ );
-+
-+/* Add a WAIT command in the command queue. */
-+gceSTATUS
-+gckHARDWARE_Wait(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN gctUINT32 Count,
-+ IN OUT gctSIZE_T * Bytes
-+ );
-+
-+/* Add a PIPESELECT command in the command queue. */
-+gceSTATUS
-+gckHARDWARE_PipeSelect(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN gcePIPE_SELECT Pipe,
-+ IN OUT gctSIZE_T * Bytes
-+ );
-+
-+/* Add a LINK command in the command queue. */
-+gceSTATUS
-+gckHARDWARE_Link(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN gctPOINTER FetchAddress,
-+ IN gctSIZE_T FetchSize,
-+ IN OUT gctSIZE_T * Bytes
-+ );
-+
-+/* Add an EVENT command in the command queue. */
-+gceSTATUS
-+gckHARDWARE_Event(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN gctUINT8 Event,
-+ IN gceKERNEL_WHERE FromWhere,
-+ IN OUT gctSIZE_T * Bytes
-+ );
-+
-+/* Query the available memory. */
-+gceSTATUS
-+gckHARDWARE_QueryMemory(
-+ IN gckHARDWARE Hardware,
-+ OUT gctSIZE_T * InternalSize,
-+ OUT gctUINT32 * InternalBaseAddress,
-+ OUT gctUINT32 * InternalAlignment,
-+ OUT gctSIZE_T * ExternalSize,
-+ OUT gctUINT32 * ExternalBaseAddress,
-+ OUT gctUINT32 * ExternalAlignment,
-+ OUT gctUINT32 * HorizontalTileSize,
-+ OUT gctUINT32 * VerticalTileSize
-+ );
-+
-+/* Query the identity of the hardware. */
-+gceSTATUS
-+gckHARDWARE_QueryChipIdentity(
-+ IN gckHARDWARE Hardware,
-+ OUT gcsHAL_QUERY_CHIP_IDENTITY_PTR Identity
-+ );
-+
-+/* Query the shader support. */
-+gceSTATUS
-+gckHARDWARE_QueryShaderCaps(
-+ IN gckHARDWARE Hardware,
-+ OUT gctUINT * VertexUniforms,
-+ OUT gctUINT * FragmentUniforms,
-+ OUT gctUINT * Varyings
-+ );
-+
-+/* Split a harwdare specific address into API stuff. */
-+gceSTATUS
-+gckHARDWARE_SplitMemory(
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT32 Address,
-+ OUT gcePOOL * Pool,
-+ OUT gctUINT32 * Offset
-+ );
-+
-+/* Update command queue tail pointer. */
-+gceSTATUS
-+gckHARDWARE_UpdateQueueTail(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN gctUINT32 Offset
-+ );
-+
-+/* Convert logical address to hardware specific address. */
-+gceSTATUS
-+gckHARDWARE_ConvertLogical(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ OUT gctUINT32 * Address
-+ );
-+
-+#ifdef __QNXNTO__
-+/* Convert physical address to hardware specific address. */
-+gceSTATUS
-+gckHARDWARE_ConvertPhysical(
-+ IN gckHARDWARE Hardware,
-+ IN gctPHYS_ADDR Physical,
-+ OUT gctUINT32 * Address
-+ );
-+#endif
-+
-+/* Interrupt manager. */
-+gceSTATUS
-+gckHARDWARE_Interrupt(
-+ IN gckHARDWARE Hardware,
-+ IN gctBOOL InterruptValid
-+ );
-+
-+/* Program MMU. */
-+gceSTATUS
-+gckHARDWARE_SetMMU(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical
-+ );
-+
-+/* Flush the MMU. */
-+gceSTATUS
-+gckHARDWARE_FlushMMU(
-+ IN gckHARDWARE Hardware
-+ );
-+
-+/* Set the page table base address. */
-+gceSTATUS
-+gckHARDWARE_SetMMUv2(
-+ IN gckHARDWARE Hardware,
-+ IN gctBOOL Enable,
-+ IN gctPOINTER MtlbAddress,
-+ IN gceMMU_MODE Mode,
-+ IN gctPOINTER SafeAddress,
-+ IN gctBOOL FromPower
-+ );
-+
-+/* Get idle register. */
-+gceSTATUS
-+gckHARDWARE_GetIdle(
-+ IN gckHARDWARE Hardware,
-+ IN gctBOOL Wait,
-+ OUT gctUINT32 * Data
-+ );
-+
-+/* Flush the caches. */
-+gceSTATUS
-+gckHARDWARE_Flush(
-+ IN gckHARDWARE Hardware,
-+ IN gceKERNEL_FLUSH Flush,
-+ IN gctPOINTER Logical,
-+ IN OUT gctSIZE_T * Bytes
-+ );
-+
-+/* Enable/disable fast clear. */
-+gceSTATUS
-+gckHARDWARE_SetFastClear(
-+ IN gckHARDWARE Hardware,
-+ IN gctINT Enable,
-+ IN gctINT Compression
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_ReadInterrupt(
-+ IN gckHARDWARE Hardware,
-+ OUT gctUINT32_PTR IDs
-+ );
-+
-+/* Power management. */
-+gceSTATUS
-+gckHARDWARE_SetPowerManagementState(
-+ IN gckHARDWARE Hardware,
-+ IN gceCHIPPOWERSTATE State
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_QueryPowerManagementState(
-+ IN gckHARDWARE Hardware,
-+ OUT gceCHIPPOWERSTATE* State
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_SetPowerManagement(
-+ IN gckHARDWARE Hardware,
-+ IN gctBOOL PowerManagement
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_SetGpuProfiler(
-+ IN gckHARDWARE Hardware,
-+ IN gctBOOL GpuProfiler
-+ );
-+
-+#if gcdENABLE_FSCALE_VAL_ADJUST
-+gceSTATUS
-+gckHARDWARE_SetFscaleValue(
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT32 FscaleValue
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_GetFscaleValue(
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT * FscaleValue,
-+ IN gctUINT * MinFscaleValue,
-+ IN gctUINT * MaxFscaleValue
-+ );
-+#endif
-+
-+#if gcdPOWEROFF_TIMEOUT
-+gceSTATUS
-+gckHARDWARE_SetPowerOffTimeout(
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT32 Timeout
-+);
-+
-+gceSTATUS
-+gckHARDWARE_QueryPowerOffTimeout(
-+ IN gckHARDWARE Hardware,
-+ OUT gctUINT32* Timeout
-+);
-+#endif
-+
-+/* Profile 2D Engine. */
-+gceSTATUS
-+gckHARDWARE_ProfileEngine2D(
-+ IN gckHARDWARE Hardware,
-+ OUT gcs2D_PROFILE_PTR Profile
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_InitializeHardware(
-+ IN gckHARDWARE Hardware
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_Reset(
-+ IN gckHARDWARE Hardware
-+ );
-+
-+typedef gceSTATUS (*gctISRMANAGERFUNC)(gctPOINTER Context, gceCORE Core);
-+
-+gceSTATUS
-+gckHARDWARE_SetIsrManager(
-+ IN gckHARDWARE Hardware,
-+ IN gctISRMANAGERFUNC StartIsr,
-+ IN gctISRMANAGERFUNC StopIsr,
-+ IN gctPOINTER Context
-+ );
-+
-+/* Start a composition. */
-+gceSTATUS
-+gckHARDWARE_Compose(
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT32 ProcessID,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctPOINTER Logical,
-+ IN gctSIZE_T Offset,
-+ IN gctSIZE_T Size,
-+ IN gctUINT8 EventID
-+ );
-+
-+/* Check for Hardware features. */
-+gceSTATUS
-+gckHARDWARE_IsFeatureAvailable(
-+ IN gckHARDWARE Hardware,
-+ IN gceFEATURE Feature
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_DumpMMUException(
-+ IN gckHARDWARE Hardware
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_DumpGPUState(
-+ IN gckHARDWARE Hardware
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_InitDVFS(
-+ IN gckHARDWARE Hardware
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_QueryLoad(
-+ IN gckHARDWARE Hardware,
-+ OUT gctUINT32 * Load
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_SetDVFSPeroid(
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT32 Frequency
-+ );
-+
-+#if !gcdENABLE_VG
-+/******************************************************************************\
-+***************************** gckINTERRUPT Object ******************************
-+\******************************************************************************/
-+
-+typedef struct _gckINTERRUPT * gckINTERRUPT;
-+
-+typedef gceSTATUS (* gctINTERRUPT_HANDLER)(
-+ IN gckKERNEL Kernel
-+ );
-+
-+gceSTATUS
-+gckINTERRUPT_Construct(
-+ IN gckKERNEL Kernel,
-+ OUT gckINTERRUPT * Interrupt
-+ );
-+
-+gceSTATUS
-+gckINTERRUPT_Destroy(
-+ IN gckINTERRUPT Interrupt
-+ );
-+
-+gceSTATUS
-+gckINTERRUPT_SetHandler(
-+ IN gckINTERRUPT Interrupt,
-+ IN OUT gctINT32_PTR Id,
-+ IN gctINTERRUPT_HANDLER Handler
-+ );
-+
-+gceSTATUS
-+gckINTERRUPT_Notify(
-+ IN gckINTERRUPT Interrupt,
-+ IN gctBOOL Valid
-+ );
-+#endif
-+/******************************************************************************\
-+******************************** gckEVENT Object *******************************
-+\******************************************************************************/
-+
-+typedef struct _gckEVENT * gckEVENT;
-+
-+/* Construct a new gckEVENT object. */
-+gceSTATUS
-+gckEVENT_Construct(
-+ IN gckKERNEL Kernel,
-+ OUT gckEVENT * Event
-+ );
-+
-+/* Destroy an gckEVENT object. */
-+gceSTATUS
-+gckEVENT_Destroy(
-+ IN gckEVENT Event
-+ );
-+
-+/* Add a new event to the list of events. */
-+gceSTATUS
-+gckEVENT_AddList(
-+ IN gckEVENT Event,
-+ IN gcsHAL_INTERFACE_PTR Interface,
-+ IN gceKERNEL_WHERE FromWhere,
-+ IN gctBOOL AllocateAllowed,
-+ IN gctBOOL FromKernel
-+ );
-+
-+/* Schedule a FreeNonPagedMemory event. */
-+gceSTATUS
-+gckEVENT_FreeNonPagedMemory(
-+ IN gckEVENT Event,
-+ IN gctSIZE_T Bytes,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctPOINTER Logical,
-+ IN gceKERNEL_WHERE FromWhere
-+ );
-+
-+/* Schedule a FreeContiguousMemory event. */
-+gceSTATUS
-+gckEVENT_FreeContiguousMemory(
-+ IN gckEVENT Event,
-+ IN gctSIZE_T Bytes,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctPOINTER Logical,
-+ IN gceKERNEL_WHERE FromWhere
-+ );
-+
-+/* Schedule a FreeVideoMemory event. */
-+gceSTATUS
-+gckEVENT_FreeVideoMemory(
-+ IN gckEVENT Event,
-+ IN gcuVIDMEM_NODE_PTR VideoMemory,
-+ IN gceKERNEL_WHERE FromWhere
-+ );
-+
-+/* Schedule a signal event. */
-+gceSTATUS
-+gckEVENT_Signal(
-+ IN gckEVENT Event,
-+ IN gctSIGNAL Signal,
-+ IN gceKERNEL_WHERE FromWhere
-+ );
-+
-+/* Schedule an Unlock event. */
-+gceSTATUS
-+gckEVENT_Unlock(
-+ IN gckEVENT Event,
-+ IN gceKERNEL_WHERE FromWhere,
-+ IN gcuVIDMEM_NODE_PTR Node,
-+ IN gceSURF_TYPE Type
-+ );
-+
-+gceSTATUS
-+gckEVENT_CommitDone(
-+ IN gckEVENT Event,
-+ IN gceKERNEL_WHERE FromWhere
-+ );
-+
-+#if gcdVIRTUAL_COMMAND_BUFFER
-+/* Schedule a FreeVirtualCommandBuffer event. */
-+gceSTATUS
-+gckEVENT_DestroyVirtualCommandBuffer(
-+ IN gckEVENT Event,
-+ IN gctSIZE_T Bytes,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctPOINTER Logical,
-+ IN gceKERNEL_WHERE FromWhere
-+ );
-+#endif
-+
-+gceSTATUS
-+gckEVENT_Submit(
-+ IN gckEVENT Event,
-+ IN gctBOOL Wait,
-+ IN gctBOOL FromPower
-+ );
-+
-+/* Commit an event queue. */
-+gceSTATUS
-+gckEVENT_Commit(
-+ IN gckEVENT Event,
-+ IN gcsQUEUE_PTR Queue
-+ );
-+
-+/* Schedule a composition event. */
-+gceSTATUS
-+gckEVENT_Compose(
-+ IN gckEVENT Event,
-+ IN gcsHAL_COMPOSE_PTR Info
-+ );
-+
-+/* Event callback routine. */
-+gceSTATUS
-+gckEVENT_Notify(
-+ IN gckEVENT Event,
-+ IN gctUINT32 IDs
-+ );
-+
-+/* Event callback routine. */
-+gceSTATUS
-+gckEVENT_Interrupt(
-+ IN gckEVENT Event,
-+ IN gctUINT32 IDs
-+ );
-+
-+gceSTATUS
-+gckEVENT_Dump(
-+ IN gckEVENT Event
-+ );
-+/******************************************************************************\
-+******************************* gckCOMMAND Object ******************************
-+\******************************************************************************/
-+
-+typedef struct _gckCOMMAND * gckCOMMAND;
-+
-+/* Construct a new gckCOMMAND object. */
-+gceSTATUS
-+gckCOMMAND_Construct(
-+ IN gckKERNEL Kernel,
-+ OUT gckCOMMAND * Command
-+ );
-+
-+/* Destroy an gckCOMMAND object. */
-+gceSTATUS
-+gckCOMMAND_Destroy(
-+ IN gckCOMMAND Command
-+ );
-+
-+/* Acquire command queue synchronization objects. */
-+gceSTATUS
-+gckCOMMAND_EnterCommit(
-+ IN gckCOMMAND Command,
-+ IN gctBOOL FromPower
-+ );
-+
-+/* Release command queue synchronization objects. */
-+gceSTATUS
-+gckCOMMAND_ExitCommit(
-+ IN gckCOMMAND Command,
-+ IN gctBOOL FromPower
-+ );
-+
-+/* Start the command queue. */
-+gceSTATUS
-+gckCOMMAND_Start(
-+ IN gckCOMMAND Command
-+ );
-+
-+/* Stop the command queue. */
-+gceSTATUS
-+gckCOMMAND_Stop(
-+ IN gckCOMMAND Command,
-+ IN gctBOOL FromRecovery
-+ );
-+
-+/* Commit a buffer to the command queue. */
-+gceSTATUS
-+gckCOMMAND_Commit(
-+ IN gckCOMMAND Command,
-+ IN gckCONTEXT Context,
-+ IN gcoCMDBUF CommandBuffer,
-+ IN gcsSTATE_DELTA_PTR StateDelta,
-+ IN gcsQUEUE_PTR EventQueue,
-+ IN gctUINT32 ProcessID
-+ );
-+
-+/* Reserve space in the command buffer. */
-+gceSTATUS
-+gckCOMMAND_Reserve(
-+ IN gckCOMMAND Command,
-+ IN gctSIZE_T RequestedBytes,
-+ OUT gctPOINTER * Buffer,
-+ OUT gctSIZE_T * BufferSize
-+ );
-+
-+/* Execute reserved space in the command buffer. */
-+gceSTATUS
-+gckCOMMAND_Execute(
-+ IN gckCOMMAND Command,
-+ IN gctSIZE_T RequstedBytes
-+ );
-+
-+/* Stall the command queue. */
-+gceSTATUS
-+gckCOMMAND_Stall(
-+ IN gckCOMMAND Command,
-+ IN gctBOOL FromPower
-+ );
-+
-+/* Attach user process. */
-+gceSTATUS
-+gckCOMMAND_Attach(
-+ IN gckCOMMAND Command,
-+ OUT gckCONTEXT * Context,
-+ OUT gctSIZE_T * StateCount,
-+ IN gctUINT32 ProcessID
-+ );
-+
-+/* Detach user process. */
-+gceSTATUS
-+gckCOMMAND_Detach(
-+ IN gckCOMMAND Command,
-+ IN gckCONTEXT Context
-+ );
-+
-+#if gcdVIRTUAL_COMMAND_BUFFER
-+gceSTATUS
-+gckCOMMAND_DumpExecutingBuffer(
-+ IN gckCOMMAND Command
-+ );
-+#endif
-+
-+/******************************************************************************\
-+********************************* gckMMU Object ********************************
-+\******************************************************************************/
-+
-+typedef struct _gckMMU * gckMMU;
-+
-+/* Construct a new gckMMU object. */
-+gceSTATUS
-+gckMMU_Construct(
-+ IN gckKERNEL Kernel,
-+ IN gctSIZE_T MmuSize,
-+ OUT gckMMU * Mmu
-+ );
-+
-+/* Destroy an gckMMU object. */
-+gceSTATUS
-+gckMMU_Destroy(
-+ IN gckMMU Mmu
-+ );
-+
-+/* Enable the MMU. */
-+gceSTATUS
-+gckMMU_Enable(
-+ IN gckMMU Mmu,
-+ IN gctUINT32 PhysBaseAddr,
-+ IN gctUINT32 PhysSize
-+ );
-+
-+/* Allocate pages inside the MMU. */
-+gceSTATUS
-+gckMMU_AllocatePages(
-+ IN gckMMU Mmu,
-+ IN gctSIZE_T PageCount,
-+ OUT gctPOINTER * PageTable,
-+ OUT gctUINT32 * Address
-+ );
-+
-+gceSTATUS
-+gckMMU_AllocatePagesEx(
-+ IN gckMMU Mmu,
-+ IN gctSIZE_T PageCount,
-+ IN gceSURF_TYPE Type,
-+ OUT gctPOINTER * PageTable,
-+ OUT gctUINT32 * Address
-+ );
-+
-+/* Remove a page table from the MMU. */
-+gceSTATUS
-+gckMMU_FreePages(
-+ IN gckMMU Mmu,
-+ IN gctPOINTER PageTable,
-+ IN gctSIZE_T PageCount
-+ );
-+
-+/* Set the MMU page with info. */
-+gceSTATUS
-+gckMMU_SetPage(
-+ IN gckMMU Mmu,
-+ IN gctUINT32 PageAddress,
-+ IN gctUINT32 *PageEntry
-+ );
-+
-+#ifdef __QNXNTO__
-+gceSTATUS
-+gckMMU_InsertNode(
-+ IN gckMMU Mmu,
-+ IN gcuVIDMEM_NODE_PTR Node);
-+
-+gceSTATUS
-+gckMMU_RemoveNode(
-+ IN gckMMU Mmu,
-+ IN gcuVIDMEM_NODE_PTR Node);
-+#endif
-+
-+#ifdef __QNXNTO__
-+gceSTATUS
-+gckMMU_FreeHandleMemory(
-+ IN gckKERNEL Kernel,
-+ IN gckMMU Mmu,
-+ IN gctUINT32 Pid
-+ );
-+#endif
-+
-+gceSTATUS
-+gckMMU_Flush(
-+ IN gckMMU Mmu
-+ );
-+
-+gceSTATUS
-+gckMMU_DumpPageTableEntry(
-+ IN gckMMU Mmu,
-+ IN gctUINT32 Address
-+ );
-+
-+
-+#if VIVANTE_PROFILER
-+gceSTATUS
-+gckHARDWARE_QueryProfileRegisters(
-+ IN gckHARDWARE Hardware,
-+ IN gctBOOL Clear,
-+ OUT gcsPROFILER_COUNTERS * Counters
-+ );
-+#endif
-+
-+#if VIVANTE_PROFILER_CONTEXT
-+gceSTATUS
-+gckHARDWARE_QueryContextProfile(
-+ IN gckHARDWARE Hardware,
-+ IN gctBOOL Clear,
-+ IN gckCONTEXT Context,
-+ OUT gcsPROFILER_COUNTERS * Counters
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_UpdateContextProfile(
-+ IN gckHARDWARE Hardware,
-+ IN gckCONTEXT Context
-+ );
-+#endif
-+
-+gceSTATUS
-+gckOS_SignalQueryHardware(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal,
-+ OUT gckHARDWARE * Hardware
-+ );
-+
-+gceSTATUS
-+gckOS_SignalSetHardware(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal,
-+ gckHARDWARE Hardware
-+ );
-+
-+#ifdef __cplusplus
-+}
-+#endif
-+
-+#if gcdENABLE_VG
-+#include "gc_hal_vg.h"
-+#endif
-+
-+#endif /* __gc_hal_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_base.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_base.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_base.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_base.h 2015-10-12 10:56:18.059351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_base.h 2015-10-15 15:51:25.284653199 +0200
@@ -0,0 +1,3896 @@
+/****************************************************************************
+*
@@ -147174,7 +144208,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_base.h
+#endif /* __gc_hal_base_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_compiler.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_compiler.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_compiler.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_compiler.h 2015-10-12 10:56:18.061351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_compiler.h 2015-10-15 15:51:25.292652674 +0200
@@ -0,0 +1,4298 @@
+/****************************************************************************
+*
@@ -151476,7 +148510,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_compil
+#endif /* __gc_hal_compiler_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_driver.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_driver.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_driver.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_driver.h 2015-10-12 10:56:18.061351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_driver.h 2015-10-15 15:51:25.292652674 +0200
@@ -0,0 +1,1051 @@
+/****************************************************************************
+*
@@ -152531,7 +149565,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_driver
+#endif /* __gc_hal_driver_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_driver_vg.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_driver_vg.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_driver_vg.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_driver_vg.h 2015-10-12 10:56:18.061351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_driver_vg.h 2015-10-15 15:51:25.296652409 +0200
@@ -0,0 +1,270 @@
+/****************************************************************************
+*
@@ -152805,7 +149839,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_driver
+#endif /* __gc_hal_driver_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_dump.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_dump.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_dump.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_dump.h 2015-10-12 10:56:18.061351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_dump.h 2015-10-15 15:51:25.296652409 +0200
@@ -0,0 +1,88 @@
+/****************************************************************************
+*
@@ -152897,7 +149931,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_dump.h
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_eglplatform.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_eglplatform.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_eglplatform.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_eglplatform.h 2015-10-12 10:56:18.062351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_eglplatform.h 2015-10-15 15:51:25.296652409 +0200
@@ -0,0 +1,627 @@
+/****************************************************************************
+*
@@ -153528,7 +150562,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_eglpla
+#endif /* __gc_hal_eglplatform_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_eglplatform_type.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_eglplatform_type.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_eglplatform_type.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_eglplatform_type.h 2015-10-12 10:56:18.062351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_eglplatform_type.h 2015-10-15 15:51:25.296652409 +0200
@@ -0,0 +1,286 @@
+/****************************************************************************
+*
@@ -153818,7 +150852,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_eglpla
+#endif /* __gc_hal_eglplatform_type_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_engine.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_engine.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_engine.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_engine.h 2015-10-12 10:56:18.062351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_engine.h 2015-10-15 15:51:25.296652409 +0200
@@ -0,0 +1,2053 @@
+/****************************************************************************
+*
@@ -155875,7 +152909,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_engine
+#endif /* __gc_hal_engine_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_engine_vg.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_engine_vg.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_engine_vg.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_engine_vg.h 2015-10-12 10:56:18.063351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_engine_vg.h 2015-10-15 15:51:25.296652409 +0200
@@ -0,0 +1,904 @@
+/****************************************************************************
+*
@@ -156783,7 +153817,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_engine
+#endif /* __gc_hal_vg_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_enum.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_enum.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_enum.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_enum.h 2015-10-12 10:56:18.063351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_enum.h 2015-10-15 15:51:25.296652409 +0200
@@ -0,0 +1,965 @@
+/****************************************************************************
+*
@@ -157750,9 +154784,2674 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_enum.h
+#endif
+
+#endif /* __gc_hal_enum_h_ */
+diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal.h
+--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal.h 2015-10-15 15:51:25.296652409 +0200
+@@ -0,0 +1,2661 @@
++/****************************************************************************
++*
++* Copyright (C) 2005 - 2013 by Vivante Corp.
++*
++* This program is free software; you can redistribute it and/or modify
++* it under the terms of the GNU General Public License as published by
++* the Free Software Foundation; either version 2 of the license, or
++* (at your option) any later version.
++*
++* This program is distributed in the hope that it will be useful,
++* but WITHOUT ANY WARRANTY; without even the implied warranty of
++* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++* GNU General Public License for more details.
++*
++* You should have received a copy of the GNU General Public License
++* along with this program; if not write to the Free Software
++* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*
++*****************************************************************************/
++
++
++#ifndef __gc_hal_h_
++#define __gc_hal_h_
++
++#include "gc_hal_rename.h"
++#include "gc_hal_types.h"
++#include "gc_hal_enum.h"
++#include "gc_hal_base.h"
++#include "gc_hal_profiler.h"
++#include "gc_hal_driver.h"
++#ifndef VIVANTE_NO_3D
++#include "gc_hal_statistics.h"
++#endif
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++/******************************************************************************\
++******************************* Alignment Macros *******************************
++\******************************************************************************/
++
++#define gcmALIGN(n, align) \
++( \
++ ((n) + ((align) - 1)) & ~((align) - 1) \
++)
++
++#define gcmALIGN_BASE(n, align) \
++( \
++ ((n) & ~((align) - 1)) \
++)
++
++/******************************************************************************\
++***************************** Element Count Macro *****************************
++\******************************************************************************/
++
++#define gcmSIZEOF(a) \
++( \
++ (gctSIZE_T) (sizeof(a)) \
++)
++
++#define gcmCOUNTOF(a) \
++( \
++ sizeof(a) / sizeof(a[0]) \
++)
++
++/******************************************************************************\
++********************************* Cast Macro **********************************
++\******************************************************************************/
++#define gcmNAME_TO_PTR(na) \
++ gckKERNEL_QueryPointerFromName(kernel, gcmALL_TO_UINT32(na))
++
++#define gcmPTR_TO_NAME(ptr) \
++ gckKERNEL_AllocateNameFromPointer(kernel, ptr)
++
++#define gcmRELEASE_NAME(na) \
++ gckKERNEL_DeleteName(kernel, gcmALL_TO_UINT32(na))
++
++#ifdef __LP64__
++
++#define gcmALL_TO_UINT32(t) \
++( \
++ (gctUINT32) (gctUINTPTR_T) (t)\
++)
++
++#define gcmPTR_TO_UINT64(p) \
++( \
++ (gctUINT64) (p)\
++)
++
++#define gcmUINT64_TO_PTR(u) \
++( \
++ (gctPOINTER) (u)\
++)
++
++#else /* 32 bit */
++
++#define gcmALL_TO_UINT32(t) \
++( \
++ (gctUINT32) (t)\
++)
++
++#define gcmPTR_TO_UINT64(p) \
++( \
++ (gctUINT64) (gctUINTPTR_T) (p)\
++)
++
++#define gcmUINT64_TO_PTR(u) \
++( \
++ (gctPOINTER) (gctUINTPTR_T) (u)\
++)
++
++#endif
++
++#define gcmUINT64_TO_TYPE(u, t) \
++( \
++ (t) (gctUINTPTR_T) (u)\
++)
++
++/******************************************************************************\
++******************************** Useful Macro *********************************
++\******************************************************************************/
++
++#define gcvINVALID_ADDRESS ~0U
++
++#define gcmGET_PRE_ROTATION(rotate) \
++ ((rotate) & (~(gcvSURF_POST_FLIP_X | gcvSURF_POST_FLIP_Y)))
++
++#define gcmGET_POST_ROTATION(rotate) \
++ ((rotate) & (gcvSURF_POST_FLIP_X | gcvSURF_POST_FLIP_Y))
++
++/******************************************************************************\
++******************************** gcsOBJECT Object *******************************
++\******************************************************************************/
++
++/* Type of objects. */
++typedef enum _gceOBJECT_TYPE
++{
++ gcvOBJ_UNKNOWN = 0,
++ gcvOBJ_2D = gcmCC('2','D',' ',' '),
++ gcvOBJ_3D = gcmCC('3','D',' ',' '),
++ gcvOBJ_ATTRIBUTE = gcmCC('A','T','T','R'),
++ gcvOBJ_BRUSHCACHE = gcmCC('B','R','U','$'),
++ gcvOBJ_BRUSHNODE = gcmCC('B','R','U','n'),
++ gcvOBJ_BRUSH = gcmCC('B','R','U','o'),
++ gcvOBJ_BUFFER = gcmCC('B','U','F','R'),
++ gcvOBJ_COMMAND = gcmCC('C','M','D',' '),
++ gcvOBJ_COMMANDBUFFER = gcmCC('C','M','D','B'),
++ gcvOBJ_CONTEXT = gcmCC('C','T','X','T'),
++ gcvOBJ_DEVICE = gcmCC('D','E','V',' '),
++ gcvOBJ_DUMP = gcmCC('D','U','M','P'),
++ gcvOBJ_EVENT = gcmCC('E','V','N','T'),
++ gcvOBJ_FUNCTION = gcmCC('F','U','N','C'),
++ gcvOBJ_HAL = gcmCC('H','A','L',' '),
++ gcvOBJ_HARDWARE = gcmCC('H','A','R','D'),
++ gcvOBJ_HEAP = gcmCC('H','E','A','P'),
++ gcvOBJ_INDEX = gcmCC('I','N','D','X'),
++ gcvOBJ_INTERRUPT = gcmCC('I','N','T','R'),
++ gcvOBJ_KERNEL = gcmCC('K','E','R','N'),
++ gcvOBJ_KERNEL_FUNCTION = gcmCC('K','F','C','N'),
++ gcvOBJ_MEMORYBUFFER = gcmCC('M','E','M','B'),
++ gcvOBJ_MMU = gcmCC('M','M','U',' '),
++ gcvOBJ_OS = gcmCC('O','S',' ',' '),
++ gcvOBJ_OUTPUT = gcmCC('O','U','T','P'),
++ gcvOBJ_PAINT = gcmCC('P','N','T',' '),
++ gcvOBJ_PATH = gcmCC('P','A','T','H'),
++ gcvOBJ_QUEUE = gcmCC('Q','U','E',' '),
++ gcvOBJ_SAMPLER = gcmCC('S','A','M','P'),
++ gcvOBJ_SHADER = gcmCC('S','H','D','R'),
++ gcvOBJ_STREAM = gcmCC('S','T','R','M'),
++ gcvOBJ_SURF = gcmCC('S','U','R','F'),
++ gcvOBJ_TEXTURE = gcmCC('T','X','T','R'),
++ gcvOBJ_UNIFORM = gcmCC('U','N','I','F'),
++ gcvOBJ_VARIABLE = gcmCC('V','A','R','I'),
++ gcvOBJ_VERTEX = gcmCC('V','R','T','X'),
++ gcvOBJ_VIDMEM = gcmCC('V','M','E','M'),
++ gcvOBJ_VG = gcmCC('V','G',' ',' '),
++}
++gceOBJECT_TYPE;
++
++/* gcsOBJECT object defintinon. */
++typedef struct _gcsOBJECT
++{
++ /* Type of an object. */
++ gceOBJECT_TYPE type;
++}
++gcsOBJECT;
++
++typedef struct _gckHARDWARE * gckHARDWARE;
++
++/* CORE flags. */
++typedef enum _gceCORE
++{
++ gcvCORE_MAJOR = 0x0,
++ gcvCORE_2D = 0x1,
++ gcvCORE_VG = 0x2
++}
++gceCORE;
++
++#define gcdMAX_GPU_COUNT 3
++
++/*******************************************************************************
++**
++** gcmVERIFY_OBJECT
++**
++** Assert if an object is invalid or is not of the specified type. If the
++** object is invalid or not of the specified type, gcvSTATUS_INVALID_OBJECT
++** will be returned from the current function. In retail mode this macro
++** does nothing.
++**
++** ARGUMENTS:
++**
++** obj Object to test.
++** t Expected type of the object.
++*/
++#if gcmIS_DEBUG(gcdDEBUG_TRACE)
++#define _gcmVERIFY_OBJECT(prefix, obj, t) \
++ if ((obj) == gcvNULL) \
++ { \
++ prefix##TRACE(gcvLEVEL_ERROR, \
++ #prefix "VERIFY_OBJECT failed: NULL"); \
++ prefix##TRACE(gcvLEVEL_ERROR, " expected: %c%c%c%c", \
++ gcmCC_PRINT(t)); \
++ prefix##ASSERT((obj) != gcvNULL); \
++ prefix##FOOTER_ARG("status=%d", gcvSTATUS_INVALID_OBJECT); \
++ return gcvSTATUS_INVALID_OBJECT; \
++ } \
++ else if (((gcsOBJECT*) (obj))->type != t) \
++ { \
++ prefix##TRACE(gcvLEVEL_ERROR, \
++ #prefix "VERIFY_OBJECT failed: %c%c%c%c", \
++ gcmCC_PRINT(((gcsOBJECT*) (obj))->type)); \
++ prefix##TRACE(gcvLEVEL_ERROR, " expected: %c%c%c%c", \
++ gcmCC_PRINT(t)); \
++ prefix##ASSERT(((gcsOBJECT*)(obj))->type == t); \
++ prefix##FOOTER_ARG("status=%d", gcvSTATUS_INVALID_OBJECT); \
++ return gcvSTATUS_INVALID_OBJECT; \
++ }
++
++# define gcmVERIFY_OBJECT(obj, t) _gcmVERIFY_OBJECT(gcm, obj, t)
++# define gcmkVERIFY_OBJECT(obj, t) _gcmVERIFY_OBJECT(gcmk, obj, t)
++#else
++# define gcmVERIFY_OBJECT(obj, t) do {} while (gcvFALSE)
++# define gcmkVERIFY_OBJECT(obj, t) do {} while (gcvFALSE)
++#endif
++
++/******************************************************************************/
++/*VERIFY_OBJECT if special return expected*/
++/******************************************************************************/
++#ifndef EGL_API_ANDROID
++# define _gcmVERIFY_OBJECT_RETURN(prefix, obj, t, retVal) \
++ do \
++ { \
++ if ((obj) == gcvNULL) \
++ { \
++ prefix##PRINT_VERSION(); \
++ prefix##TRACE(gcvLEVEL_ERROR, \
++ #prefix "VERIFY_OBJECT_RETURN failed: NULL"); \
++ prefix##TRACE(gcvLEVEL_ERROR, " expected: %c%c%c%c", \
++ gcmCC_PRINT(t)); \
++ prefix##ASSERT((obj) != gcvNULL); \
++ prefix##FOOTER_ARG("retVal=%d", retVal); \
++ return retVal; \
++ } \
++ else if (((gcsOBJECT*) (obj))->type != t) \
++ { \
++ prefix##PRINT_VERSION(); \
++ prefix##TRACE(gcvLEVEL_ERROR, \
++ #prefix "VERIFY_OBJECT_RETURN failed: %c%c%c%c", \
++ gcmCC_PRINT(((gcsOBJECT*) (obj))->type)); \
++ prefix##TRACE(gcvLEVEL_ERROR, " expected: %c%c%c%c", \
++ gcmCC_PRINT(t)); \
++ prefix##ASSERT(((gcsOBJECT*)(obj))->type == t); \
++ prefix##FOOTER_ARG("retVal=%d", retVal); \
++ return retVal; \
++ } \
++ } \
++ while (gcvFALSE)
++# define gcmVERIFY_OBJECT_RETURN(obj, t, retVal) \
++ _gcmVERIFY_OBJECT_RETURN(gcm, obj, t, retVal)
++# define gcmkVERIFY_OBJECT_RETURN(obj, t, retVal) \
++ _gcmVERIFY_OBJECT_RETURN(gcmk, obj, t, retVal)
++#else
++# define gcmVERIFY_OBJECT_RETURN(obj, t) do {} while (gcvFALSE)
++# define gcmVERIFY_OBJECT_RETURN(obj, t) do {} while (gcvFALSE)
++#endif
++
++/******************************************************************************\
++********************************** gckOS Object *********************************
++\******************************************************************************/
++
++/* Construct a new gckOS object. */
++gceSTATUS
++gckOS_Construct(
++ IN gctPOINTER Context,
++ OUT gckOS * Os
++ );
++
++/* Destroy an gckOS object. */
++gceSTATUS
++gckOS_Destroy(
++ IN gckOS Os
++ );
++
++/* Query the video memory. */
++gceSTATUS
++gckOS_QueryVideoMemory(
++ IN gckOS Os,
++ OUT gctPHYS_ADDR * InternalAddress,
++ OUT gctSIZE_T * InternalSize,
++ OUT gctPHYS_ADDR * ExternalAddress,
++ OUT gctSIZE_T * ExternalSize,
++ OUT gctPHYS_ADDR * ContiguousAddress,
++ OUT gctSIZE_T * ContiguousSize
++ );
++
++/* Allocate memory from the heap. */
++gceSTATUS
++gckOS_Allocate(
++ IN gckOS Os,
++ IN gctSIZE_T Bytes,
++ OUT gctPOINTER * Memory
++ );
++
++/* Free allocated memory. */
++gceSTATUS
++gckOS_Free(
++ IN gckOS Os,
++ IN gctPOINTER Memory
++ );
++
++/* Wrapper for allocation memory.. */
++gceSTATUS
++gckOS_AllocateMemory(
++ IN gckOS Os,
++ IN gctSIZE_T Bytes,
++ OUT gctPOINTER * Memory
++ );
++
++/* Wrapper for freeing memory. */
++gceSTATUS
++gckOS_FreeMemory(
++ IN gckOS Os,
++ IN gctPOINTER Memory
++ );
++
++/* Allocate paged memory. */
++gceSTATUS
++gckOS_AllocatePagedMemory(
++ IN gckOS Os,
++ IN gctSIZE_T Bytes,
++ OUT gctPHYS_ADDR * Physical
++ );
++
++/* Allocate paged memory. */
++gceSTATUS
++gckOS_AllocatePagedMemoryEx(
++ IN gckOS Os,
++ IN gctBOOL Contiguous,
++ IN gctSIZE_T Bytes,
++ OUT gctPHYS_ADDR * Physical
++ );
++
++/* Lock pages. */
++gceSTATUS
++gckOS_LockPages(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ IN gctBOOL Cacheable,
++ OUT gctPOINTER * Logical,
++ OUT gctSIZE_T * PageCount
++ );
++
++/* Map pages. */
++gceSTATUS
++gckOS_MapPages(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++#ifdef __QNXNTO__
++ IN gctPOINTER Logical,
++#endif
++ IN gctSIZE_T PageCount,
++ IN gctPOINTER PageTable
++ );
++
++/* Map pages. */
++gceSTATUS
++gckOS_MapPagesEx(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctPHYS_ADDR Physical,
++#ifdef __QNXNTO__
++ IN gctPOINTER Logical,
++#endif
++ IN gctSIZE_T PageCount,
++ IN gctPOINTER PageTable
++ );
++
++/* Unlock pages. */
++gceSTATUS
++gckOS_UnlockPages(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ IN gctPOINTER Logical
++ );
++
++/* Free paged memory. */
++gceSTATUS
++gckOS_FreePagedMemory(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes
++ );
++
++/* Allocate non-paged memory. */
++gceSTATUS
++gckOS_AllocateNonPagedMemory(
++ IN gckOS Os,
++ IN gctBOOL InUserSpace,
++ IN OUT gctSIZE_T * Bytes,
++ OUT gctPHYS_ADDR * Physical,
++ OUT gctPOINTER * Logical
++ );
++
++/* Free non-paged memory. */
++gceSTATUS
++gckOS_FreeNonPagedMemory(
++ IN gckOS Os,
++ IN gctSIZE_T Bytes,
++ IN gctPHYS_ADDR Physical,
++ IN gctPOINTER Logical
++ );
++
++/* Allocate contiguous memory. */
++gceSTATUS
++gckOS_AllocateContiguous(
++ IN gckOS Os,
++ IN gctBOOL InUserSpace,
++ IN OUT gctSIZE_T * Bytes,
++ OUT gctPHYS_ADDR * Physical,
++ OUT gctPOINTER * Logical
++ );
++
++/* Free contiguous memory. */
++gceSTATUS
++gckOS_FreeContiguous(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctPOINTER Logical,
++ IN gctSIZE_T Bytes
++ );
++
++/* Get the number fo bytes per page. */
++gceSTATUS
++gckOS_GetPageSize(
++ IN gckOS Os,
++ OUT gctSIZE_T * PageSize
++ );
++
++/* Get the physical address of a corresponding logical address. */
++gceSTATUS
++gckOS_GetPhysicalAddress(
++ IN gckOS Os,
++ IN gctPOINTER Logical,
++ OUT gctUINT32 * Address
++ );
++
++/* Get the physical address of a corresponding logical address. */
++gceSTATUS
++gckOS_GetPhysicalAddressProcess(
++ IN gckOS Os,
++ IN gctPOINTER Logical,
++ IN gctUINT32 ProcessID,
++ OUT gctUINT32 * Address
++ );
++
++/* Map physical memory. */
++gceSTATUS
++gckOS_MapPhysical(
++ IN gckOS Os,
++ IN gctUINT32 Physical,
++ IN gctSIZE_T Bytes,
++ OUT gctPOINTER * Logical
++ );
++
++/* Unmap previously mapped physical memory. */
++gceSTATUS
++gckOS_UnmapPhysical(
++ IN gckOS Os,
++ IN gctPOINTER Logical,
++ IN gctSIZE_T Bytes
++ );
++
++/* Read data from a hardware register. */
++gceSTATUS
++gckOS_ReadRegister(
++ IN gckOS Os,
++ IN gctUINT32 Address,
++ OUT gctUINT32 * Data
++ );
++
++/* Read data from a hardware register. */
++gceSTATUS
++gckOS_ReadRegisterEx(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctUINT32 Address,
++ OUT gctUINT32 * Data
++ );
++
++/* Write data to a hardware register. */
++gceSTATUS
++gckOS_WriteRegister(
++ IN gckOS Os,
++ IN gctUINT32 Address,
++ IN gctUINT32 Data
++ );
++
++/* Write data to a hardware register. */
++gceSTATUS
++gckOS_WriteRegisterEx(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctUINT32 Address,
++ IN gctUINT32 Data
++ );
++
++/* Write data to a 32-bit memory location. */
++gceSTATUS
++gckOS_WriteMemory(
++ IN gckOS Os,
++ IN gctPOINTER Address,
++ IN gctUINT32 Data
++ );
++
++/* Map physical memory into the process space. */
++gceSTATUS
++gckOS_MapMemory(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ OUT gctPOINTER * Logical
++ );
++
++/* Unmap physical memory from the specified process space. */
++gceSTATUS
++gckOS_UnmapMemoryEx(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ IN gctPOINTER Logical,
++ IN gctUINT32 PID
++ );
++
++/* Unmap physical memory from the process space. */
++gceSTATUS
++gckOS_UnmapMemory(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ IN gctPOINTER Logical
++ );
++
++/* Unmap user logical memory out of physical memory.
++ * This function is only supported in Linux currently.
++ */
++gceSTATUS
++gckOS_UnmapUserLogical(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ IN gctPOINTER Logical
++ );
++
++/* Create a new mutex. */
++gceSTATUS
++gckOS_CreateMutex(
++ IN gckOS Os,
++ OUT gctPOINTER * Mutex
++ );
++
++/* Delete a mutex. */
++gceSTATUS
++gckOS_DeleteMutex(
++ IN gckOS Os,
++ IN gctPOINTER Mutex
++ );
++
++/* Acquire a mutex. */
++gceSTATUS
++gckOS_AcquireMutex(
++ IN gckOS Os,
++ IN gctPOINTER Mutex,
++ IN gctUINT32 Timeout
++ );
++
++/* Release a mutex. */
++gceSTATUS
++gckOS_ReleaseMutex(
++ IN gckOS Os,
++ IN gctPOINTER Mutex
++ );
++
++/* Atomically exchange a pair of 32-bit values. */
++gceSTATUS
++gckOS_AtomicExchange(
++ IN gckOS Os,
++ IN OUT gctUINT32_PTR Target,
++ IN gctUINT32 NewValue,
++ OUT gctUINT32_PTR OldValue
++ );
++
++/* Atomically exchange a pair of pointers. */
++gceSTATUS
++gckOS_AtomicExchangePtr(
++ IN gckOS Os,
++ IN OUT gctPOINTER * Target,
++ IN gctPOINTER NewValue,
++ OUT gctPOINTER * OldValue
++ );
++
++#if gcdSMP
++gceSTATUS
++gckOS_AtomSetMask(
++ IN gctPOINTER Atom,
++ IN gctUINT32 Mask
++ );
++
++gceSTATUS
++gckOS_AtomClearMask(
++ IN gctPOINTER Atom,
++ IN gctUINT32 Mask
++ );
++#endif
++
++gceSTATUS
++gckOS_DumpCallStack(
++ IN gckOS Os
++ );
++
++gceSTATUS
++gckOS_GetProcessNameByPid(
++ IN gctINT Pid,
++ IN gctSIZE_T Length,
++ OUT gctUINT8_PTR String
++ );
++
++
++
++/*******************************************************************************
++**
++** gckOS_AtomConstruct
++**
++** Create an atom.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to a gckOS object.
++**
++** OUTPUT:
++**
++** gctPOINTER * Atom
++** Pointer to a variable receiving the constructed atom.
++*/
++gceSTATUS
++gckOS_AtomConstruct(
++ IN gckOS Os,
++ OUT gctPOINTER * Atom
++ );
++
++/*******************************************************************************
++**
++** gckOS_AtomDestroy
++**
++** Destroy an atom.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to a gckOS object.
++**
++** gctPOINTER Atom
++** Pointer to the atom to destroy.
++**
++** OUTPUT:
++**
++** Nothing.
++*/
++gceSTATUS
++gckOS_AtomDestroy(
++ IN gckOS Os,
++ OUT gctPOINTER Atom
++ );
++
++/*******************************************************************************
++**
++** gckOS_AtomGet
++**
++** Get the 32-bit value protected by an atom.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to a gckOS object.
++**
++** gctPOINTER Atom
++** Pointer to the atom.
++**
++** OUTPUT:
++**
++** gctINT32_PTR Value
++** Pointer to a variable the receives the value of the atom.
++*/
++gceSTATUS
++gckOS_AtomGet(
++ IN gckOS Os,
++ IN gctPOINTER Atom,
++ OUT gctINT32_PTR Value
++ );
++
++/*******************************************************************************
++**
++** gckOS_AtomSet
++**
++** Set the 32-bit value protected by an atom.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to a gckOS object.
++**
++** gctPOINTER Atom
++** Pointer to the atom.
++**
++** gctINT32 Value
++** The value of the atom.
++**
++** OUTPUT:
++**
++** Nothing.
++*/
++gceSTATUS
++gckOS_AtomSet(
++ IN gckOS Os,
++ IN gctPOINTER Atom,
++ IN gctINT32 Value
++ );
++
++/*******************************************************************************
++**
++** gckOS_AtomIncrement
++**
++** Atomically increment the 32-bit integer value inside an atom.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to a gckOS object.
++**
++** gctPOINTER Atom
++** Pointer to the atom.
++**
++** OUTPUT:
++**
++** gctINT32_PTR Value
++** Pointer to a variable the receives the original value of the atom.
++*/
++gceSTATUS
++gckOS_AtomIncrement(
++ IN gckOS Os,
++ IN gctPOINTER Atom,
++ OUT gctINT32_PTR Value
++ );
++
++/*******************************************************************************
++**
++** gckOS_AtomDecrement
++**
++** Atomically decrement the 32-bit integer value inside an atom.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to a gckOS object.
++**
++** gctPOINTER Atom
++** Pointer to the atom.
++**
++** OUTPUT:
++**
++** gctINT32_PTR Value
++** Pointer to a variable the receives the original value of the atom.
++*/
++gceSTATUS
++gckOS_AtomDecrement(
++ IN gckOS Os,
++ IN gctPOINTER Atom,
++ OUT gctINT32_PTR Value
++ );
++
++/* Delay a number of microseconds. */
++gceSTATUS
++gckOS_Delay(
++ IN gckOS Os,
++ IN gctUINT32 Delay
++ );
++
++/* Get time in milliseconds. */
++gceSTATUS
++gckOS_GetTicks(
++ OUT gctUINT32_PTR Time
++ );
++
++/* Compare time value. */
++gceSTATUS
++gckOS_TicksAfter(
++ IN gctUINT32 Time1,
++ IN gctUINT32 Time2,
++ OUT gctBOOL_PTR IsAfter
++ );
++
++/* Get time in microseconds. */
++gceSTATUS
++gckOS_GetTime(
++ OUT gctUINT64_PTR Time
++ );
++
++/* Memory barrier. */
++gceSTATUS
++gckOS_MemoryBarrier(
++ IN gckOS Os,
++ IN gctPOINTER Address
++ );
++
++/* Map user pointer. */
++gceSTATUS
++gckOS_MapUserPointer(
++ IN gckOS Os,
++ IN gctPOINTER Pointer,
++ IN gctSIZE_T Size,
++ OUT gctPOINTER * KernelPointer
++ );
++
++/* Unmap user pointer. */
++gceSTATUS
++gckOS_UnmapUserPointer(
++ IN gckOS Os,
++ IN gctPOINTER Pointer,
++ IN gctSIZE_T Size,
++ IN gctPOINTER KernelPointer
++ );
++
++/*******************************************************************************
++**
++** gckOS_QueryNeedCopy
++**
++** Query whether the memory can be accessed or mapped directly or it has to be
++** copied.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to an gckOS object.
++**
++** gctUINT32 ProcessID
++** Process ID of the current process.
++**
++** OUTPUT:
++**
++** gctBOOL_PTR NeedCopy
++** Pointer to a boolean receiving gcvTRUE if the memory needs a copy or
++** gcvFALSE if the memory can be accessed or mapped dircetly.
++*/
++gceSTATUS
++gckOS_QueryNeedCopy(
++ IN gckOS Os,
++ IN gctUINT32 ProcessID,
++ OUT gctBOOL_PTR NeedCopy
++ );
++
++/*******************************************************************************
++**
++** gckOS_CopyFromUserData
++**
++** Copy data from user to kernel memory.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to an gckOS object.
++**
++** gctPOINTER KernelPointer
++** Pointer to kernel memory.
++**
++** gctPOINTER Pointer
++** Pointer to user memory.
++**
++** gctSIZE_T Size
++** Number of bytes to copy.
++**
++** OUTPUT:
++**
++** Nothing.
++*/
++gceSTATUS
++gckOS_CopyFromUserData(
++ IN gckOS Os,
++ IN gctPOINTER KernelPointer,
++ IN gctPOINTER Pointer,
++ IN gctSIZE_T Size
++ );
++
++/*******************************************************************************
++**
++** gckOS_CopyToUserData
++**
++** Copy data from kernel to user memory.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to an gckOS object.
++**
++** gctPOINTER KernelPointer
++** Pointer to kernel memory.
++**
++** gctPOINTER Pointer
++** Pointer to user memory.
++**
++** gctSIZE_T Size
++** Number of bytes to copy.
++**
++** OUTPUT:
++**
++** Nothing.
++*/
++gceSTATUS
++gckOS_CopyToUserData(
++ IN gckOS Os,
++ IN gctPOINTER KernelPointer,
++ IN gctPOINTER Pointer,
++ IN gctSIZE_T Size
++ );
++
++#ifdef __QNXNTO__
++/* Map user physical address. */
++gceSTATUS
++gckOS_MapUserPhysical(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Phys,
++ OUT gctPOINTER * KernelPointer
++ );
++#endif
++
++gceSTATUS
++gckOS_SuspendInterrupt(
++ IN gckOS Os
++ );
++
++gceSTATUS
++gckOS_SuspendInterruptEx(
++ IN gckOS Os,
++ IN gceCORE Core
++ );
++
++gceSTATUS
++gckOS_ResumeInterrupt(
++ IN gckOS Os
++ );
++
++gceSTATUS
++gckOS_ResumeInterruptEx(
++ IN gckOS Os,
++ IN gceCORE Core
++ );
++
++/* Get the base address for the physical memory. */
++gceSTATUS
++gckOS_GetBaseAddress(
++ IN gckOS Os,
++ OUT gctUINT32_PTR BaseAddress
++ );
++
++/* Perform a memory copy. */
++gceSTATUS
++gckOS_MemCopy(
++ IN gctPOINTER Destination,
++ IN gctCONST_POINTER Source,
++ IN gctSIZE_T Bytes
++ );
++
++/* Zero memory. */
++gceSTATUS
++gckOS_ZeroMemory(
++ IN gctPOINTER Memory,
++ IN gctSIZE_T Bytes
++ );
++
++/* Device I/O control to the kernel HAL layer. */
++gceSTATUS
++gckOS_DeviceControl(
++ IN gckOS Os,
++ IN gctBOOL FromUser,
++ IN gctUINT32 IoControlCode,
++ IN gctPOINTER InputBuffer,
++ IN gctSIZE_T InputBufferSize,
++ OUT gctPOINTER OutputBuffer,
++ IN gctSIZE_T OutputBufferSize
++ );
++
++/*******************************************************************************
++**
++** gckOS_GetProcessID
++**
++** Get current process ID.
++**
++** INPUT:
++**
++** Nothing.
++**
++** OUTPUT:
++**
++** gctUINT32_PTR ProcessID
++** Pointer to the variable that receives the process ID.
++*/
++gceSTATUS
++gckOS_GetProcessID(
++ OUT gctUINT32_PTR ProcessID
++ );
++
++gceSTATUS
++gckOS_GetCurrentProcessID(
++ OUT gctUINT32_PTR ProcessID
++ );
++
++/*******************************************************************************
++**
++** gckOS_GetThreadID
++**
++** Get current thread ID.
++**
++** INPUT:
++**
++** Nothing.
++**
++** OUTPUT:
++**
++** gctUINT32_PTR ThreadID
++** Pointer to the variable that receives the thread ID.
++*/
++gceSTATUS
++gckOS_GetThreadID(
++ OUT gctUINT32_PTR ThreadID
++ );
++
++/******************************************************************************\
++********************************** Signal Object *********************************
++\******************************************************************************/
++
++/* Create a signal. */
++gceSTATUS
++gckOS_CreateSignal(
++ IN gckOS Os,
++ IN gctBOOL ManualReset,
++ OUT gctSIGNAL * Signal
++ );
++
++/* Destroy a signal. */
++gceSTATUS
++gckOS_DestroySignal(
++ IN gckOS Os,
++ IN gctSIGNAL Signal
++ );
++
++/* Signal a signal. */
++gceSTATUS
++gckOS_Signal(
++ IN gckOS Os,
++ IN gctSIGNAL Signal,
++ IN gctBOOL State
++ );
++
++/* Wait for a signal. */
++gceSTATUS
++gckOS_WaitSignal(
++ IN gckOS Os,
++ IN gctSIGNAL Signal,
++ IN gctUINT32 Wait
++ );
++
++/* Map a user signal to the kernel space. */
++gceSTATUS
++gckOS_MapSignal(
++ IN gckOS Os,
++ IN gctSIGNAL Signal,
++ IN gctHANDLE Process,
++ OUT gctSIGNAL * MappedSignal
++ );
++
++/* Unmap a user signal */
++gceSTATUS
++gckOS_UnmapSignal(
++ IN gckOS Os,
++ IN gctSIGNAL Signal
++ );
++
++/* Map user memory. */
++gceSTATUS
++gckOS_MapUserMemory(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctPOINTER Memory,
++ IN gctUINT32 Physical,
++ IN gctSIZE_T Size,
++ OUT gctPOINTER * Info,
++ OUT gctUINT32_PTR Address
++ );
++
++/* Unmap user memory. */
++gceSTATUS
++gckOS_UnmapUserMemory(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctPOINTER Memory,
++ IN gctSIZE_T Size,
++ IN gctPOINTER Info,
++ IN gctUINT32 Address
++ );
++
++/******************************************************************************\
++************************** Android Native Fence Sync ***************************
++\******************************************************************************/
++gceSTATUS
++gckOS_CreateSyncTimeline(
++ IN gckOS Os,
++ OUT gctHANDLE * Timeline
++ );
++
++gceSTATUS
++gckOS_DestroySyncTimeline(
++ IN gckOS Os,
++ IN gctHANDLE Timeline
++ );
++
++gceSTATUS
++gckOS_CreateSyncPoint(
++ IN gckOS Os,
++ OUT gctSYNC_POINT * SyncPoint
++ );
++
++gceSTATUS
++gckOS_ReferenceSyncPoint(
++ IN gckOS Os,
++ IN gctSYNC_POINT SyncPoint
++ );
++
++gceSTATUS
++gckOS_DestroySyncPoint(
++ IN gckOS Os,
++ IN gctSYNC_POINT SyncPoint
++ );
++
++gceSTATUS
++gckOS_SignalSyncPoint(
++ IN gckOS Os,
++ IN gctSYNC_POINT SyncPoint
++ );
++
++gceSTATUS
++gckOS_QuerySyncPoint(
++ IN gckOS Os,
++ IN gctSYNC_POINT SyncPoint,
++ OUT gctBOOL_PTR State
++ );
++
++gceSTATUS
++gckOS_CreateNativeFence(
++ IN gckOS Os,
++ IN gctHANDLE Timeline,
++ IN gctSYNC_POINT SyncPoint,
++ OUT gctINT * FenceFD
++ );
++
++#if !USE_NEW_LINUX_SIGNAL
++/* Create signal to be used in the user space. */
++gceSTATUS
++gckOS_CreateUserSignal(
++ IN gckOS Os,
++ IN gctBOOL ManualReset,
++ OUT gctINT * SignalID
++ );
++
++/* Destroy signal used in the user space. */
++gceSTATUS
++gckOS_DestroyUserSignal(
++ IN gckOS Os,
++ IN gctINT SignalID
++ );
++
++/* Wait for signal used in the user space. */
++gceSTATUS
++gckOS_WaitUserSignal(
++ IN gckOS Os,
++ IN gctINT SignalID,
++ IN gctUINT32 Wait
++ );
++
++/* Signal a signal used in the user space. */
++gceSTATUS
++gckOS_SignalUserSignal(
++ IN gckOS Os,
++ IN gctINT SignalID,
++ IN gctBOOL State
++ );
++#endif /* USE_NEW_LINUX_SIGNAL */
++
++/* Set a signal owned by a process. */
++#if defined(__QNXNTO__)
++gceSTATUS
++gckOS_UserSignal(
++ IN gckOS Os,
++ IN gctSIGNAL Signal,
++ IN gctINT Recvid,
++ IN gctINT Coid
++ );
++#else
++gceSTATUS
++gckOS_UserSignal(
++ IN gckOS Os,
++ IN gctSIGNAL Signal,
++ IN gctHANDLE Process
++ );
++#endif
++
++/******************************************************************************\
++** Cache Support
++*/
++
++gceSTATUS
++gckOS_CacheClean(
++ gckOS Os,
++ gctUINT32 ProcessID,
++ gctPHYS_ADDR Handle,
++ gctPOINTER Physical,
++ gctPOINTER Logical,
++ gctSIZE_T Bytes
++ );
++
++gceSTATUS
++gckOS_CacheFlush(
++ gckOS Os,
++ gctUINT32 ProcessID,
++ gctPHYS_ADDR Handle,
++ gctPOINTER Physical,
++ gctPOINTER Logical,
++ gctSIZE_T Bytes
++ );
++
++gceSTATUS
++gckOS_CacheInvalidate(
++ gckOS Os,
++ gctUINT32 ProcessID,
++ gctPHYS_ADDR Handle,
++ gctPOINTER Physical,
++ gctPOINTER Logical,
++ gctSIZE_T Bytes
++ );
++
++/******************************************************************************\
++** Debug Support
++*/
++
++void
++gckOS_SetDebugLevel(
++ IN gctUINT32 Level
++ );
++
++void
++gckOS_SetDebugZone(
++ IN gctUINT32 Zone
++ );
++
++void
++gckOS_SetDebugLevelZone(
++ IN gctUINT32 Level,
++ IN gctUINT32 Zone
++ );
++
++void
++gckOS_SetDebugZones(
++ IN gctUINT32 Zones,
++ IN gctBOOL Enable
++ );
++
++void
++gckOS_SetDebugFile(
++ IN gctCONST_STRING FileName
++ );
++
++/*******************************************************************************
++** Broadcast interface.
++*/
++
++typedef enum _gceBROADCAST
++{
++ /* GPU might be idle. */
++ gcvBROADCAST_GPU_IDLE,
++
++ /* A commit is going to happen. */
++ gcvBROADCAST_GPU_COMMIT,
++
++ /* GPU seems to be stuck. */
++ gcvBROADCAST_GPU_STUCK,
++
++ /* First process gets attached. */
++ gcvBROADCAST_FIRST_PROCESS,
++
++ /* Last process gets detached. */
++ gcvBROADCAST_LAST_PROCESS,
++
++ /* AXI bus error. */
++ gcvBROADCAST_AXI_BUS_ERROR,
++}
++gceBROADCAST;
++
++gceSTATUS
++gckOS_Broadcast(
++ IN gckOS Os,
++ IN gckHARDWARE Hardware,
++ IN gceBROADCAST Reason
++ );
++
++gceSTATUS
++gckOS_BroadcastHurry(
++ IN gckOS Os,
++ IN gckHARDWARE Hardware,
++ IN gctUINT Urgency
++ );
++
++gceSTATUS
++gckOS_BroadcastCalibrateSpeed(
++ IN gckOS Os,
++ IN gckHARDWARE Hardware,
++ IN gctUINT Idle,
++ IN gctUINT Time
++ );
++
++/*******************************************************************************
++**
++** gckOS_SetGPUPower
++**
++** Set the power of the GPU on or off.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to a gckOS object.ß
++**
++** gckCORE Core
++** GPU whose power is set.
++**
++** gctBOOL Clock
++** gcvTRUE to turn on the clock, or gcvFALSE to turn off the clock.
++**
++** gctBOOL Power
++** gcvTRUE to turn on the power, or gcvFALSE to turn off the power.
++**
++** OUTPUT:
++**
++** Nothing.
++*/
++gceSTATUS
++gckOS_SetGPUPower(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctBOOL Clock,
++ IN gctBOOL Power
++ );
++
++gceSTATUS
++gckOS_ResetGPU(
++ IN gckOS Os,
++ IN gceCORE Core
++ );
++
++gceSTATUS
++gckOS_PrepareGPUFrequency(
++ IN gckOS Os,
++ IN gceCORE Core
++ );
++
++gceSTATUS
++gckOS_FinishGPUFrequency(
++ IN gckOS Os,
++ IN gceCORE Core
++ );
++
++gceSTATUS
++gckOS_QueryGPUFrequency(
++ IN gckOS Os,
++ IN gceCORE Core,
++ OUT gctUINT32 * Frequency,
++ OUT gctUINT8 * Scale
++ );
++
++gceSTATUS
++gckOS_SetGPUFrequency(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctUINT8 Scale
++ );
++
++/*******************************************************************************
++** Semaphores.
++*/
++
++/* Create a new semaphore. */
++gceSTATUS
++gckOS_CreateSemaphore(
++ IN gckOS Os,
++ OUT gctPOINTER * Semaphore
++ );
++
++#if gcdENABLE_VG
++gceSTATUS
++gckOS_CreateSemaphoreVG(
++ IN gckOS Os,
++ OUT gctPOINTER * Semaphore
++ );
++#endif
++
++/* Delete a semahore. */
++gceSTATUS
++gckOS_DestroySemaphore(
++ IN gckOS Os,
++ IN gctPOINTER Semaphore
++ );
++
++/* Acquire a semahore. */
++gceSTATUS
++gckOS_AcquireSemaphore(
++ IN gckOS Os,
++ IN gctPOINTER Semaphore
++ );
++
++/* Try to acquire a semahore. */
++gceSTATUS
++gckOS_TryAcquireSemaphore(
++ IN gckOS Os,
++ IN gctPOINTER Semaphore
++ );
++
++/* Release a semahore. */
++gceSTATUS
++gckOS_ReleaseSemaphore(
++ IN gckOS Os,
++ IN gctPOINTER Semaphore
++ );
++
++/*******************************************************************************
++** Timer API.
++*/
++
++typedef void (*gctTIMERFUNCTION)(gctPOINTER);
++
++/* Create a timer. */
++gceSTATUS
++gckOS_CreateTimer(
++ IN gckOS Os,
++ IN gctTIMERFUNCTION Function,
++ IN gctPOINTER Data,
++ OUT gctPOINTER * Timer
++ );
++
++/* Destory a timer. */
++gceSTATUS
++gckOS_DestroyTimer(
++ IN gckOS Os,
++ IN gctPOINTER Timer
++ );
++
++/* Start a timer. */
++gceSTATUS
++gckOS_StartTimer(
++ IN gckOS Os,
++ IN gctPOINTER Timer,
++ IN gctUINT32 Delay
++ );
++
++/* Stop a timer. */
++gceSTATUS
++gckOS_StopTimer(
++ IN gckOS Os,
++ IN gctPOINTER Timer
++ );
++
++/******************************************************************************\
++********************************* gckHEAP Object ********************************
++\******************************************************************************/
++
++typedef struct _gckHEAP * gckHEAP;
++
++/* Construct a new gckHEAP object. */
++gceSTATUS
++gckHEAP_Construct(
++ IN gckOS Os,
++ IN gctSIZE_T AllocationSize,
++ OUT gckHEAP * Heap
++ );
++
++/* Destroy an gckHEAP object. */
++gceSTATUS
++gckHEAP_Destroy(
++ IN gckHEAP Heap
++ );
++
++/* Allocate memory. */
++gceSTATUS
++gckHEAP_Allocate(
++ IN gckHEAP Heap,
++ IN gctSIZE_T Bytes,
++ OUT gctPOINTER * Node
++ );
++
++/* Free memory. */
++gceSTATUS
++gckHEAP_Free(
++ IN gckHEAP Heap,
++ IN gctPOINTER Node
++ );
++
++/* Profile the heap. */
++gceSTATUS
++gckHEAP_ProfileStart(
++ IN gckHEAP Heap
++ );
++
++gceSTATUS
++gckHEAP_ProfileEnd(
++ IN gckHEAP Heap,
++ IN gctCONST_STRING Title
++ );
++
++
++/******************************************************************************\
++******************************** gckVIDMEM Object ******************************
++\******************************************************************************/
++
++typedef struct _gckVIDMEM * gckVIDMEM;
++typedef struct _gckKERNEL * gckKERNEL;
++typedef struct _gckDB * gckDB;
++typedef struct _gckDVFS * gckDVFS;
++
++/* Construct a new gckVIDMEM object. */
++gceSTATUS
++gckVIDMEM_Construct(
++ IN gckOS Os,
++ IN gctUINT32 BaseAddress,
++ IN gctSIZE_T Bytes,
++ IN gctSIZE_T Threshold,
++ IN gctSIZE_T Banking,
++ OUT gckVIDMEM * Memory
++ );
++
++/* Destroy an gckVDIMEM object. */
++gceSTATUS
++gckVIDMEM_Destroy(
++ IN gckVIDMEM Memory
++ );
++
++/* Allocate rectangular memory. */
++gceSTATUS
++gckVIDMEM_Allocate(
++ IN gckVIDMEM Memory,
++ IN gctUINT Width,
++ IN gctUINT Height,
++ IN gctUINT Depth,
++ IN gctUINT BytesPerPixel,
++ IN gctUINT32 Alignment,
++ IN gceSURF_TYPE Type,
++ OUT gcuVIDMEM_NODE_PTR * Node
++ );
++
++/* Allocate linear memory. */
++gceSTATUS
++gckVIDMEM_AllocateLinear(
++ IN gckVIDMEM Memory,
++ IN gctSIZE_T Bytes,
++ IN gctUINT32 Alignment,
++ IN gceSURF_TYPE Type,
++ OUT gcuVIDMEM_NODE_PTR * Node
++ );
++
++/* Free memory. */
++gceSTATUS
++gckVIDMEM_Free(
++ IN gcuVIDMEM_NODE_PTR Node
++ );
++
++/* Lock memory. */
++gceSTATUS
++gckVIDMEM_Lock(
++ IN gckKERNEL Kernel,
++ IN gcuVIDMEM_NODE_PTR Node,
++ IN gctBOOL Cacheable,
++ OUT gctUINT32 * Address
++ );
++
++/* Unlock memory. */
++gceSTATUS
++gckVIDMEM_Unlock(
++ IN gckKERNEL Kernel,
++ IN gcuVIDMEM_NODE_PTR Node,
++ IN gceSURF_TYPE Type,
++ IN OUT gctBOOL * Asynchroneous
++ );
++
++/* Construct a gcuVIDMEM_NODE union for virtual memory. */
++gceSTATUS
++gckVIDMEM_ConstructVirtual(
++ IN gckKERNEL Kernel,
++ IN gctBOOL Contiguous,
++ IN gctSIZE_T Bytes,
++ OUT gcuVIDMEM_NODE_PTR * Node
++ );
++
++/* Destroy a gcuVIDMEM_NODE union for virtual memory. */
++gceSTATUS
++gckVIDMEM_DestroyVirtual(
++ IN gcuVIDMEM_NODE_PTR Node
++ );
++
++/******************************************************************************\
++******************************** gckKERNEL Object ******************************
++\******************************************************************************/
++
++struct _gcsHAL_INTERFACE;
++
++/* Notifications. */
++typedef enum _gceNOTIFY
++{
++ gcvNOTIFY_INTERRUPT,
++ gcvNOTIFY_COMMAND_QUEUE,
++}
++gceNOTIFY;
++
++/* Flush flags. */
++typedef enum _gceKERNEL_FLUSH
++{
++ gcvFLUSH_COLOR = 0x01,
++ gcvFLUSH_DEPTH = 0x02,
++ gcvFLUSH_TEXTURE = 0x04,
++ gcvFLUSH_2D = 0x08,
++ gcvFLUSH_ALL = gcvFLUSH_COLOR
++ | gcvFLUSH_DEPTH
++ | gcvFLUSH_TEXTURE
++ | gcvFLUSH_2D,
++}
++gceKERNEL_FLUSH;
++
++/* Construct a new gckKERNEL object. */
++gceSTATUS
++gckKERNEL_Construct(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctPOINTER Context,
++ IN gckDB SharedDB,
++ OUT gckKERNEL * Kernel
++ );
++
++/* Destroy an gckKERNEL object. */
++gceSTATUS
++gckKERNEL_Destroy(
++ IN gckKERNEL Kernel
++ );
++
++/* Dispatch a user-level command. */
++gceSTATUS
++gckKERNEL_Dispatch(
++ IN gckKERNEL Kernel,
++ IN gctBOOL FromUser,
++ IN OUT struct _gcsHAL_INTERFACE * Interface
++ );
++
++/* Query the video memory. */
++gceSTATUS
++gckKERNEL_QueryVideoMemory(
++ IN gckKERNEL Kernel,
++ OUT struct _gcsHAL_INTERFACE * Interface
++ );
++
++/* Lookup the gckVIDMEM object for a pool. */
++gceSTATUS
++gckKERNEL_GetVideoMemoryPool(
++ IN gckKERNEL Kernel,
++ IN gcePOOL Pool,
++ OUT gckVIDMEM * VideoMemory
++ );
++
++#if gcdUSE_VIDMEM_PER_PID
++gceSTATUS
++gckKERNEL_GetVideoMemoryPoolPid(
++ IN gckKERNEL Kernel,
++ IN gcePOOL Pool,
++ IN gctUINT32 Pid,
++ OUT gckVIDMEM * VideoMemory
++ );
++
++gceSTATUS
++gckKERNEL_CreateVideoMemoryPoolPid(
++ IN gckKERNEL Kernel,
++ IN gcePOOL Pool,
++ IN gctUINT32 Pid,
++ OUT gckVIDMEM * VideoMemory
++ );
++
++gceSTATUS
++gckKERNEL_RemoveVideoMemoryPoolPid(
++ IN gckKERNEL Kernel,
++ IN gckVIDMEM VideoMemory
++ );
++#endif
++
++/* Map video memory. */
++gceSTATUS
++gckKERNEL_MapVideoMemory(
++ IN gckKERNEL Kernel,
++ IN gctBOOL InUserSpace,
++ IN gctUINT32 Address,
++#ifdef __QNXNTO__
++ IN gctUINT32 Pid,
++ IN gctUINT32 Bytes,
++#endif
++ OUT gctPOINTER * Logical
++ );
++
++/* Map video memory. */
++gceSTATUS
++gckKERNEL_MapVideoMemoryEx(
++ IN gckKERNEL Kernel,
++ IN gceCORE Core,
++ IN gctBOOL InUserSpace,
++ IN gctUINT32 Address,
++#ifdef __QNXNTO__
++ IN gctUINT32 Pid,
++ IN gctUINT32 Bytes,
++#endif
++ OUT gctPOINTER * Logical
++ );
++
++#ifdef __QNXNTO__
++/* Unmap video memory. */
++gceSTATUS
++gckKERNEL_UnmapVideoMemory(
++ IN gckKERNEL Kernel,
++ IN gctPOINTER Logical,
++ IN gctUINT32 Pid,
++ IN gctUINT32 Bytes
++ );
++#endif
++
++/* Map memory. */
++gceSTATUS
++gckKERNEL_MapMemory(
++ IN gckKERNEL Kernel,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ OUT gctPOINTER * Logical
++ );
++
++/* Unmap memory. */
++gceSTATUS
++gckKERNEL_UnmapMemory(
++ IN gckKERNEL Kernel,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ IN gctPOINTER Logical
++ );
++
++/* Notification of events. */
++gceSTATUS
++gckKERNEL_Notify(
++ IN gckKERNEL Kernel,
++ IN gceNOTIFY Notifcation,
++ IN gctBOOL Data
++ );
++
++gceSTATUS
++gckKERNEL_QuerySettings(
++ IN gckKERNEL Kernel,
++ OUT gcsKERNEL_SETTINGS * Settings
++ );
++
++/*******************************************************************************
++**
++** gckKERNEL_Recovery
++**
++** Try to recover the GPU from a fatal error.
++**
++** INPUT:
++**
++** gckKERNEL Kernel
++** Pointer to an gckKERNEL object.
++**
++** OUTPUT:
++**
++** Nothing.
++*/
++gceSTATUS
++gckKERNEL_Recovery(
++ IN gckKERNEL Kernel
++ );
++
++/* Set the value of timeout on HW operation. */
++void
++gckKERNEL_SetTimeOut(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 timeOut
++ );
++
++/* Get access to the user data. */
++gceSTATUS
++gckKERNEL_OpenUserData(
++ IN gckKERNEL Kernel,
++ IN gctBOOL NeedCopy,
++ IN gctPOINTER StaticStorage,
++ IN gctPOINTER UserPointer,
++ IN gctSIZE_T Size,
++ OUT gctPOINTER * KernelPointer
++ );
++
++/* Release resources associated with the user data connection. */
++gceSTATUS
++gckKERNEL_CloseUserData(
++ IN gckKERNEL Kernel,
++ IN gctBOOL NeedCopy,
++ IN gctBOOL FlushData,
++ IN gctPOINTER UserPointer,
++ IN gctSIZE_T Size,
++ OUT gctPOINTER * KernelPointer
++ );
++
++gceSTATUS
++gckDVFS_Construct(
++ IN gckHARDWARE Hardware,
++ OUT gckDVFS * Frequency
++ );
++
++gceSTATUS
++gckDVFS_Destroy(
++ IN gckDVFS Dvfs
++ );
++
++gceSTATUS
++gckDVFS_Start(
++ IN gckDVFS Dvfs
++ );
++
++gceSTATUS
++gckDVFS_Stop(
++ IN gckDVFS Dvfs
++ );
++
++/******************************************************************************\
++******************************* gckHARDWARE Object *****************************
++\******************************************************************************/
++
++/* Construct a new gckHARDWARE object. */
++gceSTATUS
++gckHARDWARE_Construct(
++ IN gckOS Os,
++ IN gceCORE Core,
++ OUT gckHARDWARE * Hardware
++ );
++
++/* Destroy an gckHARDWARE object. */
++gceSTATUS
++gckHARDWARE_Destroy(
++ IN gckHARDWARE Hardware
++ );
++
++/* Get hardware type. */
++gceSTATUS
++gckHARDWARE_GetType(
++ IN gckHARDWARE Hardware,
++ OUT gceHARDWARE_TYPE * Type
++ );
++
++/* Query system memory requirements. */
++gceSTATUS
++gckHARDWARE_QuerySystemMemory(
++ IN gckHARDWARE Hardware,
++ OUT gctSIZE_T * SystemSize,
++ OUT gctUINT32 * SystemBaseAddress
++ );
++
++/* Build virtual address. */
++gceSTATUS
++gckHARDWARE_BuildVirtualAddress(
++ IN gckHARDWARE Hardware,
++ IN gctUINT32 Index,
++ IN gctUINT32 Offset,
++ OUT gctUINT32 * Address
++ );
++
++/* Query command buffer requirements. */
++gceSTATUS
++gckHARDWARE_QueryCommandBuffer(
++ IN gckHARDWARE Hardware,
++ OUT gctSIZE_T * Alignment,
++ OUT gctSIZE_T * ReservedHead,
++ OUT gctSIZE_T * ReservedTail
++ );
++
++/* Add a WAIT/LINK pair in the command queue. */
++gceSTATUS
++gckHARDWARE_WaitLink(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN gctUINT32 Offset,
++ IN OUT gctSIZE_T * Bytes,
++ OUT gctUINT32 * WaitOffset,
++ OUT gctSIZE_T * WaitBytes
++ );
++
++/* Kickstart the command processor. */
++gceSTATUS
++gckHARDWARE_Execute(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++#ifdef __QNXNTO__
++ IN gctPOINTER Physical,
++ IN gctBOOL PhysicalAddresses,
++#endif
++ IN gctSIZE_T Bytes
++ );
++
++/* Add an END command in the command queue. */
++gceSTATUS
++gckHARDWARE_End(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN OUT gctSIZE_T * Bytes
++ );
++
++/* Add a NOP command in the command queue. */
++gceSTATUS
++gckHARDWARE_Nop(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN OUT gctSIZE_T * Bytes
++ );
++
++/* Add a WAIT command in the command queue. */
++gceSTATUS
++gckHARDWARE_Wait(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN gctUINT32 Count,
++ IN OUT gctSIZE_T * Bytes
++ );
++
++/* Add a PIPESELECT command in the command queue. */
++gceSTATUS
++gckHARDWARE_PipeSelect(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN gcePIPE_SELECT Pipe,
++ IN OUT gctSIZE_T * Bytes
++ );
++
++/* Add a LINK command in the command queue. */
++gceSTATUS
++gckHARDWARE_Link(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN gctPOINTER FetchAddress,
++ IN gctSIZE_T FetchSize,
++ IN OUT gctSIZE_T * Bytes
++ );
++
++/* Add an EVENT command in the command queue. */
++gceSTATUS
++gckHARDWARE_Event(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN gctUINT8 Event,
++ IN gceKERNEL_WHERE FromWhere,
++ IN OUT gctSIZE_T * Bytes
++ );
++
++/* Query the available memory. */
++gceSTATUS
++gckHARDWARE_QueryMemory(
++ IN gckHARDWARE Hardware,
++ OUT gctSIZE_T * InternalSize,
++ OUT gctUINT32 * InternalBaseAddress,
++ OUT gctUINT32 * InternalAlignment,
++ OUT gctSIZE_T * ExternalSize,
++ OUT gctUINT32 * ExternalBaseAddress,
++ OUT gctUINT32 * ExternalAlignment,
++ OUT gctUINT32 * HorizontalTileSize,
++ OUT gctUINT32 * VerticalTileSize
++ );
++
++/* Query the identity of the hardware. */
++gceSTATUS
++gckHARDWARE_QueryChipIdentity(
++ IN gckHARDWARE Hardware,
++ OUT gcsHAL_QUERY_CHIP_IDENTITY_PTR Identity
++ );
++
++/* Query the shader support. */
++gceSTATUS
++gckHARDWARE_QueryShaderCaps(
++ IN gckHARDWARE Hardware,
++ OUT gctUINT * VertexUniforms,
++ OUT gctUINT * FragmentUniforms,
++ OUT gctUINT * Varyings
++ );
++
++/* Split a harwdare specific address into API stuff. */
++gceSTATUS
++gckHARDWARE_SplitMemory(
++ IN gckHARDWARE Hardware,
++ IN gctUINT32 Address,
++ OUT gcePOOL * Pool,
++ OUT gctUINT32 * Offset
++ );
++
++/* Update command queue tail pointer. */
++gceSTATUS
++gckHARDWARE_UpdateQueueTail(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN gctUINT32 Offset
++ );
++
++/* Convert logical address to hardware specific address. */
++gceSTATUS
++gckHARDWARE_ConvertLogical(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ OUT gctUINT32 * Address
++ );
++
++#ifdef __QNXNTO__
++/* Convert physical address to hardware specific address. */
++gceSTATUS
++gckHARDWARE_ConvertPhysical(
++ IN gckHARDWARE Hardware,
++ IN gctPHYS_ADDR Physical,
++ OUT gctUINT32 * Address
++ );
++#endif
++
++/* Interrupt manager. */
++gceSTATUS
++gckHARDWARE_Interrupt(
++ IN gckHARDWARE Hardware,
++ IN gctBOOL InterruptValid
++ );
++
++/* Program MMU. */
++gceSTATUS
++gckHARDWARE_SetMMU(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical
++ );
++
++/* Flush the MMU. */
++gceSTATUS
++gckHARDWARE_FlushMMU(
++ IN gckHARDWARE Hardware
++ );
++
++/* Set the page table base address. */
++gceSTATUS
++gckHARDWARE_SetMMUv2(
++ IN gckHARDWARE Hardware,
++ IN gctBOOL Enable,
++ IN gctPOINTER MtlbAddress,
++ IN gceMMU_MODE Mode,
++ IN gctPOINTER SafeAddress,
++ IN gctBOOL FromPower
++ );
++
++/* Get idle register. */
++gceSTATUS
++gckHARDWARE_GetIdle(
++ IN gckHARDWARE Hardware,
++ IN gctBOOL Wait,
++ OUT gctUINT32 * Data
++ );
++
++/* Flush the caches. */
++gceSTATUS
++gckHARDWARE_Flush(
++ IN gckHARDWARE Hardware,
++ IN gceKERNEL_FLUSH Flush,
++ IN gctPOINTER Logical,
++ IN OUT gctSIZE_T * Bytes
++ );
++
++/* Enable/disable fast clear. */
++gceSTATUS
++gckHARDWARE_SetFastClear(
++ IN gckHARDWARE Hardware,
++ IN gctINT Enable,
++ IN gctINT Compression
++ );
++
++gceSTATUS
++gckHARDWARE_ReadInterrupt(
++ IN gckHARDWARE Hardware,
++ OUT gctUINT32_PTR IDs
++ );
++
++/* Power management. */
++gceSTATUS
++gckHARDWARE_SetPowerManagementState(
++ IN gckHARDWARE Hardware,
++ IN gceCHIPPOWERSTATE State
++ );
++
++gceSTATUS
++gckHARDWARE_QueryPowerManagementState(
++ IN gckHARDWARE Hardware,
++ OUT gceCHIPPOWERSTATE* State
++ );
++
++gceSTATUS
++gckHARDWARE_SetPowerManagement(
++ IN gckHARDWARE Hardware,
++ IN gctBOOL PowerManagement
++ );
++
++gceSTATUS
++gckHARDWARE_SetGpuProfiler(
++ IN gckHARDWARE Hardware,
++ IN gctBOOL GpuProfiler
++ );
++
++#if gcdENABLE_FSCALE_VAL_ADJUST
++gceSTATUS
++gckHARDWARE_SetFscaleValue(
++ IN gckHARDWARE Hardware,
++ IN gctUINT32 FscaleValue
++ );
++
++gceSTATUS
++gckHARDWARE_GetFscaleValue(
++ IN gckHARDWARE Hardware,
++ IN gctUINT * FscaleValue,
++ IN gctUINT * MinFscaleValue,
++ IN gctUINT * MaxFscaleValue
++ );
++#endif
++
++#if gcdPOWEROFF_TIMEOUT
++gceSTATUS
++gckHARDWARE_SetPowerOffTimeout(
++ IN gckHARDWARE Hardware,
++ IN gctUINT32 Timeout
++);
++
++gceSTATUS
++gckHARDWARE_QueryPowerOffTimeout(
++ IN gckHARDWARE Hardware,
++ OUT gctUINT32* Timeout
++);
++#endif
++
++/* Profile 2D Engine. */
++gceSTATUS
++gckHARDWARE_ProfileEngine2D(
++ IN gckHARDWARE Hardware,
++ OUT gcs2D_PROFILE_PTR Profile
++ );
++
++gceSTATUS
++gckHARDWARE_InitializeHardware(
++ IN gckHARDWARE Hardware
++ );
++
++gceSTATUS
++gckHARDWARE_Reset(
++ IN gckHARDWARE Hardware
++ );
++
++typedef gceSTATUS (*gctISRMANAGERFUNC)(gctPOINTER Context, gceCORE Core);
++
++gceSTATUS
++gckHARDWARE_SetIsrManager(
++ IN gckHARDWARE Hardware,
++ IN gctISRMANAGERFUNC StartIsr,
++ IN gctISRMANAGERFUNC StopIsr,
++ IN gctPOINTER Context
++ );
++
++/* Start a composition. */
++gceSTATUS
++gckHARDWARE_Compose(
++ IN gckHARDWARE Hardware,
++ IN gctUINT32 ProcessID,
++ IN gctPHYS_ADDR Physical,
++ IN gctPOINTER Logical,
++ IN gctSIZE_T Offset,
++ IN gctSIZE_T Size,
++ IN gctUINT8 EventID
++ );
++
++/* Check for Hardware features. */
++gceSTATUS
++gckHARDWARE_IsFeatureAvailable(
++ IN gckHARDWARE Hardware,
++ IN gceFEATURE Feature
++ );
++
++gceSTATUS
++gckHARDWARE_DumpMMUException(
++ IN gckHARDWARE Hardware
++ );
++
++gceSTATUS
++gckHARDWARE_DumpGPUState(
++ IN gckHARDWARE Hardware
++ );
++
++gceSTATUS
++gckHARDWARE_InitDVFS(
++ IN gckHARDWARE Hardware
++ );
++
++gceSTATUS
++gckHARDWARE_QueryLoad(
++ IN gckHARDWARE Hardware,
++ OUT gctUINT32 * Load
++ );
++
++gceSTATUS
++gckHARDWARE_SetDVFSPeroid(
++ IN gckHARDWARE Hardware,
++ IN gctUINT32 Frequency
++ );
++
++#if !gcdENABLE_VG
++/******************************************************************************\
++***************************** gckINTERRUPT Object ******************************
++\******************************************************************************/
++
++typedef struct _gckINTERRUPT * gckINTERRUPT;
++
++typedef gceSTATUS (* gctINTERRUPT_HANDLER)(
++ IN gckKERNEL Kernel
++ );
++
++gceSTATUS
++gckINTERRUPT_Construct(
++ IN gckKERNEL Kernel,
++ OUT gckINTERRUPT * Interrupt
++ );
++
++gceSTATUS
++gckINTERRUPT_Destroy(
++ IN gckINTERRUPT Interrupt
++ );
++
++gceSTATUS
++gckINTERRUPT_SetHandler(
++ IN gckINTERRUPT Interrupt,
++ IN OUT gctINT32_PTR Id,
++ IN gctINTERRUPT_HANDLER Handler
++ );
++
++gceSTATUS
++gckINTERRUPT_Notify(
++ IN gckINTERRUPT Interrupt,
++ IN gctBOOL Valid
++ );
++#endif
++/******************************************************************************\
++******************************** gckEVENT Object *******************************
++\******************************************************************************/
++
++typedef struct _gckEVENT * gckEVENT;
++
++/* Construct a new gckEVENT object. */
++gceSTATUS
++gckEVENT_Construct(
++ IN gckKERNEL Kernel,
++ OUT gckEVENT * Event
++ );
++
++/* Destroy an gckEVENT object. */
++gceSTATUS
++gckEVENT_Destroy(
++ IN gckEVENT Event
++ );
++
++/* Add a new event to the list of events. */
++gceSTATUS
++gckEVENT_AddList(
++ IN gckEVENT Event,
++ IN gcsHAL_INTERFACE_PTR Interface,
++ IN gceKERNEL_WHERE FromWhere,
++ IN gctBOOL AllocateAllowed,
++ IN gctBOOL FromKernel
++ );
++
++/* Schedule a FreeNonPagedMemory event. */
++gceSTATUS
++gckEVENT_FreeNonPagedMemory(
++ IN gckEVENT Event,
++ IN gctSIZE_T Bytes,
++ IN gctPHYS_ADDR Physical,
++ IN gctPOINTER Logical,
++ IN gceKERNEL_WHERE FromWhere
++ );
++
++/* Schedule a FreeContiguousMemory event. */
++gceSTATUS
++gckEVENT_FreeContiguousMemory(
++ IN gckEVENT Event,
++ IN gctSIZE_T Bytes,
++ IN gctPHYS_ADDR Physical,
++ IN gctPOINTER Logical,
++ IN gceKERNEL_WHERE FromWhere
++ );
++
++/* Schedule a FreeVideoMemory event. */
++gceSTATUS
++gckEVENT_FreeVideoMemory(
++ IN gckEVENT Event,
++ IN gcuVIDMEM_NODE_PTR VideoMemory,
++ IN gceKERNEL_WHERE FromWhere
++ );
++
++/* Schedule a signal event. */
++gceSTATUS
++gckEVENT_Signal(
++ IN gckEVENT Event,
++ IN gctSIGNAL Signal,
++ IN gceKERNEL_WHERE FromWhere
++ );
++
++/* Schedule an Unlock event. */
++gceSTATUS
++gckEVENT_Unlock(
++ IN gckEVENT Event,
++ IN gceKERNEL_WHERE FromWhere,
++ IN gcuVIDMEM_NODE_PTR Node,
++ IN gceSURF_TYPE Type
++ );
++
++gceSTATUS
++gckEVENT_CommitDone(
++ IN gckEVENT Event,
++ IN gceKERNEL_WHERE FromWhere
++ );
++
++#if gcdVIRTUAL_COMMAND_BUFFER
++/* Schedule a FreeVirtualCommandBuffer event. */
++gceSTATUS
++gckEVENT_DestroyVirtualCommandBuffer(
++ IN gckEVENT Event,
++ IN gctSIZE_T Bytes,
++ IN gctPHYS_ADDR Physical,
++ IN gctPOINTER Logical,
++ IN gceKERNEL_WHERE FromWhere
++ );
++#endif
++
++gceSTATUS
++gckEVENT_Submit(
++ IN gckEVENT Event,
++ IN gctBOOL Wait,
++ IN gctBOOL FromPower
++ );
++
++/* Commit an event queue. */
++gceSTATUS
++gckEVENT_Commit(
++ IN gckEVENT Event,
++ IN gcsQUEUE_PTR Queue
++ );
++
++/* Schedule a composition event. */
++gceSTATUS
++gckEVENT_Compose(
++ IN gckEVENT Event,
++ IN gcsHAL_COMPOSE_PTR Info
++ );
++
++/* Event callback routine. */
++gceSTATUS
++gckEVENT_Notify(
++ IN gckEVENT Event,
++ IN gctUINT32 IDs
++ );
++
++/* Event callback routine. */
++gceSTATUS
++gckEVENT_Interrupt(
++ IN gckEVENT Event,
++ IN gctUINT32 IDs
++ );
++
++gceSTATUS
++gckEVENT_Dump(
++ IN gckEVENT Event
++ );
++/******************************************************************************\
++******************************* gckCOMMAND Object ******************************
++\******************************************************************************/
++
++typedef struct _gckCOMMAND * gckCOMMAND;
++
++/* Construct a new gckCOMMAND object. */
++gceSTATUS
++gckCOMMAND_Construct(
++ IN gckKERNEL Kernel,
++ OUT gckCOMMAND * Command
++ );
++
++/* Destroy an gckCOMMAND object. */
++gceSTATUS
++gckCOMMAND_Destroy(
++ IN gckCOMMAND Command
++ );
++
++/* Acquire command queue synchronization objects. */
++gceSTATUS
++gckCOMMAND_EnterCommit(
++ IN gckCOMMAND Command,
++ IN gctBOOL FromPower
++ );
++
++/* Release command queue synchronization objects. */
++gceSTATUS
++gckCOMMAND_ExitCommit(
++ IN gckCOMMAND Command,
++ IN gctBOOL FromPower
++ );
++
++/* Start the command queue. */
++gceSTATUS
++gckCOMMAND_Start(
++ IN gckCOMMAND Command
++ );
++
++/* Stop the command queue. */
++gceSTATUS
++gckCOMMAND_Stop(
++ IN gckCOMMAND Command,
++ IN gctBOOL FromRecovery
++ );
++
++/* Commit a buffer to the command queue. */
++gceSTATUS
++gckCOMMAND_Commit(
++ IN gckCOMMAND Command,
++ IN gckCONTEXT Context,
++ IN gcoCMDBUF CommandBuffer,
++ IN gcsSTATE_DELTA_PTR StateDelta,
++ IN gcsQUEUE_PTR EventQueue,
++ IN gctUINT32 ProcessID
++ );
++
++/* Reserve space in the command buffer. */
++gceSTATUS
++gckCOMMAND_Reserve(
++ IN gckCOMMAND Command,
++ IN gctSIZE_T RequestedBytes,
++ OUT gctPOINTER * Buffer,
++ OUT gctSIZE_T * BufferSize
++ );
++
++/* Execute reserved space in the command buffer. */
++gceSTATUS
++gckCOMMAND_Execute(
++ IN gckCOMMAND Command,
++ IN gctSIZE_T RequstedBytes
++ );
++
++/* Stall the command queue. */
++gceSTATUS
++gckCOMMAND_Stall(
++ IN gckCOMMAND Command,
++ IN gctBOOL FromPower
++ );
++
++/* Attach user process. */
++gceSTATUS
++gckCOMMAND_Attach(
++ IN gckCOMMAND Command,
++ OUT gckCONTEXT * Context,
++ OUT gctSIZE_T * StateCount,
++ IN gctUINT32 ProcessID
++ );
++
++/* Detach user process. */
++gceSTATUS
++gckCOMMAND_Detach(
++ IN gckCOMMAND Command,
++ IN gckCONTEXT Context
++ );
++
++#if gcdVIRTUAL_COMMAND_BUFFER
++gceSTATUS
++gckCOMMAND_DumpExecutingBuffer(
++ IN gckCOMMAND Command
++ );
++#endif
++
++/******************************************************************************\
++********************************* gckMMU Object ********************************
++\******************************************************************************/
++
++typedef struct _gckMMU * gckMMU;
++
++/* Construct a new gckMMU object. */
++gceSTATUS
++gckMMU_Construct(
++ IN gckKERNEL Kernel,
++ IN gctSIZE_T MmuSize,
++ OUT gckMMU * Mmu
++ );
++
++/* Destroy an gckMMU object. */
++gceSTATUS
++gckMMU_Destroy(
++ IN gckMMU Mmu
++ );
++
++/* Enable the MMU. */
++gceSTATUS
++gckMMU_Enable(
++ IN gckMMU Mmu,
++ IN gctUINT32 PhysBaseAddr,
++ IN gctUINT32 PhysSize
++ );
++
++/* Allocate pages inside the MMU. */
++gceSTATUS
++gckMMU_AllocatePages(
++ IN gckMMU Mmu,
++ IN gctSIZE_T PageCount,
++ OUT gctPOINTER * PageTable,
++ OUT gctUINT32 * Address
++ );
++
++gceSTATUS
++gckMMU_AllocatePagesEx(
++ IN gckMMU Mmu,
++ IN gctSIZE_T PageCount,
++ IN gceSURF_TYPE Type,
++ OUT gctPOINTER * PageTable,
++ OUT gctUINT32 * Address
++ );
++
++/* Remove a page table from the MMU. */
++gceSTATUS
++gckMMU_FreePages(
++ IN gckMMU Mmu,
++ IN gctPOINTER PageTable,
++ IN gctSIZE_T PageCount
++ );
++
++/* Set the MMU page with info. */
++gceSTATUS
++gckMMU_SetPage(
++ IN gckMMU Mmu,
++ IN gctUINT32 PageAddress,
++ IN gctUINT32 *PageEntry
++ );
++
++#ifdef __QNXNTO__
++gceSTATUS
++gckMMU_InsertNode(
++ IN gckMMU Mmu,
++ IN gcuVIDMEM_NODE_PTR Node);
++
++gceSTATUS
++gckMMU_RemoveNode(
++ IN gckMMU Mmu,
++ IN gcuVIDMEM_NODE_PTR Node);
++#endif
++
++#ifdef __QNXNTO__
++gceSTATUS
++gckMMU_FreeHandleMemory(
++ IN gckKERNEL Kernel,
++ IN gckMMU Mmu,
++ IN gctUINT32 Pid
++ );
++#endif
++
++gceSTATUS
++gckMMU_Flush(
++ IN gckMMU Mmu
++ );
++
++gceSTATUS
++gckMMU_DumpPageTableEntry(
++ IN gckMMU Mmu,
++ IN gctUINT32 Address
++ );
++
++
++#if VIVANTE_PROFILER
++gceSTATUS
++gckHARDWARE_QueryProfileRegisters(
++ IN gckHARDWARE Hardware,
++ IN gctBOOL Clear,
++ OUT gcsPROFILER_COUNTERS * Counters
++ );
++#endif
++
++#if VIVANTE_PROFILER_CONTEXT
++gceSTATUS
++gckHARDWARE_QueryContextProfile(
++ IN gckHARDWARE Hardware,
++ IN gctBOOL Clear,
++ IN gckCONTEXT Context,
++ OUT gcsPROFILER_COUNTERS * Counters
++ );
++
++gceSTATUS
++gckHARDWARE_UpdateContextProfile(
++ IN gckHARDWARE Hardware,
++ IN gckCONTEXT Context
++ );
++#endif
++
++gceSTATUS
++gckOS_SignalQueryHardware(
++ IN gckOS Os,
++ IN gctSIGNAL Signal,
++ OUT gckHARDWARE * Hardware
++ );
++
++gceSTATUS
++gckOS_SignalSetHardware(
++ IN gckOS Os,
++ IN gctSIGNAL Signal,
++ gckHARDWARE Hardware
++ );
++
++#ifdef __cplusplus
++}
++#endif
++
++#if gcdENABLE_VG
++#include "gc_hal_vg.h"
++#endif
++
++#endif /* __gc_hal_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_kernel_buffer.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_kernel_buffer.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_kernel_buffer.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_kernel_buffer.h 2015-10-12 10:56:18.064351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_kernel_buffer.h 2015-10-15 15:51:25.296652409 +0200
@@ -0,0 +1,185 @@
+/****************************************************************************
+*
@@ -157941,7 +157640,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_kernel
+#endif /* __gc_hal_kernel_buffer_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_mem.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_mem.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_mem.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_mem.h 2015-10-12 10:56:18.064351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_mem.h 2015-10-15 15:51:25.300652145 +0200
@@ -0,0 +1,530 @@
+/****************************************************************************
+*
@@ -158475,7 +158174,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_mem.h
+#endif /* __gc_hal_mem_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_options.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_options.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_options.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_options.h 2015-10-12 10:56:18.065351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_options.h 2015-10-15 15:51:25.300652145 +0200
@@ -0,0 +1,947 @@
+/****************************************************************************
+*
@@ -159426,7 +159125,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_option
+#endif /* __gc_hal_options_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_profiler.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_profiler.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_profiler.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_profiler.h 2015-10-12 10:56:18.065351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_profiler.h 2015-10-15 15:51:25.300652145 +0200
@@ -0,0 +1,584 @@
+/****************************************************************************
+*
@@ -160014,7 +159713,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_profil
+#endif /* __gc_hal_profiler_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_raster.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_raster.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_raster.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_raster.h 2015-10-12 10:56:18.065351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_raster.h 2015-10-15 15:51:25.300652145 +0200
@@ -0,0 +1,1010 @@
+/****************************************************************************
+*
@@ -161028,7 +160727,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_raster
+#endif /* __gc_hal_raster_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_rename.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_rename.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_rename.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_rename.h 2015-10-12 10:56:18.066351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_rename.h 2015-10-15 15:51:25.300652145 +0200
@@ -0,0 +1,248 @@
+/****************************************************************************
+*
@@ -161280,7 +160979,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_rename
+#endif /* __gc_hal_rename_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_statistics.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_statistics.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_statistics.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_statistics.h 2015-10-12 10:56:18.066351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_statistics.h 2015-10-15 15:51:25.300652145 +0200
@@ -0,0 +1,115 @@
+/****************************************************************************
+*
@@ -161399,7 +161098,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_statis
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_types.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_types.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_types.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_types.h 2015-10-12 10:56:18.066351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_types.h 2015-10-15 15:51:25.300652145 +0200
@@ -0,0 +1,1080 @@
+/****************************************************************************
+*
@@ -162483,7 +162182,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_types.
+#endif /* __gc_hal_types_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_version.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_version.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_version.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_version.h 2015-10-12 10:56:18.066351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_version.h 2015-10-15 15:51:25.300652145 +0200
@@ -0,0 +1,37 @@
+/****************************************************************************
+*
@@ -162524,7 +162223,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_versio
+#endif /* __gc_hal_version_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_vg.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_vg.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_vg.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_vg.h 2015-10-12 10:56:18.067351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_vg.h 2015-10-15 15:51:25.300652145 +0200
@@ -0,0 +1,913 @@
+/****************************************************************************
+*
@@ -163439,115 +163138,9 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/kernel/inc/gc_hal_vg.h l
+#endif
+
+#endif /* __gc_hal_h_ */
-diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debug.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debug.h
---- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debug.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debug.h 2015-10-12 10:56:18.067351160 +0200
-@@ -0,0 +1,102 @@
-+/****************************************************************************
-+*
-+* Copyright (C) 2005 - 2013 by Vivante Corp.
-+*
-+* This program is free software; you can redistribute it and/or modify
-+* it under the terms of the GNU General Public License as published by
-+* the Free Software Foundation; either version 2 of the license, or
-+* (at your option) any later version.
-+*
-+* This program is distributed in the hope that it will be useful,
-+* but WITHOUT ANY WARRANTY; without even the implied warranty of
-+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+* GNU General Public License for more details.
-+*
-+* You should have received a copy of the GNU General Public License
-+* along with this program; if not write to the Free Software
-+* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-+*
-+*****************************************************************************/
-+
-+
-+#ifndef __gc_hal_kernel_debug_h_
-+#define __gc_hal_kernel_debug_h_
-+
-+#include <gc_hal_kernel_linux.h>
-+#include <linux/spinlock.h>
-+#include <linux/time.h>
-+#include <stdarg.h>
-+
-+#ifdef __cplusplus
-+extern "C" {
-+#endif
-+
-+/******************************************************************************\
-+****************************** OS-dependent Macros *****************************
-+\******************************************************************************/
-+
-+typedef va_list gctARGUMENTS;
-+
-+#define gcmkARGUMENTS_START(Arguments, Pointer) \
-+ va_start(Arguments, Pointer)
-+
-+#define gcmkARGUMENTS_END(Arguments) \
-+ va_end(Arguments)
-+
-+#define gcmkDECLARE_LOCK(__spinLock__) \
-+ static DEFINE_SPINLOCK(__spinLock__);
-+
-+#define gcmkLOCKSECTION(__spinLock__) \
-+ spin_lock(&__spinLock__)
-+
-+#define gcmkUNLOCKSECTION(__spinLock__) \
-+ spin_unlock(&__spinLock__)
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
-+# define gcmkGETPROCESSID() \
-+ task_tgid_vnr(current)
-+#else
-+# define gcmkGETPROCESSID() \
-+ current->tgid
-+#endif
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
-+# define gcmkGETTHREADID() \
-+ task_pid_vnr(current)
-+#else
-+# define gcmkGETTHREADID() \
-+ current->pid
-+#endif
-+
-+#define gcmkOUTPUT_STRING(String) \
-+ if(gckDebugFileSystemIsEnabled()) \
-+ gckDebugFileSystemPrint(String);\
-+ else\
-+ printk(String); \
-+ touch_softlockup_watchdog()
-+
-+
-+#define gcmkSPRINTF(Destination, Size, Message, Value) \
-+ snprintf(Destination, Size, Message, Value)
-+
-+#define gcmkSPRINTF2(Destination, Size, Message, Value1, Value2) \
-+ snprintf(Destination, Size, Message, Value1, Value2)
-+
-+#define gcmkSPRINTF3(Destination, Size, Message, Value1, Value2, Value3) \
-+ snprintf(Destination, Size, Message, Value1, Value2, Value3)
-+
-+#define gcmkVSPRINTF(Destination, Size, Message, Arguments) \
-+ vsnprintf(Destination, Size, Message, *(va_list *) &Arguments)
-+
-+#define gcmkSTRCAT(Destination, Size, String) \
-+ strncat(Destination, String, Size)
-+
-+/* If not zero, forces data alignment in the variable argument list
-+ by its individual size. */
-+#define gcdALIGNBYSIZE 1
-+
-+#ifdef __cplusplus
-+}
-+#endif
-+
-+#endif /* __gc_hal_kernel_debug_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debugfs.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debugfs.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debugfs.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debugfs.c 2015-10-12 10:56:18.067351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debugfs.c 2015-10-15 15:51:25.300652145 +0200
@@ -0,0 +1,795 @@
+/****************************************************************************
+*
@@ -164346,7 +163939,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_k
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debugfs.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debugfs.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debugfs.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debugfs.h 2015-10-12 10:56:18.067351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debugfs.h 2015-10-15 15:51:25.300652145 +0200
@@ -0,0 +1,84 @@
+/****************************************************************************
+*
@@ -164432,9 +164025,115 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_k
+#endif
+
+
+diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debug.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debug.h
+--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debug.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_debug.h 2015-10-15 15:51:25.300652145 +0200
+@@ -0,0 +1,102 @@
++/****************************************************************************
++*
++* Copyright (C) 2005 - 2013 by Vivante Corp.
++*
++* This program is free software; you can redistribute it and/or modify
++* it under the terms of the GNU General Public License as published by
++* the Free Software Foundation; either version 2 of the license, or
++* (at your option) any later version.
++*
++* This program is distributed in the hope that it will be useful,
++* but WITHOUT ANY WARRANTY; without even the implied warranty of
++* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++* GNU General Public License for more details.
++*
++* You should have received a copy of the GNU General Public License
++* along with this program; if not write to the Free Software
++* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*
++*****************************************************************************/
++
++
++#ifndef __gc_hal_kernel_debug_h_
++#define __gc_hal_kernel_debug_h_
++
++#include <gc_hal_kernel_linux.h>
++#include <linux/spinlock.h>
++#include <linux/time.h>
++#include <stdarg.h>
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++/******************************************************************************\
++****************************** OS-dependent Macros *****************************
++\******************************************************************************/
++
++typedef va_list gctARGUMENTS;
++
++#define gcmkARGUMENTS_START(Arguments, Pointer) \
++ va_start(Arguments, Pointer)
++
++#define gcmkARGUMENTS_END(Arguments) \
++ va_end(Arguments)
++
++#define gcmkDECLARE_LOCK(__spinLock__) \
++ static DEFINE_SPINLOCK(__spinLock__);
++
++#define gcmkLOCKSECTION(__spinLock__) \
++ spin_lock(&__spinLock__)
++
++#define gcmkUNLOCKSECTION(__spinLock__) \
++ spin_unlock(&__spinLock__)
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
++# define gcmkGETPROCESSID() \
++ task_tgid_vnr(current)
++#else
++# define gcmkGETPROCESSID() \
++ current->tgid
++#endif
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
++# define gcmkGETTHREADID() \
++ task_pid_vnr(current)
++#else
++# define gcmkGETTHREADID() \
++ current->pid
++#endif
++
++#define gcmkOUTPUT_STRING(String) \
++ if(gckDebugFileSystemIsEnabled()) \
++ gckDebugFileSystemPrint(String);\
++ else\
++ printk(String); \
++ touch_softlockup_watchdog()
++
++
++#define gcmkSPRINTF(Destination, Size, Message, Value) \
++ snprintf(Destination, Size, Message, Value)
++
++#define gcmkSPRINTF2(Destination, Size, Message, Value1, Value2) \
++ snprintf(Destination, Size, Message, Value1, Value2)
++
++#define gcmkSPRINTF3(Destination, Size, Message, Value1, Value2, Value3) \
++ snprintf(Destination, Size, Message, Value1, Value2, Value3)
++
++#define gcmkVSPRINTF(Destination, Size, Message, Arguments) \
++ vsnprintf(Destination, Size, Message, *(va_list *) &Arguments)
++
++#define gcmkSTRCAT(Destination, Size, String) \
++ strncat(Destination, String, Size)
++
++/* If not zero, forces data alignment in the variable argument list
++ by its individual size. */
++#define gcdALIGNBYSIZE 1
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* __gc_hal_kernel_debug_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_device.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_device.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_device.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_device.c 2015-10-12 10:56:18.068351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_device.c 2015-10-15 15:51:25.304651882 +0200
@@ -0,0 +1,1676 @@
+/****************************************************************************
+*
@@ -166114,7 +165813,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_k
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_device.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_device.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_device.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_device.h 2015-10-12 10:56:18.068351160 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_device.h 2015-10-15 15:51:25.304651882 +0200
@@ -0,0 +1,192 @@
+/****************************************************************************
+*
@@ -166310,7 +166009,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_k
+#endif /* __gc_hal_kernel_device_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_driver.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_driver.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_driver.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_driver.c 2015-10-12 10:56:18.069351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_driver.c 2015-10-15 15:51:25.304651882 +0200
@@ -0,0 +1,1476 @@
+/****************************************************************************
+*
@@ -167790,7 +167489,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_k
+#endif
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_linux.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_linux.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_linux.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_linux.c 2015-10-12 10:56:18.069351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_linux.c 2015-10-15 15:51:25.304651882 +0200
@@ -0,0 +1,481 @@
+/****************************************************************************
+*
@@ -168275,7 +167974,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_k
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_linux.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_linux.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_linux.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_linux.h 2015-10-12 10:56:18.069351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_linux.h 2015-10-15 15:51:25.304651882 +0200
@@ -0,0 +1,94 @@
+/****************************************************************************
+*
@@ -168373,7 +168072,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_k
+#endif /* __gc_hal_kernel_linux_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_math.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_math.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_math.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_math.c 2015-10-12 10:56:18.069351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_math.c 2015-10-15 15:51:25.304651882 +0200
@@ -0,0 +1,32 @@
+/****************************************************************************
+*
@@ -168409,7 +168108,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_k
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_os.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_os.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_os.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_os.c 2015-10-12 10:56:18.072351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_os.c 2015-10-15 15:51:25.308651619 +0200
@@ -0,0 +1,9019 @@
+/****************************************************************************
+*
@@ -177432,7 +177131,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_k
+#endif
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_os.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_os.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_os.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_os.h 2015-10-12 10:56:18.072351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_os.h 2015-10-15 15:51:25.308651619 +0200
@@ -0,0 +1,83 @@
+/****************************************************************************
+*
@@ -177519,7 +177218,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_k
+#endif /* __gc_hal_kernel_os_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_sync.c linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_sync.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_sync.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_sync.c 2015-10-12 10:56:18.072351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_sync.c 2015-10-15 15:51:25.308651619 +0200
@@ -0,0 +1,174 @@
+/****************************************************************************
+*
@@ -177697,7 +177396,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_k
+#endif
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_sync.h linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_sync.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_sync.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_sync.h 2015-10-12 10:56:18.072351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_kernel_sync.h 2015-10-15 15:51:25.308651619 +0200
@@ -0,0 +1,71 @@
+/****************************************************************************
+*
@@ -177770,13 +177469,13 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/hal/os/linux/kernel/gc_hal_k
+ );
+
+#endif /* __gc_hal_kernel_sync_h_ */
-diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/Kbuild linux-3.14.54/drivers/mxc/gpu-viv/v5/Kbuild
---- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/Kbuild 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/Kbuild 2015-10-12 10:56:18.105351157 +0200
-@@ -0,0 +1,272 @@
+diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/Kbuild linux-3.14.54/drivers/mxc/gpu-viv/v4/Kbuild
+--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v4/Kbuild 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/mxc/gpu-viv/v4/Kbuild 2015-10-15 15:51:25.308651619 +0200
+@@ -0,0 +1,236 @@
+##############################################################################
+#
-+# Copyright (C) 2005 - 2014 by Vivante Corp.
++# Copyright (C) 2005 - 2013 by Vivante Corp.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
@@ -177799,56 +177498,27 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/Kbuild linux-3.14.54/drivers
+# Linux build file for kernel HAL driver.
+#
+
-+AQROOT := $(srctree)/drivers/mxc/gpu-viv/v5
++AQROOT := $(srctree)/drivers/mxc/gpu-viv/v4
++AQARCH := $(AQROOT)/arch/XAQ2
++AQVGARCH := $(AQROOT)/arch/GC350
+
+include $(AQROOT)/config
+
+KERNEL_DIR ?= $(TOOL_DIR)/kernel
+
+OS_KERNEL_DIR := hal/os/linux/kernel
-+ARCH_KERNEL_DIR := hal/kernel/arch
-+ARCH_VG_KERNEL_DIR := hal/kernel/archvg
++ARCH_KERNEL_DIR := arch/$(notdir $(AQARCH))/hal/kernel
++ARCH_VG_KERNEL_DIR := arch/$(notdir $(AQVGARCH))/hal/kernel
+HAL_KERNEL_DIR := hal/kernel
+
-+# Check and include platform config.
-+ifneq ($(PLATFORM),)
-+
-+# Get platform config path.
-+PLATFORM_CONFIG ?= $(AQROOT)/$(OS_KERNEL_DIR)/platform/$(PLATFORM).config
-+
-+# Check whether it exists.
-+PLATFORM_CONFIG := $(wildcard $(PLATFORM_CONFIG))
-+
-+# Include it if exists.
-+ifneq ($(PLATFORM_CONFIG),)
-+include $(PLATFORM_CONFIG)
-+endif
-+
-+endif
-+
-+MODULE_NAME ?= galcore
-+CUSTOMER_ALLOCATOR_OBJS ?=
-+ALLOCATOR_ARRAY_H_LOCATION ?= $(OS_KERNEL_DIR)/allocator/default/
-+
-+EXTRA_CFLAGS += -Werror
++# EXTRA_CFLAGS += -Werror
+
+OBJS := $(OS_KERNEL_DIR)/gc_hal_kernel_device.o \
++ $(OS_KERNEL_DIR)/gc_hal_kernel_driver.o \
+ $(OS_KERNEL_DIR)/gc_hal_kernel_linux.o \
+ $(OS_KERNEL_DIR)/gc_hal_kernel_math.o \
+ $(OS_KERNEL_DIR)/gc_hal_kernel_os.o \
-+ $(OS_KERNEL_DIR)/gc_hal_kernel_debugfs.o \
-+ $(OS_KERNEL_DIR)/gc_hal_kernel_allocator.o \
-+
-+ifneq ($(CONFIG_IOMMU_SUPPORT),)
-+OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_iommu.o
-+endif
-+
-+ifneq ($(PLATFORM),)
-+OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_probe.o
-+OBJS += $(OS_KERNEL_DIR)/platform/$(PLATFORM).o
-+else
-+OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_driver.o
-+endif
++ $(OS_KERNEL_DIR)/gc_hal_kernel_debugfs.o
+
+OBJS += $(HAL_KERNEL_DIR)/gc_hal_kernel.o \
+ $(HAL_KERNEL_DIR)/gc_hal_kernel_command.o \
@@ -177863,10 +177533,6 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/Kbuild linux-3.14.54/drivers
+OBJS += $(ARCH_KERNEL_DIR)/gc_hal_kernel_context.o \
+ $(ARCH_KERNEL_DIR)/gc_hal_kernel_hardware.o
+
-+ifeq ($(VIVANTE_ENABLE_3D), 1)
-+OBJS += $(ARCH_KERNEL_DIR)/gc_hal_kernel_recorder.o
-+endif
-+
+ifeq ($(VIVANTE_ENABLE_VG), 1)
+OBJS +=\
+ $(HAL_KERNEL_DIR)/gc_hal_kernel_vg.o\
@@ -177878,20 +177544,9 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/Kbuild linux-3.14.54/drivers
+endif
+
+ifneq ($(CONFIG_SYNC),)
-+EXTRA_CFLAGS += -Idrivers/staging/android
-+
+OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_sync.o
+endif
+
-+ifeq ($(SECURITY), 1)
-+OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_security_channel.o \
-+ $(HAL_KERNEL_DIR)/gc_hal_kernel_security.o
-+endif
-+
-+ifneq ($(CUSTOMER_ALLOCATOR_OBJS),)
-+OBJS += $(CUSTOMER_ALLOCATOR_OBJS)
-+endif
-+
+ifeq ($(KERNELRELEASE), )
+
+.PHONY: all clean install
@@ -177913,6 +177568,12 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/Kbuild linux-3.14.54/drivers
+
+EXTRA_CFLAGS += -DLINUX -DDRIVER
+
++ifeq ($(ENUM_WORKAROUND), 1)
++EXTRA_CFLAGS += -DENUM_WORKAROUND=1
++else
++EXTRA_CFLAGS += -DENUM_WORKAROUND=0
++endif
++
+ifeq ($(FLAREON),1)
+EXTRA_CFLAGS += -DFLAREON
+endif
@@ -177937,9 +177598,15 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/Kbuild linux-3.14.54/drivers
+EXTRA_CFLAGS += -DUSE_PLATFORM_DRIVER=0
+endif
+
++
+EXTRA_CFLAGS += -DVIVANTE_PROFILER=1
+EXTRA_CFLAGS += -DVIVANTE_PROFILER_CONTEXT=1
+
++
++ifeq ($(ANDROID), 1)
++EXTRA_CFLAGS += -DANDROID=1
++endif
++
+ifeq ($(ENABLE_GPU_CLOCK_BY_DRIVER), 1)
+EXTRA_CFLAGS += -DENABLE_GPU_CLOCK_BY_DRIVER=1
+else
@@ -177952,6 +177619,12 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/Kbuild linux-3.14.54/drivers
+EXTRA_CFLAGS += -DUSE_NEW_LINUX_SIGNAL=0
+endif
+
++ifeq ($(NO_USER_DIRECT_ACCESS_FROM_KERNEL), 1)
++EXTRA_CFLAGS += -DNO_USER_DIRECT_ACCESS_FROM_KERNEL=1
++else
++EXTRA_CFLAGS += -DNO_USER_DIRECT_ACCESS_FROM_KERNEL=0
++endif
++
+ifeq ($(FORCE_ALL_VIDEO_MEMORY_CACHED), 1)
+EXTRA_CFLAGS += -DgcdPAGED_MEMORY_CACHEABLE=1
+else
@@ -177976,28 +177649,26 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/Kbuild linux-3.14.54/drivers
+EXTRA_CFLAGS += -DgcdCACHE_FUNCTION_UNIMPLEMENTED=0
+endif
+
-+ifeq ($(CONFIG_SMP), y)
-+EXTRA_CFLAGS += -DgcdSMP=1
++ifeq ($(SUPPORT_SWAP_RECTANGLE), 1)
++EXTRA_CFLAGS += -DgcdSUPPORT_SWAP_RECTANGLE=1
+else
-+EXTRA_CFLAGS += -DgcdSMP=0
++EXTRA_CFLAGS += -DgcdSUPPORT_SWAP_RECTANGLE=0
+endif
+
-+ifeq ($(VIVANTE_ENABLE_3D),0)
-+EXTRA_CFLAGS += -DgcdENABLE_3D=0
++ifeq ($(VIVANTE_ENABLE_VG), 1)
++EXTRA_CFLAGS += -DgcdENABLE_VG=1
+else
-+EXTRA_CFLAGS += -DgcdENABLE_3D=1
++EXTRA_CFLAGS += -DgcdENABLE_VG=0
+endif
+
-+ifeq ($(VIVANTE_ENABLE_2D),0)
-+EXTRA_CFLAGS += -DgcdENABLE_2D=0
++ifeq ($(CONFIG_SMP), y)
++EXTRA_CFLAGS += -DgcdSMP=1
+else
-+EXTRA_CFLAGS += -DgcdENABLE_2D=1
++EXTRA_CFLAGS += -DgcdSMP=0
+endif
+
-+ifeq ($(VIVANTE_ENABLE_VG),0)
-+EXTRA_CFLAGS += -DgcdENABLE_VG=0
-+else
-+EXTRA_CFLAGS += -DgcdENABLE_VG=1
++ifeq ($(VIVANTE_NO_3D),1)
++EXTRA_CFLAGS += -DVIVANTE_NO_3D
+endif
+
+ifeq ($(ENABLE_OUTER_CACHE_PATCH), 1)
@@ -178020,25 +177691,17 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/Kbuild linux-3.14.54/drivers
+ endif
+endif
+
-+ifeq ($(gcdFPGA_BUILD), 1)
-+EXTRA_CFLAGS += -DgcdFPGA_BUILD=1
-+else
-+EXTRA_CFLAGS += -DgcdFPGA_BUILD=0
-+endif
-+
-+ifeq ($(SECURITY), 1)
-+EXTRA_CFLAGS += -DgcdSECURITY=1
++ifneq ($(CONFIG_SYNC),)
++EXTRA_CFLAGS += -DgcdANDROID_NATIVE_FENCE_SYNC=1
+endif
+
+EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel/inc
+EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel
-+EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel/arch
-+EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel/inc
++EXTRA_CFLAGS += -I$(AQARCH)/hal/kernel
+EXTRA_CFLAGS += -I$(AQROOT)/hal/os/linux/kernel
-+EXTRA_CFLAGS += -I$(AQROOT)/$(ALLOCATOR_ARRAY_H_LOCATION)
+
+ifeq ($(VIVANTE_ENABLE_VG), 1)
-+EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel/archvg
++EXTRA_CFLAGS += -I$(AQVGARCH)/hal/kernel
+endif
+
+obj-$(CONFIG_MXC_GPU_VIV) += galcore.o
@@ -178048,7 +177711,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/Kbuild linux-3.14.54/drivers
+endif
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/config linux-3.14.54/drivers/mxc/gpu-viv/v5/config
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/config 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/config 2015-10-12 10:56:18.072351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/config 2015-10-15 15:51:25.308651619 +0200
@@ -0,0 +1,36 @@
+##############################################################################
+#
@@ -178088,7 +177751,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/config linux-3.14.54/drivers
+PLATFORM ?= freescale/gc_hal_kernel_platform_imx6q14
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_context.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_context.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_context.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_context.c 2015-10-12 10:56:18.074351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_context.c 2015-10-15 15:51:25.312651356 +0200
@@ -0,0 +1,2317 @@
+/****************************************************************************
+*
@@ -180409,7 +180072,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kerne
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_context.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_context.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_context.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_context.h 2015-10-12 10:56:18.074351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_context.h 2015-10-15 15:51:25.312651356 +0200
@@ -0,0 +1,183 @@
+/****************************************************************************
+*
@@ -180596,7 +180259,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kerne
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_hardware.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_hardware.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_hardware.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_hardware.c 2015-10-12 10:56:18.078351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_hardware.c 2015-10-15 15:51:25.352648723 +0200
@@ -0,0 +1,8036 @@
+/****************************************************************************
+*
@@ -188636,7 +188299,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kerne
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_hardware.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_hardware.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_hardware.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_hardware.h 2015-10-12 10:56:18.078351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_hardware.h 2015-10-15 15:51:25.356648460 +0200
@@ -0,0 +1,160 @@
+/****************************************************************************
+*
@@ -188800,7 +188463,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kerne
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_recorder.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_recorder.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_recorder.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_recorder.c 2015-10-12 10:56:18.078351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kernel_recorder.c 2015-10-15 15:51:25.356648460 +0200
@@ -0,0 +1,679 @@
+/****************************************************************************
+*
@@ -189483,7 +189146,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/arch/gc_hal_kerne
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.c 2015-10-12 10:56:18.079351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.c 2015-10-15 15:51:25.360648198 +0200
@@ -0,0 +1,932 @@
+/****************************************************************************
+*
@@ -190419,7 +190082,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_ker
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.h 2015-10-12 10:56:18.079351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_command_vg.h 2015-10-15 15:51:25.360648198 +0200
@@ -0,0 +1,319 @@
+/****************************************************************************
+*
@@ -190742,7 +190405,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_ker
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_vg.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_vg.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_vg.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_vg.c 2015-10-12 10:56:18.080351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_vg.c 2015-10-15 15:51:25.364647934 +0200
@@ -0,0 +1,2119 @@
+/****************************************************************************
+*
@@ -192865,7 +192528,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_ker
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_vg.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_vg.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_vg.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_vg.h 2015-10-12 10:56:18.080351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_kernel_hardware_vg.h 2015-10-15 15:51:25.364647934 +0200
@@ -0,0 +1,74 @@
+/****************************************************************************
+*
@@ -192943,7 +192606,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/archvg/gc_hal_ker
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel.c 2015-10-12 10:56:18.081351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel.c 2015-10-15 15:51:25.368647670 +0200
@@ -0,0 +1,5040 @@
+/****************************************************************************
+*
@@ -197985,1502 +197648,9 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel.c l
+***** Test Code ****************************************************************
+*******************************************************************************/
+
-diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel.h
---- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel.h 2015-10-12 10:56:18.087351158 +0200
-@@ -0,0 +1,1489 @@
-+/****************************************************************************
-+*
-+* Copyright (C) 2005 - 2014 by Vivante Corp.
-+*
-+* This program is free software; you can redistribute it and/or modify
-+* it under the terms of the GNU General Public License as published by
-+* the Free Software Foundation; either version 2 of the license, or
-+* (at your option) any later version.
-+*
-+* This program is distributed in the hope that it will be useful,
-+* but WITHOUT ANY WARRANTY; without even the implied warranty of
-+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+* GNU General Public License for more details.
-+*
-+* You should have received a copy of the GNU General Public License
-+* along with this program; if not write to the Free Software
-+* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-+*
-+*****************************************************************************/
-+
-+
-+#ifndef __gc_hal_kernel_h_
-+#define __gc_hal_kernel_h_
-+
-+#include "gc_hal.h"
-+#include "gc_hal_kernel_hardware.h"
-+#include "gc_hal_driver.h"
-+
-+#if gcdENABLE_VG
-+#include "gc_hal_kernel_vg.h"
-+#endif
-+
-+#if gcdSECURITY
-+#include "gc_hal_security_interface.h"
-+#endif
-+
-+#ifdef __cplusplus
-+extern "C" {
-+#endif
-+
-+
-+/*******************************************************************************
-+***** New MMU Defination *******************************************************/
-+#define gcdMMU_MTLB_SHIFT 22
-+#define gcdMMU_STLB_4K_SHIFT 12
-+#define gcdMMU_STLB_64K_SHIFT 16
-+
-+#define gcdMMU_MTLB_BITS (32 - gcdMMU_MTLB_SHIFT)
-+#define gcdMMU_PAGE_4K_BITS gcdMMU_STLB_4K_SHIFT
-+#define gcdMMU_STLB_4K_BITS (32 - gcdMMU_MTLB_BITS - gcdMMU_PAGE_4K_BITS)
-+#define gcdMMU_PAGE_64K_BITS gcdMMU_STLB_64K_SHIFT
-+#define gcdMMU_STLB_64K_BITS (32 - gcdMMU_MTLB_BITS - gcdMMU_PAGE_64K_BITS)
-+
-+#define gcdMMU_MTLB_ENTRY_NUM (1 << gcdMMU_MTLB_BITS)
-+#define gcdMMU_MTLB_SIZE (gcdMMU_MTLB_ENTRY_NUM << 2)
-+#define gcdMMU_STLB_4K_ENTRY_NUM (1 << gcdMMU_STLB_4K_BITS)
-+#define gcdMMU_STLB_4K_SIZE (gcdMMU_STLB_4K_ENTRY_NUM << 2)
-+#define gcdMMU_PAGE_4K_SIZE (1 << gcdMMU_STLB_4K_SHIFT)
-+#define gcdMMU_STLB_64K_ENTRY_NUM (1 << gcdMMU_STLB_64K_BITS)
-+#define gcdMMU_STLB_64K_SIZE (gcdMMU_STLB_64K_ENTRY_NUM << 2)
-+#define gcdMMU_PAGE_64K_SIZE (1 << gcdMMU_STLB_64K_SHIFT)
-+
-+#define gcdMMU_MTLB_MASK (~((1U << gcdMMU_MTLB_SHIFT)-1))
-+#define gcdMMU_STLB_4K_MASK ((~0U << gcdMMU_STLB_4K_SHIFT) ^ gcdMMU_MTLB_MASK)
-+#define gcdMMU_PAGE_4K_MASK (gcdMMU_PAGE_4K_SIZE - 1)
-+#define gcdMMU_STLB_64K_MASK ((~((1U << gcdMMU_STLB_64K_SHIFT)-1)) ^ gcdMMU_MTLB_MASK)
-+#define gcdMMU_PAGE_64K_MASK (gcdMMU_PAGE_64K_SIZE - 1)
-+
-+/* Page offset definitions. */
-+#define gcdMMU_OFFSET_4K_BITS (32 - gcdMMU_MTLB_BITS - gcdMMU_STLB_4K_BITS)
-+#define gcdMMU_OFFSET_4K_MASK ((1U << gcdMMU_OFFSET_4K_BITS) - 1)
-+#define gcdMMU_OFFSET_16K_BITS (32 - gcdMMU_MTLB_BITS - gcdMMU_STLB_16K_BITS)
-+#define gcdMMU_OFFSET_16K_MASK ((1U << gcdMMU_OFFSET_16K_BITS) - 1)
-+
-+#define gcdMMU_MTLB_PRESENT 0x00000001
-+#define gcdMMU_MTLB_EXCEPTION 0x00000002
-+#define gcdMMU_MTLB_4K_PAGE 0x00000000
-+
-+#define gcdMMU_STLB_PRESENT 0x00000001
-+#define gcdMMU_STLB_EXCEPTION 0x00000002
-+#define gcdMMU_STLB_4K_PAGE 0x00000000
-+
-+/*******************************************************************************
-+***** Stuck Dump Level ********************************************************/
-+
-+#define gcdSTUCK_DUMP_MINIMAL 1
-+#define gcdSTUCK_DUMP_MIDDLE 2
-+#define gcdSTUCK_DUMP_MAXIMAL 3
-+
-+/*******************************************************************************
-+***** Process Secure Cache ****************************************************/
-+
-+#define gcdSECURE_CACHE_LRU 1
-+#define gcdSECURE_CACHE_LINEAR 2
-+#define gcdSECURE_CACHE_HASH 3
-+#define gcdSECURE_CACHE_TABLE 4
-+
-+#define gcvPAGE_TABLE_DIRTY_BIT_OTHER (1 << 0)
-+#define gcvPAGE_TABLE_DIRTY_BIT_FE (1 << 1)
-+
-+typedef struct _gcskLOGICAL_CACHE * gcskLOGICAL_CACHE_PTR;
-+typedef struct _gcskLOGICAL_CACHE gcskLOGICAL_CACHE;
-+struct _gcskLOGICAL_CACHE
-+{
-+ /* Logical address. */
-+ gctPOINTER logical;
-+
-+ /* DMAable address. */
-+ gctUINT32 dma;
-+
-+#if gcdSECURE_CACHE_METHOD == gcdSECURE_CACHE_HASH
-+ /* Pointer to the previous and next hash tables. */
-+ gcskLOGICAL_CACHE_PTR nextHash;
-+ gcskLOGICAL_CACHE_PTR prevHash;
-+#endif
-+
-+#if gcdSECURE_CACHE_METHOD != gcdSECURE_CACHE_TABLE
-+ /* Pointer to the previous and next slot. */
-+ gcskLOGICAL_CACHE_PTR next;
-+ gcskLOGICAL_CACHE_PTR prev;
-+#endif
-+
-+#if gcdSECURE_CACHE_METHOD == gcdSECURE_CACHE_LINEAR
-+ /* Time stamp. */
-+ gctUINT64 stamp;
-+#endif
-+};
-+
-+typedef struct _gcskSECURE_CACHE * gcskSECURE_CACHE_PTR;
-+typedef struct _gcskSECURE_CACHE
-+{
-+ /* Cache memory. */
-+ gcskLOGICAL_CACHE cache[1 + gcdSECURE_CACHE_SLOTS];
-+
-+ /* Last known index for LINEAR mode. */
-+ gcskLOGICAL_CACHE_PTR cacheIndex;
-+
-+ /* Current free slot for LINEAR mode. */
-+ gctUINT32 cacheFree;
-+
-+ /* Time stamp for LINEAR mode. */
-+ gctUINT64 cacheStamp;
-+
-+#if gcdSECURE_CACHE_METHOD == gcdSECURE_CACHE_HASH
-+ /* Hash table for HASH mode. */
-+ gcskLOGICAL_CACHE hash[256];
-+#endif
-+}
-+gcskSECURE_CACHE;
-+
-+/*******************************************************************************
-+***** Process Database Management *********************************************/
-+
-+typedef enum _gceDATABASE_TYPE
-+{
-+ gcvDB_VIDEO_MEMORY = 1, /* Video memory created. */
-+ gcvDB_COMMAND_BUFFER, /* Command Buffer. */
-+ gcvDB_NON_PAGED, /* Non paged memory. */
-+ gcvDB_CONTIGUOUS, /* Contiguous memory. */
-+ gcvDB_SIGNAL, /* Signal. */
-+ gcvDB_VIDEO_MEMORY_LOCKED, /* Video memory locked. */
-+ gcvDB_CONTEXT, /* Context */
-+ gcvDB_IDLE, /* GPU idle. */
-+ gcvDB_MAP_MEMORY, /* Map memory */
-+ gcvDB_MAP_USER_MEMORY, /* Map user memory */
-+ gcvDB_SYNC_POINT, /* Sync point. */
-+ gcvDB_SHBUF, /* Shared buffer. */
-+}
-+gceDATABASE_TYPE;
-+
-+#define gcdDATABASE_TYPE_MASK 0x000000FF
-+#define gcdDB_VIDEO_MEMORY_TYPE_MASK 0x0000FF00
-+#define gcdDB_VIDEO_MEMORY_TYPE_SHIFT 8
-+
-+#define gcdDB_VIDEO_MEMORY_POOL_MASK 0x00FF0000
-+#define gcdDB_VIDEO_MEMORY_POOL_SHIFT 16
-+
-+typedef struct _gcsDATABASE_RECORD * gcsDATABASE_RECORD_PTR;
-+typedef struct _gcsDATABASE_RECORD
-+{
-+ /* Pointer to kernel. */
-+ gckKERNEL kernel;
-+
-+ /* Pointer to next database record. */
-+ gcsDATABASE_RECORD_PTR next;
-+
-+ /* Type of record. */
-+ gceDATABASE_TYPE type;
-+
-+ /* Data for record. */
-+ gctPOINTER data;
-+ gctPHYS_ADDR physical;
-+ gctSIZE_T bytes;
-+}
-+gcsDATABASE_RECORD;
-+
-+typedef struct _gcsDATABASE * gcsDATABASE_PTR;
-+typedef struct _gcsDATABASE
-+{
-+ /* Pointer to next entry is hash list. */
-+ gcsDATABASE_PTR next;
-+ gctSIZE_T slot;
-+
-+ /* Process ID. */
-+ gctUINT32 processID;
-+
-+ /* Sizes to query. */
-+ gcsDATABASE_COUNTERS vidMem;
-+ gcsDATABASE_COUNTERS nonPaged;
-+ gcsDATABASE_COUNTERS contiguous;
-+ gcsDATABASE_COUNTERS mapUserMemory;
-+ gcsDATABASE_COUNTERS mapMemory;
-+ gcsDATABASE_COUNTERS virtualCommandBuffer;
-+
-+ gcsDATABASE_COUNTERS vidMemType[gcvSURF_NUM_TYPES];
-+ /* Counter for each video memory pool. */
-+ gcsDATABASE_COUNTERS vidMemPool[gcvPOOL_NUMBER_OF_POOLS];
-+ gctPOINTER counterMutex;
-+
-+ /* Idle time management. */
-+ gctUINT64 lastIdle;
-+ gctUINT64 idle;
-+
-+ /* Pointer to database. */
-+ gcsDATABASE_RECORD_PTR list[48];
-+
-+#if gcdSECURE_USER
-+ /* Secure cache. */
-+ gcskSECURE_CACHE cache;
-+#endif
-+
-+ gctPOINTER handleDatabase;
-+ gctPOINTER handleDatabaseMutex;
-+
-+#if gcdPROCESS_ADDRESS_SPACE
-+ gckMMU mmu;
-+#endif
-+}
-+gcsDATABASE;
-+
-+typedef struct _gcsRECORDER * gckRECORDER;
-+
-+typedef struct _gcsFDPRIVATE * gcsFDPRIVATE_PTR;
-+typedef struct _gcsFDPRIVATE
-+{
-+ gctINT (* release) (gcsFDPRIVATE_PTR Private);
-+}
-+gcsFDPRIVATE;
-+
-+/* Create a process database that will contain all its allocations. */
-+gceSTATUS
-+gckKERNEL_CreateProcessDB(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID
-+ );
-+
-+/* Add a record to the process database. */
-+gceSTATUS
-+gckKERNEL_AddProcessDB(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ IN gceDATABASE_TYPE Type,
-+ IN gctPOINTER Pointer,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Size
-+ );
-+
-+/* Remove a record to the process database. */
-+gceSTATUS
-+gckKERNEL_RemoveProcessDB(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ IN gceDATABASE_TYPE Type,
-+ IN gctPOINTER Pointer
-+ );
-+
-+/* Destroy the process database. */
-+gceSTATUS
-+gckKERNEL_DestroyProcessDB(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID
-+ );
-+
-+/* Find a record to the process database. */
-+gceSTATUS
-+gckKERNEL_FindProcessDB(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ IN gctUINT32 ThreadID,
-+ IN gceDATABASE_TYPE Type,
-+ IN gctPOINTER Pointer,
-+ OUT gcsDATABASE_RECORD_PTR Record
-+ );
-+
-+/* Query the process database. */
-+gceSTATUS
-+gckKERNEL_QueryProcessDB(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ IN gctBOOL LastProcessID,
-+ IN gceDATABASE_TYPE Type,
-+ OUT gcuDATABASE_INFO * Info
-+ );
-+
-+/* Dump the process database. */
-+gceSTATUS
-+gckKERNEL_DumpProcessDB(
-+ IN gckKERNEL Kernel
-+ );
-+
-+/* Dump the video memory usage for process specified. */
-+gceSTATUS
-+gckKERNEL_DumpVidMemUsage(
-+ IN gckKERNEL Kernel,
-+ IN gctINT32 ProcessID
-+ );
-+
-+gceSTATUS
-+gckKERNEL_FindDatabase(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ IN gctBOOL LastProcessID,
-+ OUT gcsDATABASE_PTR * Database
-+ );
-+
-+gceSTATUS
-+gckKERNEL_FindHandleDatbase(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ OUT gctPOINTER * HandleDatabase,
-+ OUT gctPOINTER * HandleDatabaseMutex
-+ );
-+
-+gceSTATUS
-+gckKERNEL_GetProcessMMU(
-+ IN gckKERNEL Kernel,
-+ OUT gckMMU * Mmu
-+ );
-+
-+gceSTATUS
-+gckKERNEL_SetRecovery(
-+ IN gckKERNEL Kernel,
-+ IN gctBOOL Recovery,
-+ IN gctUINT32 StuckDump
-+ );
-+
-+gceSTATUS
-+gckMMU_FlatMapping(
-+ IN gckMMU Mmu,
-+ IN gctUINT32 Physical
-+ );
-+
-+gceSTATUS
-+gckMMU_GetPageEntry(
-+ IN gckMMU Mmu,
-+ IN gctUINT32 Address,
-+ IN gctUINT32_PTR *PageTable
-+ );
-+
-+gceSTATUS
-+gckMMU_FreePagesEx(
-+ IN gckMMU Mmu,
-+ IN gctUINT32 Address,
-+ IN gctSIZE_T PageCount
-+ );
-+
-+gceSTATUS
-+gckKERNEL_CreateIntegerDatabase(
-+ IN gckKERNEL Kernel,
-+ OUT gctPOINTER * Database
-+ );
-+
-+gceSTATUS
-+gckKERNEL_DestroyIntegerDatabase(
-+ IN gckKERNEL Kernel,
-+ IN gctPOINTER Database
-+ );
-+
-+gceSTATUS
-+gckKERNEL_AllocateIntegerId(
-+ IN gctPOINTER Database,
-+ IN gctPOINTER Pointer,
-+ OUT gctUINT32 * Id
-+ );
-+
-+gceSTATUS
-+gckKERNEL_FreeIntegerId(
-+ IN gctPOINTER Database,
-+ IN gctUINT32 Id
-+ );
-+
-+gceSTATUS
-+gckKERNEL_QueryIntegerId(
-+ IN gctPOINTER Database,
-+ IN gctUINT32 Id,
-+ OUT gctPOINTER * Pointer
-+ );
-+
-+/* Pointer rename */
-+gctUINT32
-+gckKERNEL_AllocateNameFromPointer(
-+ IN gckKERNEL Kernel,
-+ IN gctPOINTER Pointer
-+ );
-+
-+gctPOINTER
-+gckKERNEL_QueryPointerFromName(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 Name
-+ );
-+
-+gceSTATUS
-+gckKERNEL_DeleteName(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 Name
-+ );
-+
-+#if gcdSECURE_USER
-+/* Get secure cache from the process database. */
-+gceSTATUS
-+gckKERNEL_GetProcessDBCache(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ OUT gcskSECURE_CACHE_PTR * Cache
-+ );
-+#endif
-+
-+/*******************************************************************************
-+********* Timer Management ****************************************************/
-+typedef struct _gcsTIMER * gcsTIMER_PTR;
-+typedef struct _gcsTIMER
-+{
-+ /* Start and Stop time holders. */
-+ gctUINT64 startTime;
-+ gctUINT64 stopTime;
-+}
-+gcsTIMER;
-+
-+/******************************************************************************\
-+********************************** Structures **********************************
-+\******************************************************************************/
-+
-+/* gckDB object. */
-+struct _gckDB
-+{
-+ /* Database management. */
-+ gcsDATABASE_PTR db[16];
-+ gctPOINTER dbMutex;
-+ gcsDATABASE_PTR freeDatabase;
-+ gcsDATABASE_RECORD_PTR freeRecord;
-+ gcsDATABASE_PTR lastDatabase;
-+ gctUINT32 lastProcessID;
-+ gctUINT64 lastIdle;
-+ gctUINT64 idleTime;
-+ gctUINT64 lastSlowdown;
-+ gctUINT64 lastSlowdownIdle;
-+ gctPOINTER nameDatabase;
-+ gctPOINTER nameDatabaseMutex;
-+
-+ gctPOINTER pointerDatabase;
-+ gctPOINTER pointerDatabaseMutex;
-+};
-+
-+typedef struct _gckVIRTUAL_COMMAND_BUFFER * gckVIRTUAL_COMMAND_BUFFER_PTR;
-+typedef struct _gckVIRTUAL_COMMAND_BUFFER
-+{
-+ gctPHYS_ADDR physical;
-+ gctPOINTER userLogical;
-+ gctPOINTER kernelLogical;
-+ gctSIZE_T bytes;
-+ gctSIZE_T pageCount;
-+ gctPOINTER pageTable;
-+ gctUINT32 gpuAddress;
-+ gctUINT pid;
-+ gckVIRTUAL_COMMAND_BUFFER_PTR next;
-+ gckVIRTUAL_COMMAND_BUFFER_PTR prev;
-+ gckKERNEL kernel;
-+#if gcdPROCESS_ADDRESS_SPACE
-+ gckMMU mmu;
-+#endif
-+}
-+gckVIRTUAL_COMMAND_BUFFER;
-+
-+/* gckKERNEL object. */
-+struct _gckKERNEL
-+{
-+ /* Object. */
-+ gcsOBJECT object;
-+
-+ /* Pointer to gckOS object. */
-+ gckOS os;
-+
-+ /* Core */
-+ gceCORE core;
-+
-+ /* Pointer to gckHARDWARE object. */
-+ gckHARDWARE hardware;
-+
-+ /* Pointer to gckCOMMAND object. */
-+ gckCOMMAND command;
-+
-+ /* Pointer to gckEVENT object. */
-+ gckEVENT eventObj;
-+
-+ /* Pointer to context. */
-+ gctPOINTER context;
-+
-+ /* Pointer to gckMMU object. */
-+ gckMMU mmu;
-+
-+ /* Arom holding number of clients. */
-+ gctPOINTER atomClients;
-+
-+#if VIVANTE_PROFILER
-+ /* Enable profiling */
-+ gctBOOL profileEnable;
-+ /* Clear profile register or not*/
-+ gctBOOL profileCleanRegister;
-+#endif
-+
-+#ifdef QNX_SINGLE_THREADED_DEBUGGING
-+ gctPOINTER debugMutex;
-+#endif
-+
-+ /* Database management. */
-+ gckDB db;
-+ gctBOOL dbCreated;
-+
-+ gctUINT64 resetTimeStamp;
-+
-+ /* Pointer to gckEVENT object. */
-+ gcsTIMER timers[8];
-+ gctUINT32 timeOut;
-+
-+#if gcdENABLE_VG
-+ gckVGKERNEL vg;
-+#endif
-+
-+ /* Virtual command buffer list. */
-+ gckVIRTUAL_COMMAND_BUFFER_PTR virtualBufferHead;
-+ gckVIRTUAL_COMMAND_BUFFER_PTR virtualBufferTail;
-+ gctPOINTER virtualBufferLock;
-+
-+ /* Enable virtual command buffer. */
-+ gctBOOL virtualCommandBuffer;
-+
-+#if gcdDVFS
-+ gckDVFS dvfs;
-+#endif
-+
-+#if gcdANDROID_NATIVE_FENCE_SYNC
-+ gctHANDLE timeline;
-+#endif
-+
-+ /* Enable recovery. */
-+ gctBOOL recovery;
-+
-+ /* Level of dump information after stuck. */
-+ gctUINT stuckDump;
-+
-+#if gcdSECURITY
-+ gctUINT32 securityChannel;
-+#endif
-+
-+ /* Timer to monitor GPU stuck. */
-+ gctPOINTER monitorTimer;
-+
-+ /* Flag to quit monitor timer. */
-+ gctBOOL monitorTimerStop;
-+
-+ /* Monitor states. */
-+ gctBOOL monitoring;
-+ gctUINT32 lastCommitStamp;
-+ gctUINT32 timer;
-+ gctUINT32 restoreAddress;
-+ gctUINT32 restoreMask;
-+};
-+
-+struct _FrequencyHistory
-+{
-+ gctUINT32 frequency;
-+ gctUINT32 count;
-+};
-+
-+/* gckDVFS object. */
-+struct _gckDVFS
-+{
-+ gckOS os;
-+ gckHARDWARE hardware;
-+ gctPOINTER timer;
-+ gctUINT32 pollingTime;
-+ gctBOOL stop;
-+ gctUINT32 totalConfig;
-+ gctUINT32 loads[8];
-+ gctUINT8 currentScale;
-+ struct _FrequencyHistory frequencyHistory[16];
-+};
-+
-+/* gckCOMMAND object. */
-+struct _gckCOMMAND
-+{
-+ /* Object. */
-+ gcsOBJECT object;
-+
-+ /* Pointer to required object. */
-+ gckKERNEL kernel;
-+ gckOS os;
-+
-+ /* Number of bytes per page. */
-+ gctUINT32 pageSize;
-+
-+ /* Current pipe select. */
-+ gcePIPE_SELECT pipeSelect;
-+
-+ /* Command queue running flag. */
-+ gctBOOL running;
-+
-+ /* Idle flag and commit stamp. */
-+ gctBOOL idle;
-+ gctUINT64 commitStamp;
-+
-+ /* Command queue mutex. */
-+ gctPOINTER mutexQueue;
-+
-+ /* Context switching mutex. */
-+ gctPOINTER mutexContext;
-+
-+#if VIVANTE_PROFILER_CONTEXT
-+ /* Context sequence mutex. */
-+ gctPOINTER mutexContextSeq;
-+#endif
-+
-+ /* Command queue power semaphore. */
-+ gctPOINTER powerSemaphore;
-+
-+ /* Current command queue. */
-+ struct _gcskCOMMAND_QUEUE
-+ {
-+ gctSIGNAL signal;
-+ gctPHYS_ADDR physical;
-+ gctPOINTER logical;
-+ gctUINT32 address;
-+ }
-+ queues[gcdCOMMAND_QUEUES];
-+
-+ gctPHYS_ADDR physical;
-+ gctPOINTER logical;
-+ gctUINT32 address;
-+ gctUINT32 offset;
-+ gctINT index;
-+#if gcmIS_DEBUG(gcdDEBUG_TRACE)
-+ gctUINT wrapCount;
-+#endif
-+
-+ /* The command queue is new. */
-+ gctBOOL newQueue;
-+
-+ /* Context management. */
-+ gckCONTEXT currContext;
-+
-+ /* Pointer to last WAIT command. */
-+ gctPHYS_ADDR waitPhysical;
-+ gctPOINTER waitLogical;
-+ gctUINT32 waitSize;
-+
-+ /* Command buffer alignment. */
-+ gctUINT32 alignment;
-+ gctUINT32 reservedHead;
-+ gctUINT32 reservedTail;
-+
-+ /* Commit counter. */
-+ gctPOINTER atomCommit;
-+
-+ /* Kernel process ID. */
-+ gctUINT32 kernelProcessID;
-+
-+ /* End Event signal. */
-+ gctSIGNAL endEventSignal;
-+
-+#if gcdSECURE_USER
-+ /* Hint array copy buffer. */
-+ gctBOOL hintArrayAllocated;
-+ gctUINT hintArraySize;
-+ gctUINT32_PTR hintArray;
-+#endif
-+
-+#if gcdPROCESS_ADDRESS_SPACE
-+ gckMMU currentMmu;
-+#endif
-+ struct _gckENTRYQUEUE queue;
-+};
-+
-+typedef struct _gcsEVENT * gcsEVENT_PTR;
-+
-+/* Structure holding one event to be processed. */
-+typedef struct _gcsEVENT
-+{
-+ /* Pointer to next event in queue. */
-+ gcsEVENT_PTR next;
-+
-+ /* Event information. */
-+ gcsHAL_INTERFACE info;
-+
-+ /* Process ID owning the event. */
-+ gctUINT32 processID;
-+
-+#ifdef __QNXNTO__
-+ /* Kernel. */
-+ gckKERNEL kernel;
-+#endif
-+
-+ gctBOOL fromKernel;
-+}
-+gcsEVENT;
-+
-+/* Structure holding a list of events to be processed by an interrupt. */
-+typedef struct _gcsEVENT_QUEUE * gcsEVENT_QUEUE_PTR;
-+typedef struct _gcsEVENT_QUEUE
-+{
-+ /* Time stamp. */
-+ gctUINT64 stamp;
-+
-+ /* Source of the event. */
-+ gceKERNEL_WHERE source;
-+
-+#if gcdMULTI_GPU
-+ /* Which chip(s) of the event */
-+ gceCORE_3D_MASK chipEnable;
-+#endif
-+
-+ /* Pointer to head of event queue. */
-+ gcsEVENT_PTR head;
-+
-+ /* Pointer to tail of event queue. */
-+ gcsEVENT_PTR tail;
-+
-+ /* Next list of events. */
-+ gcsEVENT_QUEUE_PTR next;
-+}
-+gcsEVENT_QUEUE;
-+
-+/*
-+ gcdREPO_LIST_COUNT defines the maximum number of event queues with different
-+ hardware module sources that may coexist at the same time. Only two sources
-+ are supported - gcvKERNEL_COMMAND and gcvKERNEL_PIXEL. gcvKERNEL_COMMAND
-+ source is used only for managing the kernel command queue and is only issued
-+ when the current command queue gets full. Since we commit event queues every
-+ time we commit command buffers, in the worst case we can have up to three
-+ pending event queues:
-+ - gcvKERNEL_PIXEL
-+ - gcvKERNEL_COMMAND (queue overflow)
-+ - gcvKERNEL_PIXEL
-+*/
-+#define gcdREPO_LIST_COUNT 3
-+
-+/* gckEVENT object. */
-+struct _gckEVENT
-+{
-+ /* The object. */
-+ gcsOBJECT object;
-+
-+ /* Pointer to required objects. */
-+ gckOS os;
-+ gckKERNEL kernel;
-+
-+ /* Time stamp. */
-+ gctUINT64 stamp;
-+ gctUINT32 lastCommitStamp;
-+
-+ /* Queue mutex. */
-+ gctPOINTER eventQueueMutex;
-+
-+ /* Array of event queues. */
-+ gcsEVENT_QUEUE queues[29];
-+ gctUINT8 lastID;
-+ gctPOINTER freeAtom;
-+
-+ /* Pending events. */
-+#if gcdSMP
-+#if gcdMULTI_GPU
-+ gctPOINTER pending3D[gcdMULTI_GPU];
-+ gctPOINTER pending3DMask[gcdMULTI_GPU];
-+ gctPOINTER pendingMask;
-+#endif
-+ gctPOINTER pending;
-+#else
-+#if gcdMULTI_GPU
-+ volatile gctUINT pending3D[gcdMULTI_GPU];
-+ volatile gctUINT pending3DMask[gcdMULTI_GPU];
-+ volatile gctUINT pendingMask;
-+#endif
-+ volatile gctUINT pending;
-+#endif
-+#if gcdMULTI_GPU
-+ gctUINT32 busy;
-+#endif
-+
-+ /* List of free event structures and its mutex. */
-+ gcsEVENT_PTR freeEventList;
-+ gctSIZE_T freeEventCount;
-+ gctPOINTER freeEventMutex;
-+
-+ /* Event queues. */
-+ gcsEVENT_QUEUE_PTR queueHead;
-+ gcsEVENT_QUEUE_PTR queueTail;
-+ gcsEVENT_QUEUE_PTR freeList;
-+ gcsEVENT_QUEUE repoList[gcdREPO_LIST_COUNT];
-+ gctPOINTER eventListMutex;
-+
-+ gctPOINTER submitTimer;
-+
-+#if gcdINTERRUPT_STATISTIC
-+ gctPOINTER interruptCount;
-+#endif
-+
-+#if gcdRECORD_COMMAND
-+ gckRECORDER recorder;
-+#endif
-+};
-+
-+/* Free all events belonging to a process. */
-+gceSTATUS
-+gckEVENT_FreeProcess(
-+ IN gckEVENT Event,
-+ IN gctUINT32 ProcessID
-+ );
-+
-+gceSTATUS
-+gckEVENT_Stop(
-+ IN gckEVENT Event,
-+ IN gctUINT32 ProcessID,
-+ IN gctPHYS_ADDR Handle,
-+ IN gctPOINTER Logical,
-+ IN gctSIGNAL Signal,
-+ IN OUT gctUINT32 * waitSize
-+ );
-+
-+typedef struct _gcsLOCK_INFO * gcsLOCK_INFO_PTR;
-+typedef struct _gcsLOCK_INFO
-+{
-+ gctUINT32 GPUAddresses[gcdMAX_GPU_COUNT];
-+ gctPOINTER pageTables[gcdMAX_GPU_COUNT];
-+ gctUINT32 lockeds[gcdMAX_GPU_COUNT];
-+ gckKERNEL lockKernels[gcdMAX_GPU_COUNT];
-+ gckMMU lockMmus[gcdMAX_GPU_COUNT];
-+}
-+gcsLOCK_INFO;
-+
-+typedef struct _gcsGPU_MAP * gcsGPU_MAP_PTR;
-+typedef struct _gcsGPU_MAP
-+{
-+ gctINT pid;
-+ gcsLOCK_INFO lockInfo;
-+ gcsGPU_MAP_PTR prev;
-+ gcsGPU_MAP_PTR next;
-+}
-+gcsGPU_MAP;
-+
-+/* gcuVIDMEM_NODE structure. */
-+typedef union _gcuVIDMEM_NODE
-+{
-+ /* Allocated from gckVIDMEM. */
-+ struct _gcsVIDMEM_NODE_VIDMEM
-+ {
-+ /* Owner of this node. */
-+ gckVIDMEM memory;
-+
-+ /* Dual-linked list of nodes. */
-+ gcuVIDMEM_NODE_PTR next;
-+ gcuVIDMEM_NODE_PTR prev;
-+
-+ /* Dual linked list of free nodes. */
-+ gcuVIDMEM_NODE_PTR nextFree;
-+ gcuVIDMEM_NODE_PTR prevFree;
-+
-+ /* Information for this node. */
-+ gctSIZE_T offset;
-+ gctSIZE_T bytes;
-+ gctUINT32 alignment;
-+
-+#ifdef __QNXNTO__
-+ /* Client virtual address. */
-+ gctPOINTER logical;
-+#endif
-+
-+ /* Locked counter. */
-+ gctINT32 locked;
-+
-+ /* Memory pool. */
-+ gcePOOL pool;
-+ gctUINT32 physical;
-+
-+ /* Process ID owning this memory. */
-+ gctUINT32 processID;
-+
-+#if gcdENABLE_VG
-+ gctPOINTER kernelVirtual;
-+#endif
-+ }
-+ VidMem;
-+
-+ /* Allocated from gckOS. */
-+ struct _gcsVIDMEM_NODE_VIRTUAL
-+ {
-+ /* Pointer to gckKERNEL object. */
-+ gckKERNEL kernel;
-+
-+ /* Information for this node. */
-+ /* Contiguously allocated? */
-+ gctBOOL contiguous;
-+ /* mdl record pointer... a kmalloc address. Process agnostic. */
-+ gctPHYS_ADDR physical;
-+ gctSIZE_T bytes;
-+ /* do_mmap_pgoff address... mapped per-process. */
-+ gctPOINTER logical;
-+
-+#if gcdENABLE_VG
-+ /* Physical address of this node, only meaningful when it is contiguous. */
-+ gctUINT32 physicalAddress;
-+
-+ /* Kernel logical of this node. */
-+ gctPOINTER kernelVirtual;
-+#endif
-+
-+ /* Customer private handle */
-+ gctUINT32 gid;
-+
-+ /* Page table information. */
-+ /* Used only when node is not contiguous */
-+ gctSIZE_T pageCount;
-+
-+ /* Used only when node is not contiguous */
-+ gctPOINTER pageTables[gcdMAX_GPU_COUNT];
-+ /* Pointer to gckKERNEL object who lock this. */
-+ gckKERNEL lockKernels[gcdMAX_GPU_COUNT];
-+ /* Actual physical address */
-+ gctUINT32 addresses[gcdMAX_GPU_COUNT];
-+
-+ /* Locked counter. */
-+ gctINT32 lockeds[gcdMAX_GPU_COUNT];
-+
-+ /* Process ID owning this memory. */
-+ gctUINT32 processID;
-+
-+ /* Surface type. */
-+ gceSURF_TYPE type;
-+ }
-+ Virtual;
-+}
-+gcuVIDMEM_NODE;
-+
-+/* gckVIDMEM object. */
-+struct _gckVIDMEM
-+{
-+ /* Object. */
-+ gcsOBJECT object;
-+
-+ /* Pointer to gckOS object. */
-+ gckOS os;
-+
-+ /* Information for this video memory heap. */
-+ gctUINT32 baseAddress;
-+ gctSIZE_T bytes;
-+ gctSIZE_T freeBytes;
-+
-+ /* Mapping for each type of surface. */
-+ gctINT mapping[gcvSURF_NUM_TYPES];
-+
-+ /* Sentinel nodes for up to 8 banks. */
-+ gcuVIDMEM_NODE sentinel[8];
-+
-+ /* Allocation threshold. */
-+ gctSIZE_T threshold;
-+
-+ /* The heap mutex. */
-+ gctPOINTER mutex;
-+};
-+
-+typedef struct _gcsVIDMEM_NODE
-+{
-+ /* Pointer to gcuVIDMEM_NODE. */
-+ gcuVIDMEM_NODE_PTR node;
-+
-+ /* Mutex to protect node. */
-+ gctPOINTER mutex;
-+
-+ /* Reference count. */
-+ gctPOINTER reference;
-+
-+ /* Name for client to import. */
-+ gctUINT32 name;
-+
-+#if gcdPROCESS_ADDRESS_SPACE
-+ /* Head of mapping list. */
-+ gcsGPU_MAP_PTR mapHead;
-+
-+ /* Tail of mapping list. */
-+ gcsGPU_MAP_PTR mapTail;
-+
-+ gctPOINTER mapMutex;
-+#endif
-+
-+ /* Surface Type. */
-+ gceSURF_TYPE type;
-+
-+ /* Pool from which node is allocated. */
-+ gcePOOL pool;
-+}
-+gcsVIDMEM_NODE;
-+
-+typedef struct _gcsVIDMEM_HANDLE * gckVIDMEM_HANDLE;
-+typedef struct _gcsVIDMEM_HANDLE
-+{
-+ /* Pointer to gckVIDMEM_NODE. */
-+ gckVIDMEM_NODE node;
-+
-+ /* Handle for current process. */
-+ gctUINT32 handle;
-+
-+ /* Reference count for this handle. */
-+ gctPOINTER reference;
-+}
-+gcsVIDMEM_HANDLE;
-+
-+typedef struct _gcsSHBUF * gcsSHBUF_PTR;
-+typedef struct _gcsSHBUF
-+{
-+ /* ID. */
-+ gctUINT32 id;
-+
-+ /* Reference count. */
-+ gctPOINTER reference;
-+
-+ /* Data size. */
-+ gctUINT32 size;
-+
-+ /* Data. */
-+ gctPOINTER data;
-+}
-+gcsSHBUF;
-+
-+gceSTATUS
-+gckVIDMEM_HANDLE_Reference(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ IN gctUINT32 Handle
-+ );
-+
-+gceSTATUS
-+gckVIDMEM_HANDLE_Dereference(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ IN gctUINT32 Handle
-+ );
-+
-+gceSTATUS
-+gckVIDMEM_NODE_Allocate(
-+ IN gckKERNEL Kernel,
-+ IN gcuVIDMEM_NODE_PTR VideoNode,
-+ IN gceSURF_TYPE Type,
-+ IN gcePOOL Pool,
-+ IN gctUINT32 * Handle
-+ );
-+
-+gceSTATUS
-+gckVIDMEM_Node_Lock(
-+ IN gckKERNEL Kernel,
-+ IN gckVIDMEM_NODE Node,
-+ OUT gctUINT32 *Address
-+ );
-+
-+gceSTATUS
-+gckVIDMEM_NODE_Unlock(
-+ IN gckKERNEL Kernel,
-+ IN gckVIDMEM_NODE Node,
-+ IN gctUINT32 ProcessID
-+ );
-+
-+gceSTATUS
-+gckVIDMEM_NODE_Dereference(
-+ IN gckKERNEL Kernel,
-+ IN gckVIDMEM_NODE Node
-+ );
-+
-+gceSTATUS
-+gckVIDMEM_NODE_Name(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 Handle,
-+ IN gctUINT32 * Name
-+ );
-+
-+gceSTATUS
-+gckVIDMEM_NODE_Import(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 Name,
-+ IN gctUINT32 * Handle
-+ );
-+
-+gceSTATUS
-+gckVIDMEM_HANDLE_LookupAndReference(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 Handle,
-+ OUT gckVIDMEM_NODE * Node
-+ );
-+
-+gceSTATUS
-+gckVIDMEM_HANDLE_Lookup(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ IN gctUINT32 Handle,
-+ OUT gckVIDMEM_NODE * Node
-+ );
-+
-+gceSTATUS
-+gckVIDMEM_NODE_GetFd(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 Handle,
-+ OUT gctINT * Fd
-+ );
-+
-+#if gcdPROCESS_ADDRESS_SPACE
-+gceSTATUS
-+gckEVENT_DestroyMmu(
-+ IN gckEVENT Event,
-+ IN gckMMU Mmu,
-+ IN gceKERNEL_WHERE FromWhere
-+ );
-+#endif
-+
-+/* gckMMU object. */
-+struct _gckMMU
-+{
-+ /* The object. */
-+ gcsOBJECT object;
-+
-+ /* Pointer to gckOS object. */
-+ gckOS os;
-+
-+ /* Pointer to gckHARDWARE object. */
-+ gckHARDWARE hardware;
-+
-+ /* The page table mutex. */
-+ gctPOINTER pageTableMutex;
-+
-+ /* Page table information. */
-+ gctSIZE_T pageTableSize;
-+ gctPHYS_ADDR pageTablePhysical;
-+ gctUINT32_PTR pageTableLogical;
-+ gctUINT32 pageTableEntries;
-+
-+ /* Master TLB information. */
-+ gctSIZE_T mtlbSize;
-+ gctPHYS_ADDR mtlbPhysical;
-+ gctUINT32_PTR mtlbLogical;
-+ gctUINT32 mtlbEntries;
-+
-+ /* Free entries. */
-+ gctUINT32 heapList;
-+ gctBOOL freeNodes;
-+
-+ gctPOINTER staticSTLB;
-+ gctBOOL enabled;
-+
-+ gctUINT32 dynamicMappingStart;
-+
-+ gctUINT32_PTR mapLogical;
-+#if gcdPROCESS_ADDRESS_SPACE
-+ gctPOINTER pageTableDirty[gcdMAX_GPU_COUNT];
-+ gctPOINTER stlbs;
-+#endif
-+};
-+
-+gceSTATUS
-+gckOS_CreateKernelVirtualMapping(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPOINTER * Logical,
-+ OUT gctSIZE_T * PageCount
-+ );
-+
-+gceSTATUS
-+gckOS_DestroyKernelVirtualMapping(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ IN gctPOINTER Logical
-+ );
-+
-+gceSTATUS
-+gckOS_CreateUserVirtualMapping(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPOINTER * Logical,
-+ OUT gctSIZE_T * PageCount
-+ );
-+
-+gceSTATUS
-+gckOS_DestroyUserVirtualMapping(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ IN gctPOINTER Logical
-+ );
-+
-+gceSTATUS
-+gckOS_GetFd(
-+ IN gctSTRING Name,
-+ IN gcsFDPRIVATE_PTR Private,
-+ OUT gctINT *Fd
-+ );
-+
-+gceSTATUS
-+gckKERNEL_AllocateVirtualCommandBuffer(
-+ IN gckKERNEL Kernel,
-+ IN gctBOOL InUserSpace,
-+ IN OUT gctSIZE_T * Bytes,
-+ OUT gctPHYS_ADDR * Physical,
-+ OUT gctPOINTER * Logical
-+ );
-+
-+gceSTATUS
-+gckKERNEL_DestroyVirtualCommandBuffer(
-+ IN gckKERNEL Kernel,
-+ IN gctSIZE_T Bytes,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctPOINTER Logical
-+ );
-+
-+gceSTATUS
-+gckKERNEL_GetGPUAddress(
-+ IN gckKERNEL Kernel,
-+ IN gctPOINTER Logical,
-+ IN gctBOOL InUserSpace,
-+ OUT gctUINT32 * Address
-+ );
-+
-+gceSTATUS
-+gckKERNEL_QueryGPUAddress(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 GpuAddress,
-+ OUT gckVIRTUAL_COMMAND_BUFFER_PTR * Buffer
-+ );
-+
-+gceSTATUS
-+gckKERNEL_AttachProcess(
-+ IN gckKERNEL Kernel,
-+ IN gctBOOL Attach
-+ );
-+
-+gceSTATUS
-+gckKERNEL_AttachProcessEx(
-+ IN gckKERNEL Kernel,
-+ IN gctBOOL Attach,
-+ IN gctUINT32 PID
-+ );
-+
-+#if gcdSECURE_USER
-+gceSTATUS
-+gckKERNEL_MapLogicalToPhysical(
-+ IN gckKERNEL Kernel,
-+ IN gcskSECURE_CACHE_PTR Cache,
-+ IN OUT gctPOINTER * Data
-+ );
-+
-+gceSTATUS
-+gckKERNEL_FlushTranslationCache(
-+ IN gckKERNEL Kernel,
-+ IN gcskSECURE_CACHE_PTR Cache,
-+ IN gctPOINTER Logical,
-+ IN gctSIZE_T Bytes
-+ );
-+#endif
-+
-+gceSTATUS
-+gckHARDWARE_QueryIdle(
-+ IN gckHARDWARE Hardware,
-+ OUT gctBOOL_PTR IsIdle
-+ );
-+
-+#if gcdSECURITY
-+gceSTATUS
-+gckKERNEL_SecurityOpen(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 GPU,
-+ OUT gctUINT32 *Channel
-+ );
-+
-+/*
-+** Close a security service channel
-+*/
-+gceSTATUS
-+gckKERNEL_SecurityClose(
-+ IN gctUINT32 Channel
-+ );
-+
-+/*
-+** Security service interface.
-+*/
-+gceSTATUS
-+gckKERNEL_SecurityCallService(
-+ IN gctUINT32 Channel,
-+ IN OUT gcsTA_INTERFACE * Interface
-+ );
-+
-+gceSTATUS
-+gckKERNEL_SecurityStartCommand(
-+ IN gckKERNEL Kernel
-+ );
-+
-+gceSTATUS
-+gckKERNEL_SecurityAllocateSecurityMemory(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 Bytes,
-+ OUT gctUINT32 * Handle
-+ );
-+
-+gceSTATUS
-+gckKERNEL_SecurityExecute(
-+ IN gckKERNEL Kernel,
-+ IN gctPOINTER Buffer,
-+ IN gctUINT32 Bytes
-+ );
-+
-+gceSTATUS
-+gckKERNEL_SecurityMapMemory(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 *PhysicalArray,
-+ IN gctUINT32 PageCount,
-+ OUT gctUINT32 * GPUAddress
-+ );
-+
-+gceSTATUS
-+gckKERNEL_SecurityUnmapMemory(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 GPUAddress,
-+ IN gctUINT32 PageCount
-+ );
-+
-+#endif
-+
-+gceSTATUS
-+gckKERNEL_CreateShBuffer(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 Size,
-+ OUT gctSHBUF * ShBuf
-+ );
-+
-+gceSTATUS
-+gckKERNEL_DestroyShBuffer(
-+ IN gckKERNEL Kernel,
-+ IN gctSHBUF ShBuf
-+ );
-+
-+gceSTATUS
-+gckKERNEL_MapShBuffer(
-+ IN gckKERNEL Kernel,
-+ IN gctSHBUF ShBuf
-+ );
-+
-+gceSTATUS
-+gckKERNEL_WriteShBuffer(
-+ IN gckKERNEL Kernel,
-+ IN gctSHBUF ShBuf,
-+ IN gctPOINTER UserData,
-+ IN gctUINT32 ByteCount
-+ );
-+
-+gceSTATUS
-+gckKERNEL_ReadShBuffer(
-+ IN gckKERNEL Kernel,
-+ IN gctSHBUF ShBuf,
-+ IN gctPOINTER UserData,
-+ IN gctUINT32 ByteCount,
-+ OUT gctUINT32 * BytesRead
-+ );
-+
-+
-+/******************************************************************************\
-+******************************* gckCONTEXT Object *******************************
-+\******************************************************************************/
-+
-+gceSTATUS
-+gckCONTEXT_Construct(
-+ IN gckOS Os,
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT32 ProcessID,
-+ OUT gckCONTEXT * Context
-+ );
-+
-+gceSTATUS
-+gckCONTEXT_Destroy(
-+ IN gckCONTEXT Context
-+ );
-+
-+gceSTATUS
-+gckCONTEXT_Update(
-+ IN gckCONTEXT Context,
-+ IN gctUINT32 ProcessID,
-+ IN gcsSTATE_DELTA_PTR StateDelta
-+ );
-+
-+gceSTATUS
-+gckCONTEXT_MapBuffer(
-+ IN gckCONTEXT Context,
-+ OUT gctUINT32 *Physicals,
-+ OUT gctUINT64 *Logicals,
-+ OUT gctUINT32 *Bytes
-+ );
-+
-+#if gcdLINK_QUEUE_SIZE
-+void
-+gckLINKQUEUE_Enqueue(
-+ IN gckLINKQUEUE LinkQueue,
-+ IN gctUINT32 start,
-+ IN gctUINT32 end
-+ );
-+
-+void
-+gckLINKQUEUE_GetData(
-+ IN gckLINKQUEUE LinkQueue,
-+ IN gctUINT32 Index,
-+ OUT gckLINKDATA * Data
-+ );
-+#endif
-+
-+gceSTATUS
-+gckENTRYQUEUE_Enqueue(
-+ IN gckKERNEL Kernel,
-+ IN gckENTRYQUEUE Queue,
-+ IN gctUINT32 physical,
-+ IN gctUINT32 bytes
-+ );
-+
-+gceSTATUS
-+gckENTRYQUEUE_Dequeue(
-+ IN gckENTRYQUEUE Queue,
-+ OUT gckENTRYDATA * Data
-+ );
-+
-+/******************************************************************************\
-+****************************** gckRECORDER Object ******************************
-+\******************************************************************************/
-+gceSTATUS
-+gckRECORDER_Construct(
-+ IN gckOS Os,
-+ IN gckHARDWARE Hardware,
-+ OUT gckRECORDER * Recorder
-+ );
-+
-+gceSTATUS
-+gckRECORDER_Destory(
-+ IN gckOS Os,
-+ IN gckRECORDER Recorder
-+ );
-+
-+void
-+gckRECORDER_AdvanceIndex(
-+ gckRECORDER Recorder,
-+ gctUINT64 CommitStamp
-+ );
-+
-+void
-+gckRECORDER_Record(
-+ gckRECORDER Recorder,
-+ gctUINT8_PTR CommandBuffer,
-+ gctUINT32 CommandBytes,
-+ gctUINT8_PTR ContextBuffer,
-+ gctUINT32 ContextBytes
-+ );
-+
-+void
-+gckRECORDER_Dump(
-+ gckRECORDER Recorder
-+ );
-+
-+gceSTATUS
-+gckRECORDER_UpdateMirror(
-+ gckRECORDER Recorder,
-+ gctUINT32 State,
-+ gctUINT32 Data
-+ );
-+
-+#ifdef __cplusplus
-+}
-+#endif
-+
-+#endif /* __gc_hal_kernel_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_command.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_command.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_command.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_command.c 2015-10-12 10:56:18.082351159 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_command.c 2015-10-15 15:51:25.400645564 +0200
@@ -0,0 +1,3423 @@
+/****************************************************************************
+*
@@ -202907,7 +201077,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_com
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_command_vg.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_command_vg.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_command_vg.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_command_vg.c 2015-10-12 10:56:18.084351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_command_vg.c 2015-10-15 15:51:25.408645039 +0200
@@ -0,0 +1,3787 @@
+/****************************************************************************
+*
@@ -206698,7 +204868,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_com
+#endif /* gcdENABLE_VG */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_db.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_db.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_db.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_db.c 2015-10-12 10:56:18.084351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_db.c 2015-10-15 15:51:25.408645039 +0200
@@ -0,0 +1,1861 @@
+/****************************************************************************
+*
@@ -208563,7 +206733,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_db.
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_debug.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_debug.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_debug.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_debug.c 2015-10-12 10:56:18.085351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_debug.c 2015-10-15 15:51:25.416644510 +0200
@@ -0,0 +1,2785 @@
+/****************************************************************************
+*
@@ -211352,7 +209522,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_deb
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_event.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_event.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_event.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_event.c 2015-10-12 10:56:18.086351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_event.c 2015-10-15 15:51:25.420644247 +0200
@@ -0,0 +1,3459 @@
+/****************************************************************************
+*
@@ -214813,9 +212983,1502 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_eve
+ return gcvSTATUS_OK;
+}
+
+diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel.h
+--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel.h 2015-10-15 15:51:25.424643984 +0200
+@@ -0,0 +1,1489 @@
++/****************************************************************************
++*
++* Copyright (C) 2005 - 2014 by Vivante Corp.
++*
++* This program is free software; you can redistribute it and/or modify
++* it under the terms of the GNU General Public License as published by
++* the Free Software Foundation; either version 2 of the license, or
++* (at your option) any later version.
++*
++* This program is distributed in the hope that it will be useful,
++* but WITHOUT ANY WARRANTY; without even the implied warranty of
++* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++* GNU General Public License for more details.
++*
++* You should have received a copy of the GNU General Public License
++* along with this program; if not write to the Free Software
++* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*
++*****************************************************************************/
++
++
++#ifndef __gc_hal_kernel_h_
++#define __gc_hal_kernel_h_
++
++#include "gc_hal.h"
++#include "gc_hal_kernel_hardware.h"
++#include "gc_hal_driver.h"
++
++#if gcdENABLE_VG
++#include "gc_hal_kernel_vg.h"
++#endif
++
++#if gcdSECURITY
++#include "gc_hal_security_interface.h"
++#endif
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++
++/*******************************************************************************
++***** New MMU Defination *******************************************************/
++#define gcdMMU_MTLB_SHIFT 22
++#define gcdMMU_STLB_4K_SHIFT 12
++#define gcdMMU_STLB_64K_SHIFT 16
++
++#define gcdMMU_MTLB_BITS (32 - gcdMMU_MTLB_SHIFT)
++#define gcdMMU_PAGE_4K_BITS gcdMMU_STLB_4K_SHIFT
++#define gcdMMU_STLB_4K_BITS (32 - gcdMMU_MTLB_BITS - gcdMMU_PAGE_4K_BITS)
++#define gcdMMU_PAGE_64K_BITS gcdMMU_STLB_64K_SHIFT
++#define gcdMMU_STLB_64K_BITS (32 - gcdMMU_MTLB_BITS - gcdMMU_PAGE_64K_BITS)
++
++#define gcdMMU_MTLB_ENTRY_NUM (1 << gcdMMU_MTLB_BITS)
++#define gcdMMU_MTLB_SIZE (gcdMMU_MTLB_ENTRY_NUM << 2)
++#define gcdMMU_STLB_4K_ENTRY_NUM (1 << gcdMMU_STLB_4K_BITS)
++#define gcdMMU_STLB_4K_SIZE (gcdMMU_STLB_4K_ENTRY_NUM << 2)
++#define gcdMMU_PAGE_4K_SIZE (1 << gcdMMU_STLB_4K_SHIFT)
++#define gcdMMU_STLB_64K_ENTRY_NUM (1 << gcdMMU_STLB_64K_BITS)
++#define gcdMMU_STLB_64K_SIZE (gcdMMU_STLB_64K_ENTRY_NUM << 2)
++#define gcdMMU_PAGE_64K_SIZE (1 << gcdMMU_STLB_64K_SHIFT)
++
++#define gcdMMU_MTLB_MASK (~((1U << gcdMMU_MTLB_SHIFT)-1))
++#define gcdMMU_STLB_4K_MASK ((~0U << gcdMMU_STLB_4K_SHIFT) ^ gcdMMU_MTLB_MASK)
++#define gcdMMU_PAGE_4K_MASK (gcdMMU_PAGE_4K_SIZE - 1)
++#define gcdMMU_STLB_64K_MASK ((~((1U << gcdMMU_STLB_64K_SHIFT)-1)) ^ gcdMMU_MTLB_MASK)
++#define gcdMMU_PAGE_64K_MASK (gcdMMU_PAGE_64K_SIZE - 1)
++
++/* Page offset definitions. */
++#define gcdMMU_OFFSET_4K_BITS (32 - gcdMMU_MTLB_BITS - gcdMMU_STLB_4K_BITS)
++#define gcdMMU_OFFSET_4K_MASK ((1U << gcdMMU_OFFSET_4K_BITS) - 1)
++#define gcdMMU_OFFSET_16K_BITS (32 - gcdMMU_MTLB_BITS - gcdMMU_STLB_16K_BITS)
++#define gcdMMU_OFFSET_16K_MASK ((1U << gcdMMU_OFFSET_16K_BITS) - 1)
++
++#define gcdMMU_MTLB_PRESENT 0x00000001
++#define gcdMMU_MTLB_EXCEPTION 0x00000002
++#define gcdMMU_MTLB_4K_PAGE 0x00000000
++
++#define gcdMMU_STLB_PRESENT 0x00000001
++#define gcdMMU_STLB_EXCEPTION 0x00000002
++#define gcdMMU_STLB_4K_PAGE 0x00000000
++
++/*******************************************************************************
++***** Stuck Dump Level ********************************************************/
++
++#define gcdSTUCK_DUMP_MINIMAL 1
++#define gcdSTUCK_DUMP_MIDDLE 2
++#define gcdSTUCK_DUMP_MAXIMAL 3
++
++/*******************************************************************************
++***** Process Secure Cache ****************************************************/
++
++#define gcdSECURE_CACHE_LRU 1
++#define gcdSECURE_CACHE_LINEAR 2
++#define gcdSECURE_CACHE_HASH 3
++#define gcdSECURE_CACHE_TABLE 4
++
++#define gcvPAGE_TABLE_DIRTY_BIT_OTHER (1 << 0)
++#define gcvPAGE_TABLE_DIRTY_BIT_FE (1 << 1)
++
++typedef struct _gcskLOGICAL_CACHE * gcskLOGICAL_CACHE_PTR;
++typedef struct _gcskLOGICAL_CACHE gcskLOGICAL_CACHE;
++struct _gcskLOGICAL_CACHE
++{
++ /* Logical address. */
++ gctPOINTER logical;
++
++ /* DMAable address. */
++ gctUINT32 dma;
++
++#if gcdSECURE_CACHE_METHOD == gcdSECURE_CACHE_HASH
++ /* Pointer to the previous and next hash tables. */
++ gcskLOGICAL_CACHE_PTR nextHash;
++ gcskLOGICAL_CACHE_PTR prevHash;
++#endif
++
++#if gcdSECURE_CACHE_METHOD != gcdSECURE_CACHE_TABLE
++ /* Pointer to the previous and next slot. */
++ gcskLOGICAL_CACHE_PTR next;
++ gcskLOGICAL_CACHE_PTR prev;
++#endif
++
++#if gcdSECURE_CACHE_METHOD == gcdSECURE_CACHE_LINEAR
++ /* Time stamp. */
++ gctUINT64 stamp;
++#endif
++};
++
++typedef struct _gcskSECURE_CACHE * gcskSECURE_CACHE_PTR;
++typedef struct _gcskSECURE_CACHE
++{
++ /* Cache memory. */
++ gcskLOGICAL_CACHE cache[1 + gcdSECURE_CACHE_SLOTS];
++
++ /* Last known index for LINEAR mode. */
++ gcskLOGICAL_CACHE_PTR cacheIndex;
++
++ /* Current free slot for LINEAR mode. */
++ gctUINT32 cacheFree;
++
++ /* Time stamp for LINEAR mode. */
++ gctUINT64 cacheStamp;
++
++#if gcdSECURE_CACHE_METHOD == gcdSECURE_CACHE_HASH
++ /* Hash table for HASH mode. */
++ gcskLOGICAL_CACHE hash[256];
++#endif
++}
++gcskSECURE_CACHE;
++
++/*******************************************************************************
++***** Process Database Management *********************************************/
++
++typedef enum _gceDATABASE_TYPE
++{
++ gcvDB_VIDEO_MEMORY = 1, /* Video memory created. */
++ gcvDB_COMMAND_BUFFER, /* Command Buffer. */
++ gcvDB_NON_PAGED, /* Non paged memory. */
++ gcvDB_CONTIGUOUS, /* Contiguous memory. */
++ gcvDB_SIGNAL, /* Signal. */
++ gcvDB_VIDEO_MEMORY_LOCKED, /* Video memory locked. */
++ gcvDB_CONTEXT, /* Context */
++ gcvDB_IDLE, /* GPU idle. */
++ gcvDB_MAP_MEMORY, /* Map memory */
++ gcvDB_MAP_USER_MEMORY, /* Map user memory */
++ gcvDB_SYNC_POINT, /* Sync point. */
++ gcvDB_SHBUF, /* Shared buffer. */
++}
++gceDATABASE_TYPE;
++
++#define gcdDATABASE_TYPE_MASK 0x000000FF
++#define gcdDB_VIDEO_MEMORY_TYPE_MASK 0x0000FF00
++#define gcdDB_VIDEO_MEMORY_TYPE_SHIFT 8
++
++#define gcdDB_VIDEO_MEMORY_POOL_MASK 0x00FF0000
++#define gcdDB_VIDEO_MEMORY_POOL_SHIFT 16
++
++typedef struct _gcsDATABASE_RECORD * gcsDATABASE_RECORD_PTR;
++typedef struct _gcsDATABASE_RECORD
++{
++ /* Pointer to kernel. */
++ gckKERNEL kernel;
++
++ /* Pointer to next database record. */
++ gcsDATABASE_RECORD_PTR next;
++
++ /* Type of record. */
++ gceDATABASE_TYPE type;
++
++ /* Data for record. */
++ gctPOINTER data;
++ gctPHYS_ADDR physical;
++ gctSIZE_T bytes;
++}
++gcsDATABASE_RECORD;
++
++typedef struct _gcsDATABASE * gcsDATABASE_PTR;
++typedef struct _gcsDATABASE
++{
++ /* Pointer to next entry is hash list. */
++ gcsDATABASE_PTR next;
++ gctSIZE_T slot;
++
++ /* Process ID. */
++ gctUINT32 processID;
++
++ /* Sizes to query. */
++ gcsDATABASE_COUNTERS vidMem;
++ gcsDATABASE_COUNTERS nonPaged;
++ gcsDATABASE_COUNTERS contiguous;
++ gcsDATABASE_COUNTERS mapUserMemory;
++ gcsDATABASE_COUNTERS mapMemory;
++ gcsDATABASE_COUNTERS virtualCommandBuffer;
++
++ gcsDATABASE_COUNTERS vidMemType[gcvSURF_NUM_TYPES];
++ /* Counter for each video memory pool. */
++ gcsDATABASE_COUNTERS vidMemPool[gcvPOOL_NUMBER_OF_POOLS];
++ gctPOINTER counterMutex;
++
++ /* Idle time management. */
++ gctUINT64 lastIdle;
++ gctUINT64 idle;
++
++ /* Pointer to database. */
++ gcsDATABASE_RECORD_PTR list[48];
++
++#if gcdSECURE_USER
++ /* Secure cache. */
++ gcskSECURE_CACHE cache;
++#endif
++
++ gctPOINTER handleDatabase;
++ gctPOINTER handleDatabaseMutex;
++
++#if gcdPROCESS_ADDRESS_SPACE
++ gckMMU mmu;
++#endif
++}
++gcsDATABASE;
++
++typedef struct _gcsRECORDER * gckRECORDER;
++
++typedef struct _gcsFDPRIVATE * gcsFDPRIVATE_PTR;
++typedef struct _gcsFDPRIVATE
++{
++ gctINT (* release) (gcsFDPRIVATE_PTR Private);
++}
++gcsFDPRIVATE;
++
++/* Create a process database that will contain all its allocations. */
++gceSTATUS
++gckKERNEL_CreateProcessDB(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID
++ );
++
++/* Add a record to the process database. */
++gceSTATUS
++gckKERNEL_AddProcessDB(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ IN gceDATABASE_TYPE Type,
++ IN gctPOINTER Pointer,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Size
++ );
++
++/* Remove a record to the process database. */
++gceSTATUS
++gckKERNEL_RemoveProcessDB(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ IN gceDATABASE_TYPE Type,
++ IN gctPOINTER Pointer
++ );
++
++/* Destroy the process database. */
++gceSTATUS
++gckKERNEL_DestroyProcessDB(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID
++ );
++
++/* Find a record to the process database. */
++gceSTATUS
++gckKERNEL_FindProcessDB(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ IN gctUINT32 ThreadID,
++ IN gceDATABASE_TYPE Type,
++ IN gctPOINTER Pointer,
++ OUT gcsDATABASE_RECORD_PTR Record
++ );
++
++/* Query the process database. */
++gceSTATUS
++gckKERNEL_QueryProcessDB(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ IN gctBOOL LastProcessID,
++ IN gceDATABASE_TYPE Type,
++ OUT gcuDATABASE_INFO * Info
++ );
++
++/* Dump the process database. */
++gceSTATUS
++gckKERNEL_DumpProcessDB(
++ IN gckKERNEL Kernel
++ );
++
++/* Dump the video memory usage for process specified. */
++gceSTATUS
++gckKERNEL_DumpVidMemUsage(
++ IN gckKERNEL Kernel,
++ IN gctINT32 ProcessID
++ );
++
++gceSTATUS
++gckKERNEL_FindDatabase(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ IN gctBOOL LastProcessID,
++ OUT gcsDATABASE_PTR * Database
++ );
++
++gceSTATUS
++gckKERNEL_FindHandleDatbase(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ OUT gctPOINTER * HandleDatabase,
++ OUT gctPOINTER * HandleDatabaseMutex
++ );
++
++gceSTATUS
++gckKERNEL_GetProcessMMU(
++ IN gckKERNEL Kernel,
++ OUT gckMMU * Mmu
++ );
++
++gceSTATUS
++gckKERNEL_SetRecovery(
++ IN gckKERNEL Kernel,
++ IN gctBOOL Recovery,
++ IN gctUINT32 StuckDump
++ );
++
++gceSTATUS
++gckMMU_FlatMapping(
++ IN gckMMU Mmu,
++ IN gctUINT32 Physical
++ );
++
++gceSTATUS
++gckMMU_GetPageEntry(
++ IN gckMMU Mmu,
++ IN gctUINT32 Address,
++ IN gctUINT32_PTR *PageTable
++ );
++
++gceSTATUS
++gckMMU_FreePagesEx(
++ IN gckMMU Mmu,
++ IN gctUINT32 Address,
++ IN gctSIZE_T PageCount
++ );
++
++gceSTATUS
++gckKERNEL_CreateIntegerDatabase(
++ IN gckKERNEL Kernel,
++ OUT gctPOINTER * Database
++ );
++
++gceSTATUS
++gckKERNEL_DestroyIntegerDatabase(
++ IN gckKERNEL Kernel,
++ IN gctPOINTER Database
++ );
++
++gceSTATUS
++gckKERNEL_AllocateIntegerId(
++ IN gctPOINTER Database,
++ IN gctPOINTER Pointer,
++ OUT gctUINT32 * Id
++ );
++
++gceSTATUS
++gckKERNEL_FreeIntegerId(
++ IN gctPOINTER Database,
++ IN gctUINT32 Id
++ );
++
++gceSTATUS
++gckKERNEL_QueryIntegerId(
++ IN gctPOINTER Database,
++ IN gctUINT32 Id,
++ OUT gctPOINTER * Pointer
++ );
++
++/* Pointer rename */
++gctUINT32
++gckKERNEL_AllocateNameFromPointer(
++ IN gckKERNEL Kernel,
++ IN gctPOINTER Pointer
++ );
++
++gctPOINTER
++gckKERNEL_QueryPointerFromName(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 Name
++ );
++
++gceSTATUS
++gckKERNEL_DeleteName(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 Name
++ );
++
++#if gcdSECURE_USER
++/* Get secure cache from the process database. */
++gceSTATUS
++gckKERNEL_GetProcessDBCache(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ OUT gcskSECURE_CACHE_PTR * Cache
++ );
++#endif
++
++/*******************************************************************************
++********* Timer Management ****************************************************/
++typedef struct _gcsTIMER * gcsTIMER_PTR;
++typedef struct _gcsTIMER
++{
++ /* Start and Stop time holders. */
++ gctUINT64 startTime;
++ gctUINT64 stopTime;
++}
++gcsTIMER;
++
++/******************************************************************************\
++********************************** Structures **********************************
++\******************************************************************************/
++
++/* gckDB object. */
++struct _gckDB
++{
++ /* Database management. */
++ gcsDATABASE_PTR db[16];
++ gctPOINTER dbMutex;
++ gcsDATABASE_PTR freeDatabase;
++ gcsDATABASE_RECORD_PTR freeRecord;
++ gcsDATABASE_PTR lastDatabase;
++ gctUINT32 lastProcessID;
++ gctUINT64 lastIdle;
++ gctUINT64 idleTime;
++ gctUINT64 lastSlowdown;
++ gctUINT64 lastSlowdownIdle;
++ gctPOINTER nameDatabase;
++ gctPOINTER nameDatabaseMutex;
++
++ gctPOINTER pointerDatabase;
++ gctPOINTER pointerDatabaseMutex;
++};
++
++typedef struct _gckVIRTUAL_COMMAND_BUFFER * gckVIRTUAL_COMMAND_BUFFER_PTR;
++typedef struct _gckVIRTUAL_COMMAND_BUFFER
++{
++ gctPHYS_ADDR physical;
++ gctPOINTER userLogical;
++ gctPOINTER kernelLogical;
++ gctSIZE_T bytes;
++ gctSIZE_T pageCount;
++ gctPOINTER pageTable;
++ gctUINT32 gpuAddress;
++ gctUINT pid;
++ gckVIRTUAL_COMMAND_BUFFER_PTR next;
++ gckVIRTUAL_COMMAND_BUFFER_PTR prev;
++ gckKERNEL kernel;
++#if gcdPROCESS_ADDRESS_SPACE
++ gckMMU mmu;
++#endif
++}
++gckVIRTUAL_COMMAND_BUFFER;
++
++/* gckKERNEL object. */
++struct _gckKERNEL
++{
++ /* Object. */
++ gcsOBJECT object;
++
++ /* Pointer to gckOS object. */
++ gckOS os;
++
++ /* Core */
++ gceCORE core;
++
++ /* Pointer to gckHARDWARE object. */
++ gckHARDWARE hardware;
++
++ /* Pointer to gckCOMMAND object. */
++ gckCOMMAND command;
++
++ /* Pointer to gckEVENT object. */
++ gckEVENT eventObj;
++
++ /* Pointer to context. */
++ gctPOINTER context;
++
++ /* Pointer to gckMMU object. */
++ gckMMU mmu;
++
++ /* Arom holding number of clients. */
++ gctPOINTER atomClients;
++
++#if VIVANTE_PROFILER
++ /* Enable profiling */
++ gctBOOL profileEnable;
++ /* Clear profile register or not*/
++ gctBOOL profileCleanRegister;
++#endif
++
++#ifdef QNX_SINGLE_THREADED_DEBUGGING
++ gctPOINTER debugMutex;
++#endif
++
++ /* Database management. */
++ gckDB db;
++ gctBOOL dbCreated;
++
++ gctUINT64 resetTimeStamp;
++
++ /* Pointer to gckEVENT object. */
++ gcsTIMER timers[8];
++ gctUINT32 timeOut;
++
++#if gcdENABLE_VG
++ gckVGKERNEL vg;
++#endif
++
++ /* Virtual command buffer list. */
++ gckVIRTUAL_COMMAND_BUFFER_PTR virtualBufferHead;
++ gckVIRTUAL_COMMAND_BUFFER_PTR virtualBufferTail;
++ gctPOINTER virtualBufferLock;
++
++ /* Enable virtual command buffer. */
++ gctBOOL virtualCommandBuffer;
++
++#if gcdDVFS
++ gckDVFS dvfs;
++#endif
++
++#if gcdANDROID_NATIVE_FENCE_SYNC
++ gctHANDLE timeline;
++#endif
++
++ /* Enable recovery. */
++ gctBOOL recovery;
++
++ /* Level of dump information after stuck. */
++ gctUINT stuckDump;
++
++#if gcdSECURITY
++ gctUINT32 securityChannel;
++#endif
++
++ /* Timer to monitor GPU stuck. */
++ gctPOINTER monitorTimer;
++
++ /* Flag to quit monitor timer. */
++ gctBOOL monitorTimerStop;
++
++ /* Monitor states. */
++ gctBOOL monitoring;
++ gctUINT32 lastCommitStamp;
++ gctUINT32 timer;
++ gctUINT32 restoreAddress;
++ gctUINT32 restoreMask;
++};
++
++struct _FrequencyHistory
++{
++ gctUINT32 frequency;
++ gctUINT32 count;
++};
++
++/* gckDVFS object. */
++struct _gckDVFS
++{
++ gckOS os;
++ gckHARDWARE hardware;
++ gctPOINTER timer;
++ gctUINT32 pollingTime;
++ gctBOOL stop;
++ gctUINT32 totalConfig;
++ gctUINT32 loads[8];
++ gctUINT8 currentScale;
++ struct _FrequencyHistory frequencyHistory[16];
++};
++
++/* gckCOMMAND object. */
++struct _gckCOMMAND
++{
++ /* Object. */
++ gcsOBJECT object;
++
++ /* Pointer to required object. */
++ gckKERNEL kernel;
++ gckOS os;
++
++ /* Number of bytes per page. */
++ gctUINT32 pageSize;
++
++ /* Current pipe select. */
++ gcePIPE_SELECT pipeSelect;
++
++ /* Command queue running flag. */
++ gctBOOL running;
++
++ /* Idle flag and commit stamp. */
++ gctBOOL idle;
++ gctUINT64 commitStamp;
++
++ /* Command queue mutex. */
++ gctPOINTER mutexQueue;
++
++ /* Context switching mutex. */
++ gctPOINTER mutexContext;
++
++#if VIVANTE_PROFILER_CONTEXT
++ /* Context sequence mutex. */
++ gctPOINTER mutexContextSeq;
++#endif
++
++ /* Command queue power semaphore. */
++ gctPOINTER powerSemaphore;
++
++ /* Current command queue. */
++ struct _gcskCOMMAND_QUEUE
++ {
++ gctSIGNAL signal;
++ gctPHYS_ADDR physical;
++ gctPOINTER logical;
++ gctUINT32 address;
++ }
++ queues[gcdCOMMAND_QUEUES];
++
++ gctPHYS_ADDR physical;
++ gctPOINTER logical;
++ gctUINT32 address;
++ gctUINT32 offset;
++ gctINT index;
++#if gcmIS_DEBUG(gcdDEBUG_TRACE)
++ gctUINT wrapCount;
++#endif
++
++ /* The command queue is new. */
++ gctBOOL newQueue;
++
++ /* Context management. */
++ gckCONTEXT currContext;
++
++ /* Pointer to last WAIT command. */
++ gctPHYS_ADDR waitPhysical;
++ gctPOINTER waitLogical;
++ gctUINT32 waitSize;
++
++ /* Command buffer alignment. */
++ gctUINT32 alignment;
++ gctUINT32 reservedHead;
++ gctUINT32 reservedTail;
++
++ /* Commit counter. */
++ gctPOINTER atomCommit;
++
++ /* Kernel process ID. */
++ gctUINT32 kernelProcessID;
++
++ /* End Event signal. */
++ gctSIGNAL endEventSignal;
++
++#if gcdSECURE_USER
++ /* Hint array copy buffer. */
++ gctBOOL hintArrayAllocated;
++ gctUINT hintArraySize;
++ gctUINT32_PTR hintArray;
++#endif
++
++#if gcdPROCESS_ADDRESS_SPACE
++ gckMMU currentMmu;
++#endif
++ struct _gckENTRYQUEUE queue;
++};
++
++typedef struct _gcsEVENT * gcsEVENT_PTR;
++
++/* Structure holding one event to be processed. */
++typedef struct _gcsEVENT
++{
++ /* Pointer to next event in queue. */
++ gcsEVENT_PTR next;
++
++ /* Event information. */
++ gcsHAL_INTERFACE info;
++
++ /* Process ID owning the event. */
++ gctUINT32 processID;
++
++#ifdef __QNXNTO__
++ /* Kernel. */
++ gckKERNEL kernel;
++#endif
++
++ gctBOOL fromKernel;
++}
++gcsEVENT;
++
++/* Structure holding a list of events to be processed by an interrupt. */
++typedef struct _gcsEVENT_QUEUE * gcsEVENT_QUEUE_PTR;
++typedef struct _gcsEVENT_QUEUE
++{
++ /* Time stamp. */
++ gctUINT64 stamp;
++
++ /* Source of the event. */
++ gceKERNEL_WHERE source;
++
++#if gcdMULTI_GPU
++ /* Which chip(s) of the event */
++ gceCORE_3D_MASK chipEnable;
++#endif
++
++ /* Pointer to head of event queue. */
++ gcsEVENT_PTR head;
++
++ /* Pointer to tail of event queue. */
++ gcsEVENT_PTR tail;
++
++ /* Next list of events. */
++ gcsEVENT_QUEUE_PTR next;
++}
++gcsEVENT_QUEUE;
++
++/*
++ gcdREPO_LIST_COUNT defines the maximum number of event queues with different
++ hardware module sources that may coexist at the same time. Only two sources
++ are supported - gcvKERNEL_COMMAND and gcvKERNEL_PIXEL. gcvKERNEL_COMMAND
++ source is used only for managing the kernel command queue and is only issued
++ when the current command queue gets full. Since we commit event queues every
++ time we commit command buffers, in the worst case we can have up to three
++ pending event queues:
++ - gcvKERNEL_PIXEL
++ - gcvKERNEL_COMMAND (queue overflow)
++ - gcvKERNEL_PIXEL
++*/
++#define gcdREPO_LIST_COUNT 3
++
++/* gckEVENT object. */
++struct _gckEVENT
++{
++ /* The object. */
++ gcsOBJECT object;
++
++ /* Pointer to required objects. */
++ gckOS os;
++ gckKERNEL kernel;
++
++ /* Time stamp. */
++ gctUINT64 stamp;
++ gctUINT32 lastCommitStamp;
++
++ /* Queue mutex. */
++ gctPOINTER eventQueueMutex;
++
++ /* Array of event queues. */
++ gcsEVENT_QUEUE queues[29];
++ gctUINT8 lastID;
++ gctPOINTER freeAtom;
++
++ /* Pending events. */
++#if gcdSMP
++#if gcdMULTI_GPU
++ gctPOINTER pending3D[gcdMULTI_GPU];
++ gctPOINTER pending3DMask[gcdMULTI_GPU];
++ gctPOINTER pendingMask;
++#endif
++ gctPOINTER pending;
++#else
++#if gcdMULTI_GPU
++ volatile gctUINT pending3D[gcdMULTI_GPU];
++ volatile gctUINT pending3DMask[gcdMULTI_GPU];
++ volatile gctUINT pendingMask;
++#endif
++ volatile gctUINT pending;
++#endif
++#if gcdMULTI_GPU
++ gctUINT32 busy;
++#endif
++
++ /* List of free event structures and its mutex. */
++ gcsEVENT_PTR freeEventList;
++ gctSIZE_T freeEventCount;
++ gctPOINTER freeEventMutex;
++
++ /* Event queues. */
++ gcsEVENT_QUEUE_PTR queueHead;
++ gcsEVENT_QUEUE_PTR queueTail;
++ gcsEVENT_QUEUE_PTR freeList;
++ gcsEVENT_QUEUE repoList[gcdREPO_LIST_COUNT];
++ gctPOINTER eventListMutex;
++
++ gctPOINTER submitTimer;
++
++#if gcdINTERRUPT_STATISTIC
++ gctPOINTER interruptCount;
++#endif
++
++#if gcdRECORD_COMMAND
++ gckRECORDER recorder;
++#endif
++};
++
++/* Free all events belonging to a process. */
++gceSTATUS
++gckEVENT_FreeProcess(
++ IN gckEVENT Event,
++ IN gctUINT32 ProcessID
++ );
++
++gceSTATUS
++gckEVENT_Stop(
++ IN gckEVENT Event,
++ IN gctUINT32 ProcessID,
++ IN gctPHYS_ADDR Handle,
++ IN gctPOINTER Logical,
++ IN gctSIGNAL Signal,
++ IN OUT gctUINT32 * waitSize
++ );
++
++typedef struct _gcsLOCK_INFO * gcsLOCK_INFO_PTR;
++typedef struct _gcsLOCK_INFO
++{
++ gctUINT32 GPUAddresses[gcdMAX_GPU_COUNT];
++ gctPOINTER pageTables[gcdMAX_GPU_COUNT];
++ gctUINT32 lockeds[gcdMAX_GPU_COUNT];
++ gckKERNEL lockKernels[gcdMAX_GPU_COUNT];
++ gckMMU lockMmus[gcdMAX_GPU_COUNT];
++}
++gcsLOCK_INFO;
++
++typedef struct _gcsGPU_MAP * gcsGPU_MAP_PTR;
++typedef struct _gcsGPU_MAP
++{
++ gctINT pid;
++ gcsLOCK_INFO lockInfo;
++ gcsGPU_MAP_PTR prev;
++ gcsGPU_MAP_PTR next;
++}
++gcsGPU_MAP;
++
++/* gcuVIDMEM_NODE structure. */
++typedef union _gcuVIDMEM_NODE
++{
++ /* Allocated from gckVIDMEM. */
++ struct _gcsVIDMEM_NODE_VIDMEM
++ {
++ /* Owner of this node. */
++ gckVIDMEM memory;
++
++ /* Dual-linked list of nodes. */
++ gcuVIDMEM_NODE_PTR next;
++ gcuVIDMEM_NODE_PTR prev;
++
++ /* Dual linked list of free nodes. */
++ gcuVIDMEM_NODE_PTR nextFree;
++ gcuVIDMEM_NODE_PTR prevFree;
++
++ /* Information for this node. */
++ gctSIZE_T offset;
++ gctSIZE_T bytes;
++ gctUINT32 alignment;
++
++#ifdef __QNXNTO__
++ /* Client virtual address. */
++ gctPOINTER logical;
++#endif
++
++ /* Locked counter. */
++ gctINT32 locked;
++
++ /* Memory pool. */
++ gcePOOL pool;
++ gctUINT32 physical;
++
++ /* Process ID owning this memory. */
++ gctUINT32 processID;
++
++#if gcdENABLE_VG
++ gctPOINTER kernelVirtual;
++#endif
++ }
++ VidMem;
++
++ /* Allocated from gckOS. */
++ struct _gcsVIDMEM_NODE_VIRTUAL
++ {
++ /* Pointer to gckKERNEL object. */
++ gckKERNEL kernel;
++
++ /* Information for this node. */
++ /* Contiguously allocated? */
++ gctBOOL contiguous;
++ /* mdl record pointer... a kmalloc address. Process agnostic. */
++ gctPHYS_ADDR physical;
++ gctSIZE_T bytes;
++ /* do_mmap_pgoff address... mapped per-process. */
++ gctPOINTER logical;
++
++#if gcdENABLE_VG
++ /* Physical address of this node, only meaningful when it is contiguous. */
++ gctUINT32 physicalAddress;
++
++ /* Kernel logical of this node. */
++ gctPOINTER kernelVirtual;
++#endif
++
++ /* Customer private handle */
++ gctUINT32 gid;
++
++ /* Page table information. */
++ /* Used only when node is not contiguous */
++ gctSIZE_T pageCount;
++
++ /* Used only when node is not contiguous */
++ gctPOINTER pageTables[gcdMAX_GPU_COUNT];
++ /* Pointer to gckKERNEL object who lock this. */
++ gckKERNEL lockKernels[gcdMAX_GPU_COUNT];
++ /* Actual physical address */
++ gctUINT32 addresses[gcdMAX_GPU_COUNT];
++
++ /* Locked counter. */
++ gctINT32 lockeds[gcdMAX_GPU_COUNT];
++
++ /* Process ID owning this memory. */
++ gctUINT32 processID;
++
++ /* Surface type. */
++ gceSURF_TYPE type;
++ }
++ Virtual;
++}
++gcuVIDMEM_NODE;
++
++/* gckVIDMEM object. */
++struct _gckVIDMEM
++{
++ /* Object. */
++ gcsOBJECT object;
++
++ /* Pointer to gckOS object. */
++ gckOS os;
++
++ /* Information for this video memory heap. */
++ gctUINT32 baseAddress;
++ gctSIZE_T bytes;
++ gctSIZE_T freeBytes;
++
++ /* Mapping for each type of surface. */
++ gctINT mapping[gcvSURF_NUM_TYPES];
++
++ /* Sentinel nodes for up to 8 banks. */
++ gcuVIDMEM_NODE sentinel[8];
++
++ /* Allocation threshold. */
++ gctSIZE_T threshold;
++
++ /* The heap mutex. */
++ gctPOINTER mutex;
++};
++
++typedef struct _gcsVIDMEM_NODE
++{
++ /* Pointer to gcuVIDMEM_NODE. */
++ gcuVIDMEM_NODE_PTR node;
++
++ /* Mutex to protect node. */
++ gctPOINTER mutex;
++
++ /* Reference count. */
++ gctPOINTER reference;
++
++ /* Name for client to import. */
++ gctUINT32 name;
++
++#if gcdPROCESS_ADDRESS_SPACE
++ /* Head of mapping list. */
++ gcsGPU_MAP_PTR mapHead;
++
++ /* Tail of mapping list. */
++ gcsGPU_MAP_PTR mapTail;
++
++ gctPOINTER mapMutex;
++#endif
++
++ /* Surface Type. */
++ gceSURF_TYPE type;
++
++ /* Pool from which node is allocated. */
++ gcePOOL pool;
++}
++gcsVIDMEM_NODE;
++
++typedef struct _gcsVIDMEM_HANDLE * gckVIDMEM_HANDLE;
++typedef struct _gcsVIDMEM_HANDLE
++{
++ /* Pointer to gckVIDMEM_NODE. */
++ gckVIDMEM_NODE node;
++
++ /* Handle for current process. */
++ gctUINT32 handle;
++
++ /* Reference count for this handle. */
++ gctPOINTER reference;
++}
++gcsVIDMEM_HANDLE;
++
++typedef struct _gcsSHBUF * gcsSHBUF_PTR;
++typedef struct _gcsSHBUF
++{
++ /* ID. */
++ gctUINT32 id;
++
++ /* Reference count. */
++ gctPOINTER reference;
++
++ /* Data size. */
++ gctUINT32 size;
++
++ /* Data. */
++ gctPOINTER data;
++}
++gcsSHBUF;
++
++gceSTATUS
++gckVIDMEM_HANDLE_Reference(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ IN gctUINT32 Handle
++ );
++
++gceSTATUS
++gckVIDMEM_HANDLE_Dereference(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ IN gctUINT32 Handle
++ );
++
++gceSTATUS
++gckVIDMEM_NODE_Allocate(
++ IN gckKERNEL Kernel,
++ IN gcuVIDMEM_NODE_PTR VideoNode,
++ IN gceSURF_TYPE Type,
++ IN gcePOOL Pool,
++ IN gctUINT32 * Handle
++ );
++
++gceSTATUS
++gckVIDMEM_Node_Lock(
++ IN gckKERNEL Kernel,
++ IN gckVIDMEM_NODE Node,
++ OUT gctUINT32 *Address
++ );
++
++gceSTATUS
++gckVIDMEM_NODE_Unlock(
++ IN gckKERNEL Kernel,
++ IN gckVIDMEM_NODE Node,
++ IN gctUINT32 ProcessID
++ );
++
++gceSTATUS
++gckVIDMEM_NODE_Dereference(
++ IN gckKERNEL Kernel,
++ IN gckVIDMEM_NODE Node
++ );
++
++gceSTATUS
++gckVIDMEM_NODE_Name(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 Handle,
++ IN gctUINT32 * Name
++ );
++
++gceSTATUS
++gckVIDMEM_NODE_Import(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 Name,
++ IN gctUINT32 * Handle
++ );
++
++gceSTATUS
++gckVIDMEM_HANDLE_LookupAndReference(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 Handle,
++ OUT gckVIDMEM_NODE * Node
++ );
++
++gceSTATUS
++gckVIDMEM_HANDLE_Lookup(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ IN gctUINT32 Handle,
++ OUT gckVIDMEM_NODE * Node
++ );
++
++gceSTATUS
++gckVIDMEM_NODE_GetFd(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 Handle,
++ OUT gctINT * Fd
++ );
++
++#if gcdPROCESS_ADDRESS_SPACE
++gceSTATUS
++gckEVENT_DestroyMmu(
++ IN gckEVENT Event,
++ IN gckMMU Mmu,
++ IN gceKERNEL_WHERE FromWhere
++ );
++#endif
++
++/* gckMMU object. */
++struct _gckMMU
++{
++ /* The object. */
++ gcsOBJECT object;
++
++ /* Pointer to gckOS object. */
++ gckOS os;
++
++ /* Pointer to gckHARDWARE object. */
++ gckHARDWARE hardware;
++
++ /* The page table mutex. */
++ gctPOINTER pageTableMutex;
++
++ /* Page table information. */
++ gctSIZE_T pageTableSize;
++ gctPHYS_ADDR pageTablePhysical;
++ gctUINT32_PTR pageTableLogical;
++ gctUINT32 pageTableEntries;
++
++ /* Master TLB information. */
++ gctSIZE_T mtlbSize;
++ gctPHYS_ADDR mtlbPhysical;
++ gctUINT32_PTR mtlbLogical;
++ gctUINT32 mtlbEntries;
++
++ /* Free entries. */
++ gctUINT32 heapList;
++ gctBOOL freeNodes;
++
++ gctPOINTER staticSTLB;
++ gctBOOL enabled;
++
++ gctUINT32 dynamicMappingStart;
++
++ gctUINT32_PTR mapLogical;
++#if gcdPROCESS_ADDRESS_SPACE
++ gctPOINTER pageTableDirty[gcdMAX_GPU_COUNT];
++ gctPOINTER stlbs;
++#endif
++};
++
++gceSTATUS
++gckOS_CreateKernelVirtualMapping(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ OUT gctPOINTER * Logical,
++ OUT gctSIZE_T * PageCount
++ );
++
++gceSTATUS
++gckOS_DestroyKernelVirtualMapping(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ IN gctPOINTER Logical
++ );
++
++gceSTATUS
++gckOS_CreateUserVirtualMapping(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ OUT gctPOINTER * Logical,
++ OUT gctSIZE_T * PageCount
++ );
++
++gceSTATUS
++gckOS_DestroyUserVirtualMapping(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ IN gctPOINTER Logical
++ );
++
++gceSTATUS
++gckOS_GetFd(
++ IN gctSTRING Name,
++ IN gcsFDPRIVATE_PTR Private,
++ OUT gctINT *Fd
++ );
++
++gceSTATUS
++gckKERNEL_AllocateVirtualCommandBuffer(
++ IN gckKERNEL Kernel,
++ IN gctBOOL InUserSpace,
++ IN OUT gctSIZE_T * Bytes,
++ OUT gctPHYS_ADDR * Physical,
++ OUT gctPOINTER * Logical
++ );
++
++gceSTATUS
++gckKERNEL_DestroyVirtualCommandBuffer(
++ IN gckKERNEL Kernel,
++ IN gctSIZE_T Bytes,
++ IN gctPHYS_ADDR Physical,
++ IN gctPOINTER Logical
++ );
++
++gceSTATUS
++gckKERNEL_GetGPUAddress(
++ IN gckKERNEL Kernel,
++ IN gctPOINTER Logical,
++ IN gctBOOL InUserSpace,
++ OUT gctUINT32 * Address
++ );
++
++gceSTATUS
++gckKERNEL_QueryGPUAddress(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 GpuAddress,
++ OUT gckVIRTUAL_COMMAND_BUFFER_PTR * Buffer
++ );
++
++gceSTATUS
++gckKERNEL_AttachProcess(
++ IN gckKERNEL Kernel,
++ IN gctBOOL Attach
++ );
++
++gceSTATUS
++gckKERNEL_AttachProcessEx(
++ IN gckKERNEL Kernel,
++ IN gctBOOL Attach,
++ IN gctUINT32 PID
++ );
++
++#if gcdSECURE_USER
++gceSTATUS
++gckKERNEL_MapLogicalToPhysical(
++ IN gckKERNEL Kernel,
++ IN gcskSECURE_CACHE_PTR Cache,
++ IN OUT gctPOINTER * Data
++ );
++
++gceSTATUS
++gckKERNEL_FlushTranslationCache(
++ IN gckKERNEL Kernel,
++ IN gcskSECURE_CACHE_PTR Cache,
++ IN gctPOINTER Logical,
++ IN gctSIZE_T Bytes
++ );
++#endif
++
++gceSTATUS
++gckHARDWARE_QueryIdle(
++ IN gckHARDWARE Hardware,
++ OUT gctBOOL_PTR IsIdle
++ );
++
++#if gcdSECURITY
++gceSTATUS
++gckKERNEL_SecurityOpen(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 GPU,
++ OUT gctUINT32 *Channel
++ );
++
++/*
++** Close a security service channel
++*/
++gceSTATUS
++gckKERNEL_SecurityClose(
++ IN gctUINT32 Channel
++ );
++
++/*
++** Security service interface.
++*/
++gceSTATUS
++gckKERNEL_SecurityCallService(
++ IN gctUINT32 Channel,
++ IN OUT gcsTA_INTERFACE * Interface
++ );
++
++gceSTATUS
++gckKERNEL_SecurityStartCommand(
++ IN gckKERNEL Kernel
++ );
++
++gceSTATUS
++gckKERNEL_SecurityAllocateSecurityMemory(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 Bytes,
++ OUT gctUINT32 * Handle
++ );
++
++gceSTATUS
++gckKERNEL_SecurityExecute(
++ IN gckKERNEL Kernel,
++ IN gctPOINTER Buffer,
++ IN gctUINT32 Bytes
++ );
++
++gceSTATUS
++gckKERNEL_SecurityMapMemory(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 *PhysicalArray,
++ IN gctUINT32 PageCount,
++ OUT gctUINT32 * GPUAddress
++ );
++
++gceSTATUS
++gckKERNEL_SecurityUnmapMemory(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 GPUAddress,
++ IN gctUINT32 PageCount
++ );
++
++#endif
++
++gceSTATUS
++gckKERNEL_CreateShBuffer(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 Size,
++ OUT gctSHBUF * ShBuf
++ );
++
++gceSTATUS
++gckKERNEL_DestroyShBuffer(
++ IN gckKERNEL Kernel,
++ IN gctSHBUF ShBuf
++ );
++
++gceSTATUS
++gckKERNEL_MapShBuffer(
++ IN gckKERNEL Kernel,
++ IN gctSHBUF ShBuf
++ );
++
++gceSTATUS
++gckKERNEL_WriteShBuffer(
++ IN gckKERNEL Kernel,
++ IN gctSHBUF ShBuf,
++ IN gctPOINTER UserData,
++ IN gctUINT32 ByteCount
++ );
++
++gceSTATUS
++gckKERNEL_ReadShBuffer(
++ IN gckKERNEL Kernel,
++ IN gctSHBUF ShBuf,
++ IN gctPOINTER UserData,
++ IN gctUINT32 ByteCount,
++ OUT gctUINT32 * BytesRead
++ );
++
++
++/******************************************************************************\
++******************************* gckCONTEXT Object *******************************
++\******************************************************************************/
++
++gceSTATUS
++gckCONTEXT_Construct(
++ IN gckOS Os,
++ IN gckHARDWARE Hardware,
++ IN gctUINT32 ProcessID,
++ OUT gckCONTEXT * Context
++ );
++
++gceSTATUS
++gckCONTEXT_Destroy(
++ IN gckCONTEXT Context
++ );
++
++gceSTATUS
++gckCONTEXT_Update(
++ IN gckCONTEXT Context,
++ IN gctUINT32 ProcessID,
++ IN gcsSTATE_DELTA_PTR StateDelta
++ );
++
++gceSTATUS
++gckCONTEXT_MapBuffer(
++ IN gckCONTEXT Context,
++ OUT gctUINT32 *Physicals,
++ OUT gctUINT64 *Logicals,
++ OUT gctUINT32 *Bytes
++ );
++
++#if gcdLINK_QUEUE_SIZE
++void
++gckLINKQUEUE_Enqueue(
++ IN gckLINKQUEUE LinkQueue,
++ IN gctUINT32 start,
++ IN gctUINT32 end
++ );
++
++void
++gckLINKQUEUE_GetData(
++ IN gckLINKQUEUE LinkQueue,
++ IN gctUINT32 Index,
++ OUT gckLINKDATA * Data
++ );
++#endif
++
++gceSTATUS
++gckENTRYQUEUE_Enqueue(
++ IN gckKERNEL Kernel,
++ IN gckENTRYQUEUE Queue,
++ IN gctUINT32 physical,
++ IN gctUINT32 bytes
++ );
++
++gceSTATUS
++gckENTRYQUEUE_Dequeue(
++ IN gckENTRYQUEUE Queue,
++ OUT gckENTRYDATA * Data
++ );
++
++/******************************************************************************\
++****************************** gckRECORDER Object ******************************
++\******************************************************************************/
++gceSTATUS
++gckRECORDER_Construct(
++ IN gckOS Os,
++ IN gckHARDWARE Hardware,
++ OUT gckRECORDER * Recorder
++ );
++
++gceSTATUS
++gckRECORDER_Destory(
++ IN gckOS Os,
++ IN gckRECORDER Recorder
++ );
++
++void
++gckRECORDER_AdvanceIndex(
++ gckRECORDER Recorder,
++ gctUINT64 CommitStamp
++ );
++
++void
++gckRECORDER_Record(
++ gckRECORDER Recorder,
++ gctUINT8_PTR CommandBuffer,
++ gctUINT32 CommandBytes,
++ gctUINT8_PTR ContextBuffer,
++ gctUINT32 ContextBytes
++ );
++
++void
++gckRECORDER_Dump(
++ gckRECORDER Recorder
++ );
++
++gceSTATUS
++gckRECORDER_UpdateMirror(
++ gckRECORDER Recorder,
++ gctUINT32 State,
++ gctUINT32 Data
++ );
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* __gc_hal_kernel_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_heap.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_heap.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_heap.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_heap.c 2015-10-12 10:56:18.087351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_heap.c 2015-10-15 15:51:25.424643984 +0200
@@ -0,0 +1,858 @@
+/****************************************************************************
+*
@@ -215677,7 +215340,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_hea
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_interrupt_vg.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_interrupt_vg.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_interrupt_vg.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_interrupt_vg.c 2015-10-12 10:56:18.087351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_interrupt_vg.c 2015-10-15 15:51:25.424643984 +0200
@@ -0,0 +1,877 @@
+/****************************************************************************
+*
@@ -216558,7 +216221,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_int
+#endif /* gcdENABLE_VG */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_mmu.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_mmu.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_mmu.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_mmu.c 2015-10-12 10:56:18.088351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_mmu.c 2015-10-15 15:51:25.424643984 +0200
@@ -0,0 +1,2260 @@
+/****************************************************************************
+*
@@ -218822,7 +218485,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_mmu
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_mmu_vg.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_mmu_vg.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_mmu_vg.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_mmu_vg.c 2015-10-12 10:56:18.088351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_mmu_vg.c 2015-10-15 15:51:25.424643984 +0200
@@ -0,0 +1,522 @@
+/****************************************************************************
+*
@@ -219348,7 +219011,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_mmu
+#endif /* gcdENABLE_VG */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_power.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_power.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_power.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_power.c 2015-10-12 10:56:18.088351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_power.c 2015-10-15 15:51:25.424643984 +0200
@@ -0,0 +1,347 @@
+/****************************************************************************
+*
@@ -219699,7 +219362,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_pow
+#endif
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_precomp.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_precomp.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_precomp.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_precomp.h 2015-10-12 10:56:18.088351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_precomp.h 2015-10-15 15:51:25.424643984 +0200
@@ -0,0 +1,29 @@
+/****************************************************************************
+*
@@ -219732,7 +219395,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_pre
+#endif /* __gc_hal_kernel_precomp_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_security.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_security.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_security.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_security.c 2015-10-12 10:56:18.089351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_security.c 2015-10-15 15:51:25.424643984 +0200
@@ -0,0 +1,239 @@
+/****************************************************************************
+*
@@ -219975,7 +219638,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_sec
+#endif
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_vg.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_vg.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_vg.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_vg.c 2015-10-12 10:56:18.089351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_vg.c 2015-10-15 15:51:25.424643984 +0200
@@ -0,0 +1,833 @@
+/****************************************************************************
+*
@@ -220812,7 +220475,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_vg.
+#endif /* gcdENABLE_VG */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_vg.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_vg.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_vg.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_vg.h 2015-10-12 10:56:18.089351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_vg.h 2015-10-15 15:51:25.424643984 +0200
@@ -0,0 +1,85 @@
+/****************************************************************************
+*
@@ -220901,7 +220564,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_vg.
+#endif /* __gc_hal_kernel_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_video_memory.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_video_memory.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_video_memory.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_video_memory.c 2015-10-12 10:56:18.090351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_video_memory.c 2015-10-15 15:51:25.428643721 +0200
@@ -0,0 +1,2807 @@
+/****************************************************************************
+*
@@ -223710,2872 +223373,9 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/gc_hal_kernel_vid
+ return status;
+}
+
-diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal.h
---- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal.h 2015-10-12 10:56:18.095351158 +0200
-@@ -0,0 +1,2859 @@
-+/****************************************************************************
-+*
-+* Copyright (C) 2005 - 2014 by Vivante Corp.
-+*
-+* This program is free software; you can redistribute it and/or modify
-+* it under the terms of the GNU General Public License as published by
-+* the Free Software Foundation; either version 2 of the license, or
-+* (at your option) any later version.
-+*
-+* This program is distributed in the hope that it will be useful,
-+* but WITHOUT ANY WARRANTY; without even the implied warranty of
-+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+* GNU General Public License for more details.
-+*
-+* You should have received a copy of the GNU General Public License
-+* along with this program; if not write to the Free Software
-+* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-+*
-+*****************************************************************************/
-+
-+
-+#ifndef __gc_hal_h_
-+#define __gc_hal_h_
-+
-+#include "gc_hal_rename.h"
-+#include "gc_hal_types.h"
-+#include "gc_hal_enum.h"
-+#include "gc_hal_base.h"
-+#include "gc_hal_profiler.h"
-+#include "gc_hal_driver.h"
-+#if gcdENABLE_3D
-+#include "gc_hal_statistics.h"
-+#endif
-+
-+#if gcdSECURITY
-+#include "gc_hal_security_interface.h"
-+#endif
-+
-+#ifdef __cplusplus
-+extern "C" {
-+#endif
-+
-+/******************************************************************************\
-+******************************* Alignment Macros *******************************
-+\******************************************************************************/
-+
-+/* Alignment with a non-power of two value. */
-+#define gcmALIGN_NP2(n, align) \
-+( \
-+ ((n) + (align) - 1) - (((n) + (align) - 1) % (align)) \
-+)
-+
-+/* Alignment with a power of two value. */
-+#define gcmALIGN(n, align) \
-+( \
-+ ((n) + ((align) - 1)) & ~((align) - 1) \
-+)
-+
-+#define gcmALIGN_BASE(n, align) \
-+( \
-+ ((n) & ~((align) - 1)) \
-+)
-+
-+/******************************************************************************\
-+***************************** Element Count Macro *****************************
-+\******************************************************************************/
-+
-+#define gcmSIZEOF(a) \
-+( \
-+ (gctSIZE_T) (sizeof(a)) \
-+)
-+
-+#define gcmCOUNTOF(a) \
-+( \
-+ sizeof(a) / sizeof(a[0]) \
-+)
-+
-+/******************************************************************************\
-+********************************* Cast Macro **********************************
-+\******************************************************************************/
-+#define gcmNAME_TO_PTR(na) \
-+ gckKERNEL_QueryPointerFromName(kernel, gcmALL_TO_UINT32(na))
-+
-+#define gcmPTR_TO_NAME(ptr) \
-+ gckKERNEL_AllocateNameFromPointer(kernel, ptr)
-+
-+#define gcmRELEASE_NAME(na) \
-+ gckKERNEL_DeleteName(kernel, gcmALL_TO_UINT32(na))
-+
-+#define gcmALL_TO_UINT32(t) \
-+( \
-+ (gctUINT32) (gctUINTPTR_T) (t)\
-+)
-+
-+#define gcmPTR_TO_UINT64(p) \
-+( \
-+ (gctUINT64) (gctUINTPTR_T) (p)\
-+)
-+
-+#define gcmUINT64_TO_PTR(u) \
-+( \
-+ (gctPOINTER) (gctUINTPTR_T) (u)\
-+)
-+
-+#define gcmUINT64_TO_TYPE(u, t) \
-+( \
-+ (t) (gctUINTPTR_T) (u)\
-+)
-+
-+/******************************************************************************\
-+******************************** Useful Macro *********************************
-+\******************************************************************************/
-+
-+#define gcvINVALID_ADDRESS ~0U
-+
-+#define gcmGET_PRE_ROTATION(rotate) \
-+ ((rotate) & (~(gcvSURF_POST_FLIP_X | gcvSURF_POST_FLIP_Y)))
-+
-+#define gcmGET_POST_ROTATION(rotate) \
-+ ((rotate) & (gcvSURF_POST_FLIP_X | gcvSURF_POST_FLIP_Y))
-+
-+/******************************************************************************\
-+******************************** gcsOBJECT Object *******************************
-+\******************************************************************************/
-+
-+/* Type of objects. */
-+typedef enum _gceOBJECT_TYPE
-+{
-+ gcvOBJ_UNKNOWN = 0,
-+ gcvOBJ_2D = gcmCC('2','D',' ',' '),
-+ gcvOBJ_3D = gcmCC('3','D',' ',' '),
-+ gcvOBJ_ATTRIBUTE = gcmCC('A','T','T','R'),
-+ gcvOBJ_BRUSHCACHE = gcmCC('B','R','U','$'),
-+ gcvOBJ_BRUSHNODE = gcmCC('B','R','U','n'),
-+ gcvOBJ_BRUSH = gcmCC('B','R','U','o'),
-+ gcvOBJ_BUFFER = gcmCC('B','U','F','R'),
-+ gcvOBJ_COMMAND = gcmCC('C','M','D',' '),
-+ gcvOBJ_COMMANDBUFFER = gcmCC('C','M','D','B'),
-+ gcvOBJ_CONTEXT = gcmCC('C','T','X','T'),
-+ gcvOBJ_DEVICE = gcmCC('D','E','V',' '),
-+ gcvOBJ_DUMP = gcmCC('D','U','M','P'),
-+ gcvOBJ_EVENT = gcmCC('E','V','N','T'),
-+ gcvOBJ_FUNCTION = gcmCC('F','U','N','C'),
-+ gcvOBJ_HAL = gcmCC('H','A','L',' '),
-+ gcvOBJ_HARDWARE = gcmCC('H','A','R','D'),
-+ gcvOBJ_HEAP = gcmCC('H','E','A','P'),
-+ gcvOBJ_INDEX = gcmCC('I','N','D','X'),
-+ gcvOBJ_INTERRUPT = gcmCC('I','N','T','R'),
-+ gcvOBJ_KERNEL = gcmCC('K','E','R','N'),
-+ gcvOBJ_KERNEL_FUNCTION = gcmCC('K','F','C','N'),
-+ gcvOBJ_MEMORYBUFFER = gcmCC('M','E','M','B'),
-+ gcvOBJ_MMU = gcmCC('M','M','U',' '),
-+ gcvOBJ_OS = gcmCC('O','S',' ',' '),
-+ gcvOBJ_OUTPUT = gcmCC('O','U','T','P'),
-+ gcvOBJ_PAINT = gcmCC('P','N','T',' '),
-+ gcvOBJ_PATH = gcmCC('P','A','T','H'),
-+ gcvOBJ_QUEUE = gcmCC('Q','U','E',' '),
-+ gcvOBJ_SAMPLER = gcmCC('S','A','M','P'),
-+ gcvOBJ_SHADER = gcmCC('S','H','D','R'),
-+ gcvOBJ_STREAM = gcmCC('S','T','R','M'),
-+ gcvOBJ_SURF = gcmCC('S','U','R','F'),
-+ gcvOBJ_TEXTURE = gcmCC('T','X','T','R'),
-+ gcvOBJ_UNIFORM = gcmCC('U','N','I','F'),
-+ gcvOBJ_VARIABLE = gcmCC('V','A','R','I'),
-+ gcvOBJ_VERTEX = gcmCC('V','R','T','X'),
-+ gcvOBJ_VIDMEM = gcmCC('V','M','E','M'),
-+ gcvOBJ_VG = gcmCC('V','G',' ',' '),
-+ gcvOBJ_BUFOBJ = gcmCC('B','U','F','O'),
-+ gcvOBJ_UNIFORM_BLOCK = gcmCC('U','B','L','K'),
-+ gcvOBJ_CL = gcmCC('C','L',' ',' '),
-+}
-+gceOBJECT_TYPE;
-+
-+/* gcsOBJECT object defintinon. */
-+typedef struct _gcsOBJECT
-+{
-+ /* Type of an object. */
-+ gceOBJECT_TYPE type;
-+}
-+gcsOBJECT;
-+
-+typedef struct _gckHARDWARE * gckHARDWARE;
-+
-+/* CORE flags. */
-+typedef enum _gceCORE
-+{
-+ gcvCORE_MAJOR = 0x0,
-+ gcvCORE_2D = 0x1,
-+ gcvCORE_VG = 0x2,
-+#if gcdMULTI_GPU_AFFINITY
-+ gcvCORE_OCL = 0x3,
-+#endif
-+}
-+gceCORE;
-+
-+#if gcdMULTI_GPU_AFFINITY
-+#define gcdMAX_GPU_COUNT 4
-+#else
-+#define gcdMAX_GPU_COUNT 3
-+#endif
-+
-+#define gcdMAX_SURF_LAYER 4
-+
-+#define gcdMAX_DRAW_BUFFERS 4
-+
-+/*******************************************************************************
-+**
-+** gcmVERIFY_OBJECT
-+**
-+** Assert if an object is invalid or is not of the specified type. If the
-+** object is invalid or not of the specified type, gcvSTATUS_INVALID_OBJECT
-+** will be returned from the current function. In retail mode this macro
-+** does nothing.
-+**
-+** ARGUMENTS:
-+**
-+** obj Object to test.
-+** t Expected type of the object.
-+*/
-+#if gcmIS_DEBUG(gcdDEBUG_TRACE)
-+#define _gcmVERIFY_OBJECT(prefix, obj, t) \
-+ if ((obj) == gcvNULL) \
-+ { \
-+ prefix##TRACE(gcvLEVEL_ERROR, \
-+ #prefix "VERIFY_OBJECT failed: NULL"); \
-+ prefix##TRACE(gcvLEVEL_ERROR, " expected: %c%c%c%c", \
-+ gcmCC_PRINT(t)); \
-+ prefix##ASSERT((obj) != gcvNULL); \
-+ prefix##FOOTER_ARG("status=%d", gcvSTATUS_INVALID_OBJECT); \
-+ return gcvSTATUS_INVALID_OBJECT; \
-+ } \
-+ else if (((gcsOBJECT*) (obj))->type != t) \
-+ { \
-+ prefix##TRACE(gcvLEVEL_ERROR, \
-+ #prefix "VERIFY_OBJECT failed: %c%c%c%c", \
-+ gcmCC_PRINT(((gcsOBJECT*) (obj))->type)); \
-+ prefix##TRACE(gcvLEVEL_ERROR, " expected: %c%c%c%c", \
-+ gcmCC_PRINT(t)); \
-+ prefix##ASSERT(((gcsOBJECT*)(obj))->type == t); \
-+ prefix##FOOTER_ARG("status=%d", gcvSTATUS_INVALID_OBJECT); \
-+ return gcvSTATUS_INVALID_OBJECT; \
-+ }
-+
-+# define gcmVERIFY_OBJECT(obj, t) _gcmVERIFY_OBJECT(gcm, obj, t)
-+# define gcmkVERIFY_OBJECT(obj, t) _gcmVERIFY_OBJECT(gcmk, obj, t)
-+#else
-+# define gcmVERIFY_OBJECT(obj, t) do {} while (gcvFALSE)
-+# define gcmkVERIFY_OBJECT(obj, t) do {} while (gcvFALSE)
-+#endif
-+
-+/******************************************************************************/
-+/*VERIFY_OBJECT if special return expected*/
-+/******************************************************************************/
-+#ifndef EGL_API_ANDROID
-+# define _gcmVERIFY_OBJECT_RETURN(prefix, obj, t, retVal) \
-+ do \
-+ { \
-+ if ((obj) == gcvNULL) \
-+ { \
-+ prefix##PRINT_VERSION(); \
-+ prefix##TRACE(gcvLEVEL_ERROR, \
-+ #prefix "VERIFY_OBJECT_RETURN failed: NULL"); \
-+ prefix##TRACE(gcvLEVEL_ERROR, " expected: %c%c%c%c", \
-+ gcmCC_PRINT(t)); \
-+ prefix##ASSERT((obj) != gcvNULL); \
-+ prefix##FOOTER_ARG("retVal=%d", retVal); \
-+ return retVal; \
-+ } \
-+ else if (((gcsOBJECT*) (obj))->type != t) \
-+ { \
-+ prefix##PRINT_VERSION(); \
-+ prefix##TRACE(gcvLEVEL_ERROR, \
-+ #prefix "VERIFY_OBJECT_RETURN failed: %c%c%c%c", \
-+ gcmCC_PRINT(((gcsOBJECT*) (obj))->type)); \
-+ prefix##TRACE(gcvLEVEL_ERROR, " expected: %c%c%c%c", \
-+ gcmCC_PRINT(t)); \
-+ prefix##ASSERT(((gcsOBJECT*)(obj))->type == t); \
-+ prefix##FOOTER_ARG("retVal=%d", retVal); \
-+ return retVal; \
-+ } \
-+ } \
-+ while (gcvFALSE)
-+# define gcmVERIFY_OBJECT_RETURN(obj, t, retVal) \
-+ _gcmVERIFY_OBJECT_RETURN(gcm, obj, t, retVal)
-+# define gcmkVERIFY_OBJECT_RETURN(obj, t, retVal) \
-+ _gcmVERIFY_OBJECT_RETURN(gcmk, obj, t, retVal)
-+#else
-+# define gcmVERIFY_OBJECT_RETURN(obj, t) do {} while (gcvFALSE)
-+# define gcmVERIFY_OBJECT_RETURN(obj, t) do {} while (gcvFALSE)
-+#endif
-+
-+/******************************************************************************\
-+********************************** gckOS Object *********************************
-+\******************************************************************************/
-+
-+/* Construct a new gckOS object. */
-+gceSTATUS
-+gckOS_Construct(
-+ IN gctPOINTER Context,
-+ OUT gckOS * Os
-+ );
-+
-+/* Destroy an gckOS object. */
-+gceSTATUS
-+gckOS_Destroy(
-+ IN gckOS Os
-+ );
-+
-+/* Query the video memory. */
-+gceSTATUS
-+gckOS_QueryVideoMemory(
-+ IN gckOS Os,
-+ OUT gctPHYS_ADDR * InternalAddress,
-+ OUT gctSIZE_T * InternalSize,
-+ OUT gctPHYS_ADDR * ExternalAddress,
-+ OUT gctSIZE_T * ExternalSize,
-+ OUT gctPHYS_ADDR * ContiguousAddress,
-+ OUT gctSIZE_T * ContiguousSize
-+ );
-+
-+/* Allocate memory from the heap. */
-+gceSTATUS
-+gckOS_Allocate(
-+ IN gckOS Os,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPOINTER * Memory
-+ );
-+
-+/* Free allocated memory. */
-+gceSTATUS
-+gckOS_Free(
-+ IN gckOS Os,
-+ IN gctPOINTER Memory
-+ );
-+
-+/* Wrapper for allocation memory.. */
-+gceSTATUS
-+gckOS_AllocateMemory(
-+ IN gckOS Os,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPOINTER * Memory
-+ );
-+
-+/* Wrapper for freeing memory. */
-+gceSTATUS
-+gckOS_FreeMemory(
-+ IN gckOS Os,
-+ IN gctPOINTER Memory
-+ );
-+
-+/* Allocate paged memory. */
-+gceSTATUS
-+gckOS_AllocatePagedMemory(
-+ IN gckOS Os,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPHYS_ADDR * Physical
-+ );
-+
-+/* Allocate paged memory. */
-+gceSTATUS
-+gckOS_AllocatePagedMemoryEx(
-+ IN gckOS Os,
-+ IN gctUINT32 Flag,
-+ IN gctSIZE_T Bytes,
-+ OUT gctUINT32 * Gid,
-+ OUT gctPHYS_ADDR * Physical
-+ );
-+
-+/* Lock pages. */
-+gceSTATUS
-+gckOS_LockPages(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ IN gctBOOL Cacheable,
-+ OUT gctPOINTER * Logical,
-+ OUT gctSIZE_T * PageCount
-+ );
-+
-+/* Map pages. */
-+gceSTATUS
-+gckOS_MapPages(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T PageCount,
-+ IN gctPOINTER PageTable
-+ );
-+
-+/* Map pages. */
-+gceSTATUS
-+gckOS_MapPagesEx(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T PageCount,
-+ IN gctUINT32 Address,
-+ IN gctPOINTER PageTable
-+ );
-+
-+gceSTATUS
-+gckOS_UnmapPages(
-+ IN gckOS Os,
-+ IN gctSIZE_T PageCount,
-+ IN gctUINT32 Address
-+ );
-+
-+/* Unlock pages. */
-+gceSTATUS
-+gckOS_UnlockPages(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ IN gctPOINTER Logical
-+ );
-+
-+/* Free paged memory. */
-+gceSTATUS
-+gckOS_FreePagedMemory(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes
-+ );
-+
-+/* Allocate non-paged memory. */
-+gceSTATUS
-+gckOS_AllocateNonPagedMemory(
-+ IN gckOS Os,
-+ IN gctBOOL InUserSpace,
-+ IN OUT gctSIZE_T * Bytes,
-+ OUT gctPHYS_ADDR * Physical,
-+ OUT gctPOINTER * Logical
-+ );
-+
-+/* Free non-paged memory. */
-+gceSTATUS
-+gckOS_FreeNonPagedMemory(
-+ IN gckOS Os,
-+ IN gctSIZE_T Bytes,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctPOINTER Logical
-+ );
-+
-+/* Allocate contiguous memory. */
-+gceSTATUS
-+gckOS_AllocateContiguous(
-+ IN gckOS Os,
-+ IN gctBOOL InUserSpace,
-+ IN OUT gctSIZE_T * Bytes,
-+ OUT gctPHYS_ADDR * Physical,
-+ OUT gctPOINTER * Logical
-+ );
-+
-+/* Free contiguous memory. */
-+gceSTATUS
-+gckOS_FreeContiguous(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctPOINTER Logical,
-+ IN gctSIZE_T Bytes
-+ );
-+
-+/* Get the number fo bytes per page. */
-+gceSTATUS
-+gckOS_GetPageSize(
-+ IN gckOS Os,
-+ OUT gctSIZE_T * PageSize
-+ );
-+
-+/* Get the physical address of a corresponding logical address. */
-+gceSTATUS
-+gckOS_GetPhysicalAddress(
-+ IN gckOS Os,
-+ IN gctPOINTER Logical,
-+ OUT gctUINT32 * Address
-+ );
-+
-+/* Get the physical address of a corresponding user logical address. */
-+gceSTATUS
-+gckOS_UserLogicalToPhysical(
-+ IN gckOS Os,
-+ IN gctPOINTER Logical,
-+ OUT gctUINT32 * Address
-+ );
-+
-+/* Get the physical address of a corresponding logical address. */
-+gceSTATUS
-+gckOS_GetPhysicalAddressProcess(
-+ IN gckOS Os,
-+ IN gctPOINTER Logical,
-+ IN gctUINT32 ProcessID,
-+ OUT gctUINT32 * Address
-+ );
-+
-+/* Map physical memory. */
-+gceSTATUS
-+gckOS_MapPhysical(
-+ IN gckOS Os,
-+ IN gctUINT32 Physical,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPOINTER * Logical
-+ );
-+
-+/* Unmap previously mapped physical memory. */
-+gceSTATUS
-+gckOS_UnmapPhysical(
-+ IN gckOS Os,
-+ IN gctPOINTER Logical,
-+ IN gctSIZE_T Bytes
-+ );
-+
-+/* Get real physical address from descriptor. */
-+gceSTATUS
-+gckOS_PhysicalToPhysicalAddress(
-+ IN gckOS Os,
-+ IN gctPOINTER Physical,
-+ OUT gctUINT32 * PhysicalAddress
-+ );
-+
-+/* Read data from a hardware register. */
-+gceSTATUS
-+gckOS_ReadRegister(
-+ IN gckOS Os,
-+ IN gctUINT32 Address,
-+ OUT gctUINT32 * Data
-+ );
-+
-+/* Read data from a hardware register. */
-+gceSTATUS
-+gckOS_ReadRegisterEx(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctUINT32 Address,
-+ OUT gctUINT32 * Data
-+ );
-+
-+/* Write data to a hardware register. */
-+gceSTATUS
-+gckOS_WriteRegister(
-+ IN gckOS Os,
-+ IN gctUINT32 Address,
-+ IN gctUINT32 Data
-+ );
-+
-+/* Write data to a hardware register. */
-+gceSTATUS
-+gckOS_WriteRegisterEx(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctUINT32 Address,
-+ IN gctUINT32 Data
-+ );
-+
-+#if gcdMULTI_GPU
-+gceSTATUS
-+gckOS_ReadRegisterByCoreId(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctUINT32 CoreId,
-+ IN gctUINT32 Address,
-+ OUT gctUINT32 * Data
-+ );
-+
-+gceSTATUS
-+gckOS_WriteRegisterByCoreId(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctUINT32 CoreId,
-+ IN gctUINT32 Address,
-+ IN gctUINT32 Data
-+ );
-+#endif
-+
-+/* Write data to a 32-bit memory location. */
-+gceSTATUS
-+gckOS_WriteMemory(
-+ IN gckOS Os,
-+ IN gctPOINTER Address,
-+ IN gctUINT32 Data
-+ );
-+
-+/* Map physical memory into the process space. */
-+gceSTATUS
-+gckOS_MapMemory(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPOINTER * Logical
-+ );
-+
-+/* Unmap physical memory from the specified process space. */
-+gceSTATUS
-+gckOS_UnmapMemoryEx(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ IN gctPOINTER Logical,
-+ IN gctUINT32 PID
-+ );
-+
-+/* Unmap physical memory from the process space. */
-+gceSTATUS
-+gckOS_UnmapMemory(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ IN gctPOINTER Logical
-+ );
-+
-+/* Unmap user logical memory out of physical memory.
-+ * This function is only supported in Linux currently.
-+ */
-+gceSTATUS
-+gckOS_UnmapUserLogical(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ IN gctPOINTER Logical
-+ );
-+
-+/* Create a new mutex. */
-+gceSTATUS
-+gckOS_CreateMutex(
-+ IN gckOS Os,
-+ OUT gctPOINTER * Mutex
-+ );
-+
-+/* Delete a mutex. */
-+gceSTATUS
-+gckOS_DeleteMutex(
-+ IN gckOS Os,
-+ IN gctPOINTER Mutex
-+ );
-+
-+/* Acquire a mutex. */
-+gceSTATUS
-+gckOS_AcquireMutex(
-+ IN gckOS Os,
-+ IN gctPOINTER Mutex,
-+ IN gctUINT32 Timeout
-+ );
-+
-+/* Release a mutex. */
-+gceSTATUS
-+gckOS_ReleaseMutex(
-+ IN gckOS Os,
-+ IN gctPOINTER Mutex
-+ );
-+
-+/* Atomically exchange a pair of 32-bit values. */
-+gceSTATUS
-+gckOS_AtomicExchange(
-+ IN gckOS Os,
-+ IN OUT gctUINT32_PTR Target,
-+ IN gctUINT32 NewValue,
-+ OUT gctUINT32_PTR OldValue
-+ );
-+
-+/* Atomically exchange a pair of pointers. */
-+gceSTATUS
-+gckOS_AtomicExchangePtr(
-+ IN gckOS Os,
-+ IN OUT gctPOINTER * Target,
-+ IN gctPOINTER NewValue,
-+ OUT gctPOINTER * OldValue
-+ );
-+
-+gceSTATUS
-+gckOS_AtomSetMask(
-+ IN gctPOINTER Atom,
-+ IN gctUINT32 Mask
-+ );
-+
-+gceSTATUS
-+gckOS_AtomClearMask(
-+ IN gctPOINTER Atom,
-+ IN gctUINT32 Mask
-+ );
-+
-+gceSTATUS
-+gckOS_DumpCallStack(
-+ IN gckOS Os
-+ );
-+
-+gceSTATUS
-+gckOS_GetProcessNameByPid(
-+ IN gctINT Pid,
-+ IN gctSIZE_T Length,
-+ OUT gctUINT8_PTR String
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_AtomConstruct
-+**
-+** Create an atom.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to a gckOS object.
-+**
-+** OUTPUT:
-+**
-+** gctPOINTER * Atom
-+** Pointer to a variable receiving the constructed atom.
-+*/
-+gceSTATUS
-+gckOS_AtomConstruct(
-+ IN gckOS Os,
-+ OUT gctPOINTER * Atom
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_AtomDestroy
-+**
-+** Destroy an atom.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to a gckOS object.
-+**
-+** gctPOINTER Atom
-+** Pointer to the atom to destroy.
-+**
-+** OUTPUT:
-+**
-+** Nothing.
-+*/
-+gceSTATUS
-+gckOS_AtomDestroy(
-+ IN gckOS Os,
-+ OUT gctPOINTER Atom
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_AtomGet
-+**
-+** Get the 32-bit value protected by an atom.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to a gckOS object.
-+**
-+** gctPOINTER Atom
-+** Pointer to the atom.
-+**
-+** OUTPUT:
-+**
-+** gctINT32_PTR Value
-+** Pointer to a variable the receives the value of the atom.
-+*/
-+gceSTATUS
-+gckOS_AtomGet(
-+ IN gckOS Os,
-+ IN gctPOINTER Atom,
-+ OUT gctINT32_PTR Value
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_AtomSet
-+**
-+** Set the 32-bit value protected by an atom.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to a gckOS object.
-+**
-+** gctPOINTER Atom
-+** Pointer to the atom.
-+**
-+** gctINT32 Value
-+** The value of the atom.
-+**
-+** OUTPUT:
-+**
-+** Nothing.
-+*/
-+gceSTATUS
-+gckOS_AtomSet(
-+ IN gckOS Os,
-+ IN gctPOINTER Atom,
-+ IN gctINT32 Value
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_AtomIncrement
-+**
-+** Atomically increment the 32-bit integer value inside an atom.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to a gckOS object.
-+**
-+** gctPOINTER Atom
-+** Pointer to the atom.
-+**
-+** OUTPUT:
-+**
-+** gctINT32_PTR Value
-+** Pointer to a variable the receives the original value of the atom.
-+*/
-+gceSTATUS
-+gckOS_AtomIncrement(
-+ IN gckOS Os,
-+ IN gctPOINTER Atom,
-+ OUT gctINT32_PTR Value
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_AtomDecrement
-+**
-+** Atomically decrement the 32-bit integer value inside an atom.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to a gckOS object.
-+**
-+** gctPOINTER Atom
-+** Pointer to the atom.
-+**
-+** OUTPUT:
-+**
-+** gctINT32_PTR Value
-+** Pointer to a variable the receives the original value of the atom.
-+*/
-+gceSTATUS
-+gckOS_AtomDecrement(
-+ IN gckOS Os,
-+ IN gctPOINTER Atom,
-+ OUT gctINT32_PTR Value
-+ );
-+
-+/* Delay a number of microseconds. */
-+gceSTATUS
-+gckOS_Delay(
-+ IN gckOS Os,
-+ IN gctUINT32 Delay
-+ );
-+
-+/* Get time in milliseconds. */
-+gceSTATUS
-+gckOS_GetTicks(
-+ OUT gctUINT32_PTR Time
-+ );
-+
-+/* Compare time value. */
-+gceSTATUS
-+gckOS_TicksAfter(
-+ IN gctUINT32 Time1,
-+ IN gctUINT32 Time2,
-+ OUT gctBOOL_PTR IsAfter
-+ );
-+
-+/* Get time in microseconds. */
-+gceSTATUS
-+gckOS_GetTime(
-+ OUT gctUINT64_PTR Time
-+ );
-+
-+/* Memory barrier. */
-+gceSTATUS
-+gckOS_MemoryBarrier(
-+ IN gckOS Os,
-+ IN gctPOINTER Address
-+ );
-+
-+/* Map user pointer. */
-+gceSTATUS
-+gckOS_MapUserPointer(
-+ IN gckOS Os,
-+ IN gctPOINTER Pointer,
-+ IN gctSIZE_T Size,
-+ OUT gctPOINTER * KernelPointer
-+ );
-+
-+/* Unmap user pointer. */
-+gceSTATUS
-+gckOS_UnmapUserPointer(
-+ IN gckOS Os,
-+ IN gctPOINTER Pointer,
-+ IN gctSIZE_T Size,
-+ IN gctPOINTER KernelPointer
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_QueryNeedCopy
-+**
-+** Query whether the memory can be accessed or mapped directly or it has to be
-+** copied.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to an gckOS object.
-+**
-+** gctUINT32 ProcessID
-+** Process ID of the current process.
-+**
-+** OUTPUT:
-+**
-+** gctBOOL_PTR NeedCopy
-+** Pointer to a boolean receiving gcvTRUE if the memory needs a copy or
-+** gcvFALSE if the memory can be accessed or mapped dircetly.
-+*/
-+gceSTATUS
-+gckOS_QueryNeedCopy(
-+ IN gckOS Os,
-+ IN gctUINT32 ProcessID,
-+ OUT gctBOOL_PTR NeedCopy
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_CopyFromUserData
-+**
-+** Copy data from user to kernel memory.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to an gckOS object.
-+**
-+** gctPOINTER KernelPointer
-+** Pointer to kernel memory.
-+**
-+** gctPOINTER Pointer
-+** Pointer to user memory.
-+**
-+** gctSIZE_T Size
-+** Number of bytes to copy.
-+**
-+** OUTPUT:
-+**
-+** Nothing.
-+*/
-+gceSTATUS
-+gckOS_CopyFromUserData(
-+ IN gckOS Os,
-+ IN gctPOINTER KernelPointer,
-+ IN gctPOINTER Pointer,
-+ IN gctSIZE_T Size
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_CopyToUserData
-+**
-+** Copy data from kernel to user memory.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to an gckOS object.
-+**
-+** gctPOINTER KernelPointer
-+** Pointer to kernel memory.
-+**
-+** gctPOINTER Pointer
-+** Pointer to user memory.
-+**
-+** gctSIZE_T Size
-+** Number of bytes to copy.
-+**
-+** OUTPUT:
-+**
-+** Nothing.
-+*/
-+gceSTATUS
-+gckOS_CopyToUserData(
-+ IN gckOS Os,
-+ IN gctPOINTER KernelPointer,
-+ IN gctPOINTER Pointer,
-+ IN gctSIZE_T Size
-+ );
-+
-+gceSTATUS
-+gckOS_SuspendInterrupt(
-+ IN gckOS Os
-+ );
-+
-+gceSTATUS
-+gckOS_SuspendInterruptEx(
-+ IN gckOS Os,
-+ IN gceCORE Core
-+ );
-+
-+gceSTATUS
-+gckOS_ResumeInterrupt(
-+ IN gckOS Os
-+ );
-+
-+gceSTATUS
-+gckOS_ResumeInterruptEx(
-+ IN gckOS Os,
-+ IN gceCORE Core
-+ );
-+
-+/* Get the base address for the physical memory. */
-+gceSTATUS
-+gckOS_GetBaseAddress(
-+ IN gckOS Os,
-+ OUT gctUINT32_PTR BaseAddress
-+ );
-+
-+/* Perform a memory copy. */
-+gceSTATUS
-+gckOS_MemCopy(
-+ IN gctPOINTER Destination,
-+ IN gctCONST_POINTER Source,
-+ IN gctSIZE_T Bytes
-+ );
-+
-+/* Zero memory. */
-+gceSTATUS
-+gckOS_ZeroMemory(
-+ IN gctPOINTER Memory,
-+ IN gctSIZE_T Bytes
-+ );
-+
-+/* Device I/O control to the kernel HAL layer. */
-+gceSTATUS
-+gckOS_DeviceControl(
-+ IN gckOS Os,
-+ IN gctBOOL FromUser,
-+ IN gctUINT32 IoControlCode,
-+ IN gctPOINTER InputBuffer,
-+ IN gctSIZE_T InputBufferSize,
-+ OUT gctPOINTER OutputBuffer,
-+ IN gctSIZE_T OutputBufferSize
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_GetProcessID
-+**
-+** Get current process ID.
-+**
-+** INPUT:
-+**
-+** Nothing.
-+**
-+** OUTPUT:
-+**
-+** gctUINT32_PTR ProcessID
-+** Pointer to the variable that receives the process ID.
-+*/
-+gceSTATUS
-+gckOS_GetProcessID(
-+ OUT gctUINT32_PTR ProcessID
-+ );
-+
-+gceSTATUS
-+gckOS_GetCurrentProcessID(
-+ OUT gctUINT32_PTR ProcessID
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_GetThreadID
-+**
-+** Get current thread ID.
-+**
-+** INPUT:
-+**
-+** Nothing.
-+**
-+** OUTPUT:
-+**
-+** gctUINT32_PTR ThreadID
-+** Pointer to the variable that receives the thread ID.
-+*/
-+gceSTATUS
-+gckOS_GetThreadID(
-+ OUT gctUINT32_PTR ThreadID
-+ );
-+
-+#if gcdSECURITY
-+gceSTATUS
-+gckOS_OpenSecurityChannel(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ OUT gctUINT32 *Channel
-+ );
-+
-+gceSTATUS
-+gckOS_CloseSecurityChannel(
-+ IN gctUINT32 Channel
-+ );
-+
-+gceSTATUS
-+gckOS_CallSecurityService(
-+ IN gctUINT32 Channel,
-+ IN gcsTA_INTERFACE * Interface
-+ );
-+
-+gceSTATUS
-+gckOS_InitSecurityChannel(
-+ OUT gctUINT32 Channel
-+ );
-+
-+gceSTATUS
-+gckOS_AllocatePageArray(
-+ IN gckOS Os,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T PageCount,
-+ OUT gctPOINTER * PageArrayLogical,
-+ OUT gctPHYS_ADDR * PageArrayPhysical
-+ );
-+#endif
-+
-+/******************************************************************************\
-+********************************** Signal Object *********************************
-+\******************************************************************************/
-+
-+/* Create a signal. */
-+gceSTATUS
-+gckOS_CreateSignal(
-+ IN gckOS Os,
-+ IN gctBOOL ManualReset,
-+ OUT gctSIGNAL * Signal
-+ );
-+
-+/* Destroy a signal. */
-+gceSTATUS
-+gckOS_DestroySignal(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal
-+ );
-+
-+/* Signal a signal. */
-+gceSTATUS
-+gckOS_Signal(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal,
-+ IN gctBOOL State
-+ );
-+
-+/* Wait for a signal. */
-+gceSTATUS
-+gckOS_WaitSignal(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal,
-+ IN gctUINT32 Wait
-+ );
-+
-+/* Map a user signal to the kernel space. */
-+gceSTATUS
-+gckOS_MapSignal(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal,
-+ IN gctHANDLE Process,
-+ OUT gctSIGNAL * MappedSignal
-+ );
-+
-+/* Unmap a user signal */
-+gceSTATUS
-+gckOS_UnmapSignal(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal
-+ );
-+
-+/* Map user memory. */
-+gceSTATUS
-+gckOS_MapUserMemory(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctPOINTER Memory,
-+ IN gctUINT32 Physical,
-+ IN gctSIZE_T Size,
-+ OUT gctPOINTER * Info,
-+ OUT gctUINT32_PTR Address
-+ );
-+
-+/* Unmap user memory. */
-+gceSTATUS
-+gckOS_UnmapUserMemory(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctPOINTER Memory,
-+ IN gctSIZE_T Size,
-+ IN gctPOINTER Info,
-+ IN gctUINT32 Address
-+ );
-+
-+/******************************************************************************\
-+************************** Android Native Fence Sync ***************************
-+\******************************************************************************/
-+gceSTATUS
-+gckOS_CreateSyncTimeline(
-+ IN gckOS Os,
-+ OUT gctHANDLE * Timeline
-+ );
-+
-+gceSTATUS
-+gckOS_DestroySyncTimeline(
-+ IN gckOS Os,
-+ IN gctHANDLE Timeline
-+ );
-+
-+gceSTATUS
-+gckOS_CreateSyncPoint(
-+ IN gckOS Os,
-+ OUT gctSYNC_POINT * SyncPoint
-+ );
-+
-+gceSTATUS
-+gckOS_ReferenceSyncPoint(
-+ IN gckOS Os,
-+ IN gctSYNC_POINT SyncPoint
-+ );
-+
-+gceSTATUS
-+gckOS_DestroySyncPoint(
-+ IN gckOS Os,
-+ IN gctSYNC_POINT SyncPoint
-+ );
-+
-+gceSTATUS
-+gckOS_SignalSyncPoint(
-+ IN gckOS Os,
-+ IN gctSYNC_POINT SyncPoint
-+ );
-+
-+gceSTATUS
-+gckOS_QuerySyncPoint(
-+ IN gckOS Os,
-+ IN gctSYNC_POINT SyncPoint,
-+ OUT gctBOOL_PTR State
-+ );
-+
-+gceSTATUS
-+gckOS_CreateNativeFence(
-+ IN gckOS Os,
-+ IN gctHANDLE Timeline,
-+ IN gctSYNC_POINT SyncPoint,
-+ OUT gctINT * FenceFD
-+ );
-+
-+#if !USE_NEW_LINUX_SIGNAL
-+/* Create signal to be used in the user space. */
-+gceSTATUS
-+gckOS_CreateUserSignal(
-+ IN gckOS Os,
-+ IN gctBOOL ManualReset,
-+ OUT gctINT * SignalID
-+ );
-+
-+/* Destroy signal used in the user space. */
-+gceSTATUS
-+gckOS_DestroyUserSignal(
-+ IN gckOS Os,
-+ IN gctINT SignalID
-+ );
-+
-+/* Wait for signal used in the user space. */
-+gceSTATUS
-+gckOS_WaitUserSignal(
-+ IN gckOS Os,
-+ IN gctINT SignalID,
-+ IN gctUINT32 Wait
-+ );
-+
-+/* Signal a signal used in the user space. */
-+gceSTATUS
-+gckOS_SignalUserSignal(
-+ IN gckOS Os,
-+ IN gctINT SignalID,
-+ IN gctBOOL State
-+ );
-+#endif /* USE_NEW_LINUX_SIGNAL */
-+
-+/* Set a signal owned by a process. */
-+#if defined(__QNXNTO__)
-+gceSTATUS
-+gckOS_UserSignal(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal,
-+ IN gctINT Recvid,
-+ IN gctINT Coid
-+ );
-+#else
-+gceSTATUS
-+gckOS_UserSignal(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal,
-+ IN gctHANDLE Process
-+ );
-+#endif
-+
-+/******************************************************************************\
-+** Cache Support
-+*/
-+
-+gceSTATUS
-+gckOS_CacheClean(
-+ gckOS Os,
-+ gctUINT32 ProcessID,
-+ gctPHYS_ADDR Handle,
-+ gctUINT32 Physical,
-+ gctPOINTER Logical,
-+ gctSIZE_T Bytes
-+ );
-+
-+gceSTATUS
-+gckOS_CacheFlush(
-+ gckOS Os,
-+ gctUINT32 ProcessID,
-+ gctPHYS_ADDR Handle,
-+ gctUINT32 Physical,
-+ gctPOINTER Logical,
-+ gctSIZE_T Bytes
-+ );
-+
-+gceSTATUS
-+gckOS_CacheInvalidate(
-+ gckOS Os,
-+ gctUINT32 ProcessID,
-+ gctPHYS_ADDR Handle,
-+ gctUINT32 Physical,
-+ gctPOINTER Logical,
-+ gctSIZE_T Bytes
-+ );
-+
-+gceSTATUS
-+gckOS_CPUPhysicalToGPUPhysical(
-+ IN gckOS Os,
-+ IN gctUINT32 CPUPhysical,
-+ IN gctUINT32_PTR GPUPhysical
-+ );
-+
-+gceSTATUS
-+gckOS_GPUPhysicalToCPUPhysical(
-+ IN gckOS Os,
-+ IN gctUINT32 GPUPhysical,
-+ IN gctUINT32_PTR CPUPhysical
-+ );
-+
-+gceSTATUS
-+gckOS_QueryOption(
-+ IN gckOS Os,
-+ IN gctCONST_STRING Option,
-+ OUT gctUINT32 * Value
-+ );
-+
-+/******************************************************************************\
-+** Debug Support
-+*/
-+
-+void
-+gckOS_SetDebugLevel(
-+ IN gctUINT32 Level
-+ );
-+
-+void
-+gckOS_SetDebugZone(
-+ IN gctUINT32 Zone
-+ );
-+
-+void
-+gckOS_SetDebugLevelZone(
-+ IN gctUINT32 Level,
-+ IN gctUINT32 Zone
-+ );
-+
-+void
-+gckOS_SetDebugZones(
-+ IN gctUINT32 Zones,
-+ IN gctBOOL Enable
-+ );
-+
-+void
-+gckOS_SetDebugFile(
-+ IN gctCONST_STRING FileName
-+ );
-+
-+/*******************************************************************************
-+** Broadcast interface.
-+*/
-+
-+typedef enum _gceBROADCAST
-+{
-+ /* GPU might be idle. */
-+ gcvBROADCAST_GPU_IDLE,
-+
-+ /* A commit is going to happen. */
-+ gcvBROADCAST_GPU_COMMIT,
-+
-+ /* GPU seems to be stuck. */
-+ gcvBROADCAST_GPU_STUCK,
-+
-+ /* First process gets attached. */
-+ gcvBROADCAST_FIRST_PROCESS,
-+
-+ /* Last process gets detached. */
-+ gcvBROADCAST_LAST_PROCESS,
-+
-+ /* AXI bus error. */
-+ gcvBROADCAST_AXI_BUS_ERROR,
-+
-+ /* Out of memory. */
-+ gcvBROADCAST_OUT_OF_MEMORY,
-+}
-+gceBROADCAST;
-+
-+gceSTATUS
-+gckOS_Broadcast(
-+ IN gckOS Os,
-+ IN gckHARDWARE Hardware,
-+ IN gceBROADCAST Reason
-+ );
-+
-+gceSTATUS
-+gckOS_BroadcastHurry(
-+ IN gckOS Os,
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT Urgency
-+ );
-+
-+gceSTATUS
-+gckOS_BroadcastCalibrateSpeed(
-+ IN gckOS Os,
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT Idle,
-+ IN gctUINT Time
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckOS_SetGPUPower
-+**
-+** Set the power of the GPU on or off.
-+**
-+** INPUT:
-+**
-+** gckOS Os
-+** Pointer to a gckOS object.
-+**
-+** gceCORE Core
-+** GPU whose power is set.
-+**
-+** gctBOOL Clock
-+** gcvTRUE to turn on the clock, or gcvFALSE to turn off the clock.
-+**
-+** gctBOOL Power
-+** gcvTRUE to turn on the power, or gcvFALSE to turn off the power.
-+**
-+** OUTPUT:
-+**
-+** Nothing.
-+*/
-+gceSTATUS
-+gckOS_SetGPUPower(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctBOOL Clock,
-+ IN gctBOOL Power
-+ );
-+
-+gceSTATUS
-+gckOS_ResetGPU(
-+ IN gckOS Os,
-+ IN gceCORE Core
-+ );
-+
-+gceSTATUS
-+gckOS_PrepareGPUFrequency(
-+ IN gckOS Os,
-+ IN gceCORE Core
-+ );
-+
-+gceSTATUS
-+gckOS_FinishGPUFrequency(
-+ IN gckOS Os,
-+ IN gceCORE Core
-+ );
-+
-+gceSTATUS
-+gckOS_QueryGPUFrequency(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ OUT gctUINT32 * Frequency,
-+ OUT gctUINT8 * Scale
-+ );
-+
-+gceSTATUS
-+gckOS_SetGPUFrequency(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctUINT8 Scale
-+ );
-+
-+/*******************************************************************************
-+** Semaphores.
-+*/
-+
-+/* Create a new semaphore. */
-+gceSTATUS
-+gckOS_CreateSemaphore(
-+ IN gckOS Os,
-+ OUT gctPOINTER * Semaphore
-+ );
-+
-+#if gcdENABLE_VG
-+gceSTATUS
-+gckOS_CreateSemaphoreVG(
-+ IN gckOS Os,
-+ OUT gctPOINTER * Semaphore
-+ );
-+#endif
-+
-+/* Delete a semahore. */
-+gceSTATUS
-+gckOS_DestroySemaphore(
-+ IN gckOS Os,
-+ IN gctPOINTER Semaphore
-+ );
-+
-+/* Acquire a semahore. */
-+gceSTATUS
-+gckOS_AcquireSemaphore(
-+ IN gckOS Os,
-+ IN gctPOINTER Semaphore
-+ );
-+
-+/* Try to acquire a semahore. */
-+gceSTATUS
-+gckOS_TryAcquireSemaphore(
-+ IN gckOS Os,
-+ IN gctPOINTER Semaphore
-+ );
-+
-+/* Release a semahore. */
-+gceSTATUS
-+gckOS_ReleaseSemaphore(
-+ IN gckOS Os,
-+ IN gctPOINTER Semaphore
-+ );
-+
-+/*******************************************************************************
-+** Timer API.
-+*/
-+
-+typedef void (*gctTIMERFUNCTION)(gctPOINTER);
-+
-+/* Create a timer. */
-+gceSTATUS
-+gckOS_CreateTimer(
-+ IN gckOS Os,
-+ IN gctTIMERFUNCTION Function,
-+ IN gctPOINTER Data,
-+ OUT gctPOINTER * Timer
-+ );
-+
-+/* Destory a timer. */
-+gceSTATUS
-+gckOS_DestroyTimer(
-+ IN gckOS Os,
-+ IN gctPOINTER Timer
-+ );
-+
-+/* Start a timer. */
-+gceSTATUS
-+gckOS_StartTimer(
-+ IN gckOS Os,
-+ IN gctPOINTER Timer,
-+ IN gctUINT32 Delay
-+ );
-+
-+/* Stop a timer. */
-+gceSTATUS
-+gckOS_StopTimer(
-+ IN gckOS Os,
-+ IN gctPOINTER Timer
-+ );
-+
-+/******************************************************************************\
-+********************************* gckHEAP Object ********************************
-+\******************************************************************************/
-+
-+typedef struct _gckHEAP * gckHEAP;
-+
-+/* Construct a new gckHEAP object. */
-+gceSTATUS
-+gckHEAP_Construct(
-+ IN gckOS Os,
-+ IN gctSIZE_T AllocationSize,
-+ OUT gckHEAP * Heap
-+ );
-+
-+/* Destroy an gckHEAP object. */
-+gceSTATUS
-+gckHEAP_Destroy(
-+ IN gckHEAP Heap
-+ );
-+
-+/* Allocate memory. */
-+gceSTATUS
-+gckHEAP_Allocate(
-+ IN gckHEAP Heap,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPOINTER * Node
-+ );
-+
-+/* Free memory. */
-+gceSTATUS
-+gckHEAP_Free(
-+ IN gckHEAP Heap,
-+ IN gctPOINTER Node
-+ );
-+
-+/* Profile the heap. */
-+gceSTATUS
-+gckHEAP_ProfileStart(
-+ IN gckHEAP Heap
-+ );
-+
-+gceSTATUS
-+gckHEAP_ProfileEnd(
-+ IN gckHEAP Heap,
-+ IN gctCONST_STRING Title
-+ );
-+
-+
-+/******************************************************************************\
-+******************************** gckVIDMEM Object ******************************
-+\******************************************************************************/
-+
-+typedef struct _gckVIDMEM * gckVIDMEM;
-+typedef struct _gckKERNEL * gckKERNEL;
-+typedef struct _gckDB * gckDB;
-+typedef struct _gckDVFS * gckDVFS;
-+
-+/* Construct a new gckVIDMEM object. */
-+gceSTATUS
-+gckVIDMEM_Construct(
-+ IN gckOS Os,
-+ IN gctUINT32 BaseAddress,
-+ IN gctSIZE_T Bytes,
-+ IN gctSIZE_T Threshold,
-+ IN gctSIZE_T Banking,
-+ OUT gckVIDMEM * Memory
-+ );
-+
-+/* Destroy an gckVDIMEM object. */
-+gceSTATUS
-+gckVIDMEM_Destroy(
-+ IN gckVIDMEM Memory
-+ );
-+
-+/* Allocate linear memory. */
-+gceSTATUS
-+gckVIDMEM_AllocateLinear(
-+ IN gckKERNEL Kernel,
-+ IN gckVIDMEM Memory,
-+ IN gctSIZE_T Bytes,
-+ IN gctUINT32 Alignment,
-+ IN gceSURF_TYPE Type,
-+ IN gctBOOL Specified,
-+ OUT gcuVIDMEM_NODE_PTR * Node
-+ );
-+
-+/* Free memory. */
-+gceSTATUS
-+gckVIDMEM_Free(
-+ IN gckKERNEL Kernel,
-+ IN gcuVIDMEM_NODE_PTR Node
-+ );
-+
-+/* Lock memory. */
-+gceSTATUS
-+gckVIDMEM_Lock(
-+ IN gckKERNEL Kernel,
-+ IN gckVIDMEM_NODE Node,
-+ IN gctBOOL Cacheable,
-+ OUT gctUINT32 * Address,
-+ OUT gctUINT32 * Gid,
-+ OUT gctUINT64 * PhysicalAddress
-+ );
-+
-+/* Unlock memory. */
-+gceSTATUS
-+gckVIDMEM_Unlock(
-+ IN gckKERNEL Kernel,
-+ IN gckVIDMEM_NODE Node,
-+ IN gceSURF_TYPE Type,
-+ IN OUT gctBOOL * Asynchroneous
-+ );
-+
-+/* Construct a gcuVIDMEM_NODE union for virtual memory. */
-+gceSTATUS
-+gckVIDMEM_ConstructVirtual(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 Flag,
-+ IN gctSIZE_T Bytes,
-+ OUT gcuVIDMEM_NODE_PTR * Node
-+ );
-+
-+/* Destroy a gcuVIDMEM_NODE union for virtual memory. */
-+gceSTATUS
-+gckVIDMEM_DestroyVirtual(
-+ IN gcuVIDMEM_NODE_PTR Node
-+ );
-+
-+/******************************************************************************\
-+******************************** gckKERNEL Object ******************************
-+\******************************************************************************/
-+
-+struct _gcsHAL_INTERFACE;
-+
-+/* Notifications. */
-+typedef enum _gceNOTIFY
-+{
-+ gcvNOTIFY_INTERRUPT,
-+ gcvNOTIFY_COMMAND_QUEUE,
-+}
-+gceNOTIFY;
-+
-+/* Flush flags. */
-+typedef enum _gceKERNEL_FLUSH
-+{
-+ gcvFLUSH_COLOR = 0x01,
-+ gcvFLUSH_DEPTH = 0x02,
-+ gcvFLUSH_TEXTURE = 0x04,
-+ gcvFLUSH_2D = 0x08,
-+#if gcdMULTI_GPU
-+ gcvFLUSH_L2 = 0x10,
-+#endif
-+ gcvFLUSH_TILE_STATUS = 0x20,
-+ gcvFLUSH_ALL = gcvFLUSH_COLOR
-+ | gcvFLUSH_DEPTH
-+ | gcvFLUSH_TEXTURE
-+ | gcvFLUSH_2D
-+#if gcdMULTI_GPU
-+ | gcvFLUSH_L2
-+#endif
-+ | gcvFLUSH_TILE_STATUS
-+}
-+gceKERNEL_FLUSH;
-+
-+/* Construct a new gckKERNEL object. */
-+gceSTATUS
-+gckKERNEL_Construct(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ IN gctPOINTER Context,
-+ IN gckDB SharedDB,
-+ OUT gckKERNEL * Kernel
-+ );
-+
-+/* Destroy an gckKERNEL object. */
-+gceSTATUS
-+gckKERNEL_Destroy(
-+ IN gckKERNEL Kernel
-+ );
-+
-+/* Dispatch a user-level command. */
-+gceSTATUS
-+gckKERNEL_Dispatch(
-+ IN gckKERNEL Kernel,
-+ IN gctBOOL FromUser,
-+ IN OUT struct _gcsHAL_INTERFACE * Interface
-+ );
-+
-+/* Query Database requirements. */
-+gceSTATUS
-+ gckKERNEL_QueryDatabase(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ IN OUT gcsHAL_INTERFACE * Interface
-+ );
-+
-+/* Query the video memory. */
-+gceSTATUS
-+gckKERNEL_QueryVideoMemory(
-+ IN gckKERNEL Kernel,
-+ OUT struct _gcsHAL_INTERFACE * Interface
-+ );
-+
-+/* Lookup the gckVIDMEM object for a pool. */
-+gceSTATUS
-+gckKERNEL_GetVideoMemoryPool(
-+ IN gckKERNEL Kernel,
-+ IN gcePOOL Pool,
-+ OUT gckVIDMEM * VideoMemory
-+ );
-+
-+gceSTATUS
-+gckKERNEL_AllocateLinearMemory(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ IN OUT gcePOOL * Pool,
-+ IN gctSIZE_T Bytes,
-+ IN gctUINT32 Alignment,
-+ IN gceSURF_TYPE Type,
-+ IN gctUINT32 Flag,
-+ OUT gctUINT32 * Node
-+ );
-+
-+gceSTATUS
-+gckKERNEL_ReleaseVideoMemory(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ IN gctUINT32 Handle
-+ );
-+
-+gceSTATUS
-+gckKERNEL_LockVideoMemory(
-+ IN gckKERNEL Kernel,
-+ IN gceCORE Core,
-+ IN gctUINT32 ProcessID,
-+ IN gctBOOL FromUser,
-+ IN OUT gcsHAL_INTERFACE * Interface
-+ );
-+
-+gceSTATUS
-+gckKERNEL_UnlockVideoMemory(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 ProcessID,
-+ IN OUT gcsHAL_INTERFACE * Interface
-+ );
-+
-+/* Map video memory. */
-+gceSTATUS
-+gckKERNEL_MapVideoMemory(
-+ IN gckKERNEL Kernel,
-+ IN gctBOOL InUserSpace,
-+ IN gctUINT32 Address,
-+#ifdef __QNXNTO__
-+ IN gctUINT32 Pid,
-+ IN gctUINT32 Bytes,
-+#endif
-+ OUT gctPOINTER * Logical
-+ );
-+
-+/* Map video memory. */
-+gceSTATUS
-+gckKERNEL_MapVideoMemoryEx(
-+ IN gckKERNEL Kernel,
-+ IN gceCORE Core,
-+ IN gctBOOL InUserSpace,
-+ IN gctUINT32 Address,
-+#ifdef __QNXNTO__
-+ IN gctUINT32 Pid,
-+ IN gctUINT32 Bytes,
-+#endif
-+ OUT gctPOINTER * Logical
-+ );
-+
-+#ifdef __QNXNTO__
-+/* Unmap video memory. */
-+gceSTATUS
-+gckKERNEL_UnmapVideoMemory(
-+ IN gckKERNEL Kernel,
-+ IN gctPOINTER Logical,
-+ IN gctUINT32 Pid,
-+ IN gctUINT32 Bytes
-+ );
-+#endif
-+
-+/* Map memory. */
-+gceSTATUS
-+gckKERNEL_MapMemory(
-+ IN gckKERNEL Kernel,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ OUT gctPOINTER * Logical
-+ );
-+
-+/* Unmap memory. */
-+gceSTATUS
-+gckKERNEL_UnmapMemory(
-+ IN gckKERNEL Kernel,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctSIZE_T Bytes,
-+ IN gctPOINTER Logical
-+ );
-+
-+/* Notification of events. */
-+gceSTATUS
-+gckKERNEL_Notify(
-+ IN gckKERNEL Kernel,
-+#if gcdMULTI_GPU
-+ IN gctUINT CoreId,
-+#endif
-+ IN gceNOTIFY Notifcation,
-+ IN gctBOOL Data
-+ );
-+
-+gceSTATUS
-+gckKERNEL_QuerySettings(
-+ IN gckKERNEL Kernel,
-+ OUT gcsKERNEL_SETTINGS * Settings
-+ );
-+
-+/*******************************************************************************
-+**
-+** gckKERNEL_Recovery
-+**
-+** Try to recover the GPU from a fatal error.
-+**
-+** INPUT:
-+**
-+** gckKERNEL Kernel
-+** Pointer to an gckKERNEL object.
-+**
-+** OUTPUT:
-+**
-+** Nothing.
-+*/
-+gceSTATUS
-+gckKERNEL_Recovery(
-+ IN gckKERNEL Kernel
-+ );
-+
-+/* Set the value of timeout on HW operation. */
-+void
-+gckKERNEL_SetTimeOut(
-+ IN gckKERNEL Kernel,
-+ IN gctUINT32 timeOut
-+ );
-+
-+/* Get access to the user data. */
-+gceSTATUS
-+gckKERNEL_OpenUserData(
-+ IN gckKERNEL Kernel,
-+ IN gctBOOL NeedCopy,
-+ IN gctPOINTER StaticStorage,
-+ IN gctPOINTER UserPointer,
-+ IN gctSIZE_T Size,
-+ OUT gctPOINTER * KernelPointer
-+ );
-+
-+/* Release resources associated with the user data connection. */
-+gceSTATUS
-+gckKERNEL_CloseUserData(
-+ IN gckKERNEL Kernel,
-+ IN gctBOOL NeedCopy,
-+ IN gctBOOL FlushData,
-+ IN gctPOINTER UserPointer,
-+ IN gctSIZE_T Size,
-+ OUT gctPOINTER * KernelPointer
-+ );
-+
-+gceSTATUS
-+gckDVFS_Construct(
-+ IN gckHARDWARE Hardware,
-+ OUT gckDVFS * Frequency
-+ );
-+
-+gceSTATUS
-+gckDVFS_Destroy(
-+ IN gckDVFS Dvfs
-+ );
-+
-+gceSTATUS
-+gckDVFS_Start(
-+ IN gckDVFS Dvfs
-+ );
-+
-+gceSTATUS
-+gckDVFS_Stop(
-+ IN gckDVFS Dvfs
-+ );
-+
-+/******************************************************************************\
-+******************************* gckHARDWARE Object *****************************
-+\******************************************************************************/
-+
-+/* Construct a new gckHARDWARE object. */
-+gceSTATUS
-+gckHARDWARE_Construct(
-+ IN gckOS Os,
-+ IN gceCORE Core,
-+ OUT gckHARDWARE * Hardware
-+ );
-+
-+/* Destroy an gckHARDWARE object. */
-+gceSTATUS
-+gckHARDWARE_Destroy(
-+ IN gckHARDWARE Hardware
-+ );
-+
-+/* Get hardware type. */
-+gceSTATUS
-+gckHARDWARE_GetType(
-+ IN gckHARDWARE Hardware,
-+ OUT gceHARDWARE_TYPE * Type
-+ );
-+
-+/* Query system memory requirements. */
-+gceSTATUS
-+gckHARDWARE_QuerySystemMemory(
-+ IN gckHARDWARE Hardware,
-+ OUT gctSIZE_T * SystemSize,
-+ OUT gctUINT32 * SystemBaseAddress
-+ );
-+
-+/* Build virtual address. */
-+gceSTATUS
-+gckHARDWARE_BuildVirtualAddress(
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT32 Index,
-+ IN gctUINT32 Offset,
-+ OUT gctUINT32 * Address
-+ );
-+
-+/* Query command buffer requirements. */
-+gceSTATUS
-+gckHARDWARE_QueryCommandBuffer(
-+ IN gckHARDWARE Hardware,
-+ OUT gctUINT32 * Alignment,
-+ OUT gctUINT32 * ReservedHead,
-+ OUT gctUINT32 * ReservedTail
-+ );
-+
-+/* Add a WAIT/LINK pair in the command queue. */
-+gceSTATUS
-+gckHARDWARE_WaitLink(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN gctUINT32 Offset,
-+ IN OUT gctUINT32 * Bytes,
-+ OUT gctUINT32 * WaitOffset,
-+ OUT gctUINT32 * WaitBytes
-+ );
-+
-+/* Kickstart the command processor. */
-+gceSTATUS
-+gckHARDWARE_Execute(
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT32 Address,
-+ IN gctSIZE_T Bytes
-+ );
-+
-+/* Add an END command in the command queue. */
-+gceSTATUS
-+gckHARDWARE_End(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN OUT gctUINT32 * Bytes
-+ );
-+
-+#if gcdMULTI_GPU
-+gceSTATUS
-+gckHARDWARE_ChipEnable(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN gceCORE_3D_MASK ChipEnable,
-+ IN OUT gctSIZE_T * Bytes
-+ );
-+#endif
-+
-+/* Add a NOP command in the command queue. */
-+gceSTATUS
-+gckHARDWARE_Nop(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN OUT gctSIZE_T * Bytes
-+ );
-+
-+/* Add a PIPESELECT command in the command queue. */
-+gceSTATUS
-+gckHARDWARE_PipeSelect(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN gcePIPE_SELECT Pipe,
-+ IN OUT gctUINT32 * Bytes
-+ );
-+
-+/* Add a LINK command in the command queue. */
-+gceSTATUS
-+gckHARDWARE_Link(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN gctUINT32 FetchAddress,
-+ IN gctUINT32 FetchSize,
-+ IN OUT gctUINT32 * Bytes
-+ );
-+
-+/* Add an EVENT command in the command queue. */
-+gceSTATUS
-+gckHARDWARE_Event(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN gctUINT8 Event,
-+ IN gceKERNEL_WHERE FromWhere,
-+ IN OUT gctUINT32 * Bytes
-+ );
-+
-+/* Query the available memory. */
-+gceSTATUS
-+gckHARDWARE_QueryMemory(
-+ IN gckHARDWARE Hardware,
-+ OUT gctSIZE_T * InternalSize,
-+ OUT gctUINT32 * InternalBaseAddress,
-+ OUT gctUINT32 * InternalAlignment,
-+ OUT gctSIZE_T * ExternalSize,
-+ OUT gctUINT32 * ExternalBaseAddress,
-+ OUT gctUINT32 * ExternalAlignment,
-+ OUT gctUINT32 * HorizontalTileSize,
-+ OUT gctUINT32 * VerticalTileSize
-+ );
-+
-+/* Query the identity of the hardware. */
-+gceSTATUS
-+gckHARDWARE_QueryChipIdentity(
-+ IN gckHARDWARE Hardware,
-+ OUT gcsHAL_QUERY_CHIP_IDENTITY_PTR Identity
-+ );
-+
-+/* Query the shader uniforms support. */
-+gceSTATUS
-+gckHARDWARE_QueryShaderCaps(
-+ IN gckHARDWARE Hardware,
-+ OUT gctUINT * VertexUniforms,
-+ OUT gctUINT * FragmentUniforms,
-+ OUT gctBOOL * UnifiedUnforms
-+ );
-+
-+/* Split a harwdare specific address into API stuff. */
-+gceSTATUS
-+gckHARDWARE_SplitMemory(
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT32 Address,
-+ OUT gcePOOL * Pool,
-+ OUT gctUINT32 * Offset
-+ );
-+
-+/* Update command queue tail pointer. */
-+gceSTATUS
-+gckHARDWARE_UpdateQueueTail(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN gctUINT32 Offset
-+ );
-+
-+/* Convert logical address to hardware specific address. */
-+gceSTATUS
-+gckHARDWARE_ConvertLogical(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN gctBOOL InUserSpace,
-+ OUT gctUINT32 * Address
-+ );
-+
-+/* Interrupt manager. */
-+gceSTATUS
-+gckHARDWARE_Interrupt(
-+ IN gckHARDWARE Hardware,
-+#if gcdMULTI_GPU
-+ IN gctUINT CoreId,
-+#endif
-+ IN gctBOOL InterruptValid
-+ );
-+
-+/* Program MMU. */
-+gceSTATUS
-+gckHARDWARE_SetMMU(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical
-+ );
-+
-+/* Flush the MMU. */
-+gceSTATUS
-+gckHARDWARE_FlushMMU(
-+ IN gckHARDWARE Hardware
-+ );
-+
-+/* Set the page table base address. */
-+gceSTATUS
-+gckHARDWARE_SetMMUv2(
-+ IN gckHARDWARE Hardware,
-+ IN gctBOOL Enable,
-+ IN gctPOINTER MtlbAddress,
-+ IN gceMMU_MODE Mode,
-+ IN gctPOINTER SafeAddress,
-+ IN gctBOOL FromPower
-+ );
-+
-+#if gcdPROCESS_ADDRESS_SPACE
-+/* Configure mmu configuration. */
-+gceSTATUS
-+gckHARDWARE_ConfigMMU(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER Logical,
-+ IN gctPOINTER MtlbLogical,
-+ IN gctUINT32 Offset,
-+ IN OUT gctSIZE_T * Bytes,
-+ OUT gctSIZE_T * WaitLinkOffset,
-+ OUT gctSIZE_T * WaitLinkBytes
-+ );
-+#endif
-+
-+/* Get idle register. */
-+gceSTATUS
-+gckHARDWARE_GetIdle(
-+ IN gckHARDWARE Hardware,
-+ IN gctBOOL Wait,
-+ OUT gctUINT32 * Data
-+ );
-+
-+/* Flush the caches. */
-+gceSTATUS
-+gckHARDWARE_Flush(
-+ IN gckHARDWARE Hardware,
-+ IN gceKERNEL_FLUSH Flush,
-+ IN gctPOINTER Logical,
-+ IN OUT gctUINT32 * Bytes
-+ );
-+
-+/* Enable/disable fast clear. */
-+gceSTATUS
-+gckHARDWARE_SetFastClear(
-+ IN gckHARDWARE Hardware,
-+ IN gctINT Enable,
-+ IN gctINT Compression
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_ReadInterrupt(
-+ IN gckHARDWARE Hardware,
-+ OUT gctUINT32_PTR IDs
-+ );
-+
-+/* Power management. */
-+gceSTATUS
-+gckHARDWARE_SetPowerManagementState(
-+ IN gckHARDWARE Hardware,
-+ IN gceCHIPPOWERSTATE State
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_QueryPowerManagementState(
-+ IN gckHARDWARE Hardware,
-+ OUT gceCHIPPOWERSTATE* State
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_SetPowerManagement(
-+ IN gckHARDWARE Hardware,
-+ IN gctBOOL PowerManagement
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_SetPowerManagementLock(
-+ IN gckHARDWARE Hardware,
-+ IN gctBOOL Lock
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_SetGpuProfiler(
-+ IN gckHARDWARE Hardware,
-+ IN gctBOOL GpuProfiler
-+ );
-+
-+#if gcdENABLE_FSCALE_VAL_ADJUST
-+gceSTATUS
-+gckHARDWARE_SetFscaleValue(
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT32 FscaleValue
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_GetFscaleValue(
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT * FscaleValue,
-+ IN gctUINT * MinFscaleValue,
-+ IN gctUINT * MaxFscaleValue
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_SetMinFscaleValue(
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT MinFscaleValue
-+ );
-+#endif
-+
-+#if gcdPOWEROFF_TIMEOUT
-+gceSTATUS
-+gckHARDWARE_SetPowerOffTimeout(
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT32 Timeout
-+);
-+
-+gceSTATUS
-+gckHARDWARE_QueryPowerOffTimeout(
-+ IN gckHARDWARE Hardware,
-+ OUT gctUINT32* Timeout
-+);
-+#endif
-+
-+/* Profile 2D Engine. */
-+gceSTATUS
-+gckHARDWARE_ProfileEngine2D(
-+ IN gckHARDWARE Hardware,
-+ OUT gcs2D_PROFILE_PTR Profile
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_InitializeHardware(
-+ IN gckHARDWARE Hardware
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_Reset(
-+ IN gckHARDWARE Hardware
-+ );
-+
-+typedef gceSTATUS (*gctISRMANAGERFUNC)(gctPOINTER Context);
-+
-+gceSTATUS
-+gckHARDWARE_SetIsrManager(
-+ IN gckHARDWARE Hardware,
-+ IN gctISRMANAGERFUNC StartIsr,
-+ IN gctISRMANAGERFUNC StopIsr,
-+ IN gctPOINTER Context
-+ );
-+
-+/* Start a composition. */
-+gceSTATUS
-+gckHARDWARE_Compose(
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT32 ProcessID,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctPOINTER Logical,
-+ IN gctSIZE_T Offset,
-+ IN gctSIZE_T Size,
-+ IN gctUINT8 EventID
-+ );
-+
-+/* Check for Hardware features. */
-+gceSTATUS
-+gckHARDWARE_IsFeatureAvailable(
-+ IN gckHARDWARE Hardware,
-+ IN gceFEATURE Feature
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_DumpMMUException(
-+ IN gckHARDWARE Hardware
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_DumpGPUState(
-+ IN gckHARDWARE Hardware
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_InitDVFS(
-+ IN gckHARDWARE Hardware
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_QueryLoad(
-+ IN gckHARDWARE Hardware,
-+ OUT gctUINT32 * Load
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_SetDVFSPeroid(
-+ IN gckHARDWARE Hardware,
-+ IN gctUINT32 Frequency
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_PrepareFunctions(
-+ gckHARDWARE Hardware
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_SetMMUStates(
-+ IN gckHARDWARE Hardware,
-+ IN gctPOINTER MtlbAddress,
-+ IN gceMMU_MODE Mode,
-+ IN gctPOINTER SafeAddress,
-+ IN gctPOINTER Logical,
-+ IN OUT gctUINT32 * Bytes
-+ );
-+
-+#if !gcdENABLE_VG
-+/******************************************************************************\
-+***************************** gckINTERRUPT Object ******************************
-+\******************************************************************************/
-+
-+typedef struct _gckINTERRUPT * gckINTERRUPT;
-+
-+typedef gceSTATUS (* gctINTERRUPT_HANDLER)(
-+ IN gckKERNEL Kernel
-+ );
-+
-+gceSTATUS
-+gckINTERRUPT_Construct(
-+ IN gckKERNEL Kernel,
-+ OUT gckINTERRUPT * Interrupt
-+ );
-+
-+gceSTATUS
-+gckINTERRUPT_Destroy(
-+ IN gckINTERRUPT Interrupt
-+ );
-+
-+gceSTATUS
-+gckINTERRUPT_SetHandler(
-+ IN gckINTERRUPT Interrupt,
-+ IN OUT gctINT32_PTR Id,
-+ IN gctINTERRUPT_HANDLER Handler
-+ );
-+
-+gceSTATUS
-+gckINTERRUPT_Notify(
-+ IN gckINTERRUPT Interrupt,
-+ IN gctBOOL Valid
-+ );
-+#endif
-+/******************************************************************************\
-+******************************** gckEVENT Object *******************************
-+\******************************************************************************/
-+
-+typedef struct _gckEVENT * gckEVENT;
-+
-+/* Construct a new gckEVENT object. */
-+gceSTATUS
-+gckEVENT_Construct(
-+ IN gckKERNEL Kernel,
-+ OUT gckEVENT * Event
-+ );
-+
-+/* Destroy an gckEVENT object. */
-+gceSTATUS
-+gckEVENT_Destroy(
-+ IN gckEVENT Event
-+ );
-+
-+/* Reserve the next available hardware event. */
-+#if gcdMULTI_GPU
-+gceSTATUS
-+gckEVENT_GetEvent(
-+ IN gckEVENT Event,
-+ IN gctBOOL Wait,
-+ OUT gctUINT8 * EventID,
-+ IN gceKERNEL_WHERE Source,
-+ IN gceCORE_3D_MASK ChipEnable
-+ );
-+#else
-+gceSTATUS
-+gckEVENT_GetEvent(
-+ IN gckEVENT Event,
-+ IN gctBOOL Wait,
-+ OUT gctUINT8 * EventID,
-+ IN gceKERNEL_WHERE Source
-+ );
-+#endif
-+
-+/* Add a new event to the list of events. */
-+gceSTATUS
-+gckEVENT_AddList(
-+ IN gckEVENT Event,
-+ IN gcsHAL_INTERFACE_PTR Interface,
-+ IN gceKERNEL_WHERE FromWhere,
-+ IN gctBOOL AllocateAllowed,
-+ IN gctBOOL FromKernel
-+ );
-+
-+/* Schedule a FreeNonPagedMemory event. */
-+gceSTATUS
-+gckEVENT_FreeNonPagedMemory(
-+ IN gckEVENT Event,
-+ IN gctSIZE_T Bytes,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctPOINTER Logical,
-+ IN gceKERNEL_WHERE FromWhere
-+ );
-+
-+/* Schedule a FreeContiguousMemory event. */
-+gceSTATUS
-+gckEVENT_FreeContiguousMemory(
-+ IN gckEVENT Event,
-+ IN gctSIZE_T Bytes,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctPOINTER Logical,
-+ IN gceKERNEL_WHERE FromWhere
-+ );
-+
-+/* Schedule a FreeVideoMemory event. */
-+gceSTATUS
-+gckEVENT_FreeVideoMemory(
-+ IN gckEVENT Event,
-+ IN gcuVIDMEM_NODE_PTR VideoMemory,
-+ IN gceKERNEL_WHERE FromWhere
-+ );
-+
-+/* Schedule a signal event. */
-+gceSTATUS
-+gckEVENT_Signal(
-+ IN gckEVENT Event,
-+ IN gctSIGNAL Signal,
-+ IN gceKERNEL_WHERE FromWhere
-+ );
-+
-+/* Schedule an Unlock event. */
-+gceSTATUS
-+gckEVENT_Unlock(
-+ IN gckEVENT Event,
-+ IN gceKERNEL_WHERE FromWhere,
-+ IN gctPOINTER Node,
-+ IN gceSURF_TYPE Type
-+ );
-+
-+gceSTATUS
-+gckEVENT_CommitDone(
-+ IN gckEVENT Event,
-+ IN gceKERNEL_WHERE FromWhere
-+ );
-+
-+/* Schedule a FreeVirtualCommandBuffer event. */
-+gceSTATUS
-+gckEVENT_DestroyVirtualCommandBuffer(
-+ IN gckEVENT Event,
-+ IN gctSIZE_T Bytes,
-+ IN gctPHYS_ADDR Physical,
-+ IN gctPOINTER Logical,
-+ IN gceKERNEL_WHERE FromWhere
-+ );
-+
-+#if gcdMULTI_GPU
-+gceSTATUS
-+gckEVENT_Submit(
-+ IN gckEVENT Event,
-+ IN gctBOOL Wait,
-+ IN gctBOOL FromPower,
-+ IN gceCORE_3D_MASK ChipEnable
-+ );
-+#else
-+gceSTATUS
-+gckEVENT_Submit(
-+ IN gckEVENT Event,
-+ IN gctBOOL Wait,
-+ IN gctBOOL FromPower
-+ );
-+#endif
-+
-+#if gcdMULTI_GPU
-+gceSTATUS
-+gckEVENT_Commit(
-+ IN gckEVENT Event,
-+ IN gcsQUEUE_PTR Queue,
-+ IN gceCORE_3D_MASK ChipEnable
-+ );
-+#else
-+gceSTATUS
-+gckEVENT_Commit(
-+ IN gckEVENT Event,
-+ IN gcsQUEUE_PTR Queue
-+ );
-+#endif
-+
-+/* Schedule a composition event. */
-+gceSTATUS
-+gckEVENT_Compose(
-+ IN gckEVENT Event,
-+ IN gcsHAL_COMPOSE_PTR Info
-+ );
-+
-+/* Event callback routine. */
-+gceSTATUS
-+gckEVENT_Notify(
-+ IN gckEVENT Event,
-+ IN gctUINT32 IDs
-+ );
-+
-+/* Event callback routine. */
-+gceSTATUS
-+gckEVENT_Interrupt(
-+ IN gckEVENT Event,
-+#if gcdMULTI_GPU
-+ IN gctUINT CoreId,
-+#endif
-+ IN gctUINT32 IDs
-+ );
-+
-+gceSTATUS
-+gckEVENT_Dump(
-+ IN gckEVENT Event
-+ );
-+/******************************************************************************\
-+******************************* gckCOMMAND Object ******************************
-+\******************************************************************************/
-+
-+typedef struct _gckCOMMAND * gckCOMMAND;
-+
-+/* Construct a new gckCOMMAND object. */
-+gceSTATUS
-+gckCOMMAND_Construct(
-+ IN gckKERNEL Kernel,
-+ OUT gckCOMMAND * Command
-+ );
-+
-+/* Destroy an gckCOMMAND object. */
-+gceSTATUS
-+gckCOMMAND_Destroy(
-+ IN gckCOMMAND Command
-+ );
-+
-+/* Acquire command queue synchronization objects. */
-+gceSTATUS
-+gckCOMMAND_EnterCommit(
-+ IN gckCOMMAND Command,
-+ IN gctBOOL FromPower
-+ );
-+
-+/* Release command queue synchronization objects. */
-+gceSTATUS
-+gckCOMMAND_ExitCommit(
-+ IN gckCOMMAND Command,
-+ IN gctBOOL FromPower
-+ );
-+
-+/* Start the command queue. */
-+gceSTATUS
-+gckCOMMAND_Start(
-+ IN gckCOMMAND Command
-+ );
-+
-+/* Stop the command queue. */
-+gceSTATUS
-+gckCOMMAND_Stop(
-+ IN gckCOMMAND Command,
-+ IN gctBOOL FromRecovery
-+ );
-+
-+#if gcdMULTI_GPU
-+/* Commit a buffer to the command queue. */
-+gceSTATUS
-+gckCOMMAND_Commit(
-+ IN gckCOMMAND Command,
-+ IN gckCONTEXT Context,
-+ IN gcoCMDBUF CommandBuffer,
-+ IN gcsSTATE_DELTA_PTR StateDelta,
-+ IN gcsQUEUE_PTR EventQueue,
-+ IN gctUINT32 ProcessID,
-+ IN gceCORE_3D_MASK ChipEnable
-+ );
-+#else
-+gceSTATUS
-+gckCOMMAND_Commit(
-+ IN gckCOMMAND Command,
-+ IN gckCONTEXT Context,
-+ IN gcoCMDBUF CommandBuffer,
-+ IN gcsSTATE_DELTA_PTR StateDelta,
-+ IN gcsQUEUE_PTR EventQueue,
-+ IN gctUINT32 ProcessID
-+ );
-+#endif
-+
-+/* Reserve space in the command buffer. */
-+gceSTATUS
-+gckCOMMAND_Reserve(
-+ IN gckCOMMAND Command,
-+ IN gctUINT32 RequestedBytes,
-+ OUT gctPOINTER * Buffer,
-+ OUT gctUINT32 * BufferSize
-+ );
-+
-+/* Execute reserved space in the command buffer. */
-+gceSTATUS
-+gckCOMMAND_Execute(
-+ IN gckCOMMAND Command,
-+ IN gctUINT32 RequstedBytes
-+ );
-+
-+/* Stall the command queue. */
-+#if gcdMULTI_GPU
-+gceSTATUS
-+gckCOMMAND_Stall(
-+ IN gckCOMMAND Command,
-+ IN gctBOOL FromPower,
-+ IN gceCORE_3D_MASK ChipEnable
-+ );
-+#else
-+gceSTATUS
-+gckCOMMAND_Stall(
-+ IN gckCOMMAND Command,
-+ IN gctBOOL FromPower
-+ );
-+#endif
-+
-+/* Attach user process. */
-+gceSTATUS
-+gckCOMMAND_Attach(
-+ IN gckCOMMAND Command,
-+ OUT gckCONTEXT * Context,
-+ OUT gctSIZE_T * StateCount,
-+ IN gctUINT32 ProcessID
-+ );
-+
-+/* Detach user process. */
-+gceSTATUS
-+gckCOMMAND_Detach(
-+ IN gckCOMMAND Command,
-+ IN gckCONTEXT Context
-+ );
-+
-+/* Dump command buffer being executed by GPU. */
-+gceSTATUS
-+gckCOMMAND_DumpExecutingBuffer(
-+ IN gckCOMMAND Command
-+ );
-+
-+/* Whether a kernel command buffer address. */
-+gceSTATUS
-+gckCOMMAND_AddressInKernelCommandBuffer(
-+ IN gckCOMMAND Command,
-+ IN gctUINT32 Address,
-+ OUT gctBOOL *In
-+ );
-+
-+/******************************************************************************\
-+********************************* gckMMU Object ********************************
-+\******************************************************************************/
-+
-+typedef struct _gckMMU * gckMMU;
-+
-+/* Construct a new gckMMU object. */
-+gceSTATUS
-+gckMMU_Construct(
-+ IN gckKERNEL Kernel,
-+ IN gctSIZE_T MmuSize,
-+ OUT gckMMU * Mmu
-+ );
-+
-+/* Destroy an gckMMU object. */
-+gceSTATUS
-+gckMMU_Destroy(
-+ IN gckMMU Mmu
-+ );
-+
-+/* Allocate pages inside the MMU. */
-+gceSTATUS
-+gckMMU_AllocatePages(
-+ IN gckMMU Mmu,
-+ IN gctSIZE_T PageCount,
-+ OUT gctPOINTER * PageTable,
-+ OUT gctUINT32 * Address
-+ );
-+
-+gceSTATUS
-+gckMMU_AllocatePagesEx(
-+ IN gckMMU Mmu,
-+ IN gctSIZE_T PageCount,
-+ IN gceSURF_TYPE Type,
-+ OUT gctPOINTER * PageTable,
-+ OUT gctUINT32 * Address
-+ );
-+
-+/* Remove a page table from the MMU. */
-+gceSTATUS
-+gckMMU_FreePages(
-+ IN gckMMU Mmu,
-+ IN gctPOINTER PageTable,
-+ IN gctSIZE_T PageCount
-+ );
-+
-+/* Set the MMU page with info. */
-+gceSTATUS
-+gckMMU_SetPage(
-+ IN gckMMU Mmu,
-+ IN gctUINT32 PageAddress,
-+ IN gctUINT32 *PageEntry
-+ );
-+
-+gceSTATUS
-+gckMMU_Flush(
-+ IN gckMMU Mmu,
-+ IN gceSURF_TYPE Type
-+ );
-+
-+gceSTATUS
-+gckMMU_DumpPageTableEntry(
-+ IN gckMMU Mmu,
-+ IN gctUINT32 Address
-+ );
-+
-+
-+#if VIVANTE_PROFILER
-+gceSTATUS
-+gckHARDWARE_QueryProfileRegisters(
-+ IN gckHARDWARE Hardware,
-+ IN gctBOOL Reset,
-+ OUT gcsPROFILER_COUNTERS * Counters
-+ );
-+#endif
-+
-+#if VIVANTE_PROFILER_CONTEXT
-+gceSTATUS
-+gckHARDWARE_QueryContextProfile(
-+ IN gckHARDWARE Hardware,
-+ IN gctBOOL Reset,
-+ IN gckCONTEXT Context,
-+ OUT gcsPROFILER_COUNTERS * Counters
-+ );
-+
-+gceSTATUS
-+gckHARDWARE_UpdateContextProfile(
-+ IN gckHARDWARE Hardware,
-+ IN gckCONTEXT Context
-+ );
-+#endif
-+
-+#if VIVANTE_PROFILER_NEW
-+gceSTATUS
-+gckHARDWARE_InitProfiler(
-+ IN gckHARDWARE Hardware
-+ );
-+#endif
-+
-+gceSTATUS
-+gckOS_SignalQueryHardware(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal,
-+ OUT gckHARDWARE * Hardware
-+ );
-+
-+gceSTATUS
-+gckOS_SignalSetHardware(
-+ IN gckOS Os,
-+ IN gctSIGNAL Signal,
-+ gckHARDWARE Hardware
-+ );
-+
-+gceSTATUS
-+gckOS_DetectProcessByName(
-+ IN gctCONST_POINTER Name
-+ );
-+
-+void
-+gckOS_DumpParam(
-+ void
-+ );
-+
-+#ifdef __cplusplus
-+}
-+#endif
-+
-+#if gcdENABLE_VG
-+#include "gc_hal_vg.h"
-+#endif
-+
-+#endif /* __gc_hal_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_base.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_base.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_base.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_base.h 2015-10-12 10:56:18.091351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_base.h 2015-10-15 15:51:25.432643459 +0200
@@ -0,0 +1,5520 @@
+/****************************************************************************
+*
@@ -232099,7 +228899,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_base.h
+#endif /* __gc_hal_base_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_driver.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_driver.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_driver.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_driver.h 2015-10-12 10:56:18.092351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_driver.h 2015-10-15 15:51:25.432643459 +0200
@@ -0,0 +1,1136 @@
+/****************************************************************************
+*
@@ -233239,7 +230039,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_driver
+#endif /* __gc_hal_driver_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_driver_vg.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_driver_vg.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_driver_vg.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_driver_vg.h 2015-10-12 10:56:18.092351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_driver_vg.h 2015-10-15 15:51:25.432643459 +0200
@@ -0,0 +1,270 @@
+/****************************************************************************
+*
@@ -233513,7 +230313,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_driver
+#endif /* __gc_hal_driver_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_dump.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_dump.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_dump.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_dump.h 2015-10-12 10:56:18.092351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_dump.h 2015-10-15 15:51:25.432643459 +0200
@@ -0,0 +1,89 @@
+/****************************************************************************
+*
@@ -233606,7 +230406,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_dump.h
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_eglplatform.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_eglplatform.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_eglplatform.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_eglplatform.h 2015-10-12 10:56:18.092351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_eglplatform.h 2015-10-15 15:51:25.432643459 +0200
@@ -0,0 +1,672 @@
+/****************************************************************************
+*
@@ -234282,7 +231082,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_eglpla
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_eglplatform_type.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_eglplatform_type.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_eglplatform_type.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_eglplatform_type.h 2015-10-12 10:56:18.093351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_eglplatform_type.h 2015-10-15 15:51:25.432643459 +0200
@@ -0,0 +1,286 @@
+/****************************************************************************
+*
@@ -234572,7 +231372,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_eglpla
+#endif /* __gc_hal_eglplatform_type_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_engine.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_engine.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_engine.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_engine.h 2015-10-12 10:56:18.093351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_engine.h 2015-10-15 15:51:25.436643195 +0200
@@ -0,0 +1,2587 @@
+/****************************************************************************
+*
@@ -237163,7 +233963,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_engine
+#endif /* __gc_hal_engine_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_engine_vg.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_engine_vg.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_engine_vg.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_engine_vg.h 2015-10-12 10:56:18.094351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_engine_vg.h 2015-10-15 15:51:25.436643195 +0200
@@ -0,0 +1,1215 @@
+/****************************************************************************
+*
@@ -238382,7 +235182,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_engine
+#endif /* __gc_hal_vg_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_enum.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_enum.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_enum.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_enum.h 2015-10-12 10:56:18.094351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_enum.h 2015-10-15 15:51:25.436643195 +0200
@@ -0,0 +1,1608 @@
+/****************************************************************************
+*
@@ -239992,9 +236792,2872 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_enum.h
+#endif
+
+#endif /* __gc_hal_enum_h_ */
+diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal.h
+--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal.h 2015-10-15 15:51:25.444642667 +0200
+@@ -0,0 +1,2859 @@
++/****************************************************************************
++*
++* Copyright (C) 2005 - 2014 by Vivante Corp.
++*
++* This program is free software; you can redistribute it and/or modify
++* it under the terms of the GNU General Public License as published by
++* the Free Software Foundation; either version 2 of the license, or
++* (at your option) any later version.
++*
++* This program is distributed in the hope that it will be useful,
++* but WITHOUT ANY WARRANTY; without even the implied warranty of
++* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++* GNU General Public License for more details.
++*
++* You should have received a copy of the GNU General Public License
++* along with this program; if not write to the Free Software
++* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*
++*****************************************************************************/
++
++
++#ifndef __gc_hal_h_
++#define __gc_hal_h_
++
++#include "gc_hal_rename.h"
++#include "gc_hal_types.h"
++#include "gc_hal_enum.h"
++#include "gc_hal_base.h"
++#include "gc_hal_profiler.h"
++#include "gc_hal_driver.h"
++#if gcdENABLE_3D
++#include "gc_hal_statistics.h"
++#endif
++
++#if gcdSECURITY
++#include "gc_hal_security_interface.h"
++#endif
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++/******************************************************************************\
++******************************* Alignment Macros *******************************
++\******************************************************************************/
++
++/* Alignment with a non-power of two value. */
++#define gcmALIGN_NP2(n, align) \
++( \
++ ((n) + (align) - 1) - (((n) + (align) - 1) % (align)) \
++)
++
++/* Alignment with a power of two value. */
++#define gcmALIGN(n, align) \
++( \
++ ((n) + ((align) - 1)) & ~((align) - 1) \
++)
++
++#define gcmALIGN_BASE(n, align) \
++( \
++ ((n) & ~((align) - 1)) \
++)
++
++/******************************************************************************\
++***************************** Element Count Macro *****************************
++\******************************************************************************/
++
++#define gcmSIZEOF(a) \
++( \
++ (gctSIZE_T) (sizeof(a)) \
++)
++
++#define gcmCOUNTOF(a) \
++( \
++ sizeof(a) / sizeof(a[0]) \
++)
++
++/******************************************************************************\
++********************************* Cast Macro **********************************
++\******************************************************************************/
++#define gcmNAME_TO_PTR(na) \
++ gckKERNEL_QueryPointerFromName(kernel, gcmALL_TO_UINT32(na))
++
++#define gcmPTR_TO_NAME(ptr) \
++ gckKERNEL_AllocateNameFromPointer(kernel, ptr)
++
++#define gcmRELEASE_NAME(na) \
++ gckKERNEL_DeleteName(kernel, gcmALL_TO_UINT32(na))
++
++#define gcmALL_TO_UINT32(t) \
++( \
++ (gctUINT32) (gctUINTPTR_T) (t)\
++)
++
++#define gcmPTR_TO_UINT64(p) \
++( \
++ (gctUINT64) (gctUINTPTR_T) (p)\
++)
++
++#define gcmUINT64_TO_PTR(u) \
++( \
++ (gctPOINTER) (gctUINTPTR_T) (u)\
++)
++
++#define gcmUINT64_TO_TYPE(u, t) \
++( \
++ (t) (gctUINTPTR_T) (u)\
++)
++
++/******************************************************************************\
++******************************** Useful Macro *********************************
++\******************************************************************************/
++
++#define gcvINVALID_ADDRESS ~0U
++
++#define gcmGET_PRE_ROTATION(rotate) \
++ ((rotate) & (~(gcvSURF_POST_FLIP_X | gcvSURF_POST_FLIP_Y)))
++
++#define gcmGET_POST_ROTATION(rotate) \
++ ((rotate) & (gcvSURF_POST_FLIP_X | gcvSURF_POST_FLIP_Y))
++
++/******************************************************************************\
++******************************** gcsOBJECT Object *******************************
++\******************************************************************************/
++
++/* Type of objects. */
++typedef enum _gceOBJECT_TYPE
++{
++ gcvOBJ_UNKNOWN = 0,
++ gcvOBJ_2D = gcmCC('2','D',' ',' '),
++ gcvOBJ_3D = gcmCC('3','D',' ',' '),
++ gcvOBJ_ATTRIBUTE = gcmCC('A','T','T','R'),
++ gcvOBJ_BRUSHCACHE = gcmCC('B','R','U','$'),
++ gcvOBJ_BRUSHNODE = gcmCC('B','R','U','n'),
++ gcvOBJ_BRUSH = gcmCC('B','R','U','o'),
++ gcvOBJ_BUFFER = gcmCC('B','U','F','R'),
++ gcvOBJ_COMMAND = gcmCC('C','M','D',' '),
++ gcvOBJ_COMMANDBUFFER = gcmCC('C','M','D','B'),
++ gcvOBJ_CONTEXT = gcmCC('C','T','X','T'),
++ gcvOBJ_DEVICE = gcmCC('D','E','V',' '),
++ gcvOBJ_DUMP = gcmCC('D','U','M','P'),
++ gcvOBJ_EVENT = gcmCC('E','V','N','T'),
++ gcvOBJ_FUNCTION = gcmCC('F','U','N','C'),
++ gcvOBJ_HAL = gcmCC('H','A','L',' '),
++ gcvOBJ_HARDWARE = gcmCC('H','A','R','D'),
++ gcvOBJ_HEAP = gcmCC('H','E','A','P'),
++ gcvOBJ_INDEX = gcmCC('I','N','D','X'),
++ gcvOBJ_INTERRUPT = gcmCC('I','N','T','R'),
++ gcvOBJ_KERNEL = gcmCC('K','E','R','N'),
++ gcvOBJ_KERNEL_FUNCTION = gcmCC('K','F','C','N'),
++ gcvOBJ_MEMORYBUFFER = gcmCC('M','E','M','B'),
++ gcvOBJ_MMU = gcmCC('M','M','U',' '),
++ gcvOBJ_OS = gcmCC('O','S',' ',' '),
++ gcvOBJ_OUTPUT = gcmCC('O','U','T','P'),
++ gcvOBJ_PAINT = gcmCC('P','N','T',' '),
++ gcvOBJ_PATH = gcmCC('P','A','T','H'),
++ gcvOBJ_QUEUE = gcmCC('Q','U','E',' '),
++ gcvOBJ_SAMPLER = gcmCC('S','A','M','P'),
++ gcvOBJ_SHADER = gcmCC('S','H','D','R'),
++ gcvOBJ_STREAM = gcmCC('S','T','R','M'),
++ gcvOBJ_SURF = gcmCC('S','U','R','F'),
++ gcvOBJ_TEXTURE = gcmCC('T','X','T','R'),
++ gcvOBJ_UNIFORM = gcmCC('U','N','I','F'),
++ gcvOBJ_VARIABLE = gcmCC('V','A','R','I'),
++ gcvOBJ_VERTEX = gcmCC('V','R','T','X'),
++ gcvOBJ_VIDMEM = gcmCC('V','M','E','M'),
++ gcvOBJ_VG = gcmCC('V','G',' ',' '),
++ gcvOBJ_BUFOBJ = gcmCC('B','U','F','O'),
++ gcvOBJ_UNIFORM_BLOCK = gcmCC('U','B','L','K'),
++ gcvOBJ_CL = gcmCC('C','L',' ',' '),
++}
++gceOBJECT_TYPE;
++
++/* gcsOBJECT object defintinon. */
++typedef struct _gcsOBJECT
++{
++ /* Type of an object. */
++ gceOBJECT_TYPE type;
++}
++gcsOBJECT;
++
++typedef struct _gckHARDWARE * gckHARDWARE;
++
++/* CORE flags. */
++typedef enum _gceCORE
++{
++ gcvCORE_MAJOR = 0x0,
++ gcvCORE_2D = 0x1,
++ gcvCORE_VG = 0x2,
++#if gcdMULTI_GPU_AFFINITY
++ gcvCORE_OCL = 0x3,
++#endif
++}
++gceCORE;
++
++#if gcdMULTI_GPU_AFFINITY
++#define gcdMAX_GPU_COUNT 4
++#else
++#define gcdMAX_GPU_COUNT 3
++#endif
++
++#define gcdMAX_SURF_LAYER 4
++
++#define gcdMAX_DRAW_BUFFERS 4
++
++/*******************************************************************************
++**
++** gcmVERIFY_OBJECT
++**
++** Assert if an object is invalid or is not of the specified type. If the
++** object is invalid or not of the specified type, gcvSTATUS_INVALID_OBJECT
++** will be returned from the current function. In retail mode this macro
++** does nothing.
++**
++** ARGUMENTS:
++**
++** obj Object to test.
++** t Expected type of the object.
++*/
++#if gcmIS_DEBUG(gcdDEBUG_TRACE)
++#define _gcmVERIFY_OBJECT(prefix, obj, t) \
++ if ((obj) == gcvNULL) \
++ { \
++ prefix##TRACE(gcvLEVEL_ERROR, \
++ #prefix "VERIFY_OBJECT failed: NULL"); \
++ prefix##TRACE(gcvLEVEL_ERROR, " expected: %c%c%c%c", \
++ gcmCC_PRINT(t)); \
++ prefix##ASSERT((obj) != gcvNULL); \
++ prefix##FOOTER_ARG("status=%d", gcvSTATUS_INVALID_OBJECT); \
++ return gcvSTATUS_INVALID_OBJECT; \
++ } \
++ else if (((gcsOBJECT*) (obj))->type != t) \
++ { \
++ prefix##TRACE(gcvLEVEL_ERROR, \
++ #prefix "VERIFY_OBJECT failed: %c%c%c%c", \
++ gcmCC_PRINT(((gcsOBJECT*) (obj))->type)); \
++ prefix##TRACE(gcvLEVEL_ERROR, " expected: %c%c%c%c", \
++ gcmCC_PRINT(t)); \
++ prefix##ASSERT(((gcsOBJECT*)(obj))->type == t); \
++ prefix##FOOTER_ARG("status=%d", gcvSTATUS_INVALID_OBJECT); \
++ return gcvSTATUS_INVALID_OBJECT; \
++ }
++
++# define gcmVERIFY_OBJECT(obj, t) _gcmVERIFY_OBJECT(gcm, obj, t)
++# define gcmkVERIFY_OBJECT(obj, t) _gcmVERIFY_OBJECT(gcmk, obj, t)
++#else
++# define gcmVERIFY_OBJECT(obj, t) do {} while (gcvFALSE)
++# define gcmkVERIFY_OBJECT(obj, t) do {} while (gcvFALSE)
++#endif
++
++/******************************************************************************/
++/*VERIFY_OBJECT if special return expected*/
++/******************************************************************************/
++#ifndef EGL_API_ANDROID
++# define _gcmVERIFY_OBJECT_RETURN(prefix, obj, t, retVal) \
++ do \
++ { \
++ if ((obj) == gcvNULL) \
++ { \
++ prefix##PRINT_VERSION(); \
++ prefix##TRACE(gcvLEVEL_ERROR, \
++ #prefix "VERIFY_OBJECT_RETURN failed: NULL"); \
++ prefix##TRACE(gcvLEVEL_ERROR, " expected: %c%c%c%c", \
++ gcmCC_PRINT(t)); \
++ prefix##ASSERT((obj) != gcvNULL); \
++ prefix##FOOTER_ARG("retVal=%d", retVal); \
++ return retVal; \
++ } \
++ else if (((gcsOBJECT*) (obj))->type != t) \
++ { \
++ prefix##PRINT_VERSION(); \
++ prefix##TRACE(gcvLEVEL_ERROR, \
++ #prefix "VERIFY_OBJECT_RETURN failed: %c%c%c%c", \
++ gcmCC_PRINT(((gcsOBJECT*) (obj))->type)); \
++ prefix##TRACE(gcvLEVEL_ERROR, " expected: %c%c%c%c", \
++ gcmCC_PRINT(t)); \
++ prefix##ASSERT(((gcsOBJECT*)(obj))->type == t); \
++ prefix##FOOTER_ARG("retVal=%d", retVal); \
++ return retVal; \
++ } \
++ } \
++ while (gcvFALSE)
++# define gcmVERIFY_OBJECT_RETURN(obj, t, retVal) \
++ _gcmVERIFY_OBJECT_RETURN(gcm, obj, t, retVal)
++# define gcmkVERIFY_OBJECT_RETURN(obj, t, retVal) \
++ _gcmVERIFY_OBJECT_RETURN(gcmk, obj, t, retVal)
++#else
++# define gcmVERIFY_OBJECT_RETURN(obj, t) do {} while (gcvFALSE)
++# define gcmVERIFY_OBJECT_RETURN(obj, t) do {} while (gcvFALSE)
++#endif
++
++/******************************************************************************\
++********************************** gckOS Object *********************************
++\******************************************************************************/
++
++/* Construct a new gckOS object. */
++gceSTATUS
++gckOS_Construct(
++ IN gctPOINTER Context,
++ OUT gckOS * Os
++ );
++
++/* Destroy an gckOS object. */
++gceSTATUS
++gckOS_Destroy(
++ IN gckOS Os
++ );
++
++/* Query the video memory. */
++gceSTATUS
++gckOS_QueryVideoMemory(
++ IN gckOS Os,
++ OUT gctPHYS_ADDR * InternalAddress,
++ OUT gctSIZE_T * InternalSize,
++ OUT gctPHYS_ADDR * ExternalAddress,
++ OUT gctSIZE_T * ExternalSize,
++ OUT gctPHYS_ADDR * ContiguousAddress,
++ OUT gctSIZE_T * ContiguousSize
++ );
++
++/* Allocate memory from the heap. */
++gceSTATUS
++gckOS_Allocate(
++ IN gckOS Os,
++ IN gctSIZE_T Bytes,
++ OUT gctPOINTER * Memory
++ );
++
++/* Free allocated memory. */
++gceSTATUS
++gckOS_Free(
++ IN gckOS Os,
++ IN gctPOINTER Memory
++ );
++
++/* Wrapper for allocation memory.. */
++gceSTATUS
++gckOS_AllocateMemory(
++ IN gckOS Os,
++ IN gctSIZE_T Bytes,
++ OUT gctPOINTER * Memory
++ );
++
++/* Wrapper for freeing memory. */
++gceSTATUS
++gckOS_FreeMemory(
++ IN gckOS Os,
++ IN gctPOINTER Memory
++ );
++
++/* Allocate paged memory. */
++gceSTATUS
++gckOS_AllocatePagedMemory(
++ IN gckOS Os,
++ IN gctSIZE_T Bytes,
++ OUT gctPHYS_ADDR * Physical
++ );
++
++/* Allocate paged memory. */
++gceSTATUS
++gckOS_AllocatePagedMemoryEx(
++ IN gckOS Os,
++ IN gctUINT32 Flag,
++ IN gctSIZE_T Bytes,
++ OUT gctUINT32 * Gid,
++ OUT gctPHYS_ADDR * Physical
++ );
++
++/* Lock pages. */
++gceSTATUS
++gckOS_LockPages(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ IN gctBOOL Cacheable,
++ OUT gctPOINTER * Logical,
++ OUT gctSIZE_T * PageCount
++ );
++
++/* Map pages. */
++gceSTATUS
++gckOS_MapPages(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T PageCount,
++ IN gctPOINTER PageTable
++ );
++
++/* Map pages. */
++gceSTATUS
++gckOS_MapPagesEx(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T PageCount,
++ IN gctUINT32 Address,
++ IN gctPOINTER PageTable
++ );
++
++gceSTATUS
++gckOS_UnmapPages(
++ IN gckOS Os,
++ IN gctSIZE_T PageCount,
++ IN gctUINT32 Address
++ );
++
++/* Unlock pages. */
++gceSTATUS
++gckOS_UnlockPages(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ IN gctPOINTER Logical
++ );
++
++/* Free paged memory. */
++gceSTATUS
++gckOS_FreePagedMemory(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes
++ );
++
++/* Allocate non-paged memory. */
++gceSTATUS
++gckOS_AllocateNonPagedMemory(
++ IN gckOS Os,
++ IN gctBOOL InUserSpace,
++ IN OUT gctSIZE_T * Bytes,
++ OUT gctPHYS_ADDR * Physical,
++ OUT gctPOINTER * Logical
++ );
++
++/* Free non-paged memory. */
++gceSTATUS
++gckOS_FreeNonPagedMemory(
++ IN gckOS Os,
++ IN gctSIZE_T Bytes,
++ IN gctPHYS_ADDR Physical,
++ IN gctPOINTER Logical
++ );
++
++/* Allocate contiguous memory. */
++gceSTATUS
++gckOS_AllocateContiguous(
++ IN gckOS Os,
++ IN gctBOOL InUserSpace,
++ IN OUT gctSIZE_T * Bytes,
++ OUT gctPHYS_ADDR * Physical,
++ OUT gctPOINTER * Logical
++ );
++
++/* Free contiguous memory. */
++gceSTATUS
++gckOS_FreeContiguous(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctPOINTER Logical,
++ IN gctSIZE_T Bytes
++ );
++
++/* Get the number fo bytes per page. */
++gceSTATUS
++gckOS_GetPageSize(
++ IN gckOS Os,
++ OUT gctSIZE_T * PageSize
++ );
++
++/* Get the physical address of a corresponding logical address. */
++gceSTATUS
++gckOS_GetPhysicalAddress(
++ IN gckOS Os,
++ IN gctPOINTER Logical,
++ OUT gctUINT32 * Address
++ );
++
++/* Get the physical address of a corresponding user logical address. */
++gceSTATUS
++gckOS_UserLogicalToPhysical(
++ IN gckOS Os,
++ IN gctPOINTER Logical,
++ OUT gctUINT32 * Address
++ );
++
++/* Get the physical address of a corresponding logical address. */
++gceSTATUS
++gckOS_GetPhysicalAddressProcess(
++ IN gckOS Os,
++ IN gctPOINTER Logical,
++ IN gctUINT32 ProcessID,
++ OUT gctUINT32 * Address
++ );
++
++/* Map physical memory. */
++gceSTATUS
++gckOS_MapPhysical(
++ IN gckOS Os,
++ IN gctUINT32 Physical,
++ IN gctSIZE_T Bytes,
++ OUT gctPOINTER * Logical
++ );
++
++/* Unmap previously mapped physical memory. */
++gceSTATUS
++gckOS_UnmapPhysical(
++ IN gckOS Os,
++ IN gctPOINTER Logical,
++ IN gctSIZE_T Bytes
++ );
++
++/* Get real physical address from descriptor. */
++gceSTATUS
++gckOS_PhysicalToPhysicalAddress(
++ IN gckOS Os,
++ IN gctPOINTER Physical,
++ OUT gctUINT32 * PhysicalAddress
++ );
++
++/* Read data from a hardware register. */
++gceSTATUS
++gckOS_ReadRegister(
++ IN gckOS Os,
++ IN gctUINT32 Address,
++ OUT gctUINT32 * Data
++ );
++
++/* Read data from a hardware register. */
++gceSTATUS
++gckOS_ReadRegisterEx(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctUINT32 Address,
++ OUT gctUINT32 * Data
++ );
++
++/* Write data to a hardware register. */
++gceSTATUS
++gckOS_WriteRegister(
++ IN gckOS Os,
++ IN gctUINT32 Address,
++ IN gctUINT32 Data
++ );
++
++/* Write data to a hardware register. */
++gceSTATUS
++gckOS_WriteRegisterEx(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctUINT32 Address,
++ IN gctUINT32 Data
++ );
++
++#if gcdMULTI_GPU
++gceSTATUS
++gckOS_ReadRegisterByCoreId(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctUINT32 CoreId,
++ IN gctUINT32 Address,
++ OUT gctUINT32 * Data
++ );
++
++gceSTATUS
++gckOS_WriteRegisterByCoreId(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctUINT32 CoreId,
++ IN gctUINT32 Address,
++ IN gctUINT32 Data
++ );
++#endif
++
++/* Write data to a 32-bit memory location. */
++gceSTATUS
++gckOS_WriteMemory(
++ IN gckOS Os,
++ IN gctPOINTER Address,
++ IN gctUINT32 Data
++ );
++
++/* Map physical memory into the process space. */
++gceSTATUS
++gckOS_MapMemory(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ OUT gctPOINTER * Logical
++ );
++
++/* Unmap physical memory from the specified process space. */
++gceSTATUS
++gckOS_UnmapMemoryEx(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ IN gctPOINTER Logical,
++ IN gctUINT32 PID
++ );
++
++/* Unmap physical memory from the process space. */
++gceSTATUS
++gckOS_UnmapMemory(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ IN gctPOINTER Logical
++ );
++
++/* Unmap user logical memory out of physical memory.
++ * This function is only supported in Linux currently.
++ */
++gceSTATUS
++gckOS_UnmapUserLogical(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ IN gctPOINTER Logical
++ );
++
++/* Create a new mutex. */
++gceSTATUS
++gckOS_CreateMutex(
++ IN gckOS Os,
++ OUT gctPOINTER * Mutex
++ );
++
++/* Delete a mutex. */
++gceSTATUS
++gckOS_DeleteMutex(
++ IN gckOS Os,
++ IN gctPOINTER Mutex
++ );
++
++/* Acquire a mutex. */
++gceSTATUS
++gckOS_AcquireMutex(
++ IN gckOS Os,
++ IN gctPOINTER Mutex,
++ IN gctUINT32 Timeout
++ );
++
++/* Release a mutex. */
++gceSTATUS
++gckOS_ReleaseMutex(
++ IN gckOS Os,
++ IN gctPOINTER Mutex
++ );
++
++/* Atomically exchange a pair of 32-bit values. */
++gceSTATUS
++gckOS_AtomicExchange(
++ IN gckOS Os,
++ IN OUT gctUINT32_PTR Target,
++ IN gctUINT32 NewValue,
++ OUT gctUINT32_PTR OldValue
++ );
++
++/* Atomically exchange a pair of pointers. */
++gceSTATUS
++gckOS_AtomicExchangePtr(
++ IN gckOS Os,
++ IN OUT gctPOINTER * Target,
++ IN gctPOINTER NewValue,
++ OUT gctPOINTER * OldValue
++ );
++
++gceSTATUS
++gckOS_AtomSetMask(
++ IN gctPOINTER Atom,
++ IN gctUINT32 Mask
++ );
++
++gceSTATUS
++gckOS_AtomClearMask(
++ IN gctPOINTER Atom,
++ IN gctUINT32 Mask
++ );
++
++gceSTATUS
++gckOS_DumpCallStack(
++ IN gckOS Os
++ );
++
++gceSTATUS
++gckOS_GetProcessNameByPid(
++ IN gctINT Pid,
++ IN gctSIZE_T Length,
++ OUT gctUINT8_PTR String
++ );
++
++/*******************************************************************************
++**
++** gckOS_AtomConstruct
++**
++** Create an atom.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to a gckOS object.
++**
++** OUTPUT:
++**
++** gctPOINTER * Atom
++** Pointer to a variable receiving the constructed atom.
++*/
++gceSTATUS
++gckOS_AtomConstruct(
++ IN gckOS Os,
++ OUT gctPOINTER * Atom
++ );
++
++/*******************************************************************************
++**
++** gckOS_AtomDestroy
++**
++** Destroy an atom.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to a gckOS object.
++**
++** gctPOINTER Atom
++** Pointer to the atom to destroy.
++**
++** OUTPUT:
++**
++** Nothing.
++*/
++gceSTATUS
++gckOS_AtomDestroy(
++ IN gckOS Os,
++ OUT gctPOINTER Atom
++ );
++
++/*******************************************************************************
++**
++** gckOS_AtomGet
++**
++** Get the 32-bit value protected by an atom.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to a gckOS object.
++**
++** gctPOINTER Atom
++** Pointer to the atom.
++**
++** OUTPUT:
++**
++** gctINT32_PTR Value
++** Pointer to a variable the receives the value of the atom.
++*/
++gceSTATUS
++gckOS_AtomGet(
++ IN gckOS Os,
++ IN gctPOINTER Atom,
++ OUT gctINT32_PTR Value
++ );
++
++/*******************************************************************************
++**
++** gckOS_AtomSet
++**
++** Set the 32-bit value protected by an atom.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to a gckOS object.
++**
++** gctPOINTER Atom
++** Pointer to the atom.
++**
++** gctINT32 Value
++** The value of the atom.
++**
++** OUTPUT:
++**
++** Nothing.
++*/
++gceSTATUS
++gckOS_AtomSet(
++ IN gckOS Os,
++ IN gctPOINTER Atom,
++ IN gctINT32 Value
++ );
++
++/*******************************************************************************
++**
++** gckOS_AtomIncrement
++**
++** Atomically increment the 32-bit integer value inside an atom.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to a gckOS object.
++**
++** gctPOINTER Atom
++** Pointer to the atom.
++**
++** OUTPUT:
++**
++** gctINT32_PTR Value
++** Pointer to a variable the receives the original value of the atom.
++*/
++gceSTATUS
++gckOS_AtomIncrement(
++ IN gckOS Os,
++ IN gctPOINTER Atom,
++ OUT gctINT32_PTR Value
++ );
++
++/*******************************************************************************
++**
++** gckOS_AtomDecrement
++**
++** Atomically decrement the 32-bit integer value inside an atom.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to a gckOS object.
++**
++** gctPOINTER Atom
++** Pointer to the atom.
++**
++** OUTPUT:
++**
++** gctINT32_PTR Value
++** Pointer to a variable the receives the original value of the atom.
++*/
++gceSTATUS
++gckOS_AtomDecrement(
++ IN gckOS Os,
++ IN gctPOINTER Atom,
++ OUT gctINT32_PTR Value
++ );
++
++/* Delay a number of microseconds. */
++gceSTATUS
++gckOS_Delay(
++ IN gckOS Os,
++ IN gctUINT32 Delay
++ );
++
++/* Get time in milliseconds. */
++gceSTATUS
++gckOS_GetTicks(
++ OUT gctUINT32_PTR Time
++ );
++
++/* Compare time value. */
++gceSTATUS
++gckOS_TicksAfter(
++ IN gctUINT32 Time1,
++ IN gctUINT32 Time2,
++ OUT gctBOOL_PTR IsAfter
++ );
++
++/* Get time in microseconds. */
++gceSTATUS
++gckOS_GetTime(
++ OUT gctUINT64_PTR Time
++ );
++
++/* Memory barrier. */
++gceSTATUS
++gckOS_MemoryBarrier(
++ IN gckOS Os,
++ IN gctPOINTER Address
++ );
++
++/* Map user pointer. */
++gceSTATUS
++gckOS_MapUserPointer(
++ IN gckOS Os,
++ IN gctPOINTER Pointer,
++ IN gctSIZE_T Size,
++ OUT gctPOINTER * KernelPointer
++ );
++
++/* Unmap user pointer. */
++gceSTATUS
++gckOS_UnmapUserPointer(
++ IN gckOS Os,
++ IN gctPOINTER Pointer,
++ IN gctSIZE_T Size,
++ IN gctPOINTER KernelPointer
++ );
++
++/*******************************************************************************
++**
++** gckOS_QueryNeedCopy
++**
++** Query whether the memory can be accessed or mapped directly or it has to be
++** copied.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to an gckOS object.
++**
++** gctUINT32 ProcessID
++** Process ID of the current process.
++**
++** OUTPUT:
++**
++** gctBOOL_PTR NeedCopy
++** Pointer to a boolean receiving gcvTRUE if the memory needs a copy or
++** gcvFALSE if the memory can be accessed or mapped dircetly.
++*/
++gceSTATUS
++gckOS_QueryNeedCopy(
++ IN gckOS Os,
++ IN gctUINT32 ProcessID,
++ OUT gctBOOL_PTR NeedCopy
++ );
++
++/*******************************************************************************
++**
++** gckOS_CopyFromUserData
++**
++** Copy data from user to kernel memory.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to an gckOS object.
++**
++** gctPOINTER KernelPointer
++** Pointer to kernel memory.
++**
++** gctPOINTER Pointer
++** Pointer to user memory.
++**
++** gctSIZE_T Size
++** Number of bytes to copy.
++**
++** OUTPUT:
++**
++** Nothing.
++*/
++gceSTATUS
++gckOS_CopyFromUserData(
++ IN gckOS Os,
++ IN gctPOINTER KernelPointer,
++ IN gctPOINTER Pointer,
++ IN gctSIZE_T Size
++ );
++
++/*******************************************************************************
++**
++** gckOS_CopyToUserData
++**
++** Copy data from kernel to user memory.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to an gckOS object.
++**
++** gctPOINTER KernelPointer
++** Pointer to kernel memory.
++**
++** gctPOINTER Pointer
++** Pointer to user memory.
++**
++** gctSIZE_T Size
++** Number of bytes to copy.
++**
++** OUTPUT:
++**
++** Nothing.
++*/
++gceSTATUS
++gckOS_CopyToUserData(
++ IN gckOS Os,
++ IN gctPOINTER KernelPointer,
++ IN gctPOINTER Pointer,
++ IN gctSIZE_T Size
++ );
++
++gceSTATUS
++gckOS_SuspendInterrupt(
++ IN gckOS Os
++ );
++
++gceSTATUS
++gckOS_SuspendInterruptEx(
++ IN gckOS Os,
++ IN gceCORE Core
++ );
++
++gceSTATUS
++gckOS_ResumeInterrupt(
++ IN gckOS Os
++ );
++
++gceSTATUS
++gckOS_ResumeInterruptEx(
++ IN gckOS Os,
++ IN gceCORE Core
++ );
++
++/* Get the base address for the physical memory. */
++gceSTATUS
++gckOS_GetBaseAddress(
++ IN gckOS Os,
++ OUT gctUINT32_PTR BaseAddress
++ );
++
++/* Perform a memory copy. */
++gceSTATUS
++gckOS_MemCopy(
++ IN gctPOINTER Destination,
++ IN gctCONST_POINTER Source,
++ IN gctSIZE_T Bytes
++ );
++
++/* Zero memory. */
++gceSTATUS
++gckOS_ZeroMemory(
++ IN gctPOINTER Memory,
++ IN gctSIZE_T Bytes
++ );
++
++/* Device I/O control to the kernel HAL layer. */
++gceSTATUS
++gckOS_DeviceControl(
++ IN gckOS Os,
++ IN gctBOOL FromUser,
++ IN gctUINT32 IoControlCode,
++ IN gctPOINTER InputBuffer,
++ IN gctSIZE_T InputBufferSize,
++ OUT gctPOINTER OutputBuffer,
++ IN gctSIZE_T OutputBufferSize
++ );
++
++/*******************************************************************************
++**
++** gckOS_GetProcessID
++**
++** Get current process ID.
++**
++** INPUT:
++**
++** Nothing.
++**
++** OUTPUT:
++**
++** gctUINT32_PTR ProcessID
++** Pointer to the variable that receives the process ID.
++*/
++gceSTATUS
++gckOS_GetProcessID(
++ OUT gctUINT32_PTR ProcessID
++ );
++
++gceSTATUS
++gckOS_GetCurrentProcessID(
++ OUT gctUINT32_PTR ProcessID
++ );
++
++/*******************************************************************************
++**
++** gckOS_GetThreadID
++**
++** Get current thread ID.
++**
++** INPUT:
++**
++** Nothing.
++**
++** OUTPUT:
++**
++** gctUINT32_PTR ThreadID
++** Pointer to the variable that receives the thread ID.
++*/
++gceSTATUS
++gckOS_GetThreadID(
++ OUT gctUINT32_PTR ThreadID
++ );
++
++#if gcdSECURITY
++gceSTATUS
++gckOS_OpenSecurityChannel(
++ IN gckOS Os,
++ IN gceCORE Core,
++ OUT gctUINT32 *Channel
++ );
++
++gceSTATUS
++gckOS_CloseSecurityChannel(
++ IN gctUINT32 Channel
++ );
++
++gceSTATUS
++gckOS_CallSecurityService(
++ IN gctUINT32 Channel,
++ IN gcsTA_INTERFACE * Interface
++ );
++
++gceSTATUS
++gckOS_InitSecurityChannel(
++ OUT gctUINT32 Channel
++ );
++
++gceSTATUS
++gckOS_AllocatePageArray(
++ IN gckOS Os,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T PageCount,
++ OUT gctPOINTER * PageArrayLogical,
++ OUT gctPHYS_ADDR * PageArrayPhysical
++ );
++#endif
++
++/******************************************************************************\
++********************************** Signal Object *********************************
++\******************************************************************************/
++
++/* Create a signal. */
++gceSTATUS
++gckOS_CreateSignal(
++ IN gckOS Os,
++ IN gctBOOL ManualReset,
++ OUT gctSIGNAL * Signal
++ );
++
++/* Destroy a signal. */
++gceSTATUS
++gckOS_DestroySignal(
++ IN gckOS Os,
++ IN gctSIGNAL Signal
++ );
++
++/* Signal a signal. */
++gceSTATUS
++gckOS_Signal(
++ IN gckOS Os,
++ IN gctSIGNAL Signal,
++ IN gctBOOL State
++ );
++
++/* Wait for a signal. */
++gceSTATUS
++gckOS_WaitSignal(
++ IN gckOS Os,
++ IN gctSIGNAL Signal,
++ IN gctUINT32 Wait
++ );
++
++/* Map a user signal to the kernel space. */
++gceSTATUS
++gckOS_MapSignal(
++ IN gckOS Os,
++ IN gctSIGNAL Signal,
++ IN gctHANDLE Process,
++ OUT gctSIGNAL * MappedSignal
++ );
++
++/* Unmap a user signal */
++gceSTATUS
++gckOS_UnmapSignal(
++ IN gckOS Os,
++ IN gctSIGNAL Signal
++ );
++
++/* Map user memory. */
++gceSTATUS
++gckOS_MapUserMemory(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctPOINTER Memory,
++ IN gctUINT32 Physical,
++ IN gctSIZE_T Size,
++ OUT gctPOINTER * Info,
++ OUT gctUINT32_PTR Address
++ );
++
++/* Unmap user memory. */
++gceSTATUS
++gckOS_UnmapUserMemory(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctPOINTER Memory,
++ IN gctSIZE_T Size,
++ IN gctPOINTER Info,
++ IN gctUINT32 Address
++ );
++
++/******************************************************************************\
++************************** Android Native Fence Sync ***************************
++\******************************************************************************/
++gceSTATUS
++gckOS_CreateSyncTimeline(
++ IN gckOS Os,
++ OUT gctHANDLE * Timeline
++ );
++
++gceSTATUS
++gckOS_DestroySyncTimeline(
++ IN gckOS Os,
++ IN gctHANDLE Timeline
++ );
++
++gceSTATUS
++gckOS_CreateSyncPoint(
++ IN gckOS Os,
++ OUT gctSYNC_POINT * SyncPoint
++ );
++
++gceSTATUS
++gckOS_ReferenceSyncPoint(
++ IN gckOS Os,
++ IN gctSYNC_POINT SyncPoint
++ );
++
++gceSTATUS
++gckOS_DestroySyncPoint(
++ IN gckOS Os,
++ IN gctSYNC_POINT SyncPoint
++ );
++
++gceSTATUS
++gckOS_SignalSyncPoint(
++ IN gckOS Os,
++ IN gctSYNC_POINT SyncPoint
++ );
++
++gceSTATUS
++gckOS_QuerySyncPoint(
++ IN gckOS Os,
++ IN gctSYNC_POINT SyncPoint,
++ OUT gctBOOL_PTR State
++ );
++
++gceSTATUS
++gckOS_CreateNativeFence(
++ IN gckOS Os,
++ IN gctHANDLE Timeline,
++ IN gctSYNC_POINT SyncPoint,
++ OUT gctINT * FenceFD
++ );
++
++#if !USE_NEW_LINUX_SIGNAL
++/* Create signal to be used in the user space. */
++gceSTATUS
++gckOS_CreateUserSignal(
++ IN gckOS Os,
++ IN gctBOOL ManualReset,
++ OUT gctINT * SignalID
++ );
++
++/* Destroy signal used in the user space. */
++gceSTATUS
++gckOS_DestroyUserSignal(
++ IN gckOS Os,
++ IN gctINT SignalID
++ );
++
++/* Wait for signal used in the user space. */
++gceSTATUS
++gckOS_WaitUserSignal(
++ IN gckOS Os,
++ IN gctINT SignalID,
++ IN gctUINT32 Wait
++ );
++
++/* Signal a signal used in the user space. */
++gceSTATUS
++gckOS_SignalUserSignal(
++ IN gckOS Os,
++ IN gctINT SignalID,
++ IN gctBOOL State
++ );
++#endif /* USE_NEW_LINUX_SIGNAL */
++
++/* Set a signal owned by a process. */
++#if defined(__QNXNTO__)
++gceSTATUS
++gckOS_UserSignal(
++ IN gckOS Os,
++ IN gctSIGNAL Signal,
++ IN gctINT Recvid,
++ IN gctINT Coid
++ );
++#else
++gceSTATUS
++gckOS_UserSignal(
++ IN gckOS Os,
++ IN gctSIGNAL Signal,
++ IN gctHANDLE Process
++ );
++#endif
++
++/******************************************************************************\
++** Cache Support
++*/
++
++gceSTATUS
++gckOS_CacheClean(
++ gckOS Os,
++ gctUINT32 ProcessID,
++ gctPHYS_ADDR Handle,
++ gctUINT32 Physical,
++ gctPOINTER Logical,
++ gctSIZE_T Bytes
++ );
++
++gceSTATUS
++gckOS_CacheFlush(
++ gckOS Os,
++ gctUINT32 ProcessID,
++ gctPHYS_ADDR Handle,
++ gctUINT32 Physical,
++ gctPOINTER Logical,
++ gctSIZE_T Bytes
++ );
++
++gceSTATUS
++gckOS_CacheInvalidate(
++ gckOS Os,
++ gctUINT32 ProcessID,
++ gctPHYS_ADDR Handle,
++ gctUINT32 Physical,
++ gctPOINTER Logical,
++ gctSIZE_T Bytes
++ );
++
++gceSTATUS
++gckOS_CPUPhysicalToGPUPhysical(
++ IN gckOS Os,
++ IN gctUINT32 CPUPhysical,
++ IN gctUINT32_PTR GPUPhysical
++ );
++
++gceSTATUS
++gckOS_GPUPhysicalToCPUPhysical(
++ IN gckOS Os,
++ IN gctUINT32 GPUPhysical,
++ IN gctUINT32_PTR CPUPhysical
++ );
++
++gceSTATUS
++gckOS_QueryOption(
++ IN gckOS Os,
++ IN gctCONST_STRING Option,
++ OUT gctUINT32 * Value
++ );
++
++/******************************************************************************\
++** Debug Support
++*/
++
++void
++gckOS_SetDebugLevel(
++ IN gctUINT32 Level
++ );
++
++void
++gckOS_SetDebugZone(
++ IN gctUINT32 Zone
++ );
++
++void
++gckOS_SetDebugLevelZone(
++ IN gctUINT32 Level,
++ IN gctUINT32 Zone
++ );
++
++void
++gckOS_SetDebugZones(
++ IN gctUINT32 Zones,
++ IN gctBOOL Enable
++ );
++
++void
++gckOS_SetDebugFile(
++ IN gctCONST_STRING FileName
++ );
++
++/*******************************************************************************
++** Broadcast interface.
++*/
++
++typedef enum _gceBROADCAST
++{
++ /* GPU might be idle. */
++ gcvBROADCAST_GPU_IDLE,
++
++ /* A commit is going to happen. */
++ gcvBROADCAST_GPU_COMMIT,
++
++ /* GPU seems to be stuck. */
++ gcvBROADCAST_GPU_STUCK,
++
++ /* First process gets attached. */
++ gcvBROADCAST_FIRST_PROCESS,
++
++ /* Last process gets detached. */
++ gcvBROADCAST_LAST_PROCESS,
++
++ /* AXI bus error. */
++ gcvBROADCAST_AXI_BUS_ERROR,
++
++ /* Out of memory. */
++ gcvBROADCAST_OUT_OF_MEMORY,
++}
++gceBROADCAST;
++
++gceSTATUS
++gckOS_Broadcast(
++ IN gckOS Os,
++ IN gckHARDWARE Hardware,
++ IN gceBROADCAST Reason
++ );
++
++gceSTATUS
++gckOS_BroadcastHurry(
++ IN gckOS Os,
++ IN gckHARDWARE Hardware,
++ IN gctUINT Urgency
++ );
++
++gceSTATUS
++gckOS_BroadcastCalibrateSpeed(
++ IN gckOS Os,
++ IN gckHARDWARE Hardware,
++ IN gctUINT Idle,
++ IN gctUINT Time
++ );
++
++/*******************************************************************************
++**
++** gckOS_SetGPUPower
++**
++** Set the power of the GPU on or off.
++**
++** INPUT:
++**
++** gckOS Os
++** Pointer to a gckOS object.
++**
++** gceCORE Core
++** GPU whose power is set.
++**
++** gctBOOL Clock
++** gcvTRUE to turn on the clock, or gcvFALSE to turn off the clock.
++**
++** gctBOOL Power
++** gcvTRUE to turn on the power, or gcvFALSE to turn off the power.
++**
++** OUTPUT:
++**
++** Nothing.
++*/
++gceSTATUS
++gckOS_SetGPUPower(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctBOOL Clock,
++ IN gctBOOL Power
++ );
++
++gceSTATUS
++gckOS_ResetGPU(
++ IN gckOS Os,
++ IN gceCORE Core
++ );
++
++gceSTATUS
++gckOS_PrepareGPUFrequency(
++ IN gckOS Os,
++ IN gceCORE Core
++ );
++
++gceSTATUS
++gckOS_FinishGPUFrequency(
++ IN gckOS Os,
++ IN gceCORE Core
++ );
++
++gceSTATUS
++gckOS_QueryGPUFrequency(
++ IN gckOS Os,
++ IN gceCORE Core,
++ OUT gctUINT32 * Frequency,
++ OUT gctUINT8 * Scale
++ );
++
++gceSTATUS
++gckOS_SetGPUFrequency(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctUINT8 Scale
++ );
++
++/*******************************************************************************
++** Semaphores.
++*/
++
++/* Create a new semaphore. */
++gceSTATUS
++gckOS_CreateSemaphore(
++ IN gckOS Os,
++ OUT gctPOINTER * Semaphore
++ );
++
++#if gcdENABLE_VG
++gceSTATUS
++gckOS_CreateSemaphoreVG(
++ IN gckOS Os,
++ OUT gctPOINTER * Semaphore
++ );
++#endif
++
++/* Delete a semahore. */
++gceSTATUS
++gckOS_DestroySemaphore(
++ IN gckOS Os,
++ IN gctPOINTER Semaphore
++ );
++
++/* Acquire a semahore. */
++gceSTATUS
++gckOS_AcquireSemaphore(
++ IN gckOS Os,
++ IN gctPOINTER Semaphore
++ );
++
++/* Try to acquire a semahore. */
++gceSTATUS
++gckOS_TryAcquireSemaphore(
++ IN gckOS Os,
++ IN gctPOINTER Semaphore
++ );
++
++/* Release a semahore. */
++gceSTATUS
++gckOS_ReleaseSemaphore(
++ IN gckOS Os,
++ IN gctPOINTER Semaphore
++ );
++
++/*******************************************************************************
++** Timer API.
++*/
++
++typedef void (*gctTIMERFUNCTION)(gctPOINTER);
++
++/* Create a timer. */
++gceSTATUS
++gckOS_CreateTimer(
++ IN gckOS Os,
++ IN gctTIMERFUNCTION Function,
++ IN gctPOINTER Data,
++ OUT gctPOINTER * Timer
++ );
++
++/* Destory a timer. */
++gceSTATUS
++gckOS_DestroyTimer(
++ IN gckOS Os,
++ IN gctPOINTER Timer
++ );
++
++/* Start a timer. */
++gceSTATUS
++gckOS_StartTimer(
++ IN gckOS Os,
++ IN gctPOINTER Timer,
++ IN gctUINT32 Delay
++ );
++
++/* Stop a timer. */
++gceSTATUS
++gckOS_StopTimer(
++ IN gckOS Os,
++ IN gctPOINTER Timer
++ );
++
++/******************************************************************************\
++********************************* gckHEAP Object ********************************
++\******************************************************************************/
++
++typedef struct _gckHEAP * gckHEAP;
++
++/* Construct a new gckHEAP object. */
++gceSTATUS
++gckHEAP_Construct(
++ IN gckOS Os,
++ IN gctSIZE_T AllocationSize,
++ OUT gckHEAP * Heap
++ );
++
++/* Destroy an gckHEAP object. */
++gceSTATUS
++gckHEAP_Destroy(
++ IN gckHEAP Heap
++ );
++
++/* Allocate memory. */
++gceSTATUS
++gckHEAP_Allocate(
++ IN gckHEAP Heap,
++ IN gctSIZE_T Bytes,
++ OUT gctPOINTER * Node
++ );
++
++/* Free memory. */
++gceSTATUS
++gckHEAP_Free(
++ IN gckHEAP Heap,
++ IN gctPOINTER Node
++ );
++
++/* Profile the heap. */
++gceSTATUS
++gckHEAP_ProfileStart(
++ IN gckHEAP Heap
++ );
++
++gceSTATUS
++gckHEAP_ProfileEnd(
++ IN gckHEAP Heap,
++ IN gctCONST_STRING Title
++ );
++
++
++/******************************************************************************\
++******************************** gckVIDMEM Object ******************************
++\******************************************************************************/
++
++typedef struct _gckVIDMEM * gckVIDMEM;
++typedef struct _gckKERNEL * gckKERNEL;
++typedef struct _gckDB * gckDB;
++typedef struct _gckDVFS * gckDVFS;
++
++/* Construct a new gckVIDMEM object. */
++gceSTATUS
++gckVIDMEM_Construct(
++ IN gckOS Os,
++ IN gctUINT32 BaseAddress,
++ IN gctSIZE_T Bytes,
++ IN gctSIZE_T Threshold,
++ IN gctSIZE_T Banking,
++ OUT gckVIDMEM * Memory
++ );
++
++/* Destroy an gckVDIMEM object. */
++gceSTATUS
++gckVIDMEM_Destroy(
++ IN gckVIDMEM Memory
++ );
++
++/* Allocate linear memory. */
++gceSTATUS
++gckVIDMEM_AllocateLinear(
++ IN gckKERNEL Kernel,
++ IN gckVIDMEM Memory,
++ IN gctSIZE_T Bytes,
++ IN gctUINT32 Alignment,
++ IN gceSURF_TYPE Type,
++ IN gctBOOL Specified,
++ OUT gcuVIDMEM_NODE_PTR * Node
++ );
++
++/* Free memory. */
++gceSTATUS
++gckVIDMEM_Free(
++ IN gckKERNEL Kernel,
++ IN gcuVIDMEM_NODE_PTR Node
++ );
++
++/* Lock memory. */
++gceSTATUS
++gckVIDMEM_Lock(
++ IN gckKERNEL Kernel,
++ IN gckVIDMEM_NODE Node,
++ IN gctBOOL Cacheable,
++ OUT gctUINT32 * Address,
++ OUT gctUINT32 * Gid,
++ OUT gctUINT64 * PhysicalAddress
++ );
++
++/* Unlock memory. */
++gceSTATUS
++gckVIDMEM_Unlock(
++ IN gckKERNEL Kernel,
++ IN gckVIDMEM_NODE Node,
++ IN gceSURF_TYPE Type,
++ IN OUT gctBOOL * Asynchroneous
++ );
++
++/* Construct a gcuVIDMEM_NODE union for virtual memory. */
++gceSTATUS
++gckVIDMEM_ConstructVirtual(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 Flag,
++ IN gctSIZE_T Bytes,
++ OUT gcuVIDMEM_NODE_PTR * Node
++ );
++
++/* Destroy a gcuVIDMEM_NODE union for virtual memory. */
++gceSTATUS
++gckVIDMEM_DestroyVirtual(
++ IN gcuVIDMEM_NODE_PTR Node
++ );
++
++/******************************************************************************\
++******************************** gckKERNEL Object ******************************
++\******************************************************************************/
++
++struct _gcsHAL_INTERFACE;
++
++/* Notifications. */
++typedef enum _gceNOTIFY
++{
++ gcvNOTIFY_INTERRUPT,
++ gcvNOTIFY_COMMAND_QUEUE,
++}
++gceNOTIFY;
++
++/* Flush flags. */
++typedef enum _gceKERNEL_FLUSH
++{
++ gcvFLUSH_COLOR = 0x01,
++ gcvFLUSH_DEPTH = 0x02,
++ gcvFLUSH_TEXTURE = 0x04,
++ gcvFLUSH_2D = 0x08,
++#if gcdMULTI_GPU
++ gcvFLUSH_L2 = 0x10,
++#endif
++ gcvFLUSH_TILE_STATUS = 0x20,
++ gcvFLUSH_ALL = gcvFLUSH_COLOR
++ | gcvFLUSH_DEPTH
++ | gcvFLUSH_TEXTURE
++ | gcvFLUSH_2D
++#if gcdMULTI_GPU
++ | gcvFLUSH_L2
++#endif
++ | gcvFLUSH_TILE_STATUS
++}
++gceKERNEL_FLUSH;
++
++/* Construct a new gckKERNEL object. */
++gceSTATUS
++gckKERNEL_Construct(
++ IN gckOS Os,
++ IN gceCORE Core,
++ IN gctPOINTER Context,
++ IN gckDB SharedDB,
++ OUT gckKERNEL * Kernel
++ );
++
++/* Destroy an gckKERNEL object. */
++gceSTATUS
++gckKERNEL_Destroy(
++ IN gckKERNEL Kernel
++ );
++
++/* Dispatch a user-level command. */
++gceSTATUS
++gckKERNEL_Dispatch(
++ IN gckKERNEL Kernel,
++ IN gctBOOL FromUser,
++ IN OUT struct _gcsHAL_INTERFACE * Interface
++ );
++
++/* Query Database requirements. */
++gceSTATUS
++ gckKERNEL_QueryDatabase(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ IN OUT gcsHAL_INTERFACE * Interface
++ );
++
++/* Query the video memory. */
++gceSTATUS
++gckKERNEL_QueryVideoMemory(
++ IN gckKERNEL Kernel,
++ OUT struct _gcsHAL_INTERFACE * Interface
++ );
++
++/* Lookup the gckVIDMEM object for a pool. */
++gceSTATUS
++gckKERNEL_GetVideoMemoryPool(
++ IN gckKERNEL Kernel,
++ IN gcePOOL Pool,
++ OUT gckVIDMEM * VideoMemory
++ );
++
++gceSTATUS
++gckKERNEL_AllocateLinearMemory(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ IN OUT gcePOOL * Pool,
++ IN gctSIZE_T Bytes,
++ IN gctUINT32 Alignment,
++ IN gceSURF_TYPE Type,
++ IN gctUINT32 Flag,
++ OUT gctUINT32 * Node
++ );
++
++gceSTATUS
++gckKERNEL_ReleaseVideoMemory(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ IN gctUINT32 Handle
++ );
++
++gceSTATUS
++gckKERNEL_LockVideoMemory(
++ IN gckKERNEL Kernel,
++ IN gceCORE Core,
++ IN gctUINT32 ProcessID,
++ IN gctBOOL FromUser,
++ IN OUT gcsHAL_INTERFACE * Interface
++ );
++
++gceSTATUS
++gckKERNEL_UnlockVideoMemory(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 ProcessID,
++ IN OUT gcsHAL_INTERFACE * Interface
++ );
++
++/* Map video memory. */
++gceSTATUS
++gckKERNEL_MapVideoMemory(
++ IN gckKERNEL Kernel,
++ IN gctBOOL InUserSpace,
++ IN gctUINT32 Address,
++#ifdef __QNXNTO__
++ IN gctUINT32 Pid,
++ IN gctUINT32 Bytes,
++#endif
++ OUT gctPOINTER * Logical
++ );
++
++/* Map video memory. */
++gceSTATUS
++gckKERNEL_MapVideoMemoryEx(
++ IN gckKERNEL Kernel,
++ IN gceCORE Core,
++ IN gctBOOL InUserSpace,
++ IN gctUINT32 Address,
++#ifdef __QNXNTO__
++ IN gctUINT32 Pid,
++ IN gctUINT32 Bytes,
++#endif
++ OUT gctPOINTER * Logical
++ );
++
++#ifdef __QNXNTO__
++/* Unmap video memory. */
++gceSTATUS
++gckKERNEL_UnmapVideoMemory(
++ IN gckKERNEL Kernel,
++ IN gctPOINTER Logical,
++ IN gctUINT32 Pid,
++ IN gctUINT32 Bytes
++ );
++#endif
++
++/* Map memory. */
++gceSTATUS
++gckKERNEL_MapMemory(
++ IN gckKERNEL Kernel,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ OUT gctPOINTER * Logical
++ );
++
++/* Unmap memory. */
++gceSTATUS
++gckKERNEL_UnmapMemory(
++ IN gckKERNEL Kernel,
++ IN gctPHYS_ADDR Physical,
++ IN gctSIZE_T Bytes,
++ IN gctPOINTER Logical
++ );
++
++/* Notification of events. */
++gceSTATUS
++gckKERNEL_Notify(
++ IN gckKERNEL Kernel,
++#if gcdMULTI_GPU
++ IN gctUINT CoreId,
++#endif
++ IN gceNOTIFY Notifcation,
++ IN gctBOOL Data
++ );
++
++gceSTATUS
++gckKERNEL_QuerySettings(
++ IN gckKERNEL Kernel,
++ OUT gcsKERNEL_SETTINGS * Settings
++ );
++
++/*******************************************************************************
++**
++** gckKERNEL_Recovery
++**
++** Try to recover the GPU from a fatal error.
++**
++** INPUT:
++**
++** gckKERNEL Kernel
++** Pointer to an gckKERNEL object.
++**
++** OUTPUT:
++**
++** Nothing.
++*/
++gceSTATUS
++gckKERNEL_Recovery(
++ IN gckKERNEL Kernel
++ );
++
++/* Set the value of timeout on HW operation. */
++void
++gckKERNEL_SetTimeOut(
++ IN gckKERNEL Kernel,
++ IN gctUINT32 timeOut
++ );
++
++/* Get access to the user data. */
++gceSTATUS
++gckKERNEL_OpenUserData(
++ IN gckKERNEL Kernel,
++ IN gctBOOL NeedCopy,
++ IN gctPOINTER StaticStorage,
++ IN gctPOINTER UserPointer,
++ IN gctSIZE_T Size,
++ OUT gctPOINTER * KernelPointer
++ );
++
++/* Release resources associated with the user data connection. */
++gceSTATUS
++gckKERNEL_CloseUserData(
++ IN gckKERNEL Kernel,
++ IN gctBOOL NeedCopy,
++ IN gctBOOL FlushData,
++ IN gctPOINTER UserPointer,
++ IN gctSIZE_T Size,
++ OUT gctPOINTER * KernelPointer
++ );
++
++gceSTATUS
++gckDVFS_Construct(
++ IN gckHARDWARE Hardware,
++ OUT gckDVFS * Frequency
++ );
++
++gceSTATUS
++gckDVFS_Destroy(
++ IN gckDVFS Dvfs
++ );
++
++gceSTATUS
++gckDVFS_Start(
++ IN gckDVFS Dvfs
++ );
++
++gceSTATUS
++gckDVFS_Stop(
++ IN gckDVFS Dvfs
++ );
++
++/******************************************************************************\
++******************************* gckHARDWARE Object *****************************
++\******************************************************************************/
++
++/* Construct a new gckHARDWARE object. */
++gceSTATUS
++gckHARDWARE_Construct(
++ IN gckOS Os,
++ IN gceCORE Core,
++ OUT gckHARDWARE * Hardware
++ );
++
++/* Destroy an gckHARDWARE object. */
++gceSTATUS
++gckHARDWARE_Destroy(
++ IN gckHARDWARE Hardware
++ );
++
++/* Get hardware type. */
++gceSTATUS
++gckHARDWARE_GetType(
++ IN gckHARDWARE Hardware,
++ OUT gceHARDWARE_TYPE * Type
++ );
++
++/* Query system memory requirements. */
++gceSTATUS
++gckHARDWARE_QuerySystemMemory(
++ IN gckHARDWARE Hardware,
++ OUT gctSIZE_T * SystemSize,
++ OUT gctUINT32 * SystemBaseAddress
++ );
++
++/* Build virtual address. */
++gceSTATUS
++gckHARDWARE_BuildVirtualAddress(
++ IN gckHARDWARE Hardware,
++ IN gctUINT32 Index,
++ IN gctUINT32 Offset,
++ OUT gctUINT32 * Address
++ );
++
++/* Query command buffer requirements. */
++gceSTATUS
++gckHARDWARE_QueryCommandBuffer(
++ IN gckHARDWARE Hardware,
++ OUT gctUINT32 * Alignment,
++ OUT gctUINT32 * ReservedHead,
++ OUT gctUINT32 * ReservedTail
++ );
++
++/* Add a WAIT/LINK pair in the command queue. */
++gceSTATUS
++gckHARDWARE_WaitLink(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN gctUINT32 Offset,
++ IN OUT gctUINT32 * Bytes,
++ OUT gctUINT32 * WaitOffset,
++ OUT gctUINT32 * WaitBytes
++ );
++
++/* Kickstart the command processor. */
++gceSTATUS
++gckHARDWARE_Execute(
++ IN gckHARDWARE Hardware,
++ IN gctUINT32 Address,
++ IN gctSIZE_T Bytes
++ );
++
++/* Add an END command in the command queue. */
++gceSTATUS
++gckHARDWARE_End(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN OUT gctUINT32 * Bytes
++ );
++
++#if gcdMULTI_GPU
++gceSTATUS
++gckHARDWARE_ChipEnable(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN gceCORE_3D_MASK ChipEnable,
++ IN OUT gctSIZE_T * Bytes
++ );
++#endif
++
++/* Add a NOP command in the command queue. */
++gceSTATUS
++gckHARDWARE_Nop(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN OUT gctSIZE_T * Bytes
++ );
++
++/* Add a PIPESELECT command in the command queue. */
++gceSTATUS
++gckHARDWARE_PipeSelect(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN gcePIPE_SELECT Pipe,
++ IN OUT gctUINT32 * Bytes
++ );
++
++/* Add a LINK command in the command queue. */
++gceSTATUS
++gckHARDWARE_Link(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN gctUINT32 FetchAddress,
++ IN gctUINT32 FetchSize,
++ IN OUT gctUINT32 * Bytes
++ );
++
++/* Add an EVENT command in the command queue. */
++gceSTATUS
++gckHARDWARE_Event(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN gctUINT8 Event,
++ IN gceKERNEL_WHERE FromWhere,
++ IN OUT gctUINT32 * Bytes
++ );
++
++/* Query the available memory. */
++gceSTATUS
++gckHARDWARE_QueryMemory(
++ IN gckHARDWARE Hardware,
++ OUT gctSIZE_T * InternalSize,
++ OUT gctUINT32 * InternalBaseAddress,
++ OUT gctUINT32 * InternalAlignment,
++ OUT gctSIZE_T * ExternalSize,
++ OUT gctUINT32 * ExternalBaseAddress,
++ OUT gctUINT32 * ExternalAlignment,
++ OUT gctUINT32 * HorizontalTileSize,
++ OUT gctUINT32 * VerticalTileSize
++ );
++
++/* Query the identity of the hardware. */
++gceSTATUS
++gckHARDWARE_QueryChipIdentity(
++ IN gckHARDWARE Hardware,
++ OUT gcsHAL_QUERY_CHIP_IDENTITY_PTR Identity
++ );
++
++/* Query the shader uniforms support. */
++gceSTATUS
++gckHARDWARE_QueryShaderCaps(
++ IN gckHARDWARE Hardware,
++ OUT gctUINT * VertexUniforms,
++ OUT gctUINT * FragmentUniforms,
++ OUT gctBOOL * UnifiedUnforms
++ );
++
++/* Split a harwdare specific address into API stuff. */
++gceSTATUS
++gckHARDWARE_SplitMemory(
++ IN gckHARDWARE Hardware,
++ IN gctUINT32 Address,
++ OUT gcePOOL * Pool,
++ OUT gctUINT32 * Offset
++ );
++
++/* Update command queue tail pointer. */
++gceSTATUS
++gckHARDWARE_UpdateQueueTail(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN gctUINT32 Offset
++ );
++
++/* Convert logical address to hardware specific address. */
++gceSTATUS
++gckHARDWARE_ConvertLogical(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN gctBOOL InUserSpace,
++ OUT gctUINT32 * Address
++ );
++
++/* Interrupt manager. */
++gceSTATUS
++gckHARDWARE_Interrupt(
++ IN gckHARDWARE Hardware,
++#if gcdMULTI_GPU
++ IN gctUINT CoreId,
++#endif
++ IN gctBOOL InterruptValid
++ );
++
++/* Program MMU. */
++gceSTATUS
++gckHARDWARE_SetMMU(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical
++ );
++
++/* Flush the MMU. */
++gceSTATUS
++gckHARDWARE_FlushMMU(
++ IN gckHARDWARE Hardware
++ );
++
++/* Set the page table base address. */
++gceSTATUS
++gckHARDWARE_SetMMUv2(
++ IN gckHARDWARE Hardware,
++ IN gctBOOL Enable,
++ IN gctPOINTER MtlbAddress,
++ IN gceMMU_MODE Mode,
++ IN gctPOINTER SafeAddress,
++ IN gctBOOL FromPower
++ );
++
++#if gcdPROCESS_ADDRESS_SPACE
++/* Configure mmu configuration. */
++gceSTATUS
++gckHARDWARE_ConfigMMU(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER Logical,
++ IN gctPOINTER MtlbLogical,
++ IN gctUINT32 Offset,
++ IN OUT gctSIZE_T * Bytes,
++ OUT gctSIZE_T * WaitLinkOffset,
++ OUT gctSIZE_T * WaitLinkBytes
++ );
++#endif
++
++/* Get idle register. */
++gceSTATUS
++gckHARDWARE_GetIdle(
++ IN gckHARDWARE Hardware,
++ IN gctBOOL Wait,
++ OUT gctUINT32 * Data
++ );
++
++/* Flush the caches. */
++gceSTATUS
++gckHARDWARE_Flush(
++ IN gckHARDWARE Hardware,
++ IN gceKERNEL_FLUSH Flush,
++ IN gctPOINTER Logical,
++ IN OUT gctUINT32 * Bytes
++ );
++
++/* Enable/disable fast clear. */
++gceSTATUS
++gckHARDWARE_SetFastClear(
++ IN gckHARDWARE Hardware,
++ IN gctINT Enable,
++ IN gctINT Compression
++ );
++
++gceSTATUS
++gckHARDWARE_ReadInterrupt(
++ IN gckHARDWARE Hardware,
++ OUT gctUINT32_PTR IDs
++ );
++
++/* Power management. */
++gceSTATUS
++gckHARDWARE_SetPowerManagementState(
++ IN gckHARDWARE Hardware,
++ IN gceCHIPPOWERSTATE State
++ );
++
++gceSTATUS
++gckHARDWARE_QueryPowerManagementState(
++ IN gckHARDWARE Hardware,
++ OUT gceCHIPPOWERSTATE* State
++ );
++
++gceSTATUS
++gckHARDWARE_SetPowerManagement(
++ IN gckHARDWARE Hardware,
++ IN gctBOOL PowerManagement
++ );
++
++gceSTATUS
++gckHARDWARE_SetPowerManagementLock(
++ IN gckHARDWARE Hardware,
++ IN gctBOOL Lock
++ );
++
++gceSTATUS
++gckHARDWARE_SetGpuProfiler(
++ IN gckHARDWARE Hardware,
++ IN gctBOOL GpuProfiler
++ );
++
++#if gcdENABLE_FSCALE_VAL_ADJUST
++gceSTATUS
++gckHARDWARE_SetFscaleValue(
++ IN gckHARDWARE Hardware,
++ IN gctUINT32 FscaleValue
++ );
++
++gceSTATUS
++gckHARDWARE_GetFscaleValue(
++ IN gckHARDWARE Hardware,
++ IN gctUINT * FscaleValue,
++ IN gctUINT * MinFscaleValue,
++ IN gctUINT * MaxFscaleValue
++ );
++
++gceSTATUS
++gckHARDWARE_SetMinFscaleValue(
++ IN gckHARDWARE Hardware,
++ IN gctUINT MinFscaleValue
++ );
++#endif
++
++#if gcdPOWEROFF_TIMEOUT
++gceSTATUS
++gckHARDWARE_SetPowerOffTimeout(
++ IN gckHARDWARE Hardware,
++ IN gctUINT32 Timeout
++);
++
++gceSTATUS
++gckHARDWARE_QueryPowerOffTimeout(
++ IN gckHARDWARE Hardware,
++ OUT gctUINT32* Timeout
++);
++#endif
++
++/* Profile 2D Engine. */
++gceSTATUS
++gckHARDWARE_ProfileEngine2D(
++ IN gckHARDWARE Hardware,
++ OUT gcs2D_PROFILE_PTR Profile
++ );
++
++gceSTATUS
++gckHARDWARE_InitializeHardware(
++ IN gckHARDWARE Hardware
++ );
++
++gceSTATUS
++gckHARDWARE_Reset(
++ IN gckHARDWARE Hardware
++ );
++
++typedef gceSTATUS (*gctISRMANAGERFUNC)(gctPOINTER Context);
++
++gceSTATUS
++gckHARDWARE_SetIsrManager(
++ IN gckHARDWARE Hardware,
++ IN gctISRMANAGERFUNC StartIsr,
++ IN gctISRMANAGERFUNC StopIsr,
++ IN gctPOINTER Context
++ );
++
++/* Start a composition. */
++gceSTATUS
++gckHARDWARE_Compose(
++ IN gckHARDWARE Hardware,
++ IN gctUINT32 ProcessID,
++ IN gctPHYS_ADDR Physical,
++ IN gctPOINTER Logical,
++ IN gctSIZE_T Offset,
++ IN gctSIZE_T Size,
++ IN gctUINT8 EventID
++ );
++
++/* Check for Hardware features. */
++gceSTATUS
++gckHARDWARE_IsFeatureAvailable(
++ IN gckHARDWARE Hardware,
++ IN gceFEATURE Feature
++ );
++
++gceSTATUS
++gckHARDWARE_DumpMMUException(
++ IN gckHARDWARE Hardware
++ );
++
++gceSTATUS
++gckHARDWARE_DumpGPUState(
++ IN gckHARDWARE Hardware
++ );
++
++gceSTATUS
++gckHARDWARE_InitDVFS(
++ IN gckHARDWARE Hardware
++ );
++
++gceSTATUS
++gckHARDWARE_QueryLoad(
++ IN gckHARDWARE Hardware,
++ OUT gctUINT32 * Load
++ );
++
++gceSTATUS
++gckHARDWARE_SetDVFSPeroid(
++ IN gckHARDWARE Hardware,
++ IN gctUINT32 Frequency
++ );
++
++gceSTATUS
++gckHARDWARE_PrepareFunctions(
++ gckHARDWARE Hardware
++ );
++
++gceSTATUS
++gckHARDWARE_SetMMUStates(
++ IN gckHARDWARE Hardware,
++ IN gctPOINTER MtlbAddress,
++ IN gceMMU_MODE Mode,
++ IN gctPOINTER SafeAddress,
++ IN gctPOINTER Logical,
++ IN OUT gctUINT32 * Bytes
++ );
++
++#if !gcdENABLE_VG
++/******************************************************************************\
++***************************** gckINTERRUPT Object ******************************
++\******************************************************************************/
++
++typedef struct _gckINTERRUPT * gckINTERRUPT;
++
++typedef gceSTATUS (* gctINTERRUPT_HANDLER)(
++ IN gckKERNEL Kernel
++ );
++
++gceSTATUS
++gckINTERRUPT_Construct(
++ IN gckKERNEL Kernel,
++ OUT gckINTERRUPT * Interrupt
++ );
++
++gceSTATUS
++gckINTERRUPT_Destroy(
++ IN gckINTERRUPT Interrupt
++ );
++
++gceSTATUS
++gckINTERRUPT_SetHandler(
++ IN gckINTERRUPT Interrupt,
++ IN OUT gctINT32_PTR Id,
++ IN gctINTERRUPT_HANDLER Handler
++ );
++
++gceSTATUS
++gckINTERRUPT_Notify(
++ IN gckINTERRUPT Interrupt,
++ IN gctBOOL Valid
++ );
++#endif
++/******************************************************************************\
++******************************** gckEVENT Object *******************************
++\******************************************************************************/
++
++typedef struct _gckEVENT * gckEVENT;
++
++/* Construct a new gckEVENT object. */
++gceSTATUS
++gckEVENT_Construct(
++ IN gckKERNEL Kernel,
++ OUT gckEVENT * Event
++ );
++
++/* Destroy an gckEVENT object. */
++gceSTATUS
++gckEVENT_Destroy(
++ IN gckEVENT Event
++ );
++
++/* Reserve the next available hardware event. */
++#if gcdMULTI_GPU
++gceSTATUS
++gckEVENT_GetEvent(
++ IN gckEVENT Event,
++ IN gctBOOL Wait,
++ OUT gctUINT8 * EventID,
++ IN gceKERNEL_WHERE Source,
++ IN gceCORE_3D_MASK ChipEnable
++ );
++#else
++gceSTATUS
++gckEVENT_GetEvent(
++ IN gckEVENT Event,
++ IN gctBOOL Wait,
++ OUT gctUINT8 * EventID,
++ IN gceKERNEL_WHERE Source
++ );
++#endif
++
++/* Add a new event to the list of events. */
++gceSTATUS
++gckEVENT_AddList(
++ IN gckEVENT Event,
++ IN gcsHAL_INTERFACE_PTR Interface,
++ IN gceKERNEL_WHERE FromWhere,
++ IN gctBOOL AllocateAllowed,
++ IN gctBOOL FromKernel
++ );
++
++/* Schedule a FreeNonPagedMemory event. */
++gceSTATUS
++gckEVENT_FreeNonPagedMemory(
++ IN gckEVENT Event,
++ IN gctSIZE_T Bytes,
++ IN gctPHYS_ADDR Physical,
++ IN gctPOINTER Logical,
++ IN gceKERNEL_WHERE FromWhere
++ );
++
++/* Schedule a FreeContiguousMemory event. */
++gceSTATUS
++gckEVENT_FreeContiguousMemory(
++ IN gckEVENT Event,
++ IN gctSIZE_T Bytes,
++ IN gctPHYS_ADDR Physical,
++ IN gctPOINTER Logical,
++ IN gceKERNEL_WHERE FromWhere
++ );
++
++/* Schedule a FreeVideoMemory event. */
++gceSTATUS
++gckEVENT_FreeVideoMemory(
++ IN gckEVENT Event,
++ IN gcuVIDMEM_NODE_PTR VideoMemory,
++ IN gceKERNEL_WHERE FromWhere
++ );
++
++/* Schedule a signal event. */
++gceSTATUS
++gckEVENT_Signal(
++ IN gckEVENT Event,
++ IN gctSIGNAL Signal,
++ IN gceKERNEL_WHERE FromWhere
++ );
++
++/* Schedule an Unlock event. */
++gceSTATUS
++gckEVENT_Unlock(
++ IN gckEVENT Event,
++ IN gceKERNEL_WHERE FromWhere,
++ IN gctPOINTER Node,
++ IN gceSURF_TYPE Type
++ );
++
++gceSTATUS
++gckEVENT_CommitDone(
++ IN gckEVENT Event,
++ IN gceKERNEL_WHERE FromWhere
++ );
++
++/* Schedule a FreeVirtualCommandBuffer event. */
++gceSTATUS
++gckEVENT_DestroyVirtualCommandBuffer(
++ IN gckEVENT Event,
++ IN gctSIZE_T Bytes,
++ IN gctPHYS_ADDR Physical,
++ IN gctPOINTER Logical,
++ IN gceKERNEL_WHERE FromWhere
++ );
++
++#if gcdMULTI_GPU
++gceSTATUS
++gckEVENT_Submit(
++ IN gckEVENT Event,
++ IN gctBOOL Wait,
++ IN gctBOOL FromPower,
++ IN gceCORE_3D_MASK ChipEnable
++ );
++#else
++gceSTATUS
++gckEVENT_Submit(
++ IN gckEVENT Event,
++ IN gctBOOL Wait,
++ IN gctBOOL FromPower
++ );
++#endif
++
++#if gcdMULTI_GPU
++gceSTATUS
++gckEVENT_Commit(
++ IN gckEVENT Event,
++ IN gcsQUEUE_PTR Queue,
++ IN gceCORE_3D_MASK ChipEnable
++ );
++#else
++gceSTATUS
++gckEVENT_Commit(
++ IN gckEVENT Event,
++ IN gcsQUEUE_PTR Queue
++ );
++#endif
++
++/* Schedule a composition event. */
++gceSTATUS
++gckEVENT_Compose(
++ IN gckEVENT Event,
++ IN gcsHAL_COMPOSE_PTR Info
++ );
++
++/* Event callback routine. */
++gceSTATUS
++gckEVENT_Notify(
++ IN gckEVENT Event,
++ IN gctUINT32 IDs
++ );
++
++/* Event callback routine. */
++gceSTATUS
++gckEVENT_Interrupt(
++ IN gckEVENT Event,
++#if gcdMULTI_GPU
++ IN gctUINT CoreId,
++#endif
++ IN gctUINT32 IDs
++ );
++
++gceSTATUS
++gckEVENT_Dump(
++ IN gckEVENT Event
++ );
++/******************************************************************************\
++******************************* gckCOMMAND Object ******************************
++\******************************************************************************/
++
++typedef struct _gckCOMMAND * gckCOMMAND;
++
++/* Construct a new gckCOMMAND object. */
++gceSTATUS
++gckCOMMAND_Construct(
++ IN gckKERNEL Kernel,
++ OUT gckCOMMAND * Command
++ );
++
++/* Destroy an gckCOMMAND object. */
++gceSTATUS
++gckCOMMAND_Destroy(
++ IN gckCOMMAND Command
++ );
++
++/* Acquire command queue synchronization objects. */
++gceSTATUS
++gckCOMMAND_EnterCommit(
++ IN gckCOMMAND Command,
++ IN gctBOOL FromPower
++ );
++
++/* Release command queue synchronization objects. */
++gceSTATUS
++gckCOMMAND_ExitCommit(
++ IN gckCOMMAND Command,
++ IN gctBOOL FromPower
++ );
++
++/* Start the command queue. */
++gceSTATUS
++gckCOMMAND_Start(
++ IN gckCOMMAND Command
++ );
++
++/* Stop the command queue. */
++gceSTATUS
++gckCOMMAND_Stop(
++ IN gckCOMMAND Command,
++ IN gctBOOL FromRecovery
++ );
++
++#if gcdMULTI_GPU
++/* Commit a buffer to the command queue. */
++gceSTATUS
++gckCOMMAND_Commit(
++ IN gckCOMMAND Command,
++ IN gckCONTEXT Context,
++ IN gcoCMDBUF CommandBuffer,
++ IN gcsSTATE_DELTA_PTR StateDelta,
++ IN gcsQUEUE_PTR EventQueue,
++ IN gctUINT32 ProcessID,
++ IN gceCORE_3D_MASK ChipEnable
++ );
++#else
++gceSTATUS
++gckCOMMAND_Commit(
++ IN gckCOMMAND Command,
++ IN gckCONTEXT Context,
++ IN gcoCMDBUF CommandBuffer,
++ IN gcsSTATE_DELTA_PTR StateDelta,
++ IN gcsQUEUE_PTR EventQueue,
++ IN gctUINT32 ProcessID
++ );
++#endif
++
++/* Reserve space in the command buffer. */
++gceSTATUS
++gckCOMMAND_Reserve(
++ IN gckCOMMAND Command,
++ IN gctUINT32 RequestedBytes,
++ OUT gctPOINTER * Buffer,
++ OUT gctUINT32 * BufferSize
++ );
++
++/* Execute reserved space in the command buffer. */
++gceSTATUS
++gckCOMMAND_Execute(
++ IN gckCOMMAND Command,
++ IN gctUINT32 RequstedBytes
++ );
++
++/* Stall the command queue. */
++#if gcdMULTI_GPU
++gceSTATUS
++gckCOMMAND_Stall(
++ IN gckCOMMAND Command,
++ IN gctBOOL FromPower,
++ IN gceCORE_3D_MASK ChipEnable
++ );
++#else
++gceSTATUS
++gckCOMMAND_Stall(
++ IN gckCOMMAND Command,
++ IN gctBOOL FromPower
++ );
++#endif
++
++/* Attach user process. */
++gceSTATUS
++gckCOMMAND_Attach(
++ IN gckCOMMAND Command,
++ OUT gckCONTEXT * Context,
++ OUT gctSIZE_T * StateCount,
++ IN gctUINT32 ProcessID
++ );
++
++/* Detach user process. */
++gceSTATUS
++gckCOMMAND_Detach(
++ IN gckCOMMAND Command,
++ IN gckCONTEXT Context
++ );
++
++/* Dump command buffer being executed by GPU. */
++gceSTATUS
++gckCOMMAND_DumpExecutingBuffer(
++ IN gckCOMMAND Command
++ );
++
++/* Whether a kernel command buffer address. */
++gceSTATUS
++gckCOMMAND_AddressInKernelCommandBuffer(
++ IN gckCOMMAND Command,
++ IN gctUINT32 Address,
++ OUT gctBOOL *In
++ );
++
++/******************************************************************************\
++********************************* gckMMU Object ********************************
++\******************************************************************************/
++
++typedef struct _gckMMU * gckMMU;
++
++/* Construct a new gckMMU object. */
++gceSTATUS
++gckMMU_Construct(
++ IN gckKERNEL Kernel,
++ IN gctSIZE_T MmuSize,
++ OUT gckMMU * Mmu
++ );
++
++/* Destroy an gckMMU object. */
++gceSTATUS
++gckMMU_Destroy(
++ IN gckMMU Mmu
++ );
++
++/* Allocate pages inside the MMU. */
++gceSTATUS
++gckMMU_AllocatePages(
++ IN gckMMU Mmu,
++ IN gctSIZE_T PageCount,
++ OUT gctPOINTER * PageTable,
++ OUT gctUINT32 * Address
++ );
++
++gceSTATUS
++gckMMU_AllocatePagesEx(
++ IN gckMMU Mmu,
++ IN gctSIZE_T PageCount,
++ IN gceSURF_TYPE Type,
++ OUT gctPOINTER * PageTable,
++ OUT gctUINT32 * Address
++ );
++
++/* Remove a page table from the MMU. */
++gceSTATUS
++gckMMU_FreePages(
++ IN gckMMU Mmu,
++ IN gctPOINTER PageTable,
++ IN gctSIZE_T PageCount
++ );
++
++/* Set the MMU page with info. */
++gceSTATUS
++gckMMU_SetPage(
++ IN gckMMU Mmu,
++ IN gctUINT32 PageAddress,
++ IN gctUINT32 *PageEntry
++ );
++
++gceSTATUS
++gckMMU_Flush(
++ IN gckMMU Mmu,
++ IN gceSURF_TYPE Type
++ );
++
++gceSTATUS
++gckMMU_DumpPageTableEntry(
++ IN gckMMU Mmu,
++ IN gctUINT32 Address
++ );
++
++
++#if VIVANTE_PROFILER
++gceSTATUS
++gckHARDWARE_QueryProfileRegisters(
++ IN gckHARDWARE Hardware,
++ IN gctBOOL Reset,
++ OUT gcsPROFILER_COUNTERS * Counters
++ );
++#endif
++
++#if VIVANTE_PROFILER_CONTEXT
++gceSTATUS
++gckHARDWARE_QueryContextProfile(
++ IN gckHARDWARE Hardware,
++ IN gctBOOL Reset,
++ IN gckCONTEXT Context,
++ OUT gcsPROFILER_COUNTERS * Counters
++ );
++
++gceSTATUS
++gckHARDWARE_UpdateContextProfile(
++ IN gckHARDWARE Hardware,
++ IN gckCONTEXT Context
++ );
++#endif
++
++#if VIVANTE_PROFILER_NEW
++gceSTATUS
++gckHARDWARE_InitProfiler(
++ IN gckHARDWARE Hardware
++ );
++#endif
++
++gceSTATUS
++gckOS_SignalQueryHardware(
++ IN gckOS Os,
++ IN gctSIGNAL Signal,
++ OUT gckHARDWARE * Hardware
++ );
++
++gceSTATUS
++gckOS_SignalSetHardware(
++ IN gckOS Os,
++ IN gctSIGNAL Signal,
++ gckHARDWARE Hardware
++ );
++
++gceSTATUS
++gckOS_DetectProcessByName(
++ IN gctCONST_POINTER Name
++ );
++
++void
++gckOS_DumpParam(
++ void
++ );
++
++#ifdef __cplusplus
++}
++#endif
++
++#if gcdENABLE_VG
++#include "gc_hal_vg.h"
++#endif
++
++#endif /* __gc_hal_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_kernel_buffer.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_kernel_buffer.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_kernel_buffer.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_kernel_buffer.h 2015-10-12 10:56:18.095351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_kernel_buffer.h 2015-10-15 15:51:25.444642667 +0200
@@ -0,0 +1,225 @@
+/****************************************************************************
+*
@@ -240223,7 +239886,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_kernel
+#endif /* __gc_hal_kernel_buffer_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_mem.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_mem.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_mem.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_mem.h 2015-10-12 10:56:18.095351158 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_mem.h 2015-10-15 15:51:25.444642667 +0200
@@ -0,0 +1,530 @@
+/****************************************************************************
+*
@@ -240757,7 +240420,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_mem.h
+#endif /* __gc_hal_mem_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_options.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_options.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_options.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_options.h 2015-10-12 10:56:18.096351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_options.h 2015-10-15 15:51:25.444642667 +0200
@@ -0,0 +1,1271 @@
+/****************************************************************************
+*
@@ -242032,7 +241695,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_option
+#endif /* __gc_hal_options_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_profiler.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_profiler.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_profiler.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_profiler.h 2015-10-12 10:56:18.096351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_profiler.h 2015-10-15 15:51:25.444642667 +0200
@@ -0,0 +1,585 @@
+/****************************************************************************
+*
@@ -242621,7 +242284,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_profil
+#endif /* __gc_hal_profiler_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_raster.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_raster.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_raster.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_raster.h 2015-10-12 10:56:18.097351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_raster.h 2015-10-15 15:51:25.448642404 +0200
@@ -0,0 +1,1038 @@
+/****************************************************************************
+*
@@ -243663,7 +243326,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_raster
+#endif /* __gc_hal_raster_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_rename.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_rename.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_rename.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_rename.h 2015-10-12 10:56:18.097351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_rename.h 2015-10-15 15:51:25.448642404 +0200
@@ -0,0 +1,243 @@
+/****************************************************************************
+*
@@ -243910,7 +243573,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_rename
+#endif /* __gc_hal_rename_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_security_interface.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_security_interface.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_security_interface.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_security_interface.h 2015-10-12 10:56:18.097351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_security_interface.h 2015-10-15 15:51:25.448642404 +0200
@@ -0,0 +1,137 @@
+/****************************************************************************
+*
@@ -244051,7 +243714,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_securi
+#endif
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_statistics.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_statistics.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_statistics.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_statistics.h 2015-10-12 10:56:18.097351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_statistics.h 2015-10-15 15:51:25.448642404 +0200
@@ -0,0 +1,99 @@
+/****************************************************************************
+*
@@ -244154,7 +243817,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_statis
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_types.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_types.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_types.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_types.h 2015-10-12 10:56:18.097351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_types.h 2015-10-15 15:51:25.448642404 +0200
@@ -0,0 +1,932 @@
+/****************************************************************************
+*
@@ -245090,7 +244753,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_types.
+#endif /* __gc_hal_types_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_version.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_version.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_version.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_version.h 2015-10-12 10:56:18.097351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_version.h 2015-10-15 15:51:25.448642404 +0200
@@ -0,0 +1,39 @@
+/****************************************************************************
+*
@@ -245133,7 +244796,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_versio
+#endif /* __gc_hal_version_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_vg.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_vg.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_vg.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_vg.h 2015-10-12 10:56:18.098351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_vg.h 2015-10-15 15:51:25.448642404 +0200
@@ -0,0 +1,896 @@
+/****************************************************************************
+*
@@ -246033,7 +245696,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/kernel/inc/gc_hal_vg.h l
+#endif /* __gc_hal_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_array.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_array.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_array.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_array.h 2015-10-12 10:56:18.098351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_array.h 2015-10-15 15:51:25.448642404 +0200
@@ -0,0 +1,34 @@
+/****************************************************************************
+*
@@ -246071,7 +245734,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocato
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_array.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_array.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_array.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_array.h 2015-10-12 10:56:18.098351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_array.h 2015-10-15 15:51:25.448642404 +0200
@@ -0,0 +1,45 @@
+/****************************************************************************
+*
@@ -246120,7 +245783,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocato
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_cma.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_cma.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_cma.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_cma.c 2015-10-12 10:56:18.098351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocator/freescale/gc_hal_kernel_allocator_cma.c 2015-10-15 15:51:25.448642404 +0200
@@ -0,0 +1,412 @@
+/****************************************************************************
+*
@@ -246536,7 +246199,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/allocato
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_allocator.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_allocator.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_allocator.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_allocator.c 2015-10-12 10:56:18.099351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_allocator.c 2015-10-15 15:51:25.452642141 +0200
@@ -0,0 +1,938 @@
+/****************************************************************************
+*
@@ -247478,7 +247141,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_allocator.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_allocator.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_allocator.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_allocator.h 2015-10-12 10:56:18.099351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_allocator.h 2015-10-15 15:51:25.452642141 +0200
@@ -0,0 +1,400 @@
+/****************************************************************************
+*
@@ -247880,126 +247543,9 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+
+*/
+#endif
-diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debug.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debug.h
---- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debug.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debug.h 2015-10-12 10:56:18.100351157 +0200
-@@ -0,0 +1,113 @@
-+/****************************************************************************
-+*
-+* Copyright (C) 2005 - 2014 by Vivante Corp.
-+*
-+* This program is free software; you can redistribute it and/or modify
-+* it under the terms of the GNU General Public License as published by
-+* the Free Software Foundation; either version 2 of the license, or
-+* (at your option) any later version.
-+*
-+* This program is distributed in the hope that it will be useful,
-+* but WITHOUT ANY WARRANTY; without even the implied warranty of
-+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+* GNU General Public License for more details.
-+*
-+* You should have received a copy of the GNU General Public License
-+* along with this program; if not write to the Free Software
-+* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-+*
-+*****************************************************************************/
-+
-+
-+#ifndef __gc_hal_kernel_debug_h_
-+#define __gc_hal_kernel_debug_h_
-+
-+#include <gc_hal_kernel_linux.h>
-+#include <linux/spinlock.h>
-+#include <linux/time.h>
-+#include <stdarg.h>
-+
-+#ifdef __cplusplus
-+extern "C" {
-+#endif
-+
-+/******************************************************************************\
-+****************************** OS-dependent Macros *****************************
-+\******************************************************************************/
-+
-+typedef va_list gctARGUMENTS;
-+
-+#define gcmkARGUMENTS_START(Arguments, Pointer) \
-+ va_start(Arguments, Pointer)
-+
-+#define gcmkARGUMENTS_END(Arguments) \
-+ va_end(Arguments)
-+
-+#define gcmkARGUMENTS_ARG(Arguments, Type) \
-+ va_arg(Arguments, Type)
-+
-+#define gcmkDECLARE_LOCK(__spinLock__) \
-+ static DEFINE_SPINLOCK(__spinLock__); \
-+ unsigned long __spinLock__##flags = 0;
-+
-+#define gcmkLOCKSECTION(__spinLock__) \
-+ spin_lock_irqsave(&__spinLock__, __spinLock__##flags)
-+
-+#define gcmkUNLOCKSECTION(__spinLock__) \
-+ spin_unlock_irqrestore(&__spinLock__, __spinLock__##flags)
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
-+# define gcmkGETPROCESSID() \
-+ task_tgid_vnr(current)
-+#else
-+# define gcmkGETPROCESSID() \
-+ current->tgid
-+#endif
-+
-+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
-+# define gcmkGETTHREADID() \
-+ task_pid_vnr(current)
-+#else
-+# define gcmkGETTHREADID() \
-+ current->pid
-+#endif
-+
-+#define gcmkOUTPUT_STRING(String) \
-+ if(gckDEBUGFS_IsEnabled()) {\
-+ while(-ERESTARTSYS == gckDEBUGFS_Print(String));\
-+ }else{\
-+ printk(String); \
-+ }\
-+ touch_softlockup_watchdog()
-+
-+
-+#define gcmkSPRINTF(Destination, Size, Message, Value) \
-+ snprintf(Destination, Size, Message, Value)
-+
-+#define gcmkSPRINTF2(Destination, Size, Message, Value1, Value2) \
-+ snprintf(Destination, Size, Message, Value1, Value2)
-+
-+#define gcmkSPRINTF3(Destination, Size, Message, Value1, Value2, Value3) \
-+ snprintf(Destination, Size, Message, Value1, Value2, Value3)
-+
-+#define gcmkVSPRINTF(Destination, Size, Message, Arguments) \
-+ vsnprintf(Destination, Size, Message, *((va_list*)Arguments))
-+
-+#define gcmkSTRCAT(Destination, Size, String) \
-+ strncat(Destination, String, Size)
-+
-+#define gcmkMEMCPY(Destination, Source, Size) \
-+ memcpy(Destination, Source, Size)
-+
-+#define gcmkSTRLEN(String) \
-+ strlen(String)
-+
-+/* If not zero, forces data alignment in the variable argument list
-+ by its individual size. */
-+#define gcdALIGNBYSIZE 1
-+
-+#ifdef __cplusplus
-+}
-+#endif
-+
-+#endif /* __gc_hal_kernel_debug_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debugfs.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debugfs.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debugfs.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debugfs.c 2015-10-12 10:56:18.099351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debugfs.c 2015-10-15 15:51:25.452642141 +0200
@@ -0,0 +1,1166 @@
+/****************************************************************************
+*
@@ -249169,7 +248715,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debugfs.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debugfs.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debugfs.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debugfs.h 2015-10-12 10:56:18.099351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debugfs.h 2015-10-15 15:51:25.452642141 +0200
@@ -0,0 +1,135 @@
+/****************************************************************************
+*
@@ -249306,9 +248852,126 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+#endif
+
+
+diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debug.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debug.h
+--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debug.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_debug.h 2015-10-15 15:51:25.452642141 +0200
+@@ -0,0 +1,113 @@
++/****************************************************************************
++*
++* Copyright (C) 2005 - 2014 by Vivante Corp.
++*
++* This program is free software; you can redistribute it and/or modify
++* it under the terms of the GNU General Public License as published by
++* the Free Software Foundation; either version 2 of the license, or
++* (at your option) any later version.
++*
++* This program is distributed in the hope that it will be useful,
++* but WITHOUT ANY WARRANTY; without even the implied warranty of
++* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++* GNU General Public License for more details.
++*
++* You should have received a copy of the GNU General Public License
++* along with this program; if not write to the Free Software
++* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++*
++*****************************************************************************/
++
++
++#ifndef __gc_hal_kernel_debug_h_
++#define __gc_hal_kernel_debug_h_
++
++#include <gc_hal_kernel_linux.h>
++#include <linux/spinlock.h>
++#include <linux/time.h>
++#include <stdarg.h>
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++/******************************************************************************\
++****************************** OS-dependent Macros *****************************
++\******************************************************************************/
++
++typedef va_list gctARGUMENTS;
++
++#define gcmkARGUMENTS_START(Arguments, Pointer) \
++ va_start(Arguments, Pointer)
++
++#define gcmkARGUMENTS_END(Arguments) \
++ va_end(Arguments)
++
++#define gcmkARGUMENTS_ARG(Arguments, Type) \
++ va_arg(Arguments, Type)
++
++#define gcmkDECLARE_LOCK(__spinLock__) \
++ static DEFINE_SPINLOCK(__spinLock__); \
++ unsigned long __spinLock__##flags = 0;
++
++#define gcmkLOCKSECTION(__spinLock__) \
++ spin_lock_irqsave(&__spinLock__, __spinLock__##flags)
++
++#define gcmkUNLOCKSECTION(__spinLock__) \
++ spin_unlock_irqrestore(&__spinLock__, __spinLock__##flags)
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
++# define gcmkGETPROCESSID() \
++ task_tgid_vnr(current)
++#else
++# define gcmkGETPROCESSID() \
++ current->tgid
++#endif
++
++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)
++# define gcmkGETTHREADID() \
++ task_pid_vnr(current)
++#else
++# define gcmkGETTHREADID() \
++ current->pid
++#endif
++
++#define gcmkOUTPUT_STRING(String) \
++ if(gckDEBUGFS_IsEnabled()) {\
++ while(-ERESTARTSYS == gckDEBUGFS_Print(String));\
++ }else{\
++ printk(String); \
++ }\
++ touch_softlockup_watchdog()
++
++
++#define gcmkSPRINTF(Destination, Size, Message, Value) \
++ snprintf(Destination, Size, Message, Value)
++
++#define gcmkSPRINTF2(Destination, Size, Message, Value1, Value2) \
++ snprintf(Destination, Size, Message, Value1, Value2)
++
++#define gcmkSPRINTF3(Destination, Size, Message, Value1, Value2, Value3) \
++ snprintf(Destination, Size, Message, Value1, Value2, Value3)
++
++#define gcmkVSPRINTF(Destination, Size, Message, Arguments) \
++ vsnprintf(Destination, Size, Message, *((va_list*)Arguments))
++
++#define gcmkSTRCAT(Destination, Size, String) \
++ strncat(Destination, String, Size)
++
++#define gcmkMEMCPY(Destination, Source, Size) \
++ memcpy(Destination, Source, Size)
++
++#define gcmkSTRLEN(String) \
++ strlen(String)
++
++/* If not zero, forces data alignment in the variable argument list
++ by its individual size. */
++#define gcdALIGNBYSIZE 1
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* __gc_hal_kernel_debug_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_device.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_device.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_device.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_device.c 2015-10-12 10:56:18.100351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_device.c 2015-10-15 15:51:25.460641616 +0200
@@ -0,0 +1,2760 @@
+/****************************************************************************
+*
@@ -252072,7 +251735,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_device.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_device.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_device.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_device.h 2015-10-12 10:56:18.101351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_device.h 2015-10-15 15:51:25.460641616 +0200
@@ -0,0 +1,215 @@
+/****************************************************************************
+*
@@ -252291,7 +251954,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+#endif /* __gc_hal_kernel_device_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_iommu.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_iommu.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_iommu.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_iommu.c 2015-10-12 10:56:18.101351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_iommu.c 2015-10-15 15:51:25.460641616 +0200
@@ -0,0 +1,216 @@
+/****************************************************************************
+*
@@ -252511,7 +252174,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_linux.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_linux.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_linux.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_linux.c 2015-10-12 10:56:18.101351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_linux.c 2015-10-15 15:51:25.460641616 +0200
@@ -0,0 +1,497 @@
+/****************************************************************************
+*
@@ -253012,7 +252675,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_linux.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_linux.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_linux.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_linux.h 2015-10-12 10:56:18.101351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_linux.h 2015-10-15 15:51:25.460641616 +0200
@@ -0,0 +1,399 @@
+/****************************************************************************
+*
@@ -253415,7 +253078,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+#endif /* __gc_hal_kernel_linux_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_math.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_math.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_math.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_math.c 2015-10-12 10:56:18.101351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_math.c 2015-10-15 15:51:25.460641616 +0200
@@ -0,0 +1,32 @@
+/****************************************************************************
+*
@@ -253451,7 +253114,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_os.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_os.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_os.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_os.c 2015-10-12 10:56:18.104351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_os.c 2015-10-15 15:51:25.468641088 +0200
@@ -0,0 +1,8740 @@
+/****************************************************************************
+*
@@ -262195,7 +261858,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_os.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_os.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_os.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_os.h 2015-10-12 10:56:18.104351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_os.h 2015-10-15 15:51:25.468641088 +0200
@@ -0,0 +1,90 @@
+/****************************************************************************
+*
@@ -262289,7 +261952,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+#endif /* __gc_hal_kernel_os_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_platform.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_platform.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_platform.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_platform.h 2015-10-12 10:56:18.104351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_platform.h 2015-10-15 15:51:25.468641088 +0200
@@ -0,0 +1,279 @@
+/****************************************************************************
+*
@@ -262572,7 +262235,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+#endif
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_probe.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_probe.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_probe.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_probe.c 2015-10-12 10:56:18.104351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_probe.c 2015-10-15 15:51:25.468641088 +0200
@@ -0,0 +1,1347 @@
+/****************************************************************************
+*
@@ -263923,7 +263586,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+#endif
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_security_channel.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_security_channel.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_security_channel.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_security_channel.c 2015-10-12 10:56:18.104351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_security_channel.c 2015-10-15 15:51:25.468641088 +0200
@@ -0,0 +1,385 @@
+/****************************************************************************
+*
@@ -264312,7 +263975,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_sync.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_sync.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_sync.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_sync.c 2015-10-12 10:56:18.105351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_sync.c 2015-10-15 15:51:25.468641088 +0200
@@ -0,0 +1,177 @@
+/****************************************************************************
+*
@@ -264493,7 +264156,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+#endif
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_sync.h linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_sync.h
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_sync.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_sync.h 2015-10-12 10:56:18.105351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_kernel_sync.h 2015-10-15 15:51:25.468641088 +0200
@@ -0,0 +1,72 @@
+/****************************************************************************
+*
@@ -264569,7 +264232,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/gc_hal_k
+#endif /* __gc_hal_kernel_sync_h_ */
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6q14.c linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6q14.c
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6q14.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6q14.c 2015-10-12 10:56:18.105351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6q14.c 2015-10-15 15:51:25.468641088 +0200
@@ -0,0 +1,880 @@
+/****************************************************************************
+*
@@ -265453,7 +265116,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/platform
+
diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6q14.config linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6q14.config
--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6q14.config 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6q14.config 2015-10-12 10:56:18.105351157 +0200
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/platform/freescale/gc_hal_kernel_platform_imx6q14.config 2015-10-15 15:51:25.468641088 +0200
@@ -0,0 +1,15 @@
+EXTRA_CFLAGS += -DgcdDEFAULT_CONTIGUOUS_SIZE=134217728
+
@@ -265470,9 +265133,285 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/hal/os/linux/kernel/platform
+EXTRA_CFLAGS += -DLINUX_CMA_FSL=1
+ALLOCATOR_ARRAY_H_LOCATION := $(OS_KERNEL_DIR)/allocator/freescale
+CUSTOMER_ALLOCATOR_OBJS := $(ALLOCATOR_ARRAY_H_LOCATION)/gc_hal_kernel_allocator_cma.o
+diff -Nur linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/Kbuild linux-3.14.54/drivers/mxc/gpu-viv/v5/Kbuild
+--- linux-3.14.54.orig/drivers/mxc/gpu-viv/v5/Kbuild 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/mxc/gpu-viv/v5/Kbuild 2015-10-15 15:51:25.468641088 +0200
+@@ -0,0 +1,272 @@
++##############################################################################
++#
++# Copyright (C) 2005 - 2014 by Vivante Corp.
++#
++# This program is free software; you can redistribute it and/or modify
++# it under the terms of the GNU General Public License as published by
++# the Free Software Foundation; either version 2 of the license, or
++# (at your option) any later version.
++#
++# This program is distributed in the hope that it will be useful,
++# but WITHOUT ANY WARRANTY; without even the implied warranty of
++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++# GNU General Public License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with this program; if not write to the Free Software
++# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
++#
++##############################################################################
++
++
++#
++# Linux build file for kernel HAL driver.
++#
++
++AQROOT := $(srctree)/drivers/mxc/gpu-viv/v5
++
++include $(AQROOT)/config
++
++KERNEL_DIR ?= $(TOOL_DIR)/kernel
++
++OS_KERNEL_DIR := hal/os/linux/kernel
++ARCH_KERNEL_DIR := hal/kernel/arch
++ARCH_VG_KERNEL_DIR := hal/kernel/archvg
++HAL_KERNEL_DIR := hal/kernel
++
++# Check and include platform config.
++ifneq ($(PLATFORM),)
++
++# Get platform config path.
++PLATFORM_CONFIG ?= $(AQROOT)/$(OS_KERNEL_DIR)/platform/$(PLATFORM).config
++
++# Check whether it exists.
++PLATFORM_CONFIG := $(wildcard $(PLATFORM_CONFIG))
++
++# Include it if exists.
++ifneq ($(PLATFORM_CONFIG),)
++include $(PLATFORM_CONFIG)
++endif
++
++endif
++
++MODULE_NAME ?= galcore
++CUSTOMER_ALLOCATOR_OBJS ?=
++ALLOCATOR_ARRAY_H_LOCATION ?= $(OS_KERNEL_DIR)/allocator/default/
++
++EXTRA_CFLAGS += -Werror
++
++OBJS := $(OS_KERNEL_DIR)/gc_hal_kernel_device.o \
++ $(OS_KERNEL_DIR)/gc_hal_kernel_linux.o \
++ $(OS_KERNEL_DIR)/gc_hal_kernel_math.o \
++ $(OS_KERNEL_DIR)/gc_hal_kernel_os.o \
++ $(OS_KERNEL_DIR)/gc_hal_kernel_debugfs.o \
++ $(OS_KERNEL_DIR)/gc_hal_kernel_allocator.o \
++
++ifneq ($(CONFIG_IOMMU_SUPPORT),)
++OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_iommu.o
++endif
++
++ifneq ($(PLATFORM),)
++OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_probe.o
++OBJS += $(OS_KERNEL_DIR)/platform/$(PLATFORM).o
++else
++OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_driver.o
++endif
++
++OBJS += $(HAL_KERNEL_DIR)/gc_hal_kernel.o \
++ $(HAL_KERNEL_DIR)/gc_hal_kernel_command.o \
++ $(HAL_KERNEL_DIR)/gc_hal_kernel_db.o \
++ $(HAL_KERNEL_DIR)/gc_hal_kernel_debug.o \
++ $(HAL_KERNEL_DIR)/gc_hal_kernel_event.o \
++ $(HAL_KERNEL_DIR)/gc_hal_kernel_heap.o \
++ $(HAL_KERNEL_DIR)/gc_hal_kernel_mmu.o \
++ $(HAL_KERNEL_DIR)/gc_hal_kernel_video_memory.o \
++ $(HAL_KERNEL_DIR)/gc_hal_kernel_power.o
++
++OBJS += $(ARCH_KERNEL_DIR)/gc_hal_kernel_context.o \
++ $(ARCH_KERNEL_DIR)/gc_hal_kernel_hardware.o
++
++ifeq ($(VIVANTE_ENABLE_3D), 1)
++OBJS += $(ARCH_KERNEL_DIR)/gc_hal_kernel_recorder.o
++endif
++
++ifeq ($(VIVANTE_ENABLE_VG), 1)
++OBJS +=\
++ $(HAL_KERNEL_DIR)/gc_hal_kernel_vg.o\
++ $(HAL_KERNEL_DIR)/gc_hal_kernel_command_vg.o\
++ $(HAL_KERNEL_DIR)/gc_hal_kernel_interrupt_vg.o\
++ $(HAL_KERNEL_DIR)/gc_hal_kernel_mmu_vg.o\
++ $(ARCH_VG_KERNEL_DIR)/gc_hal_kernel_hardware_command_vg.o\
++ $(ARCH_VG_KERNEL_DIR)/gc_hal_kernel_hardware_vg.o
++endif
++
++ifneq ($(CONFIG_SYNC),)
++EXTRA_CFLAGS += -Idrivers/staging/android
++
++OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_sync.o
++endif
++
++ifeq ($(SECURITY), 1)
++OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_security_channel.o \
++ $(HAL_KERNEL_DIR)/gc_hal_kernel_security.o
++endif
++
++ifneq ($(CUSTOMER_ALLOCATOR_OBJS),)
++OBJS += $(CUSTOMER_ALLOCATOR_OBJS)
++endif
++
++ifeq ($(KERNELRELEASE), )
++
++.PHONY: all clean install
++
++# Define targets.
++all:
++ @make V=$(V) ARCH=$(ARCH_TYPE) -C $(KERNEL_DIR) SUBDIRS=`pwd` modules
++
++clean:
++ @rm -rf $(OBJS)
++ @rm -rf modules.order Module.symvers
++ @find $(AQROOT) -name ".gc_*.cmd" | xargs rm -f
++
++install: all
++ @mkdir -p $(SDK_DIR)/drivers
++
++else
++
++
++EXTRA_CFLAGS += -DLINUX -DDRIVER
++
++ifeq ($(FLAREON),1)
++EXTRA_CFLAGS += -DFLAREON
++endif
++
++ifeq ($(DEBUG), 1)
++EXTRA_CFLAGS += -DDBG=1 -DDEBUG -D_DEBUG
++else
++EXTRA_CFLAGS += -DDBG=0
++endif
++
++ifeq ($(NO_DMA_COHERENT), 1)
++EXTRA_CFLAGS += -DNO_DMA_COHERENT
++endif
++
++ifeq ($(CONFIG_DOVE_GPU), 1)
++EXTRA_CFLAGS += -DCONFIG_DOVE_GPU=1
++endif
++
++ifneq ($(USE_PLATFORM_DRIVER), 0)
++EXTRA_CFLAGS += -DUSE_PLATFORM_DRIVER=1
++else
++EXTRA_CFLAGS += -DUSE_PLATFORM_DRIVER=0
++endif
++
++EXTRA_CFLAGS += -DVIVANTE_PROFILER=1
++EXTRA_CFLAGS += -DVIVANTE_PROFILER_CONTEXT=1
++
++ifeq ($(ENABLE_GPU_CLOCK_BY_DRIVER), 1)
++EXTRA_CFLAGS += -DENABLE_GPU_CLOCK_BY_DRIVER=1
++else
++EXTRA_CFLAGS += -DENABLE_GPU_CLOCK_BY_DRIVER=0
++endif
++
++ifeq ($(USE_NEW_LINUX_SIGNAL), 1)
++EXTRA_CFLAGS += -DUSE_NEW_LINUX_SIGNAL=1
++else
++EXTRA_CFLAGS += -DUSE_NEW_LINUX_SIGNAL=0
++endif
++
++ifeq ($(FORCE_ALL_VIDEO_MEMORY_CACHED), 1)
++EXTRA_CFLAGS += -DgcdPAGED_MEMORY_CACHEABLE=1
++else
++EXTRA_CFLAGS += -DgcdPAGED_MEMORY_CACHEABLE=0
++endif
++
++ifeq ($(NONPAGED_MEMORY_CACHEABLE), 1)
++EXTRA_CFLAGS += -DgcdNONPAGED_MEMORY_CACHEABLE=1
++else
++EXTRA_CFLAGS += -DgcdNONPAGED_MEMORY_CACHEABLE=0
++endif
++
++ifeq ($(NONPAGED_MEMORY_BUFFERABLE), 1)
++EXTRA_CFLAGS += -DgcdNONPAGED_MEMORY_BUFFERABLE=1
++else
++EXTRA_CFLAGS += -DgcdNONPAGED_MEMORY_BUFFERABLE=0
++endif
++
++ifeq ($(CACHE_FUNCTION_UNIMPLEMENTED), 1)
++EXTRA_CFLAGS += -DgcdCACHE_FUNCTION_UNIMPLEMENTED=1
++else
++EXTRA_CFLAGS += -DgcdCACHE_FUNCTION_UNIMPLEMENTED=0
++endif
++
++ifeq ($(CONFIG_SMP), y)
++EXTRA_CFLAGS += -DgcdSMP=1
++else
++EXTRA_CFLAGS += -DgcdSMP=0
++endif
++
++ifeq ($(VIVANTE_ENABLE_3D),0)
++EXTRA_CFLAGS += -DgcdENABLE_3D=0
++else
++EXTRA_CFLAGS += -DgcdENABLE_3D=1
++endif
++
++ifeq ($(VIVANTE_ENABLE_2D),0)
++EXTRA_CFLAGS += -DgcdENABLE_2D=0
++else
++EXTRA_CFLAGS += -DgcdENABLE_2D=1
++endif
++
++ifeq ($(VIVANTE_ENABLE_VG),0)
++EXTRA_CFLAGS += -DgcdENABLE_VG=0
++else
++EXTRA_CFLAGS += -DgcdENABLE_VG=1
++endif
++
++ifeq ($(ENABLE_OUTER_CACHE_PATCH), 1)
++EXTRA_CFLAGS += -DgcdENABLE_OUTER_CACHE_PATCH=1
++else
++EXTRA_CFLAGS += -DgcdENABLE_OUTER_CACHE_PATCH=0
++endif
++
++ifeq ($(USE_BANK_ALIGNMENT), 1)
++ EXTRA_CFLAGS += -DgcdENABLE_BANK_ALIGNMENT=1
++ ifneq ($(BANK_BIT_START), 0)
++ ifneq ($(BANK_BIT_END), 0)
++ EXTRA_CFLAGS += -DgcdBANK_BIT_START=$(BANK_BIT_START)
++ EXTRA_CFLAGS += -DgcdBANK_BIT_END=$(BANK_BIT_END)
++ endif
++ endif
++
++ ifneq ($(BANK_CHANNEL_BIT), 0)
++ EXTRA_CFLAGS += -DgcdBANK_CHANNEL_BIT=$(BANK_CHANNEL_BIT)
++ endif
++endif
++
++ifeq ($(gcdFPGA_BUILD), 1)
++EXTRA_CFLAGS += -DgcdFPGA_BUILD=1
++else
++EXTRA_CFLAGS += -DgcdFPGA_BUILD=0
++endif
++
++ifeq ($(SECURITY), 1)
++EXTRA_CFLAGS += -DgcdSECURITY=1
++endif
++
++EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel/inc
++EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel
++EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel/arch
++EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel/inc
++EXTRA_CFLAGS += -I$(AQROOT)/hal/os/linux/kernel
++EXTRA_CFLAGS += -I$(AQROOT)/$(ALLOCATOR_ARRAY_H_LOCATION)
++
++ifeq ($(VIVANTE_ENABLE_VG), 1)
++EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel/archvg
++endif
++
++obj-$(CONFIG_MXC_GPU_VIV) += galcore.o
++
++galcore-objs := $(OBJS)
++
++endif
diff -Nur linux-3.14.54.orig/drivers/mxc/hdmi-cec/Kconfig linux-3.14.54/drivers/mxc/hdmi-cec/Kconfig
--- linux-3.14.54.orig/drivers/mxc/hdmi-cec/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/hdmi-cec/Kconfig 2015-10-12 10:56:18.105351157 +0200
++++ linux-3.14.54/drivers/mxc/hdmi-cec/Kconfig 2015-10-15 15:51:25.468641088 +0200
@@ -0,0 +1,11 @@
+
+menu "MXC HDMI CEC (Consumer Electronics Control) support"
@@ -265487,12 +265426,12 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/hdmi-cec/Kconfig linux-3.14.54/drivers/
+endmenu
diff -Nur linux-3.14.54.orig/drivers/mxc/hdmi-cec/Makefile linux-3.14.54/drivers/mxc/hdmi-cec/Makefile
--- linux-3.14.54.orig/drivers/mxc/hdmi-cec/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/hdmi-cec/Makefile 2015-10-12 10:56:18.105351157 +0200
++++ linux-3.14.54/drivers/mxc/hdmi-cec/Makefile 2015-10-15 15:51:25.472640825 +0200
@@ -0,0 +1 @@
+obj-$(CONFIG_MXC_HDMI_CEC) += mxc_hdmi-cec.o
diff -Nur linux-3.14.54.orig/drivers/mxc/hdmi-cec/mxc_hdmi-cec.c linux-3.14.54/drivers/mxc/hdmi-cec/mxc_hdmi-cec.c
--- linux-3.14.54.orig/drivers/mxc/hdmi-cec/mxc_hdmi-cec.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/hdmi-cec/mxc_hdmi-cec.c 2015-10-12 10:56:18.106351157 +0200
++++ linux-3.14.54/drivers/mxc/hdmi-cec/mxc_hdmi-cec.c 2015-10-15 15:51:25.472640825 +0200
@@ -0,0 +1,629 @@
+/*
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -266125,7 +266064,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/hdmi-cec/mxc_hdmi-cec.c linux-3.14.54/d
+
diff -Nur linux-3.14.54.orig/drivers/mxc/hdmi-cec/mxc_hdmi-cec.h linux-3.14.54/drivers/mxc/hdmi-cec/mxc_hdmi-cec.h
--- linux-3.14.54.orig/drivers/mxc/hdmi-cec/mxc_hdmi-cec.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/hdmi-cec/mxc_hdmi-cec.h 2015-10-12 10:56:18.106351157 +0200
++++ linux-3.14.54/drivers/mxc/hdmi-cec/mxc_hdmi-cec.h 2015-10-15 15:51:25.472640825 +0200
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2005-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -266165,23 +266104,9 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/hdmi-cec/mxc_hdmi-cec.h linux-3.14.54/d
+ _IOR(HDMICEC_IOC_MAGIC, 4, unsigned char[4])
+
+#endif /* !_HDMICEC_H_ */
-diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/Kconfig linux-3.14.54/drivers/mxc/ipu3/Kconfig
---- linux-3.14.54.orig/drivers/mxc/ipu3/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/ipu3/Kconfig 2015-10-12 10:56:18.111351156 +0200
-@@ -0,0 +1,2 @@
-+config MXC_IPU_V3
-+ bool
-diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/Makefile linux-3.14.54/drivers/mxc/ipu3/Makefile
---- linux-3.14.54.orig/drivers/mxc/ipu3/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/ipu3/Makefile 2015-10-12 10:56:18.111351156 +0200
-@@ -0,0 +1,4 @@
-+obj-$(CONFIG_MXC_IPU_V3) = mxc_ipu.o
-+
-+mxc_ipu-objs := ipu_common.o ipu_ic.o ipu_disp.o ipu_capture.o ipu_device.o \
-+ ipu_calc_stripes_sizes.o vdoa.o ipu_pixel_clk.o
diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_calc_stripes_sizes.c linux-3.14.54/drivers/mxc/ipu3/ipu_calc_stripes_sizes.c
--- linux-3.14.54.orig/drivers/mxc/ipu3/ipu_calc_stripes_sizes.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/ipu3/ipu_calc_stripes_sizes.c 2015-10-12 10:56:18.106351157 +0200
++++ linux-3.14.54/drivers/mxc/ipu3/ipu_calc_stripes_sizes.c 2015-10-15 15:51:25.472640825 +0200
@@ -0,0 +1,495 @@
+/*
+ * Copyright 2009-2014 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -266680,7 +266605,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_calc_stripes_sizes.c linux-3.1
+EXPORT_SYMBOL(ipu_calc_stripes_sizes);
diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_capture.c linux-3.14.54/drivers/mxc/ipu3/ipu_capture.c
--- linux-3.14.54.orig/drivers/mxc/ipu3/ipu_capture.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/ipu3/ipu_capture.c 2015-10-12 10:56:18.106351157 +0200
++++ linux-3.14.54/drivers/mxc/ipu3/ipu_capture.c 2015-10-15 15:51:25.472640825 +0200
@@ -0,0 +1,816 @@
+/*
+ * Copyright 2008-2014 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -267500,7 +267425,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_capture.c linux-3.14.54/driver
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_common.c linux-3.14.54/drivers/mxc/ipu3/ipu_common.c
--- linux-3.14.54.orig/drivers/mxc/ipu3/ipu_common.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/ipu3/ipu_common.c 2015-10-12 10:56:18.107351157 +0200
++++ linux-3.14.54/drivers/mxc/ipu3/ipu_common.c 2015-10-15 15:51:25.476640563 +0200
@@ -0,0 +1,3134 @@
+/*
+ * Copyright 2005-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -270638,7 +270563,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_common.c linux-3.14.54/drivers
+module_exit(ipu_gen_uninit);
diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_device.c linux-3.14.54/drivers/mxc/ipu3/ipu_device.c
--- linux-3.14.54.orig/drivers/mxc/ipu3/ipu_device.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/ipu3/ipu_device.c 2015-10-12 10:56:18.109351157 +0200
++++ linux-3.14.54/drivers/mxc/ipu3/ipu_device.c 2015-10-15 15:51:25.476640563 +0200
@@ -0,0 +1,3717 @@
+/*
+ * Copyright 2005-2014 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -274359,7 +274284,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_device.c linux-3.14.54/drivers
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_disp.c linux-3.14.54/drivers/mxc/ipu3/ipu_disp.c
--- linux-3.14.54.orig/drivers/mxc/ipu3/ipu_disp.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/ipu3/ipu_disp.c 2015-10-12 10:56:18.109351157 +0200
++++ linux-3.14.54/drivers/mxc/ipu3/ipu_disp.c 2015-10-15 15:51:25.476640563 +0200
@@ -0,0 +1,1962 @@
+/*
+ * Copyright 2005-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -276325,7 +276250,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_disp.c linux-3.14.54/drivers/m
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_ic.c linux-3.14.54/drivers/mxc/ipu3/ipu_ic.c
--- linux-3.14.54.orig/drivers/mxc/ipu3/ipu_ic.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/ipu3/ipu_ic.c 2015-10-12 10:56:18.110351156 +0200
++++ linux-3.14.54/drivers/mxc/ipu3/ipu_ic.c 2015-10-15 15:51:25.476640563 +0200
@@ -0,0 +1,924 @@
+/*
+ * Copyright 2005-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -277253,7 +277178,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_ic.c linux-3.14.54/drivers/mxc
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_param_mem.h linux-3.14.54/drivers/mxc/ipu3/ipu_param_mem.h
--- linux-3.14.54.orig/drivers/mxc/ipu3/ipu_param_mem.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/ipu3/ipu_param_mem.h 2015-10-12 10:56:18.110351156 +0200
++++ linux-3.14.54/drivers/mxc/ipu3/ipu_param_mem.h 2015-10-15 15:51:25.476640563 +0200
@@ -0,0 +1,921 @@
+/*
+ * Copyright 2005-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -278178,7 +278103,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_param_mem.h linux-3.14.54/driv
+#endif
diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_pixel_clk.c linux-3.14.54/drivers/mxc/ipu3/ipu_pixel_clk.c
--- linux-3.14.54.orig/drivers/mxc/ipu3/ipu_pixel_clk.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/ipu3/ipu_pixel_clk.c 2015-10-12 10:56:18.110351156 +0200
++++ linux-3.14.54/drivers/mxc/ipu3/ipu_pixel_clk.c 2015-10-15 15:51:25.480640300 +0200
@@ -0,0 +1,317 @@
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -278499,7 +278424,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_pixel_clk.c linux-3.14.54/driv
+}
diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_prv.h linux-3.14.54/drivers/mxc/ipu3/ipu_prv.h
--- linux-3.14.54.orig/drivers/mxc/ipu3/ipu_prv.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/ipu3/ipu_prv.h 2015-10-12 10:56:18.110351156 +0200
++++ linux-3.14.54/drivers/mxc/ipu3/ipu_prv.h 2015-10-15 15:51:25.480640300 +0200
@@ -0,0 +1,356 @@
+/*
+ * Copyright 2005-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -278859,7 +278784,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_prv.h linux-3.14.54/drivers/mx
+#endif /* __INCLUDE_IPU_PRV_H__ */
diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_regs.h linux-3.14.54/drivers/mxc/ipu3/ipu_regs.h
--- linux-3.14.54.orig/drivers/mxc/ipu3/ipu_regs.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/ipu3/ipu_regs.h 2015-10-12 10:56:18.111351156 +0200
++++ linux-3.14.54/drivers/mxc/ipu3/ipu_regs.h 2015-10-15 15:51:25.480640300 +0200
@@ -0,0 +1,743 @@
+/*
+ * Copyright (C) 2005-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -279604,9 +279529,23 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/ipu_regs.h linux-3.14.54/drivers/m
+#define WRG (0x01)
+
+#endif
+diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/Kconfig linux-3.14.54/drivers/mxc/ipu3/Kconfig
+--- linux-3.14.54.orig/drivers/mxc/ipu3/Kconfig 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/mxc/ipu3/Kconfig 2015-10-15 15:51:25.480640300 +0200
+@@ -0,0 +1,2 @@
++config MXC_IPU_V3
++ bool
+diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/Makefile linux-3.14.54/drivers/mxc/ipu3/Makefile
+--- linux-3.14.54.orig/drivers/mxc/ipu3/Makefile 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/mxc/ipu3/Makefile 2015-10-15 15:51:25.480640300 +0200
+@@ -0,0 +1,4 @@
++obj-$(CONFIG_MXC_IPU_V3) = mxc_ipu.o
++
++mxc_ipu-objs := ipu_common.o ipu_ic.o ipu_disp.o ipu_capture.o ipu_device.o \
++ ipu_calc_stripes_sizes.o vdoa.o ipu_pixel_clk.o
diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/vdoa.c linux-3.14.54/drivers/mxc/ipu3/vdoa.c
--- linux-3.14.54.orig/drivers/mxc/ipu3/vdoa.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/ipu3/vdoa.c 2015-10-12 10:56:18.111351156 +0200
++++ linux-3.14.54/drivers/mxc/ipu3/vdoa.c 2015-10-15 15:51:25.480640300 +0200
@@ -0,0 +1,543 @@
+/*
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -280153,7 +280092,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/vdoa.c linux-3.14.54/drivers/mxc/i
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/vdoa.h linux-3.14.54/drivers/mxc/ipu3/vdoa.h
--- linux-3.14.54.orig/drivers/mxc/ipu3/vdoa.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/ipu3/vdoa.h 2015-10-12 10:56:18.111351156 +0200
++++ linux-3.14.54/drivers/mxc/ipu3/vdoa.h 2015-10-15 15:51:25.480640300 +0200
@@ -0,0 +1,69 @@
+/*
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -280224,9 +280163,52 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/ipu3/vdoa.h linux-3.14.54/drivers/mxc/i
+void vdoa_get_handle(vdoa_handle_t *handle);
+void vdoa_put_handle(vdoa_handle_t *handle);
+#endif
+diff -Nur linux-3.14.54.orig/drivers/mxc/Kconfig linux-3.14.54/drivers/mxc/Kconfig
+--- linux-3.14.54.orig/drivers/mxc/Kconfig 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/mxc/Kconfig 2015-10-15 15:51:25.480640300 +0200
+@@ -0,0 +1,24 @@
++# drivers/mxc/Kconfig
++
++if ARCH_MXC
++
++menu "MXC support drivers"
++
++config MXC_IPU
++ bool "Image Processing Unit Driver"
++ select MXC_IPU_V3
++ help
++ If you plan to use the Image Processing unit, say
++ Y here. IPU is needed by Framebuffer and V4L2 drivers.
++
++source "drivers/mxc/gpu-viv/Kconfig"
++source "drivers/mxc/ipu3/Kconfig"
++source "drivers/mxc/asrc/Kconfig"
++source "drivers/mxc/vpu/Kconfig"
++source "drivers/mxc/hdmi-cec/Kconfig"
++source "drivers/mxc/mipi/Kconfig"
++source "drivers/mxc/mlb/Kconfig"
++
++endmenu
++
++endif
+diff -Nur linux-3.14.54.orig/drivers/mxc/Makefile linux-3.14.54/drivers/mxc/Makefile
+--- linux-3.14.54.orig/drivers/mxc/Makefile 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/mxc/Makefile 2015-10-15 15:51:25.480640300 +0200
+@@ -0,0 +1,11 @@
++ifeq ($(CONFIG_MXC_GPU_VIV_V5),y)
++obj-$(CONFIG_MXC_GPU_VIV) += gpu-viv/v5/
++else
++obj-$(CONFIG_MXC_GPU_VIV) += gpu-viv/v4/
++endif
++obj-$(CONFIG_MXC_IPU_V3) += ipu3/
++obj-$(CONFIG_MXC_ASRC) += asrc/
++obj-$(CONFIG_MXC_VPU) += vpu/
++obj-$(CONFIG_MXC_HDMI_CEC) += hdmi-cec/
++obj-$(CONFIG_MXC_MIPI_CSI2) += mipi/
++obj-$(CONFIG_MXC_MLB) += mlb/
diff -Nur linux-3.14.54.orig/drivers/mxc/mipi/Kconfig linux-3.14.54/drivers/mxc/mipi/Kconfig
--- linux-3.14.54.orig/drivers/mxc/mipi/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/mipi/Kconfig 2015-10-12 10:56:18.111351156 +0200
++++ linux-3.14.54/drivers/mxc/mipi/Kconfig 2015-10-15 15:51:25.480640300 +0200
@@ -0,0 +1,14 @@
+#
+# MIPI configuration
@@ -280244,7 +280226,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/mipi/Kconfig linux-3.14.54/drivers/mxc/
+endmenu
diff -Nur linux-3.14.54.orig/drivers/mxc/mipi/Makefile linux-3.14.54/drivers/mxc/mipi/Makefile
--- linux-3.14.54.orig/drivers/mxc/mipi/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/mipi/Makefile 2015-10-12 10:56:18.111351156 +0200
++++ linux-3.14.54/drivers/mxc/mipi/Makefile 2015-10-15 15:51:25.480640300 +0200
@@ -0,0 +1,4 @@
+#
+# Makefile for the mipi interface driver
@@ -280252,7 +280234,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/mipi/Makefile linux-3.14.54/drivers/mxc
+obj-$(CONFIG_MXC_MIPI_CSI2) += mxc_mipi_csi2.o
diff -Nur linux-3.14.54.orig/drivers/mxc/mipi/mxc_mipi_csi2.c linux-3.14.54/drivers/mxc/mipi/mxc_mipi_csi2.c
--- linux-3.14.54.orig/drivers/mxc/mipi/mxc_mipi_csi2.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/mipi/mxc_mipi_csi2.c 2015-10-12 10:56:18.112351156 +0200
++++ linux-3.14.54/drivers/mxc/mipi/mxc_mipi_csi2.c 2015-10-15 15:51:25.480640300 +0200
@@ -0,0 +1,540 @@
+/*
+ * Copyright (C) 2011-2014 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -280796,7 +280778,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/mipi/mxc_mipi_csi2.c linux-3.14.54/driv
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/mxc/mipi/mxc_mipi_csi2.h linux-3.14.54/drivers/mxc/mipi/mxc_mipi_csi2.h
--- linux-3.14.54.orig/drivers/mxc/mipi/mxc_mipi_csi2.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/mipi/mxc_mipi_csi2.h 2015-10-12 10:56:18.112351156 +0200
++++ linux-3.14.54/drivers/mxc/mipi/mxc_mipi_csi2.h 2015-10-15 15:51:25.480640300 +0200
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2011-2014 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -280846,7 +280828,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/mipi/mxc_mipi_csi2.h linux-3.14.54/driv
+#endif
diff -Nur linux-3.14.54.orig/drivers/mxc/mlb/Kconfig linux-3.14.54/drivers/mxc/mlb/Kconfig
--- linux-3.14.54.orig/drivers/mxc/mlb/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/mlb/Kconfig 2015-10-12 10:56:18.112351156 +0200
++++ linux-3.14.54/drivers/mxc/mlb/Kconfig 2015-10-15 15:51:25.480640300 +0200
@@ -0,0 +1,17 @@
+#
+# MLB150 configuration
@@ -280867,7 +280849,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/mlb/Kconfig linux-3.14.54/drivers/mxc/m
+endmenu
diff -Nur linux-3.14.54.orig/drivers/mxc/mlb/Makefile linux-3.14.54/drivers/mxc/mlb/Makefile
--- linux-3.14.54.orig/drivers/mxc/mlb/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/mlb/Makefile 2015-10-12 10:56:18.112351156 +0200
++++ linux-3.14.54/drivers/mxc/mlb/Makefile 2015-10-15 15:51:25.480640300 +0200
@@ -0,0 +1,5 @@
+#
+# Makefile for the i.MX6Q/DL MLB150 driver
@@ -280876,7 +280858,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/mlb/Makefile linux-3.14.54/drivers/mxc/
+obj-$(CONFIG_MXC_MLB150) += mxc_mlb150.o
diff -Nur linux-3.14.54.orig/drivers/mxc/mlb/mxc_mlb150.c linux-3.14.54/drivers/mxc/mlb/mxc_mlb150.c
--- linux-3.14.54.orig/drivers/mxc/mlb/mxc_mlb150.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/mlb/mxc_mlb150.c 2015-10-12 10:56:18.113351156 +0200
++++ linux-3.14.54/drivers/mxc/mlb/mxc_mlb150.c 2015-10-15 15:51:25.480640300 +0200
@@ -0,0 +1,2778 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -283658,7 +283640,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/mlb/mxc_mlb150.c linux-3.14.54/drivers/
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/mxc/vpu/Kconfig linux-3.14.54/drivers/mxc/vpu/Kconfig
--- linux-3.14.54.orig/drivers/mxc/vpu/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/vpu/Kconfig 2015-10-12 10:56:18.113351156 +0200
++++ linux-3.14.54/drivers/mxc/vpu/Kconfig 2015-10-15 15:51:25.480640300 +0200
@@ -0,0 +1,31 @@
+#
+# Codec configuration
@@ -283693,7 +283675,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/vpu/Kconfig linux-3.14.54/drivers/mxc/v
+endmenu
diff -Nur linux-3.14.54.orig/drivers/mxc/vpu/Makefile linux-3.14.54/drivers/mxc/vpu/Makefile
--- linux-3.14.54.orig/drivers/mxc/vpu/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/vpu/Makefile 2015-10-12 10:56:18.113351156 +0200
++++ linux-3.14.54/drivers/mxc/vpu/Makefile 2015-10-15 15:51:25.480640300 +0200
@@ -0,0 +1,9 @@
+#
+# Makefile for the VPU drivers.
@@ -283706,7 +283688,7 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/vpu/Makefile linux-3.14.54/drivers/mxc/
+endif
diff -Nur linux-3.14.54.orig/drivers/mxc/vpu/mxc_vpu.c linux-3.14.54/drivers/mxc/vpu/mxc_vpu.c
--- linux-3.14.54.orig/drivers/mxc/vpu/mxc_vpu.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/mxc/vpu/mxc_vpu.c 2015-10-12 10:56:18.113351156 +0200
++++ linux-3.14.54/drivers/mxc/vpu/mxc_vpu.c 2015-10-15 15:51:25.484640035 +0200
@@ -0,0 +1,1342 @@
+/*
+ * Copyright 2006-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -285050,9 +285032,22 @@ diff -Nur linux-3.14.54.orig/drivers/mxc/vpu/mxc_vpu.c linux-3.14.54/drivers/mxc
+
+module_init(vpu_init);
+module_exit(vpu_exit);
+diff -Nur linux-3.14.54.orig/drivers/net/bonding/bonding.h linux-3.14.54/drivers/net/bonding/bonding.h
+--- linux-3.14.54.orig/drivers/net/bonding/bonding.h 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/net/bonding/bonding.h 2015-10-15 15:51:25.484640035 +0200
+@@ -188,7 +188,8 @@
+ struct net_device *dev; /* first - useful for panic debug */
+ struct bonding *bond; /* our master */
+ int delay;
+- unsigned long jiffies;
++ /* all three in jiffies */
++ unsigned long last_link_up;
+ unsigned long last_arp_rx;
+ unsigned long target_last_arp_rx[BOND_MAX_ARP_TARGETS];
+ s8 link; /* one of BOND_LINK_XXXX */
diff -Nur linux-3.14.54.orig/drivers/net/bonding/bond_main.c linux-3.14.54/drivers/net/bonding/bond_main.c
--- linux-3.14.54.orig/drivers/net/bonding/bond_main.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/bonding/bond_main.c 2015-10-12 10:56:18.114351156 +0200
++++ linux-3.14.54/drivers/net/bonding/bond_main.c 2015-10-15 15:51:25.484640035 +0200
@@ -818,7 +818,7 @@
return;
@@ -289758,22 +289753,9 @@ diff -Nur linux-3.14.54.orig/drivers/net/bonding/bond_main.c.orig linux-3.14.54/
+MODULE_VERSION(DRV_VERSION);
+MODULE_DESCRIPTION(DRV_DESCRIPTION ", v" DRV_VERSION);
+MODULE_AUTHOR("Thomas Davis, tadavis@lbl.gov and many others");
-diff -Nur linux-3.14.54.orig/drivers/net/bonding/bonding.h linux-3.14.54/drivers/net/bonding/bonding.h
---- linux-3.14.54.orig/drivers/net/bonding/bonding.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/bonding/bonding.h 2015-10-12 10:56:18.113351156 +0200
-@@ -188,7 +188,8 @@
- struct net_device *dev; /* first - useful for panic debug */
- struct bonding *bond; /* our master */
- int delay;
-- unsigned long jiffies;
-+ /* all three in jiffies */
-+ unsigned long last_link_up;
- unsigned long last_arp_rx;
- unsigned long target_last_arp_rx[BOND_MAX_ARP_TARGETS];
- s8 link; /* one of BOND_LINK_XXXX */
diff -Nur linux-3.14.54.orig/drivers/net/can/flexcan.c linux-3.14.54/drivers/net/can/flexcan.c
--- linux-3.14.54.orig/drivers/net/can/flexcan.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/can/flexcan.c 2015-10-12 10:56:18.115351156 +0200
++++ linux-3.14.54/drivers/net/can/flexcan.c 2015-10-15 15:51:25.484640035 +0200
@@ -125,7 +125,8 @@
FLEXCAN_ESR_BOFF_INT | FLEXCAN_ESR_ERR_INT)
@@ -289815,7 +289797,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/can/flexcan.c linux-3.14.54/drivers/net
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/adi/bfin_mac.c linux-3.14.54/drivers/net/ethernet/adi/bfin_mac.c
--- linux-3.14.54.orig/drivers/net/ethernet/adi/bfin_mac.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/adi/bfin_mac.c 2015-10-12 10:56:18.115351156 +0200
++++ linux-3.14.54/drivers/net/ethernet/adi/bfin_mac.c 2015-10-15 15:51:25.484640035 +0200
@@ -1040,6 +1040,7 @@
.n_alarm = 0,
.n_ext_ts = 0,
@@ -289826,7 +289808,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/adi/bfin_mac.c linux-3.14.54/d
.adjtime = bfin_ptp_adjtime,
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/broadcom/tg3.c linux-3.14.54/drivers/net/ethernet/broadcom/tg3.c
--- linux-3.14.54.orig/drivers/net/ethernet/broadcom/tg3.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/broadcom/tg3.c 2015-10-12 10:56:18.117351156 +0200
++++ linux-3.14.54/drivers/net/ethernet/broadcom/tg3.c 2015-10-15 15:51:25.488639771 +0200
@@ -6322,6 +6322,7 @@
.n_alarm = 0,
.n_ext_ts = 0,
@@ -289837,7 +289819,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/broadcom/tg3.c linux-3.14.54/d
.adjtime = tg3_ptp_adjtime,
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/cadence/macb.c linux-3.14.54/drivers/net/ethernet/cadence/macb.c
--- linux-3.14.54.orig/drivers/net/ethernet/cadence/macb.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/cadence/macb.c 2015-10-12 10:56:18.118351156 +0200
++++ linux-3.14.54/drivers/net/ethernet/cadence/macb.c 2015-10-15 15:51:25.488639771 +0200
@@ -604,25 +604,16 @@
{
unsigned int entry;
@@ -289874,7 +289856,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/cadence/macb.c linux-3.14.54/d
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/chelsio/cxgb4vf/sge.c linux-3.14.54/drivers/net/ethernet/chelsio/cxgb4vf/sge.c
--- linux-3.14.54.orig/drivers/net/ethernet/chelsio/cxgb4vf/sge.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/chelsio/cxgb4vf/sge.c 2015-10-12 10:56:18.118351156 +0200
++++ linux-3.14.54/drivers/net/ethernet/chelsio/cxgb4vf/sge.c 2015-10-15 15:51:25.488639771 +0200
@@ -1510,7 +1510,8 @@
{
struct sk_buff *skb;
@@ -289896,32 +289878,9 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/chelsio/cxgb4vf/sge.c linux-3.
if (!pkt->ip_frag)
skb->ip_summed = CHECKSUM_UNNECESSARY;
else {
-diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/Kconfig linux-3.14.54/drivers/net/ethernet/freescale/Kconfig
---- linux-3.14.54.orig/drivers/net/ethernet/freescale/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/freescale/Kconfig 2015-10-12 10:56:18.125351155 +0200
-@@ -67,6 +67,7 @@
- tristate "Freescale XGMAC MDIO"
- depends on FSL_SOC
- select PHYLIB
-+ select OF_MDIO
- ---help---
- This driver supports the MDIO bus on the Fman 10G Ethernet MACs.
-
-diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/Makefile linux-3.14.54/drivers/net/ethernet/freescale/Makefile
---- linux-3.14.54.orig/drivers/net/ethernet/freescale/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/freescale/Makefile 2015-10-12 10:56:18.125351155 +0200
-@@ -14,7 +14,6 @@
- obj-$(CONFIG_GIANFAR) += gianfar_driver.o
- obj-$(CONFIG_PTP_1588_CLOCK_GIANFAR) += gianfar_ptp.o
- gianfar_driver-objs := gianfar.o \
-- gianfar_ethtool.o \
-- gianfar_sysfs.o
-+ gianfar_ethtool.o
- obj-$(CONFIG_UCC_GETH) += ucc_geth_driver.o
- ucc_geth_driver-objs := ucc_geth.o ucc_geth_ethtool.o
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/fec.h linux-3.14.54/drivers/net/ethernet/freescale/fec.h
--- linux-3.14.54.orig/drivers/net/ethernet/freescale/fec.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/freescale/fec.h 2015-10-12 10:56:18.119351156 +0200
++++ linux-3.14.54/drivers/net/ethernet/freescale/fec.h 2015-10-15 15:51:25.488639771 +0200
@@ -221,7 +221,7 @@
#define BD_ENET_TX_RCMASK ((ushort)0x003c)
#define BD_ENET_TX_UN ((ushort)0x0002)
@@ -289994,7 +289953,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/fec.h linux-3.14.54/
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/fec_main.c linux-3.14.54/drivers/net/ethernet/freescale/fec_main.c
--- linux-3.14.54.orig/drivers/net/ethernet/freescale/fec_main.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/freescale/fec_main.c 2015-10-12 10:56:18.120351156 +0200
++++ linux-3.14.54/drivers/net/ethernet/freescale/fec_main.c 2015-10-15 15:51:25.488639771 +0200
@@ -36,6 +36,7 @@
#include <linux/in.h>
#include <linux/ip.h>
@@ -291672,7 +291631,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/fec_main.c linux-3.1
.driver = {
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/fec_ptp.c linux-3.14.54/drivers/net/ethernet/freescale/fec_ptp.c
--- linux-3.14.54.orig/drivers/net/ethernet/freescale/fec_ptp.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/freescale/fec_ptp.c 2015-10-12 10:56:18.120351156 +0200
++++ linux-3.14.54/drivers/net/ethernet/freescale/fec_ptp.c 2015-10-15 15:51:25.488639771 +0200
@@ -372,6 +372,7 @@
fep->ptp_caps.n_alarm = 0;
fep->ptp_caps.n_ext_ts = 0;
@@ -291683,7 +291642,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/fec_ptp.c linux-3.14
fep->ptp_caps.adjtime = fec_ptp_adjtime;
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c linux-3.14.54/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
--- linux-3.14.54.orig/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c 2015-10-12 10:56:18.121351156 +0200
++++ linux-3.14.54/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c 2015-10-15 15:51:25.488639771 +0200
@@ -91,6 +91,9 @@
u16 pkt_len, sc;
int curidx;
@@ -291727,7 +291686,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/fs_enet/fs_enet-main
phy_connection_type = of_get_property(ofdev->dev.of_node,
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/fs_enet/mii-fec.c linux-3.14.54/drivers/net/ethernet/freescale/fs_enet/mii-fec.c
--- linux-3.14.54.orig/drivers/net/ethernet/freescale/fs_enet/mii-fec.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/freescale/fs_enet/mii-fec.c 2015-10-12 10:56:18.121351156 +0200
++++ linux-3.14.54/drivers/net/ethernet/freescale/fs_enet/mii-fec.c 2015-10-15 15:51:25.488639771 +0200
@@ -95,12 +95,6 @@
}
@@ -291751,7 +291710,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/fs_enet/mii-fec.c li
if (ret)
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/gianfar.c linux-3.14.54/drivers/net/ethernet/freescale/gianfar.c
--- linux-3.14.54.orig/drivers/net/ethernet/freescale/gianfar.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/freescale/gianfar.c 2015-10-12 10:56:18.122351156 +0200
++++ linux-3.14.54/drivers/net/ethernet/freescale/gianfar.c 2015-10-15 15:51:25.492639508 +0200
@@ -9,7 +9,7 @@
* Maintainer: Kumar Gala
* Modifier: Sandeep Gopalpet <sandeep.kumar@freescale.com>
@@ -293938,251 +293897,9 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/gianfar.c linux-3.14
static struct of_device_id gfar_match[] =
{
{
-diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/gianfar.h linux-3.14.54/drivers/net/ethernet/freescale/gianfar.h
---- linux-3.14.54.orig/drivers/net/ethernet/freescale/gianfar.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/freescale/gianfar.h 2015-10-12 10:56:18.124351155 +0200
-@@ -9,7 +9,7 @@
- * Maintainer: Kumar Gala
- * Modifier: Sandeep Gopalpet <sandeep.kumar@freescale.com>
- *
-- * Copyright 2002-2009, 2011 Freescale Semiconductor, Inc.
-+ * Copyright 2002-2009, 2011-2013 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
-@@ -377,8 +377,11 @@
- IMASK_RXFEN0 | IMASK_BSY | IMASK_EBERR | IMASK_BABR | \
- IMASK_XFUN | IMASK_RXC | IMASK_BABT | IMASK_DPE \
- | IMASK_PERR)
--#define IMASK_RTX_DISABLED ((~(IMASK_RXFEN0 | IMASK_TXFEN | IMASK_BSY)) \
-- & IMASK_DEFAULT)
-+#define IMASK_RX_DEFAULT (IMASK_RXFEN0 | IMASK_BSY)
-+#define IMASK_TX_DEFAULT (IMASK_TXFEN | IMASK_TXBEN)
-+
-+#define IMASK_RX_DISABLED ((~(IMASK_RX_DEFAULT)) & IMASK_DEFAULT)
-+#define IMASK_TX_DISABLED ((~(IMASK_TX_DEFAULT)) & IMASK_DEFAULT)
-
- /* Fifo management */
- #define FIFO_TX_THR_MASK 0x01ff
-@@ -409,7 +412,9 @@
-
- /* This default RIR value directly corresponds
- * to the 3-bit hash value generated */
--#define DEFAULT_RIR0 0x05397700
-+#define DEFAULT_8RXQ_RIR0 0x05397700
-+/* Map even hash values to Q0, and odd ones to Q1 */
-+#define DEFAULT_2RXQ_RIR0 0x04104100
-
- /* RQFCR register bits */
- #define RQFCR_GPI 0x80000000
-@@ -880,7 +885,6 @@
- #define FSL_GIANFAR_DEV_HAS_CSUM 0x00000010
- #define FSL_GIANFAR_DEV_HAS_VLAN 0x00000020
- #define FSL_GIANFAR_DEV_HAS_EXTENDED_HASH 0x00000040
--#define FSL_GIANFAR_DEV_HAS_PADDING 0x00000080
- #define FSL_GIANFAR_DEV_HAS_MAGIC_PACKET 0x00000100
- #define FSL_GIANFAR_DEV_HAS_BD_STASHING 0x00000200
- #define FSL_GIANFAR_DEV_HAS_BUF_STASHING 0x00000400
-@@ -892,8 +896,8 @@
- #define DEFAULT_MAPPING 0xFF
- #endif
-
--#define ISRG_SHIFT_TX 0x10
--#define ISRG_SHIFT_RX 0x18
-+#define ISRG_RR0 0x80000000
-+#define ISRG_TR0 0x00800000
-
- /* The same driver can operate in two modes */
- /* SQ_SG_MODE: Single Queue Single Group Mode
-@@ -905,6 +909,22 @@
- MQ_MG_MODE
- };
-
-+/* GFAR_SQ_POLLING: Single Queue NAPI polling mode
-+ * The driver supports a single pair of RX/Tx queues
-+ * per interrupt group (Rx/Tx int line). MQ_MG mode
-+ * devices have 2 interrupt groups, so the device will
-+ * have a total of 2 Tx and 2 Rx queues in this case.
-+ * GFAR_MQ_POLLING: Multi Queue NAPI polling mode
-+ * The driver supports all the 8 Rx and Tx HW queues
-+ * each queue mapped by the Device Tree to one of
-+ * the 2 interrupt groups. This mode implies significant
-+ * processing overhead (CPU and controller level).
-+ */
-+enum gfar_poll_mode {
-+ GFAR_SQ_POLLING = 0,
-+ GFAR_MQ_POLLING
-+};
-+
- /*
- * Per TX queue stats
- */
-@@ -966,7 +986,6 @@
-
- /**
- * struct gfar_priv_rx_q - per rx queue structure
-- * @rxlock: per queue rx spin lock
- * @rx_skbuff: skb pointers
- * @skb_currx: currently use skb pointer
- * @rx_bd_base: First rx buffer descriptor
-@@ -979,8 +998,7 @@
- */
-
- struct gfar_priv_rx_q {
-- spinlock_t rxlock __attribute__ ((aligned (SMP_CACHE_BYTES)));
-- struct sk_buff ** rx_skbuff;
-+ struct sk_buff **rx_skbuff __aligned(SMP_CACHE_BYTES);
- dma_addr_t rx_bd_dma_base;
- struct rxbd8 *rx_bd_base;
- struct rxbd8 *cur_rx;
-@@ -1016,17 +1034,20 @@
- */
-
- struct gfar_priv_grp {
-- spinlock_t grplock __attribute__ ((aligned (SMP_CACHE_BYTES)));
-- struct napi_struct napi;
-- struct gfar_private *priv;
-+ spinlock_t grplock __aligned(SMP_CACHE_BYTES);
-+ struct napi_struct napi_rx;
-+ struct napi_struct napi_tx;
- struct gfar __iomem *regs;
-- unsigned int rstat;
-- unsigned long num_rx_queues;
-- unsigned long rx_bit_map;
-- /* cacheline 3 */
-+ struct gfar_priv_tx_q *tx_queue;
-+ struct gfar_priv_rx_q *rx_queue;
- unsigned int tstat;
-+ unsigned int rstat;
-+
-+ struct gfar_private *priv;
- unsigned long num_tx_queues;
- unsigned long tx_bit_map;
-+ unsigned long num_rx_queues;
-+ unsigned long rx_bit_map;
-
- struct gfar_irqinfo *irqinfo[GFAR_NUM_IRQS];
- };
-@@ -1041,6 +1062,11 @@
- GFAR_ERRATA_12 = 0x08, /* a.k.a errata eTSEC49 */
- };
-
-+enum gfar_dev_state {
-+ GFAR_DOWN = 1,
-+ GFAR_RESETTING
-+};
-+
- /* Struct stolen almost completely (and shamelessly) from the FCC enet source
- * (Ok, that's not so true anymore, but there is a family resemblance)
- * The GFAR buffer descriptors track the ring buffers. The rx_bd_base
-@@ -1051,8 +1077,6 @@
- * the buffer descriptor determines the actual condition.
- */
- struct gfar_private {
-- unsigned int num_rx_queues;
--
- struct device *dev;
- struct net_device *ndev;
- enum gfar_errata errata;
-@@ -1060,6 +1084,7 @@
-
- u16 uses_rxfcb;
- u16 padding;
-+ u32 device_flags;
-
- /* HW time stamping enabled flag */
- int hwts_rx_en;
-@@ -1069,10 +1094,12 @@
- struct gfar_priv_rx_q *rx_queue[MAX_RX_QS];
- struct gfar_priv_grp gfargrp[MAXGROUPS];
-
-- u32 device_flags;
-+ unsigned long state;
-
-- unsigned int mode;
-+ unsigned short mode;
-+ unsigned short poll_mode;
- unsigned int num_tx_queues;
-+ unsigned int num_rx_queues;
- unsigned int num_grps;
-
- /* Network Statistics */
-@@ -1113,6 +1140,9 @@
- unsigned int total_tx_ring_size;
- unsigned int total_rx_ring_size;
-
-+ u32 rqueue;
-+ u32 tqueue;
-+
- /* RX per device parameters */
- unsigned int rx_stash_size;
- unsigned int rx_stash_index;
-@@ -1127,11 +1157,6 @@
- u32 __iomem *hash_regs[16];
- int hash_width;
-
-- /* global parameters */
-- unsigned int fifo_threshold;
-- unsigned int fifo_starve;
-- unsigned int fifo_starve_off;
--
- /*Filer table*/
- unsigned int ftp_rqfpr[MAX_FILER_IDX + 1];
- unsigned int ftp_rqfcr[MAX_FILER_IDX + 1];
-@@ -1176,21 +1201,42 @@
- *fpr = gfar_read(&regs->rqfpr);
- }
-
--void lock_rx_qs(struct gfar_private *priv);
--void lock_tx_qs(struct gfar_private *priv);
--void unlock_rx_qs(struct gfar_private *priv);
--void unlock_tx_qs(struct gfar_private *priv);
-+static inline void gfar_write_isrg(struct gfar_private *priv)
-+{
-+ struct gfar __iomem *regs = priv->gfargrp[0].regs;
-+ u32 __iomem *baddr = &regs->isrg0;
-+ u32 isrg = 0;
-+ int grp_idx, i;
-+
-+ for (grp_idx = 0; grp_idx < priv->num_grps; grp_idx++) {
-+ struct gfar_priv_grp *grp = &priv->gfargrp[grp_idx];
-+
-+ for_each_set_bit(i, &grp->rx_bit_map, priv->num_rx_queues) {
-+ isrg |= (ISRG_RR0 >> i);
-+ }
-+
-+ for_each_set_bit(i, &grp->tx_bit_map, priv->num_tx_queues) {
-+ isrg |= (ISRG_TR0 >> i);
-+ }
-+
-+ gfar_write(baddr, isrg);
-+
-+ baddr++;
-+ isrg = 0;
-+ }
-+}
-+
- irqreturn_t gfar_receive(int irq, void *dev_id);
- int startup_gfar(struct net_device *dev);
- void stop_gfar(struct net_device *dev);
--void gfar_halt(struct net_device *dev);
-+void reset_gfar(struct net_device *dev);
-+void gfar_mac_reset(struct gfar_private *priv);
-+void gfar_halt(struct gfar_private *priv);
-+void gfar_start(struct gfar_private *priv);
- void gfar_phy_test(struct mii_bus *bus, struct phy_device *phydev, int enable,
- u32 regnum, u32 read);
- void gfar_configure_coalescing_all(struct gfar_private *priv);
--void gfar_init_sysfs(struct net_device *dev);
- int gfar_set_features(struct net_device *dev, netdev_features_t features);
--void gfar_check_rx_parser_mode(struct gfar_private *priv);
--void gfar_vlan_mode(struct net_device *dev, netdev_features_t features);
-
- extern const struct ethtool_ops gfar_ethtool_ops;
-
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/gianfar_ethtool.c linux-3.14.54/drivers/net/ethernet/freescale/gianfar_ethtool.c
--- linux-3.14.54.orig/drivers/net/ethernet/freescale/gianfar_ethtool.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/freescale/gianfar_ethtool.c 2015-10-12 10:56:18.123351155 +0200
++++ linux-3.14.54/drivers/net/ethernet/freescale/gianfar_ethtool.c 2015-10-15 15:51:25.492639508 +0200
@@ -44,10 +44,6 @@
#include "gianfar.h"
@@ -294462,9 +294179,251 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/gianfar_ethtool.c li
mutex_lock(&priv->rx_queue_access);
switch (cmd->cmd) {
+diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/gianfar.h linux-3.14.54/drivers/net/ethernet/freescale/gianfar.h
+--- linux-3.14.54.orig/drivers/net/ethernet/freescale/gianfar.h 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/net/ethernet/freescale/gianfar.h 2015-10-15 15:51:25.492639508 +0200
+@@ -9,7 +9,7 @@
+ * Maintainer: Kumar Gala
+ * Modifier: Sandeep Gopalpet <sandeep.kumar@freescale.com>
+ *
+- * Copyright 2002-2009, 2011 Freescale Semiconductor, Inc.
++ * Copyright 2002-2009, 2011-2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+@@ -377,8 +377,11 @@
+ IMASK_RXFEN0 | IMASK_BSY | IMASK_EBERR | IMASK_BABR | \
+ IMASK_XFUN | IMASK_RXC | IMASK_BABT | IMASK_DPE \
+ | IMASK_PERR)
+-#define IMASK_RTX_DISABLED ((~(IMASK_RXFEN0 | IMASK_TXFEN | IMASK_BSY)) \
+- & IMASK_DEFAULT)
++#define IMASK_RX_DEFAULT (IMASK_RXFEN0 | IMASK_BSY)
++#define IMASK_TX_DEFAULT (IMASK_TXFEN | IMASK_TXBEN)
++
++#define IMASK_RX_DISABLED ((~(IMASK_RX_DEFAULT)) & IMASK_DEFAULT)
++#define IMASK_TX_DISABLED ((~(IMASK_TX_DEFAULT)) & IMASK_DEFAULT)
+
+ /* Fifo management */
+ #define FIFO_TX_THR_MASK 0x01ff
+@@ -409,7 +412,9 @@
+
+ /* This default RIR value directly corresponds
+ * to the 3-bit hash value generated */
+-#define DEFAULT_RIR0 0x05397700
++#define DEFAULT_8RXQ_RIR0 0x05397700
++/* Map even hash values to Q0, and odd ones to Q1 */
++#define DEFAULT_2RXQ_RIR0 0x04104100
+
+ /* RQFCR register bits */
+ #define RQFCR_GPI 0x80000000
+@@ -880,7 +885,6 @@
+ #define FSL_GIANFAR_DEV_HAS_CSUM 0x00000010
+ #define FSL_GIANFAR_DEV_HAS_VLAN 0x00000020
+ #define FSL_GIANFAR_DEV_HAS_EXTENDED_HASH 0x00000040
+-#define FSL_GIANFAR_DEV_HAS_PADDING 0x00000080
+ #define FSL_GIANFAR_DEV_HAS_MAGIC_PACKET 0x00000100
+ #define FSL_GIANFAR_DEV_HAS_BD_STASHING 0x00000200
+ #define FSL_GIANFAR_DEV_HAS_BUF_STASHING 0x00000400
+@@ -892,8 +896,8 @@
+ #define DEFAULT_MAPPING 0xFF
+ #endif
+
+-#define ISRG_SHIFT_TX 0x10
+-#define ISRG_SHIFT_RX 0x18
++#define ISRG_RR0 0x80000000
++#define ISRG_TR0 0x00800000
+
+ /* The same driver can operate in two modes */
+ /* SQ_SG_MODE: Single Queue Single Group Mode
+@@ -905,6 +909,22 @@
+ MQ_MG_MODE
+ };
+
++/* GFAR_SQ_POLLING: Single Queue NAPI polling mode
++ * The driver supports a single pair of RX/Tx queues
++ * per interrupt group (Rx/Tx int line). MQ_MG mode
++ * devices have 2 interrupt groups, so the device will
++ * have a total of 2 Tx and 2 Rx queues in this case.
++ * GFAR_MQ_POLLING: Multi Queue NAPI polling mode
++ * The driver supports all the 8 Rx and Tx HW queues
++ * each queue mapped by the Device Tree to one of
++ * the 2 interrupt groups. This mode implies significant
++ * processing overhead (CPU and controller level).
++ */
++enum gfar_poll_mode {
++ GFAR_SQ_POLLING = 0,
++ GFAR_MQ_POLLING
++};
++
+ /*
+ * Per TX queue stats
+ */
+@@ -966,7 +986,6 @@
+
+ /**
+ * struct gfar_priv_rx_q - per rx queue structure
+- * @rxlock: per queue rx spin lock
+ * @rx_skbuff: skb pointers
+ * @skb_currx: currently use skb pointer
+ * @rx_bd_base: First rx buffer descriptor
+@@ -979,8 +998,7 @@
+ */
+
+ struct gfar_priv_rx_q {
+- spinlock_t rxlock __attribute__ ((aligned (SMP_CACHE_BYTES)));
+- struct sk_buff ** rx_skbuff;
++ struct sk_buff **rx_skbuff __aligned(SMP_CACHE_BYTES);
+ dma_addr_t rx_bd_dma_base;
+ struct rxbd8 *rx_bd_base;
+ struct rxbd8 *cur_rx;
+@@ -1016,17 +1034,20 @@
+ */
+
+ struct gfar_priv_grp {
+- spinlock_t grplock __attribute__ ((aligned (SMP_CACHE_BYTES)));
+- struct napi_struct napi;
+- struct gfar_private *priv;
++ spinlock_t grplock __aligned(SMP_CACHE_BYTES);
++ struct napi_struct napi_rx;
++ struct napi_struct napi_tx;
+ struct gfar __iomem *regs;
+- unsigned int rstat;
+- unsigned long num_rx_queues;
+- unsigned long rx_bit_map;
+- /* cacheline 3 */
++ struct gfar_priv_tx_q *tx_queue;
++ struct gfar_priv_rx_q *rx_queue;
+ unsigned int tstat;
++ unsigned int rstat;
++
++ struct gfar_private *priv;
+ unsigned long num_tx_queues;
+ unsigned long tx_bit_map;
++ unsigned long num_rx_queues;
++ unsigned long rx_bit_map;
+
+ struct gfar_irqinfo *irqinfo[GFAR_NUM_IRQS];
+ };
+@@ -1041,6 +1062,11 @@
+ GFAR_ERRATA_12 = 0x08, /* a.k.a errata eTSEC49 */
+ };
+
++enum gfar_dev_state {
++ GFAR_DOWN = 1,
++ GFAR_RESETTING
++};
++
+ /* Struct stolen almost completely (and shamelessly) from the FCC enet source
+ * (Ok, that's not so true anymore, but there is a family resemblance)
+ * The GFAR buffer descriptors track the ring buffers. The rx_bd_base
+@@ -1051,8 +1077,6 @@
+ * the buffer descriptor determines the actual condition.
+ */
+ struct gfar_private {
+- unsigned int num_rx_queues;
+-
+ struct device *dev;
+ struct net_device *ndev;
+ enum gfar_errata errata;
+@@ -1060,6 +1084,7 @@
+
+ u16 uses_rxfcb;
+ u16 padding;
++ u32 device_flags;
+
+ /* HW time stamping enabled flag */
+ int hwts_rx_en;
+@@ -1069,10 +1094,12 @@
+ struct gfar_priv_rx_q *rx_queue[MAX_RX_QS];
+ struct gfar_priv_grp gfargrp[MAXGROUPS];
+
+- u32 device_flags;
++ unsigned long state;
+
+- unsigned int mode;
++ unsigned short mode;
++ unsigned short poll_mode;
+ unsigned int num_tx_queues;
++ unsigned int num_rx_queues;
+ unsigned int num_grps;
+
+ /* Network Statistics */
+@@ -1113,6 +1140,9 @@
+ unsigned int total_tx_ring_size;
+ unsigned int total_rx_ring_size;
+
++ u32 rqueue;
++ u32 tqueue;
++
+ /* RX per device parameters */
+ unsigned int rx_stash_size;
+ unsigned int rx_stash_index;
+@@ -1127,11 +1157,6 @@
+ u32 __iomem *hash_regs[16];
+ int hash_width;
+
+- /* global parameters */
+- unsigned int fifo_threshold;
+- unsigned int fifo_starve;
+- unsigned int fifo_starve_off;
+-
+ /*Filer table*/
+ unsigned int ftp_rqfpr[MAX_FILER_IDX + 1];
+ unsigned int ftp_rqfcr[MAX_FILER_IDX + 1];
+@@ -1176,21 +1201,42 @@
+ *fpr = gfar_read(&regs->rqfpr);
+ }
+
+-void lock_rx_qs(struct gfar_private *priv);
+-void lock_tx_qs(struct gfar_private *priv);
+-void unlock_rx_qs(struct gfar_private *priv);
+-void unlock_tx_qs(struct gfar_private *priv);
++static inline void gfar_write_isrg(struct gfar_private *priv)
++{
++ struct gfar __iomem *regs = priv->gfargrp[0].regs;
++ u32 __iomem *baddr = &regs->isrg0;
++ u32 isrg = 0;
++ int grp_idx, i;
++
++ for (grp_idx = 0; grp_idx < priv->num_grps; grp_idx++) {
++ struct gfar_priv_grp *grp = &priv->gfargrp[grp_idx];
++
++ for_each_set_bit(i, &grp->rx_bit_map, priv->num_rx_queues) {
++ isrg |= (ISRG_RR0 >> i);
++ }
++
++ for_each_set_bit(i, &grp->tx_bit_map, priv->num_tx_queues) {
++ isrg |= (ISRG_TR0 >> i);
++ }
++
++ gfar_write(baddr, isrg);
++
++ baddr++;
++ isrg = 0;
++ }
++}
++
+ irqreturn_t gfar_receive(int irq, void *dev_id);
+ int startup_gfar(struct net_device *dev);
+ void stop_gfar(struct net_device *dev);
+-void gfar_halt(struct net_device *dev);
++void reset_gfar(struct net_device *dev);
++void gfar_mac_reset(struct gfar_private *priv);
++void gfar_halt(struct gfar_private *priv);
++void gfar_start(struct gfar_private *priv);
+ void gfar_phy_test(struct mii_bus *bus, struct phy_device *phydev, int enable,
+ u32 regnum, u32 read);
+ void gfar_configure_coalescing_all(struct gfar_private *priv);
+-void gfar_init_sysfs(struct net_device *dev);
+ int gfar_set_features(struct net_device *dev, netdev_features_t features);
+-void gfar_check_rx_parser_mode(struct gfar_private *priv);
+-void gfar_vlan_mode(struct net_device *dev, netdev_features_t features);
+
+ extern const struct ethtool_ops gfar_ethtool_ops;
+
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/gianfar_ptp.c linux-3.14.54/drivers/net/ethernet/freescale/gianfar_ptp.c
--- linux-3.14.54.orig/drivers/net/ethernet/freescale/gianfar_ptp.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/freescale/gianfar_ptp.c 2015-10-12 10:56:18.124351155 +0200
++++ linux-3.14.54/drivers/net/ethernet/freescale/gianfar_ptp.c 2015-10-15 15:51:25.492639508 +0200
@@ -414,6 +414,7 @@
.n_alarm = 0,
.n_ext_ts = N_EXT_TS,
@@ -294817,9 +294776,32 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/gianfar_sysfs.c linu
- if (rc)
- dev_err(&dev->dev, "Error creating gianfar sysfs files\n");
-}
+diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/Kconfig linux-3.14.54/drivers/net/ethernet/freescale/Kconfig
+--- linux-3.14.54.orig/drivers/net/ethernet/freescale/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/net/ethernet/freescale/Kconfig 2015-10-15 15:51:25.492639508 +0200
+@@ -67,6 +67,7 @@
+ tristate "Freescale XGMAC MDIO"
+ depends on FSL_SOC
+ select PHYLIB
++ select OF_MDIO
+ ---help---
+ This driver supports the MDIO bus on the Fman 10G Ethernet MACs.
+
+diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/Makefile linux-3.14.54/drivers/net/ethernet/freescale/Makefile
+--- linux-3.14.54.orig/drivers/net/ethernet/freescale/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/net/ethernet/freescale/Makefile 2015-10-15 15:51:25.492639508 +0200
+@@ -14,7 +14,6 @@
+ obj-$(CONFIG_GIANFAR) += gianfar_driver.o
+ obj-$(CONFIG_PTP_1588_CLOCK_GIANFAR) += gianfar_ptp.o
+ gianfar_driver-objs := gianfar.o \
+- gianfar_ethtool.o \
+- gianfar_sysfs.o
++ gianfar_ethtool.o
+ obj-$(CONFIG_UCC_GETH) += ucc_geth_driver.o
+ ucc_geth_driver-objs := ucc_geth.o ucc_geth_ethtool.o
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/ucc_geth.c linux-3.14.54/drivers/net/ethernet/freescale/ucc_geth.c
--- linux-3.14.54.orig/drivers/net/ethernet/freescale/ucc_geth.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/freescale/ucc_geth.c 2015-10-12 10:56:18.125351155 +0200
++++ linux-3.14.54/drivers/net/ethernet/freescale/ucc_geth.c 2015-10-15 15:51:25.492639508 +0200
@@ -1728,9 +1728,6 @@
phydev = of_phy_connect(dev, ug_info->phy_node, &adjust_link, 0,
@@ -294859,7 +294841,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/ucc_geth.c linux-3.1
ug_info->tbi_node = of_parse_phandle(np, "tbi-handle", 0);
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/xgmac_mdio.c linux-3.14.54/drivers/net/ethernet/freescale/xgmac_mdio.c
--- linux-3.14.54.orig/drivers/net/ethernet/freescale/xgmac_mdio.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/freescale/xgmac_mdio.c 2015-10-12 10:56:18.126351155 +0200
++++ linux-3.14.54/drivers/net/ethernet/freescale/xgmac_mdio.c 2015-10-15 15:51:25.492639508 +0200
@@ -162,7 +162,9 @@
/* Return all Fs if nothing was there */
@@ -294873,7 +294855,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/freescale/xgmac_mdio.c linux-3
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/intel/e1000e/ptp.c linux-3.14.54/drivers/net/ethernet/intel/e1000e/ptp.c
--- linux-3.14.54.orig/drivers/net/ethernet/intel/e1000e/ptp.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/intel/e1000e/ptp.c 2015-10-12 10:56:18.126351155 +0200
++++ linux-3.14.54/drivers/net/ethernet/intel/e1000e/ptp.c 2015-10-15 15:51:25.492639508 +0200
@@ -191,6 +191,7 @@
.n_alarm = 0,
.n_ext_ts = 0,
@@ -294884,7 +294866,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/intel/e1000e/ptp.c linux-3.14.
.adjtime = e1000e_phc_adjtime,
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/mellanox/mlx4/en_clock.c linux-3.14.54/drivers/net/ethernet/mellanox/mlx4/en_clock.c
--- linux-3.14.54.orig/drivers/net/ethernet/mellanox/mlx4/en_clock.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/mellanox/mlx4/en_clock.c 2015-10-12 10:56:18.126351155 +0200
++++ linux-3.14.54/drivers/net/ethernet/mellanox/mlx4/en_clock.c 2015-10-15 15:51:25.492639508 +0200
@@ -276,6 +276,7 @@
.n_alarm = 0,
.n_ext_ts = 0,
@@ -294895,7 +294877,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/mellanox/mlx4/en_clock.c linux
.adjtime = mlx4_en_phc_adjtime,
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/sfc/ptp.c linux-3.14.54/drivers/net/ethernet/sfc/ptp.c
--- linux-3.14.54.orig/drivers/net/ethernet/sfc/ptp.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/sfc/ptp.c 2015-10-12 10:56:18.127351155 +0200
++++ linux-3.14.54/drivers/net/ethernet/sfc/ptp.c 2015-10-15 15:51:25.492639508 +0200
@@ -1208,6 +1208,7 @@
.n_alarm = 0,
.n_ext_ts = 0,
@@ -294906,7 +294888,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/sfc/ptp.c linux-3.14.54/driver
.adjtime = efx_phc_adjtime,
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c linux-3.14.54/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c
--- linux-3.14.54.orig/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c 2015-10-12 10:56:18.127351155 +0200
++++ linux-3.14.54/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c 2015-10-15 15:51:25.496639245 +0200
@@ -164,6 +164,7 @@
.n_alarm = 0,
.n_ext_ts = 0,
@@ -294917,7 +294899,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c li
.adjtime = stmmac_adjust_time,
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/ti/cpts.c linux-3.14.54/drivers/net/ethernet/ti/cpts.c
--- linux-3.14.54.orig/drivers/net/ethernet/ti/cpts.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/ti/cpts.c 2015-10-12 10:56:18.128351155 +0200
++++ linux-3.14.54/drivers/net/ethernet/ti/cpts.c 2015-10-15 15:51:25.496639245 +0200
@@ -217,6 +217,7 @@
.name = "CTPS timer",
.max_adj = 1000000,
@@ -294928,7 +294910,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/ti/cpts.c linux-3.14.54/driver
.adjtime = cpts_ptp_adjtime,
diff -Nur linux-3.14.54.orig/drivers/net/ethernet/tile/tilegx.c linux-3.14.54/drivers/net/ethernet/tile/tilegx.c
--- linux-3.14.54.orig/drivers/net/ethernet/tile/tilegx.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ethernet/tile/tilegx.c 2015-10-12 10:56:18.128351155 +0200
++++ linux-3.14.54/drivers/net/ethernet/tile/tilegx.c 2015-10-15 15:51:25.496639245 +0200
@@ -870,6 +870,7 @@
.name = "mPIPE clock",
.max_adj = 999999999,
@@ -294939,7 +294921,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ethernet/tile/tilegx.c linux-3.14.54/dr
.adjtime = ptp_mpipe_adjtime,
diff -Nur linux-3.14.54.orig/drivers/net/ieee802154/Kconfig linux-3.14.54/drivers/net/ieee802154/Kconfig
--- linux-3.14.54.orig/drivers/net/ieee802154/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/ieee802154/Kconfig 2015-10-12 10:56:18.129351155 +0200
++++ linux-3.14.54/drivers/net/ieee802154/Kconfig 2015-10-15 15:51:25.496639245 +0200
@@ -15,9 +15,9 @@
depends on IEEE802154_DRIVERS
---help---
@@ -294983,7 +294965,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/ieee802154/Kconfig linux-3.14.54/driver
+ the module will be called 'mrf24j40'.
diff -Nur linux-3.14.54.orig/drivers/net/phy/at803x.c linux-3.14.54/drivers/net/phy/at803x.c
--- linux-3.14.54.orig/drivers/net/phy/at803x.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/phy/at803x.c 2015-10-12 10:56:18.129351155 +0200
++++ linux-3.14.54/drivers/net/phy/at803x.c 2015-10-15 15:51:25.496639245 +0200
@@ -27,6 +27,9 @@
#define AT803X_MMD_ACCESS_CONTROL 0x0D
#define AT803X_MMD_ACCESS_CONTROL_DATA 0x0E
@@ -295092,7 +295074,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/phy/at803x.c linux-3.14.54/drivers/net/
module_init(atheros_init);
diff -Nur linux-3.14.54.orig/drivers/net/phy/phy_device.c linux-3.14.54/drivers/net/phy/phy_device.c
--- linux-3.14.54.orig/drivers/net/phy/phy_device.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/phy/phy_device.c 2015-10-12 10:56:18.130351155 +0200
++++ linux-3.14.54/drivers/net/phy/phy_device.c 2015-10-15 15:51:25.496639245 +0200
@@ -1030,7 +1030,7 @@
return 0;
}
@@ -296414,7 +296396,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/phy/phy_device.c.orig linux-3.14.54/dri
+module_exit(phy_exit);
diff -Nur linux-3.14.54.orig/drivers/net/phy/smsc.c linux-3.14.54/drivers/net/phy/smsc.c
--- linux-3.14.54.orig/drivers/net/phy/smsc.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/phy/smsc.c 2015-10-12 10:56:18.130351155 +0200
++++ linux-3.14.54/drivers/net/phy/smsc.c 2015-10-15 15:51:25.496639245 +0200
@@ -249,8 +249,7 @@
static void __exit smsc_exit(void)
@@ -296427,7 +296409,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/phy/smsc.c linux-3.14.54/drivers/net/ph
MODULE_DESCRIPTION("SMSC PHY driver");
diff -Nur linux-3.14.54.orig/drivers/net/phy/vitesse.c linux-3.14.54/drivers/net/phy/vitesse.c
--- linux-3.14.54.orig/drivers/net/phy/vitesse.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/phy/vitesse.c 2015-10-12 10:56:18.130351155 +0200
++++ linux-3.14.54/drivers/net/phy/vitesse.c 2015-10-15 15:51:25.496639245 +0200
@@ -319,8 +319,7 @@
static void __exit vsc82xx_exit(void)
@@ -296440,7 +296422,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/phy/vitesse.c linux-3.14.54/drivers/net
module_init(vsc82xx_init);
diff -Nur linux-3.14.54.orig/drivers/net/veth.c linux-3.14.54/drivers/net/veth.c
--- linux-3.14.54.orig/drivers/net/veth.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/veth.c 2015-10-12 10:56:18.131351155 +0200
++++ linux-3.14.54/drivers/net/veth.c 2015-10-15 15:51:25.496639245 +0200
@@ -14,6 +14,7 @@
#include <linux/etherdevice.h>
#include <linux/u64_stats_sync.h>
@@ -296465,7 +296447,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/veth.c linux-3.14.54/drivers/net/veth.c
diff -Nur linux-3.14.54.orig/drivers/net/wireless/ath/ar5523/ar5523.c linux-3.14.54/drivers/net/wireless/ath/ar5523/ar5523.c
--- linux-3.14.54.orig/drivers/net/wireless/ath/ar5523/ar5523.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/ath/ar5523/ar5523.c 2015-10-12 10:56:18.131351155 +0200
++++ linux-3.14.54/drivers/net/wireless/ath/ar5523/ar5523.c 2015-10-15 15:51:25.496639245 +0200
@@ -1090,7 +1090,8 @@
return ret;
}
@@ -296478,7 +296460,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/ath/ar5523/ar5523.c linux-3.14
diff -Nur linux-3.14.54.orig/drivers/net/wireless/ath/ath10k/mac.c linux-3.14.54/drivers/net/wireless/ath/ath10k/mac.c
--- linux-3.14.54.orig/drivers/net/wireless/ath/ath10k/mac.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/ath/ath10k/mac.c 2015-10-12 10:56:18.132351155 +0200
++++ linux-3.14.54/drivers/net/wireless/ath/ath10k/mac.c 2015-10-15 15:51:25.496639245 +0200
@@ -3183,7 +3183,8 @@
return ret;
}
@@ -296491,7 +296473,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/ath/ath10k/mac.c linux-3.14.54
bool skip;
diff -Nur linux-3.14.54.orig/drivers/net/wireless/ath/ath6kl/cfg80211.c linux-3.14.54/drivers/net/wireless/ath/ath6kl/cfg80211.c
--- linux-3.14.54.orig/drivers/net/wireless/ath/ath6kl/cfg80211.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/ath/ath6kl/cfg80211.c 2015-10-12 10:56:18.132351155 +0200
++++ linux-3.14.54/drivers/net/wireless/ath/ath6kl/cfg80211.c 2015-10-15 15:51:25.496639245 +0200
@@ -790,7 +790,7 @@
if (nw_type & ADHOC_NETWORK) {
ath6kl_dbg(ATH6KL_DBG_WLAN_CFG, "ad-hoc %s selected\n",
@@ -296518,7 +296500,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/ath/ath6kl/cfg80211.c linux-3.
diff -Nur linux-3.14.54.orig/drivers/net/wireless/ath/ath6kl/sdio.c linux-3.14.54/drivers/net/wireless/ath/ath6kl/sdio.c
--- linux-3.14.54.orig/drivers/net/wireless/ath/ath6kl/sdio.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/ath/ath6kl/sdio.c 2015-10-12 10:56:18.133351155 +0200
++++ linux-3.14.54/drivers/net/wireless/ath/ath6kl/sdio.c 2015-10-15 15:51:25.496639245 +0200
@@ -222,6 +222,7 @@
struct mmc_data *data)
{
@@ -296549,7 +296531,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/ath/ath6kl/sdio.c linux-3.14.5
/* set scatter-gather table for request */
diff -Nur linux-3.14.54.orig/drivers/net/wireless/ath/ath9k/main.c linux-3.14.54/drivers/net/wireless/ath/ath9k/main.c
--- linux-3.14.54.orig/drivers/net/wireless/ath/ath9k/main.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/ath/ath9k/main.c 2015-10-12 10:56:18.134351155 +0200
++++ linux-3.14.54/drivers/net/wireless/ath/ath9k/main.c 2015-10-15 15:51:25.500638982 +0200
@@ -1885,7 +1885,8 @@
return !!npend;
}
@@ -298714,7 +298696,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/ath/ath9k/main.c.orig linux-3.
+};
diff -Nur linux-3.14.54.orig/drivers/net/wireless/ath/carl9170/main.c linux-3.14.54/drivers/net/wireless/ath/carl9170/main.c
--- linux-3.14.54.orig/drivers/net/wireless/ath/carl9170/main.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/ath/carl9170/main.c 2015-10-12 10:56:18.134351155 +0200
++++ linux-3.14.54/drivers/net/wireless/ath/carl9170/main.c 2015-10-15 15:51:25.500638982 +0200
@@ -1707,7 +1707,9 @@
return 0;
}
@@ -298726,35 +298708,9 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/ath/carl9170/main.c linux-3.14
{
struct ar9170 *ar = hw->priv;
unsigned int vid;
-diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/Makefile linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/Makefile
---- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/Makefile 2015-10-12 10:56:18.140351154 +0200
-@@ -24,6 +24,7 @@
- obj-$(CONFIG_BRCMFMAC) += brcmfmac.o
- brcmfmac-objs += \
- wl_cfg80211.o \
-+ chip.o \
- fwil.o \
- fweh.o \
- fwsignal.o \
-@@ -32,12 +33,11 @@
- bcdc.o \
- dhd_common.o \
- dhd_linux.o \
-- nvram.o \
-+ firmware.o \
- btcoex.o
- brcmfmac-$(CONFIG_BRCMFMAC_SDIO) += \
- dhd_sdio.o \
-- bcmsdh.o \
-- sdio_chip.o
-+ bcmsdh.o
- brcmfmac-$(CONFIG_BRCMFMAC_USB) += \
- usb.o
- brcmfmac-$(CONFIG_BRCMDBG) += \
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c 2015-10-12 10:56:18.134351155 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c 2015-10-15 15:51:25.500638982 +0200
@@ -43,7 +43,6 @@
#include "dhd_bus.h"
#include "dhd_dbg.h"
@@ -299015,7 +298971,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh.c li
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/chip.c linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/chip.c
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/chip.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/chip.c 2015-10-12 10:56:18.135351155 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/chip.c 2015-10-15 15:51:25.500638982 +0200
@@ -0,0 +1,1035 @@
+/*
+ * Copyright (c) 2014 Broadcom Corporation
@@ -300054,7 +300010,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/chip.c linu
+}
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/chip.h linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/chip.h
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/chip.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/chip.h 2015-10-12 10:56:18.135351155 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/chip.h 2015-10-15 15:51:25.500638982 +0200
@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2014 Broadcom Corporation
@@ -300147,21 +300103,9 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/chip.h linu
+bool brcmf_chip_sr_capable(struct brcmf_chip *pub);
+
+#endif /* BRCMF_AXIDMP_H */
-diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd.h linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/dhd.h
---- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/dhd.h 2015-10-12 10:56:18.136351155 +0200
-@@ -186,7 +186,7 @@
- void brcmf_txflowblock_if(struct brcmf_if *ifp,
- enum brcmf_netif_stop_reason reason, bool state);
- u32 brcmf_get_chip_info(struct brcmf_if *ifp);
--void brcmf_txfinalize(struct brcmf_pub *drvr, struct sk_buff *txp,
-+void brcmf_txfinalize(struct brcmf_pub *drvr, struct sk_buff *txp, u8 ifidx,
- bool success);
-
- /* Sets dongle media info (drv_version, mac address). */
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd_bus.h linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/dhd_bus.h
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd_bus.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/dhd_bus.h 2015-10-12 10:56:18.135351155 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/dhd_bus.h 2015-10-15 15:51:25.500638982 +0200
@@ -63,7 +63,6 @@
*/
struct brcmf_bus_ops {
@@ -300192,7 +300136,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd_bus.h l
bus->ops->stop(bus->dev);
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd_common.c linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/dhd_common.c
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd_common.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/dhd_common.c 2015-10-12 10:56:18.136351155 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/dhd_common.c 2015-10-15 15:51:25.500638982 +0200
@@ -32,6 +32,9 @@
#define BRCMF_DEFAULT_SCAN_UNASSOC_TIME 40
#define BRCMF_DEFAULT_PACKET_FILTER "100 0 0 0 0x01 0x00"
@@ -300232,9 +300176,21 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd_common.
/* Setup event_msgs, enable E_IF */
err = brcmf_fil_iovar_data_get(ifp, "event_msgs", eventmask,
BRCMF_EVENTING_MASK_LEN);
+diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd.h linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/dhd.h
+--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd.h 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/dhd.h 2015-10-15 15:51:25.500638982 +0200
+@@ -186,7 +186,7 @@
+ void brcmf_txflowblock_if(struct brcmf_if *ifp,
+ enum brcmf_netif_stop_reason reason, bool state);
+ u32 brcmf_get_chip_info(struct brcmf_if *ifp);
+-void brcmf_txfinalize(struct brcmf_pub *drvr, struct sk_buff *txp,
++void brcmf_txfinalize(struct brcmf_pub *drvr, struct sk_buff *txp, u8 ifidx,
+ bool success);
+
+ /* Sets dongle media info (drv_version, mac address). */
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c 2015-10-12 10:56:18.137351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c 2015-10-15 15:51:25.500638982 +0200
@@ -190,7 +190,7 @@
int ret;
struct brcmf_if *ifp = netdev_priv(ndev);
@@ -300363,7 +300319,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c
kfree(drvr);
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c 2015-10-12 10:56:18.138351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c 2015-10-15 15:51:25.500638982 +0200
@@ -23,6 +23,7 @@
#include <linux/interrupt.h>
#include <linux/sched.h>
@@ -302240,7 +302196,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c
kfree(bus->rxbuf);
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/firmware.c linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/firmware.c
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/firmware.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/firmware.c 2015-10-12 10:56:18.138351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/firmware.c 2015-10-15 15:51:25.504638720 +0200
@@ -0,0 +1,332 @@
+/*
+ * Copyright (c) 2013 Broadcom Corporation
@@ -302576,7 +302532,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/firmware.c
+}
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/firmware.h linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/firmware.h
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/firmware.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/firmware.h 2015-10-12 10:56:18.139351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/firmware.h 2015-10-15 15:51:25.504638720 +0200
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2013 Broadcom Corporation
@@ -302616,7 +302572,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/firmware.h
+#endif /* BRCMFMAC_FIRMWARE_H */
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/fwil.c linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/fwil.c
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/fwil.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/fwil.c 2015-10-12 10:56:18.139351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/fwil.c 2015-10-15 15:51:25.504638720 +0200
@@ -54,7 +54,7 @@
if (err >= 0)
err = 0;
@@ -302647,7 +302603,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/fwil.c linu
struct brcmf_pub *drvr = ifp->drvr;
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/fwil.h linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/fwil.h
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/fwil.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/fwil.h 2015-10-12 10:56:18.139351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/fwil.h 2015-10-15 15:51:25.504638720 +0200
@@ -83,7 +83,7 @@
s32 brcmf_fil_cmd_int_set(struct brcmf_if *ifp, u32 cmd, u32 data);
s32 brcmf_fil_cmd_int_get(struct brcmf_if *ifp, u32 cmd, u32 *data);
@@ -302659,7 +302615,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/fwil.h linu
u32 len);
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/fwil_types.h linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/fwil_types.h
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/fwil_types.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/fwil_types.h 2015-10-12 10:56:18.139351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/fwil_types.h 2015-10-15 15:51:25.504638720 +0200
@@ -48,6 +48,19 @@
#define BRCMF_MAXRATES_IN_SET 16 /* max # of rates in rateset */
@@ -302717,7 +302673,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/fwil_types.
struct brcmf_ssid_le ssid_le;
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/fwsignal.c linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/fwsignal.c
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/fwsignal.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/fwsignal.c 2015-10-12 10:56:18.140351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/fwsignal.c 2015-10-15 15:51:25.504638720 +0200
@@ -476,6 +476,7 @@
bool bus_flow_blocked;
bool creditmap_received;
@@ -302880,6 +302836,32 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/fwsignal.c
fws->fws_wq = create_singlethread_workqueue("brcmf_fws_wq");
if (fws->fws_wq == NULL) {
brcmf_err("workqueue creation failed\n");
+diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/Makefile linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/Makefile
+--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/Makefile 2015-10-15 15:51:25.504638720 +0200
+@@ -24,6 +24,7 @@
+ obj-$(CONFIG_BRCMFMAC) += brcmfmac.o
+ brcmfmac-objs += \
+ wl_cfg80211.o \
++ chip.o \
+ fwil.o \
+ fweh.o \
+ fwsignal.o \
+@@ -32,12 +33,11 @@
+ bcdc.o \
+ dhd_common.o \
+ dhd_linux.o \
+- nvram.o \
++ firmware.o \
+ btcoex.o
+ brcmfmac-$(CONFIG_BRCMFMAC_SDIO) += \
+ dhd_sdio.o \
+- bcmsdh.o \
+- sdio_chip.o
++ bcmsdh.o
+ brcmfmac-$(CONFIG_BRCMFMAC_USB) += \
+ usb.o
+ brcmfmac-$(CONFIG_BRCMDBG) += \
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/nvram.c linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/nvram.c
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/nvram.c 2015-10-01 11:36:53.000000000 +0200
+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/nvram.c 1970-01-01 01:00:00.000000000 +0100
@@ -303008,7 +302990,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/nvram.h lin
-#endif /* BRCMFMAC_NVRAM_H */
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/p2p.c linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/p2p.c
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/p2p.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/p2p.c 2015-10-12 10:56:18.141351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/p2p.c 2015-10-15 15:51:25.504638720 +0200
@@ -797,7 +797,8 @@
/* SOCIAL CHANNELS 1, 6, 11 */
search_state = WL_P2P_DISC_ST_SEARCH;
@@ -304253,7 +304235,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/sdio_chip.h
-#endif /* _BRCMFMAC_SDIO_CHIP_H_ */
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h 2015-10-12 10:56:18.142351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h 2015-10-15 15:51:25.504638720 +0200
@@ -180,6 +180,97 @@
uint max_request_size;
ushort max_segment_count;
@@ -304354,7 +304336,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/sdio_host.h
/* Register/deregister interrupt handler. */
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/usb.c linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/usb.c
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/usb.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/usb.c 2015-10-12 10:56:18.142351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/usb.c 2015-10-15 15:51:25.504638720 +0200
@@ -25,6 +25,7 @@
#include <dhd_bus.h>
#include <dhd_dbg.h>
@@ -304808,7 +304790,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/usb.c linux
}
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c 2015-10-12 10:56:18.143351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c 2015-10-15 15:51:25.508638456 +0200
@@ -18,6 +18,7 @@
#include <linux/kernel.h>
@@ -305723,7 +305705,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211
err = brcmf_cfg80211_change_iface(wdev->wiphy, ndev, wdev->iftype,
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.h linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.h
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.h 2015-10-12 10:56:18.144351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.h 2015-10-15 15:51:25.508638456 +0200
@@ -89,21 +89,6 @@
BRCMF_SCAN_STATUS_SUPPRESS,
};
@@ -305782,7 +305764,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211
u32 wl_get_vif_state_all(struct brcmf_cfg80211_info *cfg, unsigned long state);
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c linux-3.14.54/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c 2015-10-12 10:56:18.144351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c 2015-10-15 15:51:25.508638456 +0200
@@ -897,7 +897,8 @@
return result;
}
@@ -305808,7 +305790,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if
static struct brcms_info *brcms_attach(struct bcma_device *pdev)
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmsmac/main.c linux-3.14.54/drivers/net/wireless/brcm80211/brcmsmac/main.c
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmsmac/main.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmsmac/main.c 2015-10-12 10:56:18.145351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmsmac/main.c 2015-10-15 15:51:25.508638456 +0200
@@ -4870,14 +4870,11 @@
/*
* low level detach
@@ -305855,7 +305837,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmsmac/main.c linu
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmutil/d11.c linux-3.14.54/drivers/net/wireless/brcm80211/brcmutil/d11.c
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmutil/d11.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmutil/d11.c 2015-10-12 10:56:18.146351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/brcmutil/d11.c 2015-10-15 15:51:25.508638456 +0200
@@ -21,19 +21,46 @@
#include <brcmu_wifi.h>
#include <brcmu_d11.h>
@@ -305999,7 +305981,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/brcmutil/d11.c linux
case BRCMU_CHSPEC_D11AC_BW_160:
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/include/brcm_hw_ids.h linux-3.14.54/drivers/net/wireless/brcm80211/include/brcm_hw_ids.h
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/include/brcm_hw_ids.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/include/brcm_hw_ids.h 2015-10-12 10:56:18.146351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/include/brcm_hw_ids.h 2015-10-15 15:51:25.508638456 +0200
@@ -43,5 +43,6 @@
#define BCM4335_CHIP_ID 0x4335
#define BCM43362_CHIP_ID 43362
@@ -306009,7 +305991,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/include/brcm_hw_ids.
#endif /* _BRCM_HW_IDS_H_ */
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/include/brcmu_d11.h linux-3.14.54/drivers/net/wireless/brcm80211/include/brcmu_d11.h
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/include/brcmu_d11.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/include/brcmu_d11.h 2015-10-12 10:56:18.146351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/include/brcmu_d11.h 2015-10-15 15:51:25.508638456 +0200
@@ -108,13 +108,7 @@
};
@@ -306040,7 +306022,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/include/brcmu_d11.h
struct brcmu_chan {
diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/include/brcmu_wifi.h linux-3.14.54/drivers/net/wireless/brcm80211/include/brcmu_wifi.h
--- linux-3.14.54.orig/drivers/net/wireless/brcm80211/include/brcmu_wifi.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/brcm80211/include/brcmu_wifi.h 2015-10-12 10:56:18.147351154 +0200
++++ linux-3.14.54/drivers/net/wireless/brcm80211/include/brcmu_wifi.h 2015-10-15 15:51:25.508638456 +0200
@@ -29,6 +29,7 @@
#define CH_UPPER_SB 0x01
#define CH_LOWER_SB 0x02
@@ -306061,7 +306043,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/brcm80211/include/brcmu_wifi.h
#define WPA_AUTH_DISABLED 0x0000 /* Legacy (i.e., non-WPA) */
diff -Nur linux-3.14.54.orig/drivers/net/wireless/cw1200/sta.c linux-3.14.54/drivers/net/wireless/cw1200/sta.c
--- linux-3.14.54.orig/drivers/net/wireless/cw1200/sta.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/cw1200/sta.c 2015-10-12 10:56:18.147351154 +0200
++++ linux-3.14.54/drivers/net/wireless/cw1200/sta.c 2015-10-15 15:51:25.508638456 +0200
@@ -936,7 +936,8 @@
return ret;
}
@@ -306074,7 +306056,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/cw1200/sta.c linux-3.14.54/dri
diff -Nur linux-3.14.54.orig/drivers/net/wireless/cw1200/sta.h linux-3.14.54/drivers/net/wireless/cw1200/sta.h
--- linux-3.14.54.orig/drivers/net/wireless/cw1200/sta.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/cw1200/sta.h 2015-10-12 10:56:18.148351154 +0200
++++ linux-3.14.54/drivers/net/wireless/cw1200/sta.h 2015-10-15 15:51:25.508638456 +0200
@@ -40,7 +40,8 @@
int cw1200_set_rts_threshold(struct ieee80211_hw *hw, u32 value);
@@ -306087,7 +306069,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/cw1200/sta.h linux-3.14.54/dri
struct netdev_hw_addr_list *mc_list);
diff -Nur linux-3.14.54.orig/drivers/net/wireless/iwlegacy/common.c linux-3.14.54/drivers/net/wireless/iwlegacy/common.c
--- linux-3.14.54.orig/drivers/net/wireless/iwlegacy/common.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/iwlegacy/common.c 2015-10-12 10:56:18.149351154 +0200
++++ linux-3.14.54/drivers/net/wireless/iwlegacy/common.c 2015-10-15 15:51:25.512638192 +0200
@@ -4701,7 +4701,8 @@
}
EXPORT_SYMBOL(il_mac_change_interface);
@@ -306100,7 +306082,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/iwlegacy/common.c linux-3.14.5
unsigned long timeout = jiffies + msecs_to_jiffies(500);
diff -Nur linux-3.14.54.orig/drivers/net/wireless/iwlegacy/common.h linux-3.14.54/drivers/net/wireless/iwlegacy/common.h
--- linux-3.14.54.orig/drivers/net/wireless/iwlegacy/common.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/iwlegacy/common.h 2015-10-12 10:56:18.150351154 +0200
++++ linux-3.14.54/drivers/net/wireless/iwlegacy/common.h 2015-10-15 15:51:25.512638192 +0200
@@ -1722,7 +1722,8 @@
struct ieee80211_vif *vif);
int il_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
@@ -306113,7 +306095,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/iwlegacy/common.h linux-3.14.5
diff -Nur linux-3.14.54.orig/drivers/net/wireless/iwlwifi/dvm/mac80211.c linux-3.14.54/drivers/net/wireless/iwlwifi/dvm/mac80211.c
--- linux-3.14.54.orig/drivers/net/wireless/iwlwifi/dvm/mac80211.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/iwlwifi/dvm/mac80211.c 2015-10-12 10:56:18.150351154 +0200
++++ linux-3.14.54/drivers/net/wireless/iwlwifi/dvm/mac80211.c 2015-10-15 15:51:25.512638192 +0200
@@ -1091,7 +1091,8 @@
FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
}
@@ -306126,7 +306108,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/iwlwifi/dvm/mac80211.c linux-3
diff -Nur linux-3.14.54.orig/drivers/net/wireless/libertas/cfg.c linux-3.14.54/drivers/net/wireless/libertas/cfg.c
--- linux-3.14.54.orig/drivers/net/wireless/libertas/cfg.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/libertas/cfg.c 2015-10-12 10:56:18.151351153 +0200
++++ linux-3.14.54/drivers/net/wireless/libertas/cfg.c 2015-10-15 15:51:25.512638192 +0200
@@ -1766,7 +1766,8 @@
memcpy(priv->wdev->ssid, params->ssid, params->ssid_len);
priv->wdev->ssid_len = params->ssid_len;
@@ -306139,7 +306121,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/libertas/cfg.c linux-3.14.54/d
priv->connect_status = LBS_CONNECTED;
diff -Nur linux-3.14.54.orig/drivers/net/wireless/mac80211_hwsim.c linux-3.14.54/drivers/net/wireless/mac80211_hwsim.c
--- linux-3.14.54.orig/drivers/net/wireless/mac80211_hwsim.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/mac80211_hwsim.c 2015-10-12 10:56:18.151351153 +0200
++++ linux-3.14.54/drivers/net/wireless/mac80211_hwsim.c 2015-10-15 15:51:25.512638192 +0200
@@ -1671,7 +1671,9 @@
return 0;
}
@@ -306153,7 +306135,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/mac80211_hwsim.c linux-3.14.54
}
diff -Nur linux-3.14.54.orig/drivers/net/wireless/mwifiex/cfg80211.c linux-3.14.54/drivers/net/wireless/mwifiex/cfg80211.c
--- linux-3.14.54.orig/drivers/net/wireless/mwifiex/cfg80211.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/mwifiex/cfg80211.c 2015-10-12 10:56:18.152351153 +0200
++++ linux-3.14.54/drivers/net/wireless/mwifiex/cfg80211.c 2015-10-15 15:51:25.512638192 +0200
@@ -1881,7 +1881,8 @@
params->privacy);
done:
@@ -306166,7 +306148,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/mwifiex/cfg80211.c linux-3.14.
" %pM successfully\n", priv->cfg_bssid);
diff -Nur linux-3.14.54.orig/drivers/net/wireless/mwifiex/main.h linux-3.14.54/drivers/net/wireless/mwifiex/main.h
--- linux-3.14.54.orig/drivers/net/wireless/mwifiex/main.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/mwifiex/main.h 2015-10-12 10:56:18.152351153 +0200
++++ linux-3.14.54/drivers/net/wireless/mwifiex/main.h 2015-10-15 15:51:25.512638192 +0200
@@ -1078,7 +1078,7 @@
const u8 *key, int key_len, u8 key_index,
const u8 *mac_addr, int disable);
@@ -306178,7 +306160,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/mwifiex/main.h linux-3.14.54/d
diff -Nur linux-3.14.54.orig/drivers/net/wireless/mwifiex/sta_ioctl.c linux-3.14.54/drivers/net/wireless/mwifiex/sta_ioctl.c
--- linux-3.14.54.orig/drivers/net/wireless/mwifiex/sta_ioctl.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/mwifiex/sta_ioctl.c 2015-10-12 10:56:18.153351153 +0200
++++ linux-3.14.54/drivers/net/wireless/mwifiex/sta_ioctl.c 2015-10-15 15:51:25.512638192 +0200
@@ -1391,7 +1391,7 @@
* with requisite parameters and calls the IOCTL handler.
*/
@@ -306190,7 +306172,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/mwifiex/sta_ioctl.c linux-3.14
diff -Nur linux-3.14.54.orig/drivers/net/wireless/p54/main.c linux-3.14.54/drivers/net/wireless/p54/main.c
--- linux-3.14.54.orig/drivers/net/wireless/p54/main.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/p54/main.c 2015-10-12 10:56:18.153351153 +0200
++++ linux-3.14.54/drivers/net/wireless/p54/main.c 2015-10-15 15:51:25.512638192 +0200
@@ -669,7 +669,8 @@
return total;
}
@@ -306203,7 +306185,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/p54/main.c linux-3.14.54/drive
unsigned int total, i;
diff -Nur linux-3.14.54.orig/drivers/net/wireless/rndis_wlan.c linux-3.14.54/drivers/net/wireless/rndis_wlan.c
--- linux-3.14.54.orig/drivers/net/wireless/rndis_wlan.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/rndis_wlan.c 2015-10-12 10:56:18.154351153 +0200
++++ linux-3.14.54/drivers/net/wireless/rndis_wlan.c 2015-10-15 15:51:25.516637930 +0200
@@ -2835,7 +2835,9 @@
bssid, req_ie, req_ie_len,
resp_ie, resp_ie_len, GFP_KERNEL);
@@ -306217,7 +306199,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/rndis_wlan.c linux-3.14.54/dri
diff -Nur linux-3.14.54.orig/drivers/net/wireless/rt2x00/rt2x00.h linux-3.14.54/drivers/net/wireless/rt2x00/rt2x00.h
--- linux-3.14.54.orig/drivers/net/wireless/rt2x00/rt2x00.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/rt2x00/rt2x00.h 2015-10-12 10:56:18.155351153 +0200
++++ linux-3.14.54/drivers/net/wireless/rt2x00/rt2x00.h 2015-10-15 15:51:25.516637930 +0200
@@ -1449,7 +1449,8 @@
struct ieee80211_vif *vif, u16 queue,
const struct ieee80211_tx_queue_params *params);
@@ -306230,7 +306212,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/rt2x00/rt2x00.h linux-3.14.54/
void rt2x00mac_get_ringparam(struct ieee80211_hw *hw,
diff -Nur linux-3.14.54.orig/drivers/net/wireless/rt2x00/rt2x00mac.c linux-3.14.54/drivers/net/wireless/rt2x00/rt2x00mac.c
--- linux-3.14.54.orig/drivers/net/wireless/rt2x00/rt2x00mac.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/rt2x00/rt2x00mac.c 2015-10-12 10:56:18.155351153 +0200
++++ linux-3.14.54/drivers/net/wireless/rt2x00/rt2x00mac.c 2015-10-15 15:51:25.516637930 +0200
@@ -751,7 +751,8 @@
}
EXPORT_SYMBOL_GPL(rt2x00mac_rfkill_poll);
@@ -306243,7 +306225,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/rt2x00/rt2x00mac.c linux-3.14.
struct data_queue *queue;
diff -Nur linux-3.14.54.orig/drivers/net/wireless/rtl818x/rtl8187/dev.c linux-3.14.54/drivers/net/wireless/rtl818x/rtl8187/dev.c
--- linux-3.14.54.orig/drivers/net/wireless/rtl818x/rtl8187/dev.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/rtl818x/rtl8187/dev.c 2015-10-12 10:56:18.155351153 +0200
++++ linux-3.14.54/drivers/net/wireless/rtl818x/rtl8187/dev.c 2015-10-15 15:51:25.516637930 +0200
@@ -1636,10 +1636,10 @@
err_free_dmabuf:
@@ -306259,7 +306241,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/rtl818x/rtl8187/dev.c linux-3.
diff -Nur linux-3.14.54.orig/drivers/net/wireless/rtlwifi/core.c linux-3.14.54/drivers/net/wireless/rtlwifi/core.c
--- linux-3.14.54.orig/drivers/net/wireless/rtlwifi/core.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/rtlwifi/core.c 2015-10-12 10:56:18.156351153 +0200
++++ linux-3.14.54/drivers/net/wireless/rtlwifi/core.c 2015-10-15 15:51:25.516637930 +0200
@@ -1309,7 +1309,8 @@
* before switch channel or power save, or tx buffer packet
* maybe send after offchannel or rf sleep, this may cause
@@ -306272,7 +306254,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/rtlwifi/core.c linux-3.14.54/d
diff -Nur linux-3.14.54.orig/drivers/net/wireless/ti/wlcore/main.c linux-3.14.54/drivers/net/wireless/ti/wlcore/main.c
--- linux-3.14.54.orig/drivers/net/wireless/ti/wlcore/main.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/net/wireless/ti/wlcore/main.c 2015-10-12 10:56:18.157351153 +0200
++++ linux-3.14.54/drivers/net/wireless/ti/wlcore/main.c 2015-10-15 15:51:25.516637930 +0200
@@ -5156,7 +5156,8 @@
mutex_unlock(&wl->mutex);
}
@@ -306285,7 +306267,7 @@ diff -Nur linux-3.14.54.orig/drivers/net/wireless/ti/wlcore/main.c linux-3.14.54
diff -Nur linux-3.14.54.orig/drivers/pci/host/Kconfig linux-3.14.54/drivers/pci/host/Kconfig
--- linux-3.14.54.orig/drivers/pci/host/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/pci/host/Kconfig 2015-10-12 10:56:18.157351153 +0200
++++ linux-3.14.54/drivers/pci/host/Kconfig 2015-10-15 15:51:25.516637930 +0200
@@ -21,6 +21,23 @@
select PCIEPORTBUS
select PCIE_DW
@@ -306312,7 +306294,7 @@ diff -Nur linux-3.14.54.orig/drivers/pci/host/Kconfig linux-3.14.54/drivers/pci/
depends on ARCH_TEGRA
diff -Nur linux-3.14.54.orig/drivers/pci/host/Makefile linux-3.14.54/drivers/pci/host/Makefile
--- linux-3.14.54.orig/drivers/pci/host/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/pci/host/Makefile 2015-10-12 10:56:18.157351153 +0200
++++ linux-3.14.54/drivers/pci/host/Makefile 2015-10-15 15:51:25.516637930 +0200
@@ -1,6 +1,7 @@
obj-$(CONFIG_PCIE_DW) += pcie-designware.o
obj-$(CONFIG_PCI_EXYNOS) += pci-exynos.o
@@ -306321,172 +306303,282 @@ diff -Nur linux-3.14.54.orig/drivers/pci/host/Makefile linux-3.14.54/drivers/pci
obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o
obj-$(CONFIG_PCI_TEGRA) += pci-tegra.o
obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o
-diff -Nur linux-3.14.54.orig/drivers/pci/host/pci-imx6-ep-driver.c linux-3.14.54/drivers/pci/host/pci-imx6-ep-driver.c
---- linux-3.14.54.orig/drivers/pci/host/pci-imx6-ep-driver.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/pci/host/pci-imx6-ep-driver.c 2015-10-12 10:56:18.159351153 +0200
-@@ -0,0 +1,159 @@
-+/*
-+ * PCIe endpoint skeleton driver for IMX6 SOCs
-+ *
-+ * Copyright (C) 2014 Freescale Semiconductor, Inc. All Rights Reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+
-+ * You should have received a copy of the GNU General Public License along
-+ * with this program; if not, write to the Free Software Foundation, Inc.,
-+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/init.h>
-+#include <linux/pci.h>
-+#include <linux/pci-aspm.h>
-+#include <linux/slab.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/delay.h>
-+#include <linux/sched.h>
-+#include <linux/interrupt.h>
-+
-+#define DRV_DESCRIPTION "i.MX PCIE endpoint device driver"
-+#define DRV_VERSION "version 0.1"
-+#define DRV_NAME "imx_pcie_ep"
-+
-+struct imx_pcie_ep_priv {
-+ struct pci_dev *pci_dev;
-+ void __iomem *hw_base;
-+};
-+
-+/**
-+ * imx_pcie_ep_probe - Device Initialization Routine
-+ * @pdev: PCI device information struct
-+ * @id: entry in id_tbl
-+ *
-+ * Returns 0 on success, negative on failure
-+ **/
-+static int imx_pcie_ep_probe(struct pci_dev *pdev,
-+ const struct pci_device_id *id)
-+{
-+ int ret = 0;
-+ struct device *dev = &pdev->dev;
-+ struct imx_pcie_ep_priv *priv;
-+
-+ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
-+ if (!priv) {
-+ dev_err(dev, "can't alloc imx pcie priv\n");
-+ return -ENOMEM;
-+ }
-+
-+ priv->pci_dev = pdev;
-+
-+ if (pci_enable_device(pdev)) {
-+ ret = -ENODEV;
-+ goto out;
-+ }
-+ pci_set_master(pdev);
+diff -Nur linux-3.14.54.orig/drivers/pci/host/pcie-designware.c linux-3.14.54/drivers/pci/host/pcie-designware.c
+--- linux-3.14.54.orig/drivers/pci/host/pcie-designware.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/pci/host/pcie-designware.c 2015-10-15 15:51:25.516637930 +0200
+@@ -23,48 +23,6 @@
+
+ #include "pcie-designware.h"
+
+-/* Synopsis specific PCIE configuration registers */
+-#define PCIE_PORT_LINK_CONTROL 0x710
+-#define PORT_LINK_MODE_MASK (0x3f << 16)
+-#define PORT_LINK_MODE_1_LANES (0x1 << 16)
+-#define PORT_LINK_MODE_2_LANES (0x3 << 16)
+-#define PORT_LINK_MODE_4_LANES (0x7 << 16)
+-
+-#define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C
+-#define PORT_LOGIC_SPEED_CHANGE (0x1 << 17)
+-#define PORT_LOGIC_LINK_WIDTH_MASK (0x1ff << 8)
+-#define PORT_LOGIC_LINK_WIDTH_1_LANES (0x1 << 8)
+-#define PORT_LOGIC_LINK_WIDTH_2_LANES (0x2 << 8)
+-#define PORT_LOGIC_LINK_WIDTH_4_LANES (0x4 << 8)
+-
+-#define PCIE_MSI_ADDR_LO 0x820
+-#define PCIE_MSI_ADDR_HI 0x824
+-#define PCIE_MSI_INTR0_ENABLE 0x828
+-#define PCIE_MSI_INTR0_MASK 0x82C
+-#define PCIE_MSI_INTR0_STATUS 0x830
+-
+-#define PCIE_ATU_VIEWPORT 0x900
+-#define PCIE_ATU_REGION_INBOUND (0x1 << 31)
+-#define PCIE_ATU_REGION_OUTBOUND (0x0 << 31)
+-#define PCIE_ATU_REGION_INDEX1 (0x1 << 0)
+-#define PCIE_ATU_REGION_INDEX0 (0x0 << 0)
+-#define PCIE_ATU_CR1 0x904
+-#define PCIE_ATU_TYPE_MEM (0x0 << 0)
+-#define PCIE_ATU_TYPE_IO (0x2 << 0)
+-#define PCIE_ATU_TYPE_CFG0 (0x4 << 0)
+-#define PCIE_ATU_TYPE_CFG1 (0x5 << 0)
+-#define PCIE_ATU_CR2 0x908
+-#define PCIE_ATU_ENABLE (0x1 << 31)
+-#define PCIE_ATU_BAR_MODE_ENABLE (0x1 << 30)
+-#define PCIE_ATU_LOWER_BASE 0x90C
+-#define PCIE_ATU_UPPER_BASE 0x910
+-#define PCIE_ATU_LIMIT 0x914
+-#define PCIE_ATU_LOWER_TARGET 0x918
+-#define PCIE_ATU_BUS(x) (((x) & 0xff) << 24)
+-#define PCIE_ATU_DEV(x) (((x) & 0x1f) << 19)
+-#define PCIE_ATU_FUNC(x) (((x) & 0x7) << 16)
+-#define PCIE_ATU_UPPER_TARGET 0x91C
+-
+ static struct hw_pci dw_pci;
+
+ static unsigned long global_io_offset;
+@@ -332,23 +290,28 @@
+ return -EINVAL;
+ }
+
+- pci_read_config_word(pdev, desc->msi_attrib.pos+PCI_MSI_FLAGS,
+- &msg_ctr);
+- msgvec = (msg_ctr&PCI_MSI_FLAGS_QSIZE) >> 4;
+- if (msgvec == 0)
+- msgvec = (msg_ctr & PCI_MSI_FLAGS_QMASK) >> 1;
+- if (msgvec > 5)
+- msgvec = 0;
+-
+- irq = assign_irq((1 << msgvec), desc, &pos);
+- if (irq < 0)
+- return irq;
+-
+- /*
+- * write_msi_msg() will update PCI_MSI_FLAGS so there is
+- * no need to explicitly call pci_write_config_word().
+- */
+- desc->msi_attrib.multiple = msgvec;
++ if (pp->quirks & DW_PCIE_QUIRK_NO_MSI_VEC) {
++ irq = assign_irq(1, desc, &pos);
++ set_irq_flags(irq, IRQF_VALID);
++ } else {
++ pci_read_config_word(pdev, desc->msi_attrib.pos+PCI_MSI_FLAGS,
++ &msg_ctr);
++ msgvec = (msg_ctr&PCI_MSI_FLAGS_QSIZE) >> 4;
++ if (msgvec == 0)
++ msgvec = (msg_ctr & PCI_MSI_FLAGS_QMASK) >> 1;
++ if (msgvec > 5)
++ msgvec = 0;
+
-+ pci_set_drvdata(pdev, priv);
++ irq = assign_irq((1 << msgvec), desc, &pos);
++ if (irq < 0)
++ return irq;
+
-+ priv->hw_base = pci_iomap(pdev, 0, 0);
-+ if (!priv->hw_base) {
-+ ret = -ENODEV;
-+ goto out;
++ msg_ctr &= ~PCI_MSI_FLAGS_QSIZE;
++ msg_ctr |= msgvec << 4;
++ pci_write_config_word(pdev, desc->msi_attrib.pos + PCI_MSI_FLAGS,
++ msg_ctr);
++ desc->msi_attrib.multiple = msgvec;
+ }
+
+ msg.address_lo = virt_to_phys((void *)pp->msi_data);
+ msg.address_hi = 0x0;
+@@ -363,9 +326,30 @@
+ clear_irq(irq);
+ }
+
++static int dw_msi_check_device(struct msi_chip *chip, struct pci_dev *pdev,
++ int nvec, int type)
++{
++ struct pcie_port *pp = sys_to_pcie(pdev->bus->sysdata);
++ u32 val;
+
-+ pr_info("pci_resource_len = 0x%08llx\n",
-+ (unsigned long long) pci_resource_len(pdev, 0));
-+ pr_info("pci_resource_base = %p\n", priv->hw_base);
-+
-+ ret = pci_enable_msi(priv->pci_dev);
-+ if (ret < 0) {
-+ dev_err(dev, "can't enable msi\n");
-+ return ret;
++ if (pp->quirks & DW_PCIE_QUIRK_MSI_SELF_EN) {
++ if ((type == PCI_CAP_ID_MSI) || (type == PCI_CAP_ID_MSIX)) {
++ /* Set MSI enable of RC here */
++ val = readl(pp->dbi_base + 0x50);
++ if ((val & (PCI_MSI_FLAGS_ENABLE << 16)) == 0) {
++ val |= PCI_MSI_FLAGS_ENABLE << 16;
++ writel(val, pp->dbi_base + 0x50);
++ }
++ }
+ }
+
-+ /*
-+ * Force to use 0x01FF8000 as the MSI address,
-+ * to do the MSI demo
-+ */
-+ pci_bus_write_config_dword(pdev->bus, 0, 0x54, 0x01FF8000);
-+ pci_bus_write_config_dword(pdev->bus->parent, 0, 0x820, 0x01FF8000);
-+
-+ /* configure rc's msi cap */
-+ pci_bus_read_config_dword(pdev->bus->parent, 0, 0x50, &ret);
-+ ret |= (PCI_MSI_FLAGS_ENABLE << 16);
-+ pci_bus_write_config_dword(pdev->bus->parent, 0, 0x50, ret);
-+ pci_bus_write_config_dword(pdev->bus->parent, 0, 0x828, 0x1);
-+ pci_bus_write_config_dword(pdev->bus->parent, 0, 0x82C, 0xFFFFFFFE);
-+
+ return 0;
-+
-+out:
-+ return ret;
-+}
-+
-+static void imx_pcie_ep_remove(struct pci_dev *pdev)
-+{
-+ struct imx_pcie_ep_priv *priv = pci_get_drvdata(pdev);
-+
-+ if (!priv)
-+ return;
-+ pr_info("***imx pcie ep driver unload***\n");
+}
+
-+static struct pci_device_id imx_pcie_ep_ids[] = {
-+ {
-+ .class = PCI_CLASS_MEMORY_RAM << 8,
-+ .class_mask = ~0,
-+ .vendor = 0xbeaf,
-+ .device = 0xdead,
-+ .subvendor = PCI_ANY_ID,
-+ .subdevice = PCI_ANY_ID,
-+ },
-+ { } /* terminate list */
-+};
-+MODULE_DEVICE_TABLE(pci, imx_pcie_ep_ids);
-+
-+static struct pci_driver imx_pcie_ep_driver = {
-+ .name = DRV_NAME,
-+ .id_table = imx_pcie_ep_ids,
-+ .probe = imx_pcie_ep_probe,
-+ .remove = imx_pcie_ep_remove,
-+};
-+
-+static int __init imx_pcie_ep_init(void)
-+{
-+ int ret;
-+ pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
-+
-+ ret = pci_register_driver(&imx_pcie_ep_driver);
-+ if (ret)
-+ pr_err("Unable to initialize PCI module\n");
+ static struct msi_chip dw_pcie_msi_chip = {
+ .setup_irq = dw_msi_setup_irq,
+ .teardown_irq = dw_msi_teardown_irq,
++ .check_device = dw_msi_check_device,
+ };
+
+ int dw_pcie_link_up(struct pcie_port *pp)
+@@ -531,38 +515,6 @@
+ dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
+ }
+
+-static void dw_pcie_prog_viewport_mem_outbound(struct pcie_port *pp)
+-{
+- /* Program viewport 0 : OUTBOUND : MEM */
+- dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX0,
+- PCIE_ATU_VIEWPORT);
+- dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_MEM, PCIE_ATU_CR1);
+- dw_pcie_writel_rc(pp, pp->mem_base, PCIE_ATU_LOWER_BASE);
+- dw_pcie_writel_rc(pp, (pp->mem_base >> 32), PCIE_ATU_UPPER_BASE);
+- dw_pcie_writel_rc(pp, pp->mem_base + pp->config.mem_size - 1,
+- PCIE_ATU_LIMIT);
+- dw_pcie_writel_rc(pp, pp->config.mem_bus_addr, PCIE_ATU_LOWER_TARGET);
+- dw_pcie_writel_rc(pp, upper_32_bits(pp->config.mem_bus_addr),
+- PCIE_ATU_UPPER_TARGET);
+- dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
+-}
+-
+-static void dw_pcie_prog_viewport_io_outbound(struct pcie_port *pp)
+-{
+- /* Program viewport 1 : OUTBOUND : IO */
+- dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX1,
+- PCIE_ATU_VIEWPORT);
+- dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_IO, PCIE_ATU_CR1);
+- dw_pcie_writel_rc(pp, pp->io_base, PCIE_ATU_LOWER_BASE);
+- dw_pcie_writel_rc(pp, (pp->io_base >> 32), PCIE_ATU_UPPER_BASE);
+- dw_pcie_writel_rc(pp, pp->io_base + pp->config.io_size - 1,
+- PCIE_ATU_LIMIT);
+- dw_pcie_writel_rc(pp, pp->config.io_bus_addr, PCIE_ATU_LOWER_TARGET);
+- dw_pcie_writel_rc(pp, upper_32_bits(pp->config.io_bus_addr),
+- PCIE_ATU_UPPER_TARGET);
+- dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
+-}
+-
+ static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus,
+ u32 devfn, int where, int size, u32 *val)
+ {
+@@ -577,12 +529,10 @@
+ dw_pcie_prog_viewport_cfg0(pp, busdev);
+ ret = dw_pcie_cfg_read(pp->va_cfg0_base + address, where, size,
+ val);
+- dw_pcie_prog_viewport_mem_outbound(pp);
+ } else {
+ dw_pcie_prog_viewport_cfg1(pp, busdev);
+ ret = dw_pcie_cfg_read(pp->va_cfg1_base + address, where, size,
+ val);
+- dw_pcie_prog_viewport_io_outbound(pp);
+ }
+
+ return ret;
+@@ -602,12 +552,10 @@
+ dw_pcie_prog_viewport_cfg0(pp, busdev);
+ ret = dw_pcie_cfg_write(pp->va_cfg0_base + address, where, size,
+ val);
+- dw_pcie_prog_viewport_mem_outbound(pp);
+ } else {
+ dw_pcie_prog_viewport_cfg1(pp, busdev);
+ ret = dw_pcie_cfg_write(pp->va_cfg1_base + address, where, size,
+ val);
+- dw_pcie_prog_viewport_io_outbound(pp);
+ }
+
+ return ret;
+@@ -739,7 +687,13 @@
+ {
+ struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
+
+- return pp->irq;
++ switch (pin) {
++ case 1: return pp->irq;
++ case 2: return pp->irq - 1;
++ case 3: return pp->irq - 2;
++ case 4: return pp->irq - 3;
++ default: return -1;
++ }
+ }
+
+ static void dw_pcie_add_bus(struct pci_bus *bus)
+diff -Nur linux-3.14.54.orig/drivers/pci/host/pcie-designware.h linux-3.14.54/drivers/pci/host/pcie-designware.h
+--- linux-3.14.54.orig/drivers/pci/host/pcie-designware.h 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/pci/host/pcie-designware.h 2015-10-15 15:51:25.516637930 +0200
+@@ -14,6 +14,48 @@
+ #ifndef _PCIE_DESIGNWARE_H
+ #define _PCIE_DESIGNWARE_H
+
++/* Synopsis specific PCIE configuration registers */
++#define PCIE_PORT_LINK_CONTROL 0x710
++#define PORT_LINK_MODE_MASK (0x3f << 16)
++#define PORT_LINK_MODE_1_LANES (0x1 << 16)
++#define PORT_LINK_MODE_2_LANES (0x3 << 16)
++#define PORT_LINK_MODE_4_LANES (0x7 << 16)
+
-+ return ret;
-+}
++#define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C
++#define PORT_LOGIC_SPEED_CHANGE (0x1 << 17)
++#define PORT_LOGIC_LINK_WIDTH_MASK (0x1ff << 8)
++#define PORT_LOGIC_LINK_WIDTH_1_LANES (0x1 << 8)
++#define PORT_LOGIC_LINK_WIDTH_2_LANES (0x2 << 8)
++#define PORT_LOGIC_LINK_WIDTH_4_LANES (0x4 << 8)
+
-+static void __exit imx_pcie_ep_exit(void)
-+{
-+ pci_unregister_driver(&imx_pcie_ep_driver);
-+}
++#define PCIE_MSI_ADDR_LO 0x820
++#define PCIE_MSI_ADDR_HI 0x824
++#define PCIE_MSI_INTR0_ENABLE 0x828
++#define PCIE_MSI_INTR0_MASK 0x82C
++#define PCIE_MSI_INTR0_STATUS 0x830
+
-+module_exit(imx_pcie_ep_exit);
-+module_init(imx_pcie_ep_init);
++#define PCIE_ATU_VIEWPORT 0x900
++#define PCIE_ATU_REGION_INBOUND (0x1 << 31)
++#define PCIE_ATU_REGION_OUTBOUND (0x0 << 31)
++#define PCIE_ATU_REGION_INDEX1 (0x1 << 0)
++#define PCIE_ATU_REGION_INDEX0 (0x0 << 0)
++#define PCIE_ATU_CR1 0x904
++#define PCIE_ATU_TYPE_MEM (0x0 << 0)
++#define PCIE_ATU_TYPE_IO (0x2 << 0)
++#define PCIE_ATU_TYPE_CFG0 (0x4 << 0)
++#define PCIE_ATU_TYPE_CFG1 (0x5 << 0)
++#define PCIE_ATU_CR2 0x908
++#define PCIE_ATU_ENABLE (0x1 << 31)
++#define PCIE_ATU_BAR_MODE_ENABLE (0x1 << 30)
++#define PCIE_ATU_LOWER_BASE 0x90C
++#define PCIE_ATU_UPPER_BASE 0x910
++#define PCIE_ATU_LIMIT 0x914
++#define PCIE_ATU_LOWER_TARGET 0x918
++#define PCIE_ATU_BUS(x) (((x) & 0xff) << 24)
++#define PCIE_ATU_DEV(x) (((x) & 0x1f) << 19)
++#define PCIE_ATU_FUNC(x) (((x) & 0x7) << 16)
++#define PCIE_ATU_UPPER_TARGET 0x91C
+
-+MODULE_DESCRIPTION(DRV_DESCRIPTION);
-+MODULE_VERSION(DRV_VERSION);
-+MODULE_LICENSE("GPL");
-+MODULE_ALIAS("imx_pcie_ep");
+ struct pcie_port_info {
+ u32 cfg0_size;
+ u32 cfg1_size;
+@@ -49,6 +91,11 @@
+ int irq;
+ u32 lanes;
+ struct pcie_host_ops *ops;
++ u32 quirks; /* Deviations from spec. */
++/* Controller doesn't support MSI VEC */
++#define DW_PCIE_QUIRK_NO_MSI_VEC (1<<0)
++/* MSI EN of Controller should be configured when MSI is enabled */
++#define DW_PCIE_QUIRK_MSI_SELF_EN (1<<1)
+ int msi_irq;
+ struct irq_domain *irq_domain;
+ unsigned long msi_data;
diff -Nur linux-3.14.54.orig/drivers/pci/host/pci-imx6.c linux-3.14.54/drivers/pci/host/pci-imx6.c
--- linux-3.14.54.orig/drivers/pci/host/pci-imx6.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/pci/host/pci-imx6.c 2015-10-12 10:56:18.158351153 +0200
++++ linux-3.14.54/drivers/pci/host/pci-imx6.c 2015-10-15 15:51:25.520637666 +0200
@@ -1,6 +1,7 @@
/*
* PCIe host controller driver for Freescale i.MX6 SoCs
@@ -307167,282 +307259,172 @@ diff -Nur linux-3.14.54.orig/drivers/pci/host/pci-imx6.c linux-3.14.54/drivers/p
};
/* Freescale PCIe driver does not allow module unload */
-diff -Nur linux-3.14.54.orig/drivers/pci/host/pcie-designware.c linux-3.14.54/drivers/pci/host/pcie-designware.c
---- linux-3.14.54.orig/drivers/pci/host/pcie-designware.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/pci/host/pcie-designware.c 2015-10-12 10:56:18.158351153 +0200
-@@ -23,48 +23,6 @@
-
- #include "pcie-designware.h"
-
--/* Synopsis specific PCIE configuration registers */
--#define PCIE_PORT_LINK_CONTROL 0x710
--#define PORT_LINK_MODE_MASK (0x3f << 16)
--#define PORT_LINK_MODE_1_LANES (0x1 << 16)
--#define PORT_LINK_MODE_2_LANES (0x3 << 16)
--#define PORT_LINK_MODE_4_LANES (0x7 << 16)
--
--#define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C
--#define PORT_LOGIC_SPEED_CHANGE (0x1 << 17)
--#define PORT_LOGIC_LINK_WIDTH_MASK (0x1ff << 8)
--#define PORT_LOGIC_LINK_WIDTH_1_LANES (0x1 << 8)
--#define PORT_LOGIC_LINK_WIDTH_2_LANES (0x2 << 8)
--#define PORT_LOGIC_LINK_WIDTH_4_LANES (0x4 << 8)
--
--#define PCIE_MSI_ADDR_LO 0x820
--#define PCIE_MSI_ADDR_HI 0x824
--#define PCIE_MSI_INTR0_ENABLE 0x828
--#define PCIE_MSI_INTR0_MASK 0x82C
--#define PCIE_MSI_INTR0_STATUS 0x830
--
--#define PCIE_ATU_VIEWPORT 0x900
--#define PCIE_ATU_REGION_INBOUND (0x1 << 31)
--#define PCIE_ATU_REGION_OUTBOUND (0x0 << 31)
--#define PCIE_ATU_REGION_INDEX1 (0x1 << 0)
--#define PCIE_ATU_REGION_INDEX0 (0x0 << 0)
--#define PCIE_ATU_CR1 0x904
--#define PCIE_ATU_TYPE_MEM (0x0 << 0)
--#define PCIE_ATU_TYPE_IO (0x2 << 0)
--#define PCIE_ATU_TYPE_CFG0 (0x4 << 0)
--#define PCIE_ATU_TYPE_CFG1 (0x5 << 0)
--#define PCIE_ATU_CR2 0x908
--#define PCIE_ATU_ENABLE (0x1 << 31)
--#define PCIE_ATU_BAR_MODE_ENABLE (0x1 << 30)
--#define PCIE_ATU_LOWER_BASE 0x90C
--#define PCIE_ATU_UPPER_BASE 0x910
--#define PCIE_ATU_LIMIT 0x914
--#define PCIE_ATU_LOWER_TARGET 0x918
--#define PCIE_ATU_BUS(x) (((x) & 0xff) << 24)
--#define PCIE_ATU_DEV(x) (((x) & 0x1f) << 19)
--#define PCIE_ATU_FUNC(x) (((x) & 0x7) << 16)
--#define PCIE_ATU_UPPER_TARGET 0x91C
--
- static struct hw_pci dw_pci;
-
- static unsigned long global_io_offset;
-@@ -332,23 +290,28 @@
- return -EINVAL;
- }
-
-- pci_read_config_word(pdev, desc->msi_attrib.pos+PCI_MSI_FLAGS,
-- &msg_ctr);
-- msgvec = (msg_ctr&PCI_MSI_FLAGS_QSIZE) >> 4;
-- if (msgvec == 0)
-- msgvec = (msg_ctr & PCI_MSI_FLAGS_QMASK) >> 1;
-- if (msgvec > 5)
-- msgvec = 0;
--
-- irq = assign_irq((1 << msgvec), desc, &pos);
-- if (irq < 0)
-- return irq;
--
-- /*
-- * write_msi_msg() will update PCI_MSI_FLAGS so there is
-- * no need to explicitly call pci_write_config_word().
-- */
-- desc->msi_attrib.multiple = msgvec;
-+ if (pp->quirks & DW_PCIE_QUIRK_NO_MSI_VEC) {
-+ irq = assign_irq(1, desc, &pos);
-+ set_irq_flags(irq, IRQF_VALID);
-+ } else {
-+ pci_read_config_word(pdev, desc->msi_attrib.pos+PCI_MSI_FLAGS,
-+ &msg_ctr);
-+ msgvec = (msg_ctr&PCI_MSI_FLAGS_QSIZE) >> 4;
-+ if (msgvec == 0)
-+ msgvec = (msg_ctr & PCI_MSI_FLAGS_QMASK) >> 1;
-+ if (msgvec > 5)
-+ msgvec = 0;
+diff -Nur linux-3.14.54.orig/drivers/pci/host/pci-imx6-ep-driver.c linux-3.14.54/drivers/pci/host/pci-imx6-ep-driver.c
+--- linux-3.14.54.orig/drivers/pci/host/pci-imx6-ep-driver.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/pci/host/pci-imx6-ep-driver.c 2015-10-15 15:51:25.520637666 +0200
+@@ -0,0 +1,159 @@
++/*
++ * PCIe endpoint skeleton driver for IMX6 SOCs
++ *
++ * Copyright (C) 2014 Freescale Semiconductor, Inc. All Rights Reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
+
-+ irq = assign_irq((1 << msgvec), desc, &pos);
-+ if (irq < 0)
-+ return irq;
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
+
-+ msg_ctr &= ~PCI_MSI_FLAGS_QSIZE;
-+ msg_ctr |= msgvec << 4;
-+ pci_write_config_word(pdev, desc->msi_attrib.pos + PCI_MSI_FLAGS,
-+ msg_ctr);
-+ desc->msi_attrib.multiple = msgvec;
-+ }
-
- msg.address_lo = virt_to_phys((void *)pp->msi_data);
- msg.address_hi = 0x0;
-@@ -363,9 +326,30 @@
- clear_irq(irq);
- }
-
-+static int dw_msi_check_device(struct msi_chip *chip, struct pci_dev *pdev,
-+ int nvec, int type)
++ * You should have received a copy of the GNU General Public License along
++ * with this program; if not, write to the Free Software Foundation, Inc.,
++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
++ */
++
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/pci.h>
++#include <linux/pci-aspm.h>
++#include <linux/slab.h>
++#include <linux/dma-mapping.h>
++#include <linux/delay.h>
++#include <linux/sched.h>
++#include <linux/interrupt.h>
++
++#define DRV_DESCRIPTION "i.MX PCIE endpoint device driver"
++#define DRV_VERSION "version 0.1"
++#define DRV_NAME "imx_pcie_ep"
++
++struct imx_pcie_ep_priv {
++ struct pci_dev *pci_dev;
++ void __iomem *hw_base;
++};
++
++/**
++ * imx_pcie_ep_probe - Device Initialization Routine
++ * @pdev: PCI device information struct
++ * @id: entry in id_tbl
++ *
++ * Returns 0 on success, negative on failure
++ **/
++static int imx_pcie_ep_probe(struct pci_dev *pdev,
++ const struct pci_device_id *id)
+{
-+ struct pcie_port *pp = sys_to_pcie(pdev->bus->sysdata);
-+ u32 val;
++ int ret = 0;
++ struct device *dev = &pdev->dev;
++ struct imx_pcie_ep_priv *priv;
+
-+ if (pp->quirks & DW_PCIE_QUIRK_MSI_SELF_EN) {
-+ if ((type == PCI_CAP_ID_MSI) || (type == PCI_CAP_ID_MSIX)) {
-+ /* Set MSI enable of RC here */
-+ val = readl(pp->dbi_base + 0x50);
-+ if ((val & (PCI_MSI_FLAGS_ENABLE << 16)) == 0) {
-+ val |= PCI_MSI_FLAGS_ENABLE << 16;
-+ writel(val, pp->dbi_base + 0x50);
-+ }
-+ }
++ priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
++ if (!priv) {
++ dev_err(dev, "can't alloc imx pcie priv\n");
++ return -ENOMEM;
++ }
++
++ priv->pci_dev = pdev;
++
++ if (pci_enable_device(pdev)) {
++ ret = -ENODEV;
++ goto out;
+ }
++ pci_set_master(pdev);
++
++ pci_set_drvdata(pdev, priv);
++
++ priv->hw_base = pci_iomap(pdev, 0, 0);
++ if (!priv->hw_base) {
++ ret = -ENODEV;
++ goto out;
++ }
++
++ pr_info("pci_resource_len = 0x%08llx\n",
++ (unsigned long long) pci_resource_len(pdev, 0));
++ pr_info("pci_resource_base = %p\n", priv->hw_base);
++
++ ret = pci_enable_msi(priv->pci_dev);
++ if (ret < 0) {
++ dev_err(dev, "can't enable msi\n");
++ return ret;
++ }
++
++ /*
++ * Force to use 0x01FF8000 as the MSI address,
++ * to do the MSI demo
++ */
++ pci_bus_write_config_dword(pdev->bus, 0, 0x54, 0x01FF8000);
++ pci_bus_write_config_dword(pdev->bus->parent, 0, 0x820, 0x01FF8000);
++
++ /* configure rc's msi cap */
++ pci_bus_read_config_dword(pdev->bus->parent, 0, 0x50, &ret);
++ ret |= (PCI_MSI_FLAGS_ENABLE << 16);
++ pci_bus_write_config_dword(pdev->bus->parent, 0, 0x50, ret);
++ pci_bus_write_config_dword(pdev->bus->parent, 0, 0x828, 0x1);
++ pci_bus_write_config_dword(pdev->bus->parent, 0, 0x82C, 0xFFFFFFFE);
+
+ return 0;
++
++out:
++ return ret;
+}
+
- static struct msi_chip dw_pcie_msi_chip = {
- .setup_irq = dw_msi_setup_irq,
- .teardown_irq = dw_msi_teardown_irq,
-+ .check_device = dw_msi_check_device,
- };
-
- int dw_pcie_link_up(struct pcie_port *pp)
-@@ -531,38 +515,6 @@
- dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
- }
-
--static void dw_pcie_prog_viewport_mem_outbound(struct pcie_port *pp)
--{
-- /* Program viewport 0 : OUTBOUND : MEM */
-- dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX0,
-- PCIE_ATU_VIEWPORT);
-- dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_MEM, PCIE_ATU_CR1);
-- dw_pcie_writel_rc(pp, pp->mem_base, PCIE_ATU_LOWER_BASE);
-- dw_pcie_writel_rc(pp, (pp->mem_base >> 32), PCIE_ATU_UPPER_BASE);
-- dw_pcie_writel_rc(pp, pp->mem_base + pp->config.mem_size - 1,
-- PCIE_ATU_LIMIT);
-- dw_pcie_writel_rc(pp, pp->config.mem_bus_addr, PCIE_ATU_LOWER_TARGET);
-- dw_pcie_writel_rc(pp, upper_32_bits(pp->config.mem_bus_addr),
-- PCIE_ATU_UPPER_TARGET);
-- dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
--}
--
--static void dw_pcie_prog_viewport_io_outbound(struct pcie_port *pp)
--{
-- /* Program viewport 1 : OUTBOUND : IO */
-- dw_pcie_writel_rc(pp, PCIE_ATU_REGION_OUTBOUND | PCIE_ATU_REGION_INDEX1,
-- PCIE_ATU_VIEWPORT);
-- dw_pcie_writel_rc(pp, PCIE_ATU_TYPE_IO, PCIE_ATU_CR1);
-- dw_pcie_writel_rc(pp, pp->io_base, PCIE_ATU_LOWER_BASE);
-- dw_pcie_writel_rc(pp, (pp->io_base >> 32), PCIE_ATU_UPPER_BASE);
-- dw_pcie_writel_rc(pp, pp->io_base + pp->config.io_size - 1,
-- PCIE_ATU_LIMIT);
-- dw_pcie_writel_rc(pp, pp->config.io_bus_addr, PCIE_ATU_LOWER_TARGET);
-- dw_pcie_writel_rc(pp, upper_32_bits(pp->config.io_bus_addr),
-- PCIE_ATU_UPPER_TARGET);
-- dw_pcie_writel_rc(pp, PCIE_ATU_ENABLE, PCIE_ATU_CR2);
--}
--
- static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus,
- u32 devfn, int where, int size, u32 *val)
- {
-@@ -577,12 +529,10 @@
- dw_pcie_prog_viewport_cfg0(pp, busdev);
- ret = dw_pcie_cfg_read(pp->va_cfg0_base + address, where, size,
- val);
-- dw_pcie_prog_viewport_mem_outbound(pp);
- } else {
- dw_pcie_prog_viewport_cfg1(pp, busdev);
- ret = dw_pcie_cfg_read(pp->va_cfg1_base + address, where, size,
- val);
-- dw_pcie_prog_viewport_io_outbound(pp);
- }
-
- return ret;
-@@ -602,12 +552,10 @@
- dw_pcie_prog_viewport_cfg0(pp, busdev);
- ret = dw_pcie_cfg_write(pp->va_cfg0_base + address, where, size,
- val);
-- dw_pcie_prog_viewport_mem_outbound(pp);
- } else {
- dw_pcie_prog_viewport_cfg1(pp, busdev);
- ret = dw_pcie_cfg_write(pp->va_cfg1_base + address, where, size,
- val);
-- dw_pcie_prog_viewport_io_outbound(pp);
- }
-
- return ret;
-@@ -739,7 +687,13 @@
- {
- struct pcie_port *pp = sys_to_pcie(dev->bus->sysdata);
-
-- return pp->irq;
-+ switch (pin) {
-+ case 1: return pp->irq;
-+ case 2: return pp->irq - 1;
-+ case 3: return pp->irq - 2;
-+ case 4: return pp->irq - 3;
-+ default: return -1;
-+ }
- }
-
- static void dw_pcie_add_bus(struct pci_bus *bus)
-diff -Nur linux-3.14.54.orig/drivers/pci/host/pcie-designware.h linux-3.14.54/drivers/pci/host/pcie-designware.h
---- linux-3.14.54.orig/drivers/pci/host/pcie-designware.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/pci/host/pcie-designware.h 2015-10-12 10:56:18.158351153 +0200
-@@ -14,6 +14,48 @@
- #ifndef _PCIE_DESIGNWARE_H
- #define _PCIE_DESIGNWARE_H
-
-+/* Synopsis specific PCIE configuration registers */
-+#define PCIE_PORT_LINK_CONTROL 0x710
-+#define PORT_LINK_MODE_MASK (0x3f << 16)
-+#define PORT_LINK_MODE_1_LANES (0x1 << 16)
-+#define PORT_LINK_MODE_2_LANES (0x3 << 16)
-+#define PORT_LINK_MODE_4_LANES (0x7 << 16)
++static void imx_pcie_ep_remove(struct pci_dev *pdev)
++{
++ struct imx_pcie_ep_priv *priv = pci_get_drvdata(pdev);
+
-+#define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C
-+#define PORT_LOGIC_SPEED_CHANGE (0x1 << 17)
-+#define PORT_LOGIC_LINK_WIDTH_MASK (0x1ff << 8)
-+#define PORT_LOGIC_LINK_WIDTH_1_LANES (0x1 << 8)
-+#define PORT_LOGIC_LINK_WIDTH_2_LANES (0x2 << 8)
-+#define PORT_LOGIC_LINK_WIDTH_4_LANES (0x4 << 8)
++ if (!priv)
++ return;
++ pr_info("***imx pcie ep driver unload***\n");
++}
+
-+#define PCIE_MSI_ADDR_LO 0x820
-+#define PCIE_MSI_ADDR_HI 0x824
-+#define PCIE_MSI_INTR0_ENABLE 0x828
-+#define PCIE_MSI_INTR0_MASK 0x82C
-+#define PCIE_MSI_INTR0_STATUS 0x830
++static struct pci_device_id imx_pcie_ep_ids[] = {
++ {
++ .class = PCI_CLASS_MEMORY_RAM << 8,
++ .class_mask = ~0,
++ .vendor = 0xbeaf,
++ .device = 0xdead,
++ .subvendor = PCI_ANY_ID,
++ .subdevice = PCI_ANY_ID,
++ },
++ { } /* terminate list */
++};
++MODULE_DEVICE_TABLE(pci, imx_pcie_ep_ids);
+
-+#define PCIE_ATU_VIEWPORT 0x900
-+#define PCIE_ATU_REGION_INBOUND (0x1 << 31)
-+#define PCIE_ATU_REGION_OUTBOUND (0x0 << 31)
-+#define PCIE_ATU_REGION_INDEX1 (0x1 << 0)
-+#define PCIE_ATU_REGION_INDEX0 (0x0 << 0)
-+#define PCIE_ATU_CR1 0x904
-+#define PCIE_ATU_TYPE_MEM (0x0 << 0)
-+#define PCIE_ATU_TYPE_IO (0x2 << 0)
-+#define PCIE_ATU_TYPE_CFG0 (0x4 << 0)
-+#define PCIE_ATU_TYPE_CFG1 (0x5 << 0)
-+#define PCIE_ATU_CR2 0x908
-+#define PCIE_ATU_ENABLE (0x1 << 31)
-+#define PCIE_ATU_BAR_MODE_ENABLE (0x1 << 30)
-+#define PCIE_ATU_LOWER_BASE 0x90C
-+#define PCIE_ATU_UPPER_BASE 0x910
-+#define PCIE_ATU_LIMIT 0x914
-+#define PCIE_ATU_LOWER_TARGET 0x918
-+#define PCIE_ATU_BUS(x) (((x) & 0xff) << 24)
-+#define PCIE_ATU_DEV(x) (((x) & 0x1f) << 19)
-+#define PCIE_ATU_FUNC(x) (((x) & 0x7) << 16)
-+#define PCIE_ATU_UPPER_TARGET 0x91C
++static struct pci_driver imx_pcie_ep_driver = {
++ .name = DRV_NAME,
++ .id_table = imx_pcie_ep_ids,
++ .probe = imx_pcie_ep_probe,
++ .remove = imx_pcie_ep_remove,
++};
+
- struct pcie_port_info {
- u32 cfg0_size;
- u32 cfg1_size;
-@@ -49,6 +91,11 @@
- int irq;
- u32 lanes;
- struct pcie_host_ops *ops;
-+ u32 quirks; /* Deviations from spec. */
-+/* Controller doesn't support MSI VEC */
-+#define DW_PCIE_QUIRK_NO_MSI_VEC (1<<0)
-+/* MSI EN of Controller should be configured when MSI is enabled */
-+#define DW_PCIE_QUIRK_MSI_SELF_EN (1<<1)
- int msi_irq;
- struct irq_domain *irq_domain;
- unsigned long msi_data;
++static int __init imx_pcie_ep_init(void)
++{
++ int ret;
++ pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
++
++ ret = pci_register_driver(&imx_pcie_ep_driver);
++ if (ret)
++ pr_err("Unable to initialize PCI module\n");
++
++ return ret;
++}
++
++static void __exit imx_pcie_ep_exit(void)
++{
++ pci_unregister_driver(&imx_pcie_ep_driver);
++}
++
++module_exit(imx_pcie_ep_exit);
++module_init(imx_pcie_ep_init);
++
++MODULE_DESCRIPTION(DRV_DESCRIPTION);
++MODULE_VERSION(DRV_VERSION);
++MODULE_LICENSE("GPL");
++MODULE_ALIAS("imx_pcie_ep");
diff -Nur linux-3.14.54.orig/drivers/pinctrl/devicetree.c linux-3.14.54/drivers/pinctrl/devicetree.c
--- linux-3.14.54.orig/drivers/pinctrl/devicetree.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/pinctrl/devicetree.c 2015-10-12 10:56:18.159351153 +0200
++++ linux-3.14.54/drivers/pinctrl/devicetree.c 2015-10-15 15:51:25.520637666 +0200
@@ -18,6 +18,7 @@
#include <linux/device.h>
@@ -307508,9 +307490,23 @@ diff -Nur linux-3.14.54.orig/drivers/pinctrl/devicetree.c linux-3.14.54/drivers/
/* We may store pointers to property names within the node */
of_node_get(np);
+diff -Nur linux-3.14.54.orig/drivers/pinctrl/pinctrl-imx6sl.c linux-3.14.54/drivers/pinctrl/pinctrl-imx6sl.c
+--- linux-3.14.54.orig/drivers/pinctrl/pinctrl-imx6sl.c 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/pinctrl/pinctrl-imx6sl.c 2015-10-15 15:51:25.520637666 +0200
+@@ -384,6 +384,10 @@
+ },
+ .probe = imx6sl_pinctrl_probe,
+ .remove = imx_pinctrl_remove,
++#ifdef CONFIG_PM
++ .suspend = imx_pinctrl_suspend,
++ .resume = imx_pinctrl_resume,
++#endif
+ };
+
+ static int __init imx6sl_pinctrl_init(void)
diff -Nur linux-3.14.54.orig/drivers/pinctrl/pinctrl-imx.c linux-3.14.54/drivers/pinctrl/pinctrl-imx.c
--- linux-3.14.54.orig/drivers/pinctrl/pinctrl-imx.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/pinctrl/pinctrl-imx.c 2015-10-12 10:56:18.160351153 +0200
++++ linux-3.14.54/drivers/pinctrl/pinctrl-imx.c 2015-10-15 15:51:25.520637666 +0200
@@ -1,7 +1,7 @@
/*
* Core driver for the imx pin controller
@@ -307548,7 +307544,7 @@ diff -Nur linux-3.14.54.orig/drivers/pinctrl/pinctrl-imx.c linux-3.14.54/drivers
+#endif
diff -Nur linux-3.14.54.orig/drivers/pinctrl/pinctrl-imx.h linux-3.14.54/drivers/pinctrl/pinctrl-imx.h
--- linux-3.14.54.orig/drivers/pinctrl/pinctrl-imx.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/pinctrl/pinctrl-imx.h 2015-10-12 10:56:18.160351153 +0200
++++ linux-3.14.54/drivers/pinctrl/pinctrl-imx.h 2015-10-15 15:51:25.520637666 +0200
@@ -1,7 +1,7 @@
/*
* IMX pinmux core definitions
@@ -307567,47 +307563,9 @@ diff -Nur linux-3.14.54.orig/drivers/pinctrl/pinctrl-imx.h linux-3.14.54/drivers
+int imx_pinctrl_resume(struct platform_device *pdev);
+#endif
#endif /* __DRIVERS_PINCTRL_IMX_H */
-diff -Nur linux-3.14.54.orig/drivers/pinctrl/pinctrl-imx6sl.c linux-3.14.54/drivers/pinctrl/pinctrl-imx6sl.c
---- linux-3.14.54.orig/drivers/pinctrl/pinctrl-imx6sl.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/pinctrl/pinctrl-imx6sl.c 2015-10-12 10:56:18.160351153 +0200
-@@ -384,6 +384,10 @@
- },
- .probe = imx6sl_pinctrl_probe,
- .remove = imx_pinctrl_remove,
-+#ifdef CONFIG_PM
-+ .suspend = imx_pinctrl_suspend,
-+ .resume = imx_pinctrl_resume,
-+#endif
- };
-
- static int __init imx6sl_pinctrl_init(void)
-diff -Nur linux-3.14.54.orig/drivers/power/Kconfig linux-3.14.54/drivers/power/Kconfig
---- linux-3.14.54.orig/drivers/power/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/power/Kconfig 2015-10-12 10:56:18.161351153 +0200
-@@ -389,6 +389,12 @@
- Say Y to enable support for the battery and AC power in the
- Goldfish emulator.
-
-+config IMX6_USB_CHARGER
-+ bool "Freescale imx6 USB Charger"
-+ depends on SOC_IMX6Q || SOC_IMX6SL
-+ help
-+ Say Y to enable Freescale imx6 USB Charger Detect.
-+
- source "drivers/power/reset/Kconfig"
-
- endif # POWER_SUPPLY
-diff -Nur linux-3.14.54.orig/drivers/power/Makefile linux-3.14.54/drivers/power/Makefile
---- linux-3.14.54.orig/drivers/power/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/power/Makefile 2015-10-12 10:56:18.161351153 +0200
-@@ -58,3 +58,4 @@
- obj-$(CONFIG_CHARGER_SMB347) += smb347-charger.o
- obj-$(CONFIG_CHARGER_TPS65090) += tps65090-charger.o
- obj-$(CONFIG_POWER_RESET) += reset/
-+obj-$(CONFIG_IMX6_USB_CHARGER) += imx6_usb_charger.o
diff -Nur linux-3.14.54.orig/drivers/power/imx6_usb_charger.c linux-3.14.54/drivers/power/imx6_usb_charger.c
--- linux-3.14.54.orig/drivers/power/imx6_usb_charger.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/power/imx6_usb_charger.c 2015-10-12 10:56:18.161351153 +0200
++++ linux-3.14.54/drivers/power/imx6_usb_charger.c 2015-10-15 15:51:25.520637666 +0200
@@ -0,0 +1,294 @@
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -307903,9 +307861,33 @@ diff -Nur linux-3.14.54.orig/drivers/power/imx6_usb_charger.c linux-3.14.54/driv
+ power_supply_unregister(&charger->psy);
+}
+EXPORT_SYMBOL(imx6_usb_remove_charger);
+diff -Nur linux-3.14.54.orig/drivers/power/Kconfig linux-3.14.54/drivers/power/Kconfig
+--- linux-3.14.54.orig/drivers/power/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/power/Kconfig 2015-10-15 15:51:25.520637666 +0200
+@@ -389,6 +389,12 @@
+ Say Y to enable support for the battery and AC power in the
+ Goldfish emulator.
+
++config IMX6_USB_CHARGER
++ bool "Freescale imx6 USB Charger"
++ depends on SOC_IMX6Q || SOC_IMX6SL
++ help
++ Say Y to enable Freescale imx6 USB Charger Detect.
++
+ source "drivers/power/reset/Kconfig"
+
+ endif # POWER_SUPPLY
+diff -Nur linux-3.14.54.orig/drivers/power/Makefile linux-3.14.54/drivers/power/Makefile
+--- linux-3.14.54.orig/drivers/power/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/power/Makefile 2015-10-15 15:51:25.520637666 +0200
+@@ -58,3 +58,4 @@
+ obj-$(CONFIG_CHARGER_SMB347) += smb347-charger.o
+ obj-$(CONFIG_CHARGER_TPS65090) += tps65090-charger.o
+ obj-$(CONFIG_POWER_RESET) += reset/
++obj-$(CONFIG_IMX6_USB_CHARGER) += imx6_usb_charger.o
diff -Nur linux-3.14.54.orig/drivers/ptp/ptp_chardev.c linux-3.14.54/drivers/ptp/ptp_chardev.c
--- linux-3.14.54.orig/drivers/ptp/ptp_chardev.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ptp/ptp_chardev.c 2015-10-12 10:56:18.161351153 +0200
++++ linux-3.14.54/drivers/ptp/ptp_chardev.c 2015-10-15 15:51:25.520637666 +0200
@@ -25,6 +25,96 @@
#include "ptp_private.h"
@@ -308069,7 +308051,7 @@ diff -Nur linux-3.14.54.orig/drivers/ptp/ptp_chardev.c linux-3.14.54/drivers/ptp
break;
diff -Nur linux-3.14.54.orig/drivers/ptp/ptp_clock.c linux-3.14.54/drivers/ptp/ptp_clock.c
--- linux-3.14.54.orig/drivers/ptp/ptp_clock.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ptp/ptp_clock.c 2015-10-12 10:56:18.162351153 +0200
++++ linux-3.14.54/drivers/ptp/ptp_clock.c 2015-10-15 15:51:25.520637666 +0200
@@ -169,6 +169,7 @@
struct ptp_clock *ptp = container_of(pc, struct ptp_clock, clock);
@@ -308123,7 +308105,7 @@ diff -Nur linux-3.14.54.orig/drivers/ptp/ptp_clock.c linux-3.14.54/drivers/ptp/p
static void __exit ptp_exit(void)
diff -Nur linux-3.14.54.orig/drivers/ptp/ptp_ixp46x.c linux-3.14.54/drivers/ptp/ptp_ixp46x.c
--- linux-3.14.54.orig/drivers/ptp/ptp_ixp46x.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ptp/ptp_ixp46x.c 2015-10-12 10:56:18.162351153 +0200
++++ linux-3.14.54/drivers/ptp/ptp_ixp46x.c 2015-10-15 15:51:25.520637666 +0200
@@ -244,6 +244,7 @@
.name = "IXP46X timer",
.max_adj = 66666655,
@@ -308134,7 +308116,7 @@ diff -Nur linux-3.14.54.orig/drivers/ptp/ptp_ixp46x.c linux-3.14.54/drivers/ptp/
.adjtime = ptp_ixp_adjtime,
diff -Nur linux-3.14.54.orig/drivers/ptp/ptp_pch.c linux-3.14.54/drivers/ptp/ptp_pch.c
--- linux-3.14.54.orig/drivers/ptp/ptp_pch.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ptp/ptp_pch.c 2015-10-12 10:56:18.163351153 +0200
++++ linux-3.14.54/drivers/ptp/ptp_pch.c 2015-10-15 15:51:25.520637666 +0200
@@ -514,6 +514,7 @@
.name = "PCH timer",
.max_adj = 50000000,
@@ -308145,7 +308127,7 @@ diff -Nur linux-3.14.54.orig/drivers/ptp/ptp_pch.c linux-3.14.54/drivers/ptp/ptp
.adjtime = ptp_pch_adjtime,
diff -Nur linux-3.14.54.orig/drivers/ptp/ptp_private.h linux-3.14.54/drivers/ptp/ptp_private.h
--- linux-3.14.54.orig/drivers/ptp/ptp_private.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/ptp/ptp_private.h 2015-10-12 10:56:18.163351153 +0200
++++ linux-3.14.54/drivers/ptp/ptp_private.h 2015-10-15 15:51:25.520637666 +0200
@@ -48,6 +48,7 @@
long dialed_frequency; /* remembers the frequency adjustment */
struct timestamp_event_queue tsevq; /* simple fifo for time stamps */
@@ -308167,7 +308149,7 @@ diff -Nur linux-3.14.54.orig/drivers/ptp/ptp_private.h linux-3.14.54/drivers/ptp
diff -Nur linux-3.14.54.orig/drivers/pwm/pwm-imx.c linux-3.14.54/drivers/pwm/pwm-imx.c
--- linux-3.14.54.orig/drivers/pwm/pwm-imx.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/pwm/pwm-imx.c 2015-10-12 10:56:18.163351153 +0200
++++ linux-3.14.54/drivers/pwm/pwm-imx.c 2015-10-15 15:51:25.520637666 +0200
@@ -1,4 +1,5 @@
/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
@@ -308211,7 +308193,7 @@ diff -Nur linux-3.14.54.orig/drivers/pwm/pwm-imx.c linux-3.14.54/drivers/pwm/pwm
.remove = imx_pwm_remove,
diff -Nur linux-3.14.54.orig/drivers/regulator/anatop-regulator.c linux-3.14.54/drivers/regulator/anatop-regulator.c
--- linux-3.14.54.orig/drivers/regulator/anatop-regulator.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/regulator/anatop-regulator.c 2015-10-12 10:56:18.164351152 +0200
++++ linux-3.14.54/drivers/regulator/anatop-regulator.c 2015-10-15 15:51:25.520637666 +0200
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -308339,7 +308321,7 @@ diff -Nur linux-3.14.54.orig/drivers/regulator/anatop-regulator.c linux-3.14.54/
rdev = devm_regulator_register(dev, rdesc, &config);
diff -Nur linux-3.14.54.orig/drivers/regulator/core.c linux-3.14.54/drivers/regulator/core.c
--- linux-3.14.54.orig/drivers/regulator/core.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/regulator/core.c 2015-10-12 10:56:18.165351152 +0200
++++ linux-3.14.54/drivers/regulator/core.c 2015-10-15 15:51:25.520637666 +0200
@@ -3,6 +3,7 @@
*
* Copyright 2007, 2008 Wolfson Microelectronics PLC.
@@ -308460,7 +308442,7 @@ diff -Nur linux-3.14.54.orig/drivers/regulator/core.c linux-3.14.54/drivers/regu
rdev_err(rdev, "Failed to request enable GPIO%d: %d\n",
diff -Nur linux-3.14.54.orig/drivers/regulator/dummy.c linux-3.14.54/drivers/regulator/dummy.c
--- linux-3.14.54.orig/drivers/regulator/dummy.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/regulator/dummy.c 2015-10-12 10:56:18.165351152 +0200
++++ linux-3.14.54/drivers/regulator/dummy.c 2015-10-15 15:51:25.520637666 +0200
@@ -44,6 +44,7 @@
config.dev = &pdev->dev;
@@ -308471,7 +308453,7 @@ diff -Nur linux-3.14.54.orig/drivers/regulator/dummy.c linux-3.14.54/drivers/reg
if (IS_ERR(dummy_regulator_rdev)) {
diff -Nur linux-3.14.54.orig/drivers/regulator/fixed.c linux-3.14.54/drivers/regulator/fixed.c
--- linux-3.14.54.orig/drivers/regulator/fixed.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/regulator/fixed.c 2015-10-12 10:56:18.165351152 +0200
++++ linux-3.14.54/drivers/regulator/fixed.c 2015-10-15 15:51:25.520637666 +0200
@@ -163,9 +163,7 @@
drvdata->desc.n_voltages = 1;
@@ -308483,35 +308465,9 @@ diff -Nur linux-3.14.54.orig/drivers/regulator/fixed.c linux-3.14.54/drivers/reg
cfg.ena_gpio_invert = !config->enable_high;
if (config->enabled_at_boot) {
if (config->enable_high)
-diff -Nur linux-3.14.54.orig/drivers/reset/Kconfig linux-3.14.54/drivers/reset/Kconfig
---- linux-3.14.54.orig/drivers/reset/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/reset/Kconfig 2015-10-12 10:56:18.166351152 +0200
-@@ -11,3 +11,15 @@
- via GPIOs or SoC-internal reset controller modules.
-
- If unsure, say no.
-+
-+if RESET_CONTROLLER
-+
-+config RESET_GPIO
-+ tristate "GPIO reset controller support"
-+ default y
-+ depends on GPIOLIB && OF
-+ help
-+ This driver provides support for reset lines that are controlled
-+ directly by GPIOs.
-+
-+endif
-diff -Nur linux-3.14.54.orig/drivers/reset/Makefile linux-3.14.54/drivers/reset/Makefile
---- linux-3.14.54.orig/drivers/reset/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/reset/Makefile 2015-10-12 10:56:18.166351152 +0200
-@@ -1,2 +1,3 @@
- obj-$(CONFIG_RESET_CONTROLLER) += core.o
-+obj-$(CONFIG_RESET_GPIO) += gpio-reset.o
- obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
diff -Nur linux-3.14.54.orig/drivers/reset/gpio-reset.c linux-3.14.54/drivers/reset/gpio-reset.c
--- linux-3.14.54.orig/drivers/reset/gpio-reset.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/reset/gpio-reset.c 2015-10-12 10:56:18.166351152 +0200
++++ linux-3.14.54/drivers/reset/gpio-reset.c 2015-10-15 15:51:25.520637666 +0200
@@ -0,0 +1,187 @@
+/*
+ * GPIO Reset Controller driver
@@ -308700,9 +308656,35 @@ diff -Nur linux-3.14.54.orig/drivers/reset/gpio-reset.c linux-3.14.54/drivers/re
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:gpio-reset");
+MODULE_DEVICE_TABLE(of, gpio_reset_dt_ids);
+diff -Nur linux-3.14.54.orig/drivers/reset/Kconfig linux-3.14.54/drivers/reset/Kconfig
+--- linux-3.14.54.orig/drivers/reset/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/reset/Kconfig 2015-10-15 15:51:25.520637666 +0200
+@@ -11,3 +11,15 @@
+ via GPIOs or SoC-internal reset controller modules.
+
+ If unsure, say no.
++
++if RESET_CONTROLLER
++
++config RESET_GPIO
++ tristate "GPIO reset controller support"
++ default y
++ depends on GPIOLIB && OF
++ help
++ This driver provides support for reset lines that are controlled
++ directly by GPIOs.
++
++endif
+diff -Nur linux-3.14.54.orig/drivers/reset/Makefile linux-3.14.54/drivers/reset/Makefile
+--- linux-3.14.54.orig/drivers/reset/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/reset/Makefile 2015-10-15 15:51:25.524637402 +0200
+@@ -1,2 +1,3 @@
+ obj-$(CONFIG_RESET_CONTROLLER) += core.o
++obj-$(CONFIG_RESET_GPIO) += gpio-reset.o
+ obj-$(CONFIG_ARCH_SUNXI) += reset-sunxi.o
diff -Nur linux-3.14.54.orig/drivers/rtc/rtc-pcf8523.c linux-3.14.54/drivers/rtc/rtc-pcf8523.c
--- linux-3.14.54.orig/drivers/rtc/rtc-pcf8523.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/rtc/rtc-pcf8523.c 2015-10-12 10:56:18.166351152 +0200
++++ linux-3.14.54/drivers/rtc/rtc-pcf8523.c 2015-10-15 15:51:25.524637402 +0200
@@ -7,6 +7,7 @@
*/
@@ -308836,7 +308818,7 @@ diff -Nur linux-3.14.54.orig/drivers/rtc/rtc-pcf8523.c linux-3.14.54/drivers/rtc
return err;
diff -Nur linux-3.14.54.orig/drivers/rtc/rtc-snvs.c linux-3.14.54/drivers/rtc/rtc-snvs.c
--- linux-3.14.54.orig/drivers/rtc/rtc-snvs.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/rtc/rtc-snvs.c 2015-10-12 10:56:18.167351152 +0200
++++ linux-3.14.54/drivers/rtc/rtc-snvs.c 2015-10-15 15:51:25.524637402 +0200
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2011-2012 Freescale Semiconductor, Inc.
@@ -308901,7 +308883,7 @@ diff -Nur linux-3.14.54.orig/drivers/rtc/rtc-snvs.c linux-3.14.54/drivers/rtc/rt
}
diff -Nur linux-3.14.54.orig/drivers/scsi/scsi_transport_iscsi.c linux-3.14.54/drivers/scsi/scsi_transport_iscsi.c
--- linux-3.14.54.orig/drivers/scsi/scsi_transport_iscsi.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/scsi/scsi_transport_iscsi.c 2015-10-12 10:56:18.167351152 +0200
++++ linux-3.14.54/drivers/scsi/scsi_transport_iscsi.c 2015-10-15 15:51:25.524637402 +0200
@@ -1225,7 +1225,7 @@
* Adds a sysfs entry for the flashnode session attributes
*
@@ -308931,7 +308913,7 @@ diff -Nur linux-3.14.54.orig/drivers/scsi/scsi_transport_iscsi.c linux-3.14.54/d
* Destroys all the flashnode session entries and all corresponding children
diff -Nur linux-3.14.54.orig/drivers/staging/bcm/Typedefs.h linux-3.14.54/drivers/staging/bcm/Typedefs.h
--- linux-3.14.54.orig/drivers/staging/bcm/Typedefs.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/staging/bcm/Typedefs.h 2015-10-12 10:56:18.168351152 +0200
++++ linux-3.14.54/drivers/staging/bcm/Typedefs.h 2015-10-15 15:51:25.524637402 +0200
@@ -25,16 +25,16 @@
typedef unsigned long ULONG;
typedef unsigned long DWORD;
@@ -308960,7 +308942,7 @@ diff -Nur linux-3.14.54.orig/drivers/staging/bcm/Typedefs.h linux-3.14.54/driver
typedef unsigned int UINT32;
diff -Nur linux-3.14.54.orig/drivers/staging/media/lirc/Kconfig linux-3.14.54/drivers/staging/media/lirc/Kconfig
--- linux-3.14.54.orig/drivers/staging/media/lirc/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/staging/media/lirc/Kconfig 2015-10-12 10:56:18.168351152 +0200
++++ linux-3.14.54/drivers/staging/media/lirc/Kconfig 2015-10-15 15:51:25.524637402 +0200
@@ -38,6 +38,12 @@
help
Driver for Homebrew Parallel Port Receivers
@@ -308976,7 +308958,7 @@ diff -Nur linux-3.14.54.orig/drivers/staging/media/lirc/Kconfig linux-3.14.54/dr
depends on LIRC && USB
diff -Nur linux-3.14.54.orig/drivers/staging/media/lirc/lirc_gpio.c linux-3.14.54/drivers/staging/media/lirc/lirc_gpio.c
--- linux-3.14.54.orig/drivers/staging/media/lirc/lirc_gpio.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/staging/media/lirc/lirc_gpio.c 2015-10-12 10:56:18.168351152 +0200
++++ linux-3.14.54/drivers/staging/media/lirc/lirc_gpio.c 2015-10-15 15:51:25.524637402 +0200
@@ -0,0 +1,782 @@
+/*
+ * lirc_gpio.c
@@ -309762,7 +309744,7 @@ diff -Nur linux-3.14.54.orig/drivers/staging/media/lirc/lirc_gpio.c linux-3.14.5
+
diff -Nur linux-3.14.54.orig/drivers/staging/octeon/ethernet-rgmii.c linux-3.14.54/drivers/staging/octeon/ethernet-rgmii.c
--- linux-3.14.54.orig/drivers/staging/octeon/ethernet-rgmii.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/staging/octeon/ethernet-rgmii.c 2015-10-12 10:56:18.168351152 +0200
++++ linux-3.14.54/drivers/staging/octeon/ethernet-rgmii.c 2015-10-15 15:51:25.524637402 +0200
@@ -166,9 +166,8 @@
if (use_global_register_lock)
@@ -309776,7 +309758,7 @@ diff -Nur linux-3.14.54.orig/drivers/staging/octeon/ethernet-rgmii.c linux-3.14.
/* Tell core. */
diff -Nur linux-3.14.54.orig/drivers/staging/rtl8821ae/core.c linux-3.14.54/drivers/staging/rtl8821ae/core.c
--- linux-3.14.54.orig/drivers/staging/rtl8821ae/core.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/staging/rtl8821ae/core.c 2015-10-12 10:56:18.169351152 +0200
++++ linux-3.14.54/drivers/staging/rtl8821ae/core.c 2015-10-15 15:51:25.524637402 +0200
@@ -1414,23 +1414,15 @@
* before switch channle or power save, or tx buffer packet
* maybe send after offchannel or rf sleep, this may cause
@@ -309804,37 +309786,9 @@ diff -Nur linux-3.14.54.orig/drivers/staging/rtl8821ae/core.c linux-3.14.54/driv
const struct ieee80211_ops rtl_ops = {
.start = rtl_op_start,
-diff -Nur linux-3.14.54.orig/drivers/thermal/Kconfig linux-3.14.54/drivers/thermal/Kconfig
---- linux-3.14.54.orig/drivers/thermal/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/thermal/Kconfig 2015-10-12 10:56:18.170351152 +0200
-@@ -125,6 +125,13 @@
- cpufreq is used as the cooling device to throttle CPUs when the
- passive trip is crossed.
-
-+config DEVICE_THERMAL
-+ tristate "generic device cooling support"
-+ help
-+ Support for device cooling.
-+ It supports notification of crossing passive trip for devices,
-+ devices need to do their own actions to cool down the SOC.
-+
- config SPEAR_THERMAL
- bool "SPEAr thermal sensor driver"
- depends on PLAT_SPEAR
-diff -Nur linux-3.14.54.orig/drivers/thermal/Makefile linux-3.14.54/drivers/thermal/Makefile
---- linux-3.14.54.orig/drivers/thermal/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/thermal/Makefile 2015-10-12 10:56:18.171351152 +0200
-@@ -26,6 +26,7 @@
- obj-$(CONFIG_DB8500_THERMAL) += db8500_thermal.o
- obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o
- obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
-+obj-$(CONFIG_DEVICE_THERMAL) += device_cooling.o
- obj-$(CONFIG_DB8500_CPUFREQ_COOLING) += db8500_cpufreq_cooling.o
- obj-$(CONFIG_INTEL_POWERCLAMP) += intel_powerclamp.o
- obj-$(CONFIG_X86_PKG_TEMP_THERMAL) += x86_pkg_temp_thermal.o
diff -Nur linux-3.14.54.orig/drivers/thermal/device_cooling.c linux-3.14.54/drivers/thermal/device_cooling.c
--- linux-3.14.54.orig/drivers/thermal/device_cooling.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/thermal/device_cooling.c 2015-10-12 10:56:18.170351152 +0200
++++ linux-3.14.54/drivers/thermal/device_cooling.c 2015-10-15 15:51:25.524637402 +0200
@@ -0,0 +1,157 @@
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
@@ -309995,7 +309949,7 @@ diff -Nur linux-3.14.54.orig/drivers/thermal/device_cooling.c linux-3.14.54/driv
+EXPORT_SYMBOL_GPL(devfreq_cooling_unregister);
diff -Nur linux-3.14.54.orig/drivers/thermal/fair_share.c linux-3.14.54/drivers/thermal/fair_share.c
--- linux-3.14.54.orig/drivers/thermal/fair_share.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/thermal/fair_share.c 2015-10-12 10:56:18.170351152 +0200
++++ linux-3.14.54/drivers/thermal/fair_share.c 2015-10-15 15:51:25.524637402 +0200
@@ -23,6 +23,7 @@
*/
@@ -310031,7 +309985,7 @@ diff -Nur linux-3.14.54.orig/drivers/thermal/fair_share.c linux-3.14.54/drivers/
diff -Nur linux-3.14.54.orig/drivers/thermal/imx_thermal.c linux-3.14.54/drivers/thermal/imx_thermal.c
--- linux-3.14.54.orig/drivers/thermal/imx_thermal.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/thermal/imx_thermal.c 2015-10-12 10:56:18.170351152 +0200
++++ linux-3.14.54/drivers/thermal/imx_thermal.c 2015-10-15 15:51:25.524637402 +0200
@@ -12,6 +12,8 @@
#include <linux/cpufreq.h>
#include <linux/delay.h>
@@ -310458,9 +310412,37 @@ diff -Nur linux-3.14.54.orig/drivers/thermal/imx_thermal.c linux-3.14.54/drivers
return 0;
}
+diff -Nur linux-3.14.54.orig/drivers/thermal/Kconfig linux-3.14.54/drivers/thermal/Kconfig
+--- linux-3.14.54.orig/drivers/thermal/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/thermal/Kconfig 2015-10-15 15:51:25.524637402 +0200
+@@ -125,6 +125,13 @@
+ cpufreq is used as the cooling device to throttle CPUs when the
+ passive trip is crossed.
+
++config DEVICE_THERMAL
++ tristate "generic device cooling support"
++ help
++ Support for device cooling.
++ It supports notification of crossing passive trip for devices,
++ devices need to do their own actions to cool down the SOC.
++
+ config SPEAR_THERMAL
+ bool "SPEAr thermal sensor driver"
+ depends on PLAT_SPEAR
+diff -Nur linux-3.14.54.orig/drivers/thermal/Makefile linux-3.14.54/drivers/thermal/Makefile
+--- linux-3.14.54.orig/drivers/thermal/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/thermal/Makefile 2015-10-15 15:51:25.524637402 +0200
+@@ -26,6 +26,7 @@
+ obj-$(CONFIG_DB8500_THERMAL) += db8500_thermal.o
+ obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o
+ obj-$(CONFIG_IMX_THERMAL) += imx_thermal.o
++obj-$(CONFIG_DEVICE_THERMAL) += device_cooling.o
+ obj-$(CONFIG_DB8500_CPUFREQ_COOLING) += db8500_cpufreq_cooling.o
+ obj-$(CONFIG_INTEL_POWERCLAMP) += intel_powerclamp.o
+ obj-$(CONFIG_X86_PKG_TEMP_THERMAL) += x86_pkg_temp_thermal.o
diff -Nur linux-3.14.54.orig/drivers/thermal/of-thermal.c linux-3.14.54/drivers/thermal/of-thermal.c
--- linux-3.14.54.orig/drivers/thermal/of-thermal.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/thermal/of-thermal.c 2015-10-12 10:56:18.171351152 +0200
++++ linux-3.14.54/drivers/thermal/of-thermal.c 2015-10-15 15:51:25.524637402 +0200
@@ -156,8 +156,8 @@
ret = thermal_zone_bind_cooling_device(thermal,
@@ -310488,7 +310470,7 @@ diff -Nur linux-3.14.54.orig/drivers/thermal/of-thermal.c linux-3.14.54/drivers/
of_node_put(child);
diff -Nur linux-3.14.54.orig/drivers/thermal/step_wise.c linux-3.14.54/drivers/thermal/step_wise.c
--- linux-3.14.54.orig/drivers/thermal/step_wise.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/thermal/step_wise.c 2015-10-12 10:56:18.172351152 +0200
++++ linux-3.14.54/drivers/thermal/step_wise.c 2015-10-15 15:51:25.524637402 +0200
@@ -23,6 +23,7 @@
*/
@@ -310773,7 +310755,7 @@ diff -Nur linux-3.14.54.orig/drivers/thermal/step_wise.c.orig linux-3.14.54/driv
+}
diff -Nur linux-3.14.54.orig/drivers/thermal/thermal_core.c linux-3.14.54/drivers/thermal/thermal_core.c
--- linux-3.14.54.orig/drivers/thermal/thermal_core.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/thermal/thermal_core.c 2015-10-12 10:56:18.172351152 +0200
++++ linux-3.14.54/drivers/thermal/thermal_core.c 2015-10-15 15:51:25.528637139 +0200
@@ -38,6 +38,9 @@
#include <net/netlink.h>
#include <net/genetlink.h>
@@ -310819,38 +310801,9 @@ diff -Nur linux-3.14.54.orig/drivers/thermal/thermal_core.c linux-3.14.54/driver
unregister:
release_idr(&thermal_tz_idr, &thermal_idr_lock, tz->id);
-diff -Nur linux-3.14.54.orig/drivers/tty/serial/Kconfig linux-3.14.54/drivers/tty/serial/Kconfig
---- linux-3.14.54.orig/drivers/tty/serial/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/tty/serial/Kconfig 2015-10-12 10:56:18.172351152 +0200
-@@ -7,6 +7,13 @@
- menu "Serial drivers"
- depends on HAS_IOMEM
-
-+config SERIAL_EARLYCON
-+ bool
-+ help
-+ Support for early consoles with the earlycon parameter. This enables
-+ the console before standard serial driver is probed. The console is
-+ enabled when early_param is processed.
-+
- source "drivers/tty/serial/8250/Kconfig"
-
- comment "Non-8250 serial port support"
-diff -Nur linux-3.14.54.orig/drivers/tty/serial/Makefile linux-3.14.54/drivers/tty/serial/Makefile
---- linux-3.14.54.orig/drivers/tty/serial/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/tty/serial/Makefile 2015-10-12 10:56:18.173351152 +0200
-@@ -5,6 +5,8 @@
- obj-$(CONFIG_SERIAL_CORE) += serial_core.o
- obj-$(CONFIG_SERIAL_21285) += 21285.o
-
-+obj-$(CONFIG_SERIAL_EARLYCON) += earlycon.o
-+
- # These Sparc drivers have to appear before others such as 8250
- # which share ttySx minor node space. Otherwise console device
- # names change and other unplesantries.
diff -Nur linux-3.14.54.orig/drivers/tty/serial/earlycon.c linux-3.14.54/drivers/tty/serial/earlycon.c
--- linux-3.14.54.orig/drivers/tty/serial/earlycon.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/tty/serial/earlycon.c 2015-10-12 10:56:18.172351152 +0200
++++ linux-3.14.54/drivers/tty/serial/earlycon.c 2015-10-15 15:51:25.528637139 +0200
@@ -0,0 +1,152 @@
+/*
+ * Copyright (C) 2014 Linaro Ltd.
@@ -311004,9 +310957,38 @@ diff -Nur linux-3.14.54.orig/drivers/tty/serial/earlycon.c linux-3.14.54/drivers
+ register_console(early_console_dev.con);
+ return 0;
+}
+diff -Nur linux-3.14.54.orig/drivers/tty/serial/Kconfig linux-3.14.54/drivers/tty/serial/Kconfig
+--- linux-3.14.54.orig/drivers/tty/serial/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/tty/serial/Kconfig 2015-10-15 15:51:25.528637139 +0200
+@@ -7,6 +7,13 @@
+ menu "Serial drivers"
+ depends on HAS_IOMEM
+
++config SERIAL_EARLYCON
++ bool
++ help
++ Support for early consoles with the earlycon parameter. This enables
++ the console before standard serial driver is probed. The console is
++ enabled when early_param is processed.
++
+ source "drivers/tty/serial/8250/Kconfig"
+
+ comment "Non-8250 serial port support"
+diff -Nur linux-3.14.54.orig/drivers/tty/serial/Makefile linux-3.14.54/drivers/tty/serial/Makefile
+--- linux-3.14.54.orig/drivers/tty/serial/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/tty/serial/Makefile 2015-10-15 15:51:25.528637139 +0200
+@@ -5,6 +5,8 @@
+ obj-$(CONFIG_SERIAL_CORE) += serial_core.o
+ obj-$(CONFIG_SERIAL_21285) += 21285.o
+
++obj-$(CONFIG_SERIAL_EARLYCON) += earlycon.o
++
+ # These Sparc drivers have to appear before others such as 8250
+ # which share ttySx minor node space. Otherwise console device
+ # names change and other unplesantries.
diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/ci.h linux-3.14.54/drivers/usb/chipidea/ci.h
--- linux-3.14.54.orig/drivers/usb/chipidea/ci.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/chipidea/ci.h 2015-10-12 10:56:18.173351152 +0200
++++ linux-3.14.54/drivers/usb/chipidea/ci.h 2015-10-15 15:51:25.528637139 +0200
@@ -139,8 +139,8 @@
* @roles: array of supported roles for this controller
* @role: current role
@@ -311053,7 +311035,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/ci.h linux-3.14.54/drivers/usb
static inline struct ci_role_driver *ci_role(struct ci_hdrc *ci)
diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/ci_hdrc_imx.c linux-3.14.54/drivers/usb/chipidea/ci_hdrc_imx.c
--- linux-3.14.54.orig/drivers/usb/chipidea/ci_hdrc_imx.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/chipidea/ci_hdrc_imx.c 2015-10-12 10:56:18.174351152 +0200
++++ linux-3.14.54/drivers/usb/chipidea/ci_hdrc_imx.c 2015-10-15 15:51:25.528637139 +0200
@@ -19,11 +19,14 @@
#include <linux/dma-mapping.h>
#include <linux/usb/chipidea.h>
@@ -311313,7 +311295,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/ci_hdrc_imx.c linux-3.14.54/dr
diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/ci_hdrc_imx.h linux-3.14.54/drivers/usb/chipidea/ci_hdrc_imx.h
--- linux-3.14.54.orig/drivers/usb/chipidea/ci_hdrc_imx.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/chipidea/ci_hdrc_imx.h 2015-10-12 10:56:18.174351152 +0200
++++ linux-3.14.54/drivers/usb/chipidea/ci_hdrc_imx.h 2015-10-15 15:51:25.528637139 +0200
@@ -1,5 +1,5 @@
/*
- * Copyright 2012 Freescale Semiconductor, Inc.
@@ -311342,7 +311324,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/ci_hdrc_imx.h linux-3.14.54/dr
#endif /* __DRIVER_USB_CHIPIDEA_CI_HDRC_IMX_H */
diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/ci_hdrc_msm.c linux-3.14.54/drivers/usb/chipidea/ci_hdrc_msm.c
--- linux-3.14.54.orig/drivers/usb/chipidea/ci_hdrc_msm.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/chipidea/ci_hdrc_msm.c 2015-10-12 10:56:18.174351152 +0200
++++ linux-3.14.54/drivers/usb/chipidea/ci_hdrc_msm.c 2015-10-15 15:51:25.528637139 +0200
@@ -17,7 +17,7 @@
#define MSM_USB_BASE (ci->hw_bank.abs)
@@ -311363,7 +311345,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/ci_hdrc_msm.c linux-3.14.54/dr
static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/core.c linux-3.14.54/drivers/usb/chipidea/core.c
--- linux-3.14.54.orig/drivers/usb/chipidea/core.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/chipidea/core.c 2015-10-12 10:56:18.174351152 +0200
++++ linux-3.14.54/drivers/usb/chipidea/core.c 2015-10-15 15:51:25.528637139 +0200
@@ -165,25 +165,30 @@
return hw_read(ci, OP_PORTSC, PORTSC_PTC) >> __ffs(PORTSC_PTC);
}
@@ -311674,7 +311656,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/core.c linux-3.14.54/drivers/u
diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/host.c linux-3.14.54/drivers/usb/chipidea/host.c
--- linux-3.14.54.orig/drivers/usb/chipidea/host.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/chipidea/host.c 2015-10-12 10:56:18.175351152 +0200
++++ linux-3.14.54/drivers/usb/chipidea/host.c 2015-10-15 15:51:25.528637139 +0200
@@ -33,6 +33,176 @@
#include "host.h"
@@ -311878,7 +311860,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/host.c linux-3.14.54/drivers/u
}
diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/otg.c linux-3.14.54/drivers/usb/chipidea/otg.c
--- linux-3.14.54.orig/drivers/usb/chipidea/otg.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/chipidea/otg.c 2015-10-12 10:56:18.175351152 +0200
++++ linux-3.14.54/drivers/usb/chipidea/otg.c 2015-10-15 15:51:25.528637139 +0200
@@ -18,6 +18,8 @@
#include <linux/usb/otg.h>
#include <linux/usb/gadget.h>
@@ -311979,7 +311961,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/otg.c linux-3.14.54/drivers/us
}
diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/udc.c linux-3.14.54/drivers/usb/chipidea/udc.c
--- linux-3.14.54.orig/drivers/usb/chipidea/udc.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/chipidea/udc.c 2015-10-12 10:56:18.175351152 +0200
++++ linux-3.14.54/drivers/usb/chipidea/udc.c 2015-10-15 15:51:25.528637139 +0200
@@ -681,12 +681,6 @@
struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
unsigned long flags;
@@ -312074,7 +312056,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/udc.c linux-3.14.54/drivers/us
goto out;
diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/usbmisc_imx.c linux-3.14.54/drivers/usb/chipidea/usbmisc_imx.c
--- linux-3.14.54.orig/drivers/usb/chipidea/usbmisc_imx.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/chipidea/usbmisc_imx.c 2015-10-12 10:56:18.176351152 +0200
++++ linux-3.14.54/drivers/usb/chipidea/usbmisc_imx.c 2015-10-15 15:51:25.528637139 +0200
@@ -1,5 +1,5 @@
/*
- * Copyright 2012 Freescale Semiconductor, Inc.
@@ -312251,7 +312233,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/chipidea/usbmisc_imx.c linux-3.14.54/dr
}
diff -Nur linux-3.14.54.orig/drivers/usb/core/hub.c linux-3.14.54/drivers/usb/core/hub.c
--- linux-3.14.54.orig/drivers/usb/core/hub.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/core/hub.c 2015-10-12 10:56:18.177351152 +0200
++++ linux-3.14.54/drivers/usb/core/hub.c 2015-10-15 15:51:25.528637139 +0200
@@ -3916,6 +3916,12 @@
void usb_enable_ltm(struct usb_device *udev) { }
EXPORT_SYMBOL_GPL(usb_enable_ltm);
@@ -312277,7 +312259,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/core/hub.c linux-3.14.54/drivers/usb/co
}
diff -Nur linux-3.14.54.orig/drivers/usb/core/message.c linux-3.14.54/drivers/usb/core/message.c
--- linux-3.14.54.orig/drivers/usb/core/message.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/core/message.c 2015-10-12 10:56:18.177351152 +0200
++++ linux-3.14.54/drivers/usb/core/message.c 2015-10-15 15:51:25.532636877 +0200
@@ -178,7 +178,7 @@
*
* Return:
@@ -312289,7 +312271,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/core/message.c linux-3.14.54/drivers/us
void *data, int len, int *actual_length, int timeout)
diff -Nur linux-3.14.54.orig/drivers/usb/core/urb.c linux-3.14.54/drivers/usb/core/urb.c
--- linux-3.14.54.orig/drivers/usb/core/urb.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/core/urb.c 2015-10-12 10:56:18.178351151 +0200
++++ linux-3.14.54/drivers/usb/core/urb.c 2015-10-15 15:51:25.532636877 +0200
@@ -831,7 +831,7 @@
*
* this allows all outstanding URBs to be unlinked starting
@@ -312299,25 +312281,9 @@ diff -Nur linux-3.14.54.orig/drivers/usb/core/urb.c linux-3.14.54/drivers/usb/co
* function has returned.
*
* This routine should not be called by a driver after its disconnect
-diff -Nur linux-3.14.54.orig/drivers/usb/gadget/Kconfig linux-3.14.54/drivers/usb/gadget/Kconfig
---- linux-3.14.54.orig/drivers/usb/gadget/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/gadget/Kconfig 2015-10-12 10:56:18.179351151 +0200
-@@ -953,6 +953,12 @@
- Say "y" to link the driver statically, or "m" to build
- a dynamically linked module called "g_mass_storage".
-
-+config FSL_UTP
-+ bool "UTP over Storage Gadget"
-+ depends on USB_MASS_STORAGE
-+ help
-+ Freescale's extension to MSC protocol
-+
- config USB_GADGET_TARGET
- tristate "USB Gadget Target Fabric Module"
- depends on TARGET_CORE
diff -Nur linux-3.14.54.orig/drivers/usb/gadget/f_mass_storage.c linux-3.14.54/drivers/usb/gadget/f_mass_storage.c
--- linux-3.14.54.orig/drivers/usb/gadget/f_mass_storage.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/gadget/f_mass_storage.c 2015-10-12 10:56:18.179351151 +0200
++++ linux-3.14.54/drivers/usb/gadget/f_mass_storage.c 2015-10-15 15:51:25.532636877 +0200
@@ -336,8 +336,15 @@
struct usb_ep *bulk_in;
@@ -312441,7 +312407,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/gadget/f_mass_storage.c linux-3.14.54/d
static inline struct fsg_lun_opts *to_fsg_lun_opts(struct config_item *item)
diff -Nur linux-3.14.54.orig/drivers/usb/gadget/fsl_updater.c linux-3.14.54/drivers/usb/gadget/fsl_updater.c
--- linux-3.14.54.orig/drivers/usb/gadget/fsl_updater.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/usb/gadget/fsl_updater.c 2015-10-12 10:56:18.179351151 +0200
++++ linux-3.14.54/drivers/usb/gadget/fsl_updater.c 2015-10-15 15:51:25.532636877 +0200
@@ -0,0 +1,594 @@
+/*
+ * Freescale UUT driver
@@ -313039,7 +313005,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/gadget/fsl_updater.c linux-3.14.54/driv
+}
diff -Nur linux-3.14.54.orig/drivers/usb/gadget/fsl_updater.h linux-3.14.54/drivers/usb/gadget/fsl_updater.h
--- linux-3.14.54.orig/drivers/usb/gadget/fsl_updater.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/usb/gadget/fsl_updater.h 2015-10-12 10:56:18.179351151 +0200
++++ linux-3.14.54/drivers/usb/gadget/fsl_updater.h 2015-10-15 15:51:25.532636877 +0200
@@ -0,0 +1,150 @@
+/*
+ * Freescale UUT driver
@@ -313191,9 +313157,25 @@ diff -Nur linux-3.14.54.orig/drivers/usb/gadget/fsl_updater.h linux-3.14.54/driv
+
+#endif /* __FSL_UPDATER_H */
+
+diff -Nur linux-3.14.54.orig/drivers/usb/gadget/Kconfig linux-3.14.54/drivers/usb/gadget/Kconfig
+--- linux-3.14.54.orig/drivers/usb/gadget/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/usb/gadget/Kconfig 2015-10-15 15:51:25.532636877 +0200
+@@ -953,6 +953,12 @@
+ Say "y" to link the driver statically, or "m" to build
+ a dynamically linked module called "g_mass_storage".
+
++config FSL_UTP
++ bool "UTP over Storage Gadget"
++ depends on USB_MASS_STORAGE
++ help
++ Freescale's extension to MSC protocol
++
+ config USB_GADGET_TARGET
+ tristate "USB Gadget Target Fabric Module"
+ depends on TARGET_CORE
diff -Nur linux-3.14.54.orig/drivers/usb/gadget/mass_storage.c linux-3.14.54/drivers/usb/gadget/mass_storage.c
--- linux-3.14.54.orig/drivers/usb/gadget/mass_storage.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/gadget/mass_storage.c 2015-10-12 10:56:18.180351151 +0200
++++ linux-3.14.54/drivers/usb/gadget/mass_storage.c 2015-10-15 15:51:25.532636877 +0200
@@ -266,7 +266,7 @@
{
return usb_composite_probe(&msg_driver);
@@ -313203,38 +313185,9 @@ diff -Nur linux-3.14.54.orig/drivers/usb/gadget/mass_storage.c linux-3.14.54/dri
static void msg_cleanup(void)
{
-diff -Nur linux-3.14.54.orig/drivers/usb/host/Kconfig linux-3.14.54/drivers/usb/host/Kconfig
---- linux-3.14.54.orig/drivers/usb/host/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/host/Kconfig 2015-10-12 10:56:18.182351151 +0200
-@@ -158,6 +158,13 @@
- Enables support for the on-chip EHCI controller on
- ST SPEAr chips.
-
-+config USB_EHCI_HCD_SYNOPSYS
-+ tristate "Support for Synopsys Host-AHB USB 2.0 controller"
-+ depends on USB_EHCI_HCD && USB_PHY
-+ ---help---
-+ Enable support for onchip USB controllers based on DesignWare USB 2.0
-+ Host-AHB Controller IP from Synopsys.
-+
- config USB_EHCI_HCD_AT91
- tristate "Support for Atmel on-chip EHCI USB controller"
- depends on USB_EHCI_HCD && ARCH_AT91
-diff -Nur linux-3.14.54.orig/drivers/usb/host/Makefile linux-3.14.54/drivers/usb/host/Makefile
---- linux-3.14.54.orig/drivers/usb/host/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/host/Makefile 2015-10-12 10:56:18.182351151 +0200
-@@ -33,6 +33,8 @@
- obj-$(CONFIG_USB_EHCI_HCD_ORION) += ehci-orion.o
- obj-$(CONFIG_USB_EHCI_HCD_SPEAR) += ehci-spear.o
- obj-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o
-+obj-$(CONFIG_USB_EHCI_S5P) += ehci-s5p.o
-+obj-$(CONFIG_USB_EHCI_HCD_SYNOPSYS) += ehci-h20ahb.o
- obj-$(CONFIG_USB_EHCI_HCD_AT91) += ehci-atmel.o
- obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o
- obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
diff -Nur linux-3.14.54.orig/drivers/usb/host/ehci-h20ahb.c linux-3.14.54/drivers/usb/host/ehci-h20ahb.c
--- linux-3.14.54.orig/drivers/usb/host/ehci-h20ahb.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/usb/host/ehci-h20ahb.c 2015-10-12 10:56:18.181351151 +0200
++++ linux-3.14.54/drivers/usb/host/ehci-h20ahb.c 2015-10-15 15:51:25.532636877 +0200
@@ -0,0 +1,341 @@
+/*
+ * Copyright (C) 2007-2013 Texas Instruments, Inc.
@@ -313579,7 +313532,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/host/ehci-h20ahb.c linux-3.14.54/driver
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/usb/host/ehci-hcd.c linux-3.14.54/drivers/usb/host/ehci-hcd.c
--- linux-3.14.54.orig/drivers/usb/host/ehci-hcd.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/host/ehci-hcd.c 2015-10-12 10:56:18.181351151 +0200
++++ linux-3.14.54/drivers/usb/host/ehci-hcd.c 2015-10-15 15:51:25.532636877 +0200
@@ -590,11 +590,16 @@
*/
hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
@@ -313602,7 +313555,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/host/ehci-hcd.c linux-3.14.54/drivers/u
diff -Nur linux-3.14.54.orig/drivers/usb/host/ehci-hub.c linux-3.14.54/drivers/usb/host/ehci-hub.c
--- linux-3.14.54.orig/drivers/usb/host/ehci-hub.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/host/ehci-hub.c 2015-10-12 10:56:18.181351151 +0200
++++ linux-3.14.54/drivers/usb/host/ehci-hub.c 2015-10-15 15:51:25.532636877 +0200
@@ -313,6 +313,15 @@
USB_PORT_STAT_HIGH_SPEED)
fs_idle_delay = true;
@@ -313619,9 +313572,38 @@ diff -Nur linux-3.14.54.orig/drivers/usb/host/ehci-hub.c linux-3.14.54/drivers/u
changed = 1;
}
}
+diff -Nur linux-3.14.54.orig/drivers/usb/host/Kconfig linux-3.14.54/drivers/usb/host/Kconfig
+--- linux-3.14.54.orig/drivers/usb/host/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/usb/host/Kconfig 2015-10-15 15:51:25.532636877 +0200
+@@ -158,6 +158,13 @@
+ Enables support for the on-chip EHCI controller on
+ ST SPEAr chips.
+
++config USB_EHCI_HCD_SYNOPSYS
++ tristate "Support for Synopsys Host-AHB USB 2.0 controller"
++ depends on USB_EHCI_HCD && USB_PHY
++ ---help---
++ Enable support for onchip USB controllers based on DesignWare USB 2.0
++ Host-AHB Controller IP from Synopsys.
++
+ config USB_EHCI_HCD_AT91
+ tristate "Support for Atmel on-chip EHCI USB controller"
+ depends on USB_EHCI_HCD && ARCH_AT91
+diff -Nur linux-3.14.54.orig/drivers/usb/host/Makefile linux-3.14.54/drivers/usb/host/Makefile
+--- linux-3.14.54.orig/drivers/usb/host/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/usb/host/Makefile 2015-10-15 15:51:25.532636877 +0200
+@@ -33,6 +33,8 @@
+ obj-$(CONFIG_USB_EHCI_HCD_ORION) += ehci-orion.o
+ obj-$(CONFIG_USB_EHCI_HCD_SPEAR) += ehci-spear.o
+ obj-$(CONFIG_USB_EHCI_EXYNOS) += ehci-exynos.o
++obj-$(CONFIG_USB_EHCI_S5P) += ehci-s5p.o
++obj-$(CONFIG_USB_EHCI_HCD_SYNOPSYS) += ehci-h20ahb.o
+ obj-$(CONFIG_USB_EHCI_HCD_AT91) += ehci-atmel.o
+ obj-$(CONFIG_USB_EHCI_MSM) += ehci-msm.o
+ obj-$(CONFIG_USB_EHCI_TEGRA) += ehci-tegra.o
diff -Nur linux-3.14.54.orig/drivers/usb/phy/Kconfig linux-3.14.54/drivers/usb/phy/Kconfig
--- linux-3.14.54.orig/drivers/usb/phy/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/phy/Kconfig 2015-10-12 10:56:18.183351151 +0200
++++ linux-3.14.54/drivers/usb/phy/Kconfig 2015-10-15 15:51:25.532636877 +0200
@@ -253,7 +253,7 @@
config USB_ULPI
@@ -313633,7 +313615,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/phy/Kconfig linux-3.14.54/drivers/usb/p
are likely found on embedded boards.
diff -Nur linux-3.14.54.orig/drivers/usb/phy/phy-mxs-usb.c linux-3.14.54/drivers/usb/phy/phy-mxs-usb.c
--- linux-3.14.54.orig/drivers/usb/phy/phy-mxs-usb.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/phy/phy-mxs-usb.c 2015-10-12 10:56:18.183351151 +0200
++++ linux-3.14.54/drivers/usb/phy/phy-mxs-usb.c 2015-10-15 15:51:25.532636877 +0200
@@ -1,5 +1,5 @@
/*
- * Copyright 2012 Freescale Semiconductor, Inc.
@@ -314168,7 +314150,7 @@ diff -Nur linux-3.14.54.orig/drivers/usb/phy/phy-mxs-usb.c linux-3.14.54/drivers
diff -Nur linux-3.14.54.orig/drivers/usb/phy/phy-ulpi.c linux-3.14.54/drivers/usb/phy/phy-ulpi.c
--- linux-3.14.54.orig/drivers/usb/phy/phy-ulpi.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/usb/phy/phy-ulpi.c 2015-10-12 10:56:18.184351151 +0200
++++ linux-3.14.54/drivers/usb/phy/phy-ulpi.c 2015-10-15 15:51:25.532636877 +0200
@@ -48,6 +48,7 @@
ULPI_INFO(ULPI_ID(0x04cc, 0x1504), "NXP ISP1504"),
ULPI_INFO(ULPI_ID(0x0424, 0x0006), "SMSC USB331x"),
@@ -314177,83 +314159,9 @@ diff -Nur linux-3.14.54.orig/drivers/usb/phy/phy-ulpi.c linux-3.14.54/drivers/us
ULPI_INFO(ULPI_ID(0x0451, 0x1507), "TI TUSB1210"),
};
-diff -Nur linux-3.14.54.orig/drivers/video/Kconfig linux-3.14.54/drivers/video/Kconfig
---- linux-3.14.54.orig/drivers/video/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/video/Kconfig 2015-10-12 10:56:18.186351151 +0200
-@@ -39,6 +39,11 @@
- config HDMI
- bool
-
-+config VEXPRESS_DVI_CONTROL
-+ bool "Versatile Express DVI control"
-+ depends on FB && VEXPRESS_CONFIG
-+ default y
-+
- menuconfig FB
- tristate "Support for frame buffer devices"
- ---help---
-@@ -327,6 +332,21 @@
- here and read <file:Documentation/kbuild/modules.txt>. The module
- will be called amba-clcd.
-
-+config FB_ARMHDLCD
-+ tristate "ARM High Definition LCD support"
-+ depends on FB && ARM
-+ select FB_CFB_FILLRECT
-+ select FB_CFB_COPYAREA
-+ select FB_CFB_IMAGEBLIT
-+ help
-+ This framebuffer device driver is for the ARM High Definition
-+ Colour LCD controller.
-+
-+ If you want to compile this as a module (=code which can be
-+ inserted into and removed from the running kernel), say M
-+ here and read <file:Documentation/kbuild/modules.txt>. The module
-+ will be called arm-hdlcd.
-+
- config FB_ACORN
- bool "Acorn VIDC support"
- depends on (FB = y) && ARM && ARCH_ACORN
-@@ -2491,6 +2511,10 @@
- source "drivers/video/mmp/Kconfig"
- source "drivers/video/backlight/Kconfig"
-
-+if ARCH_MXC
-+source "drivers/video/mxc/Kconfig"
-+endif
-+
- if VT
- source "drivers/video/console/Kconfig"
- endif
-diff -Nur linux-3.14.54.orig/drivers/video/Makefile linux-3.14.54/drivers/video/Makefile
---- linux-3.14.54.orig/drivers/video/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/video/Makefile 2015-10-12 10:56:18.186351151 +0200
-@@ -53,6 +53,7 @@
- obj-$(CONFIG_FB_SAVAGE) += savage/
- obj-$(CONFIG_FB_GEODE) += geode/
- obj-$(CONFIG_FB_MBX) += mbx/
-+obj-$(CONFIG_FB_MXC) += mxc/
- obj-$(CONFIG_FB_NEOMAGIC) += neofb.o
- obj-$(CONFIG_FB_3DFX) += tdfxfb.o
- obj-$(CONFIG_FB_CONTROL) += controlfb.o
-@@ -99,6 +100,7 @@
- obj-$(CONFIG_FB_PVR2) += pvr2fb.o
- obj-$(CONFIG_FB_VOODOO1) += sstfb.o
- obj-$(CONFIG_FB_ARMCLCD) += amba-clcd.o
-+obj-$(CONFIG_FB_ARMHDLCD) += arm-hdlcd.o
- obj-$(CONFIG_FB_GOLDFISH) += goldfishfb.o
- obj-$(CONFIG_FB_68328) += 68328fb.o
- obj-$(CONFIG_FB_GBE) += gbefb.o
-@@ -178,3 +180,6 @@
- ifeq ($(CONFIG_OF),y)
- obj-$(CONFIG_VIDEOMODE_HELPERS) += of_display_timing.o of_videomode.o
- endif
-+
-+# platform specific output drivers
-+obj-$(CONFIG_VEXPRESS_DVI_CONTROL) += vexpress-dvi.o
diff -Nur linux-3.14.54.orig/drivers/video/amba-clcd.c linux-3.14.54/drivers/video/amba-clcd.c
--- linux-3.14.54.orig/drivers/video/amba-clcd.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/video/amba-clcd.c 2015-10-12 10:56:18.184351151 +0200
++++ linux-3.14.54/drivers/video/amba-clcd.c 2015-10-15 15:51:25.536636613 +0200
@@ -17,7 +17,10 @@
#include <linux/string.h>
#include <linux/slab.h>
@@ -314601,7 +314509,7 @@ diff -Nur linux-3.14.54.orig/drivers/video/amba-clcd.c linux-3.14.54/drivers/vid
if (ret)
diff -Nur linux-3.14.54.orig/drivers/video/arm-hdlcd.c linux-3.14.54/drivers/video/arm-hdlcd.c
--- linux-3.14.54.orig/drivers/video/arm-hdlcd.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/video/arm-hdlcd.c 2015-10-12 10:56:18.185351151 +0200
++++ linux-3.14.54/drivers/video/arm-hdlcd.c 2015-10-15 15:51:25.536636613 +0200
@@ -0,0 +1,844 @@
+/*
+ * drivers/video/arm-hdlcd.c
@@ -315449,7 +315357,7 @@ diff -Nur linux-3.14.54.orig/drivers/video/arm-hdlcd.c linux-3.14.54/drivers/vid
+MODULE_LICENSE("GPL v2");
diff -Nur linux-3.14.54.orig/drivers/video/backlight/backlight.c linux-3.14.54/drivers/video/backlight/backlight.c
--- linux-3.14.54.orig/drivers/video/backlight/backlight.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/video/backlight/backlight.c 2015-10-12 10:56:18.185351151 +0200
++++ linux-3.14.54/drivers/video/backlight/backlight.c 2015-10-15 15:51:25.536636613 +0200
@@ -41,6 +41,8 @@
{
struct backlight_device *bd;
@@ -315490,9 +315398,83 @@ diff -Nur linux-3.14.54.orig/drivers/video/backlight/backlight.c linux-3.14.54/d
}
mutex_unlock(&bd->ops_lock);
return 0;
+diff -Nur linux-3.14.54.orig/drivers/video/Kconfig linux-3.14.54/drivers/video/Kconfig
+--- linux-3.14.54.orig/drivers/video/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/video/Kconfig 2015-10-15 15:51:25.536636613 +0200
+@@ -39,6 +39,11 @@
+ config HDMI
+ bool
+
++config VEXPRESS_DVI_CONTROL
++ bool "Versatile Express DVI control"
++ depends on FB && VEXPRESS_CONFIG
++ default y
++
+ menuconfig FB
+ tristate "Support for frame buffer devices"
+ ---help---
+@@ -327,6 +332,21 @@
+ here and read <file:Documentation/kbuild/modules.txt>. The module
+ will be called amba-clcd.
+
++config FB_ARMHDLCD
++ tristate "ARM High Definition LCD support"
++ depends on FB && ARM
++ select FB_CFB_FILLRECT
++ select FB_CFB_COPYAREA
++ select FB_CFB_IMAGEBLIT
++ help
++ This framebuffer device driver is for the ARM High Definition
++ Colour LCD controller.
++
++ If you want to compile this as a module (=code which can be
++ inserted into and removed from the running kernel), say M
++ here and read <file:Documentation/kbuild/modules.txt>. The module
++ will be called arm-hdlcd.
++
+ config FB_ACORN
+ bool "Acorn VIDC support"
+ depends on (FB = y) && ARM && ARCH_ACORN
+@@ -2491,6 +2511,10 @@
+ source "drivers/video/mmp/Kconfig"
+ source "drivers/video/backlight/Kconfig"
+
++if ARCH_MXC
++source "drivers/video/mxc/Kconfig"
++endif
++
+ if VT
+ source "drivers/video/console/Kconfig"
+ endif
+diff -Nur linux-3.14.54.orig/drivers/video/Makefile linux-3.14.54/drivers/video/Makefile
+--- linux-3.14.54.orig/drivers/video/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/drivers/video/Makefile 2015-10-15 15:51:25.536636613 +0200
+@@ -53,6 +53,7 @@
+ obj-$(CONFIG_FB_SAVAGE) += savage/
+ obj-$(CONFIG_FB_GEODE) += geode/
+ obj-$(CONFIG_FB_MBX) += mbx/
++obj-$(CONFIG_FB_MXC) += mxc/
+ obj-$(CONFIG_FB_NEOMAGIC) += neofb.o
+ obj-$(CONFIG_FB_3DFX) += tdfxfb.o
+ obj-$(CONFIG_FB_CONTROL) += controlfb.o
+@@ -99,6 +100,7 @@
+ obj-$(CONFIG_FB_PVR2) += pvr2fb.o
+ obj-$(CONFIG_FB_VOODOO1) += sstfb.o
+ obj-$(CONFIG_FB_ARMCLCD) += amba-clcd.o
++obj-$(CONFIG_FB_ARMHDLCD) += arm-hdlcd.o
+ obj-$(CONFIG_FB_GOLDFISH) += goldfishfb.o
+ obj-$(CONFIG_FB_68328) += 68328fb.o
+ obj-$(CONFIG_FB_GBE) += gbefb.o
+@@ -178,3 +180,6 @@
+ ifeq ($(CONFIG_OF),y)
+ obj-$(CONFIG_VIDEOMODE_HELPERS) += of_display_timing.o of_videomode.o
+ endif
++
++# platform specific output drivers
++obj-$(CONFIG_VEXPRESS_DVI_CONTROL) += vexpress-dvi.o
diff -Nur linux-3.14.54.orig/drivers/video/mxc/Kconfig linux-3.14.54/drivers/video/mxc/Kconfig
--- linux-3.14.54.orig/drivers/video/mxc/Kconfig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/video/mxc/Kconfig 2015-10-12 10:56:18.186351151 +0200
++++ linux-3.14.54/drivers/video/mxc/Kconfig 2015-10-15 15:51:25.536636613 +0200
@@ -0,0 +1,48 @@
+config FB_MXC
+ tristate "MXC Framebuffer support"
@@ -315542,19 +315524,9 @@ diff -Nur linux-3.14.54.orig/drivers/video/mxc/Kconfig linux-3.14.54/drivers/vid
+ depends on FB_MXC && I2C
+ tristate "MXC EDID support"
+ default y
-diff -Nur linux-3.14.54.orig/drivers/video/mxc/Makefile linux-3.14.54/drivers/video/mxc/Makefile
---- linux-3.14.54.orig/drivers/video/mxc/Makefile 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/video/mxc/Makefile 2015-10-12 10:56:18.187351151 +0200
-@@ -0,0 +1,6 @@
-+obj-$(CONFIG_FB_MXC_LDB) += ldb.o
-+obj-$(CONFIG_FB_MXC_MIPI_DSI) += mipi_dsi.o
-+obj-$(CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL) += mxcfb_hx8369_wvga.o
-+obj-$(CONFIG_FB_MXC_HDMI) += mxc_hdmi.o
-+obj-$(CONFIG_FB_MXC_EDID) += mxc_edid.o
-+obj-$(CONFIG_FB_MXC_SYNC_PANEL) += mxc_dispdrv.o mxc_lcdif.o mxc_ipuv3_fb.o
diff -Nur linux-3.14.54.orig/drivers/video/mxc/ldb.c linux-3.14.54/drivers/video/mxc/ldb.c
--- linux-3.14.54.orig/drivers/video/mxc/ldb.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/video/mxc/ldb.c 2015-10-12 10:56:18.187351151 +0200
++++ linux-3.14.54/drivers/video/mxc/ldb.c 2015-10-15 15:51:25.544636086 +0200
@@ -0,0 +1,1036 @@
+/*
+ * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -316592,9 +316564,19 @@ diff -Nur linux-3.14.54.orig/drivers/video/mxc/ldb.c linux-3.14.54/drivers/video
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
+MODULE_DESCRIPTION("MXC LDB driver");
+MODULE_LICENSE("GPL");
+diff -Nur linux-3.14.54.orig/drivers/video/mxc/Makefile linux-3.14.54/drivers/video/mxc/Makefile
+--- linux-3.14.54.orig/drivers/video/mxc/Makefile 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/video/mxc/Makefile 2015-10-15 15:51:25.544636086 +0200
+@@ -0,0 +1,6 @@
++obj-$(CONFIG_FB_MXC_LDB) += ldb.o
++obj-$(CONFIG_FB_MXC_MIPI_DSI) += mipi_dsi.o
++obj-$(CONFIG_FB_MXC_TRULY_WVGA_SYNC_PANEL) += mxcfb_hx8369_wvga.o
++obj-$(CONFIG_FB_MXC_HDMI) += mxc_hdmi.o
++obj-$(CONFIG_FB_MXC_EDID) += mxc_edid.o
++obj-$(CONFIG_FB_MXC_SYNC_PANEL) += mxc_dispdrv.o mxc_lcdif.o mxc_ipuv3_fb.o
diff -Nur linux-3.14.54.orig/drivers/video/mxc/mipi_dsi.c linux-3.14.54/drivers/video/mxc/mipi_dsi.c
--- linux-3.14.54.orig/drivers/video/mxc/mipi_dsi.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/video/mxc/mipi_dsi.c 2015-10-12 10:56:18.187351151 +0200
++++ linux-3.14.54/drivers/video/mxc/mipi_dsi.c 2015-10-15 15:51:25.548635824 +0200
@@ -0,0 +1,953 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -317551,7 +317533,7 @@ diff -Nur linux-3.14.54.orig/drivers/video/mxc/mipi_dsi.c linux-3.14.54/drivers/
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/drivers/video/mxc/mipi_dsi.h linux-3.14.54/drivers/video/mxc/mipi_dsi.h
--- linux-3.14.54.orig/drivers/video/mxc/mipi_dsi.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/video/mxc/mipi_dsi.h 2015-10-12 10:56:18.187351151 +0200
++++ linux-3.14.54/drivers/video/mxc/mipi_dsi.h 2015-10-15 15:51:25.548635824 +0200
@@ -0,0 +1,112 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -317667,7 +317649,7 @@ diff -Nur linux-3.14.54.orig/drivers/video/mxc/mipi_dsi.h linux-3.14.54/drivers/
+#endif
diff -Nur linux-3.14.54.orig/drivers/video/mxc/mxc_dispdrv.c linux-3.14.54/drivers/video/mxc/mxc_dispdrv.c
--- linux-3.14.54.orig/drivers/video/mxc/mxc_dispdrv.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/video/mxc/mxc_dispdrv.c 2015-10-12 10:56:18.187351151 +0200
++++ linux-3.14.54/drivers/video/mxc/mxc_dispdrv.c 2015-10-15 15:51:25.548635824 +0200
@@ -0,0 +1,150 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -317821,7 +317803,7 @@ diff -Nur linux-3.14.54.orig/drivers/video/mxc/mxc_dispdrv.c linux-3.14.54/drive
+EXPORT_SYMBOL_GPL(mxc_dispdrv_getdata);
diff -Nur linux-3.14.54.orig/drivers/video/mxc/mxc_dispdrv.h linux-3.14.54/drivers/video/mxc/mxc_dispdrv.h
--- linux-3.14.54.orig/drivers/video/mxc/mxc_dispdrv.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/video/mxc/mxc_dispdrv.h 2015-10-12 10:56:18.188351151 +0200
++++ linux-3.14.54/drivers/video/mxc/mxc_dispdrv.h 2015-10-15 15:51:25.548635824 +0200
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -317879,7 +317861,7 @@ diff -Nur linux-3.14.54.orig/drivers/video/mxc/mxc_dispdrv.h linux-3.14.54/drive
+#endif
diff -Nur linux-3.14.54.orig/drivers/video/mxc/mxc_edid.c linux-3.14.54/drivers/video/mxc/mxc_edid.c
--- linux-3.14.54.orig/drivers/video/mxc/mxc_edid.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/video/mxc/mxc_edid.c 2015-10-12 10:56:18.188351151 +0200
++++ linux-3.14.54/drivers/video/mxc/mxc_edid.c 2015-10-15 15:51:25.552635560 +0200
@@ -0,0 +1,762 @@
+/*
+ * Copyright 2009-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -318643,9 +318625,462 @@ diff -Nur linux-3.14.54.orig/drivers/video/mxc/mxc_edid.c linux-3.14.54/drivers/
+}
+EXPORT_SYMBOL(mxc_edid_read);
+
+diff -Nur linux-3.14.54.orig/drivers/video/mxc/mxcfb_hx8369_wvga.c linux-3.14.54/drivers/video/mxc/mxcfb_hx8369_wvga.c
+--- linux-3.14.54.orig/drivers/video/mxc/mxcfb_hx8369_wvga.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/drivers/video/mxc/mxcfb_hx8369_wvga.c 2015-10-15 15:51:25.552635560 +0200
+@@ -0,0 +1,449 @@
++/*
++ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++
++ * You should have received a copy of the GNU General Public License along
++ * with this program; if not, write to the Free Software Foundation, Inc.,
++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
++ */
++
++#include <linux/types.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++#include <linux/platform_device.h>
++#include <linux/err.h>
++#include <linux/clk.h>
++#include <linux/console.h>
++#include <linux/io.h>
++#include <linux/bitops.h>
++#include <linux/spinlock.h>
++#include <linux/mipi_dsi.h>
++#include <linux/mxcfb.h>
++#include <linux/backlight.h>
++#include <video/mipi_display.h>
++
++#include "mipi_dsi.h"
++
++#define MIPI_DSI_MAX_RET_PACK_SIZE (0x4)
++
++#define HX8369BL_MAX_BRIGHT (255)
++#define HX8369BL_DEF_BRIGHT (255)
++
++#define HX8369_MAX_DPHY_CLK (800)
++#define HX8369_ONE_DATA_LANE (0x1)
++#define HX8369_TWO_DATA_LANE (0x2)
++
++#define HX8369_CMD_SETEXTC (0xB9)
++#define HX8369_CMD_SETEXTC_LEN (0x4)
++#define HX8369_CMD_SETEXTC_PARAM_1 (0x6983ff)
++
++#define HX8369_CMD_GETHXID (0xF4)
++#define HX8369_CMD_GETHXID_LEN (0x4)
++#define HX8369_ID (0x69)
++#define HX8369_ID_MASK (0xFF)
++
++#define HX8369_CMD_SETDISP (0xB2)
++#define HX8369_CMD_SETDISP_LEN (16)
++#define HX8369_CMD_SETDISP_1_HALT (0x00)
++#define HX8369_CMD_SETDISP_2_RES_MODE (0x23)
++#define HX8369_CMD_SETDISP_3_BP (0x03)
++#define HX8369_CMD_SETDISP_4_FP (0x03)
++#define HX8369_CMD_SETDISP_5_SAP (0x70)
++#define HX8369_CMD_SETDISP_6_GENON (0x00)
++#define HX8369_CMD_SETDISP_7_GENOFF (0xff)
++#define HX8369_CMD_SETDISP_8_RTN (0x00)
++#define HX8369_CMD_SETDISP_9_TEI (0x00)
++#define HX8369_CMD_SETDISP_10_TEP_UP (0x00)
++#define HX8369_CMD_SETDISP_11_TEP_LOW (0x00)
++#define HX8369_CMD_SETDISP_12_BP_PE (0x03)
++#define HX8369_CMD_SETDISP_13_FP_PE (0x03)
++#define HX8369_CMD_SETDISP_14_RTN_PE (0x00)
++#define HX8369_CMD_SETDISP_15_GON (0x01)
++
++#define HX8369_CMD_SETCYC (0xB4)
++#define HX8369_CMD_SETCYC_LEN (6)
++#define HX8369_CMD_SETCYC_PARAM_1 (0x5f1d00)
++#define HX8369_CMD_SETCYC_PARAM_2 (0x060e)
++
++#define HX8369_CMD_SETGIP (0xD5)
++#define HX8369_CMD_SETGIP_LEN (27)
++#define HX8369_CMD_SETGIP_PARAM_1 (0x030400)
++#define HX8369_CMD_SETGIP_PARAM_2 (0x1c050100)
++#define HX8369_CMD_SETGIP_PARAM_3 (0x00030170)
++#define HX8369_CMD_SETGIP_PARAM_4 (0x51064000)
++#define HX8369_CMD_SETGIP_PARAM_5 (0x41000007)
++#define HX8369_CMD_SETGIP_PARAM_6 (0x07075006)
++#define HX8369_CMD_SETGIP_PARAM_7 (0x040f)
++
++#define HX8369_CMD_SETPOWER (0xB1)
++#define HX8369_CMD_SETPOWER_LEN (20)
++#define HX8369_CMD_SETPOWER_PARAM_1 (0x340001)
++#define HX8369_CMD_SETPOWER_PARAM_2 (0x0f0f0006)
++#define HX8369_CMD_SETPOWER_PARAM_3 (0x3f3f322a)
++#define HX8369_CMD_SETPOWER_PARAM_4 (0xe6013a07)
++#define HX8369_CMD_SETPOWER_PARAM_5 (0xe6e6e6e6)
++
++#define HX8369_CMD_SETVCOM (0xB6)
++#define HX8369_CMD_SETVCOM_LEN (3)
++#define HX8369_CMD_SETVCOM_PARAM_1 (0x5656)
++
++#define HX8369_CMD_SETPANEL (0xCC)
++#define HX8369_CMD_SETPANEL_PARAM_1 (0x02)
++
++#define HX8369_CMD_SETGAMMA (0xE0)
++#define HX8369_CMD_SETGAMMA_LEN (35)
++#define HX8369_CMD_SETGAMMA_PARAM_1 (0x221d00)
++#define HX8369_CMD_SETGAMMA_PARAM_2 (0x2e3f3d38)
++#define HX8369_CMD_SETGAMMA_PARAM_3 (0x0f0d064a)
++#define HX8369_CMD_SETGAMMA_PARAM_4 (0x16131513)
++#define HX8369_CMD_SETGAMMA_PARAM_5 (0x1d001910)
++#define HX8369_CMD_SETGAMMA_PARAM_6 (0x3f3d3822)
++#define HX8369_CMD_SETGAMMA_PARAM_7 (0x0d064a2e)
++#define HX8369_CMD_SETGAMMA_PARAM_8 (0x1315130f)
++#define HX8369_CMD_SETGAMMA_PARAM_9 (0x191016)
++
++#define HX8369_CMD_SETMIPI (0xBA)
++#define HX8369_CMD_SETMIPI_LEN (14)
++#define HX8369_CMD_SETMIPI_PARAM_1 (0xc6a000)
++#define HX8369_CMD_SETMIPI_PARAM_2 (0x10000a00)
++#define HX8369_CMD_SETMIPI_ONELANE (0x10 << 24)
++#define HX8369_CMD_SETMIPI_TWOLANE (0x11 << 24)
++#define HX8369_CMD_SETMIPI_PARAM_3 (0x00026f30)
++#define HX8369_CMD_SETMIPI_PARAM_4 (0x4018)
++
++#define HX8369_CMD_SETPIXEL_FMT (0x3A)
++#define HX8369_CMD_SETPIXEL_FMT_24BPP (0x77)
++#define HX8369_CMD_SETPIXEL_FMT_18BPP (0x66)
++#define HX8369_CMD_SETPIXEL_FMT_16BPP (0x55)
++
++#define HX8369_CMD_SETCLUMN_ADDR (0x2A)
++#define HX8369_CMD_SETCLUMN_ADDR_LEN (5)
++#define HX8369_CMD_SETCLUMN_ADDR_PARAM_1 (0xdf0000)
++#define HX8369_CMD_SETCLUMN_ADDR_PARAM_2 (0x01)
++
++#define HX8369_CMD_SETPAGE_ADDR (0x2B)
++#define HX8369_CMD_SETPAGE_ADDR_LEN (5)
++#define HX8369_CMD_SETPAGE_ADDR_PARAM_1 (0x1f0000)
++#define HX8369_CMD_SETPAGE_ADDR_PARAM_2 (0x03)
++
++#define HX8369_CMD_WRT_DISP_BRIGHT (0x51)
++#define HX8369_CMD_WRT_DISP_BRIGHT_PARAM_1 (0xFF)
++
++#define HX8369_CMD_WRT_CABC_MIN_BRIGHT (0x5E)
++#define HX8369_CMD_WRT_CABC_MIN_BRIGHT_PARAM_1 (0x20)
++
++#define HX8369_CMD_WRT_CABC_CTRL (0x55)
++#define HX8369_CMD_WRT_CABC_CTRL_PARAM_1 (0x1)
++
++#define HX8369_CMD_WRT_CTRL_DISP (0x53)
++#define HX8369_CMD_WRT_CTRL_DISP_PARAM_1 (0x24)
++
++#define CHECK_RETCODE(ret) \
++do { \
++ if (ret < 0) { \
++ dev_err(&mipi_dsi->pdev->dev, \
++ "%s ERR: ret:%d, line:%d.\n", \
++ __func__, ret, __LINE__); \
++ return ret; \
++ } \
++} while (0)
++
++static int hx8369bl_brightness;
++static int mipid_init_backlight(struct mipi_dsi_info *mipi_dsi);
++
++static struct fb_videomode truly_lcd_modedb[] = {
++ {
++ "TRULY-WVGA", 64, 480, 800, 37880,
++ 8, 8,
++ 6, 6,
++ 8, 6,
++ FB_SYNC_OE_LOW_ACT,
++ FB_VMODE_NONINTERLACED,
++ 0,
++ },
++};
++
++static struct mipi_lcd_config lcd_config = {
++ .virtual_ch = 0x0,
++ .data_lane_num = HX8369_TWO_DATA_LANE,
++ .max_phy_clk = HX8369_MAX_DPHY_CLK,
++ .dpi_fmt = MIPI_RGB888,
++};
++void mipid_hx8369_get_lcd_videomode(struct fb_videomode **mode, int *size,
++ struct mipi_lcd_config **data)
++{
++ *mode = &truly_lcd_modedb[0];
++ *size = ARRAY_SIZE(truly_lcd_modedb);
++ *data = &lcd_config;
++}
++
++int mipid_hx8369_lcd_setup(struct mipi_dsi_info *mipi_dsi)
++{
++ u32 buf[DSI_CMD_BUF_MAXSIZE];
++ int err;
++
++ dev_dbg(&mipi_dsi->pdev->dev, "MIPI DSI LCD setup.\n");
++ buf[0] = HX8369_CMD_SETEXTC | (HX8369_CMD_SETEXTC_PARAM_1 << 8);
++ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
++ buf, HX8369_CMD_SETEXTC_LEN);
++ CHECK_RETCODE(err);
++ buf[0] = MIPI_DSI_MAX_RET_PACK_SIZE;
++ err = mipi_dsi_pkt_write(mipi_dsi,
++ MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE,
++ buf, 0);
++ CHECK_RETCODE(err);
++ buf[0] = HX8369_CMD_GETHXID;
++ err = mipi_dsi_pkt_read(mipi_dsi,
++ MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM,
++ buf, HX8369_CMD_GETHXID_LEN);
++ if (!err && ((buf[0] & HX8369_ID_MASK) == HX8369_ID)) {
++ dev_info(&mipi_dsi->pdev->dev,
++ "MIPI DSI LCD ID:0x%x.\n", buf[0]);
++ } else {
++ dev_err(&mipi_dsi->pdev->dev,
++ "mipi_dsi_pkt_read err:%d, data:0x%x.\n",
++ err, buf[0]);
++ dev_info(&mipi_dsi->pdev->dev,
++ "MIPI DSI LCD not detected!\n");
++ return err;
++ }
++
++ /* set LCD resolution as 480RGBx800, DPI interface,
++ * display operation mode: RGB data bypass GRAM mode.
++ */
++ buf[0] = HX8369_CMD_SETDISP | (HX8369_CMD_SETDISP_1_HALT << 8) |
++ (HX8369_CMD_SETDISP_2_RES_MODE << 16) |
++ (HX8369_CMD_SETDISP_3_BP << 24);
++ buf[1] = HX8369_CMD_SETDISP_4_FP | (HX8369_CMD_SETDISP_5_SAP << 8) |
++ (HX8369_CMD_SETDISP_6_GENON << 16) |
++ (HX8369_CMD_SETDISP_7_GENOFF << 24);
++ buf[2] = HX8369_CMD_SETDISP_8_RTN | (HX8369_CMD_SETDISP_9_TEI << 8) |
++ (HX8369_CMD_SETDISP_10_TEP_UP << 16) |
++ (HX8369_CMD_SETDISP_11_TEP_LOW << 24);
++ buf[3] = HX8369_CMD_SETDISP_12_BP_PE |
++ (HX8369_CMD_SETDISP_13_FP_PE << 8) |
++ (HX8369_CMD_SETDISP_14_RTN_PE << 16) |
++ (HX8369_CMD_SETDISP_15_GON << 24);
++ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
++ buf, HX8369_CMD_SETDISP_LEN);
++ CHECK_RETCODE(err);
++
++ /* Set display waveform cycle */
++ buf[0] = HX8369_CMD_SETCYC | (HX8369_CMD_SETCYC_PARAM_1 << 8);
++ buf[1] = HX8369_CMD_SETCYC_PARAM_2;
++ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
++ buf, HX8369_CMD_SETCYC_LEN);
++ CHECK_RETCODE(err);
++
++ /* Set GIP timing output control */
++ buf[0] = HX8369_CMD_SETGIP | (HX8369_CMD_SETGIP_PARAM_1 << 8);
++ buf[1] = HX8369_CMD_SETGIP_PARAM_2;
++ buf[2] = HX8369_CMD_SETGIP_PARAM_3;
++ buf[3] = HX8369_CMD_SETGIP_PARAM_4;
++ buf[4] = HX8369_CMD_SETGIP_PARAM_5;
++ buf[5] = HX8369_CMD_SETGIP_PARAM_6;
++ buf[6] = HX8369_CMD_SETGIP_PARAM_7;
++ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
++ HX8369_CMD_SETGIP_LEN);
++ CHECK_RETCODE(err);
++
++ /* Set power: standby, DC etc. */
++ buf[0] = HX8369_CMD_SETPOWER | (HX8369_CMD_SETPOWER_PARAM_1 << 8);
++ buf[1] = HX8369_CMD_SETPOWER_PARAM_2;
++ buf[2] = HX8369_CMD_SETPOWER_PARAM_3;
++ buf[3] = HX8369_CMD_SETPOWER_PARAM_4;
++ buf[4] = HX8369_CMD_SETPOWER_PARAM_5;
++ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
++ HX8369_CMD_SETPOWER_LEN);
++ CHECK_RETCODE(err);
++
++ /* Set VCOM voltage. */
++ buf[0] = HX8369_CMD_SETVCOM | (HX8369_CMD_SETVCOM_PARAM_1 << 8);
++ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
++ HX8369_CMD_SETVCOM_LEN);
++ CHECK_RETCODE(err);
++
++ /* Set Panel: BGR/RGB or Inversion. */
++ buf[0] = HX8369_CMD_SETPANEL | (HX8369_CMD_SETPANEL_PARAM_1 << 8);
++ err = mipi_dsi_pkt_write(mipi_dsi,
++ MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM, buf, 0);
++ CHECK_RETCODE(err);
++
++ /* Set gamma curve related setting */
++ buf[0] = HX8369_CMD_SETGAMMA | (HX8369_CMD_SETGAMMA_PARAM_1 << 8);
++ buf[1] = HX8369_CMD_SETGAMMA_PARAM_2;
++ buf[2] = HX8369_CMD_SETGAMMA_PARAM_3;
++ buf[3] = HX8369_CMD_SETGAMMA_PARAM_4;
++ buf[4] = HX8369_CMD_SETGAMMA_PARAM_5;
++ buf[5] = HX8369_CMD_SETGAMMA_PARAM_6;
++ buf[7] = HX8369_CMD_SETGAMMA_PARAM_7;
++ buf[7] = HX8369_CMD_SETGAMMA_PARAM_8;
++ buf[8] = HX8369_CMD_SETGAMMA_PARAM_9;
++ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
++ HX8369_CMD_SETGAMMA_LEN);
++ CHECK_RETCODE(err);
++
++ /* Set MIPI: DPHYCMD & DSICMD, data lane number */
++ buf[0] = HX8369_CMD_SETMIPI | (HX8369_CMD_SETMIPI_PARAM_1 << 8);
++ buf[1] = HX8369_CMD_SETMIPI_PARAM_2;
++ buf[2] = HX8369_CMD_SETMIPI_PARAM_3;
++ if (lcd_config.data_lane_num == HX8369_ONE_DATA_LANE)
++ buf[2] |= HX8369_CMD_SETMIPI_ONELANE;
++ else
++ buf[2] |= HX8369_CMD_SETMIPI_TWOLANE;
++ buf[3] = HX8369_CMD_SETMIPI_PARAM_4;
++ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
++ HX8369_CMD_SETMIPI_LEN);
++ CHECK_RETCODE(err);
++
++ /* Set pixel format:24bpp */
++ buf[0] = HX8369_CMD_SETPIXEL_FMT;
++ switch (lcd_config.dpi_fmt) {
++ case MIPI_RGB565_PACKED:
++ case MIPI_RGB565_LOOSELY:
++ case MIPI_RGB565_CONFIG3:
++ buf[0] |= (HX8369_CMD_SETPIXEL_FMT_16BPP << 8);
++ break;
++
++ case MIPI_RGB666_LOOSELY:
++ case MIPI_RGB666_PACKED:
++ buf[0] |= (HX8369_CMD_SETPIXEL_FMT_18BPP << 8);
++ break;
++
++ case MIPI_RGB888:
++ buf[0] |= (HX8369_CMD_SETPIXEL_FMT_24BPP << 8);
++ break;
++
++ default:
++ buf[0] |= (HX8369_CMD_SETPIXEL_FMT_24BPP << 8);
++ break;
++ }
++ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
++ buf, 0);
++ CHECK_RETCODE(err);
++
++ /* Set column address: 0~479 */
++ buf[0] = HX8369_CMD_SETCLUMN_ADDR |
++ (HX8369_CMD_SETCLUMN_ADDR_PARAM_1 << 8);
++ buf[1] = HX8369_CMD_SETCLUMN_ADDR_PARAM_2;
++ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
++ buf, HX8369_CMD_SETCLUMN_ADDR_LEN);
++ CHECK_RETCODE(err);
++
++ /* Set page address: 0~799 */
++ buf[0] = HX8369_CMD_SETPAGE_ADDR |
++ (HX8369_CMD_SETPAGE_ADDR_PARAM_1 << 8);
++ buf[1] = HX8369_CMD_SETPAGE_ADDR_PARAM_2;
++ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
++ buf, HX8369_CMD_SETPAGE_ADDR_LEN);
++ CHECK_RETCODE(err);
++
++ /* Set display brightness related */
++ buf[0] = HX8369_CMD_WRT_DISP_BRIGHT |
++ (HX8369_CMD_WRT_DISP_BRIGHT_PARAM_1 << 8);
++ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
++ buf, 0);
++ CHECK_RETCODE(err);
++
++ buf[0] = HX8369_CMD_WRT_CABC_CTRL |
++ (HX8369_CMD_WRT_CABC_CTRL_PARAM_1 << 8);
++ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
++ buf, 0);
++ CHECK_RETCODE(err);
++
++ buf[0] = HX8369_CMD_WRT_CTRL_DISP |
++ (HX8369_CMD_WRT_CTRL_DISP_PARAM_1 << 8);
++ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
++ buf, 0);
++ CHECK_RETCODE(err);
++
++ /* exit sleep mode and set display on */
++ buf[0] = MIPI_DCS_EXIT_SLEEP_MODE;
++ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM,
++ buf, 0);
++ CHECK_RETCODE(err);
++ /* To allow time for the supply voltages
++ * and clock circuits to stabilize.
++ */
++ msleep(5);
++ buf[0] = MIPI_DCS_SET_DISPLAY_ON;
++ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM,
++ buf, 0);
++ CHECK_RETCODE(err);
++
++ err = mipid_init_backlight(mipi_dsi);
++ return err;
++}
++
++static int mipid_bl_update_status(struct backlight_device *bl)
++{
++ u32 buf;
++ int brightness = bl->props.brightness;
++ struct mipi_dsi_info *mipi_dsi = bl_get_data(bl);
++
++ if (bl->props.power != FB_BLANK_UNBLANK ||
++ bl->props.fb_blank != FB_BLANK_UNBLANK)
++ brightness = 0;
++
++ buf = HX8369_CMD_WRT_DISP_BRIGHT |
++ ((brightness & HX8369BL_MAX_BRIGHT) << 8);
++ mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
++ &buf, 0);
++
++ hx8369bl_brightness = brightness & HX8369BL_MAX_BRIGHT;
++
++ dev_dbg(&bl->dev, "mipid backlight bringtness:%d.\n", brightness);
++ return 0;
++}
++
++static int mipid_bl_get_brightness(struct backlight_device *bl)
++{
++ return hx8369bl_brightness;
++}
++
++static int mipi_bl_check_fb(struct backlight_device *bl, struct fb_info *fbi)
++{
++ return 0;
++}
++
++static const struct backlight_ops mipid_lcd_bl_ops = {
++ .update_status = mipid_bl_update_status,
++ .get_brightness = mipid_bl_get_brightness,
++ .check_fb = mipi_bl_check_fb,
++};
++
++static int mipid_init_backlight(struct mipi_dsi_info *mipi_dsi)
++{
++ struct backlight_properties props;
++ struct backlight_device *bl;
++
++ if (mipi_dsi->bl) {
++ pr_debug("mipid backlight already init!\n");
++ return 0;
++ }
++ memset(&props, 0, sizeof(struct backlight_properties));
++ props.max_brightness = HX8369BL_MAX_BRIGHT;
++ props.type = BACKLIGHT_RAW;
++ bl = backlight_device_register("mipid-bl", &mipi_dsi->pdev->dev,
++ mipi_dsi, &mipid_lcd_bl_ops, &props);
++ if (IS_ERR(bl)) {
++ pr_err("error %ld on backlight register\n", PTR_ERR(bl));
++ return PTR_ERR(bl);
++ }
++ mipi_dsi->bl = bl;
++ bl->props.power = FB_BLANK_UNBLANK;
++ bl->props.fb_blank = FB_BLANK_UNBLANK;
++ bl->props.brightness = HX8369BL_DEF_BRIGHT;
++
++ mipid_bl_update_status(bl);
++ return 0;
++}
diff -Nur linux-3.14.54.orig/drivers/video/mxc/mxc_hdmi.c linux-3.14.54/drivers/video/mxc/mxc_hdmi.c
--- linux-3.14.54.orig/drivers/video/mxc/mxc_hdmi.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/video/mxc/mxc_hdmi.c 2015-10-12 10:56:18.189351151 +0200
++++ linux-3.14.54/drivers/video/mxc/mxc_hdmi.c 2015-10-15 15:51:25.556635296 +0200
@@ -0,0 +1,3042 @@
+/*
+ * Copyright (C) 2011-2014 Freescale Semiconductor, Inc.
@@ -321691,7 +322126,7 @@ diff -Nur linux-3.14.54.orig/drivers/video/mxc/mxc_hdmi.c linux-3.14.54/drivers/
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
diff -Nur linux-3.14.54.orig/drivers/video/mxc/mxc_ipuv3_fb.c linux-3.14.54/drivers/video/mxc/mxc_ipuv3_fb.c
--- linux-3.14.54.orig/drivers/video/mxc/mxc_ipuv3_fb.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/video/mxc/mxc_ipuv3_fb.c 2015-10-12 10:56:18.190351151 +0200
++++ linux-3.14.54/drivers/video/mxc/mxc_ipuv3_fb.c 2015-10-15 15:51:25.564634769 +0200
@@ -0,0 +1,2578 @@
+/*
+ * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -324273,7 +324708,7 @@ diff -Nur linux-3.14.54.orig/drivers/video/mxc/mxc_ipuv3_fb.c linux-3.14.54/driv
+MODULE_SUPPORTED_DEVICE("fb");
diff -Nur linux-3.14.54.orig/drivers/video/mxc/mxc_lcdif.c linux-3.14.54/drivers/video/mxc/mxc_lcdif.c
--- linux-3.14.54.orig/drivers/video/mxc/mxc_lcdif.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/video/mxc/mxc_lcdif.c 2015-10-12 10:56:18.190351151 +0200
++++ linux-3.14.54/drivers/video/mxc/mxc_lcdif.c 2015-10-15 15:51:25.564634769 +0200
@@ -0,0 +1,235 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -324510,462 +324945,9 @@ diff -Nur linux-3.14.54.orig/drivers/video/mxc/mxc_lcdif.c linux-3.14.54/drivers
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
+MODULE_DESCRIPTION("i.MX ipuv3 LCD extern port driver");
+MODULE_LICENSE("GPL");
-diff -Nur linux-3.14.54.orig/drivers/video/mxc/mxcfb_hx8369_wvga.c linux-3.14.54/drivers/video/mxc/mxcfb_hx8369_wvga.c
---- linux-3.14.54.orig/drivers/video/mxc/mxcfb_hx8369_wvga.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/video/mxc/mxcfb_hx8369_wvga.c 2015-10-12 10:56:18.188351151 +0200
-@@ -0,0 +1,449 @@
-+/*
-+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+
-+ * You should have received a copy of the GNU General Public License along
-+ * with this program; if not, write to the Free Software Foundation, Inc.,
-+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/init.h>
-+#include <linux/delay.h>
-+#include <linux/platform_device.h>
-+#include <linux/err.h>
-+#include <linux/clk.h>
-+#include <linux/console.h>
-+#include <linux/io.h>
-+#include <linux/bitops.h>
-+#include <linux/spinlock.h>
-+#include <linux/mipi_dsi.h>
-+#include <linux/mxcfb.h>
-+#include <linux/backlight.h>
-+#include <video/mipi_display.h>
-+
-+#include "mipi_dsi.h"
-+
-+#define MIPI_DSI_MAX_RET_PACK_SIZE (0x4)
-+
-+#define HX8369BL_MAX_BRIGHT (255)
-+#define HX8369BL_DEF_BRIGHT (255)
-+
-+#define HX8369_MAX_DPHY_CLK (800)
-+#define HX8369_ONE_DATA_LANE (0x1)
-+#define HX8369_TWO_DATA_LANE (0x2)
-+
-+#define HX8369_CMD_SETEXTC (0xB9)
-+#define HX8369_CMD_SETEXTC_LEN (0x4)
-+#define HX8369_CMD_SETEXTC_PARAM_1 (0x6983ff)
-+
-+#define HX8369_CMD_GETHXID (0xF4)
-+#define HX8369_CMD_GETHXID_LEN (0x4)
-+#define HX8369_ID (0x69)
-+#define HX8369_ID_MASK (0xFF)
-+
-+#define HX8369_CMD_SETDISP (0xB2)
-+#define HX8369_CMD_SETDISP_LEN (16)
-+#define HX8369_CMD_SETDISP_1_HALT (0x00)
-+#define HX8369_CMD_SETDISP_2_RES_MODE (0x23)
-+#define HX8369_CMD_SETDISP_3_BP (0x03)
-+#define HX8369_CMD_SETDISP_4_FP (0x03)
-+#define HX8369_CMD_SETDISP_5_SAP (0x70)
-+#define HX8369_CMD_SETDISP_6_GENON (0x00)
-+#define HX8369_CMD_SETDISP_7_GENOFF (0xff)
-+#define HX8369_CMD_SETDISP_8_RTN (0x00)
-+#define HX8369_CMD_SETDISP_9_TEI (0x00)
-+#define HX8369_CMD_SETDISP_10_TEP_UP (0x00)
-+#define HX8369_CMD_SETDISP_11_TEP_LOW (0x00)
-+#define HX8369_CMD_SETDISP_12_BP_PE (0x03)
-+#define HX8369_CMD_SETDISP_13_FP_PE (0x03)
-+#define HX8369_CMD_SETDISP_14_RTN_PE (0x00)
-+#define HX8369_CMD_SETDISP_15_GON (0x01)
-+
-+#define HX8369_CMD_SETCYC (0xB4)
-+#define HX8369_CMD_SETCYC_LEN (6)
-+#define HX8369_CMD_SETCYC_PARAM_1 (0x5f1d00)
-+#define HX8369_CMD_SETCYC_PARAM_2 (0x060e)
-+
-+#define HX8369_CMD_SETGIP (0xD5)
-+#define HX8369_CMD_SETGIP_LEN (27)
-+#define HX8369_CMD_SETGIP_PARAM_1 (0x030400)
-+#define HX8369_CMD_SETGIP_PARAM_2 (0x1c050100)
-+#define HX8369_CMD_SETGIP_PARAM_3 (0x00030170)
-+#define HX8369_CMD_SETGIP_PARAM_4 (0x51064000)
-+#define HX8369_CMD_SETGIP_PARAM_5 (0x41000007)
-+#define HX8369_CMD_SETGIP_PARAM_6 (0x07075006)
-+#define HX8369_CMD_SETGIP_PARAM_7 (0x040f)
-+
-+#define HX8369_CMD_SETPOWER (0xB1)
-+#define HX8369_CMD_SETPOWER_LEN (20)
-+#define HX8369_CMD_SETPOWER_PARAM_1 (0x340001)
-+#define HX8369_CMD_SETPOWER_PARAM_2 (0x0f0f0006)
-+#define HX8369_CMD_SETPOWER_PARAM_3 (0x3f3f322a)
-+#define HX8369_CMD_SETPOWER_PARAM_4 (0xe6013a07)
-+#define HX8369_CMD_SETPOWER_PARAM_5 (0xe6e6e6e6)
-+
-+#define HX8369_CMD_SETVCOM (0xB6)
-+#define HX8369_CMD_SETVCOM_LEN (3)
-+#define HX8369_CMD_SETVCOM_PARAM_1 (0x5656)
-+
-+#define HX8369_CMD_SETPANEL (0xCC)
-+#define HX8369_CMD_SETPANEL_PARAM_1 (0x02)
-+
-+#define HX8369_CMD_SETGAMMA (0xE0)
-+#define HX8369_CMD_SETGAMMA_LEN (35)
-+#define HX8369_CMD_SETGAMMA_PARAM_1 (0x221d00)
-+#define HX8369_CMD_SETGAMMA_PARAM_2 (0x2e3f3d38)
-+#define HX8369_CMD_SETGAMMA_PARAM_3 (0x0f0d064a)
-+#define HX8369_CMD_SETGAMMA_PARAM_4 (0x16131513)
-+#define HX8369_CMD_SETGAMMA_PARAM_5 (0x1d001910)
-+#define HX8369_CMD_SETGAMMA_PARAM_6 (0x3f3d3822)
-+#define HX8369_CMD_SETGAMMA_PARAM_7 (0x0d064a2e)
-+#define HX8369_CMD_SETGAMMA_PARAM_8 (0x1315130f)
-+#define HX8369_CMD_SETGAMMA_PARAM_9 (0x191016)
-+
-+#define HX8369_CMD_SETMIPI (0xBA)
-+#define HX8369_CMD_SETMIPI_LEN (14)
-+#define HX8369_CMD_SETMIPI_PARAM_1 (0xc6a000)
-+#define HX8369_CMD_SETMIPI_PARAM_2 (0x10000a00)
-+#define HX8369_CMD_SETMIPI_ONELANE (0x10 << 24)
-+#define HX8369_CMD_SETMIPI_TWOLANE (0x11 << 24)
-+#define HX8369_CMD_SETMIPI_PARAM_3 (0x00026f30)
-+#define HX8369_CMD_SETMIPI_PARAM_4 (0x4018)
-+
-+#define HX8369_CMD_SETPIXEL_FMT (0x3A)
-+#define HX8369_CMD_SETPIXEL_FMT_24BPP (0x77)
-+#define HX8369_CMD_SETPIXEL_FMT_18BPP (0x66)
-+#define HX8369_CMD_SETPIXEL_FMT_16BPP (0x55)
-+
-+#define HX8369_CMD_SETCLUMN_ADDR (0x2A)
-+#define HX8369_CMD_SETCLUMN_ADDR_LEN (5)
-+#define HX8369_CMD_SETCLUMN_ADDR_PARAM_1 (0xdf0000)
-+#define HX8369_CMD_SETCLUMN_ADDR_PARAM_2 (0x01)
-+
-+#define HX8369_CMD_SETPAGE_ADDR (0x2B)
-+#define HX8369_CMD_SETPAGE_ADDR_LEN (5)
-+#define HX8369_CMD_SETPAGE_ADDR_PARAM_1 (0x1f0000)
-+#define HX8369_CMD_SETPAGE_ADDR_PARAM_2 (0x03)
-+
-+#define HX8369_CMD_WRT_DISP_BRIGHT (0x51)
-+#define HX8369_CMD_WRT_DISP_BRIGHT_PARAM_1 (0xFF)
-+
-+#define HX8369_CMD_WRT_CABC_MIN_BRIGHT (0x5E)
-+#define HX8369_CMD_WRT_CABC_MIN_BRIGHT_PARAM_1 (0x20)
-+
-+#define HX8369_CMD_WRT_CABC_CTRL (0x55)
-+#define HX8369_CMD_WRT_CABC_CTRL_PARAM_1 (0x1)
-+
-+#define HX8369_CMD_WRT_CTRL_DISP (0x53)
-+#define HX8369_CMD_WRT_CTRL_DISP_PARAM_1 (0x24)
-+
-+#define CHECK_RETCODE(ret) \
-+do { \
-+ if (ret < 0) { \
-+ dev_err(&mipi_dsi->pdev->dev, \
-+ "%s ERR: ret:%d, line:%d.\n", \
-+ __func__, ret, __LINE__); \
-+ return ret; \
-+ } \
-+} while (0)
-+
-+static int hx8369bl_brightness;
-+static int mipid_init_backlight(struct mipi_dsi_info *mipi_dsi);
-+
-+static struct fb_videomode truly_lcd_modedb[] = {
-+ {
-+ "TRULY-WVGA", 64, 480, 800, 37880,
-+ 8, 8,
-+ 6, 6,
-+ 8, 6,
-+ FB_SYNC_OE_LOW_ACT,
-+ FB_VMODE_NONINTERLACED,
-+ 0,
-+ },
-+};
-+
-+static struct mipi_lcd_config lcd_config = {
-+ .virtual_ch = 0x0,
-+ .data_lane_num = HX8369_TWO_DATA_LANE,
-+ .max_phy_clk = HX8369_MAX_DPHY_CLK,
-+ .dpi_fmt = MIPI_RGB888,
-+};
-+void mipid_hx8369_get_lcd_videomode(struct fb_videomode **mode, int *size,
-+ struct mipi_lcd_config **data)
-+{
-+ *mode = &truly_lcd_modedb[0];
-+ *size = ARRAY_SIZE(truly_lcd_modedb);
-+ *data = &lcd_config;
-+}
-+
-+int mipid_hx8369_lcd_setup(struct mipi_dsi_info *mipi_dsi)
-+{
-+ u32 buf[DSI_CMD_BUF_MAXSIZE];
-+ int err;
-+
-+ dev_dbg(&mipi_dsi->pdev->dev, "MIPI DSI LCD setup.\n");
-+ buf[0] = HX8369_CMD_SETEXTC | (HX8369_CMD_SETEXTC_PARAM_1 << 8);
-+ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
-+ buf, HX8369_CMD_SETEXTC_LEN);
-+ CHECK_RETCODE(err);
-+ buf[0] = MIPI_DSI_MAX_RET_PACK_SIZE;
-+ err = mipi_dsi_pkt_write(mipi_dsi,
-+ MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE,
-+ buf, 0);
-+ CHECK_RETCODE(err);
-+ buf[0] = HX8369_CMD_GETHXID;
-+ err = mipi_dsi_pkt_read(mipi_dsi,
-+ MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM,
-+ buf, HX8369_CMD_GETHXID_LEN);
-+ if (!err && ((buf[0] & HX8369_ID_MASK) == HX8369_ID)) {
-+ dev_info(&mipi_dsi->pdev->dev,
-+ "MIPI DSI LCD ID:0x%x.\n", buf[0]);
-+ } else {
-+ dev_err(&mipi_dsi->pdev->dev,
-+ "mipi_dsi_pkt_read err:%d, data:0x%x.\n",
-+ err, buf[0]);
-+ dev_info(&mipi_dsi->pdev->dev,
-+ "MIPI DSI LCD not detected!\n");
-+ return err;
-+ }
-+
-+ /* set LCD resolution as 480RGBx800, DPI interface,
-+ * display operation mode: RGB data bypass GRAM mode.
-+ */
-+ buf[0] = HX8369_CMD_SETDISP | (HX8369_CMD_SETDISP_1_HALT << 8) |
-+ (HX8369_CMD_SETDISP_2_RES_MODE << 16) |
-+ (HX8369_CMD_SETDISP_3_BP << 24);
-+ buf[1] = HX8369_CMD_SETDISP_4_FP | (HX8369_CMD_SETDISP_5_SAP << 8) |
-+ (HX8369_CMD_SETDISP_6_GENON << 16) |
-+ (HX8369_CMD_SETDISP_7_GENOFF << 24);
-+ buf[2] = HX8369_CMD_SETDISP_8_RTN | (HX8369_CMD_SETDISP_9_TEI << 8) |
-+ (HX8369_CMD_SETDISP_10_TEP_UP << 16) |
-+ (HX8369_CMD_SETDISP_11_TEP_LOW << 24);
-+ buf[3] = HX8369_CMD_SETDISP_12_BP_PE |
-+ (HX8369_CMD_SETDISP_13_FP_PE << 8) |
-+ (HX8369_CMD_SETDISP_14_RTN_PE << 16) |
-+ (HX8369_CMD_SETDISP_15_GON << 24);
-+ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
-+ buf, HX8369_CMD_SETDISP_LEN);
-+ CHECK_RETCODE(err);
-+
-+ /* Set display waveform cycle */
-+ buf[0] = HX8369_CMD_SETCYC | (HX8369_CMD_SETCYC_PARAM_1 << 8);
-+ buf[1] = HX8369_CMD_SETCYC_PARAM_2;
-+ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
-+ buf, HX8369_CMD_SETCYC_LEN);
-+ CHECK_RETCODE(err);
-+
-+ /* Set GIP timing output control */
-+ buf[0] = HX8369_CMD_SETGIP | (HX8369_CMD_SETGIP_PARAM_1 << 8);
-+ buf[1] = HX8369_CMD_SETGIP_PARAM_2;
-+ buf[2] = HX8369_CMD_SETGIP_PARAM_3;
-+ buf[3] = HX8369_CMD_SETGIP_PARAM_4;
-+ buf[4] = HX8369_CMD_SETGIP_PARAM_5;
-+ buf[5] = HX8369_CMD_SETGIP_PARAM_6;
-+ buf[6] = HX8369_CMD_SETGIP_PARAM_7;
-+ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
-+ HX8369_CMD_SETGIP_LEN);
-+ CHECK_RETCODE(err);
-+
-+ /* Set power: standby, DC etc. */
-+ buf[0] = HX8369_CMD_SETPOWER | (HX8369_CMD_SETPOWER_PARAM_1 << 8);
-+ buf[1] = HX8369_CMD_SETPOWER_PARAM_2;
-+ buf[2] = HX8369_CMD_SETPOWER_PARAM_3;
-+ buf[3] = HX8369_CMD_SETPOWER_PARAM_4;
-+ buf[4] = HX8369_CMD_SETPOWER_PARAM_5;
-+ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
-+ HX8369_CMD_SETPOWER_LEN);
-+ CHECK_RETCODE(err);
-+
-+ /* Set VCOM voltage. */
-+ buf[0] = HX8369_CMD_SETVCOM | (HX8369_CMD_SETVCOM_PARAM_1 << 8);
-+ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
-+ HX8369_CMD_SETVCOM_LEN);
-+ CHECK_RETCODE(err);
-+
-+ /* Set Panel: BGR/RGB or Inversion. */
-+ buf[0] = HX8369_CMD_SETPANEL | (HX8369_CMD_SETPANEL_PARAM_1 << 8);
-+ err = mipi_dsi_pkt_write(mipi_dsi,
-+ MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM, buf, 0);
-+ CHECK_RETCODE(err);
-+
-+ /* Set gamma curve related setting */
-+ buf[0] = HX8369_CMD_SETGAMMA | (HX8369_CMD_SETGAMMA_PARAM_1 << 8);
-+ buf[1] = HX8369_CMD_SETGAMMA_PARAM_2;
-+ buf[2] = HX8369_CMD_SETGAMMA_PARAM_3;
-+ buf[3] = HX8369_CMD_SETGAMMA_PARAM_4;
-+ buf[4] = HX8369_CMD_SETGAMMA_PARAM_5;
-+ buf[5] = HX8369_CMD_SETGAMMA_PARAM_6;
-+ buf[7] = HX8369_CMD_SETGAMMA_PARAM_7;
-+ buf[7] = HX8369_CMD_SETGAMMA_PARAM_8;
-+ buf[8] = HX8369_CMD_SETGAMMA_PARAM_9;
-+ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
-+ HX8369_CMD_SETGAMMA_LEN);
-+ CHECK_RETCODE(err);
-+
-+ /* Set MIPI: DPHYCMD & DSICMD, data lane number */
-+ buf[0] = HX8369_CMD_SETMIPI | (HX8369_CMD_SETMIPI_PARAM_1 << 8);
-+ buf[1] = HX8369_CMD_SETMIPI_PARAM_2;
-+ buf[2] = HX8369_CMD_SETMIPI_PARAM_3;
-+ if (lcd_config.data_lane_num == HX8369_ONE_DATA_LANE)
-+ buf[2] |= HX8369_CMD_SETMIPI_ONELANE;
-+ else
-+ buf[2] |= HX8369_CMD_SETMIPI_TWOLANE;
-+ buf[3] = HX8369_CMD_SETMIPI_PARAM_4;
-+ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE, buf,
-+ HX8369_CMD_SETMIPI_LEN);
-+ CHECK_RETCODE(err);
-+
-+ /* Set pixel format:24bpp */
-+ buf[0] = HX8369_CMD_SETPIXEL_FMT;
-+ switch (lcd_config.dpi_fmt) {
-+ case MIPI_RGB565_PACKED:
-+ case MIPI_RGB565_LOOSELY:
-+ case MIPI_RGB565_CONFIG3:
-+ buf[0] |= (HX8369_CMD_SETPIXEL_FMT_16BPP << 8);
-+ break;
-+
-+ case MIPI_RGB666_LOOSELY:
-+ case MIPI_RGB666_PACKED:
-+ buf[0] |= (HX8369_CMD_SETPIXEL_FMT_18BPP << 8);
-+ break;
-+
-+ case MIPI_RGB888:
-+ buf[0] |= (HX8369_CMD_SETPIXEL_FMT_24BPP << 8);
-+ break;
-+
-+ default:
-+ buf[0] |= (HX8369_CMD_SETPIXEL_FMT_24BPP << 8);
-+ break;
-+ }
-+ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
-+ buf, 0);
-+ CHECK_RETCODE(err);
-+
-+ /* Set column address: 0~479 */
-+ buf[0] = HX8369_CMD_SETCLUMN_ADDR |
-+ (HX8369_CMD_SETCLUMN_ADDR_PARAM_1 << 8);
-+ buf[1] = HX8369_CMD_SETCLUMN_ADDR_PARAM_2;
-+ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
-+ buf, HX8369_CMD_SETCLUMN_ADDR_LEN);
-+ CHECK_RETCODE(err);
-+
-+ /* Set page address: 0~799 */
-+ buf[0] = HX8369_CMD_SETPAGE_ADDR |
-+ (HX8369_CMD_SETPAGE_ADDR_PARAM_1 << 8);
-+ buf[1] = HX8369_CMD_SETPAGE_ADDR_PARAM_2;
-+ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_LONG_WRITE,
-+ buf, HX8369_CMD_SETPAGE_ADDR_LEN);
-+ CHECK_RETCODE(err);
-+
-+ /* Set display brightness related */
-+ buf[0] = HX8369_CMD_WRT_DISP_BRIGHT |
-+ (HX8369_CMD_WRT_DISP_BRIGHT_PARAM_1 << 8);
-+ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
-+ buf, 0);
-+ CHECK_RETCODE(err);
-+
-+ buf[0] = HX8369_CMD_WRT_CABC_CTRL |
-+ (HX8369_CMD_WRT_CABC_CTRL_PARAM_1 << 8);
-+ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
-+ buf, 0);
-+ CHECK_RETCODE(err);
-+
-+ buf[0] = HX8369_CMD_WRT_CTRL_DISP |
-+ (HX8369_CMD_WRT_CTRL_DISP_PARAM_1 << 8);
-+ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
-+ buf, 0);
-+ CHECK_RETCODE(err);
-+
-+ /* exit sleep mode and set display on */
-+ buf[0] = MIPI_DCS_EXIT_SLEEP_MODE;
-+ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM,
-+ buf, 0);
-+ CHECK_RETCODE(err);
-+ /* To allow time for the supply voltages
-+ * and clock circuits to stabilize.
-+ */
-+ msleep(5);
-+ buf[0] = MIPI_DCS_SET_DISPLAY_ON;
-+ err = mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM,
-+ buf, 0);
-+ CHECK_RETCODE(err);
-+
-+ err = mipid_init_backlight(mipi_dsi);
-+ return err;
-+}
-+
-+static int mipid_bl_update_status(struct backlight_device *bl)
-+{
-+ u32 buf;
-+ int brightness = bl->props.brightness;
-+ struct mipi_dsi_info *mipi_dsi = bl_get_data(bl);
-+
-+ if (bl->props.power != FB_BLANK_UNBLANK ||
-+ bl->props.fb_blank != FB_BLANK_UNBLANK)
-+ brightness = 0;
-+
-+ buf = HX8369_CMD_WRT_DISP_BRIGHT |
-+ ((brightness & HX8369BL_MAX_BRIGHT) << 8);
-+ mipi_dsi_pkt_write(mipi_dsi, MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM,
-+ &buf, 0);
-+
-+ hx8369bl_brightness = brightness & HX8369BL_MAX_BRIGHT;
-+
-+ dev_dbg(&bl->dev, "mipid backlight bringtness:%d.\n", brightness);
-+ return 0;
-+}
-+
-+static int mipid_bl_get_brightness(struct backlight_device *bl)
-+{
-+ return hx8369bl_brightness;
-+}
-+
-+static int mipi_bl_check_fb(struct backlight_device *bl, struct fb_info *fbi)
-+{
-+ return 0;
-+}
-+
-+static const struct backlight_ops mipid_lcd_bl_ops = {
-+ .update_status = mipid_bl_update_status,
-+ .get_brightness = mipid_bl_get_brightness,
-+ .check_fb = mipi_bl_check_fb,
-+};
-+
-+static int mipid_init_backlight(struct mipi_dsi_info *mipi_dsi)
-+{
-+ struct backlight_properties props;
-+ struct backlight_device *bl;
-+
-+ if (mipi_dsi->bl) {
-+ pr_debug("mipid backlight already init!\n");
-+ return 0;
-+ }
-+ memset(&props, 0, sizeof(struct backlight_properties));
-+ props.max_brightness = HX8369BL_MAX_BRIGHT;
-+ props.type = BACKLIGHT_RAW;
-+ bl = backlight_device_register("mipid-bl", &mipi_dsi->pdev->dev,
-+ mipi_dsi, &mipid_lcd_bl_ops, &props);
-+ if (IS_ERR(bl)) {
-+ pr_err("error %ld on backlight register\n", PTR_ERR(bl));
-+ return PTR_ERR(bl);
-+ }
-+ mipi_dsi->bl = bl;
-+ bl->props.power = FB_BLANK_UNBLANK;
-+ bl->props.fb_blank = FB_BLANK_UNBLANK;
-+ bl->props.brightness = HX8369BL_DEF_BRIGHT;
-+
-+ mipid_bl_update_status(bl);
-+ return 0;
-+}
diff -Nur linux-3.14.54.orig/drivers/video/mxsfb.c linux-3.14.54/drivers/video/mxsfb.c
--- linux-3.14.54.orig/drivers/video/mxsfb.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/drivers/video/mxsfb.c 2015-10-12 10:56:18.190351151 +0200
++++ linux-3.14.54/drivers/video/mxsfb.c 2015-10-15 15:51:25.564634769 +0200
@@ -96,9 +96,10 @@
#define CTRL_DF24 (1 << 1)
#define CTRL_RUN (1 << 0)
@@ -325183,7 +325165,7 @@ diff -Nur linux-3.14.54.orig/drivers/video/mxsfb.c linux-3.14.54/drivers/video/m
static struct platform_device_id mxsfb_devtype[] = {
diff -Nur linux-3.14.54.orig/drivers/video/vexpress-dvi.c linux-3.14.54/drivers/video/vexpress-dvi.c
--- linux-3.14.54.orig/drivers/video/vexpress-dvi.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/drivers/video/vexpress-dvi.c 2015-10-12 10:56:18.191351150 +0200
++++ linux-3.14.54/drivers/video/vexpress-dvi.c 2015-10-15 15:51:25.564634769 +0200
@@ -0,0 +1,220 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
@@ -325405,29 +325387,9 @@ diff -Nur linux-3.14.54.orig/drivers/video/vexpress-dvi.c linux-3.14.54/drivers/
+ return platform_driver_register(&vexpress_dvi_driver);
+}
+device_initcall(vexpress_dvi_init);
-diff -Nur linux-3.14.54.orig/firmware/Makefile linux-3.14.54/firmware/Makefile
---- linux-3.14.54.orig/firmware/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/firmware/Makefile 2015-10-12 10:56:18.191351150 +0200
-@@ -61,6 +61,7 @@
- radeon/RV770_pfp.bin radeon/RV770_me.bin \
- radeon/RV730_pfp.bin radeon/RV730_me.bin \
- radeon/RV710_pfp.bin radeon/RV710_me.bin
-+fw-shipped-$(CONFIG_IMX_SDMA) += imx/sdma/sdma-imx6q.bin
- fw-shipped-$(CONFIG_DVB_AV7110) += av7110/bootcode.bin
- fw-shipped-$(CONFIG_DVB_TTUSB_BUDGET) += ttusb-budget/dspbootcode.bin
- fw-shipped-$(CONFIG_E100) += e100/d101m_ucode.bin e100/d101s_ucode.bin \
-@@ -210,6 +211,8 @@
- $(obj)/%: $(obj)/%.ihex | $(objtree)/$(obj)/$$(dir %)
- $(call cmd,ihex)
-
-+.NOTPARALLEL: $(obj)/%
-+
- # Don't depend on ihex2fw if we're installing and it already exists.
- # Putting it after | in the dependencies doesn't seem sufficient when
- # we're installing after a cross-compile, because ihex2fw has dependencies
diff -Nur linux-3.14.54.orig/firmware/imx/sdma/sdma-imx6q.bin.ihex linux-3.14.54/firmware/imx/sdma/sdma-imx6q.bin.ihex
--- linux-3.14.54.orig/firmware/imx/sdma/sdma-imx6q.bin.ihex 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/firmware/imx/sdma/sdma-imx6q.bin.ihex 2015-10-12 10:56:18.191351150 +0200
++++ linux-3.14.54/firmware/imx/sdma/sdma-imx6q.bin.ihex 2015-10-15 15:51:25.564634769 +0200
@@ -0,0 +1,116 @@
+:1000000053444D4101000000010000001C000000AD
+:1000100026000000B40000007A0600008202000002
@@ -325545,9 +325507,29 @@ diff -Nur linux-3.14.54.orig/firmware/imx/sdma/sdma-imx6q.bin.ihex linux-3.14.54
+:10071000DD6F087FD169010FC86FDD6F037F0101B5
+:0E0720000004129B0700FF680C680002129B89
+:00000001FF
+diff -Nur linux-3.14.54.orig/firmware/Makefile linux-3.14.54/firmware/Makefile
+--- linux-3.14.54.orig/firmware/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/firmware/Makefile 2015-10-15 15:51:25.564634769 +0200
+@@ -61,6 +61,7 @@
+ radeon/RV770_pfp.bin radeon/RV770_me.bin \
+ radeon/RV730_pfp.bin radeon/RV730_me.bin \
+ radeon/RV710_pfp.bin radeon/RV710_me.bin
++fw-shipped-$(CONFIG_IMX_SDMA) += imx/sdma/sdma-imx6q.bin
+ fw-shipped-$(CONFIG_DVB_AV7110) += av7110/bootcode.bin
+ fw-shipped-$(CONFIG_DVB_TTUSB_BUDGET) += ttusb-budget/dspbootcode.bin
+ fw-shipped-$(CONFIG_E100) += e100/d101m_ucode.bin e100/d101s_ucode.bin \
+@@ -210,6 +211,8 @@
+ $(obj)/%: $(obj)/%.ihex | $(objtree)/$(obj)/$$(dir %)
+ $(call cmd,ihex)
+
++.NOTPARALLEL: $(obj)/%
++
+ # Don't depend on ihex2fw if we're installing and it already exists.
+ # Putting it after | in the dependencies doesn't seem sufficient when
+ # we're installing after a cross-compile, because ihex2fw has dependencies
diff -Nur linux-3.14.54.orig/fs/btrfs/Kconfig linux-3.14.54/fs/btrfs/Kconfig
--- linux-3.14.54.orig/fs/btrfs/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/fs/btrfs/Kconfig 2015-10-12 10:56:18.192351150 +0200
++++ linux-3.14.54/fs/btrfs/Kconfig 2015-10-15 15:51:25.564634769 +0200
@@ -1,5 +1,6 @@
config BTRFS_FS
tristate "Btrfs filesystem support"
@@ -325557,7 +325539,7 @@ diff -Nur linux-3.14.54.orig/fs/btrfs/Kconfig linux-3.14.54/fs/btrfs/Kconfig
select ZLIB_INFLATE
diff -Nur linux-3.14.54.orig/fs/buffer.c linux-3.14.54/fs/buffer.c
--- linux-3.14.54.orig/fs/buffer.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/fs/buffer.c 2015-10-12 10:56:18.192351150 +0200
++++ linux-3.14.54/fs/buffer.c 2015-10-15 15:51:25.564634769 +0200
@@ -3110,7 +3110,7 @@
* until the buffer gets unlocked).
*
@@ -325569,7 +325551,7 @@ diff -Nur linux-3.14.54.orig/fs/buffer.c linux-3.14.54/fs/buffer.c
* All of the buffers must be for the same device, and must also be a
diff -Nur linux-3.14.54.orig/fs/compat_binfmt_elf.c linux-3.14.54/fs/compat_binfmt_elf.c
--- linux-3.14.54.orig/fs/compat_binfmt_elf.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/fs/compat_binfmt_elf.c 2015-10-12 10:56:18.192351150 +0200
++++ linux-3.14.54/fs/compat_binfmt_elf.c 2015-10-15 15:51:25.564634769 +0200
@@ -88,6 +88,11 @@
#define ELF_HWCAP COMPAT_ELF_HWCAP
#endif
@@ -325584,7 +325566,7 @@ diff -Nur linux-3.14.54.orig/fs/compat_binfmt_elf.c linux-3.14.54/fs/compat_binf
#define ARCH_DLINFO COMPAT_ARCH_DLINFO
diff -Nur linux-3.14.54.orig/fs/debugfs/inode.c linux-3.14.54/fs/debugfs/inode.c
--- linux-3.14.54.orig/fs/debugfs/inode.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/fs/debugfs/inode.c 2015-10-12 10:56:18.193351150 +0200
++++ linux-3.14.54/fs/debugfs/inode.c 2015-10-15 15:51:25.564634769 +0200
@@ -367,7 +367,7 @@
* @name: a pointer to a string containing the name of the file to create.
* @mode: the permission that the file should have.
@@ -325614,7 +325596,7 @@ diff -Nur linux-3.14.54.orig/fs/debugfs/inode.c linux-3.14.54/fs/debugfs/inode.c
* @target: a pointer to a string containing the path to the target of the
diff -Nur linux-3.14.54.orig/include/asm-generic/word-at-a-time.h linux-3.14.54/include/asm-generic/word-at-a-time.h
--- linux-3.14.54.orig/include/asm-generic/word-at-a-time.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/asm-generic/word-at-a-time.h 2015-10-12 10:56:18.193351150 +0200
++++ linux-3.14.54/include/asm-generic/word-at-a-time.h 2015-10-15 15:51:25.564634769 +0200
@@ -50,7 +50,7 @@
}
@@ -325626,7 +325608,7 @@ diff -Nur linux-3.14.54.orig/include/asm-generic/word-at-a-time.h linux-3.14.54/
#endif /* _ASM_WORD_AT_A_TIME_H */
diff -Nur linux-3.14.54.orig/include/crypto/algapi.h linux-3.14.54/include/crypto/algapi.h
--- linux-3.14.54.orig/include/crypto/algapi.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/crypto/algapi.h 2015-10-12 10:56:18.193351150 +0200
++++ linux-3.14.54/include/crypto/algapi.h 2015-10-15 15:51:25.564634769 +0200
@@ -100,9 +100,12 @@
void *page;
u8 *buffer;
@@ -325654,7 +325636,7 @@ diff -Nur linux-3.14.54.orig/include/crypto/algapi.h linux-3.14.54/include/crypt
struct ablkcipher_walk *walk, int err);
diff -Nur linux-3.14.54.orig/include/drm/drm_fb_helper.h linux-3.14.54/include/drm/drm_fb_helper.h
--- linux-3.14.54.orig/include/drm/drm_fb_helper.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/drm/drm_fb_helper.h 2015-10-12 10:56:18.194351150 +0200
++++ linux-3.14.54/include/drm/drm_fb_helper.h 2015-10-15 15:51:25.564634769 +0200
@@ -55,7 +55,7 @@
* save the current lut when force-restoring the fbdev for e.g.
* kdbg.
@@ -325666,7 +325648,7 @@ diff -Nur linux-3.14.54.orig/include/drm/drm_fb_helper.h linux-3.14.54/include/d
*
diff -Nur linux-3.14.54.orig/include/dt-bindings/clock/imx6sl-clock.h linux-3.14.54/include/dt-bindings/clock/imx6sl-clock.h
--- linux-3.14.54.orig/include/dt-bindings/clock/imx6sl-clock.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/dt-bindings/clock/imx6sl-clock.h 2015-10-12 10:56:18.194351150 +0200
++++ linux-3.14.54/include/dt-bindings/clock/imx6sl-clock.h 2015-10-15 15:51:25.564634769 +0200
@@ -1,5 +1,5 @@
/*
- * Copyright 2013 Freescale Semiconductor, Inc.
@@ -325696,7 +325678,7 @@ diff -Nur linux-3.14.54.orig/include/dt-bindings/clock/imx6sl-clock.h linux-3.14
#endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */
diff -Nur linux-3.14.54.orig/include/linux/ahci_platform.h linux-3.14.54/include/linux/ahci_platform.h
--- linux-3.14.54.orig/include/linux/ahci_platform.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/ahci_platform.h 2015-10-12 10:56:18.194351150 +0200
++++ linux-3.14.54/include/linux/ahci_platform.h 2015-10-15 15:51:25.564634769 +0200
@@ -19,15 +19,38 @@
struct device;
@@ -325741,7 +325723,7 @@ diff -Nur linux-3.14.54.orig/include/linux/ahci_platform.h linux-3.14.54/include
#endif /* _AHCI_PLATFORM_H */
diff -Nur linux-3.14.54.orig/include/linux/amba/clcd.h linux-3.14.54/include/linux/amba/clcd.h
--- linux-3.14.54.orig/include/linux/amba/clcd.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/amba/clcd.h 2015-10-12 10:56:18.195351150 +0200
++++ linux-3.14.54/include/linux/amba/clcd.h 2015-10-15 15:51:25.564634769 +0200
@@ -243,6 +243,9 @@
val |= CNTL_BGR;
}
@@ -325773,7 +325755,7 @@ diff -Nur linux-3.14.54.orig/include/linux/amba/clcd.h linux-3.14.54/include/lin
diff -Nur linux-3.14.54.orig/include/linux/arm-hdlcd.h linux-3.14.54/include/linux/arm-hdlcd.h
--- linux-3.14.54.orig/include/linux/arm-hdlcd.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/arm-hdlcd.h 2015-10-12 10:56:18.195351150 +0200
++++ linux-3.14.54/include/linux/arm-hdlcd.h 2015-10-15 15:51:25.564634769 +0200
@@ -0,0 +1,122 @@
+/*
+ * include/linux/arm-hdlcd.h
@@ -325899,7 +325881,7 @@ diff -Nur linux-3.14.54.orig/include/linux/arm-hdlcd.h linux-3.14.54/include/lin
+};
diff -Nur linux-3.14.54.orig/include/linux/backlight.h linux-3.14.54/include/linux/backlight.h
--- linux-3.14.54.orig/include/linux/backlight.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/backlight.h 2015-10-12 10:56:18.195351150 +0200
++++ linux-3.14.54/include/linux/backlight.h 2015-10-15 15:51:25.568634506 +0200
@@ -9,6 +9,7 @@
#define _LINUX_BACKLIGHT_H
@@ -325922,7 +325904,7 @@ diff -Nur linux-3.14.54.orig/include/linux/backlight.h linux-3.14.54/include/lin
static inline void backlight_update_status(struct backlight_device *bd)
diff -Nur linux-3.14.54.orig/include/linux/busfreq-imx6.h linux-3.14.54/include/linux/busfreq-imx6.h
--- linux-3.14.54.orig/include/linux/busfreq-imx6.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/busfreq-imx6.h 2015-10-12 10:56:18.196351150 +0200
++++ linux-3.14.54/include/linux/busfreq-imx6.h 2015-10-15 15:51:25.568634506 +0200
@@ -0,0 +1,23 @@
+/*
+ * Copyright 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -325949,7 +325931,7 @@ diff -Nur linux-3.14.54.orig/include/linux/busfreq-imx6.h linux-3.14.54/include/
+#endif
diff -Nur linux-3.14.54.orig/include/linux/cgroup_subsys.h linux-3.14.54/include/linux/cgroup_subsys.h
--- linux-3.14.54.orig/include/linux/cgroup_subsys.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/cgroup_subsys.h 2015-10-12 10:56:18.196351150 +0200
++++ linux-3.14.54/include/linux/cgroup_subsys.h 2015-10-15 15:51:25.568634506 +0200
@@ -39,6 +39,10 @@
SUBSYS(blkio)
#endif
@@ -325963,7 +325945,7 @@ diff -Nur linux-3.14.54.orig/include/linux/cgroup_subsys.h linux-3.14.54/include
#endif
diff -Nur linux-3.14.54.orig/include/linux/clk-provider.h linux-3.14.54/include/linux/clk-provider.h
--- linux-3.14.54.orig/include/linux/clk-provider.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/clk-provider.h 2015-10-12 10:56:18.196351150 +0200
++++ linux-3.14.54/include/linux/clk-provider.h 2015-10-15 15:51:25.568634506 +0200
@@ -30,6 +30,13 @@
#define CLK_GET_RATE_NOCACHE BIT(6) /* do not use the cached clk rate */
#define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */
@@ -325980,7 +325962,7 @@ diff -Nur linux-3.14.54.orig/include/linux/clk-provider.h linux-3.14.54/include/
diff -Nur linux-3.14.54.orig/include/linux/cma.h linux-3.14.54/include/linux/cma.h
--- linux-3.14.54.orig/include/linux/cma.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/cma.h 2015-10-12 10:56:18.196351150 +0200
++++ linux-3.14.54/include/linux/cma.h 2015-10-15 15:51:25.568634506 +0200
@@ -0,0 +1,27 @@
+#ifndef __CMA_H__
+#define __CMA_H__
@@ -326009,24 +325991,9 @@ diff -Nur linux-3.14.54.orig/include/linux/cma.h linux-3.14.54/include/linux/cma
+extern struct page *cma_alloc(struct cma *cma, int count, unsigned int align);
+extern bool cma_release(struct cma *cma, struct page *pages, int count);
+#endif
-diff -Nur linux-3.14.54.orig/include/linux/cpu.h linux-3.14.54/include/linux/cpu.h
---- linux-3.14.54.orig/include/linux/cpu.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/cpu.h 2015-10-12 10:56:18.197351150 +0200
-@@ -226,4 +226,11 @@
- void arch_cpu_idle_exit(void);
- void arch_cpu_idle_dead(void);
-
-+#define IDLE_START 1
-+#define IDLE_END 2
-+
-+void idle_notifier_register(struct notifier_block *n);
-+void idle_notifier_unregister(struct notifier_block *n);
-+void idle_notifier_call_chain(unsigned long val);
-+
- #endif /* _LINUX_CPU_H_ */
diff -Nur linux-3.14.54.orig/include/linux/cpufeature.h linux-3.14.54/include/linux/cpufeature.h
--- linux-3.14.54.orig/include/linux/cpufeature.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/cpufeature.h 2015-10-12 10:56:18.196351150 +0200
++++ linux-3.14.54/include/linux/cpufeature.h 2015-10-15 15:51:25.568634506 +0200
@@ -0,0 +1,60 @@
+/*
+ * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
@@ -326090,7 +326057,7 @@ diff -Nur linux-3.14.54.orig/include/linux/cpufeature.h linux-3.14.54/include/li
+#endif
diff -Nur linux-3.14.54.orig/include/linux/cpufreq.h linux-3.14.54/include/linux/cpufreq.h
--- linux-3.14.54.orig/include/linux/cpufreq.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/cpufreq.h 2015-10-12 10:56:18.197351150 +0200
++++ linux-3.14.54/include/linux/cpufreq.h 2015-10-15 15:51:25.568634506 +0200
@@ -429,6 +429,9 @@
#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND)
extern struct cpufreq_governor cpufreq_gov_ondemand;
@@ -326101,9 +326068,24 @@ diff -Nur linux-3.14.54.orig/include/linux/cpufreq.h linux-3.14.54/include/linux
#elif defined(CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE)
extern struct cpufreq_governor cpufreq_gov_conservative;
#define CPUFREQ_DEFAULT_GOVERNOR (&cpufreq_gov_conservative)
+diff -Nur linux-3.14.54.orig/include/linux/cpu.h linux-3.14.54/include/linux/cpu.h
+--- linux-3.14.54.orig/include/linux/cpu.h 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/include/linux/cpu.h 2015-10-15 15:51:25.568634506 +0200
+@@ -226,4 +226,11 @@
+ void arch_cpu_idle_exit(void);
+ void arch_cpu_idle_dead(void);
+
++#define IDLE_START 1
++#define IDLE_END 2
++
++void idle_notifier_register(struct notifier_block *n);
++void idle_notifier_unregister(struct notifier_block *n);
++void idle_notifier_call_chain(unsigned long val);
++
+ #endif /* _LINUX_CPU_H_ */
diff -Nur linux-3.14.54.orig/include/linux/device_cooling.h linux-3.14.54/include/linux/device_cooling.h
--- linux-3.14.54.orig/include/linux/device_cooling.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/device_cooling.h 2015-10-12 10:56:18.197351150 +0200
++++ linux-3.14.54/include/linux/device_cooling.h 2015-10-15 15:51:25.568634506 +0200
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc.
@@ -326152,7 +326134,7 @@ diff -Nur linux-3.14.54.orig/include/linux/device_cooling.h linux-3.14.54/includ
+#endif /* __DEVICE_THERMAL_H__ */
diff -Nur linux-3.14.54.orig/include/linux/dma-contiguous.h linux-3.14.54/include/linux/dma-contiguous.h
--- linux-3.14.54.orig/include/linux/dma-contiguous.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/dma-contiguous.h 2015-10-12 10:56:18.198351150 +0200
++++ linux-3.14.54/include/linux/dma-contiguous.h 2015-10-15 15:51:25.568634506 +0200
@@ -53,18 +53,13 @@
#ifdef __KERNEL__
@@ -326215,7 +326197,7 @@ diff -Nur linux-3.14.54.orig/include/linux/dma-contiguous.h linux-3.14.54/includ
diff -Nur linux-3.14.54.orig/include/linux/dmaengine.h linux-3.14.54/include/linux/dmaengine.h
--- linux-3.14.54.orig/include/linux/dmaengine.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/dmaengine.h 2015-10-12 10:56:18.198351150 +0200
++++ linux-3.14.54/include/linux/dmaengine.h 2015-10-15 15:51:25.568634506 +0200
@@ -333,6 +333,8 @@
* @slave_id: Slave requester id. Only valid for slave channels. The dma
* slave peripheral will have unique id as dma requester which need to be
@@ -326236,7 +326218,7 @@ diff -Nur linux-3.14.54.orig/include/linux/dmaengine.h linux-3.14.54/include/lin
/**
diff -Nur linux-3.14.54.orig/include/linux/fsl_otp.h linux-3.14.54/include/linux/fsl_otp.h
--- linux-3.14.54.orig/include/linux/fsl_otp.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/fsl_otp.h 2015-10-12 10:56:18.198351150 +0200
++++ linux-3.14.54/include/linux/fsl_otp.h 2015-10-15 15:51:25.568634506 +0200
@@ -0,0 +1,6 @@
+#ifndef _LINUX_FSL_OTP_H
+#define _LINUX_FSL_OTP_H
@@ -326246,7 +326228,7 @@ diff -Nur linux-3.14.54.orig/include/linux/fsl_otp.h linux-3.14.54/include/linux
+#endif
diff -Nur linux-3.14.54.orig/include/linux/ftrace.h linux-3.14.54/include/linux/ftrace.h
--- linux-3.14.54.orig/include/linux/ftrace.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/ftrace.h 2015-10-12 10:56:18.199351150 +0200
++++ linux-3.14.54/include/linux/ftrace.h 2015-10-15 15:51:25.568634506 +0200
@@ -605,25 +605,27 @@
#endif
}
@@ -326293,7 +326275,7 @@ diff -Nur linux-3.14.54.orig/include/linux/ftrace.h linux-3.14.54/include/linux/
extern void time_hardirqs_on(unsigned long a0, unsigned long a1);
diff -Nur linux-3.14.54.orig/include/linux/hardirq.h linux-3.14.54/include/linux/hardirq.h
--- linux-3.14.54.orig/include/linux/hardirq.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/hardirq.h 2015-10-12 10:56:18.199351150 +0200
++++ linux-3.14.54/include/linux/hardirq.h 2015-10-15 15:51:25.568634506 +0200
@@ -9,6 +9,7 @@
@@ -326304,7 +326286,7 @@ diff -Nur linux-3.14.54.orig/include/linux/hardirq.h linux-3.14.54/include/linux
diff -Nur linux-3.14.54.orig/include/linux/hsi/hsi.h linux-3.14.54/include/linux/hsi/hsi.h
--- linux-3.14.54.orig/include/linux/hsi/hsi.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/hsi/hsi.h 2015-10-12 10:56:18.199351150 +0200
++++ linux-3.14.54/include/linux/hsi/hsi.h 2015-10-15 15:51:25.568634506 +0200
@@ -178,7 +178,7 @@
* @complete: Transfer completion callback
* @destructor: Destructor to free resources when flushing
@@ -326314,9 +326296,51 @@ diff -Nur linux-3.14.54.orig/include/linux/hsi/hsi.h linux-3.14.54/include/linux
* @channel: Channel were to TX/RX the message
* @ttype: Transfer type (TX if set, RX otherwise)
* @break_frame: if true HSI will send/receive a break frame. Data buffers are
+diff -Nur linux-3.14.54.orig/include/linux/ipu.h linux-3.14.54/include/linux/ipu.h
+--- linux-3.14.54.orig/include/linux/ipu.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/include/linux/ipu.h 2015-10-15 15:51:25.568634506 +0200
+@@ -0,0 +1,38 @@
++/*
++ * Copyright 2005-2013 Freescale Semiconductor, Inc.
++ */
++
++/*
++ * The code contained herein is licensed under the GNU Lesser General
++ * Public License. You may obtain a copy of the GNU Lesser General
++ * Public License Version 2.1 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/lgpl-license.html
++ * http://www.gnu.org/copyleft/lgpl.html
++ */
++
++/*!
++ * @defgroup IPU MXC Image Processing Unit (IPU) Driver
++ */
++/*!
++ * @file linux/ipu.h
++ *
++ * @brief This file contains the IPU driver API declarations.
++ *
++ * @ingroup IPU
++ */
++
++#ifndef __LINUX_IPU_H__
++#define __LINUX_IPU_H__
++
++#include <linux/interrupt.h>
++#include <uapi/linux/ipu.h>
++
++unsigned int fmt_to_bpp(unsigned int pixelformat);
++cs_t colorspaceofpixel(int fmt);
++int need_csc(int ifmt, int ofmt);
++
++int ipu_queue_task(struct ipu_task *task);
++int ipu_check_task(struct ipu_task *task);
++
++#endif
diff -Nur linux-3.14.54.orig/include/linux/ipu-v3.h linux-3.14.54/include/linux/ipu-v3.h
--- linux-3.14.54.orig/include/linux/ipu-v3.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/ipu-v3.h 2015-10-12 10:56:18.200351150 +0200
++++ linux-3.14.54/include/linux/ipu-v3.h 2015-10-15 15:51:25.568634506 +0200
@@ -0,0 +1,752 @@
+/*
+ * Copyright (c) 2010 Sascha Hauer <s.hauer@pengutronix.de>
@@ -327070,51 +327094,9 @@ diff -Nur linux-3.14.54.orig/include/linux/ipu-v3.h linux-3.14.54/include/linux/
+};
+
+#endif /* __LINUX_IPU_V3_H_ */
-diff -Nur linux-3.14.54.orig/include/linux/ipu.h linux-3.14.54/include/linux/ipu.h
---- linux-3.14.54.orig/include/linux/ipu.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/ipu.h 2015-10-12 10:56:18.199351150 +0200
-@@ -0,0 +1,38 @@
-+/*
-+ * Copyright 2005-2013 Freescale Semiconductor, Inc.
-+ */
-+
-+/*
-+ * The code contained herein is licensed under the GNU Lesser General
-+ * Public License. You may obtain a copy of the GNU Lesser General
-+ * Public License Version 2.1 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/lgpl-license.html
-+ * http://www.gnu.org/copyleft/lgpl.html
-+ */
-+
-+/*!
-+ * @defgroup IPU MXC Image Processing Unit (IPU) Driver
-+ */
-+/*!
-+ * @file linux/ipu.h
-+ *
-+ * @brief This file contains the IPU driver API declarations.
-+ *
-+ * @ingroup IPU
-+ */
-+
-+#ifndef __LINUX_IPU_H__
-+#define __LINUX_IPU_H__
-+
-+#include <linux/interrupt.h>
-+#include <uapi/linux/ipu.h>
-+
-+unsigned int fmt_to_bpp(unsigned int pixelformat);
-+cs_t colorspaceofpixel(int fmt);
-+int need_csc(int ifmt, int ofmt);
-+
-+int ipu_queue_task(struct ipu_task *task);
-+int ipu_check_task(struct ipu_task *task);
-+
-+#endif
diff -Nur linux-3.14.54.orig/include/linux/isl29023.h linux-3.14.54/include/linux/isl29023.h
--- linux-3.14.54.orig/include/linux/isl29023.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/isl29023.h 2015-10-12 10:56:18.200351150 +0200
++++ linux-3.14.54/include/linux/isl29023.h 2015-10-15 15:51:25.568634506 +0200
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -327165,7 +327147,7 @@ diff -Nur linux-3.14.54.orig/include/linux/isl29023.h linux-3.14.54/include/linu
+#endif
diff -Nur linux-3.14.54.orig/include/linux/kfifo.h linux-3.14.54/include/linux/kfifo.h
--- linux-3.14.54.orig/include/linux/kfifo.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/kfifo.h 2015-10-12 10:56:18.200351150 +0200
++++ linux-3.14.54/include/linux/kfifo.h 2015-10-15 15:51:25.568634506 +0200
@@ -722,7 +722,7 @@
/**
* kfifo_dma_out_finish - finish a DMA OUT operation
@@ -327175,30 +327157,9 @@ diff -Nur linux-3.14.54.orig/include/linux/kfifo.h linux-3.14.54/include/linux/k
*
* This macro finish a DMA OUT operation. The out counter will be updated by
* the len parameter. No error checking will be done.
-diff -Nur linux-3.14.54.orig/include/linux/mailbox.h linux-3.14.54/include/linux/mailbox.h
---- linux-3.14.54.orig/include/linux/mailbox.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/mailbox.h 1970-01-01 01:00:00.000000000 +0100
-@@ -1,17 +0,0 @@
--/*
-- * This program is free software; you can redistribute it and/or modify it
-- * under the terms and conditions of the GNU General Public License,
-- * version 2, as published by the Free Software Foundation.
-- *
-- * This program is distributed in the hope it will be useful, but WITHOUT
-- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
-- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
-- * more details.
-- *
-- * You should have received a copy of the GNU General Public License along with
-- * this program. If not, see <http://www.gnu.org/licenses/>.
-- */
--
--int pl320_ipc_transmit(u32 *data);
--int pl320_ipc_register_notifier(struct notifier_block *nb);
--int pl320_ipc_unregister_notifier(struct notifier_block *nb);
diff -Nur linux-3.14.54.orig/include/linux/mailbox_client.h linux-3.14.54/include/linux/mailbox_client.h
--- linux-3.14.54.orig/include/linux/mailbox_client.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/mailbox_client.h 2015-10-12 10:56:18.200351150 +0200
++++ linux-3.14.54/include/linux/mailbox_client.h 2015-10-15 15:51:25.568634506 +0200
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2014 Linaro Ltd.
@@ -327248,7 +327209,7 @@ diff -Nur linux-3.14.54.orig/include/linux/mailbox_client.h linux-3.14.54/includ
+#endif /* __MAILBOX_CLIENT_H */
diff -Nur linux-3.14.54.orig/include/linux/mailbox_controller.h linux-3.14.54/include/linux/mailbox_controller.h
--- linux-3.14.54.orig/include/linux/mailbox_controller.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/mailbox_controller.h 2015-10-12 10:56:18.200351150 +0200
++++ linux-3.14.54/include/linux/mailbox_controller.h 2015-10-15 15:51:25.568634506 +0200
@@ -0,0 +1,121 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
@@ -327371,9 +327332,30 @@ diff -Nur linux-3.14.54.orig/include/linux/mailbox_controller.h linux-3.14.54/in
+void mbox_controller_unregister(struct mbox_controller *mbox);
+
+#endif /* __MAILBOX_CONTROLLER_H */
+diff -Nur linux-3.14.54.orig/include/linux/mailbox.h linux-3.14.54/include/linux/mailbox.h
+--- linux-3.14.54.orig/include/linux/mailbox.h 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/include/linux/mailbox.h 1970-01-01 01:00:00.000000000 +0100
+@@ -1,17 +0,0 @@
+-/*
+- * This program is free software; you can redistribute it and/or modify it
+- * under the terms and conditions of the GNU General Public License,
+- * version 2, as published by the Free Software Foundation.
+- *
+- * This program is distributed in the hope it will be useful, but WITHOUT
+- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+- * more details.
+- *
+- * You should have received a copy of the GNU General Public License along with
+- * this program. If not, see <http://www.gnu.org/licenses/>.
+- */
+-
+-int pl320_ipc_transmit(u32 *data);
+-int pl320_ipc_register_notifier(struct notifier_block *nb);
+-int pl320_ipc_unregister_notifier(struct notifier_block *nb);
diff -Nur linux-3.14.54.orig/include/linux/memblock.h linux-3.14.54/include/linux/memblock.h
--- linux-3.14.54.orig/include/linux/memblock.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/memblock.h 2015-10-12 10:56:18.201351150 +0200
++++ linux-3.14.54/include/linux/memblock.h 2015-10-15 15:51:25.572634243 +0200
@@ -221,6 +221,8 @@
#define MEMBLOCK_ALLOC_ANYWHERE (~(phys_addr_t)0)
#define MEMBLOCK_ALLOC_ACCESSIBLE 0
@@ -327385,7 +327367,7 @@ diff -Nur linux-3.14.54.orig/include/linux/memblock.h linux-3.14.54/include/linu
phys_addr_t __memblock_alloc_base(phys_addr_t size, phys_addr_t align,
diff -Nur linux-3.14.54.orig/include/linux/mfd/abx500/ab8500.h linux-3.14.54/include/linux/mfd/abx500/ab8500.h
--- linux-3.14.54.orig/include/linux/mfd/abx500/ab8500.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/mfd/abx500/ab8500.h 2015-10-12 10:56:18.201351150 +0200
++++ linux-3.14.54/include/linux/mfd/abx500/ab8500.h 2015-10-15 15:51:25.572634243 +0200
@@ -347,7 +347,6 @@
struct mutex lock;
struct mutex irq_lock;
@@ -327404,7 +327386,7 @@ diff -Nur linux-3.14.54.orig/include/linux/mfd/abx500/ab8500.h linux-3.14.54/inc
struct ab8500_codec_platform_data *codec;
diff -Nur linux-3.14.54.orig/include/linux/mfd/dbx500-prcmu.h linux-3.14.54/include/linux/mfd/dbx500-prcmu.h
--- linux-3.14.54.orig/include/linux/mfd/dbx500-prcmu.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/mfd/dbx500-prcmu.h 2015-10-12 10:56:18.202351150 +0200
++++ linux-3.14.54/include/linux/mfd/dbx500-prcmu.h 2015-10-15 15:51:25.572634243 +0200
@@ -183,8 +183,6 @@
bool enable_set_ddr_opp;
bool enable_ape_opp_100_voltage;
@@ -327416,7 +327398,7 @@ diff -Nur linux-3.14.54.orig/include/linux/mfd/dbx500-prcmu.h linux-3.14.54/incl
u32 adt_offset;
diff -Nur linux-3.14.54.orig/include/linux/mfd/mxc-hdmi-core.h linux-3.14.54/include/linux/mfd/mxc-hdmi-core.h
--- linux-3.14.54.orig/include/linux/mfd/mxc-hdmi-core.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/mfd/mxc-hdmi-core.h 2015-10-12 10:56:18.202351150 +0200
++++ linux-3.14.54/include/linux/mfd/mxc-hdmi-core.h 2015-10-15 15:51:25.572634243 +0200
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -327488,7 +327470,7 @@ diff -Nur linux-3.14.54.orig/include/linux/mfd/mxc-hdmi-core.h linux-3.14.54/inc
+#endif
diff -Nur linux-3.14.54.orig/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h linux-3.14.54/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
--- linux-3.14.54.orig/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h 2015-10-12 10:56:18.202351150 +0200
++++ linux-3.14.54/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h 2015-10-15 15:51:25.572634243 +0200
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2012 Freescale Semiconductor, Inc.
@@ -327509,7 +327491,7 @@ diff -Nur linux-3.14.54.orig/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h linux-3
#define IMX6Q_GPR1_ADDRS3_64MB (0x1 << 10)
diff -Nur linux-3.14.54.orig/include/linux/mipi_csi2.h linux-3.14.54/include/linux/mipi_csi2.h
--- linux-3.14.54.orig/include/linux/mipi_csi2.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/mipi_csi2.h 2015-10-12 10:56:18.203351150 +0200
++++ linux-3.14.54/include/linux/mipi_csi2.h 2015-10-15 15:51:25.572634243 +0200
@@ -0,0 +1,93 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -327606,7 +327588,7 @@ diff -Nur linux-3.14.54.orig/include/linux/mipi_csi2.h linux-3.14.54/include/lin
+#endif
diff -Nur linux-3.14.54.orig/include/linux/mipi_dsi.h linux-3.14.54/include/linux/mipi_dsi.h
--- linux-3.14.54.orig/include/linux/mipi_dsi.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/mipi_dsi.h 2015-10-12 10:56:18.203351150 +0200
++++ linux-3.14.54/include/linux/mipi_dsi.h 2015-10-15 15:51:25.572634243 +0200
@@ -0,0 +1,171 @@
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -327781,7 +327763,7 @@ diff -Nur linux-3.14.54.orig/include/linux/mipi_dsi.h linux-3.14.54/include/linu
+#endif
diff -Nur linux-3.14.54.orig/include/linux/mmc/card.h linux-3.14.54/include/linux/mmc/card.h
--- linux-3.14.54.orig/include/linux/mmc/card.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/mmc/card.h 2015-10-12 10:56:18.203351150 +0200
++++ linux-3.14.54/include/linux/mmc/card.h 2015-10-15 15:51:25.572634243 +0200
@@ -86,10 +86,13 @@
unsigned int data_sector_size; /* 512 bytes or 4KB */
unsigned int data_tag_unit_size; /* DATA TAG UNIT size */
@@ -327806,7 +327788,7 @@ diff -Nur linux-3.14.54.orig/include/linux/mmc/card.h linux-3.14.54/include/linu
u8 raw_sec_feature_support;/* 231 */
diff -Nur linux-3.14.54.orig/include/linux/mmc/host.h linux-3.14.54/include/linux/mmc/host.h
--- linux-3.14.54.orig/include/linux/mmc/host.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/mmc/host.h 2015-10-12 10:56:18.203351150 +0200
++++ linux-3.14.54/include/linux/mmc/host.h 2015-10-15 15:51:25.592632928 +0200
@@ -282,6 +282,7 @@
MMC_CAP2_PACKED_WR)
#define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */
@@ -327838,7 +327820,7 @@ diff -Nur linux-3.14.54.orig/include/linux/mmc/host.h linux-3.14.54/include/linu
int mmc_regulator_set_ocr(struct mmc_host *mmc,
diff -Nur linux-3.14.54.orig/include/linux/mmc/mmc.h linux-3.14.54/include/linux/mmc/mmc.h
--- linux-3.14.54.orig/include/linux/mmc/mmc.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/mmc/mmc.h 2015-10-12 10:56:18.204351150 +0200
++++ linux-3.14.54/include/linux/mmc/mmc.h 2015-10-15 15:51:25.592632928 +0200
@@ -292,6 +292,7 @@
#define EXT_CSD_RPMB_MULT 168 /* RO */
#define EXT_CSD_BOOT_WP 173 /* R/W */
@@ -327887,7 +327869,7 @@ diff -Nur linux-3.14.54.orig/include/linux/mmc/mmc.h linux-3.14.54/include/linux
diff -Nur linux-3.14.54.orig/include/linux/mmc/sdhci.h linux-3.14.54/include/linux/mmc/sdhci.h
--- linux-3.14.54.orig/include/linux/mmc/sdhci.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/mmc/sdhci.h 2015-10-12 10:56:18.204351150 +0200
++++ linux-3.14.54/include/linux/mmc/sdhci.h 2015-10-15 15:51:25.592632928 +0200
@@ -57,12 +57,8 @@
#define SDHCI_QUIRK_BROKEN_CARD_DETECTION (1<<15)
/* Controller reports inverted write-protect state */
@@ -327943,7 +327925,7 @@ diff -Nur linux-3.14.54.orig/include/linux/mmc/sdhci.h linux-3.14.54/include/lin
diff -Nur linux-3.14.54.orig/include/linux/mmc/sdio_ids.h linux-3.14.54/include/linux/mmc/sdio_ids.h
--- linux-3.14.54.orig/include/linux/mmc/sdio_ids.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/mmc/sdio_ids.h 2015-10-12 10:56:18.204351150 +0200
++++ linux-3.14.54/include/linux/mmc/sdio_ids.h 2015-10-15 15:51:25.592632928 +0200
@@ -31,6 +31,7 @@
#define SDIO_DEVICE_ID_BROADCOM_4334 0x4334
#define SDIO_DEVICE_ID_BROADCOM_4335_4339 0x4335
@@ -327954,7 +327936,7 @@ diff -Nur linux-3.14.54.orig/include/linux/mmc/sdio_ids.h linux-3.14.54/include/
#define SDIO_DEVICE_ID_INTEL_IWMC3200WIMAX 0x1402
diff -Nur linux-3.14.54.orig/include/linux/mod_devicetable.h linux-3.14.54/include/linux/mod_devicetable.h
--- linux-3.14.54.orig/include/linux/mod_devicetable.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/mod_devicetable.h 2015-10-12 10:56:18.205351149 +0200
++++ linux-3.14.54/include/linux/mod_devicetable.h 2015-10-15 15:51:25.592632928 +0200
@@ -564,6 +564,15 @@
#define X86_MODEL_ANY 0
#define X86_FEATURE_ANY 0 /* Same as FPU, you can't test for that */
@@ -327973,7 +327955,7 @@ diff -Nur linux-3.14.54.orig/include/linux/mod_devicetable.h linux-3.14.54/inclu
struct ipack_device_id {
diff -Nur linux-3.14.54.orig/include/linux/mtd/map.h linux-3.14.54/include/linux/mtd/map.h
--- linux-3.14.54.orig/include/linux/mtd/map.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/mtd/map.h 2015-10-12 10:56:18.205351149 +0200
++++ linux-3.14.54/include/linux/mtd/map.h 2015-10-15 15:51:25.592632928 +0200
@@ -438,7 +438,7 @@
if (map->cached)
memcpy(to, (char *)map->cached + from, len);
@@ -327985,7 +327967,7 @@ diff -Nur linux-3.14.54.orig/include/linux/mtd/map.h linux-3.14.54/include/linux
static inline void inline_map_copy_to(struct map_info *map, unsigned long to, const void *from, ssize_t len)
diff -Nur linux-3.14.54.orig/include/linux/mxc_asrc.h linux-3.14.54/include/linux/mxc_asrc.h
--- linux-3.14.54.orig/include/linux/mxc_asrc.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/mxc_asrc.h 2015-10-12 10:56:18.206351149 +0200
++++ linux-3.14.54/include/linux/mxc_asrc.h 2015-10-15 15:51:25.592632928 +0200
@@ -0,0 +1,386 @@
+/*
+ * Copyright 2008-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -328373,9 +328355,59 @@ diff -Nur linux-3.14.54.orig/include/linux/mxc_asrc.h linux-3.14.54/include/linu
+ u32 in_wm, u32 out_wm);
+
+#endif/* __MXC_ASRC_H__ */
+diff -Nur linux-3.14.54.orig/include/linux/mxcfb.h linux-3.14.54/include/linux/mxcfb.h
+--- linux-3.14.54.orig/include/linux/mxcfb.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/include/linux/mxcfb.h 2015-10-15 15:51:25.592632928 +0200
+@@ -0,0 +1,46 @@
++/*
++ * Copyright 2004-2013 Freescale Semiconductor, Inc. All Rights Reserved.
++ */
++
++/*
++ * The code contained herein is licensed under the GNU Lesser General
++ * Public License. You may obtain a copy of the GNU Lesser General
++ * Public License Version 2.1 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/lgpl-license.html
++ * http://www.gnu.org/copyleft/lgpl.html
++ */
++
++/*
++ * @file linux/mxcfb.h
++ *
++ * @brief Global header file for the MXC Frame buffer
++ *
++ * @ingroup Framebuffer
++ */
++#ifndef __LINUX_MXCFB_H__
++#define __LINUX_MXCFB_H__
++
++#include <uapi/linux/mxcfb.h>
++
++extern struct fb_videomode mxcfb_modedb[];
++extern int mxcfb_modedb_sz;
++
++enum {
++ MXC_DISP_SPEC_DEV = 0,
++ MXC_DISP_DDC_DEV = 1,
++};
++
++enum {
++ MXCFB_REFRESH_OFF,
++ MXCFB_REFRESH_AUTO,
++ MXCFB_REFRESH_PARTIAL,
++};
++
++int mxcfb_set_refresh_mode(struct fb_info *fbi, int mode,
++ struct mxcfb_rect *update_region);
++int mxc_elcdif_frame_addr_setup(dma_addr_t phys);
++void mxcfb_elcdif_register_mode(const struct fb_videomode *modedb,
++ int num_modes, int dev_mode);
++
++#endif
diff -Nur linux-3.14.54.orig/include/linux/mxc_mlb.h linux-3.14.54/include/linux/mxc_mlb.h
--- linux-3.14.54.orig/include/linux/mxc_mlb.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/mxc_mlb.h 2015-10-12 10:56:18.206351149 +0200
++++ linux-3.14.54/include/linux/mxc_mlb.h 2015-10-15 15:51:25.592632928 +0200
@@ -0,0 +1,55 @@
+/*
+ * mxc_mlb.h
@@ -328434,7 +328466,7 @@ diff -Nur linux-3.14.54.orig/include/linux/mxc_mlb.h linux-3.14.54/include/linux
+#endif /* _MXC_MLB_H */
diff -Nur linux-3.14.54.orig/include/linux/mxc_v4l2.h linux-3.14.54/include/linux/mxc_v4l2.h
--- linux-3.14.54.orig/include/linux/mxc_v4l2.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/mxc_v4l2.h 2015-10-12 10:56:18.206351149 +0200
++++ linux-3.14.54/include/linux/mxc_v4l2.h 2015-10-15 15:51:25.592632928 +0200
@@ -0,0 +1,27 @@
+/*
+ * Copyright 2004-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -328465,7 +328497,7 @@ diff -Nur linux-3.14.54.orig/include/linux/mxc_v4l2.h linux-3.14.54/include/linu
+#endif
diff -Nur linux-3.14.54.orig/include/linux/mxc_vpu.h linux-3.14.54/include/linux/mxc_vpu.h
--- linux-3.14.54.orig/include/linux/mxc_vpu.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/mxc_vpu.h 2015-10-12 10:56:18.206351149 +0200
++++ linux-3.14.54/include/linux/mxc_vpu.h 2015-10-15 15:51:25.592632928 +0200
@@ -0,0 +1,118 @@
+/*
+ * Copyright 2004-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -328585,59 +328617,9 @@ diff -Nur linux-3.14.54.orig/include/linux/mxc_vpu.h linux-3.14.54/include/linux
+void vl2cc_cleanup(void);
+
+#endif
-diff -Nur linux-3.14.54.orig/include/linux/mxcfb.h linux-3.14.54/include/linux/mxcfb.h
---- linux-3.14.54.orig/include/linux/mxcfb.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/mxcfb.h 2015-10-12 10:56:18.206351149 +0200
-@@ -0,0 +1,46 @@
-+/*
-+ * Copyright 2004-2013 Freescale Semiconductor, Inc. All Rights Reserved.
-+ */
-+
-+/*
-+ * The code contained herein is licensed under the GNU Lesser General
-+ * Public License. You may obtain a copy of the GNU Lesser General
-+ * Public License Version 2.1 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/lgpl-license.html
-+ * http://www.gnu.org/copyleft/lgpl.html
-+ */
-+
-+/*
-+ * @file linux/mxcfb.h
-+ *
-+ * @brief Global header file for the MXC Frame buffer
-+ *
-+ * @ingroup Framebuffer
-+ */
-+#ifndef __LINUX_MXCFB_H__
-+#define __LINUX_MXCFB_H__
-+
-+#include <uapi/linux/mxcfb.h>
-+
-+extern struct fb_videomode mxcfb_modedb[];
-+extern int mxcfb_modedb_sz;
-+
-+enum {
-+ MXC_DISP_SPEC_DEV = 0,
-+ MXC_DISP_DDC_DEV = 1,
-+};
-+
-+enum {
-+ MXCFB_REFRESH_OFF,
-+ MXCFB_REFRESH_AUTO,
-+ MXCFB_REFRESH_PARTIAL,
-+};
-+
-+int mxcfb_set_refresh_mode(struct fb_info *fbi, int mode,
-+ struct mxcfb_rect *update_region);
-+int mxc_elcdif_frame_addr_setup(dma_addr_t phys);
-+void mxcfb_elcdif_register_mode(const struct fb_videomode *modedb,
-+ int num_modes, int dev_mode);
-+
-+#endif
diff -Nur linux-3.14.54.orig/include/linux/phy.h linux-3.14.54/include/linux/phy.h
--- linux-3.14.54.orig/include/linux/phy.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/phy.h 2015-10-12 10:56:18.206351149 +0200
++++ linux-3.14.54/include/linux/phy.h 2015-10-15 15:51:25.592632928 +0200
@@ -609,6 +609,7 @@
return phydev->drv->read_status(phydev);
}
@@ -328648,7 +328630,7 @@ diff -Nur linux-3.14.54.orig/include/linux/phy.h linux-3.14.54/include/linux/phy
int genphy_config_aneg(struct phy_device *phydev);
diff -Nur linux-3.14.54.orig/include/linux/pipe_fs_i.h linux-3.14.54/include/linux/pipe_fs_i.h
--- linux-3.14.54.orig/include/linux/pipe_fs_i.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/pipe_fs_i.h 2015-10-12 10:56:18.206351149 +0200
++++ linux-3.14.54/include/linux/pipe_fs_i.h 2015-10-15 15:51:25.592632928 +0200
@@ -35,7 +35,7 @@
* @tmp_page: cached released page
* @readers: number of current readers of this pipe
@@ -328660,7 +328642,7 @@ diff -Nur linux-3.14.54.orig/include/linux/pipe_fs_i.h linux-3.14.54/include/lin
* @w_counter: writer counter
diff -Nur linux-3.14.54.orig/include/linux/pl320-ipc.h linux-3.14.54/include/linux/pl320-ipc.h
--- linux-3.14.54.orig/include/linux/pl320-ipc.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/pl320-ipc.h 2015-10-12 10:56:18.207351149 +0200
++++ linux-3.14.54/include/linux/pl320-ipc.h 2015-10-15 15:51:25.592632928 +0200
@@ -0,0 +1,17 @@
+/*
+ * This program is free software; you can redistribute it and/or modify it
@@ -328681,7 +328663,7 @@ diff -Nur linux-3.14.54.orig/include/linux/pl320-ipc.h linux-3.14.54/include/lin
+int pl320_ipc_unregister_notifier(struct notifier_block *nb);
diff -Nur linux-3.14.54.orig/include/linux/platform_data/dma-imx.h linux-3.14.54/include/linux/platform_data/dma-imx.h
--- linux-3.14.54.orig/include/linux/platform_data/dma-imx.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/platform_data/dma-imx.h 2015-10-12 10:56:18.207351149 +0200
++++ linux-3.14.54/include/linux/platform_data/dma-imx.h 2015-10-15 15:51:25.592632928 +0200
@@ -1,5 +1,5 @@
/*
- * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -328724,7 +328706,7 @@ diff -Nur linux-3.14.54.orig/include/linux/platform_data/dma-imx.h linux-3.14.54
return !strcmp(chan->device->dev->driver->name, "imx-sdma") ||
diff -Nur linux-3.14.54.orig/include/linux/power/imx6_usb_charger.h linux-3.14.54/include/linux/power/imx6_usb_charger.h
--- linux-3.14.54.orig/include/linux/power/imx6_usb_charger.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/power/imx6_usb_charger.h 2015-10-12 10:56:18.207351149 +0200
++++ linux-3.14.54/include/linux/power/imx6_usb_charger.h 2015-10-15 15:51:25.592632928 +0200
@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -328808,7 +328790,7 @@ diff -Nur linux-3.14.54.orig/include/linux/power/imx6_usb_charger.h linux-3.14.5
+#endif /* __IMXUSB6_CHARGER_H */
diff -Nur linux-3.14.54.orig/include/linux/ptp_clock_kernel.h linux-3.14.54/include/linux/ptp_clock_kernel.h
--- linux-3.14.54.orig/include/linux/ptp_clock_kernel.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/ptp_clock_kernel.h 2015-10-12 10:56:18.207351149 +0200
++++ linux-3.14.54/include/linux/ptp_clock_kernel.h 2015-10-15 15:51:25.592632928 +0200
@@ -49,7 +49,11 @@
* @n_alarm: The number of programmable alarms.
* @n_ext_ts: The number of external time stamp channels.
@@ -328878,7 +328860,7 @@ diff -Nur linux-3.14.54.orig/include/linux/ptp_clock_kernel.h linux-3.14.54/incl
#endif
diff -Nur linux-3.14.54.orig/include/linux/pxp_device.h linux-3.14.54/include/linux/pxp_device.h
--- linux-3.14.54.orig/include/linux/pxp_device.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/pxp_device.h 2015-10-12 10:56:18.208351149 +0200
++++ linux-3.14.54/include/linux/pxp_device.h 2015-10-15 15:51:25.592632928 +0200
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2013-2014 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -328950,7 +328932,7 @@ diff -Nur linux-3.14.54.orig/include/linux/pxp_device.h linux-3.14.54/include/li
+#endif
diff -Nur linux-3.14.54.orig/include/linux/pxp_dma.h linux-3.14.54/include/linux/pxp_dma.h
--- linux-3.14.54.orig/include/linux/pxp_dma.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/linux/pxp_dma.h 2015-10-12 10:56:18.208351149 +0200
++++ linux-3.14.54/include/linux/pxp_dma.h 2015-10-15 15:51:25.596632665 +0200
@@ -0,0 +1,72 @@
+/*
+ * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -329026,7 +329008,7 @@ diff -Nur linux-3.14.54.orig/include/linux/pxp_dma.h linux-3.14.54/include/linux
+#endif
diff -Nur linux-3.14.54.orig/include/linux/regulator/consumer.h linux-3.14.54/include/linux/regulator/consumer.h
--- linux-3.14.54.orig/include/linux/regulator/consumer.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/regulator/consumer.h 2015-10-12 10:56:18.208351149 +0200
++++ linux-3.14.54/include/linux/regulator/consumer.h 2015-10-15 15:51:25.596632665 +0200
@@ -2,6 +2,7 @@
* consumer.h -- SoC Regulator consumer support.
*
@@ -329046,7 +329028,7 @@ diff -Nur linux-3.14.54.orig/include/linux/regulator/consumer.h linux-3.14.54/in
diff -Nur linux-3.14.54.orig/include/linux/reset.h linux-3.14.54/include/linux/reset.h
--- linux-3.14.54.orig/include/linux/reset.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/reset.h 2015-10-12 10:56:18.208351149 +0200
++++ linux-3.14.54/include/linux/reset.h 2015-10-15 15:51:25.596632665 +0200
@@ -12,6 +12,13 @@
void reset_control_put(struct reset_control *rstc);
struct reset_control *devm_reset_control_get(struct device *dev, const char *id);
@@ -329063,7 +329045,7 @@ diff -Nur linux-3.14.54.orig/include/linux/reset.h linux-3.14.54/include/linux/r
#endif
diff -Nur linux-3.14.54.orig/include/linux/serial_core.h linux-3.14.54/include/linux/serial_core.h
--- linux-3.14.54.orig/include/linux/serial_core.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/serial_core.h 2015-10-12 10:56:18.209351149 +0200
++++ linux-3.14.54/include/linux/serial_core.h 2015-10-15 15:51:25.596632665 +0200
@@ -285,6 +285,22 @@
/*
* Console helpers.
@@ -329089,7 +329071,7 @@ diff -Nur linux-3.14.54.orig/include/linux/serial_core.h linux-3.14.54/include/l
void uart_parse_options(char *options, int *baud, int *parity, int *bits,
diff -Nur linux-3.14.54.orig/include/linux/skbuff.h linux-3.14.54/include/linux/skbuff.h
--- linux-3.14.54.orig/include/linux/skbuff.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/skbuff.h 2015-10-12 10:56:18.209351149 +0200
++++ linux-3.14.54/include/linux/skbuff.h 2015-10-15 15:51:25.596632665 +0200
@@ -2039,7 +2039,7 @@
}
@@ -332047,7 +332029,7 @@ diff -Nur linux-3.14.54.orig/include/linux/skbuff.h.orig linux-3.14.54/include/l
+#endif /* _LINUX_SKBUFF_H */
diff -Nur linux-3.14.54.orig/include/linux/spi/spi.h linux-3.14.54/include/linux/spi/spi.h
--- linux-3.14.54.orig/include/linux/spi/spi.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/spi/spi.h 2015-10-12 10:56:18.210351149 +0200
++++ linux-3.14.54/include/linux/spi/spi.h 2015-10-15 15:51:25.600632400 +0200
@@ -234,7 +234,7 @@
* @mode_bits: flags understood by this controller driver
* @bits_per_word_mask: A mask indicating which values of bits_per_word are
@@ -332086,7 +332068,7 @@ diff -Nur linux-3.14.54.orig/include/linux/spi/spi.h linux-3.14.54/include/linux
* SPI_NBITS_DUAL(2x) and SPI_NBITS_QUAD(4x) to support these three transfer.
diff -Nur linux-3.14.54.orig/include/linux/syscalls.h linux-3.14.54/include/linux/syscalls.h
--- linux-3.14.54.orig/include/linux/syscalls.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/syscalls.h 2015-10-12 10:56:18.210351149 +0200
++++ linux-3.14.54/include/linux/syscalls.h 2015-10-15 15:51:25.600632400 +0200
@@ -744,6 +744,9 @@
int newdfd, const char __user *newname, int flags);
asmlinkage long sys_renameat(int olddfd, const char __user * oldname,
@@ -332099,7 +332081,7 @@ diff -Nur linux-3.14.54.orig/include/linux/syscalls.h linux-3.14.54/include/linu
asmlinkage long sys_faccessat(int dfd, const char __user *filename, int mode);
diff -Nur linux-3.14.54.orig/include/linux/usb/chipidea.h linux-3.14.54/include/linux/usb/chipidea.h
--- linux-3.14.54.orig/include/linux/usb/chipidea.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/usb/chipidea.h 2015-10-12 10:56:18.210351149 +0200
++++ linux-3.14.54/include/linux/usb/chipidea.h 2015-10-15 15:51:25.600632400 +0200
@@ -18,6 +18,7 @@
unsigned long flags;
#define CI_HDRC_REGS_SHARED BIT(0)
@@ -332125,7 +332107,7 @@ diff -Nur linux-3.14.54.orig/include/linux/usb/chipidea.h linux-3.14.54/include/
#endif
diff -Nur linux-3.14.54.orig/include/linux/usb/composite.h linux-3.14.54/include/linux/usb/composite.h
--- linux-3.14.54.orig/include/linux/usb/composite.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/usb/composite.h 2015-10-12 10:56:18.211351149 +0200
++++ linux-3.14.54/include/linux/usb/composite.h 2015-10-15 15:51:25.604632136 +0200
@@ -92,7 +92,7 @@
* @suspend: Notifies functions when the host stops sending USB traffic.
* @resume: Notifies functions when the host restarts USB traffic.
@@ -332137,7 +332119,7 @@ diff -Nur linux-3.14.54.orig/include/linux/usb/composite.h linux-3.14.54/include
*
diff -Nur linux-3.14.54.orig/include/linux/usb/phy.h linux-3.14.54/include/linux/usb/phy.h
--- linux-3.14.54.orig/include/linux/usb/phy.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/linux/usb/phy.h 2015-10-12 10:56:18.211351149 +0200
++++ linux-3.14.54/include/linux/usb/phy.h 2015-10-15 15:51:25.604632136 +0200
@@ -111,11 +111,23 @@
int (*set_suspend)(struct usb_phy *x,
int suspend);
@@ -332205,7 +332187,7 @@ diff -Nur linux-3.14.54.orig/include/linux/usb/phy.h linux-3.14.54/include/linux
static inline int
diff -Nur linux-3.14.54.orig/include/net/cfg80211.h linux-3.14.54/include/net/cfg80211.h
--- linux-3.14.54.orig/include/net/cfg80211.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/net/cfg80211.h 2015-10-12 10:56:18.212351149 +0200
++++ linux-3.14.54/include/net/cfg80211.h 2015-10-15 15:51:25.604632136 +0200
@@ -1729,7 +1729,7 @@
u8 *ssid;
size_t ssid_len;
@@ -332235,7 +332217,7 @@ diff -Nur linux-3.14.54.orig/include/net/cfg80211.h linux-3.14.54/include/net/cf
* cfg80211_notify_new_candidate - notify cfg80211 of a new mesh peer candidate
diff -Nur linux-3.14.54.orig/include/net/mac80211.h linux-3.14.54/include/net/mac80211.h
--- linux-3.14.54.orig/include/net/mac80211.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/net/mac80211.h 2015-10-12 10:56:18.213351149 +0200
++++ linux-3.14.54/include/net/mac80211.h 2015-10-15 15:51:25.608631873 +0200
@@ -1895,7 +1895,7 @@
*
* Driver informs U-APSD client support by enabling
@@ -332283,7 +332265,7 @@ diff -Nur linux-3.14.54.orig/include/net/mac80211.h linux-3.14.54/include/net/ma
int (*napi_poll)(struct ieee80211_hw *hw, int budget);
diff -Nur linux-3.14.54.orig/include/net/rtnetlink.h linux-3.14.54/include/net/rtnetlink.h
--- linux-3.14.54.orig/include/net/rtnetlink.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/net/rtnetlink.h 2015-10-12 10:56:18.213351149 +0200
++++ linux-3.14.54/include/net/rtnetlink.h 2015-10-15 15:51:25.608631873 +0200
@@ -140,7 +140,7 @@
struct nlattr *tb[]);
int rtnl_configure_link(struct net_device *dev, const struct ifinfomsg *ifm);
@@ -332295,7 +332277,7 @@ diff -Nur linux-3.14.54.orig/include/net/rtnetlink.h linux-3.14.54/include/net/r
diff -Nur linux-3.14.54.orig/include/net/tso.h linux-3.14.54/include/net/tso.h
--- linux-3.14.54.orig/include/net/tso.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/net/tso.h 2015-10-12 10:56:18.214351149 +0200
++++ linux-3.14.54/include/net/tso.h 2015-10-15 15:51:25.608631873 +0200
@@ -0,0 +1,20 @@
+#ifndef _TSO_H
+#define _TSO_H
@@ -332319,7 +332301,7 @@ diff -Nur linux-3.14.54.orig/include/net/tso.h linux-3.14.54/include/net/tso.h
+#endif /* _TSO_H */
diff -Nur linux-3.14.54.orig/include/sound/wm8962.h linux-3.14.54/include/sound/wm8962.h
--- linux-3.14.54.orig/include/sound/wm8962.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/sound/wm8962.h 2015-10-12 10:56:18.214351149 +0200
++++ linux-3.14.54/include/sound/wm8962.h 2015-10-15 15:51:25.608631873 +0200
@@ -55,6 +55,9 @@
* in a DC measurement configuration.
*/
@@ -332332,7 +332314,7 @@ diff -Nur linux-3.14.54.orig/include/sound/wm8962.h linux-3.14.54/include/sound/
#endif
diff -Nur linux-3.14.54.orig/include/trace/events/cpufreq_interactive.h linux-3.14.54/include/trace/events/cpufreq_interactive.h
--- linux-3.14.54.orig/include/trace/events/cpufreq_interactive.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/trace/events/cpufreq_interactive.h 2015-10-12 10:56:18.214351149 +0200
++++ linux-3.14.54/include/trace/events/cpufreq_interactive.h 2015-10-15 15:51:25.608631873 +0200
@@ -0,0 +1,112 @@
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM cpufreq_interactive
@@ -332448,7 +332430,7 @@ diff -Nur linux-3.14.54.orig/include/trace/events/cpufreq_interactive.h linux-3.
+#include <trace/define_trace.h>
diff -Nur linux-3.14.54.orig/include/trace/events/thermal.h linux-3.14.54/include/trace/events/thermal.h
--- linux-3.14.54.orig/include/trace/events/thermal.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/trace/events/thermal.h 2015-10-12 10:56:18.214351149 +0200
++++ linux-3.14.54/include/trace/events/thermal.h 2015-10-15 15:51:25.608631873 +0200
@@ -0,0 +1,83 @@
+#undef TRACE_SYSTEM
+#define TRACE_SYSTEM thermal
@@ -332533,39 +332515,9 @@ diff -Nur linux-3.14.54.orig/include/trace/events/thermal.h linux-3.14.54/includ
+
+/* This part must be outside protection */
+#include <trace/define_trace.h>
-diff -Nur linux-3.14.54.orig/include/uapi/linux/Kbuild linux-3.14.54/include/uapi/linux/Kbuild
---- linux-3.14.54.orig/include/uapi/linux/Kbuild 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/uapi/linux/Kbuild 2015-10-12 10:56:18.214351149 +0200
-@@ -226,6 +226,7 @@
- header-y += kvm_para.h
- endif
-
-+header-y += ipu.h
- header-y += l2tp.h
- header-y += libc-compat.h
- header-y += limits.h
-@@ -253,6 +254,9 @@
- header-y += msdos_fs.h
- header-y += msg.h
- header-y += mtio.h
-+header-y += mxcfb.h
-+header-y += mxc_asrc.h
-+header-y += mxc_v4l2.h
- header-y += n_r3964.h
- header-y += nbd.h
- header-y += ncp.h
-@@ -318,6 +322,8 @@
- header-y += prctl.h
- header-y += ptp_clock.h
- header-y += ptrace.h
-+header-y += pxp_dma.h
-+header-y += pxp_device.h
- header-y += qnx4_fs.h
- header-y += qnxtypes.h
- header-y += quota.h
diff -Nur linux-3.14.54.orig/include/uapi/linux/ipu.h linux-3.14.54/include/uapi/linux/ipu.h
--- linux-3.14.54.orig/include/uapi/linux/ipu.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/uapi/linux/ipu.h 2015-10-12 10:56:18.214351149 +0200
++++ linux-3.14.54/include/uapi/linux/ipu.h 2015-10-15 15:51:25.608631873 +0200
@@ -0,0 +1,282 @@
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc. All Rights Reserved
@@ -332851,7 +332803,7 @@ diff -Nur linux-3.14.54.orig/include/uapi/linux/ipu.h linux-3.14.54/include/uapi
+#endif
diff -Nur linux-3.14.54.orig/include/uapi/linux/isl29023.h linux-3.14.54/include/uapi/linux/isl29023.h
--- linux-3.14.54.orig/include/uapi/linux/isl29023.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/uapi/linux/isl29023.h 2015-10-12 10:56:18.214351149 +0200
++++ linux-3.14.54/include/uapi/linux/isl29023.h 2015-10-15 15:51:25.608631873 +0200
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -332900,9 +332852,39 @@ diff -Nur linux-3.14.54.orig/include/uapi/linux/isl29023.h linux-3.14.54/include
+#define ISL29023_RANGE_64K 0x3
+
+#endif
+diff -Nur linux-3.14.54.orig/include/uapi/linux/Kbuild linux-3.14.54/include/uapi/linux/Kbuild
+--- linux-3.14.54.orig/include/uapi/linux/Kbuild 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/include/uapi/linux/Kbuild 2015-10-15 15:51:25.608631873 +0200
+@@ -226,6 +226,7 @@
+ header-y += kvm_para.h
+ endif
+
++header-y += ipu.h
+ header-y += l2tp.h
+ header-y += libc-compat.h
+ header-y += limits.h
+@@ -253,6 +254,9 @@
+ header-y += msdos_fs.h
+ header-y += msg.h
+ header-y += mtio.h
++header-y += mxcfb.h
++header-y += mxc_asrc.h
++header-y += mxc_v4l2.h
+ header-y += n_r3964.h
+ header-y += nbd.h
+ header-y += ncp.h
+@@ -318,6 +322,8 @@
+ header-y += prctl.h
+ header-y += ptp_clock.h
+ header-y += ptrace.h
++header-y += pxp_dma.h
++header-y += pxp_device.h
+ header-y += qnx4_fs.h
+ header-y += qnxtypes.h
+ header-y += quota.h
diff -Nur linux-3.14.54.orig/include/uapi/linux/mxc_asrc.h linux-3.14.54/include/uapi/linux/mxc_asrc.h
--- linux-3.14.54.orig/include/uapi/linux/mxc_asrc.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/uapi/linux/mxc_asrc.h 2015-10-12 10:56:18.215351149 +0200
++++ linux-3.14.54/include/uapi/linux/mxc_asrc.h 2015-10-15 15:51:25.608631873 +0200
@@ -0,0 +1,143 @@
+/*
+ * Copyright 2008-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -333047,128 +333029,9 @@ diff -Nur linux-3.14.54.orig/include/uapi/linux/mxc_asrc.h linux-3.14.54/include
+ ASRC_INPUT_BUFFER_UNDERRUN = 0x10,
+};
+#endif/* __MXC_ASRC_UAPI_H__ */
-diff -Nur linux-3.14.54.orig/include/uapi/linux/mxc_mlb.h linux-3.14.54/include/uapi/linux/mxc_mlb.h
---- linux-3.14.54.orig/include/uapi/linux/mxc_mlb.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/uapi/linux/mxc_mlb.h 2015-10-12 10:56:18.215351149 +0200
-@@ -0,0 +1,55 @@
-+/*
-+ * mxc_mlb.h
-+ *
-+ * Copyright 2008-2013 Freescale Semiconductor, Inc. All Rights Reserved.
-+ */
-+
-+/*
-+ * The code contained herein is licensed under the GNU General Public
-+ * License. You may obtain a copy of the GNU General Public License
-+ * Version 2 or later at the following locations:
-+ *
-+ * http://www.opensource.org/licenses/gpl-license.html
-+ * http://www.gnu.org/copyleft/gpl.html
-+ */
-+
-+#ifndef _MXC_MLB_UAPI_H
-+#define _MXC_MLB_UAPI_H
-+
-+/* define IOCTL command */
-+#define MLB_DBG_RUNTIME _IO('S', 0x09)
-+#define MLB_SET_FPS _IOW('S', 0x10, unsigned int)
-+#define MLB_GET_VER _IOR('S', 0x11, unsigned long)
-+#define MLB_SET_DEVADDR _IOR('S', 0x12, unsigned char)
-+
-+/*!
-+ * set channel address for each logical channel
-+ * the MSB 16bits is for tx channel, the left LSB is for rx channel
-+ */
-+#define MLB_CHAN_SETADDR _IOW('S', 0x13, unsigned int)
-+#define MLB_CHAN_STARTUP _IO('S', 0x14)
-+#define MLB_CHAN_SHUTDOWN _IO('S', 0x15)
-+#define MLB_CHAN_GETEVENT _IOR('S', 0x16, unsigned long)
-+
-+#define MLB_SET_ISOC_BLKSIZE_188 _IO('S', 0x17)
-+#define MLB_SET_ISOC_BLKSIZE_196 _IO('S', 0x18)
-+#define MLB_SET_SYNC_QUAD _IOW('S', 0x19, unsigned int)
-+#define MLB_IRQ_ENABLE _IO('S', 0x20)
-+#define MLB_IRQ_DISABLE _IO('S', 0x21)
-+
-+/*!
-+ * MLB event define
-+ */
-+enum {
-+ MLB_EVT_TX_PROTO_ERR_CUR = 1 << 0,
-+ MLB_EVT_TX_BRK_DETECT_CUR = 1 << 1,
-+ MLB_EVT_TX_PROTO_ERR_PREV = 1 << 8,
-+ MLB_EVT_TX_BRK_DETECT_PREV = 1 << 9,
-+ MLB_EVT_RX_PROTO_ERR_CUR = 1 << 16,
-+ MLB_EVT_RX_BRK_DETECT_CUR = 1 << 17,
-+ MLB_EVT_RX_PROTO_ERR_PREV = 1 << 24,
-+ MLB_EVT_RX_BRK_DETECT_PREV = 1 << 25,
-+};
-+
-+
-+#endif /* _MXC_MLB_H */
-diff -Nur linux-3.14.54.orig/include/uapi/linux/mxc_v4l2.h linux-3.14.54/include/uapi/linux/mxc_v4l2.h
---- linux-3.14.54.orig/include/uapi/linux/mxc_v4l2.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/uapi/linux/mxc_v4l2.h 2015-10-12 10:56:18.215351149 +0200
-@@ -0,0 +1,56 @@
-+/*
-+ * Copyright (C) 2013 Freescale Semiconductor, Inc. All Rights Reserved
-+ */
-+
-+/*
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License along
-+ * with this program; if not, write to the Free Software Foundation, Inc.,
-+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
-+ */
-+
-+/*!
-+ * @file uapi/linux/mxc_v4l2.h
-+ *
-+ * @brief MXC V4L2 private header file
-+ *
-+ * @ingroup MXC V4L2
-+ */
-+
-+#ifndef __ASM_ARCH_MXC_V4L2_H__
-+#define __ASM_ARCH_MXC_V4L2_H__
-+
-+/*
-+ * For IPUv1 and IPUv3, V4L2_CID_MXC_ROT means encoder ioctl ID.
-+ * And V4L2_CID_MXC_VF_ROT is viewfinder ioctl ID only for IPUv1 and IPUv3.
-+ */
-+#define V4L2_CID_MXC_ROT (V4L2_CID_PRIVATE_BASE + 0)
-+#define V4L2_CID_MXC_FLASH (V4L2_CID_PRIVATE_BASE + 1)
-+#define V4L2_CID_MXC_VF_ROT (V4L2_CID_PRIVATE_BASE + 2)
-+#define V4L2_CID_MXC_MOTION (V4L2_CID_PRIVATE_BASE + 3)
-+#define V4L2_CID_MXC_SWITCH_CAM (V4L2_CID_PRIVATE_BASE + 6)
-+
-+#define V4L2_MXC_ROTATE_NONE 0
-+#define V4L2_MXC_ROTATE_VERT_FLIP 1
-+#define V4L2_MXC_ROTATE_HORIZ_FLIP 2
-+#define V4L2_MXC_ROTATE_180 3
-+#define V4L2_MXC_ROTATE_90_RIGHT 4
-+#define V4L2_MXC_ROTATE_90_RIGHT_VFLIP 5
-+#define V4L2_MXC_ROTATE_90_RIGHT_HFLIP 6
-+#define V4L2_MXC_ROTATE_90_LEFT 7
-+
-+struct v4l2_mxc_offset {
-+ uint32_t u_offset;
-+ uint32_t v_offset;
-+};
-+
-+#endif
diff -Nur linux-3.14.54.orig/include/uapi/linux/mxcfb.h linux-3.14.54/include/uapi/linux/mxcfb.h
--- linux-3.14.54.orig/include/uapi/linux/mxcfb.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/uapi/linux/mxcfb.h 2015-10-12 10:56:18.215351149 +0200
++++ linux-3.14.54/include/uapi/linux/mxcfb.h 2015-10-15 15:51:25.608631873 +0200
@@ -0,0 +1,174 @@
+/*
+ * Copyright (C) 2013 Freescale Semiconductor, Inc. All Rights Reserved
@@ -333344,9 +333207,128 @@ diff -Nur linux-3.14.54.orig/include/uapi/linux/mxcfb.h linux-3.14.54/include/ua
+#define MXCFB_SET_UPDATE_SCHEME _IOW('F', 0x32, __u32)
+#define MXCFB_GET_WORK_BUFFER _IOWR('F', 0x34, unsigned long)
+#endif
+diff -Nur linux-3.14.54.orig/include/uapi/linux/mxc_mlb.h linux-3.14.54/include/uapi/linux/mxc_mlb.h
+--- linux-3.14.54.orig/include/uapi/linux/mxc_mlb.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/include/uapi/linux/mxc_mlb.h 2015-10-15 15:51:25.608631873 +0200
+@@ -0,0 +1,55 @@
++/*
++ * mxc_mlb.h
++ *
++ * Copyright 2008-2013 Freescale Semiconductor, Inc. All Rights Reserved.
++ */
++
++/*
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#ifndef _MXC_MLB_UAPI_H
++#define _MXC_MLB_UAPI_H
++
++/* define IOCTL command */
++#define MLB_DBG_RUNTIME _IO('S', 0x09)
++#define MLB_SET_FPS _IOW('S', 0x10, unsigned int)
++#define MLB_GET_VER _IOR('S', 0x11, unsigned long)
++#define MLB_SET_DEVADDR _IOR('S', 0x12, unsigned char)
++
++/*!
++ * set channel address for each logical channel
++ * the MSB 16bits is for tx channel, the left LSB is for rx channel
++ */
++#define MLB_CHAN_SETADDR _IOW('S', 0x13, unsigned int)
++#define MLB_CHAN_STARTUP _IO('S', 0x14)
++#define MLB_CHAN_SHUTDOWN _IO('S', 0x15)
++#define MLB_CHAN_GETEVENT _IOR('S', 0x16, unsigned long)
++
++#define MLB_SET_ISOC_BLKSIZE_188 _IO('S', 0x17)
++#define MLB_SET_ISOC_BLKSIZE_196 _IO('S', 0x18)
++#define MLB_SET_SYNC_QUAD _IOW('S', 0x19, unsigned int)
++#define MLB_IRQ_ENABLE _IO('S', 0x20)
++#define MLB_IRQ_DISABLE _IO('S', 0x21)
++
++/*!
++ * MLB event define
++ */
++enum {
++ MLB_EVT_TX_PROTO_ERR_CUR = 1 << 0,
++ MLB_EVT_TX_BRK_DETECT_CUR = 1 << 1,
++ MLB_EVT_TX_PROTO_ERR_PREV = 1 << 8,
++ MLB_EVT_TX_BRK_DETECT_PREV = 1 << 9,
++ MLB_EVT_RX_PROTO_ERR_CUR = 1 << 16,
++ MLB_EVT_RX_BRK_DETECT_CUR = 1 << 17,
++ MLB_EVT_RX_PROTO_ERR_PREV = 1 << 24,
++ MLB_EVT_RX_BRK_DETECT_PREV = 1 << 25,
++};
++
++
++#endif /* _MXC_MLB_H */
+diff -Nur linux-3.14.54.orig/include/uapi/linux/mxc_v4l2.h linux-3.14.54/include/uapi/linux/mxc_v4l2.h
+--- linux-3.14.54.orig/include/uapi/linux/mxc_v4l2.h 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/include/uapi/linux/mxc_v4l2.h 2015-10-15 15:51:25.608631873 +0200
+@@ -0,0 +1,56 @@
++/*
++ * Copyright (C) 2013 Freescale Semiconductor, Inc. All Rights Reserved
++ */
++
++/*
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License along
++ * with this program; if not, write to the Free Software Foundation, Inc.,
++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
++ */
++
++/*!
++ * @file uapi/linux/mxc_v4l2.h
++ *
++ * @brief MXC V4L2 private header file
++ *
++ * @ingroup MXC V4L2
++ */
++
++#ifndef __ASM_ARCH_MXC_V4L2_H__
++#define __ASM_ARCH_MXC_V4L2_H__
++
++/*
++ * For IPUv1 and IPUv3, V4L2_CID_MXC_ROT means encoder ioctl ID.
++ * And V4L2_CID_MXC_VF_ROT is viewfinder ioctl ID only for IPUv1 and IPUv3.
++ */
++#define V4L2_CID_MXC_ROT (V4L2_CID_PRIVATE_BASE + 0)
++#define V4L2_CID_MXC_FLASH (V4L2_CID_PRIVATE_BASE + 1)
++#define V4L2_CID_MXC_VF_ROT (V4L2_CID_PRIVATE_BASE + 2)
++#define V4L2_CID_MXC_MOTION (V4L2_CID_PRIVATE_BASE + 3)
++#define V4L2_CID_MXC_SWITCH_CAM (V4L2_CID_PRIVATE_BASE + 6)
++
++#define V4L2_MXC_ROTATE_NONE 0
++#define V4L2_MXC_ROTATE_VERT_FLIP 1
++#define V4L2_MXC_ROTATE_HORIZ_FLIP 2
++#define V4L2_MXC_ROTATE_180 3
++#define V4L2_MXC_ROTATE_90_RIGHT 4
++#define V4L2_MXC_ROTATE_90_RIGHT_VFLIP 5
++#define V4L2_MXC_ROTATE_90_RIGHT_HFLIP 6
++#define V4L2_MXC_ROTATE_90_LEFT 7
++
++struct v4l2_mxc_offset {
++ uint32_t u_offset;
++ uint32_t v_offset;
++};
++
++#endif
diff -Nur linux-3.14.54.orig/include/uapi/linux/ptp_clock.h linux-3.14.54/include/uapi/linux/ptp_clock.h
--- linux-3.14.54.orig/include/uapi/linux/ptp_clock.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/include/uapi/linux/ptp_clock.h 2015-10-12 10:56:18.215351149 +0200
++++ linux-3.14.54/include/uapi/linux/ptp_clock.h 2015-10-15 15:51:25.608631873 +0200
@@ -50,7 +50,8 @@
int n_ext_ts; /* Number of external time stamp channels. */
int n_per_out; /* Number of programmable periodic signals. */
@@ -333409,7 +333391,7 @@ diff -Nur linux-3.14.54.orig/include/uapi/linux/ptp_clock.h linux-3.14.54/includ
struct ptp_clock_time t; /* Time event occured. */
diff -Nur linux-3.14.54.orig/include/uapi/linux/pxp_device.h linux-3.14.54/include/uapi/linux/pxp_device.h
--- linux-3.14.54.orig/include/uapi/linux/pxp_device.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/uapi/linux/pxp_device.h 2015-10-12 10:56:18.216351149 +0200
++++ linux-3.14.54/include/uapi/linux/pxp_device.h 2015-10-15 15:51:25.608631873 +0200
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2013-2014 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -333476,7 +333458,7 @@ diff -Nur linux-3.14.54.orig/include/uapi/linux/pxp_device.h linux-3.14.54/inclu
+#endif
diff -Nur linux-3.14.54.orig/include/uapi/linux/pxp_dma.h linux-3.14.54/include/uapi/linux/pxp_dma.h
--- linux-3.14.54.orig/include/uapi/linux/pxp_dma.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/uapi/linux/pxp_dma.h 2015-10-12 10:56:18.216351149 +0200
++++ linux-3.14.54/include/uapi/linux/pxp_dma.h 2015-10-15 15:51:25.608631873 +0200
@@ -0,0 +1,173 @@
+/*
+ * Copyright (C) 2013-2014 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -333653,7 +333635,7 @@ diff -Nur linux-3.14.54.orig/include/uapi/linux/pxp_dma.h linux-3.14.54/include/
+#endif
diff -Nur linux-3.14.54.orig/include/video/mxc_edid.h linux-3.14.54/include/video/mxc_edid.h
--- linux-3.14.54.orig/include/video/mxc_edid.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/video/mxc_edid.h 2015-10-12 10:56:18.216351149 +0200
++++ linux-3.14.54/include/video/mxc_edid.h 2015-10-15 15:51:25.608631873 +0200
@@ -0,0 +1,105 @@
+/*
+ * Copyright 2009-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -333762,7 +333744,7 @@ diff -Nur linux-3.14.54.orig/include/video/mxc_edid.h linux-3.14.54/include/vide
+#endif
diff -Nur linux-3.14.54.orig/include/video/mxc_hdmi.h linux-3.14.54/include/video/mxc_hdmi.h
--- linux-3.14.54.orig/include/video/mxc_hdmi.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/include/video/mxc_hdmi.h 2015-10-12 10:56:18.217351149 +0200
++++ linux-3.14.54/include/video/mxc_hdmi.h 2015-10-15 15:51:25.608631873 +0200
@@ -0,0 +1,1027 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
@@ -334793,7 +334775,7 @@ diff -Nur linux-3.14.54.orig/include/video/mxc_hdmi.h linux-3.14.54/include/vide
+#endif /* __MXC_HDMI_H__ */
diff -Nur linux-3.14.54.orig/kernel/cpu.c linux-3.14.54/kernel/cpu.c
--- linux-3.14.54.orig/kernel/cpu.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/kernel/cpu.c 2015-10-12 10:56:18.217351149 +0200
++++ linux-3.14.54/kernel/cpu.c 2015-10-15 15:51:25.612631610 +0200
@@ -722,3 +722,22 @@
{
cpumask_copy(to_cpumask(cpu_online_bits), src);
@@ -334819,7 +334801,7 @@ diff -Nur linux-3.14.54.orig/kernel/cpu.c linux-3.14.54/kernel/cpu.c
+EXPORT_SYMBOL_GPL(idle_notifier_call_chain);
diff -Nur linux-3.14.54.orig/kernel/irq/manage.c linux-3.14.54/kernel/irq/manage.c
--- linux-3.14.54.orig/kernel/irq/manage.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/kernel/irq/manage.c 2015-10-12 10:56:18.217351149 +0200
++++ linux-3.14.54/kernel/irq/manage.c 2015-10-15 15:51:25.636630031 +0200
@@ -32,24 +32,10 @@
early_param("threadirqs", setup_forced_irqthreads);
#endif
@@ -334910,7 +334892,7 @@ diff -Nur linux-3.14.54.orig/kernel/irq/manage.c linux-3.14.54/kernel/irq/manage
diff -Nur linux-3.14.54.orig/kernel/relay.c linux-3.14.54/kernel/relay.c
--- linux-3.14.54.orig/kernel/relay.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/kernel/relay.c 2015-10-12 10:56:18.218351149 +0200
++++ linux-3.14.54/kernel/relay.c 2015-10-15 15:51:25.640629767 +0200
@@ -227,7 +227,7 @@
* relay_remove_buf - remove a channel buffer
* @kref: target kernel reference that contains the relay buffer
@@ -334922,7 +334904,7 @@ diff -Nur linux-3.14.54.orig/kernel/relay.c linux-3.14.54/kernel/relay.c
*/
diff -Nur linux-3.14.54.orig/kernel/signal.c linux-3.14.54/kernel/signal.c
--- linux-3.14.54.orig/kernel/signal.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/kernel/signal.c 2015-10-12 10:56:18.219351148 +0200
++++ linux-3.14.54/kernel/signal.c 2015-10-15 15:51:25.640629767 +0200
@@ -2382,7 +2382,7 @@
* @regs: user register state
* @stepping: nonzero if debugger single-step or block-step in use
@@ -334934,7 +334916,7 @@ diff -Nur linux-3.14.54.orig/kernel/signal.c linux-3.14.54/kernel/signal.c
* is set in @ka->sa.sa_flags. Tracing is notified.
diff -Nur linux-3.14.54.orig/linaro/configs/android.conf linux-3.14.54/linaro/configs/android.conf
--- linux-3.14.54.orig/linaro/configs/android.conf 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/linaro/configs/android.conf 2015-10-12 10:56:18.219351148 +0200
++++ linux-3.14.54/linaro/configs/android.conf 2015-10-15 15:51:25.640629767 +0200
@@ -0,0 +1,42 @@
+CONFIG_IPV6=y
+# CONFIG_IPV6_SIT is not set
@@ -334980,7 +334962,7 @@ diff -Nur linux-3.14.54.orig/linaro/configs/android.conf linux-3.14.54/linaro/co
+CONFIG_TUN=y
diff -Nur linux-3.14.54.orig/linaro/configs/arndale.conf linux-3.14.54/linaro/configs/arndale.conf
--- linux-3.14.54.orig/linaro/configs/arndale.conf 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/linaro/configs/arndale.conf 2015-10-12 10:56:18.219351148 +0200
++++ linux-3.14.54/linaro/configs/arndale.conf 2015-10-15 15:51:25.640629767 +0200
@@ -0,0 +1,66 @@
+CONFIG_KALLSYMS_ALL=y
+CONFIG_PARTITION_ADVANCED=y
@@ -335048,31 +335030,31 @@ diff -Nur linux-3.14.54.orig/linaro/configs/arndale.conf linux-3.14.54/linaro/co
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+CONFIG_DEBUG_USER=y
+CONFIG_TUN=y
+diff -Nur linux-3.14.54.orig/linaro/configs/bigendian.conf linux-3.14.54/linaro/configs/bigendian.conf
+--- linux-3.14.54.orig/linaro/configs/bigendian.conf 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/linaro/configs/bigendian.conf 2015-10-15 15:51:25.640629767 +0200
+@@ -0,0 +1,4 @@
++CONFIG_CPU_BIG_ENDIAN=y
++CONFIG_CPU_ENDIAN_BE8=y
++# CONFIG_VIRTUALIZATION is not set
++# CONFIG_MMC_DW_IDMAC is not set
diff -Nur linux-3.14.54.orig/linaro/configs/big-LITTLE-IKS.conf linux-3.14.54/linaro/configs/big-LITTLE-IKS.conf
--- linux-3.14.54.orig/linaro/configs/big-LITTLE-IKS.conf 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/linaro/configs/big-LITTLE-IKS.conf 2015-10-12 10:56:18.219351148 +0200
++++ linux-3.14.54/linaro/configs/big-LITTLE-IKS.conf 2015-10-15 15:51:25.640629767 +0200
@@ -0,0 +1,5 @@
+CONFIG_BIG_LITTLE=y
+CONFIG_BL_SWITCHER=y
+CONFIG_ARM_DT_BL_CPUFREQ=y
+CONFIG_ARM_VEXPRESS_BL_CPUFREQ=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
-diff -Nur linux-3.14.54.orig/linaro/configs/bigendian.conf linux-3.14.54/linaro/configs/bigendian.conf
---- linux-3.14.54.orig/linaro/configs/bigendian.conf 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/linaro/configs/bigendian.conf 2015-10-12 10:56:18.219351148 +0200
-@@ -0,0 +1,4 @@
-+CONFIG_CPU_BIG_ENDIAN=y
-+CONFIG_CPU_ENDIAN_BE8=y
-+# CONFIG_VIRTUALIZATION is not set
-+# CONFIG_MMC_DW_IDMAC is not set
diff -Nur linux-3.14.54.orig/linaro/configs/debug.conf linux-3.14.54/linaro/configs/debug.conf
--- linux-3.14.54.orig/linaro/configs/debug.conf 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/linaro/configs/debug.conf 2015-10-12 10:56:18.219351148 +0200
++++ linux-3.14.54/linaro/configs/debug.conf 2015-10-15 15:51:25.644629504 +0200
@@ -0,0 +1 @@
+CONFIG_PROVE_LOCKING=y
diff -Nur linux-3.14.54.orig/linaro/configs/distribution.conf linux-3.14.54/linaro/configs/distribution.conf
--- linux-3.14.54.orig/linaro/configs/distribution.conf 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/linaro/configs/distribution.conf 2015-10-12 10:56:18.219351148 +0200
++++ linux-3.14.54/linaro/configs/distribution.conf 2015-10-15 15:51:25.644629504 +0200
@@ -0,0 +1,49 @@
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_CGROUPS=y
@@ -335125,7 +335107,7 @@ diff -Nur linux-3.14.54.orig/linaro/configs/distribution.conf linux-3.14.54/lina
+CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
diff -Nur linux-3.14.54.orig/linaro/configs/highbank.conf linux-3.14.54/linaro/configs/highbank.conf
--- linux-3.14.54.orig/linaro/configs/highbank.conf 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/linaro/configs/highbank.conf 2015-10-12 10:56:18.219351148 +0200
++++ linux-3.14.54/linaro/configs/highbank.conf 2015-10-15 15:51:25.644629504 +0200
@@ -0,0 +1,40 @@
+CONFIG_EXPERIMENTAL=y
+CONFIG_NO_HZ=y
@@ -335169,7 +335151,7 @@ diff -Nur linux-3.14.54.orig/linaro/configs/highbank.conf linux-3.14.54/linaro/c
+CONFIG_PL330_DMA=y
diff -Nur linux-3.14.54.orig/linaro/configs/kvm-guest.conf linux-3.14.54/linaro/configs/kvm-guest.conf
--- linux-3.14.54.orig/linaro/configs/kvm-guest.conf 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/linaro/configs/kvm-guest.conf 2015-10-12 10:56:18.219351148 +0200
++++ linux-3.14.54/linaro/configs/kvm-guest.conf 2015-10-15 15:51:25.644629504 +0200
@@ -0,0 +1,11 @@
+CONFIG_BALLOON_COMPACTION=y
+CONFIG_VIRTIO_BLK=y
@@ -335184,7 +335166,7 @@ diff -Nur linux-3.14.54.orig/linaro/configs/kvm-guest.conf linux-3.14.54/linaro/
+# CONFIG_THUMB2_KERNEL is not set
diff -Nur linux-3.14.54.orig/linaro/configs/kvm-host.conf linux-3.14.54/linaro/configs/kvm-host.conf
--- linux-3.14.54.orig/linaro/configs/kvm-host.conf 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/linaro/configs/kvm-host.conf 2015-10-12 10:56:18.219351148 +0200
++++ linux-3.14.54/linaro/configs/kvm-host.conf 2015-10-15 15:51:25.644629504 +0200
@@ -0,0 +1,11 @@
+CONFIG_VIRTUALIZATION=y
+CONFIG_ARM_LPAE=y
@@ -335199,7 +335181,7 @@ diff -Nur linux-3.14.54.orig/linaro/configs/kvm-host.conf linux-3.14.54/linaro/c
+CONFIG_BLK_DEV_NBD=m
diff -Nur linux-3.14.54.orig/linaro/configs/linaro-base.conf linux-3.14.54/linaro/configs/linaro-base.conf
--- linux-3.14.54.orig/linaro/configs/linaro-base.conf 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/linaro/configs/linaro-base.conf 2015-10-12 10:56:18.220351148 +0200
++++ linux-3.14.54/linaro/configs/linaro-base.conf 2015-10-15 15:51:25.644629504 +0200
@@ -0,0 +1,115 @@
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
@@ -335318,7 +335300,7 @@ diff -Nur linux-3.14.54.orig/linaro/configs/linaro-base.conf linux-3.14.54/linar
+CONFIG_EXT4_FS_SECURITY=y
diff -Nur linux-3.14.54.orig/linaro/configs/omap4.conf linux-3.14.54/linaro/configs/omap4.conf
--- linux-3.14.54.orig/linaro/configs/omap4.conf 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/linaro/configs/omap4.conf 2015-10-12 10:56:18.220351148 +0200
++++ linux-3.14.54/linaro/configs/omap4.conf 2015-10-15 15:51:25.644629504 +0200
@@ -0,0 +1,196 @@
+CONFIG_EXPERT=y
+CONFIG_KPROBES=y
@@ -335518,20 +335500,75 @@ diff -Nur linux-3.14.54.orig/linaro/configs/omap4.conf linux-3.14.54/linaro/conf
+# CONFIG_CPU_FREQ is not set
diff -Nur linux-3.14.54.orig/linaro/configs/preempt-rt.conf linux-3.14.54/linaro/configs/preempt-rt.conf
--- linux-3.14.54.orig/linaro/configs/preempt-rt.conf 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/linaro/configs/preempt-rt.conf 2015-10-12 10:56:18.220351148 +0200
++++ linux-3.14.54/linaro/configs/preempt-rt.conf 2015-10-15 15:51:25.644629504 +0200
@@ -0,0 +1,4 @@
+CONFIG_PREEMPT=y
+CONFIG_PREEMPT_RT_FULL=y
+CONFIG_SLUB=y
+# CONFIG_CPU_FREQ is not set
-diff -Nur linux-3.14.54.orig/linaro/configs/vexpress-tuning.conf linux-3.14.54/linaro/configs/vexpress-tuning.conf
---- linux-3.14.54.orig/linaro/configs/vexpress-tuning.conf 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/linaro/configs/vexpress-tuning.conf 2015-10-12 10:56:18.220351148 +0200
-@@ -0,0 +1 @@
-+# CONFIG_PROVE_LOCKING is not set
+diff -Nur linux-3.14.54.orig/linaro/configs/vexpress64.conf linux-3.14.54/linaro/configs/vexpress64.conf
+--- linux-3.14.54.orig/linaro/configs/vexpress64.conf 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/linaro/configs/vexpress64.conf 2015-10-15 15:51:25.644629504 +0200
+@@ -0,0 +1,56 @@
++CONFIG_ARCH_VEXPRESS=y
++CONFIG_SMP=y
++CONFIG_NR_CPUS=8
++CONFIG_CMDLINE="console=ttyAMA0"
++CONFIG_COMPAT=y
++CONFIG_SMC91X=y
++CONFIG_INPUT_EVDEV=y
++CONFIG_SERIO_AMBAKMI=y
++CONFIG_SERIAL_AMBA_PL011=y
++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
++# CONFIG_SERIO_I8042 is not set
++CONFIG_FB=y
++CONFIG_FB_ARMCLCD=y
++CONFIG_FRAMEBUFFER_CONSOLE=y
++# CONFIG_VGA_CONSOLE is not set
++CONFIG_LOGO=y
++# CONFIG_LOGO_LINUX_MONO is not set
++# CONFIG_LOGO_LINUX_VGA16 is not set
++CONFIG_MMC=y
++CONFIG_MMC_ARMMMCI=y
++CONFIG_RTC_CLASS=y
++CONFIG_RTC_DRV_PL031=y
++CONFIG_NFS_FS=y
++CONFIG_NFS_V3=y
++CONFIG_NFS_V3_ACL=y
++CONFIG_NFS_V4=y
++CONFIG_ROOT_NFS=y
++CONFIG_VIRTIO=y
++CONFIG_VIRTIO_BLK=y
++CONFIG_VIRTIO_MMIO=y
++CONFIG_REGULATOR=y
++CONFIG_REGULATOR_FIXED_VOLTAGE=y
++CONFIG_CMA=y
++CONFIG_DMA_CMA=y
++CONFIG_COMMON_CLK_SCPI=y
++CONFIG_SMSC911X=y
++CONFIG_I2C=y
++CONFIG_ARM_MHU_MBOX=y
++CONFIG_ARM_SCPI_PROTOCOL=y
++CONFIG_USB_HIDDEV=y
++CONFIG_SCSI=y
++CONFIG_BLK_DEV_SD=y
++CONFIG_USB_STORAGE=y
++CONFIG_USB=y
++CONFIG_USB_ULPI=y
++CONFIG_USB_EHCI_HCD=y
++CONFIG_USB_EHCI_HCD_SYNOPSYS=y
++CONFIG_USB_OHCI_HCD=y
++CONFIG_USB_PHY=y
++CONFIG_USB_ISP1301=y
++CONFIG_PM_OPP=y
++CONFIG_GENERIC_CPUFREQ_CPU0=y
++CONFIG_ARM_BIG_LITTLE_CPUFREQ=y
++CONFIG_ARM_DT_BL_CPUFREQ=y
++CONFIG_ARM64_CPUIDLE=y
++CONFIG_ARM64_CRYPTO=y
diff -Nur linux-3.14.54.orig/linaro/configs/vexpress.conf linux-3.14.54/linaro/configs/vexpress.conf
--- linux-3.14.54.orig/linaro/configs/vexpress.conf 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/linaro/configs/vexpress.conf 2015-10-12 10:56:18.220351148 +0200
++++ linux-3.14.54/linaro/configs/vexpress.conf 2015-10-15 15:51:25.644629504 +0200
@@ -0,0 +1,64 @@
+CONFIG_ARCH_VEXPRESS=y
+CONFIG_ARCH_VEXPRESS_CA9X4=y
@@ -335597,69 +335634,14 @@ diff -Nur linux-3.14.54.orig/linaro/configs/vexpress.conf linux-3.14.54/linaro/c
+CONFIG_VIRTIO_BLK=y
+CONFIG_VIRTIO_MMIO=y
+CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES=y
-diff -Nur linux-3.14.54.orig/linaro/configs/vexpress64.conf linux-3.14.54/linaro/configs/vexpress64.conf
---- linux-3.14.54.orig/linaro/configs/vexpress64.conf 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/linaro/configs/vexpress64.conf 2015-10-12 10:56:18.220351148 +0200
-@@ -0,0 +1,56 @@
-+CONFIG_ARCH_VEXPRESS=y
-+CONFIG_SMP=y
-+CONFIG_NR_CPUS=8
-+CONFIG_CMDLINE="console=ttyAMA0"
-+CONFIG_COMPAT=y
-+CONFIG_SMC91X=y
-+CONFIG_INPUT_EVDEV=y
-+CONFIG_SERIO_AMBAKMI=y
-+CONFIG_SERIAL_AMBA_PL011=y
-+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
-+# CONFIG_SERIO_I8042 is not set
-+CONFIG_FB=y
-+CONFIG_FB_ARMCLCD=y
-+CONFIG_FRAMEBUFFER_CONSOLE=y
-+# CONFIG_VGA_CONSOLE is not set
-+CONFIG_LOGO=y
-+# CONFIG_LOGO_LINUX_MONO is not set
-+# CONFIG_LOGO_LINUX_VGA16 is not set
-+CONFIG_MMC=y
-+CONFIG_MMC_ARMMMCI=y
-+CONFIG_RTC_CLASS=y
-+CONFIG_RTC_DRV_PL031=y
-+CONFIG_NFS_FS=y
-+CONFIG_NFS_V3=y
-+CONFIG_NFS_V3_ACL=y
-+CONFIG_NFS_V4=y
-+CONFIG_ROOT_NFS=y
-+CONFIG_VIRTIO=y
-+CONFIG_VIRTIO_BLK=y
-+CONFIG_VIRTIO_MMIO=y
-+CONFIG_REGULATOR=y
-+CONFIG_REGULATOR_FIXED_VOLTAGE=y
-+CONFIG_CMA=y
-+CONFIG_DMA_CMA=y
-+CONFIG_COMMON_CLK_SCPI=y
-+CONFIG_SMSC911X=y
-+CONFIG_I2C=y
-+CONFIG_ARM_MHU_MBOX=y
-+CONFIG_ARM_SCPI_PROTOCOL=y
-+CONFIG_USB_HIDDEV=y
-+CONFIG_SCSI=y
-+CONFIG_BLK_DEV_SD=y
-+CONFIG_USB_STORAGE=y
-+CONFIG_USB=y
-+CONFIG_USB_ULPI=y
-+CONFIG_USB_EHCI_HCD=y
-+CONFIG_USB_EHCI_HCD_SYNOPSYS=y
-+CONFIG_USB_OHCI_HCD=y
-+CONFIG_USB_PHY=y
-+CONFIG_USB_ISP1301=y
-+CONFIG_PM_OPP=y
-+CONFIG_GENERIC_CPUFREQ_CPU0=y
-+CONFIG_ARM_BIG_LITTLE_CPUFREQ=y
-+CONFIG_ARM_DT_BL_CPUFREQ=y
-+CONFIG_ARM64_CPUIDLE=y
-+CONFIG_ARM64_CRYPTO=y
+diff -Nur linux-3.14.54.orig/linaro/configs/vexpress-tuning.conf linux-3.14.54/linaro/configs/vexpress-tuning.conf
+--- linux-3.14.54.orig/linaro/configs/vexpress-tuning.conf 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/linaro/configs/vexpress-tuning.conf 2015-10-15 15:51:25.644629504 +0200
+@@ -0,0 +1 @@
++# CONFIG_PROVE_LOCKING is not set
diff -Nur linux-3.14.54.orig/linaro/configs/xen.conf linux-3.14.54/linaro/configs/xen.conf
--- linux-3.14.54.orig/linaro/configs/xen.conf 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/linaro/configs/xen.conf 2015-10-12 10:56:18.220351148 +0200
++++ linux-3.14.54/linaro/configs/xen.conf 2015-10-15 15:51:25.648629242 +0200
@@ -0,0 +1,7 @@
+CONFIG_XEN=y
+CONFIG_XEN_NETDEV_FRONTEND=y
@@ -335668,38 +335650,27 @@ diff -Nur linux-3.14.54.orig/linaro/configs/xen.conf linux-3.14.54/linaro/config
+CONFIG_XEN_BLKDEV_BACKEND=y
+CONFIG_XENFS=y
+CONFIG_XEN_COMPAT_XENFS=y
-diff -Nur linux-3.14.54.orig/mm/Kconfig linux-3.14.54/mm/Kconfig
---- linux-3.14.54.orig/mm/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/mm/Kconfig 2015-10-12 10:56:18.222351148 +0200
-@@ -514,6 +514,17 @@
- processing calls such as dma_alloc_from_contiguous().
- This option does not affect warning and error messages.
+diff -Nur linux-3.14.54.orig/MAINTAINERS linux-3.14.54/MAINTAINERS
+--- linux-3.14.54.orig/MAINTAINERS 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/MAINTAINERS 2015-10-15 15:51:25.652628978 +0200
+@@ -5511,6 +5511,14 @@
+ F: drivers/net/macvlan.c
+ F: include/linux/if_macvlan.h
-+config CMA_AREAS
-+ int "Maximum count of the CMA areas"
-+ depends on CMA
-+ default 7
-+ help
-+ CMA allows to create CMA areas for particular purpose, mainly,
-+ used as device private area. This parameter sets the maximum
-+ number of CMA area in the system.
-+
-+ If unsure, leave the default value "7".
++MAILBOX API
++M: Jassi Brar <jassisinghbrar@gmail.com>
++L: linux-kernel@vger.kernel.org
++S: Maintained
++F: drivers/mailbox/
++F: include/linux/mailbox_client.h
++F: include/linux/mailbox_controller.h
+
- config ZBUD
- tristate
- default n
-diff -Nur linux-3.14.54.orig/mm/Makefile linux-3.14.54/mm/Makefile
---- linux-3.14.54.orig/mm/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/mm/Makefile 2015-10-12 10:56:18.222351148 +0200
-@@ -61,3 +61,4 @@
- obj-$(CONFIG_MEMORY_ISOLATION) += page_isolation.o
- obj-$(CONFIG_ZBUD) += zbud.o
- obj-$(CONFIG_ZSMALLOC) += zsmalloc.o
-+obj-$(CONFIG_CMA) += cma.o
+ MAN-PAGES: MANUAL PAGES FOR LINUX -- Sections 2, 3, 4, 5, and 7
+ M: Michael Kerrisk <mtk.manpages@gmail.com>
+ W: http://www.kernel.org/doc/man-pages
diff -Nur linux-3.14.54.orig/mm/cma.c linux-3.14.54/mm/cma.c
--- linux-3.14.54.orig/mm/cma.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/mm/cma.c 2015-10-12 10:56:18.221351148 +0200
++++ linux-3.14.54/mm/cma.c 2015-10-15 15:51:25.652628978 +0200
@@ -0,0 +1,356 @@
+/*
+ * Contiguous Memory Allocator
@@ -336057,9 +336028,38 @@ diff -Nur linux-3.14.54.orig/mm/cma.c linux-3.14.54/mm/cma.c
+
+ return true;
+}
+diff -Nur linux-3.14.54.orig/mm/Kconfig linux-3.14.54/mm/Kconfig
+--- linux-3.14.54.orig/mm/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/mm/Kconfig 2015-10-15 15:51:25.652628978 +0200
+@@ -514,6 +514,17 @@
+ processing calls such as dma_alloc_from_contiguous().
+ This option does not affect warning and error messages.
+
++config CMA_AREAS
++ int "Maximum count of the CMA areas"
++ depends on CMA
++ default 7
++ help
++ CMA allows to create CMA areas for particular purpose, mainly,
++ used as device private area. This parameter sets the maximum
++ number of CMA area in the system.
++
++ If unsure, leave the default value "7".
++
+ config ZBUD
+ tristate
+ default n
+diff -Nur linux-3.14.54.orig/mm/Makefile linux-3.14.54/mm/Makefile
+--- linux-3.14.54.orig/mm/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/mm/Makefile 2015-10-15 15:51:25.652628978 +0200
+@@ -61,3 +61,4 @@
+ obj-$(CONFIG_MEMORY_ISOLATION) += page_isolation.o
+ obj-$(CONFIG_ZBUD) += zbud.o
+ obj-$(CONFIG_ZSMALLOC) += zsmalloc.o
++obj-$(CONFIG_CMA) += cma.o
diff -Nur linux-3.14.54.orig/mm/memblock.c linux-3.14.54/mm/memblock.c
--- linux-3.14.54.orig/mm/memblock.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/mm/memblock.c 2015-10-12 10:56:18.222351148 +0200
++++ linux-3.14.54/mm/memblock.c 2015-10-15 15:51:25.656628714 +0200
@@ -974,22 +974,35 @@
}
#endif /* CONFIG_HAVE_MEMBLOCK_NODE_MAP */
@@ -336102,7 +336102,7 @@ diff -Nur linux-3.14.54.orig/mm/memblock.c linux-3.14.54/mm/memblock.c
return memblock_alloc_base_nid(size, align, MEMBLOCK_ALLOC_ACCESSIBLE, nid);
diff -Nur linux-3.14.54.orig/net/atm/svc.c linux-3.14.54/net/atm/svc.c
--- linux-3.14.54.orig/net/atm/svc.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/net/atm/svc.c 2015-10-12 10:56:18.223351148 +0200
++++ linux-3.14.54/net/atm/svc.c 2015-10-15 15:51:25.656628714 +0200
@@ -263,17 +263,11 @@
goto out;
}
@@ -336123,21 +336123,9 @@ diff -Nur linux-3.14.54.orig/net/atm/svc.c linux-3.14.54/net/atm/svc.c
error = vcc_connect(sock, vcc->itf, vcc->vpi, vcc->vci);
if (!error)
sock->state = SS_CONNECTED;
-diff -Nur linux-3.14.54.orig/net/core/Makefile linux-3.14.54/net/core/Makefile
---- linux-3.14.54.orig/net/core/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/net/core/Makefile 2015-10-12 10:56:18.224351148 +0200
-@@ -9,7 +9,7 @@
-
- obj-y += dev.o ethtool.o dev_addr_lists.o dst.o netevent.o \
- neighbour.o rtnetlink.o utils.o link_watch.o filter.o \
-- sock_diag.o dev_ioctl.o
-+ sock_diag.o dev_ioctl.o tso.o
-
- obj-$(CONFIG_XFRM) += flow.o
- obj-y += net-sysfs.o
diff -Nur linux-3.14.54.orig/net/core/dev.c linux-3.14.54/net/core/dev.c
--- linux-3.14.54.orig/net/core/dev.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/net/core/dev.c 2015-10-12 10:56:18.224351148 +0200
++++ linux-3.14.54/net/core/dev.c 2015-10-15 15:51:25.656628714 +0200
@@ -3462,7 +3462,7 @@
* @rx_handler: receive handler to register
* @rx_handler_data: data pointer that is used by rx handler
@@ -343348,9 +343336,21 @@ diff -Nur linux-3.14.54.orig/net/core/dev.c.orig linux-3.14.54/net/core/dev.c.or
+}
+
+subsys_initcall(net_dev_init);
+diff -Nur linux-3.14.54.orig/net/core/Makefile linux-3.14.54/net/core/Makefile
+--- linux-3.14.54.orig/net/core/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/net/core/Makefile 2015-10-15 15:51:25.656628714 +0200
+@@ -9,7 +9,7 @@
+
+ obj-y += dev.o ethtool.o dev_addr_lists.o dst.o netevent.o \
+ neighbour.o rtnetlink.o utils.o link_watch.o filter.o \
+- sock_diag.o dev_ioctl.o
++ sock_diag.o dev_ioctl.o tso.o
+
+ obj-$(CONFIG_XFRM) += flow.o
+ obj-y += net-sysfs.o
diff -Nur linux-3.14.54.orig/net/core/rtnetlink.c linux-3.14.54/net/core/rtnetlink.c
--- linux-3.14.54.orig/net/core/rtnetlink.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/net/core/rtnetlink.c 2015-10-12 10:56:18.225351148 +0200
++++ linux-3.14.54/net/core/rtnetlink.c 2015-10-15 15:51:25.656628714 +0200
@@ -1157,73 +1157,7 @@
return -EMSGSIZE;
}
@@ -346463,7 +346463,7 @@ diff -Nur linux-3.14.54.orig/net/core/rtnetlink.c.orig linux-3.14.54/net/core/rt
+
diff -Nur linux-3.14.54.orig/net/core/tso.c linux-3.14.54/net/core/tso.c
--- linux-3.14.54.orig/net/core/tso.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/net/core/tso.c 2015-10-12 10:56:18.225351148 +0200
++++ linux-3.14.54/net/core/tso.c 2015-10-15 15:51:25.656628714 +0200
@@ -0,0 +1,72 @@
+#include <net/ip.h>
+#include <net/tso.h>
@@ -346539,7 +346539,7 @@ diff -Nur linux-3.14.54.orig/net/core/tso.c linux-3.14.54/net/core/tso.c
+}
diff -Nur linux-3.14.54.orig/net/ieee802154/Kconfig linux-3.14.54/net/ieee802154/Kconfig
--- linux-3.14.54.orig/net/ieee802154/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/net/ieee802154/Kconfig 2015-10-12 10:56:18.225351148 +0200
++++ linux-3.14.54/net/ieee802154/Kconfig 2015-10-15 15:51:25.656628714 +0200
@@ -15,7 +15,7 @@
depends on IEEE802154 && IPV6
select 6LOWPAN_IPHC
@@ -346551,7 +346551,7 @@ diff -Nur linux-3.14.54.orig/net/ieee802154/Kconfig linux-3.14.54/net/ieee802154
tristate
diff -Nur linux-3.14.54.orig/net/mac80211/driver-ops.h linux-3.14.54/net/mac80211/driver-ops.h
--- linux-3.14.54.orig/net/mac80211/driver-ops.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/net/mac80211/driver-ops.h 2015-10-12 10:56:18.225351148 +0200
++++ linux-3.14.54/net/mac80211/driver-ops.h 2015-10-15 15:51:25.656628714 +0200
@@ -722,13 +722,19 @@
}
@@ -346575,7 +346575,7 @@ diff -Nur linux-3.14.54.orig/net/mac80211/driver-ops.h linux-3.14.54/net/mac8021
diff -Nur linux-3.14.54.orig/net/mac80211/ibss.c linux-3.14.54/net/mac80211/ibss.c
--- linux-3.14.54.orig/net/mac80211/ibss.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/net/mac80211/ibss.c 2015-10-12 10:56:18.226351148 +0200
++++ linux-3.14.54/net/mac80211/ibss.c 2015-10-15 15:51:25.656628714 +0200
@@ -386,7 +386,7 @@
presp->head_len, 0, GFP_KERNEL);
cfg80211_put_bss(local->hw.wiphy, bss);
@@ -346587,7 +346587,7 @@ diff -Nur linux-3.14.54.orig/net/mac80211/ibss.c linux-3.14.54/net/mac80211/ibss
static void ieee80211_sta_join_ibss(struct ieee80211_sub_if_data *sdata,
diff -Nur linux-3.14.54.orig/net/mac80211/util.c linux-3.14.54/net/mac80211/util.c
--- linux-3.14.54.orig/net/mac80211/util.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/net/mac80211/util.c 2015-10-12 10:56:18.226351148 +0200
++++ linux-3.14.54/net/mac80211/util.c 2015-10-15 15:51:25.656628714 +0200
@@ -554,7 +554,7 @@
ieee80211_stop_queues_by_reason(&local->hw, IEEE80211_MAX_QUEUE_MAP,
IEEE80211_QUEUE_STOP_REASON_FLUSH);
@@ -346599,7 +346599,7 @@ diff -Nur linux-3.14.54.orig/net/mac80211/util.c linux-3.14.54/net/mac80211/util
IEEE80211_QUEUE_STOP_REASON_FLUSH);
diff -Nur linux-3.14.54.orig/net/wireless/core.h linux-3.14.54/net/wireless/core.h
--- linux-3.14.54.orig/net/wireless/core.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/net/wireless/core.h 2015-10-12 10:56:18.227351148 +0200
++++ linux-3.14.54/net/wireless/core.h 2015-10-15 15:51:25.656628714 +0200
@@ -211,6 +211,7 @@
} dc;
struct {
@@ -346620,7 +346620,7 @@ diff -Nur linux-3.14.54.orig/net/wireless/core.h linux-3.14.54/net/wireless/core
diff -Nur linux-3.14.54.orig/net/wireless/ibss.c linux-3.14.54/net/wireless/ibss.c
--- linux-3.14.54.orig/net/wireless/ibss.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/net/wireless/ibss.c 2015-10-12 10:56:18.227351148 +0200
++++ linux-3.14.54/net/wireless/ibss.c 2015-10-15 15:51:25.656628714 +0200
@@ -14,7 +14,8 @@
#include "rdev-ops.h"
@@ -346673,7 +346673,7 @@ diff -Nur linux-3.14.54.orig/net/wireless/ibss.c linux-3.14.54/net/wireless/ibss
list_add_tail(&ev->list, &wdev->event_list);
diff -Nur linux-3.14.54.orig/net/wireless/trace.h linux-3.14.54/net/wireless/trace.h
--- linux-3.14.54.orig/net/wireless/trace.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/net/wireless/trace.h 2015-10-12 10:56:18.228351148 +0200
++++ linux-3.14.54/net/wireless/trace.h 2015-10-15 15:51:25.660628451 +0200
@@ -2279,11 +2279,6 @@
TP_printk(NETDEV_PR_FMT ", " MAC_PR_FMT, NETDEV_PR_ARG, MAC_PR_ARG(addr))
);
@@ -346713,7 +346713,7 @@ diff -Nur linux-3.14.54.orig/net/wireless/trace.h linux-3.14.54/net/wireless/tra
bool acked),
diff -Nur linux-3.14.54.orig/net/wireless/util.c linux-3.14.54/net/wireless/util.c
--- linux-3.14.54.orig/net/wireless/util.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/net/wireless/util.c 2015-10-12 10:56:18.228351148 +0200
++++ linux-3.14.54/net/wireless/util.c 2015-10-15 15:51:25.660628451 +0200
@@ -820,7 +820,8 @@
ev->dc.reason, true);
break;
@@ -346726,7 +346726,7 @@ diff -Nur linux-3.14.54.orig/net/wireless/util.c linux-3.14.54/net/wireless/util
wdev_unlock(wdev);
diff -Nur linux-3.14.54.orig/scripts/Makefile.lib linux-3.14.54/scripts/Makefile.lib
--- linux-3.14.54.orig/scripts/Makefile.lib 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/scripts/Makefile.lib 2015-10-12 10:56:18.228351148 +0200
++++ linux-3.14.54/scripts/Makefile.lib 2015-10-15 15:51:25.660628451 +0200
@@ -153,6 +153,7 @@
-I$(srctree)/arch/$(SRCARCH)/boot/dts \
-I$(srctree)/arch/$(SRCARCH)/boot/dts/include \
@@ -346737,7 +346737,7 @@ diff -Nur linux-3.14.54.orig/scripts/Makefile.lib linux-3.14.54/scripts/Makefile
# Finds the multi-part object the current object will be linked into
diff -Nur linux-3.14.54.orig/scripts/mod/devicetable-offsets.c linux-3.14.54/scripts/mod/devicetable-offsets.c
--- linux-3.14.54.orig/scripts/mod/devicetable-offsets.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/scripts/mod/devicetable-offsets.c 2015-10-12 10:56:18.229351148 +0200
++++ linux-3.14.54/scripts/mod/devicetable-offsets.c 2015-10-15 15:51:25.660628451 +0200
@@ -174,6 +174,9 @@
DEVID_FIELD(x86_cpu_id, model);
DEVID_FIELD(x86_cpu_id, vendor);
@@ -346750,7 +346750,7 @@ diff -Nur linux-3.14.54.orig/scripts/mod/devicetable-offsets.c linux-3.14.54/scr
diff -Nur linux-3.14.54.orig/scripts/mod/file2alias.c linux-3.14.54/scripts/mod/file2alias.c
--- linux-3.14.54.orig/scripts/mod/file2alias.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/scripts/mod/file2alias.c 2015-10-12 10:56:18.229351148 +0200
++++ linux-3.14.54/scripts/mod/file2alias.c 2015-10-15 15:51:25.660628451 +0200
@@ -1135,6 +1135,16 @@
}
ADD_TO_DEVTABLE("x86cpu", x86_cpu_id, do_x86cpu_entry);
@@ -346770,7 +346770,7 @@ diff -Nur linux-3.14.54.orig/scripts/mod/file2alias.c linux-3.14.54/scripts/mod/
char *alias)
diff -Nur linux-3.14.54.orig/scripts/recordmcount.c linux-3.14.54/scripts/recordmcount.c
--- linux-3.14.54.orig/scripts/recordmcount.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/scripts/recordmcount.c 2015-10-12 10:56:18.230351148 +0200
++++ linux-3.14.54/scripts/recordmcount.c 2015-10-15 15:51:25.660628451 +0200
@@ -40,6 +40,11 @@
#define R_METAG_NONE 3
#endif
@@ -346794,7 +346794,7 @@ diff -Nur linux-3.14.54.orig/scripts/recordmcount.c linux-3.14.54/scripts/record
altmcount = "_mcount_wrapper";
diff -Nur linux-3.14.54.orig/scripts/recordmcount.pl linux-3.14.54/scripts/recordmcount.pl
--- linux-3.14.54.orig/scripts/recordmcount.pl 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/scripts/recordmcount.pl 2015-10-12 10:56:18.230351148 +0200
++++ linux-3.14.54/scripts/recordmcount.pl 2015-10-15 15:51:25.660628451 +0200
@@ -278,6 +278,11 @@
$mcount_regex = "^\\s*([0-9a-fA-F]+):\\s*R_ARM_(CALL|PC24|THM_CALL)" .
"\\s+(__gnu_mcount_nc|mcount)\$";
@@ -346807,49 +346807,9 @@ diff -Nur linux-3.14.54.orig/scripts/recordmcount.pl linux-3.14.54/scripts/recor
} elsif ($arch eq "ia64") {
$mcount_regex = "^\\s*([0-9a-fA-F]+):.*\\s_mcount\$";
$type = "data8";
-diff -Nur linux-3.14.54.orig/sound/soc/codecs/Kconfig linux-3.14.54/sound/soc/codecs/Kconfig
---- linux-3.14.54.orig/sound/soc/codecs/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/codecs/Kconfig 2015-10-12 10:56:18.231351148 +0200
-@@ -37,6 +37,7 @@
- select SND_SOC_CS42L73 if I2C
- select SND_SOC_CS4270 if I2C
- select SND_SOC_CS4271 if SND_SOC_I2C_AND_SPI
-+ select SND_SOC_CS42888 if I2C
- select SND_SOC_CX20442 if TTY
- select SND_SOC_DA7210 if I2C
- select SND_SOC_DA7213 if I2C
-@@ -254,6 +255,9 @@
- config SND_SOC_CS4271
- tristate
-
-+config SND_SOC_CS42888
-+ tristate
-+
- config SND_SOC_CX20442
- tristate
- depends on TTY
-diff -Nur linux-3.14.54.orig/sound/soc/codecs/Makefile linux-3.14.54/sound/soc/codecs/Makefile
---- linux-3.14.54.orig/sound/soc/codecs/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/codecs/Makefile 2015-10-12 10:56:18.231351148 +0200
-@@ -23,6 +23,7 @@
- snd-soc-cs42l73-objs := cs42l73.o
- snd-soc-cs4270-objs := cs4270.o
- snd-soc-cs4271-objs := cs4271.o
-+snd-soc-cs42888-objs := cs42888.o
- snd-soc-cx20442-objs := cx20442.o
- snd-soc-da7210-objs := da7210.o
- snd-soc-da7213-objs := da7213.o
-@@ -156,6 +157,7 @@
- obj-$(CONFIG_SND_SOC_CS42L73) += snd-soc-cs42l73.o
- obj-$(CONFIG_SND_SOC_CS4270) += snd-soc-cs4270.o
- obj-$(CONFIG_SND_SOC_CS4271) += snd-soc-cs4271.o
-+obj-$(CONFIG_SND_SOC_CS42888) += snd-soc-cs42888.o
- obj-$(CONFIG_SND_SOC_CX20442) += snd-soc-cx20442.o
- obj-$(CONFIG_SND_SOC_DA7210) += snd-soc-da7210.o
- obj-$(CONFIG_SND_SOC_DA7213) += snd-soc-da7213.o
diff -Nur linux-3.14.54.orig/sound/soc/codecs/cs42888.c linux-3.14.54/sound/soc/codecs/cs42888.c
--- linux-3.14.54.orig/sound/soc/codecs/cs42888.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/sound/soc/codecs/cs42888.c 2015-10-12 10:56:18.231351148 +0200
++++ linux-3.14.54/sound/soc/codecs/cs42888.c 2015-10-15 15:51:25.664628189 +0200
@@ -0,0 +1,934 @@
+/*
+ * cs42888.c -- CS42888 ALSA SoC Audio Driver
@@ -347787,7 +347747,7 @@ diff -Nur linux-3.14.54.orig/sound/soc/codecs/cs42888.c linux-3.14.54/sound/soc/
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/sound/soc/codecs/cs42888.h linux-3.14.54/sound/soc/codecs/cs42888.h
--- linux-3.14.54.orig/sound/soc/codecs/cs42888.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/sound/soc/codecs/cs42888.h 2015-10-12 10:56:18.231351148 +0200
++++ linux-3.14.54/sound/soc/codecs/cs42888.h 2015-10-15 15:51:25.664628189 +0200
@@ -0,0 +1,123 @@
+/*
+ * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -347912,9 +347872,49 @@ diff -Nur linux-3.14.54.orig/sound/soc/codecs/cs42888.h linux-3.14.54/sound/soc/
+
+
+#endif
+diff -Nur linux-3.14.54.orig/sound/soc/codecs/Kconfig linux-3.14.54/sound/soc/codecs/Kconfig
+--- linux-3.14.54.orig/sound/soc/codecs/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/sound/soc/codecs/Kconfig 2015-10-15 15:51:25.664628189 +0200
+@@ -37,6 +37,7 @@
+ select SND_SOC_CS42L73 if I2C
+ select SND_SOC_CS4270 if I2C
+ select SND_SOC_CS4271 if SND_SOC_I2C_AND_SPI
++ select SND_SOC_CS42888 if I2C
+ select SND_SOC_CX20442 if TTY
+ select SND_SOC_DA7210 if I2C
+ select SND_SOC_DA7213 if I2C
+@@ -254,6 +255,9 @@
+ config SND_SOC_CS4271
+ tristate
+
++config SND_SOC_CS42888
++ tristate
++
+ config SND_SOC_CX20442
+ tristate
+ depends on TTY
+diff -Nur linux-3.14.54.orig/sound/soc/codecs/Makefile linux-3.14.54/sound/soc/codecs/Makefile
+--- linux-3.14.54.orig/sound/soc/codecs/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/sound/soc/codecs/Makefile 2015-10-15 15:51:25.664628189 +0200
+@@ -23,6 +23,7 @@
+ snd-soc-cs42l73-objs := cs42l73.o
+ snd-soc-cs4270-objs := cs4270.o
+ snd-soc-cs4271-objs := cs4271.o
++snd-soc-cs42888-objs := cs42888.o
+ snd-soc-cx20442-objs := cx20442.o
+ snd-soc-da7210-objs := da7210.o
+ snd-soc-da7213-objs := da7213.o
+@@ -156,6 +157,7 @@
+ obj-$(CONFIG_SND_SOC_CS42L73) += snd-soc-cs42l73.o
+ obj-$(CONFIG_SND_SOC_CS4270) += snd-soc-cs4270.o
+ obj-$(CONFIG_SND_SOC_CS4271) += snd-soc-cs4271.o
++obj-$(CONFIG_SND_SOC_CS42888) += snd-soc-cs42888.o
+ obj-$(CONFIG_SND_SOC_CX20442) += snd-soc-cx20442.o
+ obj-$(CONFIG_SND_SOC_DA7210) += snd-soc-da7210.o
+ obj-$(CONFIG_SND_SOC_DA7213) += snd-soc-da7213.o
diff -Nur linux-3.14.54.orig/sound/soc/codecs/sgtl5000.c linux-3.14.54/sound/soc/codecs/sgtl5000.c
--- linux-3.14.54.orig/sound/soc/codecs/sgtl5000.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/codecs/sgtl5000.c 2015-10-12 10:56:18.232351147 +0200
++++ linux-3.14.54/sound/soc/codecs/sgtl5000.c 2015-10-15 15:51:25.664628189 +0200
@@ -756,7 +756,7 @@
struct ldo_regulator *ldo = rdev_get_drvdata(dev);
struct snd_soc_codec *codec = (struct snd_soc_codec *)ldo->codec_data;
@@ -348012,7 +348012,7 @@ diff -Nur linux-3.14.54.orig/sound/soc/codecs/sgtl5000.c linux-3.14.54/sound/soc
return 0;
diff -Nur linux-3.14.54.orig/sound/soc/codecs/spdif_transmitter.c linux-3.14.54/sound/soc/codecs/spdif_transmitter.c
--- linux-3.14.54.orig/sound/soc/codecs/spdif_transmitter.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/codecs/spdif_transmitter.c 2015-10-12 10:56:18.232351147 +0200
++++ linux-3.14.54/sound/soc/codecs/spdif_transmitter.c 2015-10-15 15:51:25.716624766 +0200
@@ -24,7 +24,7 @@
#define DRV_NAME "spdif-dit"
@@ -348024,7 +348024,7 @@ diff -Nur linux-3.14.54.orig/sound/soc/codecs/spdif_transmitter.c linux-3.14.54/
SNDRV_PCM_FMTBIT_S24_LE)
diff -Nur linux-3.14.54.orig/sound/soc/codecs/wm8962.c linux-3.14.54/sound/soc/codecs/wm8962.c
--- linux-3.14.54.orig/sound/soc/codecs/wm8962.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/codecs/wm8962.c 2015-10-12 10:56:18.233351147 +0200
++++ linux-3.14.54/sound/soc/codecs/wm8962.c 2015-10-15 15:51:25.716624766 +0200
@@ -16,6 +16,7 @@
#include <linux/init.h>
#include <linux/delay.h>
@@ -348148,129 +348148,9 @@ diff -Nur linux-3.14.54.orig/sound/soc/codecs/wm8962.c linux-3.14.54/sound/soc/c
return 0;
}
#endif
-diff -Nur linux-3.14.54.orig/sound/soc/fsl/Kconfig linux-3.14.54/sound/soc/fsl/Kconfig
---- linux-3.14.54.orig/sound/soc/fsl/Kconfig 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/fsl/Kconfig 2015-10-12 11:01:32.868328030 +0200
-@@ -11,6 +11,12 @@
- config SND_SOC_FSL_ESAI
- tristate
-
-+config SND_SOC_FSL_ASRC
-+ bool
-+
-+config SND_SOC_FSL_HDMI
-+ bool
-+
- config SND_SOC_FSL_UTILS
- tristate
-
-@@ -123,9 +129,14 @@
- select FIQ
-
- config SND_SOC_IMX_PCM_DMA
-- tristate
-+ bool
- select SND_SOC_GENERIC_DMAENGINE_PCM
-
-+config SND_SOC_IMX_HDMI_DMA
-+ bool
-+ select SND_SOC_GENERIC_DMAENGINE_PCM
-+ select SND_SOC_IMX_PCM_DMA
-+
- config SND_SOC_IMX_AUDMUX
- tristate
-
-@@ -178,6 +189,18 @@
- Enable I2S based access to the TLV320AIC23B codec attached
- to the SSI interface
-
-+config SND_SOC_IMX_CS42888
-+ tristate "SoC Audio support for i.MX boards with cs42888"
-+ depends on OF && I2C
-+ select SND_SOC_CS42888
-+ select SND_SOC_IMX_PCM_DMA
-+ select SND_SOC_FSL_ESAI
-+ select SND_SOC_FSL_UTILS
-+ help
-+ SoC Audio support for i.MX boards with cs42888
-+ Say Y if you want to add support for SoC audio on an i.MX board with
-+ a cs42888 codec.
-+
- config SND_SOC_IMX_WM8962
- tristate "SoC Audio support for i.MX boards with wm8962"
- depends on OF && I2C
-@@ -210,6 +233,17 @@
- Say Y if you want to add support for SoC audio on an i.MX board with
- a S/DPDIF.
-
-+config SND_SOC_IMX_HDMI
-+ tristate "SoC Audio support for i.MX boards with HDMI port"
-+ depends on MFD_MXC_HDMI
-+ select SND_SOC_IMX_HDMI_DMA
-+ select SND_SOC_FSL_HDMI
-+ select SND_SOC_HDMI_CODEC
-+ help
-+ SoC Audio support for i.MX boards with HDMI audio
-+ Say Y if you want to add support for SoC audio on an i.MX board with
-+ IMX HDMI.
-+
- config SND_SOC_IMX_MC13783
- tristate "SoC Audio support for I.MX boards with mc13783"
- depends on MFD_MC13XXX && ARM
-diff -Nur linux-3.14.54.orig/sound/soc/fsl/Makefile linux-3.14.54/sound/soc/fsl/Makefile
---- linux-3.14.54.orig/sound/soc/fsl/Makefile 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/fsl/Makefile 2015-10-12 10:56:18.239351147 +0200
-@@ -14,13 +14,19 @@
- snd-soc-fsl-sai-objs := fsl_sai.o
- snd-soc-fsl-ssi-objs := fsl_ssi.o
- snd-soc-fsl-spdif-objs := fsl_spdif.o
-+snd-soc-fsl-hdmi-objs := fsl_hdmi.o
- snd-soc-fsl-esai-objs := fsl_esai.o
-+snd-soc-fsl-asrc-pcm-objs := fsl_asrc_pcm.o
-+snd-soc-fsl-asrc-objs := fsl_asrc.o
- snd-soc-fsl-utils-objs := fsl_utils.o
- snd-soc-fsl-dma-objs := fsl_dma.o
- obj-$(CONFIG_SND_SOC_FSL_SAI) += snd-soc-fsl-sai.o
- obj-$(CONFIG_SND_SOC_FSL_SSI) += snd-soc-fsl-ssi.o
- obj-$(CONFIG_SND_SOC_FSL_SPDIF) += snd-soc-fsl-spdif.o
-+obj-$(CONFIG_SND_SOC_FSL_HDMI) += snd-soc-fsl-hdmi.o
- obj-$(CONFIG_SND_SOC_FSL_ESAI) += snd-soc-fsl-esai.o
-+obj-$(CONFIG_SND_SOC_FSL_ASRC) += snd-soc-fsl-asrc-pcm.o
-+obj-$(CONFIG_SND_SOC_FSL_ASRC) += snd-soc-fsl-asrc.o
- obj-$(CONFIG_SND_SOC_FSL_UTILS) += snd-soc-fsl-utils.o
- obj-$(CONFIG_SND_SOC_POWERPC_DMA) += snd-soc-fsl-dma.o
-
-@@ -41,22 +47,27 @@
-
- obj-$(CONFIG_SND_SOC_IMX_PCM_FIQ) += imx-pcm-fiq.o
- obj-$(CONFIG_SND_SOC_IMX_PCM_DMA) += imx-pcm-dma.o
-+obj-$(CONFIG_SND_SOC_IMX_HDMI_DMA) += imx-hdmi-dma.o
-
- # i.MX Machine Support
- snd-soc-eukrea-tlv320-objs := eukrea-tlv320.o
- snd-soc-phycore-ac97-objs := phycore-ac97.o
- snd-soc-mx27vis-aic32x4-objs := mx27vis-aic32x4.o
- snd-soc-wm1133-ev1-objs := wm1133-ev1.o
-+snd-soc-imx-cs42888-objs := imx-cs42888.o
- snd-soc-imx-sgtl5000-objs := imx-sgtl5000.o
- snd-soc-imx-wm8962-objs := imx-wm8962.o
- snd-soc-imx-spdif-objs := imx-spdif.o
-+snd-soc-imx-hdmi-objs := imx-hdmi.o
- snd-soc-imx-mc13783-objs := imx-mc13783.o
-
- obj-$(CONFIG_SND_SOC_EUKREA_TLV320) += snd-soc-eukrea-tlv320.o
- obj-$(CONFIG_SND_SOC_PHYCORE_AC97) += snd-soc-phycore-ac97.o
- obj-$(CONFIG_SND_SOC_MX27VIS_AIC32X4) += snd-soc-mx27vis-aic32x4.o
- obj-$(CONFIG_SND_MXC_SOC_WM1133_EV1) += snd-soc-wm1133-ev1.o
-+obj-$(CONFIG_SND_SOC_IMX_CS42888) += snd-soc-imx-cs42888.o
- obj-$(CONFIG_SND_SOC_IMX_SGTL5000) += snd-soc-imx-sgtl5000.o
- obj-$(CONFIG_SND_SOC_IMX_WM8962) += snd-soc-imx-wm8962.o
- obj-$(CONFIG_SND_SOC_IMX_SPDIF) += snd-soc-imx-spdif.o
-+obj-$(CONFIG_SND_SOC_IMX_HDMI) += snd-soc-imx-hdmi.o
- obj-$(CONFIG_SND_SOC_IMX_MC13783) += snd-soc-imx-mc13783.o
diff -Nur linux-3.14.54.orig/sound/soc/fsl/fsl_asrc.c linux-3.14.54/sound/soc/fsl/fsl_asrc.c
--- linux-3.14.54.orig/sound/soc/fsl/fsl_asrc.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/sound/soc/fsl/fsl_asrc.c 2015-10-12 10:56:18.233351147 +0200
++++ linux-3.14.54/sound/soc/fsl/fsl_asrc.c 2015-10-15 15:51:25.720624504 +0200
@@ -0,0 +1,498 @@
+/*
+ * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -348772,7 +348652,7 @@ diff -Nur linux-3.14.54.orig/sound/soc/fsl/fsl_asrc.c linux-3.14.54/sound/soc/fs
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/sound/soc/fsl/fsl_asrc.h linux-3.14.54/sound/soc/fsl/fsl_asrc.h
--- linux-3.14.54.orig/sound/soc/fsl/fsl_asrc.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/sound/soc/fsl/fsl_asrc.h 2015-10-12 10:56:18.233351147 +0200
++++ linux-3.14.54/sound/soc/fsl/fsl_asrc.h 2015-10-15 15:51:25.720624504 +0200
@@ -0,0 +1,48 @@
+/*
+ * fsl_asrc.h - ALSA ASRC interface
@@ -348824,7 +348704,7 @@ diff -Nur linux-3.14.54.orig/sound/soc/fsl/fsl_asrc.h linux-3.14.54/sound/soc/fs
+#endif
diff -Nur linux-3.14.54.orig/sound/soc/fsl/fsl_asrc_pcm.c linux-3.14.54/sound/soc/fsl/fsl_asrc_pcm.c
--- linux-3.14.54.orig/sound/soc/fsl/fsl_asrc_pcm.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/sound/soc/fsl/fsl_asrc_pcm.c 2015-10-12 10:56:18.234351147 +0200
++++ linux-3.14.54/sound/soc/fsl/fsl_asrc_pcm.c 2015-10-15 15:51:25.720624504 +0200
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -348869,7 +348749,7 @@ diff -Nur linux-3.14.54.orig/sound/soc/fsl/fsl_asrc_pcm.c linux-3.14.54/sound/so
+MODULE_LICENSE("GPL");
diff -Nur linux-3.14.54.orig/sound/soc/fsl/fsl_esai.c linux-3.14.54/sound/soc/fsl/fsl_esai.c
--- linux-3.14.54.orig/sound/soc/fsl/fsl_esai.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/fsl/fsl_esai.c 2015-10-12 10:56:18.234351147 +0200
++++ linux-3.14.54/sound/soc/fsl/fsl_esai.c 2015-10-15 15:51:25.720624504 +0200
@@ -785,7 +785,7 @@
return ret;
}
@@ -348881,7 +348761,7 @@ diff -Nur linux-3.14.54.orig/sound/soc/fsl/fsl_esai.c linux-3.14.54/sound/soc/fs
diff -Nur linux-3.14.54.orig/sound/soc/fsl/fsl_hdmi.c linux-3.14.54/sound/soc/fsl/fsl_hdmi.c
--- linux-3.14.54.orig/sound/soc/fsl/fsl_hdmi.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/sound/soc/fsl/fsl_hdmi.c 2015-10-12 10:56:18.234351147 +0200
++++ linux-3.14.54/sound/soc/fsl/fsl_hdmi.c 2015-10-15 15:51:25.720624504 +0200
@@ -0,0 +1,614 @@
+/*
+ * ALSA SoC HDMI Audio Layer for Freescale i.MX
@@ -349499,7 +349379,7 @@ diff -Nur linux-3.14.54.orig/sound/soc/fsl/fsl_hdmi.c linux-3.14.54/sound/soc/fs
+MODULE_ALIAS("platform:fsl-hdmi-dai");
diff -Nur linux-3.14.54.orig/sound/soc/fsl/fsl_spdif.c linux-3.14.54/sound/soc/fsl/fsl_spdif.c
--- linux-3.14.54.orig/sound/soc/fsl/fsl_spdif.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/fsl/fsl_spdif.c 2015-10-12 10:56:18.235351147 +0200
++++ linux-3.14.54/sound/soc/fsl/fsl_spdif.c 2015-10-15 15:51:25.724624241 +0200
@@ -21,6 +21,8 @@
#include <linux/of_address.h>
#include <linux/of_device.h>
@@ -349827,7 +349707,7 @@ diff -Nur linux-3.14.54.orig/sound/soc/fsl/fsl_spdif.c linux-3.14.54/sound/soc/f
};
diff -Nur linux-3.14.54.orig/sound/soc/fsl/fsl_spdif.h linux-3.14.54/sound/soc/fsl/fsl_spdif.h
--- linux-3.14.54.orig/sound/soc/fsl/fsl_spdif.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/fsl/fsl_spdif.h 2015-10-12 10:56:18.235351147 +0200
++++ linux-3.14.54/sound/soc/fsl/fsl_spdif.h 2015-10-15 15:51:25.724624241 +0200
@@ -157,13 +157,19 @@
#define STC_TXCLK_DIV(x) ((((x) - 1) << STC_TXCLK_DIV_OFFSET) & STC_TXCLK_DIV_MASK)
#define STC_TXCLK_SRC_MAX 8
@@ -349864,7 +349744,7 @@ diff -Nur linux-3.14.54.orig/sound/soc/fsl/fsl_spdif.h linux-3.14.54/sound/soc/f
SNDRV_PCM_RATE_32000 | \
diff -Nur linux-3.14.54.orig/sound/soc/fsl/fsl_ssi.c linux-3.14.54/sound/soc/fsl/fsl_ssi.c
--- linux-3.14.54.orig/sound/soc/fsl/fsl_ssi.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/fsl/fsl_ssi.c 2015-10-12 10:56:18.236351147 +0200
++++ linux-3.14.54/sound/soc/fsl/fsl_ssi.c 2015-10-15 15:51:25.724624241 +0200
@@ -3,7 +3,7 @@
*
* Author: Timur Tabi <timur@freescale.com>
@@ -350190,7 +350070,7 @@ diff -Nur linux-3.14.54.orig/sound/soc/fsl/fsl_ssi.c linux-3.14.54/sound/soc/fsl
.remove = fsl_ssi_remove,
diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-cs42888.c linux-3.14.54/sound/soc/fsl/imx-cs42888.c
--- linux-3.14.54.orig/sound/soc/fsl/imx-cs42888.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/sound/soc/fsl/imx-cs42888.c 2015-10-12 10:56:18.236351147 +0200
++++ linux-3.14.54/sound/soc/fsl/imx-cs42888.c 2015-10-15 15:51:25.728623977 +0200
@@ -0,0 +1,369 @@
+/*
+ * Copyright (C) 2010-2014 Freescale Semiconductor, Inc. All Rights Reserved.
@@ -350561,9 +350441,126 @@ diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-cs42888.c linux-3.14.54/sound/soc
+MODULE_DESCRIPTION("ALSA SoC cs42888 Machine Layer Driver");
+MODULE_ALIAS("platform:imx-cs42888");
+MODULE_LICENSE("GPL");
+diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-hdmi.c linux-3.14.54/sound/soc/fsl/imx-hdmi.c
+--- linux-3.14.54.orig/sound/soc/fsl/imx-hdmi.c 1970-01-01 01:00:00.000000000 +0100
++++ linux-3.14.54/sound/soc/fsl/imx-hdmi.c 2015-10-15 15:51:25.728623977 +0200
+@@ -0,0 +1,113 @@
++/*
++ * ASoC HDMI Transmitter driver for IMX development boards
++ *
++ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
++ *
++ * based on stmp3780_devb_hdmi.c
++ *
++ * Vladimir Barinov <vbarinov@embeddedalley.com>
++ *
++ * Copyright 2008 SigmaTel, Inc
++ * Copyright 2008 Embedded Alley Solutions, Inc
++ *
++ * This file is licensed under the terms of the GNU General Public License
++ * version 2. This program is licensed "as is" without any warranty of any
++ * kind, whether express or implied.
++ */
++
++#include <linux/module.h>
++#include <linux/of_platform.h>
++#include <linux/mfd/mxc-hdmi-core.h>
++#include <sound/soc.h>
++
++#include "imx-hdmi.h"
++
++/* imx digital audio interface glue - connects codec <--> CPU */
++static struct snd_soc_dai_link imx_hdmi_dai_link = {
++ .name = "i.MX HDMI Audio Tx",
++ .stream_name = "i.MX HDMI Audio Tx",
++ .codec_dai_name = "hdmi-hifi",
++ .codec_name = "hdmi-audio-codec",
++ .platform_name = "imx-hdmi-audio",
++};
++
++static struct snd_soc_card snd_soc_card_imx_hdmi = {
++ .name = "imx-hdmi-soc",
++ .dai_link = &imx_hdmi_dai_link,
++ .num_links = 1,
++};
++
++static int imx_hdmi_audio_probe(struct platform_device *pdev)
++{
++ struct device_node *hdmi_np, *np = pdev->dev.of_node;
++ struct snd_soc_card *card = &snd_soc_card_imx_hdmi;
++ struct platform_device *hdmi_pdev;
++ int ret = 0;
++
++ if (!hdmi_get_registered()) {
++ dev_err(&pdev->dev, "initialize HDMI-audio failed. load HDMI-video first!\n");
++ return -ENODEV;
++ }
++
++ hdmi_np = of_parse_phandle(np, "hdmi-controller", 0);
++ if (!hdmi_np) {
++ dev_err(&pdev->dev, "failed to find hdmi-audio cpudai\n");
++ ret = -EINVAL;
++ goto end;
++ }
++
++ hdmi_pdev = of_find_device_by_node(hdmi_np);
++ if (!hdmi_pdev) {
++ dev_err(&pdev->dev, "failed to find SSI platform device\n");
++ ret = -EINVAL;
++ goto end;
++ }
++
++ card->dev = &pdev->dev;
++ card->dai_link->cpu_dai_name = dev_name(&hdmi_pdev->dev);
++
++ platform_set_drvdata(pdev, card);
++
++ ret = snd_soc_register_card(card);
++ if (ret)
++ dev_err(&pdev->dev, "failed to register card: %d\n", ret);
++
++end:
++ if (hdmi_np)
++ of_node_put(hdmi_np);
++
++ return ret;
++}
++
++static int imx_hdmi_audio_remove(struct platform_device *pdev)
++{
++ struct snd_soc_card *card = platform_get_drvdata(pdev);
++
++ snd_soc_unregister_card(card);
++
++ return 0;
++}
++
++static const struct of_device_id imx_hdmi_dt_ids[] = {
++ { .compatible = "fsl,imx-audio-hdmi", },
++ { /* sentinel */ }
++};
++MODULE_DEVICE_TABLE(of, imx_hdmi_dt_ids);
++
++static struct platform_driver imx_hdmi_audio_driver = {
++ .probe = imx_hdmi_audio_probe,
++ .remove = imx_hdmi_audio_remove,
++ .driver = {
++ .of_match_table = imx_hdmi_dt_ids,
++ .name = "imx-audio-hdmi",
++ .owner = THIS_MODULE,
++ .pm = &snd_soc_pm_ops,
++ },
++};
++
++module_platform_driver(imx_hdmi_audio_driver);
++
++MODULE_AUTHOR("Freescale Semiconductor, Inc.");
++MODULE_DESCRIPTION("IMX HDMI TX ASoC driver");
++MODULE_LICENSE("GPL");
++MODULE_ALIAS("platform:imx-audio-hdmi");
diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-hdmi-dma.c linux-3.14.54/sound/soc/fsl/imx-hdmi-dma.c
--- linux-3.14.54.orig/sound/soc/fsl/imx-hdmi-dma.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/sound/soc/fsl/imx-hdmi-dma.c 2015-10-12 10:56:18.237351147 +0200
++++ linux-3.14.54/sound/soc/fsl/imx-hdmi-dma.c 2015-10-15 15:51:25.728623977 +0200
@@ -0,0 +1,1240 @@
+/*
+ * imx-hdmi-dma.c -- HDMI DMA driver for ALSA Soc Audio Layer
@@ -351805,126 +351802,9 @@ diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-hdmi-dma.c linux-3.14.54/sound/so
+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
+MODULE_DESCRIPTION("i.MX HDMI audio DMA");
+MODULE_LICENSE("GPL");
-diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-hdmi.c linux-3.14.54/sound/soc/fsl/imx-hdmi.c
---- linux-3.14.54.orig/sound/soc/fsl/imx-hdmi.c 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/sound/soc/fsl/imx-hdmi.c 2015-10-12 10:56:18.236351147 +0200
-@@ -0,0 +1,113 @@
-+/*
-+ * ASoC HDMI Transmitter driver for IMX development boards
-+ *
-+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
-+ *
-+ * based on stmp3780_devb_hdmi.c
-+ *
-+ * Vladimir Barinov <vbarinov@embeddedalley.com>
-+ *
-+ * Copyright 2008 SigmaTel, Inc
-+ * Copyright 2008 Embedded Alley Solutions, Inc
-+ *
-+ * This file is licensed under the terms of the GNU General Public License
-+ * version 2. This program is licensed "as is" without any warranty of any
-+ * kind, whether express or implied.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/of_platform.h>
-+#include <linux/mfd/mxc-hdmi-core.h>
-+#include <sound/soc.h>
-+
-+#include "imx-hdmi.h"
-+
-+/* imx digital audio interface glue - connects codec <--> CPU */
-+static struct snd_soc_dai_link imx_hdmi_dai_link = {
-+ .name = "i.MX HDMI Audio Tx",
-+ .stream_name = "i.MX HDMI Audio Tx",
-+ .codec_dai_name = "hdmi-hifi",
-+ .codec_name = "hdmi-audio-codec",
-+ .platform_name = "imx-hdmi-audio",
-+};
-+
-+static struct snd_soc_card snd_soc_card_imx_hdmi = {
-+ .name = "imx-hdmi-soc",
-+ .dai_link = &imx_hdmi_dai_link,
-+ .num_links = 1,
-+};
-+
-+static int imx_hdmi_audio_probe(struct platform_device *pdev)
-+{
-+ struct device_node *hdmi_np, *np = pdev->dev.of_node;
-+ struct snd_soc_card *card = &snd_soc_card_imx_hdmi;
-+ struct platform_device *hdmi_pdev;
-+ int ret = 0;
-+
-+ if (!hdmi_get_registered()) {
-+ dev_err(&pdev->dev, "initialize HDMI-audio failed. load HDMI-video first!\n");
-+ return -ENODEV;
-+ }
-+
-+ hdmi_np = of_parse_phandle(np, "hdmi-controller", 0);
-+ if (!hdmi_np) {
-+ dev_err(&pdev->dev, "failed to find hdmi-audio cpudai\n");
-+ ret = -EINVAL;
-+ goto end;
-+ }
-+
-+ hdmi_pdev = of_find_device_by_node(hdmi_np);
-+ if (!hdmi_pdev) {
-+ dev_err(&pdev->dev, "failed to find SSI platform device\n");
-+ ret = -EINVAL;
-+ goto end;
-+ }
-+
-+ card->dev = &pdev->dev;
-+ card->dai_link->cpu_dai_name = dev_name(&hdmi_pdev->dev);
-+
-+ platform_set_drvdata(pdev, card);
-+
-+ ret = snd_soc_register_card(card);
-+ if (ret)
-+ dev_err(&pdev->dev, "failed to register card: %d\n", ret);
-+
-+end:
-+ if (hdmi_np)
-+ of_node_put(hdmi_np);
-+
-+ return ret;
-+}
-+
-+static int imx_hdmi_audio_remove(struct platform_device *pdev)
-+{
-+ struct snd_soc_card *card = platform_get_drvdata(pdev);
-+
-+ snd_soc_unregister_card(card);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id imx_hdmi_dt_ids[] = {
-+ { .compatible = "fsl,imx-audio-hdmi", },
-+ { /* sentinel */ }
-+};
-+MODULE_DEVICE_TABLE(of, imx_hdmi_dt_ids);
-+
-+static struct platform_driver imx_hdmi_audio_driver = {
-+ .probe = imx_hdmi_audio_probe,
-+ .remove = imx_hdmi_audio_remove,
-+ .driver = {
-+ .of_match_table = imx_hdmi_dt_ids,
-+ .name = "imx-audio-hdmi",
-+ .owner = THIS_MODULE,
-+ .pm = &snd_soc_pm_ops,
-+ },
-+};
-+
-+module_platform_driver(imx_hdmi_audio_driver);
-+
-+MODULE_AUTHOR("Freescale Semiconductor, Inc.");
-+MODULE_DESCRIPTION("IMX HDMI TX ASoC driver");
-+MODULE_LICENSE("GPL");
-+MODULE_ALIAS("platform:imx-audio-hdmi");
diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-hdmi.h linux-3.14.54/sound/soc/fsl/imx-hdmi.h
--- linux-3.14.54.orig/sound/soc/fsl/imx-hdmi.h 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.14.54/sound/soc/fsl/imx-hdmi.h 2015-10-12 10:56:18.237351147 +0200
++++ linux-3.14.54/sound/soc/fsl/imx-hdmi.h 2015-10-15 15:51:25.728623977 +0200
@@ -0,0 +1,105 @@
+/*
+ * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
@@ -352033,7 +351913,7 @@ diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-hdmi.h linux-3.14.54/sound/soc/fs
+#endif /* __IMX_HDMI_H */
diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-pcm-dma.c linux-3.14.54/sound/soc/fsl/imx-pcm-dma.c
--- linux-3.14.54.orig/sound/soc/fsl/imx-pcm-dma.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/fsl/imx-pcm-dma.c 2015-10-12 10:56:18.237351147 +0200
++++ linux-3.14.54/sound/soc/fsl/imx-pcm-dma.c 2015-10-15 15:51:25.728623977 +0200
@@ -11,6 +11,10 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
@@ -352163,7 +352043,7 @@ diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-pcm-dma.c linux-3.14.54/sound/soc
diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-pcm.h linux-3.14.54/sound/soc/fsl/imx-pcm.h
--- linux-3.14.54.orig/sound/soc/fsl/imx-pcm.h 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/fsl/imx-pcm.h 2015-10-12 10:56:18.237351147 +0200
++++ linux-3.14.54/sound/soc/fsl/imx-pcm.h 2015-10-15 15:51:25.728623977 +0200
@@ -18,13 +18,17 @@
/*
* Do not change this as the FIQ handler depends on this size
@@ -352198,7 +352078,7 @@ diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-pcm.h linux-3.14.54/sound/soc/fsl
}
diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-spdif.c linux-3.14.54/sound/soc/fsl/imx-spdif.c
--- linux-3.14.54.orig/sound/soc/fsl/imx-spdif.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/fsl/imx-spdif.c 2015-10-12 10:56:18.237351147 +0200
++++ linux-3.14.54/sound/soc/fsl/imx-spdif.c 2015-10-15 15:51:25.728623977 +0200
@@ -65,14 +65,15 @@
if (ret)
goto end;
@@ -352227,7 +352107,7 @@ diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-spdif.c linux-3.14.54/sound/soc/f
.probe = imx_spdif_audio_probe,
diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-ssi.c linux-3.14.54/sound/soc/fsl/imx-ssi.c
--- linux-3.14.54.orig/sound/soc/fsl/imx-ssi.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/fsl/imx-ssi.c 2015-10-12 10:56:18.238351147 +0200
++++ linux-3.14.54/sound/soc/fsl/imx-ssi.c 2015-10-15 15:51:25.728623977 +0200
@@ -602,7 +602,8 @@
ssi->fiq_params.dma_params_tx = &ssi->dma_params_tx;
@@ -352240,7 +352120,7 @@ diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-ssi.c linux-3.14.54/sound/soc/fsl
ret = ssi->fiq_init;
diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-wm8962.c linux-3.14.54/sound/soc/fsl/imx-wm8962.c
--- linux-3.14.54.orig/sound/soc/fsl/imx-wm8962.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/fsl/imx-wm8962.c 2015-10-12 10:56:18.238351147 +0200
++++ linux-3.14.54/sound/soc/fsl/imx-wm8962.c 2015-10-15 15:51:25.728623977 +0200
@@ -1,9 +1,9 @@
/*
- * Copyright 2013 Freescale Semiconductor, Inc.
@@ -352685,9 +352565,129 @@ diff -Nur linux-3.14.54.orig/sound/soc/fsl/imx-wm8962.c linux-3.14.54/sound/soc/
return 0;
}
+diff -Nur linux-3.14.54.orig/sound/soc/fsl/Kconfig linux-3.14.54/sound/soc/fsl/Kconfig
+--- linux-3.14.54.orig/sound/soc/fsl/Kconfig 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/sound/soc/fsl/Kconfig 2015-10-15 15:59:25.733028421 +0200
+@@ -11,6 +11,12 @@
+ config SND_SOC_FSL_ESAI
+ tristate
+
++config SND_SOC_FSL_ASRC
++ bool
++
++config SND_SOC_FSL_HDMI
++ bool
++
+ config SND_SOC_FSL_UTILS
+ tristate
+
+@@ -123,9 +129,14 @@
+ select FIQ
+
+ config SND_SOC_IMX_PCM_DMA
+- tristate
++ bool
+ select SND_SOC_GENERIC_DMAENGINE_PCM
+
++config SND_SOC_IMX_HDMI_DMA
++ bool
++ select SND_SOC_GENERIC_DMAENGINE_PCM
++ select SND_SOC_IMX_PCM_DMA
++
+ config SND_SOC_IMX_AUDMUX
+ tristate
+
+@@ -178,6 +189,18 @@
+ Enable I2S based access to the TLV320AIC23B codec attached
+ to the SSI interface
+
++config SND_SOC_IMX_CS42888
++ tristate "SoC Audio support for i.MX boards with cs42888"
++ depends on OF && I2C
++ select SND_SOC_CS42888
++ select SND_SOC_IMX_PCM_DMA
++ select SND_SOC_FSL_ESAI
++ select SND_SOC_FSL_UTILS
++ help
++ SoC Audio support for i.MX boards with cs42888
++ Say Y if you want to add support for SoC audio on an i.MX board with
++ a cs42888 codec.
++
+ config SND_SOC_IMX_WM8962
+ tristate "SoC Audio support for i.MX boards with wm8962"
+ depends on OF && I2C
+@@ -210,6 +233,17 @@
+ Say Y if you want to add support for SoC audio on an i.MX board with
+ a S/DPDIF.
+
++config SND_SOC_IMX_HDMI
++ tristate "SoC Audio support for i.MX boards with HDMI port"
++ depends on MFD_MXC_HDMI
++ select SND_SOC_IMX_HDMI_DMA
++ select SND_SOC_FSL_HDMI
++ select SND_SOC_HDMI_CODEC
++ help
++ SoC Audio support for i.MX boards with HDMI audio
++ Say Y if you want to add support for SoC audio on an i.MX board with
++ IMX HDMI.
++
+ config SND_SOC_IMX_MC13783
+ tristate "SoC Audio support for I.MX boards with mc13783"
+ depends on MFD_MC13XXX && ARM
+diff -Nur linux-3.14.54.orig/sound/soc/fsl/Makefile linux-3.14.54/sound/soc/fsl/Makefile
+--- linux-3.14.54.orig/sound/soc/fsl/Makefile 2015-10-01 11:36:53.000000000 +0200
++++ linux-3.14.54/sound/soc/fsl/Makefile 2015-10-15 15:51:25.728623977 +0200
+@@ -14,13 +14,19 @@
+ snd-soc-fsl-sai-objs := fsl_sai.o
+ snd-soc-fsl-ssi-objs := fsl_ssi.o
+ snd-soc-fsl-spdif-objs := fsl_spdif.o
++snd-soc-fsl-hdmi-objs := fsl_hdmi.o
+ snd-soc-fsl-esai-objs := fsl_esai.o
++snd-soc-fsl-asrc-pcm-objs := fsl_asrc_pcm.o
++snd-soc-fsl-asrc-objs := fsl_asrc.o
+ snd-soc-fsl-utils-objs := fsl_utils.o
+ snd-soc-fsl-dma-objs := fsl_dma.o
+ obj-$(CONFIG_SND_SOC_FSL_SAI) += snd-soc-fsl-sai.o
+ obj-$(CONFIG_SND_SOC_FSL_SSI) += snd-soc-fsl-ssi.o
+ obj-$(CONFIG_SND_SOC_FSL_SPDIF) += snd-soc-fsl-spdif.o
++obj-$(CONFIG_SND_SOC_FSL_HDMI) += snd-soc-fsl-hdmi.o
+ obj-$(CONFIG_SND_SOC_FSL_ESAI) += snd-soc-fsl-esai.o
++obj-$(CONFIG_SND_SOC_FSL_ASRC) += snd-soc-fsl-asrc-pcm.o
++obj-$(CONFIG_SND_SOC_FSL_ASRC) += snd-soc-fsl-asrc.o
+ obj-$(CONFIG_SND_SOC_FSL_UTILS) += snd-soc-fsl-utils.o
+ obj-$(CONFIG_SND_SOC_POWERPC_DMA) += snd-soc-fsl-dma.o
+
+@@ -41,22 +47,27 @@
+
+ obj-$(CONFIG_SND_SOC_IMX_PCM_FIQ) += imx-pcm-fiq.o
+ obj-$(CONFIG_SND_SOC_IMX_PCM_DMA) += imx-pcm-dma.o
++obj-$(CONFIG_SND_SOC_IMX_HDMI_DMA) += imx-hdmi-dma.o
+
+ # i.MX Machine Support
+ snd-soc-eukrea-tlv320-objs := eukrea-tlv320.o
+ snd-soc-phycore-ac97-objs := phycore-ac97.o
+ snd-soc-mx27vis-aic32x4-objs := mx27vis-aic32x4.o
+ snd-soc-wm1133-ev1-objs := wm1133-ev1.o
++snd-soc-imx-cs42888-objs := imx-cs42888.o
+ snd-soc-imx-sgtl5000-objs := imx-sgtl5000.o
+ snd-soc-imx-wm8962-objs := imx-wm8962.o
+ snd-soc-imx-spdif-objs := imx-spdif.o
++snd-soc-imx-hdmi-objs := imx-hdmi.o
+ snd-soc-imx-mc13783-objs := imx-mc13783.o
+
+ obj-$(CONFIG_SND_SOC_EUKREA_TLV320) += snd-soc-eukrea-tlv320.o
+ obj-$(CONFIG_SND_SOC_PHYCORE_AC97) += snd-soc-phycore-ac97.o
+ obj-$(CONFIG_SND_SOC_MX27VIS_AIC32X4) += snd-soc-mx27vis-aic32x4.o
+ obj-$(CONFIG_SND_MXC_SOC_WM1133_EV1) += snd-soc-wm1133-ev1.o
++obj-$(CONFIG_SND_SOC_IMX_CS42888) += snd-soc-imx-cs42888.o
+ obj-$(CONFIG_SND_SOC_IMX_SGTL5000) += snd-soc-imx-sgtl5000.o
+ obj-$(CONFIG_SND_SOC_IMX_WM8962) += snd-soc-imx-wm8962.o
+ obj-$(CONFIG_SND_SOC_IMX_SPDIF) += snd-soc-imx-spdif.o
++obj-$(CONFIG_SND_SOC_IMX_HDMI) += snd-soc-imx-hdmi.o
+ obj-$(CONFIG_SND_SOC_IMX_MC13783) += snd-soc-imx-mc13783.o
diff -Nur linux-3.14.54.orig/sound/soc/soc-pcm.c linux-3.14.54/sound/soc/soc-pcm.c
--- linux-3.14.54.orig/sound/soc/soc-pcm.c 2015-10-01 11:36:53.000000000 +0200
-+++ linux-3.14.54/sound/soc/soc-pcm.c 2015-10-12 10:56:18.239351147 +0200
++++ linux-3.14.54/sound/soc/soc-pcm.c 2015-10-15 15:51:25.728623977 +0200
@@ -945,7 +945,7 @@
}
}
diff --git a/target/arm/solidrun-imx6/patches/3.18.22/solidrun-imx6-wlan.patch b/target/arm/solidrun-imx6/patches/3.18.22/solidrun-imx6-wlan.patch
deleted file mode 100644
index 3ab3081db..000000000
--- a/target/arm/solidrun-imx6/patches/3.18.22/solidrun-imx6-wlan.patch
+++ /dev/null
@@ -1,3252 +0,0 @@
-diff -Nur linux-3.18.8.orig/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi linux-3.18.8/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
---- linux-3.18.8.orig/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi 2015-02-27 02:49:36.000000000 +0100
-+++ linux-3.18.8/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi 2015-03-02 03:23:14.000000000 +0100
-@@ -170,6 +170,28 @@
- MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
- >;
- };
-+
-+ pinctrl_cubox_i_usdhc2_100mhz: cubox-i-usdhc2-100mhz {
-+ fsl,pins = <
-+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
-+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
-+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
-+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
-+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
-+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130b9
-+ >;
-+ };
-+
-+ pinctrl_cubox_i_usdhc2_200mhz: cubox-i-usdhc2-200mhz {
-+ fsl,pins = <
-+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
-+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
-+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
-+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
-+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
-+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x130f9
-+ >;
-+ };
- };
- };
-
-@@ -194,8 +216,10 @@
- };
-
- &usdhc2 {
-- pinctrl-names = "default";
-+ pinctrl-names = "default", "state_100mhz", "state_200mhz";
- pinctrl-0 = <&pinctrl_cubox_i_usdhc2_aux &pinctrl_cubox_i_usdhc2>;
-+ pinctrl-1 = <&pinctrl_cubox_i_usdhc2_aux &pinctrl_cubox_i_usdhc2_100mhz>;
-+ pinctrl-2 = <&pinctrl_cubox_i_usdhc2_aux &pinctrl_cubox_i_usdhc2_200mhz>;
- vmmc-supply = <&reg_3p3v>;
- cd-gpios = <&gpio1 4 0>;
- status = "okay";
-diff -Nur linux-3.18.8.orig/arch/arm/boot/dts/imx6qdl-microsom.dtsi linux-3.18.8/arch/arm/boot/dts/imx6qdl-microsom.dtsi
---- linux-3.18.8.orig/arch/arm/boot/dts/imx6qdl-microsom.dtsi 2015-02-27 02:49:36.000000000 +0100
-+++ linux-3.18.8/arch/arm/boot/dts/imx6qdl-microsom.dtsi 2015-03-02 02:58:12.000000000 +0100
-@@ -1,15 +1,95 @@
- /*
- * Copyright (C) 2013,2014 Russell King
- */
-+#include <dt-bindings/gpio/gpio.h>
-+/ {
-+ regulators {
-+ compatible = "simple-bus";
-+
-+ reg_brcm_osc: brcm-osc-reg {
-+ compatible = "regulator-fixed";
-+ enable-active-high;
-+ gpio = <&gpio5 5 0>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_microsom_brcm_osc_reg>;
-+ regulator-name = "brcm_osc_reg";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ regulator-always-on;
-+ regulator-boot-on;
-+ };
-+
-+ reg_brcm: brcm-reg {
-+ compatible = "regulator-fixed";
-+ enable-active-high;
-+ gpio = <&gpio3 19 0>;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
-+ regulator-name = "brcm_reg";
-+ regulator-min-microvolt = <3300000>;
-+ regulator-max-microvolt = <3300000>;
-+ startup-delay-us = <200000>;
-+ };
-+ };
-+};
-
- &iomuxc {
- microsom {
-+ pinctrl_microsom_brcm_bt: microsom-brcm-bt {
-+ fsl,pins = <
-+ MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x40013070
-+ MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x40013070
-+ MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x40013070
-+ >;
-+ };
-+
-+ pinctrl_microsom_brcm_osc_reg: microsom-brcm-osc-reg {
-+ fsl,pins = <
-+ MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070
-+ >;
-+ };
-+
-+ pinctrl_microsom_brcm_reg: microsom-brcm-reg {
-+ fsl,pins = <
-+ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x40013070
-+ >;
-+ };
-+
-+ pinctrl_microsom_brcm_wifi: microsom-brcm-wifi {
-+ fsl,pins = <
-+ MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x1b0b0
-+ MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x40013070
-+ MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x40013070
-+ MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x40013070
-+ >;
-+ };
-+
- pinctrl_microsom_uart1: microsom-uart1 {
- fsl,pins = <
- MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
- MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
- >;
- };
-+
-+ pinctrl_microsom_uart4_1: microsom-uart4 {
-+ fsl,pins = <
-+ MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
-+ MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
-+ MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
-+ MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
-+ >;
-+ };
-+
-+ pinctrl_microsom_usdhc1: microsom-usdhc1 {
-+ fsl,pins = <
-+ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
-+ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
-+ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
-+ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
-+ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
-+ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
-+ >;
-+ };
- };
- };
-
-@@ -18,3 +98,23 @@
- pinctrl-0 = <&pinctrl_microsom_uart1>;
- status = "okay";
- };
-+
-+/* UART4 - Connected to optional BRCM Wifi/BT/FM */
-+&uart4 {
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_microsom_brcm_bt &pinctrl_microsom_uart4_1>;
-+ fsl,uart-has-rtscts;
-+ status = "okay";
-+};
-+
-+/* USDHC1 - Connected to optional BRCM Wifi/BT/FM */
-+&usdhc1 {
-+ card-external-vcc-supply = <&reg_brcm>;
-+ card-reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>, <&gpio6 0 GPIO_ACTIVE_LOW>;
-+ keep-power-in-suspend;
-+ non-removable;
-+ pinctrl-names = "default";
-+ pinctrl-0 = <&pinctrl_microsom_brcm_wifi &pinctrl_microsom_usdhc1>;
-+ vmmc-supply = <&reg_brcm>;
-+ status = "okay";
-+};
-diff -Nur linux-3.18.8.orig/Documentation/devicetree/bindings/mmc/mmc.txt linux-3.18.8/Documentation/devicetree/bindings/mmc/mmc.txt
---- linux-3.18.8.orig/Documentation/devicetree/bindings/mmc/mmc.txt 2015-02-27 02:49:36.000000000 +0100
-+++ linux-3.18.8/Documentation/devicetree/bindings/mmc/mmc.txt 2015-03-02 03:25:33.000000000 +0100
-@@ -5,6 +5,8 @@
- Interpreted by the OF core:
- - reg: Registers location and length.
- - interrupts: Interrupts used by the MMC controller.
-+- clocks: Clocks needed for the host controller, if any.
-+- clock-names: Goes with clocks above.
-
- Card detection:
- If no property below is supplied, host native card detect is used.
-@@ -43,6 +45,15 @@
- - dsr: Value the card's (optional) Driver Stage Register (DSR) should be
- programmed with. Valid range: [0 .. 0xffff].
-
-+Card power and reset control:
-+The following properties can be specified for cases where the MMC
-+peripheral needs additional reset, regulator and clock lines. It is for
-+example common for WiFi/BT adapters to have these separate from the main
-+MMC bus:
-+ - card-reset-gpios: Specify GPIOs for card reset (reset active low)
-+ - card-external-vcc-supply: Regulator to drive (independent) card VCC
-+ - clock with name "card_ext_clock": External clock provided to the card
-+
- *NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line
- polarity properties, we have to fix the meaning of the "normal" and "inverted"
- line levels. We choose to follow the SDHCI standard, which specifies both those
-diff -Nur linux-3.18.8.orig/drivers/mmc/core/core.c linux-3.18.8/drivers/mmc/core/core.c
---- linux-3.18.8.orig/drivers/mmc/core/core.c 2015-02-27 02:49:36.000000000 +0100
-+++ linux-3.18.8/drivers/mmc/core/core.c 2015-03-02 03:25:33.000000000 +0100
-@@ -13,11 +13,13 @@
- #include <linux/module.h>
- #include <linux/init.h>
- #include <linux/interrupt.h>
-+#include <linux/clk.h>
- #include <linux/completion.h>
- #include <linux/device.h>
- #include <linux/delay.h>
- #include <linux/pagemap.h>
- #include <linux/err.h>
-+#include <linux/gpio/consumer.h>
- #include <linux/leds.h>
- #include <linux/scatterlist.h>
- #include <linux/log2.h>
-@@ -1507,6 +1509,43 @@
- mmc_host_clk_release(host);
- }
-
-+static void mmc_card_power_up(struct mmc_host *host)
-+{
-+ int i;
-+ struct gpio_desc **gds = host->card_reset_gpios;
-+
-+ for (i = 0; i < ARRAY_SIZE(host->card_reset_gpios); i++) {
-+ if (gds[i]) {
-+ dev_dbg(host->parent, "Asserting reset line %d", i);
-+ gpiod_set_value(gds[i], 1);
-+ }
-+ }
-+
-+ if (host->card_regulator) {
-+ dev_dbg(host->parent, "Enabling external regulator");
-+ if (regulator_enable(host->card_regulator))
-+ dev_err(host->parent, "Failed to enable external regulator");
-+ }
-+
-+ if (host->card_clk) {
-+ dev_dbg(host->parent, "Enabling external clock");
-+ clk_prepare_enable(host->card_clk);
-+ }
-+
-+ /* 2ms delay to let clocks and power settle */
-+ mmc_delay(20);
-+
-+ for (i = 0; i < ARRAY_SIZE(host->card_reset_gpios); i++) {
-+ if (gds[i]) {
-+ dev_dbg(host->parent, "Deasserting reset line %d", i);
-+ gpiod_set_value(gds[i], 0);
-+ }
-+ }
-+
-+ /* 2ms delay to after reset release */
-+ mmc_delay(20);
-+}
-+
- /*
- * Apply power to the MMC stack. This is a two-stage process.
- * First, we enable power to the card without the clock running.
-@@ -1523,6 +1562,9 @@
- if (host->ios.power_mode == MMC_POWER_ON)
- return;
-
-+ /* Power up the card/module first, if needed */
-+ mmc_card_power_up(host);
-+
- mmc_host_clk_hold(host);
-
- host->ios.vdd = fls(ocr) - 1;
-diff -Nur linux-3.18.8.orig/drivers/mmc/core/host.c linux-3.18.8/drivers/mmc/core/host.c
---- linux-3.18.8.orig/drivers/mmc/core/host.c 2015-02-27 02:49:36.000000000 +0100
-+++ linux-3.18.8/drivers/mmc/core/host.c 2015-03-02 03:26:23.000000000 +0100
-@@ -12,14 +12,18 @@
- * MMC host class device management
- */
-
-+#include <linux/kernel.h>
-+#include <linux/clk.h>
- #include <linux/device.h>
- #include <linux/err.h>
-+#include <linux/gpio/consumer.h>
- #include <linux/idr.h>
- #include <linux/of.h>
- #include <linux/of_gpio.h>
- #include <linux/pagemap.h>
- #include <linux/export.h>
- #include <linux/leds.h>
-+#include <linux/regulator/consumer.h>
- #include <linux/slab.h>
- #include <linux/suspend.h>
-
-@@ -466,6 +470,66 @@
-
- EXPORT_SYMBOL(mmc_of_parse);
-
-+static int mmc_of_parse_child(struct mmc_host *host)
-+{
-+ struct device_node *np;
-+ struct clk *clk;
-+ int i;
-+
-+ if (!host->parent || !host->parent->of_node)
-+ return 0;
-+
-+ np = host->parent->of_node;
-+
-+ host->card_regulator = regulator_get(host->parent, "card-external-vcc");
-+ if (IS_ERR(host->card_regulator)) {
-+ if (PTR_ERR(host->card_regulator) == -EPROBE_DEFER)
-+ return PTR_ERR(host->card_regulator);
-+ host->card_regulator = NULL;
-+ }
-+
-+ /* Parse card power/reset/clock control */
-+ if (of_find_property(np, "card-reset-gpios", NULL)) {
-+ struct gpio_desc *gpd;
-+ int level = 0;
-+
-+ /*
-+ * If the regulator is enabled, then we can hold the
-+ * card in reset with an active high resets. Otherwise,
-+ * hold the resets low.
-+ */
-+ if (host->card_regulator && regulator_is_enabled(host->card_regulator))
-+ level = 1;
-+
-+ for (i = 0; i < ARRAY_SIZE(host->card_reset_gpios); i++) {
-+ gpd = devm_gpiod_get_index(host->parent, "card-reset", i);
-+ if (IS_ERR(gpd)) {
-+ if (PTR_ERR(gpd) == -EPROBE_DEFER)
-+ return PTR_ERR(gpd);
-+ break;
-+ }
-+ gpiod_direction_output(gpd, gpiod_is_active_low(gpd) | level);
-+ host->card_reset_gpios[i] = gpd;
-+ }
-+
-+ gpd = devm_gpiod_get_index(host->parent, "card-reset", ARRAY_SIZE(host->card_reset_gpios));
-+ if (!IS_ERR(gpd)) {
-+ dev_warn(host->parent, "More reset gpios than we can handle");
-+ gpiod_put(gpd);
-+ }
-+ }
-+
-+ clk = of_clk_get_by_name(np, "card_ext_clock");
-+ if (IS_ERR(clk)) {
-+ if (PTR_ERR(clk) == -EPROBE_DEFER)
-+ return PTR_ERR(clk);
-+ clk = NULL;
-+ }
-+ host->card_clk = clk;
-+
-+ return 0;
-+}
-+
- /**
- * mmc_alloc_host - initialise the per-host structure.
- * @extra: sizeof private data structure
-@@ -545,6 +609,10 @@
- {
- int err;
-
-+ err = mmc_of_parse_child(host);
-+ if (err)
-+ return err;
-+
- WARN_ON((host->caps & MMC_CAP_SDIO_IRQ) &&
- !host->ops->enable_sdio_irq);
-
-diff -Nur linux-3.18.8.orig/drivers/mmc/host/dw_mmc.c linux-3.18.8/drivers/mmc/host/dw_mmc.c
---- linux-3.18.8.orig/drivers/mmc/host/dw_mmc.c 2015-02-27 02:49:36.000000000 +0100
-+++ linux-3.18.8/drivers/mmc/host/dw_mmc.c 2015-03-02 03:25:56.000000000 +0100
-@@ -2211,6 +2211,8 @@
- if (!mmc)
- return -ENOMEM;
-
-+ mmc_of_parse(mmc);
-+
- slot = mmc_priv(mmc);
- slot->id = id;
- slot->mmc = mmc;
-diff -Nur linux-3.18.8.orig/drivers/mmc/host/dw_mmc.c.orig linux-3.18.8/drivers/mmc/host/dw_mmc.c.orig
---- linux-3.18.8.orig/drivers/mmc/host/dw_mmc.c.orig 1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.18.8/drivers/mmc/host/dw_mmc.c.orig 2015-02-27 02:49:36.000000000 +0100
-@@ -0,0 +1,2855 @@
-+/*
-+ * Synopsys DesignWare Multimedia Card Interface driver
-+ * (Based on NXP driver for lpc 31xx)
-+ *
-+ * Copyright (C) 2009 NXP Semiconductors
-+ * Copyright (C) 2009, 2010 Imagination Technologies Ltd.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#include <linux/blkdev.h>
-+#include <linux/clk.h>
-+#include <linux/debugfs.h>
-+#include <linux/device.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/err.h>
-+#include <linux/init.h>
-+#include <linux/interrupt.h>
-+#include <linux/ioport.h>
-+#include <linux/module.h>
-+#include <linux/platform_device.h>
-+#include <linux/seq_file.h>
-+#include <linux/slab.h>
-+#include <linux/stat.h>
-+#include <linux/delay.h>
-+#include <linux/irq.h>
-+#include <linux/mmc/host.h>
-+#include <linux/mmc/mmc.h>
-+#include <linux/mmc/sd.h>
-+#include <linux/mmc/sdio.h>
-+#include <linux/mmc/dw_mmc.h>
-+#include <linux/bitops.h>
-+#include <linux/regulator/consumer.h>
-+#include <linux/workqueue.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/mmc/slot-gpio.h>
-+
-+#include "dw_mmc.h"
-+
-+/* Common flag combinations */
-+#define DW_MCI_DATA_ERROR_FLAGS (SDMMC_INT_DRTO | SDMMC_INT_DCRC | \
-+ SDMMC_INT_HTO | SDMMC_INT_SBE | \
-+ SDMMC_INT_EBE)
-+#define DW_MCI_CMD_ERROR_FLAGS (SDMMC_INT_RTO | SDMMC_INT_RCRC | \
-+ SDMMC_INT_RESP_ERR)
-+#define DW_MCI_ERROR_FLAGS (DW_MCI_DATA_ERROR_FLAGS | \
-+ DW_MCI_CMD_ERROR_FLAGS | SDMMC_INT_HLE)
-+#define DW_MCI_SEND_STATUS 1
-+#define DW_MCI_RECV_STATUS 2
-+#define DW_MCI_DMA_THRESHOLD 16
-+
-+#define DW_MCI_FREQ_MAX 200000000 /* unit: HZ */
-+#define DW_MCI_FREQ_MIN 400000 /* unit: HZ */
-+
-+#ifdef CONFIG_MMC_DW_IDMAC
-+#define IDMAC_INT_CLR (SDMMC_IDMAC_INT_AI | SDMMC_IDMAC_INT_NI | \
-+ SDMMC_IDMAC_INT_CES | SDMMC_IDMAC_INT_DU | \
-+ SDMMC_IDMAC_INT_FBE | SDMMC_IDMAC_INT_RI | \
-+ SDMMC_IDMAC_INT_TI)
-+
-+struct idmac_desc {
-+ u32 des0; /* Control Descriptor */
-+#define IDMAC_DES0_DIC BIT(1)
-+#define IDMAC_DES0_LD BIT(2)
-+#define IDMAC_DES0_FD BIT(3)
-+#define IDMAC_DES0_CH BIT(4)
-+#define IDMAC_DES0_ER BIT(5)
-+#define IDMAC_DES0_CES BIT(30)
-+#define IDMAC_DES0_OWN BIT(31)
-+
-+ u32 des1; /* Buffer sizes */
-+#define IDMAC_SET_BUFFER1_SIZE(d, s) \
-+ ((d)->des1 = ((d)->des1 & 0x03ffe000) | ((s) & 0x1fff))
-+
-+ u32 des2; /* buffer 1 physical address */
-+
-+ u32 des3; /* buffer 2 physical address */
-+};
-+#endif /* CONFIG_MMC_DW_IDMAC */
-+
-+static bool dw_mci_reset(struct dw_mci *host);
-+
-+#if defined(CONFIG_DEBUG_FS)
-+static int dw_mci_req_show(struct seq_file *s, void *v)
-+{
-+ struct dw_mci_slot *slot = s->private;
-+ struct mmc_request *mrq;
-+ struct mmc_command *cmd;
-+ struct mmc_command *stop;
-+ struct mmc_data *data;
-+
-+ /* Make sure we get a consistent snapshot */
-+ spin_lock_bh(&slot->host->lock);
-+ mrq = slot->mrq;
-+
-+ if (mrq) {
-+ cmd = mrq->cmd;
-+ data = mrq->data;
-+ stop = mrq->stop;
-+
-+ if (cmd)
-+ seq_printf(s,
-+ "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
-+ cmd->opcode, cmd->arg, cmd->flags,
-+ cmd->resp[0], cmd->resp[1], cmd->resp[2],
-+ cmd->resp[2], cmd->error);
-+ if (data)
-+ seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
-+ data->bytes_xfered, data->blocks,
-+ data->blksz, data->flags, data->error);
-+ if (stop)
-+ seq_printf(s,
-+ "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
-+ stop->opcode, stop->arg, stop->flags,
-+ stop->resp[0], stop->resp[1], stop->resp[2],
-+ stop->resp[2], stop->error);
-+ }
-+
-+ spin_unlock_bh(&slot->host->lock);
-+
-+ return 0;
-+}
-+
-+static int dw_mci_req_open(struct inode *inode, struct file *file)
-+{
-+ return single_open(file, dw_mci_req_show, inode->i_private);
-+}
-+
-+static const struct file_operations dw_mci_req_fops = {
-+ .owner = THIS_MODULE,
-+ .open = dw_mci_req_open,
-+ .read = seq_read,
-+ .llseek = seq_lseek,
-+ .release = single_release,
-+};
-+
-+static int dw_mci_regs_show(struct seq_file *s, void *v)
-+{
-+ seq_printf(s, "STATUS:\t0x%08x\n", SDMMC_STATUS);
-+ seq_printf(s, "RINTSTS:\t0x%08x\n", SDMMC_RINTSTS);
-+ seq_printf(s, "CMD:\t0x%08x\n", SDMMC_CMD);
-+ seq_printf(s, "CTRL:\t0x%08x\n", SDMMC_CTRL);
-+ seq_printf(s, "INTMASK:\t0x%08x\n", SDMMC_INTMASK);
-+ seq_printf(s, "CLKENA:\t0x%08x\n", SDMMC_CLKENA);
-+
-+ return 0;
-+}
-+
-+static int dw_mci_regs_open(struct inode *inode, struct file *file)
-+{
-+ return single_open(file, dw_mci_regs_show, inode->i_private);
-+}
-+
-+static const struct file_operations dw_mci_regs_fops = {
-+ .owner = THIS_MODULE,
-+ .open = dw_mci_regs_open,
-+ .read = seq_read,
-+ .llseek = seq_lseek,
-+ .release = single_release,
-+};
-+
-+static void dw_mci_init_debugfs(struct dw_mci_slot *slot)
-+{
-+ struct mmc_host *mmc = slot->mmc;
-+ struct dw_mci *host = slot->host;
-+ struct dentry *root;
-+ struct dentry *node;
-+
-+ root = mmc->debugfs_root;
-+ if (!root)
-+ return;
-+
-+ node = debugfs_create_file("regs", S_IRUSR, root, host,
-+ &dw_mci_regs_fops);
-+ if (!node)
-+ goto err;
-+
-+ node = debugfs_create_file("req", S_IRUSR, root, slot,
-+ &dw_mci_req_fops);
-+ if (!node)
-+ goto err;
-+
-+ node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
-+ if (!node)
-+ goto err;
-+
-+ node = debugfs_create_x32("pending_events", S_IRUSR, root,
-+ (u32 *)&host->pending_events);
-+ if (!node)
-+ goto err;
-+
-+ node = debugfs_create_x32("completed_events", S_IRUSR, root,
-+ (u32 *)&host->completed_events);
-+ if (!node)
-+ goto err;
-+
-+ return;
-+
-+err:
-+ dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
-+}
-+#endif /* defined(CONFIG_DEBUG_FS) */
-+
-+static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg);
-+
-+static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd)
-+{
-+ struct mmc_data *data;
-+ struct dw_mci_slot *slot = mmc_priv(mmc);
-+ struct dw_mci *host = slot->host;
-+ const struct dw_mci_drv_data *drv_data = slot->host->drv_data;
-+ u32 cmdr;
-+ cmd->error = -EINPROGRESS;
-+
-+ cmdr = cmd->opcode;
-+
-+ if (cmd->opcode == MMC_STOP_TRANSMISSION ||
-+ cmd->opcode == MMC_GO_IDLE_STATE ||
-+ cmd->opcode == MMC_GO_INACTIVE_STATE ||
-+ (cmd->opcode == SD_IO_RW_DIRECT &&
-+ ((cmd->arg >> 9) & 0x1FFFF) == SDIO_CCCR_ABORT))
-+ cmdr |= SDMMC_CMD_STOP;
-+ else if (cmd->opcode != MMC_SEND_STATUS && cmd->data)
-+ cmdr |= SDMMC_CMD_PRV_DAT_WAIT;
-+
-+ if (cmd->opcode == SD_SWITCH_VOLTAGE) {
-+ u32 clk_en_a;
-+
-+ /* Special bit makes CMD11 not die */
-+ cmdr |= SDMMC_CMD_VOLT_SWITCH;
-+
-+ /* Change state to continue to handle CMD11 weirdness */
-+ WARN_ON(slot->host->state != STATE_SENDING_CMD);
-+ slot->host->state = STATE_SENDING_CMD11;
-+
-+ /*
-+ * We need to disable low power mode (automatic clock stop)
-+ * while doing voltage switch so we don't confuse the card,
-+ * since stopping the clock is a specific part of the UHS
-+ * voltage change dance.
-+ *
-+ * Note that low power mode (SDMMC_CLKEN_LOW_PWR) will be
-+ * unconditionally turned back on in dw_mci_setup_bus() if it's
-+ * ever called with a non-zero clock. That shouldn't happen
-+ * until the voltage change is all done.
-+ */
-+ clk_en_a = mci_readl(host, CLKENA);
-+ clk_en_a &= ~(SDMMC_CLKEN_LOW_PWR << slot->id);
-+ mci_writel(host, CLKENA, clk_en_a);
-+ mci_send_cmd(slot, SDMMC_CMD_UPD_CLK |
-+ SDMMC_CMD_PRV_DAT_WAIT, 0);
-+ }
-+
-+ if (cmd->flags & MMC_RSP_PRESENT) {
-+ /* We expect a response, so set this bit */
-+ cmdr |= SDMMC_CMD_RESP_EXP;
-+ if (cmd->flags & MMC_RSP_136)
-+ cmdr |= SDMMC_CMD_RESP_LONG;
-+ }
-+
-+ if (cmd->flags & MMC_RSP_CRC)
-+ cmdr |= SDMMC_CMD_RESP_CRC;
-+
-+ data = cmd->data;
-+ if (data) {
-+ cmdr |= SDMMC_CMD_DAT_EXP;
-+ if (data->flags & MMC_DATA_STREAM)
-+ cmdr |= SDMMC_CMD_STRM_MODE;
-+ if (data->flags & MMC_DATA_WRITE)
-+ cmdr |= SDMMC_CMD_DAT_WR;
-+ }
-+
-+ if (drv_data && drv_data->prepare_command)
-+ drv_data->prepare_command(slot->host, &cmdr);
-+
-+ return cmdr;
-+}
-+
-+static u32 dw_mci_prep_stop_abort(struct dw_mci *host, struct mmc_command *cmd)
-+{
-+ struct mmc_command *stop;
-+ u32 cmdr;
-+
-+ if (!cmd->data)
-+ return 0;
-+
-+ stop = &host->stop_abort;
-+ cmdr = cmd->opcode;
-+ memset(stop, 0, sizeof(struct mmc_command));
-+
-+ if (cmdr == MMC_READ_SINGLE_BLOCK ||
-+ cmdr == MMC_READ_MULTIPLE_BLOCK ||
-+ cmdr == MMC_WRITE_BLOCK ||
-+ cmdr == MMC_WRITE_MULTIPLE_BLOCK) {
-+ stop->opcode = MMC_STOP_TRANSMISSION;
-+ stop->arg = 0;
-+ stop->flags = MMC_RSP_R1B | MMC_CMD_AC;
-+ } else if (cmdr == SD_IO_RW_EXTENDED) {
-+ stop->opcode = SD_IO_RW_DIRECT;
-+ stop->arg |= (1 << 31) | (0 << 28) | (SDIO_CCCR_ABORT << 9) |
-+ ((cmd->arg >> 28) & 0x7);
-+ stop->flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_AC;
-+ } else {
-+ return 0;
-+ }
-+
-+ cmdr = stop->opcode | SDMMC_CMD_STOP |
-+ SDMMC_CMD_RESP_CRC | SDMMC_CMD_RESP_EXP;
-+
-+ return cmdr;
-+}
-+
-+static void dw_mci_start_command(struct dw_mci *host,
-+ struct mmc_command *cmd, u32 cmd_flags)
-+{
-+ host->cmd = cmd;
-+ dev_vdbg(host->dev,
-+ "start command: ARGR=0x%08x CMDR=0x%08x\n",
-+ cmd->arg, cmd_flags);
-+
-+ mci_writel(host, CMDARG, cmd->arg);
-+ wmb();
-+
-+ mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START);
-+}
-+
-+static inline void send_stop_abort(struct dw_mci *host, struct mmc_data *data)
-+{
-+ struct mmc_command *stop = data->stop ? data->stop : &host->stop_abort;
-+ dw_mci_start_command(host, stop, host->stop_cmdr);
-+}
-+
-+/* DMA interface functions */
-+static void dw_mci_stop_dma(struct dw_mci *host)
-+{
-+ if (host->using_dma) {
-+ host->dma_ops->stop(host);
-+ host->dma_ops->cleanup(host);
-+ }
-+
-+ /* Data transfer was stopped by the interrupt handler */
-+ set_bit(EVENT_XFER_COMPLETE, &host->pending_events);
-+}
-+
-+static int dw_mci_get_dma_dir(struct mmc_data *data)
-+{
-+ if (data->flags & MMC_DATA_WRITE)
-+ return DMA_TO_DEVICE;
-+ else
-+ return DMA_FROM_DEVICE;
-+}
-+
-+#ifdef CONFIG_MMC_DW_IDMAC
-+static void dw_mci_dma_cleanup(struct dw_mci *host)
-+{
-+ struct mmc_data *data = host->data;
-+
-+ if (data)
-+ if (!data->host_cookie)
-+ dma_unmap_sg(host->dev,
-+ data->sg,
-+ data->sg_len,
-+ dw_mci_get_dma_dir(data));
-+}
-+
-+static void dw_mci_idmac_reset(struct dw_mci *host)
-+{
-+ u32 bmod = mci_readl(host, BMOD);
-+ /* Software reset of DMA */
-+ bmod |= SDMMC_IDMAC_SWRESET;
-+ mci_writel(host, BMOD, bmod);
-+}
-+
-+static void dw_mci_idmac_stop_dma(struct dw_mci *host)
-+{
-+ u32 temp;
-+
-+ /* Disable and reset the IDMAC interface */
-+ temp = mci_readl(host, CTRL);
-+ temp &= ~SDMMC_CTRL_USE_IDMAC;
-+ temp |= SDMMC_CTRL_DMA_RESET;
-+ mci_writel(host, CTRL, temp);
-+
-+ /* Stop the IDMAC running */
-+ temp = mci_readl(host, BMOD);
-+ temp &= ~(SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB);
-+ temp |= SDMMC_IDMAC_SWRESET;
-+ mci_writel(host, BMOD, temp);
-+}
-+
-+static void dw_mci_idmac_complete_dma(struct dw_mci *host)
-+{
-+ struct mmc_data *data = host->data;
-+
-+ dev_vdbg(host->dev, "DMA complete\n");
-+
-+ host->dma_ops->cleanup(host);
-+
-+ /*
-+ * If the card was removed, data will be NULL. No point in trying to
-+ * send the stop command or waiting for NBUSY in this case.
-+ */
-+ if (data) {
-+ set_bit(EVENT_XFER_COMPLETE, &host->pending_events);
-+ tasklet_schedule(&host->tasklet);
-+ }
-+}
-+
-+static void dw_mci_translate_sglist(struct dw_mci *host, struct mmc_data *data,
-+ unsigned int sg_len)
-+{
-+ int i;
-+ struct idmac_desc *desc = host->sg_cpu;
-+
-+ for (i = 0; i < sg_len; i++, desc++) {
-+ unsigned int length = sg_dma_len(&data->sg[i]);
-+ u32 mem_addr = sg_dma_address(&data->sg[i]);
-+
-+ /* Set the OWN bit and disable interrupts for this descriptor */
-+ desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC | IDMAC_DES0_CH;
-+
-+ /* Buffer length */
-+ IDMAC_SET_BUFFER1_SIZE(desc, length);
-+
-+ /* Physical address to DMA to/from */
-+ desc->des2 = mem_addr;
-+ }
-+
-+ /* Set first descriptor */
-+ desc = host->sg_cpu;
-+ desc->des0 |= IDMAC_DES0_FD;
-+
-+ /* Set last descriptor */
-+ desc = host->sg_cpu + (i - 1) * sizeof(struct idmac_desc);
-+ desc->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC);
-+ desc->des0 |= IDMAC_DES0_LD;
-+
-+ wmb();
-+}
-+
-+static void dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len)
-+{
-+ u32 temp;
-+
-+ dw_mci_translate_sglist(host, host->data, sg_len);
-+
-+ /* Select IDMAC interface */
-+ temp = mci_readl(host, CTRL);
-+ temp |= SDMMC_CTRL_USE_IDMAC;
-+ mci_writel(host, CTRL, temp);
-+
-+ wmb();
-+
-+ /* Enable the IDMAC */
-+ temp = mci_readl(host, BMOD);
-+ temp |= SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB;
-+ mci_writel(host, BMOD, temp);
-+
-+ /* Start it running */
-+ mci_writel(host, PLDMND, 1);
-+}
-+
-+static int dw_mci_idmac_init(struct dw_mci *host)
-+{
-+ struct idmac_desc *p;
-+ int i;
-+
-+ /* Number of descriptors in the ring buffer */
-+ host->ring_size = PAGE_SIZE / sizeof(struct idmac_desc);
-+
-+ /* Forward link the descriptor list */
-+ for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; i++, p++)
-+ p->des3 = host->sg_dma + (sizeof(struct idmac_desc) * (i + 1));
-+
-+ /* Set the last descriptor as the end-of-ring descriptor */
-+ p->des3 = host->sg_dma;
-+ p->des0 = IDMAC_DES0_ER;
-+
-+ dw_mci_idmac_reset(host);
-+
-+ /* Mask out interrupts - get Tx & Rx complete only */
-+ mci_writel(host, IDSTS, IDMAC_INT_CLR);
-+ mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | SDMMC_IDMAC_INT_RI |
-+ SDMMC_IDMAC_INT_TI);
-+
-+ /* Set the descriptor base address */
-+ mci_writel(host, DBADDR, host->sg_dma);
-+ return 0;
-+}
-+
-+static const struct dw_mci_dma_ops dw_mci_idmac_ops = {
-+ .init = dw_mci_idmac_init,
-+ .start = dw_mci_idmac_start_dma,
-+ .stop = dw_mci_idmac_stop_dma,
-+ .complete = dw_mci_idmac_complete_dma,
-+ .cleanup = dw_mci_dma_cleanup,
-+};
-+#endif /* CONFIG_MMC_DW_IDMAC */
-+
-+static int dw_mci_pre_dma_transfer(struct dw_mci *host,
-+ struct mmc_data *data,
-+ bool next)
-+{
-+ struct scatterlist *sg;
-+ unsigned int i, sg_len;
-+
-+ if (!next && data->host_cookie)
-+ return data->host_cookie;
-+
-+ /*
-+ * We don't do DMA on "complex" transfers, i.e. with
-+ * non-word-aligned buffers or lengths. Also, we don't bother
-+ * with all the DMA setup overhead for short transfers.
-+ */
-+ if (data->blocks * data->blksz < DW_MCI_DMA_THRESHOLD)
-+ return -EINVAL;
-+
-+ if (data->blksz & 3)
-+ return -EINVAL;
-+
-+ for_each_sg(data->sg, sg, data->sg_len, i) {
-+ if (sg->offset & 3 || sg->length & 3)
-+ return -EINVAL;
-+ }
-+
-+ sg_len = dma_map_sg(host->dev,
-+ data->sg,
-+ data->sg_len,
-+ dw_mci_get_dma_dir(data));
-+ if (sg_len == 0)
-+ return -EINVAL;
-+
-+ if (next)
-+ data->host_cookie = sg_len;
-+
-+ return sg_len;
-+}
-+
-+static void dw_mci_pre_req(struct mmc_host *mmc,
-+ struct mmc_request *mrq,
-+ bool is_first_req)
-+{
-+ struct dw_mci_slot *slot = mmc_priv(mmc);
-+ struct mmc_data *data = mrq->data;
-+
-+ if (!slot->host->use_dma || !data)
-+ return;
-+
-+ if (data->host_cookie) {
-+ data->host_cookie = 0;
-+ return;
-+ }
-+
-+ if (dw_mci_pre_dma_transfer(slot->host, mrq->data, 1) < 0)
-+ data->host_cookie = 0;
-+}
-+
-+static void dw_mci_post_req(struct mmc_host *mmc,
-+ struct mmc_request *mrq,
-+ int err)
-+{
-+ struct dw_mci_slot *slot = mmc_priv(mmc);
-+ struct mmc_data *data = mrq->data;
-+
-+ if (!slot->host->use_dma || !data)
-+ return;
-+
-+ if (data->host_cookie)
-+ dma_unmap_sg(slot->host->dev,
-+ data->sg,
-+ data->sg_len,
-+ dw_mci_get_dma_dir(data));
-+ data->host_cookie = 0;
-+}
-+
-+static void dw_mci_adjust_fifoth(struct dw_mci *host, struct mmc_data *data)
-+{
-+#ifdef CONFIG_MMC_DW_IDMAC
-+ unsigned int blksz = data->blksz;
-+ const u32 mszs[] = {1, 4, 8, 16, 32, 64, 128, 256};
-+ u32 fifo_width = 1 << host->data_shift;
-+ u32 blksz_depth = blksz / fifo_width, fifoth_val;
-+ u32 msize = 0, rx_wmark = 1, tx_wmark, tx_wmark_invers;
-+ int idx = (sizeof(mszs) / sizeof(mszs[0])) - 1;
-+
-+ tx_wmark = (host->fifo_depth) / 2;
-+ tx_wmark_invers = host->fifo_depth - tx_wmark;
-+
-+ /*
-+ * MSIZE is '1',
-+ * if blksz is not a multiple of the FIFO width
-+ */
-+ if (blksz % fifo_width) {
-+ msize = 0;
-+ rx_wmark = 1;
-+ goto done;
-+ }
-+
-+ do {
-+ if (!((blksz_depth % mszs[idx]) ||
-+ (tx_wmark_invers % mszs[idx]))) {
-+ msize = idx;
-+ rx_wmark = mszs[idx] - 1;
-+ break;
-+ }
-+ } while (--idx > 0);
-+ /*
-+ * If idx is '0', it won't be tried
-+ * Thus, initial values are uesed
-+ */
-+done:
-+ fifoth_val = SDMMC_SET_FIFOTH(msize, rx_wmark, tx_wmark);
-+ mci_writel(host, FIFOTH, fifoth_val);
-+#endif
-+}
-+
-+static void dw_mci_ctrl_rd_thld(struct dw_mci *host, struct mmc_data *data)
-+{
-+ unsigned int blksz = data->blksz;
-+ u32 blksz_depth, fifo_depth;
-+ u16 thld_size;
-+
-+ WARN_ON(!(data->flags & MMC_DATA_READ));
-+
-+ /*
-+ * CDTHRCTL doesn't exist prior to 240A (in fact that register offset is
-+ * in the FIFO region, so we really shouldn't access it).
-+ */
-+ if (host->verid < DW_MMC_240A)
-+ return;
-+
-+ if (host->timing != MMC_TIMING_MMC_HS200 &&
-+ host->timing != MMC_TIMING_UHS_SDR104)
-+ goto disable;
-+
-+ blksz_depth = blksz / (1 << host->data_shift);
-+ fifo_depth = host->fifo_depth;
-+
-+ if (blksz_depth > fifo_depth)
-+ goto disable;
-+
-+ /*
-+ * If (blksz_depth) >= (fifo_depth >> 1), should be 'thld_size <= blksz'
-+ * If (blksz_depth) < (fifo_depth >> 1), should be thld_size = blksz
-+ * Currently just choose blksz.
-+ */
-+ thld_size = blksz;
-+ mci_writel(host, CDTHRCTL, SDMMC_SET_RD_THLD(thld_size, 1));
-+ return;
-+
-+disable:
-+ mci_writel(host, CDTHRCTL, SDMMC_SET_RD_THLD(0, 0));
-+}
-+
-+static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data)
-+{
-+ int sg_len;
-+ u32 temp;
-+
-+ host->using_dma = 0;
-+
-+ /* If we don't have a channel, we can't do DMA */
-+ if (!host->use_dma)
-+ return -ENODEV;
-+
-+ sg_len = dw_mci_pre_dma_transfer(host, data, 0);
-+ if (sg_len < 0) {
-+ host->dma_ops->stop(host);
-+ return sg_len;
-+ }
-+
-+ host->using_dma = 1;
-+
-+ dev_vdbg(host->dev,
-+ "sd sg_cpu: %#lx sg_dma: %#lx sg_len: %d\n",
-+ (unsigned long)host->sg_cpu, (unsigned long)host->sg_dma,
-+ sg_len);
-+
-+ /*
-+ * Decide the MSIZE and RX/TX Watermark.
-+ * If current block size is same with previous size,
-+ * no need to update fifoth.
-+ */
-+ if (host->prev_blksz != data->blksz)
-+ dw_mci_adjust_fifoth(host, data);
-+
-+ /* Enable the DMA interface */
-+ temp = mci_readl(host, CTRL);
-+ temp |= SDMMC_CTRL_DMA_ENABLE;
-+ mci_writel(host, CTRL, temp);
-+
-+ /* Disable RX/TX IRQs, let DMA handle it */
-+ temp = mci_readl(host, INTMASK);
-+ temp &= ~(SDMMC_INT_RXDR | SDMMC_INT_TXDR);
-+ mci_writel(host, INTMASK, temp);
-+
-+ host->dma_ops->start(host, sg_len);
-+
-+ return 0;
-+}
-+
-+static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data)
-+{
-+ u32 temp;
-+
-+ data->error = -EINPROGRESS;
-+
-+ WARN_ON(host->data);
-+ host->sg = NULL;
-+ host->data = data;
-+
-+ if (data->flags & MMC_DATA_READ) {
-+ host->dir_status = DW_MCI_RECV_STATUS;
-+ dw_mci_ctrl_rd_thld(host, data);
-+ } else {
-+ host->dir_status = DW_MCI_SEND_STATUS;
-+ }
-+
-+ if (dw_mci_submit_data_dma(host, data)) {
-+ int flags = SG_MITER_ATOMIC;
-+ if (host->data->flags & MMC_DATA_READ)
-+ flags |= SG_MITER_TO_SG;
-+ else
-+ flags |= SG_MITER_FROM_SG;
-+
-+ sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
-+ host->sg = data->sg;
-+ host->part_buf_start = 0;
-+ host->part_buf_count = 0;
-+
-+ mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR);
-+ temp = mci_readl(host, INTMASK);
-+ temp |= SDMMC_INT_TXDR | SDMMC_INT_RXDR;
-+ mci_writel(host, INTMASK, temp);
-+
-+ temp = mci_readl(host, CTRL);
-+ temp &= ~SDMMC_CTRL_DMA_ENABLE;
-+ mci_writel(host, CTRL, temp);
-+
-+ /*
-+ * Use the initial fifoth_val for PIO mode.
-+ * If next issued data may be transfered by DMA mode,
-+ * prev_blksz should be invalidated.
-+ */
-+ mci_writel(host, FIFOTH, host->fifoth_val);
-+ host->prev_blksz = 0;
-+ } else {
-+ /*
-+ * Keep the current block size.
-+ * It will be used to decide whether to update
-+ * fifoth register next time.
-+ */
-+ host->prev_blksz = data->blksz;
-+ }
-+}
-+
-+static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg)
-+{
-+ struct dw_mci *host = slot->host;
-+ unsigned long timeout = jiffies + msecs_to_jiffies(500);
-+ unsigned int cmd_status = 0;
-+
-+ mci_writel(host, CMDARG, arg);
-+ wmb();
-+ mci_writel(host, CMD, SDMMC_CMD_START | cmd);
-+
-+ while (time_before(jiffies, timeout)) {
-+ cmd_status = mci_readl(host, CMD);
-+ if (!(cmd_status & SDMMC_CMD_START))
-+ return;
-+ }
-+ dev_err(&slot->mmc->class_dev,
-+ "Timeout sending command (cmd %#x arg %#x status %#x)\n",
-+ cmd, arg, cmd_status);
-+}
-+
-+static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit)
-+{
-+ struct dw_mci *host = slot->host;
-+ unsigned int clock = slot->clock;
-+ u32 div;
-+ u32 clk_en_a;
-+ u32 sdmmc_cmd_bits = SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT;
-+
-+ /* We must continue to set bit 28 in CMD until the change is complete */
-+ if (host->state == STATE_WAITING_CMD11_DONE)
-+ sdmmc_cmd_bits |= SDMMC_CMD_VOLT_SWITCH;
-+
-+ if (!clock) {
-+ mci_writel(host, CLKENA, 0);
-+ mci_send_cmd(slot, sdmmc_cmd_bits, 0);
-+ } else if (clock != host->current_speed || force_clkinit) {
-+ div = host->bus_hz / clock;
-+ if (host->bus_hz % clock && host->bus_hz > clock)
-+ /*
-+ * move the + 1 after the divide to prevent
-+ * over-clocking the card.
-+ */
-+ div += 1;
-+
-+ div = (host->bus_hz != clock) ? DIV_ROUND_UP(div, 2) : 0;
-+
-+ if ((clock << div) != slot->__clk_old || force_clkinit)
-+ dev_info(&slot->mmc->class_dev,
-+ "Bus speed (slot %d) = %dHz (slot req %dHz, actual %dHZ div = %d)\n",
-+ slot->id, host->bus_hz, clock,
-+ div ? ((host->bus_hz / div) >> 1) :
-+ host->bus_hz, div);
-+
-+ /* disable clock */
-+ mci_writel(host, CLKENA, 0);
-+ mci_writel(host, CLKSRC, 0);
-+
-+ /* inform CIU */
-+ mci_send_cmd(slot, sdmmc_cmd_bits, 0);
-+
-+ /* set clock to desired speed */
-+ mci_writel(host, CLKDIV, div);
-+
-+ /* inform CIU */
-+ mci_send_cmd(slot, sdmmc_cmd_bits, 0);
-+
-+ /* enable clock; only low power if no SDIO */
-+ clk_en_a = SDMMC_CLKEN_ENABLE << slot->id;
-+ if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->id)))
-+ clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id;
-+ mci_writel(host, CLKENA, clk_en_a);
-+
-+ /* inform CIU */
-+ mci_send_cmd(slot, sdmmc_cmd_bits, 0);
-+
-+ /* keep the clock with reflecting clock dividor */
-+ slot->__clk_old = clock << div;
-+ }
-+
-+ host->current_speed = clock;
-+
-+ /* Set the current slot bus width */
-+ mci_writel(host, CTYPE, (slot->ctype << slot->id));
-+}
-+
-+static void __dw_mci_start_request(struct dw_mci *host,
-+ struct dw_mci_slot *slot,
-+ struct mmc_command *cmd)
-+{
-+ struct mmc_request *mrq;
-+ struct mmc_data *data;
-+ u32 cmdflags;
-+
-+ mrq = slot->mrq;
-+
-+ host->cur_slot = slot;
-+ host->mrq = mrq;
-+
-+ host->pending_events = 0;
-+ host->completed_events = 0;
-+ host->cmd_status = 0;
-+ host->data_status = 0;
-+ host->dir_status = 0;
-+
-+ data = cmd->data;
-+ if (data) {
-+ mci_writel(host, TMOUT, 0xFFFFFFFF);
-+ mci_writel(host, BYTCNT, data->blksz*data->blocks);
-+ mci_writel(host, BLKSIZ, data->blksz);
-+ }
-+
-+ cmdflags = dw_mci_prepare_command(slot->mmc, cmd);
-+
-+ /* this is the first command, send the initialization clock */
-+ if (test_and_clear_bit(DW_MMC_CARD_NEED_INIT, &slot->flags))
-+ cmdflags |= SDMMC_CMD_INIT;
-+
-+ if (data) {
-+ dw_mci_submit_data(host, data);
-+ wmb();
-+ }
-+
-+ dw_mci_start_command(host, cmd, cmdflags);
-+
-+ if (mrq->stop)
-+ host->stop_cmdr = dw_mci_prepare_command(slot->mmc, mrq->stop);
-+ else
-+ host->stop_cmdr = dw_mci_prep_stop_abort(host, cmd);
-+}
-+
-+static void dw_mci_start_request(struct dw_mci *host,
-+ struct dw_mci_slot *slot)
-+{
-+ struct mmc_request *mrq = slot->mrq;
-+ struct mmc_command *cmd;
-+
-+ cmd = mrq->sbc ? mrq->sbc : mrq->cmd;
-+ __dw_mci_start_request(host, slot, cmd);
-+}
-+
-+/* must be called with host->lock held */
-+static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot,
-+ struct mmc_request *mrq)
-+{
-+ dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
-+ host->state);
-+
-+ slot->mrq = mrq;
-+
-+ if (host->state == STATE_WAITING_CMD11_DONE) {
-+ dev_warn(&slot->mmc->class_dev,
-+ "Voltage change didn't complete\n");
-+ /*
-+ * this case isn't expected to happen, so we can
-+ * either crash here or just try to continue on
-+ * in the closest possible state
-+ */
-+ host->state = STATE_IDLE;
-+ }
-+
-+ if (host->state == STATE_IDLE) {
-+ host->state = STATE_SENDING_CMD;
-+ dw_mci_start_request(host, slot);
-+ } else {
-+ list_add_tail(&slot->queue_node, &host->queue);
-+ }
-+}
-+
-+static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq)
-+{
-+ struct dw_mci_slot *slot = mmc_priv(mmc);
-+ struct dw_mci *host = slot->host;
-+
-+ WARN_ON(slot->mrq);
-+
-+ /*
-+ * The check for card presence and queueing of the request must be
-+ * atomic, otherwise the card could be removed in between and the
-+ * request wouldn't fail until another card was inserted.
-+ */
-+ spin_lock_bh(&host->lock);
-+
-+ if (!test_bit(DW_MMC_CARD_PRESENT, &slot->flags)) {
-+ spin_unlock_bh(&host->lock);
-+ mrq->cmd->error = -ENOMEDIUM;
-+ mmc_request_done(mmc, mrq);
-+ return;
-+ }
-+
-+ dw_mci_queue_request(host, slot, mrq);
-+
-+ spin_unlock_bh(&host->lock);
-+}
-+
-+static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
-+{
-+ struct dw_mci_slot *slot = mmc_priv(mmc);
-+ const struct dw_mci_drv_data *drv_data = slot->host->drv_data;
-+ u32 regs;
-+ int ret;
-+
-+ switch (ios->bus_width) {
-+ case MMC_BUS_WIDTH_4:
-+ slot->ctype = SDMMC_CTYPE_4BIT;
-+ break;
-+ case MMC_BUS_WIDTH_8:
-+ slot->ctype = SDMMC_CTYPE_8BIT;
-+ break;
-+ default:
-+ /* set default 1 bit mode */
-+ slot->ctype = SDMMC_CTYPE_1BIT;
-+ }
-+
-+ regs = mci_readl(slot->host, UHS_REG);
-+
-+ /* DDR mode set */
-+ if (ios->timing == MMC_TIMING_MMC_DDR52)
-+ regs |= ((0x1 << slot->id) << 16);
-+ else
-+ regs &= ~((0x1 << slot->id) << 16);
-+
-+ mci_writel(slot->host, UHS_REG, regs);
-+ slot->host->timing = ios->timing;
-+
-+ /*
-+ * Use mirror of ios->clock to prevent race with mmc
-+ * core ios update when finding the minimum.
-+ */
-+ slot->clock = ios->clock;
-+
-+ if (drv_data && drv_data->set_ios)
-+ drv_data->set_ios(slot->host, ios);
-+
-+ /* Slot specific timing and width adjustment */
-+ dw_mci_setup_bus(slot, false);
-+
-+ if (slot->host->state == STATE_WAITING_CMD11_DONE && ios->clock != 0)
-+ slot->host->state = STATE_IDLE;
-+
-+ switch (ios->power_mode) {
-+ case MMC_POWER_UP:
-+ if (!IS_ERR(mmc->supply.vmmc)) {
-+ ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc,
-+ ios->vdd);
-+ if (ret) {
-+ dev_err(slot->host->dev,
-+ "failed to enable vmmc regulator\n");
-+ /*return, if failed turn on vmmc*/
-+ return;
-+ }
-+ }
-+ if (!IS_ERR(mmc->supply.vqmmc) && !slot->host->vqmmc_enabled) {
-+ ret = regulator_enable(mmc->supply.vqmmc);
-+ if (ret < 0)
-+ dev_err(slot->host->dev,
-+ "failed to enable vqmmc regulator\n");
-+ else
-+ slot->host->vqmmc_enabled = true;
-+ }
-+ set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags);
-+ regs = mci_readl(slot->host, PWREN);
-+ regs |= (1 << slot->id);
-+ mci_writel(slot->host, PWREN, regs);
-+ break;
-+ case MMC_POWER_OFF:
-+ if (!IS_ERR(mmc->supply.vmmc))
-+ mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
-+
-+ if (!IS_ERR(mmc->supply.vqmmc) && slot->host->vqmmc_enabled) {
-+ regulator_disable(mmc->supply.vqmmc);
-+ slot->host->vqmmc_enabled = false;
-+ }
-+
-+ regs = mci_readl(slot->host, PWREN);
-+ regs &= ~(1 << slot->id);
-+ mci_writel(slot->host, PWREN, regs);
-+ break;
-+ default:
-+ break;
-+ }
-+}
-+
-+static int dw_mci_card_busy(struct mmc_host *mmc)
-+{
-+ struct dw_mci_slot *slot = mmc_priv(mmc);
-+ u32 status;
-+
-+ /*
-+ * Check the busy bit which is low when DAT[3:0]
-+ * (the data lines) are 0000
-+ */
-+ status = mci_readl(slot->host, STATUS);
-+
-+ return !!(status & SDMMC_STATUS_BUSY);
-+}
-+
-+static int dw_mci_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
-+{
-+ struct dw_mci_slot *slot = mmc_priv(mmc);
-+ struct dw_mci *host = slot->host;
-+ u32 uhs;
-+ u32 v18 = SDMMC_UHS_18V << slot->id;
-+ int min_uv, max_uv;
-+ int ret;
-+
-+ /*
-+ * Program the voltage. Note that some instances of dw_mmc may use
-+ * the UHS_REG for this. For other instances (like exynos) the UHS_REG
-+ * does no harm but you need to set the regulator directly. Try both.
-+ */
-+ uhs = mci_readl(host, UHS_REG);
-+ if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
-+ min_uv = 2700000;
-+ max_uv = 3600000;
-+ uhs &= ~v18;
-+ } else {
-+ min_uv = 1700000;
-+ max_uv = 1950000;
-+ uhs |= v18;
-+ }
-+ if (!IS_ERR(mmc->supply.vqmmc)) {
-+ ret = regulator_set_voltage(mmc->supply.vqmmc, min_uv, max_uv);
-+
-+ if (ret) {
-+ dev_err(&mmc->class_dev,
-+ "Regulator set error %d: %d - %d\n",
-+ ret, min_uv, max_uv);
-+ return ret;
-+ }
-+ }
-+ mci_writel(host, UHS_REG, uhs);
-+
-+ return 0;
-+}
-+
-+static int dw_mci_get_ro(struct mmc_host *mmc)
-+{
-+ int read_only;
-+ struct dw_mci_slot *slot = mmc_priv(mmc);
-+ int gpio_ro = mmc_gpio_get_ro(mmc);
-+
-+ /* Use platform get_ro function, else try on board write protect */
-+ if ((slot->quirks & DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT) ||
-+ (slot->host->quirks & DW_MCI_QUIRK_NO_WRITE_PROTECT))
-+ read_only = 0;
-+ else if (!IS_ERR_VALUE(gpio_ro))
-+ read_only = gpio_ro;
-+ else
-+ read_only =
-+ mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0;
-+
-+ dev_dbg(&mmc->class_dev, "card is %s\n",
-+ read_only ? "read-only" : "read-write");
-+
-+ return read_only;
-+}
-+
-+static int dw_mci_get_cd(struct mmc_host *mmc)
-+{
-+ int present;
-+ struct dw_mci_slot *slot = mmc_priv(mmc);
-+ struct dw_mci_board *brd = slot->host->pdata;
-+ struct dw_mci *host = slot->host;
-+ int gpio_cd = mmc_gpio_get_cd(mmc);
-+
-+ /* Use platform get_cd function, else try onboard card detect */
-+ if (brd->quirks & DW_MCI_QUIRK_BROKEN_CARD_DETECTION)
-+ present = 1;
-+ else if (!IS_ERR_VALUE(gpio_cd))
-+ present = gpio_cd;
-+ else
-+ present = (mci_readl(slot->host, CDETECT) & (1 << slot->id))
-+ == 0 ? 1 : 0;
-+
-+ spin_lock_bh(&host->lock);
-+ if (present) {
-+ set_bit(DW_MMC_CARD_PRESENT, &slot->flags);
-+ dev_dbg(&mmc->class_dev, "card is present\n");
-+ } else {
-+ clear_bit(DW_MMC_CARD_PRESENT, &slot->flags);
-+ dev_dbg(&mmc->class_dev, "card is not present\n");
-+ }
-+ spin_unlock_bh(&host->lock);
-+
-+ return present;
-+}
-+
-+/*
-+ * Disable lower power mode.
-+ *
-+ * Low power mode will stop the card clock when idle. According to the
-+ * description of the CLKENA register we should disable low power mode
-+ * for SDIO cards if we need SDIO interrupts to work.
-+ *
-+ * This function is fast if low power mode is already disabled.
-+ */
-+static void dw_mci_disable_low_power(struct dw_mci_slot *slot)
-+{
-+ struct dw_mci *host = slot->host;
-+ u32 clk_en_a;
-+ const u32 clken_low_pwr = SDMMC_CLKEN_LOW_PWR << slot->id;
-+
-+ clk_en_a = mci_readl(host, CLKENA);
-+
-+ if (clk_en_a & clken_low_pwr) {
-+ mci_writel(host, CLKENA, clk_en_a & ~clken_low_pwr);
-+ mci_send_cmd(slot, SDMMC_CMD_UPD_CLK |
-+ SDMMC_CMD_PRV_DAT_WAIT, 0);
-+ }
-+}
-+
-+static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb)
-+{
-+ struct dw_mci_slot *slot = mmc_priv(mmc);
-+ struct dw_mci *host = slot->host;
-+ u32 int_mask;
-+
-+ /* Enable/disable Slot Specific SDIO interrupt */
-+ int_mask = mci_readl(host, INTMASK);
-+ if (enb) {
-+ /*
-+ * Turn off low power mode if it was enabled. This is a bit of
-+ * a heavy operation and we disable / enable IRQs a lot, so
-+ * we'll leave low power mode disabled and it will get
-+ * re-enabled again in dw_mci_setup_bus().
-+ */
-+ dw_mci_disable_low_power(slot);
-+
-+ mci_writel(host, INTMASK,
-+ (int_mask | SDMMC_INT_SDIO(slot->id)));
-+ } else {
-+ mci_writel(host, INTMASK,
-+ (int_mask & ~SDMMC_INT_SDIO(slot->id)));
-+ }
-+}
-+
-+static int dw_mci_execute_tuning(struct mmc_host *mmc, u32 opcode)
-+{
-+ struct dw_mci_slot *slot = mmc_priv(mmc);
-+ struct dw_mci *host = slot->host;
-+ const struct dw_mci_drv_data *drv_data = host->drv_data;
-+ struct dw_mci_tuning_data tuning_data;
-+ int err = -ENOSYS;
-+
-+ if (opcode == MMC_SEND_TUNING_BLOCK_HS200) {
-+ if (mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
-+ tuning_data.blk_pattern = tuning_blk_pattern_8bit;
-+ tuning_data.blksz = sizeof(tuning_blk_pattern_8bit);
-+ } else if (mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
-+ tuning_data.blk_pattern = tuning_blk_pattern_4bit;
-+ tuning_data.blksz = sizeof(tuning_blk_pattern_4bit);
-+ } else {
-+ return -EINVAL;
-+ }
-+ } else if (opcode == MMC_SEND_TUNING_BLOCK) {
-+ tuning_data.blk_pattern = tuning_blk_pattern_4bit;
-+ tuning_data.blksz = sizeof(tuning_blk_pattern_4bit);
-+ } else {
-+ dev_err(host->dev,
-+ "Undefined command(%d) for tuning\n", opcode);
-+ return -EINVAL;
-+ }
-+
-+ if (drv_data && drv_data->execute_tuning)
-+ err = drv_data->execute_tuning(slot, opcode, &tuning_data);
-+ return err;
-+}
-+
-+static const struct mmc_host_ops dw_mci_ops = {
-+ .request = dw_mci_request,
-+ .pre_req = dw_mci_pre_req,
-+ .post_req = dw_mci_post_req,
-+ .set_ios = dw_mci_set_ios,
-+ .get_ro = dw_mci_get_ro,
-+ .get_cd = dw_mci_get_cd,
-+ .enable_sdio_irq = dw_mci_enable_sdio_irq,
-+ .execute_tuning = dw_mci_execute_tuning,
-+ .card_busy = dw_mci_card_busy,
-+ .start_signal_voltage_switch = dw_mci_switch_voltage,
-+
-+};
-+
-+static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq)
-+ __releases(&host->lock)
-+ __acquires(&host->lock)
-+{
-+ struct dw_mci_slot *slot;
-+ struct mmc_host *prev_mmc = host->cur_slot->mmc;
-+
-+ WARN_ON(host->cmd || host->data);
-+
-+ host->cur_slot->mrq = NULL;
-+ host->mrq = NULL;
-+ if (!list_empty(&host->queue)) {
-+ slot = list_entry(host->queue.next,
-+ struct dw_mci_slot, queue_node);
-+ list_del(&slot->queue_node);
-+ dev_vdbg(host->dev, "list not empty: %s is next\n",
-+ mmc_hostname(slot->mmc));
-+ host->state = STATE_SENDING_CMD;
-+ dw_mci_start_request(host, slot);
-+ } else {
-+ dev_vdbg(host->dev, "list empty\n");
-+
-+ if (host->state == STATE_SENDING_CMD11)
-+ host->state = STATE_WAITING_CMD11_DONE;
-+ else
-+ host->state = STATE_IDLE;
-+ }
-+
-+ spin_unlock(&host->lock);
-+ mmc_request_done(prev_mmc, mrq);
-+ spin_lock(&host->lock);
-+}
-+
-+static int dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd)
-+{
-+ u32 status = host->cmd_status;
-+
-+ host->cmd_status = 0;
-+
-+ /* Read the response from the card (up to 16 bytes) */
-+ if (cmd->flags & MMC_RSP_PRESENT) {
-+ if (cmd->flags & MMC_RSP_136) {
-+ cmd->resp[3] = mci_readl(host, RESP0);
-+ cmd->resp[2] = mci_readl(host, RESP1);
-+ cmd->resp[1] = mci_readl(host, RESP2);
-+ cmd->resp[0] = mci_readl(host, RESP3);
-+ } else {
-+ cmd->resp[0] = mci_readl(host, RESP0);
-+ cmd->resp[1] = 0;
-+ cmd->resp[2] = 0;
-+ cmd->resp[3] = 0;
-+ }
-+ }
-+
-+ if (status & SDMMC_INT_RTO)
-+ cmd->error = -ETIMEDOUT;
-+ else if ((cmd->flags & MMC_RSP_CRC) && (status & SDMMC_INT_RCRC))
-+ cmd->error = -EILSEQ;
-+ else if (status & SDMMC_INT_RESP_ERR)
-+ cmd->error = -EIO;
-+ else
-+ cmd->error = 0;
-+
-+ if (cmd->error) {
-+ /* newer ip versions need a delay between retries */
-+ if (host->quirks & DW_MCI_QUIRK_RETRY_DELAY)
-+ mdelay(20);
-+ }
-+
-+ return cmd->error;
-+}
-+
-+static int dw_mci_data_complete(struct dw_mci *host, struct mmc_data *data)
-+{
-+ u32 status = host->data_status;
-+
-+ if (status & DW_MCI_DATA_ERROR_FLAGS) {
-+ if (status & SDMMC_INT_DRTO) {
-+ data->error = -ETIMEDOUT;
-+ } else if (status & SDMMC_INT_DCRC) {
-+ data->error = -EILSEQ;
-+ } else if (status & SDMMC_INT_EBE) {
-+ if (host->dir_status ==
-+ DW_MCI_SEND_STATUS) {
-+ /*
-+ * No data CRC status was returned.
-+ * The number of bytes transferred
-+ * will be exaggerated in PIO mode.
-+ */
-+ data->bytes_xfered = 0;
-+ data->error = -ETIMEDOUT;
-+ } else if (host->dir_status ==
-+ DW_MCI_RECV_STATUS) {
-+ data->error = -EIO;
-+ }
-+ } else {
-+ /* SDMMC_INT_SBE is included */
-+ data->error = -EIO;
-+ }
-+
-+ dev_dbg(host->dev, "data error, status 0x%08x\n", status);
-+
-+ /*
-+ * After an error, there may be data lingering
-+ * in the FIFO
-+ */
-+ dw_mci_reset(host);
-+ } else {
-+ data->bytes_xfered = data->blocks * data->blksz;
-+ data->error = 0;
-+ }
-+
-+ return data->error;
-+}
-+
-+static void dw_mci_tasklet_func(unsigned long priv)
-+{
-+ struct dw_mci *host = (struct dw_mci *)priv;
-+ struct mmc_data *data;
-+ struct mmc_command *cmd;
-+ struct mmc_request *mrq;
-+ enum dw_mci_state state;
-+ enum dw_mci_state prev_state;
-+ unsigned int err;
-+
-+ spin_lock(&host->lock);
-+
-+ state = host->state;
-+ data = host->data;
-+ mrq = host->mrq;
-+
-+ do {
-+ prev_state = state;
-+
-+ switch (state) {
-+ case STATE_IDLE:
-+ case STATE_WAITING_CMD11_DONE:
-+ break;
-+
-+ case STATE_SENDING_CMD11:
-+ case STATE_SENDING_CMD:
-+ if (!test_and_clear_bit(EVENT_CMD_COMPLETE,
-+ &host->pending_events))
-+ break;
-+
-+ cmd = host->cmd;
-+ host->cmd = NULL;
-+ set_bit(EVENT_CMD_COMPLETE, &host->completed_events);
-+ err = dw_mci_command_complete(host, cmd);
-+ if (cmd == mrq->sbc && !err) {
-+ prev_state = state = STATE_SENDING_CMD;
-+ __dw_mci_start_request(host, host->cur_slot,
-+ mrq->cmd);
-+ goto unlock;
-+ }
-+
-+ if (cmd->data && err) {
-+ dw_mci_stop_dma(host);
-+ send_stop_abort(host, data);
-+ state = STATE_SENDING_STOP;
-+ break;
-+ }
-+
-+ if (!cmd->data || err) {
-+ dw_mci_request_end(host, mrq);
-+ goto unlock;
-+ }
-+
-+ prev_state = state = STATE_SENDING_DATA;
-+ /* fall through */
-+
-+ case STATE_SENDING_DATA:
-+ /*
-+ * We could get a data error and never a transfer
-+ * complete so we'd better check for it here.
-+ *
-+ * Note that we don't really care if we also got a
-+ * transfer complete; stopping the DMA and sending an
-+ * abort won't hurt.
-+ */
-+ if (test_and_clear_bit(EVENT_DATA_ERROR,
-+ &host->pending_events)) {
-+ dw_mci_stop_dma(host);
-+ send_stop_abort(host, data);
-+ state = STATE_DATA_ERROR;
-+ break;
-+ }
-+
-+ if (!test_and_clear_bit(EVENT_XFER_COMPLETE,
-+ &host->pending_events))
-+ break;
-+
-+ set_bit(EVENT_XFER_COMPLETE, &host->completed_events);
-+
-+ /*
-+ * Handle an EVENT_DATA_ERROR that might have shown up
-+ * before the transfer completed. This might not have
-+ * been caught by the check above because the interrupt
-+ * could have gone off between the previous check and
-+ * the check for transfer complete.
-+ *
-+ * Technically this ought not be needed assuming we
-+ * get a DATA_COMPLETE eventually (we'll notice the
-+ * error and end the request), but it shouldn't hurt.
-+ *
-+ * This has the advantage of sending the stop command.
-+ */
-+ if (test_and_clear_bit(EVENT_DATA_ERROR,
-+ &host->pending_events)) {
-+ dw_mci_stop_dma(host);
-+ send_stop_abort(host, data);
-+ state = STATE_DATA_ERROR;
-+ break;
-+ }
-+ prev_state = state = STATE_DATA_BUSY;
-+
-+ /* fall through */
-+
-+ case STATE_DATA_BUSY:
-+ if (!test_and_clear_bit(EVENT_DATA_COMPLETE,
-+ &host->pending_events))
-+ break;
-+
-+ host->data = NULL;
-+ set_bit(EVENT_DATA_COMPLETE, &host->completed_events);
-+ err = dw_mci_data_complete(host, data);
-+
-+ if (!err) {
-+ if (!data->stop || mrq->sbc) {
-+ if (mrq->sbc && data->stop)
-+ data->stop->error = 0;
-+ dw_mci_request_end(host, mrq);
-+ goto unlock;
-+ }
-+
-+ /* stop command for open-ended transfer*/
-+ if (data->stop)
-+ send_stop_abort(host, data);
-+ } else {
-+ /*
-+ * If we don't have a command complete now we'll
-+ * never get one since we just reset everything;
-+ * better end the request.
-+ *
-+ * If we do have a command complete we'll fall
-+ * through to the SENDING_STOP command and
-+ * everything will be peachy keen.
-+ */
-+ if (!test_bit(EVENT_CMD_COMPLETE,
-+ &host->pending_events)) {
-+ host->cmd = NULL;
-+ dw_mci_request_end(host, mrq);
-+ goto unlock;
-+ }
-+ }
-+
-+ /*
-+ * If err has non-zero,
-+ * stop-abort command has been already issued.
-+ */
-+ prev_state = state = STATE_SENDING_STOP;
-+
-+ /* fall through */
-+
-+ case STATE_SENDING_STOP:
-+ if (!test_and_clear_bit(EVENT_CMD_COMPLETE,
-+ &host->pending_events))
-+ break;
-+
-+ /* CMD error in data command */
-+ if (mrq->cmd->error && mrq->data)
-+ dw_mci_reset(host);
-+
-+ host->cmd = NULL;
-+ host->data = NULL;
-+
-+ if (mrq->stop)
-+ dw_mci_command_complete(host, mrq->stop);
-+ else
-+ host->cmd_status = 0;
-+
-+ dw_mci_request_end(host, mrq);
-+ goto unlock;
-+
-+ case STATE_DATA_ERROR:
-+ if (!test_and_clear_bit(EVENT_XFER_COMPLETE,
-+ &host->pending_events))
-+ break;
-+
-+ state = STATE_DATA_BUSY;
-+ break;
-+ }
-+ } while (state != prev_state);
-+
-+ host->state = state;
-+unlock:
-+ spin_unlock(&host->lock);
-+
-+}
-+
-+/* push final bytes to part_buf, only use during push */
-+static void dw_mci_set_part_bytes(struct dw_mci *host, void *buf, int cnt)
-+{
-+ memcpy((void *)&host->part_buf, buf, cnt);
-+ host->part_buf_count = cnt;
-+}
-+
-+/* append bytes to part_buf, only use during push */
-+static int dw_mci_push_part_bytes(struct dw_mci *host, void *buf, int cnt)
-+{
-+ cnt = min(cnt, (1 << host->data_shift) - host->part_buf_count);
-+ memcpy((void *)&host->part_buf + host->part_buf_count, buf, cnt);
-+ host->part_buf_count += cnt;
-+ return cnt;
-+}
-+
-+/* pull first bytes from part_buf, only use during pull */
-+static int dw_mci_pull_part_bytes(struct dw_mci *host, void *buf, int cnt)
-+{
-+ cnt = min(cnt, (int)host->part_buf_count);
-+ if (cnt) {
-+ memcpy(buf, (void *)&host->part_buf + host->part_buf_start,
-+ cnt);
-+ host->part_buf_count -= cnt;
-+ host->part_buf_start += cnt;
-+ }
-+ return cnt;
-+}
-+
-+/* pull final bytes from the part_buf, assuming it's just been filled */
-+static void dw_mci_pull_final_bytes(struct dw_mci *host, void *buf, int cnt)
-+{
-+ memcpy(buf, &host->part_buf, cnt);
-+ host->part_buf_start = cnt;
-+ host->part_buf_count = (1 << host->data_shift) - cnt;
-+}
-+
-+static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt)
-+{
-+ struct mmc_data *data = host->data;
-+ int init_cnt = cnt;
-+
-+ /* try and push anything in the part_buf */
-+ if (unlikely(host->part_buf_count)) {
-+ int len = dw_mci_push_part_bytes(host, buf, cnt);
-+ buf += len;
-+ cnt -= len;
-+ if (host->part_buf_count == 2) {
-+ mci_writew(host, DATA(host->data_offset),
-+ host->part_buf16);
-+ host->part_buf_count = 0;
-+ }
-+ }
-+#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
-+ if (unlikely((unsigned long)buf & 0x1)) {
-+ while (cnt >= 2) {
-+ u16 aligned_buf[64];
-+ int len = min(cnt & -2, (int)sizeof(aligned_buf));
-+ int items = len >> 1;
-+ int i;
-+ /* memcpy from input buffer into aligned buffer */
-+ memcpy(aligned_buf, buf, len);
-+ buf += len;
-+ cnt -= len;
-+ /* push data from aligned buffer into fifo */
-+ for (i = 0; i < items; ++i)
-+ mci_writew(host, DATA(host->data_offset),
-+ aligned_buf[i]);
-+ }
-+ } else
-+#endif
-+ {
-+ u16 *pdata = buf;
-+ for (; cnt >= 2; cnt -= 2)
-+ mci_writew(host, DATA(host->data_offset), *pdata++);
-+ buf = pdata;
-+ }
-+ /* put anything remaining in the part_buf */
-+ if (cnt) {
-+ dw_mci_set_part_bytes(host, buf, cnt);
-+ /* Push data if we have reached the expected data length */
-+ if ((data->bytes_xfered + init_cnt) ==
-+ (data->blksz * data->blocks))
-+ mci_writew(host, DATA(host->data_offset),
-+ host->part_buf16);
-+ }
-+}
-+
-+static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt)
-+{
-+#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
-+ if (unlikely((unsigned long)buf & 0x1)) {
-+ while (cnt >= 2) {
-+ /* pull data from fifo into aligned buffer */
-+ u16 aligned_buf[64];
-+ int len = min(cnt & -2, (int)sizeof(aligned_buf));
-+ int items = len >> 1;
-+ int i;
-+ for (i = 0; i < items; ++i)
-+ aligned_buf[i] = mci_readw(host,
-+ DATA(host->data_offset));
-+ /* memcpy from aligned buffer into output buffer */
-+ memcpy(buf, aligned_buf, len);
-+ buf += len;
-+ cnt -= len;
-+ }
-+ } else
-+#endif
-+ {
-+ u16 *pdata = buf;
-+ for (; cnt >= 2; cnt -= 2)
-+ *pdata++ = mci_readw(host, DATA(host->data_offset));
-+ buf = pdata;
-+ }
-+ if (cnt) {
-+ host->part_buf16 = mci_readw(host, DATA(host->data_offset));
-+ dw_mci_pull_final_bytes(host, buf, cnt);
-+ }
-+}
-+
-+static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt)
-+{
-+ struct mmc_data *data = host->data;
-+ int init_cnt = cnt;
-+
-+ /* try and push anything in the part_buf */
-+ if (unlikely(host->part_buf_count)) {
-+ int len = dw_mci_push_part_bytes(host, buf, cnt);
-+ buf += len;
-+ cnt -= len;
-+ if (host->part_buf_count == 4) {
-+ mci_writel(host, DATA(host->data_offset),
-+ host->part_buf32);
-+ host->part_buf_count = 0;
-+ }
-+ }
-+#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
-+ if (unlikely((unsigned long)buf & 0x3)) {
-+ while (cnt >= 4) {
-+ u32 aligned_buf[32];
-+ int len = min(cnt & -4, (int)sizeof(aligned_buf));
-+ int items = len >> 2;
-+ int i;
-+ /* memcpy from input buffer into aligned buffer */
-+ memcpy(aligned_buf, buf, len);
-+ buf += len;
-+ cnt -= len;
-+ /* push data from aligned buffer into fifo */
-+ for (i = 0; i < items; ++i)
-+ mci_writel(host, DATA(host->data_offset),
-+ aligned_buf[i]);
-+ }
-+ } else
-+#endif
-+ {
-+ u32 *pdata = buf;
-+ for (; cnt >= 4; cnt -= 4)
-+ mci_writel(host, DATA(host->data_offset), *pdata++);
-+ buf = pdata;
-+ }
-+ /* put anything remaining in the part_buf */
-+ if (cnt) {
-+ dw_mci_set_part_bytes(host, buf, cnt);
-+ /* Push data if we have reached the expected data length */
-+ if ((data->bytes_xfered + init_cnt) ==
-+ (data->blksz * data->blocks))
-+ mci_writel(host, DATA(host->data_offset),
-+ host->part_buf32);
-+ }
-+}
-+
-+static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt)
-+{
-+#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
-+ if (unlikely((unsigned long)buf & 0x3)) {
-+ while (cnt >= 4) {
-+ /* pull data from fifo into aligned buffer */
-+ u32 aligned_buf[32];
-+ int len = min(cnt & -4, (int)sizeof(aligned_buf));
-+ int items = len >> 2;
-+ int i;
-+ for (i = 0; i < items; ++i)
-+ aligned_buf[i] = mci_readl(host,
-+ DATA(host->data_offset));
-+ /* memcpy from aligned buffer into output buffer */
-+ memcpy(buf, aligned_buf, len);
-+ buf += len;
-+ cnt -= len;
-+ }
-+ } else
-+#endif
-+ {
-+ u32 *pdata = buf;
-+ for (; cnt >= 4; cnt -= 4)
-+ *pdata++ = mci_readl(host, DATA(host->data_offset));
-+ buf = pdata;
-+ }
-+ if (cnt) {
-+ host->part_buf32 = mci_readl(host, DATA(host->data_offset));
-+ dw_mci_pull_final_bytes(host, buf, cnt);
-+ }
-+}
-+
-+static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt)
-+{
-+ struct mmc_data *data = host->data;
-+ int init_cnt = cnt;
-+
-+ /* try and push anything in the part_buf */
-+ if (unlikely(host->part_buf_count)) {
-+ int len = dw_mci_push_part_bytes(host, buf, cnt);
-+ buf += len;
-+ cnt -= len;
-+
-+ if (host->part_buf_count == 8) {
-+ mci_writeq(host, DATA(host->data_offset),
-+ host->part_buf);
-+ host->part_buf_count = 0;
-+ }
-+ }
-+#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
-+ if (unlikely((unsigned long)buf & 0x7)) {
-+ while (cnt >= 8) {
-+ u64 aligned_buf[16];
-+ int len = min(cnt & -8, (int)sizeof(aligned_buf));
-+ int items = len >> 3;
-+ int i;
-+ /* memcpy from input buffer into aligned buffer */
-+ memcpy(aligned_buf, buf, len);
-+ buf += len;
-+ cnt -= len;
-+ /* push data from aligned buffer into fifo */
-+ for (i = 0; i < items; ++i)
-+ mci_writeq(host, DATA(host->data_offset),
-+ aligned_buf[i]);
-+ }
-+ } else
-+#endif
-+ {
-+ u64 *pdata = buf;
-+ for (; cnt >= 8; cnt -= 8)
-+ mci_writeq(host, DATA(host->data_offset), *pdata++);
-+ buf = pdata;
-+ }
-+ /* put anything remaining in the part_buf */
-+ if (cnt) {
-+ dw_mci_set_part_bytes(host, buf, cnt);
-+ /* Push data if we have reached the expected data length */
-+ if ((data->bytes_xfered + init_cnt) ==
-+ (data->blksz * data->blocks))
-+ mci_writeq(host, DATA(host->data_offset),
-+ host->part_buf);
-+ }
-+}
-+
-+static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt)
-+{
-+#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
-+ if (unlikely((unsigned long)buf & 0x7)) {
-+ while (cnt >= 8) {
-+ /* pull data from fifo into aligned buffer */
-+ u64 aligned_buf[16];
-+ int len = min(cnt & -8, (int)sizeof(aligned_buf));
-+ int items = len >> 3;
-+ int i;
-+ for (i = 0; i < items; ++i)
-+ aligned_buf[i] = mci_readq(host,
-+ DATA(host->data_offset));
-+ /* memcpy from aligned buffer into output buffer */
-+ memcpy(buf, aligned_buf, len);
-+ buf += len;
-+ cnt -= len;
-+ }
-+ } else
-+#endif
-+ {
-+ u64 *pdata = buf;
-+ for (; cnt >= 8; cnt -= 8)
-+ *pdata++ = mci_readq(host, DATA(host->data_offset));
-+ buf = pdata;
-+ }
-+ if (cnt) {
-+ host->part_buf = mci_readq(host, DATA(host->data_offset));
-+ dw_mci_pull_final_bytes(host, buf, cnt);
-+ }
-+}
-+
-+static void dw_mci_pull_data(struct dw_mci *host, void *buf, int cnt)
-+{
-+ int len;
-+
-+ /* get remaining partial bytes */
-+ len = dw_mci_pull_part_bytes(host, buf, cnt);
-+ if (unlikely(len == cnt))
-+ return;
-+ buf += len;
-+ cnt -= len;
-+
-+ /* get the rest of the data */
-+ host->pull_data(host, buf, cnt);
-+}
-+
-+static void dw_mci_read_data_pio(struct dw_mci *host, bool dto)
-+{
-+ struct sg_mapping_iter *sg_miter = &host->sg_miter;
-+ void *buf;
-+ unsigned int offset;
-+ struct mmc_data *data = host->data;
-+ int shift = host->data_shift;
-+ u32 status;
-+ unsigned int len;
-+ unsigned int remain, fcnt;
-+
-+ do {
-+ if (!sg_miter_next(sg_miter))
-+ goto done;
-+
-+ host->sg = sg_miter->piter.sg;
-+ buf = sg_miter->addr;
-+ remain = sg_miter->length;
-+ offset = 0;
-+
-+ do {
-+ fcnt = (SDMMC_GET_FCNT(mci_readl(host, STATUS))
-+ << shift) + host->part_buf_count;
-+ len = min(remain, fcnt);
-+ if (!len)
-+ break;
-+ dw_mci_pull_data(host, (void *)(buf + offset), len);
-+ data->bytes_xfered += len;
-+ offset += len;
-+ remain -= len;
-+ } while (remain);
-+
-+ sg_miter->consumed = offset;
-+ status = mci_readl(host, MINTSTS);
-+ mci_writel(host, RINTSTS, SDMMC_INT_RXDR);
-+ /* if the RXDR is ready read again */
-+ } while ((status & SDMMC_INT_RXDR) ||
-+ (dto && SDMMC_GET_FCNT(mci_readl(host, STATUS))));
-+
-+ if (!remain) {
-+ if (!sg_miter_next(sg_miter))
-+ goto done;
-+ sg_miter->consumed = 0;
-+ }
-+ sg_miter_stop(sg_miter);
-+ return;
-+
-+done:
-+ sg_miter_stop(sg_miter);
-+ host->sg = NULL;
-+ smp_wmb();
-+ set_bit(EVENT_XFER_COMPLETE, &host->pending_events);
-+}
-+
-+static void dw_mci_write_data_pio(struct dw_mci *host)
-+{
-+ struct sg_mapping_iter *sg_miter = &host->sg_miter;
-+ void *buf;
-+ unsigned int offset;
-+ struct mmc_data *data = host->data;
-+ int shift = host->data_shift;
-+ u32 status;
-+ unsigned int len;
-+ unsigned int fifo_depth = host->fifo_depth;
-+ unsigned int remain, fcnt;
-+
-+ do {
-+ if (!sg_miter_next(sg_miter))
-+ goto done;
-+
-+ host->sg = sg_miter->piter.sg;
-+ buf = sg_miter->addr;
-+ remain = sg_miter->length;
-+ offset = 0;
-+
-+ do {
-+ fcnt = ((fifo_depth -
-+ SDMMC_GET_FCNT(mci_readl(host, STATUS)))
-+ << shift) - host->part_buf_count;
-+ len = min(remain, fcnt);
-+ if (!len)
-+ break;
-+ host->push_data(host, (void *)(buf + offset), len);
-+ data->bytes_xfered += len;
-+ offset += len;
-+ remain -= len;
-+ } while (remain);
-+
-+ sg_miter->consumed = offset;
-+ status = mci_readl(host, MINTSTS);
-+ mci_writel(host, RINTSTS, SDMMC_INT_TXDR);
-+ } while (status & SDMMC_INT_TXDR); /* if TXDR write again */
-+
-+ if (!remain) {
-+ if (!sg_miter_next(sg_miter))
-+ goto done;
-+ sg_miter->consumed = 0;
-+ }
-+ sg_miter_stop(sg_miter);
-+ return;
-+
-+done:
-+ sg_miter_stop(sg_miter);
-+ host->sg = NULL;
-+ smp_wmb();
-+ set_bit(EVENT_XFER_COMPLETE, &host->pending_events);
-+}
-+
-+static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status)
-+{
-+ if (!host->cmd_status)
-+ host->cmd_status = status;
-+
-+ smp_wmb();
-+
-+ set_bit(EVENT_CMD_COMPLETE, &host->pending_events);
-+ tasklet_schedule(&host->tasklet);
-+}
-+
-+static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
-+{
-+ struct dw_mci *host = dev_id;
-+ u32 pending;
-+ int i;
-+
-+ pending = mci_readl(host, MINTSTS); /* read-only mask reg */
-+
-+ /*
-+ * DTO fix - version 2.10a and below, and only if internal DMA
-+ * is configured.
-+ */
-+ if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) {
-+ if (!pending &&
-+ ((mci_readl(host, STATUS) >> 17) & 0x1fff))
-+ pending |= SDMMC_INT_DATA_OVER;
-+ }
-+
-+ if (pending) {
-+ /* Check volt switch first, since it can look like an error */
-+ if ((host->state == STATE_SENDING_CMD11) &&
-+ (pending & SDMMC_INT_VOLT_SWITCH)) {
-+ mci_writel(host, RINTSTS, SDMMC_INT_VOLT_SWITCH);
-+ pending &= ~SDMMC_INT_VOLT_SWITCH;
-+ dw_mci_cmd_interrupt(host, pending);
-+ }
-+
-+ if (pending & DW_MCI_CMD_ERROR_FLAGS) {
-+ mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS);
-+ host->cmd_status = pending;
-+ smp_wmb();
-+ set_bit(EVENT_CMD_COMPLETE, &host->pending_events);
-+ }
-+
-+ if (pending & DW_MCI_DATA_ERROR_FLAGS) {
-+ /* if there is an error report DATA_ERROR */
-+ mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS);
-+ host->data_status = pending;
-+ smp_wmb();
-+ set_bit(EVENT_DATA_ERROR, &host->pending_events);
-+ tasklet_schedule(&host->tasklet);
-+ }
-+
-+ if (pending & SDMMC_INT_DATA_OVER) {
-+ mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER);
-+ if (!host->data_status)
-+ host->data_status = pending;
-+ smp_wmb();
-+ if (host->dir_status == DW_MCI_RECV_STATUS) {
-+ if (host->sg != NULL)
-+ dw_mci_read_data_pio(host, true);
-+ }
-+ set_bit(EVENT_DATA_COMPLETE, &host->pending_events);
-+ tasklet_schedule(&host->tasklet);
-+ }
-+
-+ if (pending & SDMMC_INT_RXDR) {
-+ mci_writel(host, RINTSTS, SDMMC_INT_RXDR);
-+ if (host->dir_status == DW_MCI_RECV_STATUS && host->sg)
-+ dw_mci_read_data_pio(host, false);
-+ }
-+
-+ if (pending & SDMMC_INT_TXDR) {
-+ mci_writel(host, RINTSTS, SDMMC_INT_TXDR);
-+ if (host->dir_status == DW_MCI_SEND_STATUS && host->sg)
-+ dw_mci_write_data_pio(host);
-+ }
-+
-+ if (pending & SDMMC_INT_CMD_DONE) {
-+ mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE);
-+ dw_mci_cmd_interrupt(host, pending);
-+ }
-+
-+ if (pending & SDMMC_INT_CD) {
-+ mci_writel(host, RINTSTS, SDMMC_INT_CD);
-+ queue_work(host->card_workqueue, &host->card_work);
-+ }
-+
-+ /* Handle SDIO Interrupts */
-+ for (i = 0; i < host->num_slots; i++) {
-+ struct dw_mci_slot *slot = host->slot[i];
-+ if (pending & SDMMC_INT_SDIO(i)) {
-+ mci_writel(host, RINTSTS, SDMMC_INT_SDIO(i));
-+ mmc_signal_sdio_irq(slot->mmc);
-+ }
-+ }
-+
-+ }
-+
-+#ifdef CONFIG_MMC_DW_IDMAC
-+ /* Handle DMA interrupts */
-+ pending = mci_readl(host, IDSTS);
-+ if (pending & (SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI)) {
-+ mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI);
-+ mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI);
-+ host->dma_ops->complete(host);
-+ }
-+#endif
-+
-+ return IRQ_HANDLED;
-+}
-+
-+static void dw_mci_work_routine_card(struct work_struct *work)
-+{
-+ struct dw_mci *host = container_of(work, struct dw_mci, card_work);
-+ int i;
-+
-+ for (i = 0; i < host->num_slots; i++) {
-+ struct dw_mci_slot *slot = host->slot[i];
-+ struct mmc_host *mmc = slot->mmc;
-+ struct mmc_request *mrq;
-+ int present;
-+
-+ present = dw_mci_get_cd(mmc);
-+ while (present != slot->last_detect_state) {
-+ dev_dbg(&slot->mmc->class_dev, "card %s\n",
-+ present ? "inserted" : "removed");
-+
-+ spin_lock_bh(&host->lock);
-+
-+ /* Card change detected */
-+ slot->last_detect_state = present;
-+
-+ /* Clean up queue if present */
-+ mrq = slot->mrq;
-+ if (mrq) {
-+ if (mrq == host->mrq) {
-+ host->data = NULL;
-+ host->cmd = NULL;
-+
-+ switch (host->state) {
-+ case STATE_IDLE:
-+ case STATE_WAITING_CMD11_DONE:
-+ break;
-+ case STATE_SENDING_CMD11:
-+ case STATE_SENDING_CMD:
-+ mrq->cmd->error = -ENOMEDIUM;
-+ if (!mrq->data)
-+ break;
-+ /* fall through */
-+ case STATE_SENDING_DATA:
-+ mrq->data->error = -ENOMEDIUM;
-+ dw_mci_stop_dma(host);
-+ break;
-+ case STATE_DATA_BUSY:
-+ case STATE_DATA_ERROR:
-+ if (mrq->data->error == -EINPROGRESS)
-+ mrq->data->error = -ENOMEDIUM;
-+ /* fall through */
-+ case STATE_SENDING_STOP:
-+ if (mrq->stop)
-+ mrq->stop->error = -ENOMEDIUM;
-+ break;
-+ }
-+
-+ dw_mci_request_end(host, mrq);
-+ } else {
-+ list_del(&slot->queue_node);
-+ mrq->cmd->error = -ENOMEDIUM;
-+ if (mrq->data)
-+ mrq->data->error = -ENOMEDIUM;
-+ if (mrq->stop)
-+ mrq->stop->error = -ENOMEDIUM;
-+
-+ spin_unlock(&host->lock);
-+ mmc_request_done(slot->mmc, mrq);
-+ spin_lock(&host->lock);
-+ }
-+ }
-+
-+ /* Power down slot */
-+ if (present == 0)
-+ dw_mci_reset(host);
-+
-+ spin_unlock_bh(&host->lock);
-+
-+ present = dw_mci_get_cd(mmc);
-+ }
-+
-+ mmc_detect_change(slot->mmc,
-+ msecs_to_jiffies(host->pdata->detect_delay_ms));
-+ }
-+}
-+
-+#ifdef CONFIG_OF
-+/* given a slot id, find out the device node representing that slot */
-+static struct device_node *dw_mci_of_find_slot_node(struct device *dev, u8 slot)
-+{
-+ struct device_node *np;
-+ const __be32 *addr;
-+ int len;
-+
-+ if (!dev || !dev->of_node)
-+ return NULL;
-+
-+ for_each_child_of_node(dev->of_node, np) {
-+ addr = of_get_property(np, "reg", &len);
-+ if (!addr || (len < sizeof(int)))
-+ continue;
-+ if (be32_to_cpup(addr) == slot)
-+ return np;
-+ }
-+ return NULL;
-+}
-+
-+static struct dw_mci_of_slot_quirks {
-+ char *quirk;
-+ int id;
-+} of_slot_quirks[] = {
-+ {
-+ .quirk = "disable-wp",
-+ .id = DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT,
-+ },
-+};
-+
-+static int dw_mci_of_get_slot_quirks(struct device *dev, u8 slot)
-+{
-+ struct device_node *np = dw_mci_of_find_slot_node(dev, slot);
-+ int quirks = 0;
-+ int idx;
-+
-+ /* get quirks */
-+ for (idx = 0; idx < ARRAY_SIZE(of_slot_quirks); idx++)
-+ if (of_get_property(np, of_slot_quirks[idx].quirk, NULL)) {
-+ dev_warn(dev, "Slot quirk %s is deprecated\n",
-+ of_slot_quirks[idx].quirk);
-+ quirks |= of_slot_quirks[idx].id;
-+ }
-+
-+ return quirks;
-+}
-+#else /* CONFIG_OF */
-+static int dw_mci_of_get_slot_quirks(struct device *dev, u8 slot)
-+{
-+ return 0;
-+}
-+#endif /* CONFIG_OF */
-+
-+static int dw_mci_init_slot(struct dw_mci *host, unsigned int id)
-+{
-+ struct mmc_host *mmc;
-+ struct dw_mci_slot *slot;
-+ const struct dw_mci_drv_data *drv_data = host->drv_data;
-+ int ctrl_id, ret;
-+ u32 freq[2];
-+
-+ mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev);
-+ if (!mmc)
-+ return -ENOMEM;
-+
-+ slot = mmc_priv(mmc);
-+ slot->id = id;
-+ slot->mmc = mmc;
-+ slot->host = host;
-+ host->slot[id] = slot;
-+
-+ slot->quirks = dw_mci_of_get_slot_quirks(host->dev, slot->id);
-+
-+ mmc->ops = &dw_mci_ops;
-+ if (of_property_read_u32_array(host->dev->of_node,
-+ "clock-freq-min-max", freq, 2)) {
-+ mmc->f_min = DW_MCI_FREQ_MIN;
-+ mmc->f_max = DW_MCI_FREQ_MAX;
-+ } else {
-+ mmc->f_min = freq[0];
-+ mmc->f_max = freq[1];
-+ }
-+
-+ /*if there are external regulators, get them*/
-+ ret = mmc_regulator_get_supply(mmc);
-+ if (ret == -EPROBE_DEFER)
-+ goto err_host_allocated;
-+
-+ if (!mmc->ocr_avail)
-+ mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
-+
-+ if (host->pdata->caps)
-+ mmc->caps = host->pdata->caps;
-+
-+ if (host->pdata->pm_caps)
-+ mmc->pm_caps = host->pdata->pm_caps;
-+
-+ if (host->dev->of_node) {
-+ ctrl_id = of_alias_get_id(host->dev->of_node, "mshc");
-+ if (ctrl_id < 0)
-+ ctrl_id = 0;
-+ } else {
-+ ctrl_id = to_platform_device(host->dev)->id;
-+ }
-+ if (drv_data && drv_data->caps)
-+ mmc->caps |= drv_data->caps[ctrl_id];
-+
-+ if (host->pdata->caps2)
-+ mmc->caps2 = host->pdata->caps2;
-+
-+ ret = mmc_of_parse(mmc);
-+ if (ret)
-+ goto err_host_allocated;
-+
-+ if (host->pdata->blk_settings) {
-+ mmc->max_segs = host->pdata->blk_settings->max_segs;
-+ mmc->max_blk_size = host->pdata->blk_settings->max_blk_size;
-+ mmc->max_blk_count = host->pdata->blk_settings->max_blk_count;
-+ mmc->max_req_size = host->pdata->blk_settings->max_req_size;
-+ mmc->max_seg_size = host->pdata->blk_settings->max_seg_size;
-+ } else {
-+ /* Useful defaults if platform data is unset. */
-+#ifdef CONFIG_MMC_DW_IDMAC
-+ mmc->max_segs = host->ring_size;
-+ mmc->max_blk_size = 65536;
-+ mmc->max_blk_count = host->ring_size;
-+ mmc->max_seg_size = 0x1000;
-+ mmc->max_req_size = mmc->max_seg_size * mmc->max_blk_count;
-+#else
-+ mmc->max_segs = 64;
-+ mmc->max_blk_size = 65536; /* BLKSIZ is 16 bits */
-+ mmc->max_blk_count = 512;
-+ mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
-+ mmc->max_seg_size = mmc->max_req_size;
-+#endif /* CONFIG_MMC_DW_IDMAC */
-+ }
-+
-+ if (dw_mci_get_cd(mmc))
-+ set_bit(DW_MMC_CARD_PRESENT, &slot->flags);
-+ else
-+ clear_bit(DW_MMC_CARD_PRESENT, &slot->flags);
-+
-+ ret = mmc_add_host(mmc);
-+ if (ret)
-+ goto err_host_allocated;
-+
-+#if defined(CONFIG_DEBUG_FS)
-+ dw_mci_init_debugfs(slot);
-+#endif
-+
-+ /* Card initially undetected */
-+ slot->last_detect_state = 0;
-+
-+ return 0;
-+
-+err_host_allocated:
-+ mmc_free_host(mmc);
-+ return ret;
-+}
-+
-+static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id)
-+{
-+ /* Debugfs stuff is cleaned up by mmc core */
-+ mmc_remove_host(slot->mmc);
-+ slot->host->slot[id] = NULL;
-+ mmc_free_host(slot->mmc);
-+}
-+
-+static void dw_mci_init_dma(struct dw_mci *host)
-+{
-+ /* Alloc memory for sg translation */
-+ host->sg_cpu = dmam_alloc_coherent(host->dev, PAGE_SIZE,
-+ &host->sg_dma, GFP_KERNEL);
-+ if (!host->sg_cpu) {
-+ dev_err(host->dev, "%s: could not alloc DMA memory\n",
-+ __func__);
-+ goto no_dma;
-+ }
-+
-+ /* Determine which DMA interface to use */
-+#ifdef CONFIG_MMC_DW_IDMAC
-+ host->dma_ops = &dw_mci_idmac_ops;
-+ dev_info(host->dev, "Using internal DMA controller.\n");
-+#endif
-+
-+ if (!host->dma_ops)
-+ goto no_dma;
-+
-+ if (host->dma_ops->init && host->dma_ops->start &&
-+ host->dma_ops->stop && host->dma_ops->cleanup) {
-+ if (host->dma_ops->init(host)) {
-+ dev_err(host->dev, "%s: Unable to initialize "
-+ "DMA Controller.\n", __func__);
-+ goto no_dma;
-+ }
-+ } else {
-+ dev_err(host->dev, "DMA initialization not found.\n");
-+ goto no_dma;
-+ }
-+
-+ host->use_dma = 1;
-+ return;
-+
-+no_dma:
-+ dev_info(host->dev, "Using PIO mode.\n");
-+ host->use_dma = 0;
-+ return;
-+}
-+
-+static bool dw_mci_ctrl_reset(struct dw_mci *host, u32 reset)
-+{
-+ unsigned long timeout = jiffies + msecs_to_jiffies(500);
-+ u32 ctrl;
-+
-+ ctrl = mci_readl(host, CTRL);
-+ ctrl |= reset;
-+ mci_writel(host, CTRL, ctrl);
-+
-+ /* wait till resets clear */
-+ do {
-+ ctrl = mci_readl(host, CTRL);
-+ if (!(ctrl & reset))
-+ return true;
-+ } while (time_before(jiffies, timeout));
-+
-+ dev_err(host->dev,
-+ "Timeout resetting block (ctrl reset %#x)\n",
-+ ctrl & reset);
-+
-+ return false;
-+}
-+
-+static bool dw_mci_reset(struct dw_mci *host)
-+{
-+ u32 flags = SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET;
-+ bool ret = false;
-+
-+ /*
-+ * Reseting generates a block interrupt, hence setting
-+ * the scatter-gather pointer to NULL.
-+ */
-+ if (host->sg) {
-+ sg_miter_stop(&host->sg_miter);
-+ host->sg = NULL;
-+ }
-+
-+ if (host->use_dma)
-+ flags |= SDMMC_CTRL_DMA_RESET;
-+
-+ if (dw_mci_ctrl_reset(host, flags)) {
-+ /*
-+ * In all cases we clear the RAWINTS register to clear any
-+ * interrupts.
-+ */
-+ mci_writel(host, RINTSTS, 0xFFFFFFFF);
-+
-+ /* if using dma we wait for dma_req to clear */
-+ if (host->use_dma) {
-+ unsigned long timeout = jiffies + msecs_to_jiffies(500);
-+ u32 status;
-+ do {
-+ status = mci_readl(host, STATUS);
-+ if (!(status & SDMMC_STATUS_DMA_REQ))
-+ break;
-+ cpu_relax();
-+ } while (time_before(jiffies, timeout));
-+
-+ if (status & SDMMC_STATUS_DMA_REQ) {
-+ dev_err(host->dev,
-+ "%s: Timeout waiting for dma_req to "
-+ "clear during reset\n", __func__);
-+ goto ciu_out;
-+ }
-+
-+ /* when using DMA next we reset the fifo again */
-+ if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_FIFO_RESET))
-+ goto ciu_out;
-+ }
-+ } else {
-+ /* if the controller reset bit did clear, then set clock regs */
-+ if (!(mci_readl(host, CTRL) & SDMMC_CTRL_RESET)) {
-+ dev_err(host->dev, "%s: fifo/dma reset bits didn't "
-+ "clear but ciu was reset, doing clock update\n",
-+ __func__);
-+ goto ciu_out;
-+ }
-+ }
-+
-+#if IS_ENABLED(CONFIG_MMC_DW_IDMAC)
-+ /* It is also recommended that we reset and reprogram idmac */
-+ dw_mci_idmac_reset(host);
-+#endif
-+
-+ ret = true;
-+
-+ciu_out:
-+ /* After a CTRL reset we need to have CIU set clock registers */
-+ mci_send_cmd(host->cur_slot, SDMMC_CMD_UPD_CLK, 0);
-+
-+ return ret;
-+}
-+
-+#ifdef CONFIG_OF
-+static struct dw_mci_of_quirks {
-+ char *quirk;
-+ int id;
-+} of_quirks[] = {
-+ {
-+ .quirk = "broken-cd",
-+ .id = DW_MCI_QUIRK_BROKEN_CARD_DETECTION,
-+ }, {
-+ .quirk = "disable-wp",
-+ .id = DW_MCI_QUIRK_NO_WRITE_PROTECT,
-+ },
-+};
-+
-+static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host)
-+{
-+ struct dw_mci_board *pdata;
-+ struct device *dev = host->dev;
-+ struct device_node *np = dev->of_node;
-+ const struct dw_mci_drv_data *drv_data = host->drv_data;
-+ int idx, ret;
-+ u32 clock_frequency;
-+
-+ pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
-+ if (!pdata) {
-+ dev_err(dev, "could not allocate memory for pdata\n");
-+ return ERR_PTR(-ENOMEM);
-+ }
-+
-+ /* find out number of slots supported */
-+ if (of_property_read_u32(dev->of_node, "num-slots",
-+ &pdata->num_slots)) {
-+ dev_info(dev, "num-slots property not found, "
-+ "assuming 1 slot is available\n");
-+ pdata->num_slots = 1;
-+ }
-+
-+ /* get quirks */
-+ for (idx = 0; idx < ARRAY_SIZE(of_quirks); idx++)
-+ if (of_get_property(np, of_quirks[idx].quirk, NULL))
-+ pdata->quirks |= of_quirks[idx].id;
-+
-+ if (of_property_read_u32(np, "fifo-depth", &pdata->fifo_depth))
-+ dev_info(dev, "fifo-depth property not found, using "
-+ "value of FIFOTH register as default\n");
-+
-+ of_property_read_u32(np, "card-detect-delay", &pdata->detect_delay_ms);
-+
-+ if (!of_property_read_u32(np, "clock-frequency", &clock_frequency))
-+ pdata->bus_hz = clock_frequency;
-+
-+ if (drv_data && drv_data->parse_dt) {
-+ ret = drv_data->parse_dt(host);
-+ if (ret)
-+ return ERR_PTR(ret);
-+ }
-+
-+ if (of_find_property(np, "supports-highspeed", NULL))
-+ pdata->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED;
-+
-+ return pdata;
-+}
-+
-+#else /* CONFIG_OF */
-+static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host)
-+{
-+ return ERR_PTR(-EINVAL);
-+}
-+#endif /* CONFIG_OF */
-+
-+int dw_mci_probe(struct dw_mci *host)
-+{
-+ const struct dw_mci_drv_data *drv_data = host->drv_data;
-+ int width, i, ret = 0;
-+ u32 fifo_size;
-+ int init_slots = 0;
-+
-+ if (!host->pdata) {
-+ host->pdata = dw_mci_parse_dt(host);
-+ if (IS_ERR(host->pdata)) {
-+ dev_err(host->dev, "platform data not available\n");
-+ return -EINVAL;
-+ }
-+ }
-+
-+ if (host->pdata->num_slots > 1) {
-+ dev_err(host->dev,
-+ "Platform data must supply num_slots.\n");
-+ return -ENODEV;
-+ }
-+
-+ host->biu_clk = devm_clk_get(host->dev, "biu");
-+ if (IS_ERR(host->biu_clk)) {
-+ dev_dbg(host->dev, "biu clock not available\n");
-+ } else {
-+ ret = clk_prepare_enable(host->biu_clk);
-+ if (ret) {
-+ dev_err(host->dev, "failed to enable biu clock\n");
-+ return ret;
-+ }
-+ }
-+
-+ host->ciu_clk = devm_clk_get(host->dev, "ciu");
-+ if (IS_ERR(host->ciu_clk)) {
-+ dev_dbg(host->dev, "ciu clock not available\n");
-+ host->bus_hz = host->pdata->bus_hz;
-+ } else {
-+ ret = clk_prepare_enable(host->ciu_clk);
-+ if (ret) {
-+ dev_err(host->dev, "failed to enable ciu clock\n");
-+ goto err_clk_biu;
-+ }
-+
-+ if (host->pdata->bus_hz) {
-+ ret = clk_set_rate(host->ciu_clk, host->pdata->bus_hz);
-+ if (ret)
-+ dev_warn(host->dev,
-+ "Unable to set bus rate to %uHz\n",
-+ host->pdata->bus_hz);
-+ }
-+ host->bus_hz = clk_get_rate(host->ciu_clk);
-+ }
-+
-+ if (!host->bus_hz) {
-+ dev_err(host->dev,
-+ "Platform data must supply bus speed\n");
-+ ret = -ENODEV;
-+ goto err_clk_ciu;
-+ }
-+
-+ if (drv_data && drv_data->init) {
-+ ret = drv_data->init(host);
-+ if (ret) {
-+ dev_err(host->dev,
-+ "implementation specific init failed\n");
-+ goto err_clk_ciu;
-+ }
-+ }
-+
-+ if (drv_data && drv_data->setup_clock) {
-+ ret = drv_data->setup_clock(host);
-+ if (ret) {
-+ dev_err(host->dev,
-+ "implementation specific clock setup failed\n");
-+ goto err_clk_ciu;
-+ }
-+ }
-+
-+ host->quirks = host->pdata->quirks;
-+
-+ spin_lock_init(&host->lock);
-+ INIT_LIST_HEAD(&host->queue);
-+
-+ /*
-+ * Get the host data width - this assumes that HCON has been set with
-+ * the correct values.
-+ */
-+ i = (mci_readl(host, HCON) >> 7) & 0x7;
-+ if (!i) {
-+ host->push_data = dw_mci_push_data16;
-+ host->pull_data = dw_mci_pull_data16;
-+ width = 16;
-+ host->data_shift = 1;
-+ } else if (i == 2) {
-+ host->push_data = dw_mci_push_data64;
-+ host->pull_data = dw_mci_pull_data64;
-+ width = 64;
-+ host->data_shift = 3;
-+ } else {
-+ /* Check for a reserved value, and warn if it is */
-+ WARN((i != 1),
-+ "HCON reports a reserved host data width!\n"
-+ "Defaulting to 32-bit access.\n");
-+ host->push_data = dw_mci_push_data32;
-+ host->pull_data = dw_mci_pull_data32;
-+ width = 32;
-+ host->data_shift = 2;
-+ }
-+
-+ /* Reset all blocks */
-+ if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS))
-+ return -ENODEV;
-+
-+ host->dma_ops = host->pdata->dma_ops;
-+ dw_mci_init_dma(host);
-+
-+ /* Clear the interrupts for the host controller */
-+ mci_writel(host, RINTSTS, 0xFFFFFFFF);
-+ mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */
-+
-+ /* Put in max timeout */
-+ mci_writel(host, TMOUT, 0xFFFFFFFF);
-+
-+ /*
-+ * FIFO threshold settings RxMark = fifo_size / 2 - 1,
-+ * Tx Mark = fifo_size / 2 DMA Size = 8
-+ */
-+ if (!host->pdata->fifo_depth) {
-+ /*
-+ * Power-on value of RX_WMark is FIFO_DEPTH-1, but this may
-+ * have been overwritten by the bootloader, just like we're
-+ * about to do, so if you know the value for your hardware, you
-+ * should put it in the platform data.
-+ */
-+ fifo_size = mci_readl(host, FIFOTH);
-+ fifo_size = 1 + ((fifo_size >> 16) & 0xfff);
-+ } else {
-+ fifo_size = host->pdata->fifo_depth;
-+ }
-+ host->fifo_depth = fifo_size;
-+ host->fifoth_val =
-+ SDMMC_SET_FIFOTH(0x2, fifo_size / 2 - 1, fifo_size / 2);
-+ mci_writel(host, FIFOTH, host->fifoth_val);
-+
-+ /* disable clock to CIU */
-+ mci_writel(host, CLKENA, 0);
-+ mci_writel(host, CLKSRC, 0);
-+
-+ /*
-+ * In 2.40a spec, Data offset is changed.
-+ * Need to check the version-id and set data-offset for DATA register.
-+ */
-+ host->verid = SDMMC_GET_VERID(mci_readl(host, VERID));
-+ dev_info(host->dev, "Version ID is %04x\n", host->verid);
-+
-+ if (host->verid < DW_MMC_240A)
-+ host->data_offset = DATA_OFFSET;
-+ else
-+ host->data_offset = DATA_240A_OFFSET;
-+
-+ tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host);
-+ host->card_workqueue = alloc_workqueue("dw-mci-card",
-+ WQ_MEM_RECLAIM, 1);
-+ if (!host->card_workqueue) {
-+ ret = -ENOMEM;
-+ goto err_dmaunmap;
-+ }
-+ INIT_WORK(&host->card_work, dw_mci_work_routine_card);
-+ ret = devm_request_irq(host->dev, host->irq, dw_mci_interrupt,
-+ host->irq_flags, "dw-mci", host);
-+ if (ret)
-+ goto err_workqueue;
-+
-+ if (host->pdata->num_slots)
-+ host->num_slots = host->pdata->num_slots;
-+ else
-+ host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1;
-+
-+ /*
-+ * Enable interrupts for command done, data over, data empty, card det,
-+ * receive ready and error such as transmit, receive timeout, crc error
-+ */
-+ mci_writel(host, RINTSTS, 0xFFFFFFFF);
-+ mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |
-+ SDMMC_INT_TXDR | SDMMC_INT_RXDR |
-+ DW_MCI_ERROR_FLAGS | SDMMC_INT_CD);
-+ mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */
-+
-+ dev_info(host->dev, "DW MMC controller at irq %d, "
-+ "%d bit host data width, "
-+ "%u deep fifo\n",
-+ host->irq, width, fifo_size);
-+
-+ /* We need at least one slot to succeed */
-+ for (i = 0; i < host->num_slots; i++) {
-+ ret = dw_mci_init_slot(host, i);
-+ if (ret)
-+ dev_dbg(host->dev, "slot %d init failed\n", i);
-+ else
-+ init_slots++;
-+ }
-+
-+ if (init_slots) {
-+ dev_info(host->dev, "%d slots initialized\n", init_slots);
-+ } else {
-+ dev_dbg(host->dev, "attempted to initialize %d slots, "
-+ "but failed on all\n", host->num_slots);
-+ goto err_workqueue;
-+ }
-+
-+ if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO)
-+ dev_info(host->dev, "Internal DMAC interrupt fix enabled.\n");
-+
-+ return 0;
-+
-+err_workqueue:
-+ destroy_workqueue(host->card_workqueue);
-+
-+err_dmaunmap:
-+ if (host->use_dma && host->dma_ops->exit)
-+ host->dma_ops->exit(host);
-+
-+err_clk_ciu:
-+ if (!IS_ERR(host->ciu_clk))
-+ clk_disable_unprepare(host->ciu_clk);
-+
-+err_clk_biu:
-+ if (!IS_ERR(host->biu_clk))
-+ clk_disable_unprepare(host->biu_clk);
-+
-+ return ret;
-+}
-+EXPORT_SYMBOL(dw_mci_probe);
-+
-+void dw_mci_remove(struct dw_mci *host)
-+{
-+ int i;
-+
-+ mci_writel(host, RINTSTS, 0xFFFFFFFF);
-+ mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */
-+
-+ for (i = 0; i < host->num_slots; i++) {
-+ dev_dbg(host->dev, "remove slot %d\n", i);
-+ if (host->slot[i])
-+ dw_mci_cleanup_slot(host->slot[i], i);
-+ }
-+
-+ /* disable clock to CIU */
-+ mci_writel(host, CLKENA, 0);
-+ mci_writel(host, CLKSRC, 0);
-+
-+ destroy_workqueue(host->card_workqueue);
-+
-+ if (host->use_dma && host->dma_ops->exit)
-+ host->dma_ops->exit(host);
-+
-+ if (!IS_ERR(host->ciu_clk))
-+ clk_disable_unprepare(host->ciu_clk);
-+
-+ if (!IS_ERR(host->biu_clk))
-+ clk_disable_unprepare(host->biu_clk);
-+}
-+EXPORT_SYMBOL(dw_mci_remove);
-+
-+
-+
-+#ifdef CONFIG_PM_SLEEP
-+/*
-+ * TODO: we should probably disable the clock to the card in the suspend path.
-+ */
-+int dw_mci_suspend(struct dw_mci *host)
-+{
-+ return 0;
-+}
-+EXPORT_SYMBOL(dw_mci_suspend);
-+
-+int dw_mci_resume(struct dw_mci *host)
-+{
-+ int i, ret;
-+
-+ if (!dw_mci_ctrl_reset(host, SDMMC_CTRL_ALL_RESET_FLAGS)) {
-+ ret = -ENODEV;
-+ return ret;
-+ }
-+
-+ if (host->use_dma && host->dma_ops->init)
-+ host->dma_ops->init(host);
-+
-+ /*
-+ * Restore the initial value at FIFOTH register
-+ * And Invalidate the prev_blksz with zero
-+ */
-+ mci_writel(host, FIFOTH, host->fifoth_val);
-+ host->prev_blksz = 0;
-+
-+ /* Put in max timeout */
-+ mci_writel(host, TMOUT, 0xFFFFFFFF);
-+
-+ mci_writel(host, RINTSTS, 0xFFFFFFFF);
-+ mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER |
-+ SDMMC_INT_TXDR | SDMMC_INT_RXDR |
-+ DW_MCI_ERROR_FLAGS | SDMMC_INT_CD);
-+ mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE);
-+
-+ for (i = 0; i < host->num_slots; i++) {
-+ struct dw_mci_slot *slot = host->slot[i];
-+ if (!slot)
-+ continue;
-+ if (slot->mmc->pm_flags & MMC_PM_KEEP_POWER) {
-+ dw_mci_set_ios(slot->mmc, &slot->mmc->ios);
-+ dw_mci_setup_bus(slot, true);
-+ }
-+ }
-+ return 0;
-+}
-+EXPORT_SYMBOL(dw_mci_resume);
-+#endif /* CONFIG_PM_SLEEP */
-+
-+static int __init dw_mci_init(void)
-+{
-+ pr_info("Synopsys Designware Multimedia Card Interface Driver\n");
-+ return 0;
-+}
-+
-+static void __exit dw_mci_exit(void)
-+{
-+}
-+
-+module_init(dw_mci_init);
-+module_exit(dw_mci_exit);
-+
-+MODULE_DESCRIPTION("DW Multimedia Card Interface driver");
-+MODULE_AUTHOR("NXP Semiconductor VietNam");
-+MODULE_AUTHOR("Imagination Technologies Ltd");
-+MODULE_LICENSE("GPL v2");
-diff -Nur linux-3.18.8.orig/include/linux/mmc/host.h linux-3.18.8/include/linux/mmc/host.h
---- linux-3.18.8.orig/include/linux/mmc/host.h 2015-02-27 02:49:36.000000000 +0100
-+++ linux-3.18.8/include/linux/mmc/host.h 2015-03-02 03:25:33.000000000 +0100
-@@ -305,6 +305,11 @@
- unsigned long clkgate_delay;
- #endif
-
-+ /* card specific properties to deal with power and reset */
-+ struct regulator *card_regulator; /* External VCC needed by the card */
-+ struct gpio_desc *card_reset_gpios[2]; /* External resets, active low */
-+ struct clk *card_clk; /* External clock needed by the card */
-+
- /* host specific block data */
- unsigned int max_seg_size; /* see blk_queue_max_segment_size */
- unsigned short max_segs; /* see blk_queue_max_segments */
diff --git a/target/arm/solidrun-imx6/patches/4.1.10/0002-rt.patch b/target/arm/solidrun-imx6/patches/4.1.10/0002-rt.patch
new file mode 100644
index 000000000..2eccf6072
--- /dev/null
+++ b/target/arm/solidrun-imx6/patches/4.1.10/0002-rt.patch
@@ -0,0 +1,75 @@
+From:
+http://patches.openembedded.org/patch/65803/
+
+diff -Nur linux-4.1.10.orig/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c linux-4.1.10/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c
+--- linux-4.1.10.orig/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c 2015-10-13 16:22:22.044878316 +0200
++++ linux-4.1.10/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c 2015-10-13 16:34:45.559823687 +0200
+@@ -3060,7 +3060,7 @@
+ gcmkONERROR(gckOS_Allocate(Os, gcmSIZEOF(struct mutex), Mutex));
+
+ /* Initialize the mutex. */
+- mutex_init(*Mutex);
++ mutex_init((struct mutex*)*Mutex);
+
+ /* Return status. */
+ gcmkFOOTER_ARG("*Mutex=0x%X", *Mutex);
+@@ -3105,7 +3105,7 @@
+ gcmkVERIFY_ARGUMENT(Mutex != gcvNULL);
+
+ /* Destroy the mutex. */
+- mutex_destroy(Mutex);
++ mutex_destroy((struct mutex*)Mutex);
+
+ /* Free the mutex structure. */
+ gcmkONERROR(gckOS_Free(Os, Mutex));
+@@ -7625,7 +7625,7 @@
+
+ might_sleep();
+
+- spin_lock_irq(&signal->obj.wait.lock);
++ raw_spin_lock_irq(&signal->obj.wait.lock);
+
+ if (signal->obj.done)
+ {
+@@ -7655,9 +7655,8 @@
+ : Wait * HZ / 1000;
+ #endif
+
+- DECLARE_WAITQUEUE(wait, current);
+- wait.flags |= WQ_FLAG_EXCLUSIVE;
+- __add_wait_queue_tail(&signal->obj.wait, &wait);
++ DEFINE_SWAITER(wait);
++ swait_prepare_locked(&signal->obj.wait, &wait);
+
+ while (gcvTRUE)
+ {
+@@ -7669,9 +7668,9 @@
+ }
+
+ __set_current_state(TASK_INTERRUPTIBLE);
+- spin_unlock_irq(&signal->obj.wait.lock);
++ raw_spin_unlock_irq(&signal->obj.wait.lock);
+ timeout = schedule_timeout(timeout);
+- spin_lock_irq(&signal->obj.wait.lock);
++ raw_spin_lock_irq(&signal->obj.wait.lock);
+
+ if (signal->obj.done)
+ {
+@@ -7735,7 +7734,7 @@
+ }
+ }
+
+- __remove_wait_queue(&signal->obj.wait, &wait);
++ swait_finish_locked(&signal->obj.wait, &wait);
+
+ #if gcdDETECT_TIMEOUT
+ if (complained)
+@@ -7748,7 +7747,7 @@
+ #endif
+ }
+
+- spin_unlock_irq(&signal->obj.wait.lock);
++ raw_spin_unlock_irq(&signal->obj.wait.lock);
+
+ OnError:
+ /* Return status. */