add cubox patches

2 files changed, 235255 insertions, 0 deletions

diff --git a/target/arm/cubox-i/patches/3.14.15/solidrun.patch b/target/arm/cubox-i/patches/3.14.15/solidrun.patch
new file mode 100644
index 000000000..ac5ee0237
--- /dev/null
+++ b/target/arm/cubox-i/patches/3.14.15/solidrun.patch
@@ -0,0 +1,235255 @@
+diff -Nur linux-3.14.15/arch/arm/boot/dts/clcd-panels.dtsi linux-linaro-stable-mx6/arch/arm/boot/dts/clcd-panels.dtsi
+--- linux-3.14.15/arch/arm/boot/dts/clcd-panels.dtsi	1970-01-01 01:00:00.000000000 +0100
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/clcd-panels.dtsi	2014-08-20 19:23:45.534811583 +0200
+@@ -0,0 +1,52 @@
++/*
++ * ARM Ltd. Versatile Express
++ *
++ */
++
++/ {
++	panels {
++		panel@0 {
++			compatible	= "panel";
++			mode		= "VGA";
++			refresh		= <60>;
++			xres		= <640>;
++			yres		= <480>;
++			pixclock	= <39721>;
++			left_margin	= <40>;
++			right_margin	= <24>;
++			upper_margin	= <32>;
++			lower_margin	= <11>;
++			hsync_len	= <96>;
++			vsync_len	= <2>;
++			sync		= <0>;
++			vmode		= "FB_VMODE_NONINTERLACED";
++
++			tim2		= "TIM2_BCD", "TIM2_IPC";
++			cntl		= "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)";
++			caps		= "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888";
++			bpp		= <16>;
++		};
++
++		panel@1 {
++			compatible	= "panel";
++			mode		= "XVGA";
++			refresh		= <60>;
++			xres		= <1024>;
++			yres		= <768>;
++			pixclock	= <15748>;
++			left_margin	= <152>;
++			right_margin	= <48>;
++			upper_margin	= <23>;
++			lower_margin	= <3>;
++			hsync_len	= <104>;
++			vsync_len	= <4>;
++			sync		= <0>;
++			vmode		= "FB_VMODE_NONINTERLACED";
++
++			tim2		= "TIM2_BCD", "TIM2_IPC";
++			cntl		= "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)";
++			caps		= "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888";
++			bpp		= <16>;
++		};
++	};
++};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/efm32gg-dk3750.dts linux-linaro-stable-mx6/arch/arm/boot/dts/efm32gg-dk3750.dts
+--- linux-3.14.15/arch/arm/boot/dts/efm32gg-dk3750.dts	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/efm32gg-dk3750.dts	2014-08-20 19:31:39.860842101 +0200
+@@ -26,7 +26,7 @@
+ 		};
+ 
+ 		i2c@4000a000 {
+-			location = <3>;
++			efm32,location = <3>;
+ 			status = "ok";
+ 
+ 			temp@48 {
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx23.dtsi linux-linaro-stable-mx6/arch/arm/boot/dts/imx23.dtsi
+--- linux-3.14.15/arch/arm/boot/dts/imx23.dtsi	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx23.dtsi	2014-08-20 19:31:39.884842204 +0200
+@@ -363,7 +363,8 @@
+ 				compatible = "fsl,imx23-lcdif";
+ 				reg = <0x80030000 2000>;
+ 				interrupts = <46 45>;
+-				clocks = <&clks 38>;
++				clocks = <&clks 38>, <&clks 38>;
++				clock-names = "pix", "axi";
+ 				status = "disabled";
+ 			};
+ 
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx25.dtsi linux-linaro-stable-mx6/arch/arm/boot/dts/imx25.dtsi
+--- linux-3.14.15/arch/arm/boot/dts/imx25.dtsi	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx25.dtsi	2014-08-20 19:31:39.888842222 +0200
+@@ -13,6 +13,7 @@
+ 
+ / {
+ 	aliases {
++		ethernet0 = &fec;
+ 		gpio0 = &gpio1;
+ 		gpio1 = &gpio2;
+ 		gpio2 = &gpio3;
+@@ -56,6 +57,7 @@
+ 
+ 		osc {
+ 			compatible = "fsl,imx-osc", "fixed-clock";
++			#clock-cells = <0>;
+ 			clock-frequency = <24000000>;
+ 		};
+ 	};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx25-karo-tx25.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx25-karo-tx25.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx25-karo-tx25.dts	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx25-karo-tx25.dts	2014-08-20 19:31:39.884842204 +0200
+@@ -16,6 +16,10 @@
+ 	model = "Ka-Ro TX25";
+ 	compatible = "karo,imx25-tx25", "fsl,imx25";
+ 
++	chosen {
++		stdout-path = &uart1;
++	};
++
+ 	memory {
+ 		reg = <0x80000000 0x02000000 0x90000000 0x02000000>;
+ 	};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx27-apf27.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx27-apf27.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx27-apf27.dts	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx27-apf27.dts	2014-08-20 19:31:39.888842222 +0200
+@@ -29,6 +29,7 @@
+ 
+ 		osc26m {
+ 			compatible = "fsl,imx-osc26m", "fixed-clock";
++			#clock-cells = <0>;
+ 			clock-frequency = <0>;
+ 		};
+ 	};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx27.dtsi linux-linaro-stable-mx6/arch/arm/boot/dts/imx27.dtsi
+--- linux-3.14.15/arch/arm/boot/dts/imx27.dtsi	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx27.dtsi	2014-08-20 19:31:39.892842237 +0200
+@@ -13,6 +13,7 @@
+ 
+ / {
+ 	aliases {
++		ethernet0 = &fec;
+ 		gpio0 = &gpio1;
+ 		gpio1 = &gpio2;
+ 		gpio2 = &gpio3;
+@@ -46,6 +47,7 @@
+ 
+ 		osc26m {
+ 			compatible = "fsl,imx-osc26m", "fixed-clock";
++			#clock-cells = <0>;
+ 			clock-frequency = <26000000>;
+ 		};
+ 	};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts	2014-08-20 19:31:39.888842222 +0200
+@@ -15,6 +15,10 @@
+ 	model = "Phytec pca100 rapid development kit";
+ 	compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27";
+ 
++	chosen {
++		stdout-path = &uart1;
++	};
++
+ 	display: display {
+ 		model = "Primeview-PD050VL1";
+ 		native-mode = <&timing0>;
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx28.dtsi linux-linaro-stable-mx6/arch/arm/boot/dts/imx28.dtsi
+--- linux-3.14.15/arch/arm/boot/dts/imx28.dtsi	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx28.dtsi	2014-08-20 19:31:39.892842237 +0200
+@@ -840,7 +840,8 @@
+ 				compatible = "fsl,imx28-lcdif";
+ 				reg = <0x80030000 0x2000>;
+ 				interrupts = <38>;
+-				clocks = <&clks 55>;
++				clocks = <&clks 55>, <&clks 55>;
++				clock-names = "pix", "axi";
+ 				dmas = <&dma_apbh 13>;
+ 				dma-names = "rx";
+ 				status = "disabled";
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx51-babbage.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx51-babbage.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx51-babbage.dts	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx51-babbage.dts	2014-08-20 19:31:39.896842254 +0200
+@@ -17,6 +17,10 @@
+ 	model = "Freescale i.MX51 Babbage Board";
+ 	compatible = "fsl,imx51-babbage", "fsl,imx51";
+ 
++	chosen {
++		stdout-path = &uart1;
++	};
++
+ 	memory {
+ 		reg = <0x90000000 0x20000000>;
+ 	};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx51.dtsi linux-linaro-stable-mx6/arch/arm/boot/dts/imx51.dtsi
+--- linux-3.14.15/arch/arm/boot/dts/imx51.dtsi	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx51.dtsi	2014-08-20 19:31:39.896842254 +0200
+@@ -15,6 +15,7 @@
+ 
+ / {
+ 	aliases {
++		ethernet0 = &fec;
+ 		gpio0 = &gpio1;
+ 		gpio1 = &gpio2;
+ 		gpio2 = &gpio3;
+@@ -43,21 +44,25 @@
+ 
+ 		ckil {
+ 			compatible = "fsl,imx-ckil", "fixed-clock";
++			#clock-cells = <0>;
+ 			clock-frequency = <32768>;
+ 		};
+ 
+ 		ckih1 {
+ 			compatible = "fsl,imx-ckih1", "fixed-clock";
++			#clock-cells = <0>;
+ 			clock-frequency = <0>;
+ 		};
+ 
+ 		ckih2 {
+ 			compatible = "fsl,imx-ckih2", "fixed-clock";
++			#clock-cells = <0>;
+ 			clock-frequency = <0>;
+ 		};
+ 
+ 		osc {
+ 			compatible = "fsl,imx-osc", "fixed-clock";
++			#clock-cells = <0>;
+ 			clock-frequency = <24000000>;
+ 		};
+ 	};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx53.dtsi linux-linaro-stable-mx6/arch/arm/boot/dts/imx53.dtsi
+--- linux-3.14.15/arch/arm/boot/dts/imx53.dtsi	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx53.dtsi	2014-08-20 19:31:39.896842254 +0200
+@@ -15,6 +15,7 @@
+ 
+ / {
+ 	aliases {
++		ethernet0 = &fec;
+ 		gpio0 = &gpio1;
+ 		gpio1 = &gpio2;
+ 		gpio2 = &gpio3;
+@@ -59,21 +60,25 @@
+ 
+ 		ckil {
+ 			compatible = "fsl,imx-ckil", "fixed-clock";
++			#clock-cells = <0>;
+ 			clock-frequency = <32768>;
+ 		};
+ 
+ 		ckih1 {
+ 			compatible = "fsl,imx-ckih1", "fixed-clock";
++			#clock-cells = <0>;
+ 			clock-frequency = <22579200>;
+ 		};
+ 
+ 		ckih2 {
+ 			compatible = "fsl,imx-ckih2", "fixed-clock";
++			#clock-cells = <0>;
+ 			clock-frequency = <0>;
+ 		};
+ 
+ 		osc {
+ 			compatible = "fsl,imx-osc", "fixed-clock";
++			#clock-cells = <0>;
+ 			clock-frequency = <24000000>;
+ 		};
+ 	};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx53-mba53.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx53-mba53.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx53-mba53.dts	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx53-mba53.dts	2014-08-20 19:31:39.896842254 +0200
+@@ -25,6 +25,10 @@
+ 		enable-active-low;
+ 	};
+ 
++	chosen {
++		stdout-path = &uart2;
++	};
++
+ 	backlight {
+ 		compatible = "pwm-backlight";
+ 		pwms = <&pwm2 0 50000>;
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx6dl-dfi-fs700-m60.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-dfi-fs700-m60.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx6dl-dfi-fs700-m60.dts	1970-01-01 01:00:00.000000000 +0100
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-dfi-fs700-m60.dts	2014-08-20 19:31:39.896842254 +0200
+@@ -0,0 +1,23 @@
++/*
++ * Copyright 2013 Sascha Hauer <s.hauer@pengutronix.de>
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#ifndef __DTS_V1__
++#define __DTS_V1__
++/dts-v1/;
++#endif
++
++#include "imx6dl.dtsi"
++#include "imx6qdl-dfi-fs700-m60.dtsi"
++
++/ {
++	model = "DFI FS700-M60-6DL i.MX6dl Q7 Board";
++	compatible = "dfi,fs700-m60-6dl", "dfi,fs700e-m60", "fsl,imx6dl";
++};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx6dl.dtsi linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl.dtsi
+--- linux-3.14.15/arch/arm/boot/dts/imx6dl.dtsi	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl.dtsi	2014-08-20 19:31:39.896842254 +0200
+@@ -8,6 +8,7 @@
+  *
+  */
+ 
++#include <dt-bindings/interrupt-controller/irq.h>
+ #include "imx6dl-pinfunc.h"
+ #include "imx6qdl.dtsi"
+ 
+@@ -21,6 +22,26 @@
+ 			device_type = "cpu";
+ 			reg = <0>;
+ 			next-level-cache = <&L2>;
++			operating-points = <
++				/* kHz    uV */
++				996000  1275000
++				792000  1175000
++				396000  1075000
++			>;
++			fsl,soc-operating-points = <
++				/* ARM kHz  SOC-PU uV */
++				996000	1175000
++				792000	1175000
++				396000	1175000
++			>;
++			clock-latency = <61036>; /* two CLK32 periods */
++			clocks = <&clks 104>, <&clks 6>, <&clks 16>,
++				 <&clks 17>, <&clks 170>;
++			clock-names = "arm", "pll2_pfd2_396m", "step",
++				      "pll1_sw", "pll1_sys";
++			arm-supply = <&reg_arm>;
++			pu-supply = <&reg_pu>;
++			soc-supply = <&reg_soc>;
+ 		};
+ 
+ 		cpu@1 {
+@@ -32,40 +53,124 @@
+ 	};
+ 
+ 	soc {
++
++		busfreq { /* BUSFREQ */
++			compatible = "fsl,imx6_busfreq";
++			clocks = <&clks 171>, <&clks 6>, <&clks 11>, <&clks 104>, <&clks 172>, <&clks 58>,
++				<&clks 18>, <&clks 60>, <&clks 20>, <&clks 3>, <&clks 22> , <&clks 8>;
++			clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm", "pll3_usb_otg", "periph",
++				"periph_pre", "periph_clk2", "periph_clk2_sel", "osc", "axi_sel", "pll3_pfd1_540m";
++			interrupts = <0 107 0x04>, <0 112 0x4>;
++			interrupt-names = "irq_busfreq_0", "irq_busfreq_1";
++			fsl,max_ddr_freq = <400000000>;
++		};
++
++		gpu@00130000 {
++			compatible = "fsl,imx6dl-gpu", "fsl,imx6q-gpu";
++			reg = <0x00130000 0x4000>, <0x00134000 0x4000>,
++			      <0x0 0x0>;
++			reg-names = "iobase_3d", "iobase_2d",
++				    "phys_baseaddr";
++			interrupts = <0 9 0x04>, <0 10 0x04>;
++			interrupt-names = "irq_3d", "irq_2d";
++			clocks = <&clks 143>, <&clks 27>,
++				 <&clks 121>, <&clks 122>,
++				 <&clks 0>;
++			clock-names = "gpu2d_axi_clk", "gpu3d_axi_clk",
++				      "gpu2d_clk", "gpu3d_clk",
++				      "gpu3d_shader_clk";
++			resets = <&src 0>, <&src 3>;
++			reset-names = "gpu3d", "gpu2d";
++			pu-supply = <&reg_pu>;
++		};
++
+ 		ocram: sram@00900000 {
+ 			compatible = "mmio-sram";
+ 			reg = <0x00900000 0x20000>;
+ 			clocks = <&clks 142>;
+ 		};
+ 
++		hdmi_core: hdmi_core@00120000 {
++			compatible = "fsl,imx6dl-hdmi-core";
++			reg = <0x00120000 0x9000>;
++			clocks = <&clks 124>, <&clks 123>;
++			clock-names = "hdmi_isfr", "hdmi_iahb";
++			status = "disabled";
++		};
++
++		hdmi_video: hdmi_video@020e0000 {
++			compatible = "fsl,imx6dl-hdmi-video";
++			reg =  <0x020e0000 0x1000>;
++			reg-names = "hdmi_gpr";
++			interrupts = <0 115 0x04>;
++			clocks = <&clks 124>, <&clks 123>;
++			clock-names = "hdmi_isfr", "hdmi_iahb";
++			status = "disabled";
++		};
++
++		hdmi_audio: hdmi_audio@00120000 {
++			compatible = "fsl,imx6dl-hdmi-audio";
++			clocks = <&clks 124>, <&clks 123>;
++			clock-names = "hdmi_isfr", "hdmi_iahb";
++			dmas = <&sdma 2 23 0>;
++			dma-names = "tx";
++			status = "disabled";
++		};
++
++		hdmi_cec: hdmi_cec@00120000 {
++			compatible = "fsl,imx6dl-hdmi-cec";
++			interrupts = <0 115 0x04>;
++			status = "disabled";
++		};
++
+ 		aips1: aips-bus@02000000 {
++			vpu@02040000 {
++				iramsize = <0>;
++				status = "okay";
++			};
++
+ 			iomuxc: iomuxc@020e0000 {
+ 				compatible = "fsl,imx6dl-iomuxc";
+ 			};
+ 
+ 			pxp: pxp@020f0000 {
++				compatible = "fsl,imx6dl-pxp-dma";
+ 				reg = <0x020f0000 0x4000>;
+-				interrupts = <0 98 0x04>;
++				interrupts = <0 98 IRQ_TYPE_LEVEL_HIGH>;
++				clocks = <&clks 133>;
++				clock-names = "pxp-axi";
++				status = "disabled";
+ 			};
+ 
+ 			epdc: epdc@020f4000 {
+ 				reg = <0x020f4000 0x4000>;
+-				interrupts = <0 97 0x04>;
++				interrupts = <0 97 IRQ_TYPE_LEVEL_HIGH>;
+ 			};
+ 
+ 			lcdif: lcdif@020f8000 {
+ 				reg = <0x020f8000 0x4000>;
+-				interrupts = <0 39 0x04>;
++				interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
+ 			};
+ 		};
+ 
+ 		aips2: aips-bus@02100000 {
++			mipi_dsi: mipi@021e0000 {
++				compatible = "fsl,imx6dl-mipi-dsi";
++				reg = <0x021e0000 0x4000>;
++				interrupts = <0 102 0x04>;
++				gpr = <&gpr>;
++				clocks = <&clks 138>, <&clks 209>;
++				clock-names = "mipi_pllref_clk", "mipi_cfg_clk";
++				status = "disabled";
++			};
++
+ 			i2c4: i2c@021f8000 {
+ 				#address-cells = <1>;
+ 				#size-cells = <0>;
+-				compatible = "fsl,imx1-i2c";
++				compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
+ 				reg = <0x021f8000 0x4000>;
+-				interrupts = <0 35 0x04>;
++				interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>;
++				clocks = <&clks 116>;
+ 				status = "disabled";
+ 			};
+ 		};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx6dl-gw51xx.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-gw51xx.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx6dl-gw51xx.dts	1970-01-01 01:00:00.000000000 +0100
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-gw51xx.dts	2014-08-20 19:31:39.896842254 +0200
+@@ -0,0 +1,19 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6dl.dtsi"
++#include "imx6qdl-gw51xx.dtsi"
++
++/ {
++	model = "Gateworks Ventana i.MX6 DualLite GW51XX";
++	compatible = "gw,imx6dl-gw51xx", "gw,ventana", "fsl,imx6dl";
++};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx6dl-gw52xx.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-gw52xx.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx6dl-gw52xx.dts	1970-01-01 01:00:00.000000000 +0100
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-gw52xx.dts	2014-08-20 19:31:39.896842254 +0200
+@@ -0,0 +1,19 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6dl.dtsi"
++#include "imx6qdl-gw52xx.dtsi"
++
++/ {
++	model = "Gateworks Ventana i.MX6 DualLite GW52XX";
++	compatible = "gw,imx6dl-gw52xx", "gw,ventana", "fsl,imx6dl";
++};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx6dl-gw53xx.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-gw53xx.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx6dl-gw53xx.dts	1970-01-01 01:00:00.000000000 +0100
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-gw53xx.dts	2014-08-20 19:31:39.896842254 +0200
+@@ -0,0 +1,19 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6dl.dtsi"
++#include "imx6qdl-gw53xx.dtsi"
++
++/ {
++	model = "Gateworks Ventana i.MX6 DualLite GW53XX";
++	compatible = "gw,imx6dl-gw53xx", "gw,ventana", "fsl,imx6dl";
++};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx6dl-gw54xx.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-gw54xx.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx6dl-gw54xx.dts	1970-01-01 01:00:00.000000000 +0100
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-gw54xx.dts	2014-08-20 19:31:39.896842254 +0200
+@@ -0,0 +1,19 @@
++/*
++ * Copyright 2013 Gateworks Corporation
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6dl.dtsi"
++#include "imx6qdl-gw54xx.dtsi"
++
++/ {
++	model = "Gateworks Ventana i.MX6 DualLite GW54XX";
++	compatible = "gw,imx6dl-gw54xx", "gw,ventana", "fsl,imx6dl";
++};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx6dl-hummingboard.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-hummingboard.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx6dl-hummingboard.dts	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-hummingboard.dts	2014-08-20 19:31:39.896842254 +0200
+@@ -1,163 +1,13 @@
+ /*
+- * Copyright (C) 2013,2014 Russell King
++ * Copyright (C) 2014 Rabeeh Khoury (rabeeh@solid-run.com)
++ * Based on work by Russell King
+  */
+ /dts-v1/;
+ 
+ #include "imx6dl.dtsi"
+-#include "imx6qdl-microsom.dtsi"
+-#include "imx6qdl-microsom-ar8035.dtsi"
++#include "imx6qdl-hummingboard.dtsi"
+ 
+ / {
+-	model = "SolidRun HummingBoard DL/Solo";
+-	compatible = "solidrun,hummingboard", "fsl,imx6dl";
+-
+-	ir_recv: ir-receiver {
+-		compatible = "gpio-ir-receiver";
+-		gpios = <&gpio1 2 1>;
+-		pinctrl-names = "default";
+-		pinctrl-0 = <&pinctrl_hummingboard_gpio1_2>;
+-	};
+-
+-	regulators {
+-		compatible = "simple-bus";
+-
+-		reg_3p3v: 3p3v {
+-			compatible = "regulator-fixed";
+-			regulator-name = "3P3V";
+-			regulator-min-microvolt = <3300000>;
+-			regulator-max-microvolt = <3300000>;
+-			regulator-always-on;
+-		};
+-
+-		reg_usbh1_vbus: usb-h1-vbus {
+-			compatible = "regulator-fixed";
+-			enable-active-high;
+-			gpio = <&gpio1 0 0>;
+-			pinctrl-names = "default";
+-			pinctrl-0 = <&pinctrl_hummingboard_usbh1_vbus>;
+-			regulator-name = "usb_h1_vbus";
+-			regulator-min-microvolt = <5000000>;
+-			regulator-max-microvolt = <5000000>;
+-		};
+-
+-		reg_usbotg_vbus: usb-otg-vbus {
+-			compatible = "regulator-fixed";
+-			enable-active-high;
+-			gpio = <&gpio3 22 0>;
+-			pinctrl-names = "default";
+-			pinctrl-0 = <&pinctrl_hummingboard_usbotg_vbus>;
+-			regulator-name = "usb_otg_vbus";
+-			regulator-min-microvolt = <5000000>;
+-			regulator-max-microvolt = <5000000>;
+-		};
+-	};
+-
+-	sound-spdif {
+-		compatible = "fsl,imx-audio-spdif";
+-		model = "imx-spdif";
+-		/* IMX6 doesn't implement this yet */
+-		spdif-controller = <&spdif>;
+-		spdif-out;
+-	};
+-};
+-
+-&can1 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_hummingboard_flexcan1>;
+-	status = "okay";
+-};
+-
+-&i2c1 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_hummingboard_i2c1>;
+-
+-	/*
+-	 * Not fitted on Carrier-1 board... yet
+-	status = "okay";
+-
+-	rtc: pcf8523@68 {
+-		compatible = "nxp,pcf8523";
+-		reg = <0x68>;
+-	};
+-	 */
+-};
+-
+-&iomuxc {
+-	hummingboard {
+-		pinctrl_hummingboard_flexcan1: hummingboard-flexcan1 {
+-			fsl,pins = <
+-				MX6QDL_PAD_SD3_CLK__FLEXCAN1_RX 0x80000000
+-				MX6QDL_PAD_SD3_CMD__FLEXCAN1_TX 0x80000000
+-			>;
+-		};
+-
+-		pinctrl_hummingboard_gpio1_2: hummingboard-gpio1_2 {
+-			fsl,pins = <
+-				MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
+-			>;
+-		};
+-
+-		pinctrl_hummingboard_i2c1: hummingboard-i2c1 {
+-			fsl,pins = <
+-				MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
+-				MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
+-			>;
+-		};
+-
+-		pinctrl_hummingboard_spdif: hummingboard-spdif {
+-			fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
+-		};
+-
+-		pinctrl_hummingboard_usbh1_vbus: hummingboard-usbh1-vbus {
+-			fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
+-		};
+-
+-		pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus {
+-			fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
+-		};
+-
+-		pinctrl_hummingboard_usdhc2_aux: hummingboard-usdhc2-aux {
+-			fsl,pins = <
+-				MX6QDL_PAD_GPIO_4__GPIO1_IO04    0x1f071
+-			>;
+-		};
+-
+-		pinctrl_hummingboard_usdhc2: hummingboard-usdhc2 {
+-			fsl,pins = <
+-				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059
+-				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059
+-				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
+-				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
+-				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
+-				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x13059
+-			>;
+-		};
+-	};
+-};
+-
+-&spdif {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_hummingboard_spdif>;
+-	status = "okay";
+-};
+-
+-&usbh1 {
+-	vbus-supply = <&reg_usbh1_vbus>;
+-	status = "okay";
+-};
+-
+-&usbotg {
+-	vbus-supply = <&reg_usbotg_vbus>;
+-	status = "okay";
+-};
+-
+-&usdhc2 {
+-	pinctrl-names = "default";
+-	pinctrl-0 = <
+-		&pinctrl_hummingboard_usdhc2_aux
+-		&pinctrl_hummingboard_usdhc2
+-	>;
+-	vmmc-supply = <&reg_3p3v>;
+-	cd-gpios = <&gpio1 4 0>;
+-	status = "okay";
++	model = "SolidRun HummingBoard Solo/DualLite";
++	compatible = "solidrun,hummingboard/dl", "fsl,imx6dl";
+ };
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx6dl-nitrogen6x.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-nitrogen6x.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx6dl-nitrogen6x.dts	1970-01-01 01:00:00.000000000 +0100
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-nitrogen6x.dts	2014-08-20 19:31:39.896842254 +0200
+@@ -0,0 +1,21 @@
++/*
++ * Copyright 2013 Boundary Devices, Inc.
++ * Copyright 2012 Freescale Semiconductor, Inc.
++ * Copyright 2011 Linaro Ltd.
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6dl.dtsi"
++#include "imx6qdl-nitrogen6x.dtsi"
++
++/ {
++	model = "Freescale i.MX6 DualLite Nitrogen6x Board";
++	compatible = "fsl,imx6dl-nitrogen6x", "fsl,imx6dl";
++};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx6dl-phytec-pbab01.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-phytec-pbab01.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx6dl-phytec-pbab01.dts	1970-01-01 01:00:00.000000000 +0100
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-phytec-pbab01.dts	2014-08-20 19:31:39.896842254 +0200
+@@ -0,0 +1,19 @@
++/*
++ * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6dl-phytec-pfla02.dtsi"
++#include "imx6qdl-phytec-pbab01.dtsi"
++
++/ {
++	model = "Phytec phyFLEX-i.MX6 DualLite/Solo Carrier-Board";
++	compatible = "phytec,imx6dl-pbab01", "phytec,imx6dl-pfla02", "fsl,imx6dl";
++};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi
+--- linux-3.14.15/arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi	1970-01-01 01:00:00.000000000 +0100
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-phytec-pfla02.dtsi	2014-08-20 19:31:39.896842254 +0200
+@@ -0,0 +1,22 @@
++/*
++ * Copyright 2013 Christian Hemp, Phytec Messtechnik GmbH
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++#include "imx6dl.dtsi"
++#include "imx6qdl-phytec-pfla02.dtsi"
++
++/ {
++	model = "Phytec phyFLEX-i.MX6 DualLite/Solo";
++	compatible = "phytec,imx6dl-pfla02", "fsl,imx6dl";
++
++	memory {
++		reg = <0x10000000 0x20000000>;
++	};
++};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx6dl-pinfunc.h linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-pinfunc.h
+--- linux-3.14.15/arch/arm/boot/dts/imx6dl-pinfunc.h	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-pinfunc.h	2014-08-20 19:31:39.896842254 +0200
+@@ -755,6 +755,7 @@
+ #define MX6QDL_PAD_GPIO_5__I2C3_SCL                 0x230 0x600 0x878 0x6 0x2
+ #define MX6QDL_PAD_GPIO_5__ARM_EVENTI               0x230 0x600 0x000 0x7 0x0
+ #define MX6QDL_PAD_GPIO_6__ESAI_TX_CLK              0x234 0x604 0x840 0x0 0x1
++#define MX6QDL_PAD_GPIO_6__ENET_IRQ		    0x234 0x604 0x03c 0x11 0xff000609
+ #define MX6QDL_PAD_GPIO_6__I2C3_SDA                 0x234 0x604 0x87c 0x2 0x2
+ #define MX6QDL_PAD_GPIO_6__GPIO1_IO06               0x234 0x604 0x000 0x5 0x0
+ #define MX6QDL_PAD_GPIO_6__SD2_LCTL                 0x234 0x604 0x000 0x6 0x0
+@@ -950,6 +951,7 @@
+ #define MX6QDL_PAD_RGMII_TXC__GPIO6_IO19            0x2d8 0x6c0 0x000 0x5 0x0
+ #define MX6QDL_PAD_RGMII_TXC__XTALOSC_REF_CLK_24M   0x2d8 0x6c0 0x000 0x7 0x0
+ #define MX6QDL_PAD_SD1_CLK__SD1_CLK                 0x2dc 0x6c4 0x928 0x0 0x1
++#define MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUT          0x2dc 0x6c4 0x000 0x2 0x0
+ #define MX6QDL_PAD_SD1_CLK__GPT_CLKIN               0x2dc 0x6c4 0x000 0x3 0x0
+ #define MX6QDL_PAD_SD1_CLK__GPIO1_IO20              0x2dc 0x6c4 0x000 0x5 0x0
+ #define MX6QDL_PAD_SD1_CMD__SD1_CMD                 0x2e0 0x6c8 0x000 0x0 0x0
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx6dl-sabreauto.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-sabreauto.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx6dl-sabreauto.dts	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-sabreauto.dts	2014-08-20 19:23:45.542811617 +0200
+@@ -15,3 +15,16 @@
+ 	model = "Freescale i.MX6 DualLite/Solo SABRE Automotive Board";
+ 	compatible = "fsl,imx6dl-sabreauto", "fsl,imx6dl";
+ };
++
++&ldb {
++	ipu_id = <0>;
++	sec_ipu_id = <0>;
++};
++
++&mxcfb1 {
++	status = "okay";
++};
++
++&mxcfb2 {
++	status = "okay";
++};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx6dl-sabrelite.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-sabrelite.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx6dl-sabrelite.dts	1970-01-01 01:00:00.000000000 +0100
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-sabrelite.dts	2014-08-20 19:31:39.896842254 +0200
+@@ -0,0 +1,20 @@
++/*
++ * Copyright 2011 Freescale Semiconductor, Inc.
++ * Copyright 2011 Linaro Ltd.
++ *
++ * The code contained herein is licensed under the GNU General Public
++ * License. You may obtain a copy of the GNU General Public License
++ * Version 2 or later at the following locations:
++ *
++ * http://www.opensource.org/licenses/gpl-license.html
++ * http://www.gnu.org/copyleft/gpl.html
++ */
++
++/dts-v1/;
++#include "imx6dl.dtsi"
++#include "imx6qdl-sabrelite.dtsi"
++
++/ {
++	model = "Freescale i.MX6 DualLite SABRE Lite Board";
++	compatible = "fsl,imx6dl-sabrelite", "fsl,imx6dl";
++};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx6dl-sabresd.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-sabresd.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx6dl-sabresd.dts	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-sabresd.dts	2014-08-20 19:31:39.896842254 +0200
+@@ -15,3 +15,20 @@
+ 	model = "Freescale i.MX6 DualLite SABRE Smart Device Board";
+ 	compatible = "fsl,imx6dl-sabresd", "fsl,imx6dl";
+ };
++
++&ldb {
++	ipu_id = <0>;
++	sec_ipu_id = <0>;
++};
++
++&pxp {
++	status = "okay";
++};
++
++&mxcfb1 {
++	status = "okay";
++};
++
++&mxcfb2 {
++	status = "okay";
++};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx6dl-sabresd-hdcp.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-sabresd-hdcp.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx6dl-sabresd-hdcp.dts	1970-01-01 01:00:00.000000000 +0100
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx6dl-sabresd-hdcp.dts	2014-08-20 19:31:39.896842254 +0200
+@@ -0,0 +1,19 @@
++/*
++ * Copyright (C) 2013 Freescale Semiconductor, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include "imx6dl-sabresd.dts"
++
++&hdmi_video {
++	pinctrl-names = "default";
++	pinctrl-0 = <&pinctrl_hdmi_hdcp>;
++	fsl,hdcp;
++};
++
++&i2c2 {
++	status = "disable";
++};
+diff -Nur linux-3.14.15/arch/arm/boot/dts/imx6q-arm2.dts linux-linaro-stable-mx6/arch/arm/boot/dts/imx6q-arm2.dts
+--- linux-3.14.15/arch/arm/boot/dts/imx6q-arm2.dts	2014-07-31 23:51:43.000000000 +0200
++++ linux-linaro-stable-mx6/arch/arm/boot/dts/imx6q-arm2.dts	2014-08-20 19:31:39.900842271 +0200
+@@ -23,14 +23,27 @@
+ 
+ 	regulators {
+ 		compatible = "simple-bus";
++		#address-cells = <1>;
++		#size-cells = <0>;
+ 
+-		reg_3p3v: 3p3v {
++		reg_3p3v: regulator@0 {
+ 			compatible = "regulator-fixed";
++			reg = <0>;
+ 			regulator-name = "3P3V";
+ 			regulator-min-microvolt = <3300000>;
+ 			regulator-max-microvolt = <3300000>;
+ 			regulator-always-on;
+ 		};
++
++		reg_usb_otg_vbus: regulator@1 {
++			compatible = "regulator-fixed";
++			reg = <1>;
++			regulator-name = "usb_otg_vbus";
++			regulator-min-microvolt = <5000000>;
++			regulator-max-microvolt = <5000000>;
++			gpio = <&gpio3 22 0>;
++			enable-active-high;
++		};
+ 	};
+ 
+ 	leds {
+@@ -46,7 +59,7 @@
+ 
+ &gpmi {
+ 	pinctrl-names = "default";
+-	pinctrl-0 = <&pinctrl_gpmi_nand_1>;
++	pinctrl-0 = <&pinctrl_gpmi_nand>;
+ 	status = "disabled"; /* gpmi nand conflicts with SD */
+ };
+ 
+@@ -54,28 +67,131 @@
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&pinctrl_hog>;
+ 
+-	hog {
++	imx6q-arm2 {
+ 		pinctrl_hog: hoggrp {
+ 			fsl,pins = <
+ 				MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000
+ 			>;
+ 		};
+-	};
+ 
+-	arm2 {
+-		pinctrl_usdhc3_arm2: usdhc3grp-arm2 {
++		pinctrl_enet: enetgrp {
++			fsl,pins = <
++				MX6QDL_PAD_KEY_COL1__ENET_MDIO		0x1b0b0
++				MX6QDL_PAD_KEY_COL2__ENET_MDC		0x1b0b0
++				MX6QDL_PAD_RGMII_TXC__RGMII_TXC		0x1b0b0
++				MX6QDL_PAD_RGMII_TD0__RGMII_TD0		0x1b0b0
++				MX6QDL_PAD_RGMII_TD1__RGMII_TD1		0x1b0b0
++				MX6QDL_PAD_RGMII_TD2__RGMII_TD2		0x1b0b0
++				MX6QDL_PAD_RGMII_TD3__RGMII_TD3		0x1b0b0
++				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b0b0
++				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0
++				MX6QDL_PAD_RGMII_RXC__RGMII_RXC		0x1b0b0
++				MX6QDL_PAD_RGMII_RD0__RGMII_RD0		0x1b0b0
++				MX6QDL_PAD_RGMII_RD1__RGMII_RD1		0x1b0b0
++				MX6QDL_PAD_RGMII_RD2__RGMII_RD2		0x1b0b0
++				MX6QDL_PAD_RGMII_RD3__RGMII_RD3		0x1b0b0
++				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
++				MX6QDL_PAD_GPIO_6__ENET_IRQ		0x000b1
++			>;
++		};
++
++		pinctrl_gpmi_nand: gpminandgrp {
++			fsl,pins = <
++				MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
++				MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
++				MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
++				MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
++				MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
++				MX6QDL_PAD_NANDF_CS1__NAND_CE1_B	0xb0b1
++				MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
++				MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
++				MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
++				MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
++				MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
++				MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
++				MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
++				MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
++				MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
++				MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
++				MX6QDL_PAD_SD4_DAT0__NAND_DQS		0x00b1
++			>;
++		};
++
++		pinctrl_uart2: uart2grp {
++			fsl,pins = <
++				MX6QDL_PAD_EIM_D26__UART2_RX_DATA	0x1b0b1
++				MX6QDL_PAD_EIM_D27__UART2_TX_DATA	0x1b0b1
++				MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B	0x1b0b1
++				MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B	0x1b0b1
++			>;
++		};
++
++		pinctrl_uart4: uart4grp {
++			fsl,pins = <
++				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA	0x1b0b1
++				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA	0x1b0b1
++			>;
++		};
++
++		pinctrl_usbotg: usbotggrp {
++			fsl,pins = <
++				MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
++			>;