update to latest linux kernels, remove old ones

author: Waldemar Brodkorb <mail@waldemar-brodkorb.de> 2012-07-24 14:22:08 +0200
committer: Waldemar Brodkorb <mail@waldemar-brodkorb.de> 2012-07-24 14:22:08 +0200
commit: 4730871e5df6c0913f746cbadf02d1ec5a599846 (patch)
tree: 08743a1f29abe8ea4ee1eb911f62d2dfdb9d43d8
parent: ab5307635819e3917e87d7c1a7e07dcf610a5c50 (diff)
118 files changed, 911 insertions, 22025 deletions
diff --git a/Config.in b/Config.in
index 99cba0e92..489e86215 100644
--- a/Config.in
+++ b/Config.in
@@ -95,7 +95,7 @@ prompt "Kernel Version"
 depends on ADK_TOOLCHAIN_ONLY
 
 config ADK_KERNEL_VERSION_TOOLCHAIN
-	prompt "3.4.4"
+	prompt "3.4.6"
 	boolean
 	depends on ADK_TOOLCHAIN_ONLY
 
@@ -107,40 +107,19 @@ depends on !ADK_TOOLCHAIN_ONLY && !ADK_CHOOSE_TARGET_ARCH && !ADK_CHOOSE_TARGET_
 choice
 prompt "Kernel Version"
 
-config ADK_KERNEL_VERSION_3_4_4
-	prompt "3.4.4"
+config ADK_KERNEL_VERSION_3_4_6
+	prompt "3.4.6"
 	boolean
 
-config ADK_KERNEL_VERSION_3_3_8
-	prompt "3.3.8"
+config ADK_KERNEL_VERSION_3_5
+	prompt "3.5"
 	boolean
-
-config ADK_KERNEL_VERSION_3_2_20
-	prompt "3.2.20"
-	boolean
-
-config ADK_KERNEL_VERSION_3_1_10
-	prompt "3.1.10"
-	boolean
-
-config ADK_KERNEL_VERSION_3_0_34
-	prompt "3.0.34"
-	boolean
-
-config ADK_KERNEL_VERSION_2_6_39_4
-	prompt "2.6.39.4"
-	boolean
-
 endchoice
 
 config ADK_KERNEL_VERSION
 	string
-	default "3.4.4" if ADK_KERNEL_VERSION_3_4_4
-	default "3.3.8" if ADK_KERNEL_VERSION_3_3_8
-	default "3.2.20" if ADK_KERNEL_VERSION_3_2_20
-	default "3.1.10" if ADK_KERNEL_VERSION_3_1_10
-	default "3.0.34" if ADK_KERNEL_VERSION_3_0_34
-	default "2.6.39.4" if ADK_KERNEL_VERSION_2_6_39_4
+	default "3.4.6" if ADK_KERNEL_VERSION_3_4_6
+	default "3.5" if ADK_KERNEL_VERSION_3_5
 	help
 
 choice
diff --git a/mk/kernel-ver.mk b/mk/kernel-ver.mk
index 5cec70c7a..45d4fe65d 100644
--- a/mk/kernel-ver.mk
+++ b/mk/kernel-ver.mk
@@ -1,42 +1,18 @@
 ifeq ($(ADK_KERNEL_VERSION_TOOLCHAIN),y)
-KERNEL_VERSION:=	3.4.4
+KERNEL_VERSION:=	3.4.6
 KERNEL_MOD_VERSION:=	$(KERNEL_VERSION)
 KERNEL_RELEASE:=	1
-KERNEL_MD5SUM:=		6b8420c24e6f25c56824ce085d194687
+KERNEL_MD5SUM:=		e81d235d91289e612f48718b459b9039
 endif
-ifeq ($(ADK_KERNEL_VERSION_2_6_39_4),y)
-KERNEL_VERSION:=	2.6.39.4
-KERNEL_MOD_VERSION:=	$(KERNEL_VERSION)
-KERNEL_RELEASE:=	1
-KERNEL_MD5SUM:=		a17c748c2070168f1e784e9605ca043d
-endif
-ifeq ($(ADK_KERNEL_VERSION_3_0_34),y)
-KERNEL_VERSION:=	3.0.34
-KERNEL_MOD_VERSION:=	$(KERNEL_VERSION)
-KERNEL_RELEASE:=	1
-KERNEL_MD5SUM:=		3036f69e292d3ce0f7b765a278b12e64
-endif
-ifeq ($(ADK_KERNEL_VERSION_3_1_10),y)
-KERNEL_VERSION:=	3.1.10
-KERNEL_MOD_VERSION:=	$(KERNEL_VERSION)
-KERNEL_RELEASE:=	1
-KERNEL_MD5SUM:=		3649bdaa50ffd9114cc16486ec54d83a
-endif
-ifeq ($(ADK_KERNEL_VERSION_3_2_20),y)
-KERNEL_VERSION:=	3.2.20
-KERNEL_MOD_VERSION:=	$(KERNEL_VERSION)
-KERNEL_RELEASE:=	1
-KERNEL_MD5SUM:=		bd0063a747c3ea0ecdcc85a512d9760a
-endif
-ifeq ($(ADK_KERNEL_VERSION_3_3_8),y)
-KERNEL_VERSION:=	3.3.8
-KERNEL_MOD_VERSION:=	$(KERNEL_VERSION)
+ifeq ($(ADK_KERNEL_VERSION_3_5),y)
+KERNEL_VERSION:=	3.5
+KERNEL_MOD_VERSION:=	3.5.0
 KERNEL_RELEASE:=	1
 KERNEL_MD5SUM:=		21068f0fd262b9b3670947f7892e1d6b
 endif
-ifeq ($(ADK_KERNEL_VERSION_3_4_4),y)
-KERNEL_VERSION:=	3.4.4
+ifeq ($(ADK_KERNEL_VERSION_3_4_6),y)
+KERNEL_VERSION:=	3.4.6
 KERNEL_MOD_VERSION:=	$(KERNEL_VERSION)
 KERNEL_RELEASE:=	1
-KERNEL_MD5SUM:=		6b8420c24e6f25c56824ce085d194687
+KERNEL_MD5SUM:=		e81d235d91289e612f48718b459b9039
 endif
diff --git a/mk/modules.mk b/mk/modules.mk
index 87266124f..45cd4fe19 100644
--- a/mk/modules.mk
+++ b/mk/modules.mk
@@ -35,32 +35,32 @@ $(eval $(call KMOD_template,SATA_AHCI,sata-ahci,\
 # 
 
 $(eval $(call KMOD_template,NE2K_PCI,ne2k-pci,\
-	$(MODULES_DIR)/kernel/drivers/net/8390 \
-	$(MODULES_DIR)/kernel/drivers/net/ne2k-pci \
+	$(MODULES_DIR)/kernel/drivers/net/ethernet/8390/8390 \
+	$(MODULES_DIR)/kernel/drivers/net/ethernet/8390/ne2k-pci \
 ,20))
 
 $(eval $(call KMOD_template,8139CP,8139cp,\
-	$(MODULES_DIR)/kernel/drivers/net/8139cp \
+	$(MODULES_DIR)/kernel/drivers/net/ethernet/realtek/8139cp \
 ,20))
 
 $(eval $(call KMOD_template,8139TOO,8139too,\
-	$(MODULES_DIR)/kernel/drivers/net/8139too \
+	$(MODULES_DIR)/kernel/drivers/net/ethernet/realtek/8139too \
 ,20))
 
 $(eval $(call KMOD_template,E100,e100,\
-	$(MODULES_DIR)/kernel/drivers/net/e100 \
+	$(MODULES_DIR)/kernel/drivers/net/ethernet/intel/e100 \
 ,20))
 
 $(eval $(call KMOD_template,E1000,e1000,\
-	$(MODULES_DIR)/kernel/drivers/net/e1000/e1000 \
+	$(MODULES_DIR)/kernel/drivers/net/ethernet/intel/e1000/e1000 \
 ,20))
 
 $(eval $(call KMOD_template,SKY2,sky2,\
-	$(MODULES_DIR)/kernel/drivers/net/sky2 \
+	$(MODULES_DIR)/kernel/drivers/net/ethernet/marvell/sky2 \
 ,20))
 
 $(eval $(call KMOD_template,R8169,r8169,\
-	$(MODULES_DIR)/kernel/drivers/net/r8169 \
+	$(MODULES_DIR)/kernel/drivers/net/ethernet/realtek/r8169 \
 ,20))
 
 # 
@@ -427,6 +427,10 @@ $(eval $(call KMOD_template,NETFILTER_XT_TARGET_NOTRACK,netfilter-xt-target-notr
 	$(MODULES_DIR)/kernel/net/netfilter/xt_NOTRACK \
 ,50))
 
+$(eval $(call KMOD_template,NETFILTER_XT_TARGET_LOG,netfilter-xt-target-log,\
+	$(MODULES_DIR)/kernel/net/netfilter/xt_LOG \
+,60))
+
 #
 # IP: Netfilter
 #
@@ -553,9 +557,6 @@ $(eval $(call KMOD_template,IP_NF_TARGET_REJECT,ip-nf-target-reject,\
 	$(MODULES_DIR)/kernel/net/ipv4/netfilter/ipt_REJECT \
 ,60))
 
-$(eval $(call KMOD_template,IP_NF_TARGET_LOG,ip-nf-target-log,\
-	$(MODULES_DIR)/kernel/net/ipv4/netfilter/ipt_LOG \
-,60))
 
 $(eval $(call KMOD_template,IP_NF_TARGET_ULOG,ip-nf-target-ulog,\
 	$(MODULES_DIR)/kernel/net/ipv4/netfilter/ipt_ULOG \
@@ -638,10 +639,6 @@ $(eval $(call KMOD_template,IP6_NF_MATCH_RT,ip6-nf-match-rt,\
 	$(MODULES_DIR)/kernel/net/ipv6/netfilter/ip6t_rt \
 ,55))
 
-$(eval $(call KMOD_template,IP6_NF_TARGET_LOG,ip6-nf-target-log,\
-	$(MODULES_DIR)/kernel/net/ipv6/netfilter/ip6t_LOG \
-,55))
-
 #
 # IPv6: Filtering
 #
@@ -963,7 +960,7 @@ $(eval $(call KMOD_template,CRYPTO_ANUBIS,crypto-anubis,\
 ,11))
 
 $(eval $(call KMOD_template,CRYPTO_CAMELLIA,crypto-camellia,\
-    $(MODULES_DIR)/kernel/crypto/camellia \
+    $(MODULES_DIR)/kernel/crypto/camellia_generic \
 ,11))
 
 $(eval $(call KMOD_template,CRYPTO_FCRYPT,crypto-fcrypt,\
@@ -1178,9 +1175,6 @@ endif
 $(eval $(call KMOD_template,VIDEO_DEV,video-dev,\
 	$(foreach mod, $(V4L_COMPAT),$(MODULES_DIR)/kernel/$(mod)) \
 	$(MODULES_DIR)/kernel/drivers/media/video/videodev \
-	$(MODULES_DIR)/kernel/drivers/media/video/videobuf2-core \
-	$(MODULES_DIR)/kernel/drivers/media/video/videobuf2-memops \
-	$(MODULES_DIR)/kernel/drivers/media/video/videobuf2-vmalloc \
 ,65))
 
 $(eval $(call KMOD_template,USB_VIDEO_CLASS,usb-video-class,\
diff --git a/target/linux/config/Config.in.ipvs b/target/linux/config/Config.in.ipvs
index 1a5fbd063..b7ed817b6 100644
--- a/target/linux/config/Config.in.ipvs
+++ b/target/linux/config/Config.in.ipvs
@@ -4,6 +4,7 @@ config ADK_KPACKAGE_KMOD_IP_VS
 	prompt "kmod-ip-vs............................ IPVS support"
 	tristate
 	select ADK_KERNEL_NETFILTER
+	select ADK_KPACKAGE_KMOD_NF_CONNTRACK
 	default n
 
 config ADK_KERNEL_IP_VS_DEBUG
diff --git a/target/linux/config/Config.in.netfilter.core b/target/linux/config/Config.in.netfilter.core
index 964b71c37..21e4c0da6 100644
--- a/target/linux/config/Config.in.netfilter.core
+++ b/target/linux/config/Config.in.netfilter.core
@@ -1,3 +1,9 @@
+config ADK_KPACKAGE_KMOD_NETFILTER_NETLINK_LOG
+	tristate 'Netfilter LOG over NFNETLINK interface'
+	help
+	  If this option is enabled, the kernel will include support                                                                                        
+	  for logging packets via NFNETLINK.
+
 config ADK_KPACKAGE_KMOD_NF_CONNTRACK
 	tristate 'Netfilter connection tracking support'
 	select ADK_KERNEL_NETFILTER_XTABLES
@@ -55,6 +61,13 @@ config ADK_KPACKAGE_KMOD_NETFILTER_XT_TARGET_NFQUEUE
 	  As opposed to QUEUE, it supports 65535 different queues,
 	  not just one.
 
+config ADK_KPACKAGE_KMOD_NETFILTER_XT_TARGET_LOG
+	tristate 'LOG target support'
+	depends on ADK_KPACKAGE_KMOD_IP_NF_FILTER
+	help
+	  This option adds a `LOG' target, which allows you to create rules in
+	  any iptables table which records the packet header to the syslog.
+
 config ADK_KPACKAGE_KMOD_NETFILTER_XT_TARGET_TCPMSS
 	tristate 'TCPMSS target'
 	select ADK_KERNEL_NETFILTER_XTABLES
diff --git a/target/linux/config/Config.in.netfilter.ip4 b/target/linux/config/Config.in.netfilter.ip4
index 1a1e91daf..ff3c1515d 100644
--- a/target/linux/config/Config.in.netfilter.ip4
+++ b/target/linux/config/Config.in.netfilter.ip4
@@ -60,13 +60,6 @@ config ADK_KPACKAGE_KMOD_IP_NF_TARGET_REJECT
 	  error should be issued in response to an incoming packet, rather
 	  than silently being dropped.
 
-config ADK_KPACKAGE_KMOD_IP_NF_TARGET_LOG
-	tristate 'LOG target support'
-	depends on ADK_KPACKAGE_KMOD_IP_NF_FILTER
-	help
-	  This option adds a `LOG' target, which allows you to create rules in
-	  any iptables table which records the packet header to the syslog.
-
 config ADK_KPACKAGE_KMOD_IP_NF_TARGET_ULOG
 	tristate 'ULOG target support (ipv4 only)'
 	depends on ADK_KPACKAGE_KMOD_IP_NF_FILTER
diff --git a/target/linux/config/Config.in.netfilter.ip6 b/target/linux/config/Config.in.netfilter.ip6
index cb9700cbd..2138354eb 100644
--- a/target/linux/config/Config.in.netfilter.ip6
+++ b/target/linux/config/Config.in.netfilter.ip6
@@ -84,13 +84,6 @@ config ADK_KPACKAGE_KMOD_IP6_NF_MATCH_RT
 	  To compile it as a module, choose M here.  If unsure, say N.
 
 # The targets
-config ADK_KPACKAGE_KMOD_IP6_NF_TARGET_LOG
-	tristate "LOG target support"
-	help
-	  This option adds a `LOG' target, which allows you to create rules in
-	  any iptables table which records the packet header to the syslog.
-
-	  To compile it as a module, choose M here.  If unsure, say N.
 
 config ADK_KPACKAGE_KMOD_IP6_NF_FILTER
 	tristate "Packet filtering"
diff --git a/target/linux/patches/3.0.34/brcm.patch b/target/linux/patches/3.0.34/brcm.patch
deleted file mode 100644
index 548d26068..000000000
--- a/target/linux/patches/3.0.34/brcm.patch
+++ /dev/null
@@ -1,465 +0,0 @@
-diff -Nur linux-2.6.39.4.orig/arch/mips/Kconfig linux-2.6.39.4/arch/mips/Kconfig
---- linux-2.6.39.4.orig/arch/mips/Kconfig	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/arch/mips/Kconfig	2012-06-02 20:35:49.000000000 +0200
-@@ -103,6 +103,12 @@
- 	select GENERIC_GPIO
- 	select SYS_HAS_EARLY_PRINTK
- 	select CFE
-+	select SYS_SUPPORTS_ZBOOT_UART16550
-+	select HAVE_KERNEL_GZIP
-+        select HAVE_KERNEL_BZIP2
-+        select HAVE_KERNEL_LZMA
-+        select HAVE_KERNEL_XZ
-+        select HAVE_KERNEL_LZO
- 	help
- 	 Support for BCM47XX based boards
- 
-diff -Nur linux-2.6.39.4.orig/arch/mips/Makefile linux-2.6.39.4/arch/mips/Makefile
---- linux-2.6.39.4.orig/arch/mips/Makefile	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/arch/mips/Makefile	2012-06-02 20:35:49.000000000 +0200
-@@ -76,6 +76,7 @@
- all-$(CONFIG_BOOT_ELF32)	:= $(vmlinux-32)
- all-$(CONFIG_BOOT_ELF64)	:= $(vmlinux-64)
- all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlinuz
-+all-$(CONFIG_BCM47XX)		+= vmlinuz.elf
- 
- #
- # GCC uses -G 0 -mabicalls -fpic as default.  We don't want PIC in the kernel
-@@ -276,7 +277,7 @@
- 	$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) arch/mips/boot/$@
- 
- # boot/compressed
--vmlinuz vmlinuz.bin vmlinuz.ecoff vmlinuz.srec: $(vmlinux-32) FORCE
-+vmlinuz vmlinuz.bin vmlinuz.ecoff vmlinuz.srec vmlinuz.elf: $(vmlinux-32) FORCE
- 	$(Q)$(MAKE) $(build)=arch/mips/boot/compressed \
- 	   VMLINUX_LOAD_ADDRESS=$(load-y) 32bit-bfd=$(32bit-bfd) $@
- 
-@@ -313,6 +314,7 @@
- 	echo '  vmlinuz.ecoff        - ECOFF zboot image'
- 	echo '  vmlinuz.bin          - Raw binary zboot image'
- 	echo '  vmlinuz.srec         - SREC zboot image'
-+	echo '  vmlinuz.elf          - ELF self-relocating zboot image'
- 	echo
- 	echo '  These will be default as appropriate for a configured platform.'
- endef
-diff -Nur linux-2.6.39.4.orig/arch/mips/bcm47xx/Makefile linux-2.6.39.4/arch/mips/bcm47xx/Makefile
---- linux-2.6.39.4.orig/arch/mips/bcm47xx/Makefile	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/arch/mips/bcm47xx/Makefile	2012-06-02 20:35:49.000000000 +0200
-@@ -3,4 +3,4 @@
- # under Linux.
- #
- 
--obj-y := gpio.o irq.o nvram.o prom.o serial.o setup.o time.o wgt634u.o
-+obj-y := gpio.o irq.o nvram.o prom.o serial.o setup.o time.o platform.o
-diff -Nur linux-2.6.39.4.orig/arch/mips/bcm47xx/platform.c linux-2.6.39.4/arch/mips/bcm47xx/platform.c
---- linux-2.6.39.4.orig/arch/mips/bcm47xx/platform.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39.4/arch/mips/bcm47xx/platform.c	2012-06-02 20:35:49.000000000 +0200
-@@ -0,0 +1,146 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2010, 2011 Waldemar Brodkorb <wbx@openadk.org>
-+ * Copyright © 2007, 2011 Thorsten Glaser <tg@freewrt.org>
-+ */
-+
-+#include <linux/platform_device.h>
-+#include <linux/module.h>
-+#include <linux/mtd/physmap.h>
-+#include <linux/ssb/ssb.h>
-+
-+#include <asm/mach-bcm47xx/bcm47xx.h>
-+#include <asm/mach-bcm47xx/nvram.h>
-+
-+#define CFGFS_FLASH_SIZE (128 * 1024)
-+
-+static struct mtd_partition bcm47xx_partitions[] = {
-+#define SLOT_CFE 0
-+	{
-+		.name       = "cfe",
-+		.offset     = 0,
-+		.size       = BCM47XX_OVERRIDE_CFESIZE,
-+		.mask_flags = MTD_WRITEABLE		/* force read-only */
-+	},
-+#define SLOT_LINUX 1
-+	{
-+		.name   = "linux",
-+		.offset = 0,
-+		.size   = 0,
-+	},
-+#define SLOT_ROOTFS 2
-+	{
-+		.name   = "rootfs",
-+		.offset = 0,
-+		.size   = 0,
-+	},
-+#define SLOT_CFGFS 3
-+	{
-+		.name   = "cfgfs",
-+		.offset = 0,
-+		.size   = 0,
-+	},
-+#define SLOT_NVRAM 4
-+	{
-+		.name   = "nvram",
-+		.offset = 0,
-+		.size   = 0,
-+	},
-+};
-+
-+static struct physmap_flash_data bcm47xx_flash_data = {
-+	.parts    = bcm47xx_partitions,
-+	.nr_parts = ARRAY_SIZE(bcm47xx_partitions)
-+};
-+
-+static struct resource bcm47xx_flash_resource = {
-+	.flags = IORESOURCE_MEM,
-+};
-+
-+static struct platform_device bcm47xx_flash = {
-+	.name          = "physmap-flash",
-+	.id            = 0,
-+	.dev           = { .platform_data = &bcm47xx_flash_data, },
-+	.resource      = &bcm47xx_flash_resource,
-+	.num_resources = 1,
-+};
-+
-+static struct platform_device *bcm47xx_devices[] __initdata = {
-+	&bcm47xx_flash,
-+};
-+
-+struct bcm47xx_trx_header {
-+#define BCM47XX_TRX_MAGIC 0x30524448
-+	u32 magic;
-+	u32 len;
-+	u32 crc32;
-+	u32 flag_version;
-+	u32 offsets[3];
-+};
-+
-+#define UPTODOWN(slot, psize) do {			\
-+	posn -= psize; left -= psize;			\
-+	bcm47xx_partitions[slot].offset = posn;		\
-+	bcm47xx_partitions[slot].size = psize;		\
-+} while (/* CONSTCOND */ 0)
-+
-+static int __init bcm47xx_register_devices(void)
-+{
-+	u32 flash_size;
-+	size_t left, posn;
-+	struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore;
-+	struct bcm47xx_trx_header *trx_hdr;
-+
-+	trx_hdr = (void *)KSEG1ADDR(mcore->flash_window + BCM47XX_OVERRIDE_CFESIZE);
-+
-+	/* devices might have 2, 4 or 8 MB flash size */
-+#ifdef BCM47XX_OVERRIDE_FLASHSIZE
-+	flash_size = BCM47XX_OVERRIDE_FLASHSIZE;
-+	mcore->flash_window_size = flash_size;
-+#define BCM47XX_OVERRODE_FLASHSIZE " (overridden)"
-+#else
-+	flash_size = mcore->flash_window_size;
-+#define BCM47XX_OVERRODE_FLASHSIZE ""
-+#endif
-+	printk(KERN_INFO "FLASH SIZE%s: %x\n", BCM47XX_OVERRODE_FLASHSIZE,
-+		flash_size);
-+
-+	left = flash_size - BCM47XX_OVERRIDE_CFESIZE;
-+	posn = flash_size;
-+	UPTODOWN(SLOT_NVRAM, BCM47XX_OVERRIDE_NVRAMSIZE);
-+	UPTODOWN(SLOT_CFGFS, CFGFS_FLASH_SIZE);
-+	bcm47xx_partitions[SLOT_LINUX].offset = BCM47XX_OVERRIDE_CFESIZE;
-+	bcm47xx_partitions[SLOT_LINUX].size = left;
-+
-+	if (trx_hdr->magic == BCM47XX_TRX_MAGIC) {
-+		bcm47xx_partitions[SLOT_ROOTFS].offset =
-+		    bcm47xx_partitions[SLOT_LINUX].offset +
-+		    trx_hdr->offsets[1];
-+		bcm47xx_partitions[SLOT_ROOTFS].size =
-+		    bcm47xx_partitions[SLOT_LINUX].size -
-+		    trx_hdr->offsets[1];
-+	} else
-+		printk("bcm47xx/platform: no TRX header found\n");
-+
-+	printk(KERN_INFO "=== Flash map dump ===\n");
-+	for (posn = 0; posn < bcm47xx_flash_data.nr_parts; ++posn)
-+		printk(KERN_INFO " #%u %08X @%08X '%s'\n",
-+		    (unsigned int)posn,
-+		    (unsigned int)bcm47xx_partitions[posn].size,
-+		    (unsigned int)bcm47xx_partitions[posn].offset,
-+		    bcm47xx_partitions[posn].name);
-+	printk(KERN_INFO "=== Hope this works, have a nice day\n");
-+
-+	bcm47xx_flash_data.width = mcore->flash_buswidth;
-+	bcm47xx_flash_resource.start = mcore->flash_window;
-+	bcm47xx_flash_resource.end = mcore->flash_window
-+				   + mcore->flash_window_size
-+				   - 1;
-+	return platform_add_devices(bcm47xx_devices,
-+			    ARRAY_SIZE(bcm47xx_devices));
-+}
-+
-+device_initcall(bcm47xx_register_devices);
-diff -Nur linux-2.6.39.4.orig/arch/mips/boot/compressed/Makefile linux-2.6.39.4/arch/mips/boot/compressed/Makefile
---- linux-2.6.39.4.orig/arch/mips/boot/compressed/Makefile	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/arch/mips/boot/compressed/Makefile	2012-06-02 20:37:43.000000000 +0200
-@@ -44,6 +44,7 @@
- tool_$(CONFIG_KERNEL_BZIP2)   = bzip2
- tool_$(CONFIG_KERNEL_LZMA)    = lzma
- tool_$(CONFIG_KERNEL_LZO)     = lzo
-+tool_$(CONFIG_KERNEL_XZ)      = xzkern
- 
- targets += vmlinux.bin.z
- $(obj)/vmlinux.bin.z: $(obj)/vmlinux.bin FORCE
-@@ -58,8 +59,13 @@
- # Calculate the load address of the compressed kernel image
- hostprogs-y := calc_vmlinuz_load_addr
- 
-+ifdef CONFIG_BCM47XX
-+# XXX just after CFE, just pray the address is static
-+VMLINUZ_LOAD_ADDRESS = 0xffffffff80900000
-+else
- VMLINUZ_LOAD_ADDRESS = $(shell $(obj)/calc_vmlinuz_load_addr \
- 		$(obj)/vmlinux.bin $(VMLINUX_LOAD_ADDRESS))
-+endif
- 
- vmlinuzobjs-y += $(obj)/piggy.o
- 
-@@ -105,4 +111,12 @@
- vmlinuz.srec: vmlinuz
- 	$(call cmd,objcopy)
- 
--clean-files := $(objtree)/vmlinuz $(objtree)/vmlinuz.{32,ecoff,bin,srec}
-+AFLAGS_selfreloc.o := -DVMLINUZ_LOAD_ADDRESS=$(VMLINUZ_LOAD_ADDRESS)
-+CPPFLAGS_selfreloc.lds := $(KBUILD_CFLAGS)
-+
-+arch/mips/boot/compressed/selfreloc.o: arch/mips/boot/compressed/selfreloc.S vmlinuz.bin FORCE
-+
-+vmlinuz.elf: arch/mips/boot/compressed/selfreloc.o arch/mips/boot/compressed/selfreloc.lds FORCE
-+	$(LD) $(LDFLAGS) -T arch/mips/boot/compressed/selfreloc.lds arch/mips/boot/compressed/selfreloc.o -o $@
-+
-+clean-files := $(objtree)/vmlinuz $(objtree)/vmlinuz.{32,ecoff,bin,srec,elf} $(objtree)/arch/mips/boot/compressed/selfreloc.{o,lds}
-diff -Nur linux-2.6.39.4.orig/arch/mips/boot/compressed/decompress.c linux-2.6.39.4/arch/mips/boot/compressed/decompress.c
---- linux-2.6.39.4.orig/arch/mips/boot/compressed/decompress.c	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/arch/mips/boot/compressed/decompress.c	2012-06-02 20:39:09.000000000 +0200
-@@ -43,7 +43,7 @@
- /* activate the code for pre-boot environment */
- #define STATIC static
- 
--#ifdef CONFIG_KERNEL_GZIP
-+#if defined(CONFIG_KERNEL_GZIP) || defined(CONFIG_KERNEL_XZ)
- void *memcpy(void *dest, const void *src, size_t n)
- {
- 	int i;
-@@ -54,6 +54,8 @@
- 		d[i] = s[i];
- 	return dest;
- }
-+#endif
-+#ifdef CONFIG_KERNEL_GZIP
- #include "../../../../lib/decompress_inflate.c"
- #endif
- 
-@@ -78,6 +80,10 @@
- #include "../../../../lib/decompress_unlzo.c"
- #endif
- 
-+#ifdef CONFIG_KERNEL_XZ
-+#include "../../../../lib/decompress_unxz.c"
-+#endif
-+
- void decompress_kernel(unsigned long boot_heap_start)
- {
- 	unsigned long zimage_start, zimage_size;
-diff -Nur linux-2.6.39.4.orig/arch/mips/boot/compressed/selfreloc.S linux-2.6.39.4/arch/mips/boot/compressed/selfreloc.S
---- linux-2.6.39.4.orig/arch/mips/boot/compressed/selfreloc.S	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39.4/arch/mips/boot/compressed/selfreloc.S	2012-06-02 20:35:49.000000000 +0200
-@@ -0,0 +1,54 @@
-+/*-
-+ * written 2011 by Thorsten Glaser <tg@freewrt.org> based on
-+ * arch/mips/boot/compressed/head.S
-+ */
-+
-+#include <asm/asm.h>
-+#include <asm/regdef.h>
-+
-+	.set noreorder
-+	.cprestore
-+
-+	.text
-+	LEAF(selfreloc_start)
-+selfreloc_start:
-+	/* Save boot rom start args */
-+	move	s0, a0
-+	move	s1, a1
-+	move	s2, a2
-+	move	s3, a3
-+
-+	/* Copy code to the correct place */
-+	PTR_LI	a0, VMLINUZ_LOAD_ADDRESS
-+	PTR_LA	a1, imgbeg
-+	PTR_LA	a2, imgend
-+1:	lw	t0, 0(a1)
-+	sw	t0, 0(a0)
-+	add	a1, 4
-+	add	a0, 4
-+	blt	a1, a2, 1b
-+	 nop
-+
-+	/* Restore boot rom start args */
-+	move	a0, s0
-+	move	a1, s1
-+	move	a2, s2
-+	move	a3, s3
-+
-+	/* Jump to the code at its new location */
-+	PTR_LI	k0, VMLINUZ_LOAD_ADDRESS
-+	jr	k0
-+	 nop
-+
-+	/* Just in case we come back… */
-+3:
-+	b	3b
-+	 nop
-+	END(selfreloc_start)
-+
-+	.globl	imgbeg
-+	.p2align 2
-+imgbeg:	.incbin	"vmlinuz.bin"
-+	.globl	imgend
-+	.p2align 2
-+imgend:
-diff -Nur linux-2.6.39.4.orig/arch/mips/boot/compressed/selfreloc.lds.S linux-2.6.39.4/arch/mips/boot/compressed/selfreloc.lds.S
---- linux-2.6.39.4.orig/arch/mips/boot/compressed/selfreloc.lds.S	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39.4/arch/mips/boot/compressed/selfreloc.lds.S	2012-06-02 20:35:49.000000000 +0200
-@@ -0,0 +1,39 @@
-+/*-
-+ * written 2010 by Thorsten Glaser <tg@debian.org> based on
-+ * arch/mips/kernel/vmlinux.lds and arch/mips/boot/compressed/ld.script
-+ */
-+
-+#include <asm/asm-offsets.h>
-+#include <asm/page.h>
-+#include <asm-generic/vmlinux.lds.h>
-+
-+#undef mips
-+#define mips mips
-+OUTPUT_ARCH(mips)
-+ENTRY(selfreloc_start)
-+PHDRS {
-+	text PT_LOAD FLAGS(7);	/* RWX */
-+}
-+SECTIONS
-+{
-+	. = VMLINUX_LOAD_ADDRESS;
-+	.text : {
-+		*(.text)
-+		*(.text.*)
-+		*(.rodata)
-+		*(.rodata.*)
-+		*(.data)
-+		*(.data.*)
-+		*(.bss)
-+		*(.bss.*)
-+	} :text
-+	/DISCARD/ : {
-+		*(.MIPS.options)
-+		*(.options)
-+		*(.pdr)
-+		*(.reginfo)
-+		*(.comment)
-+		*(.note)
-+		*(.gnu.attributes)
-+	}
-+}
-diff -Nur linux-2.6.39.4.orig/arch/mips/boot/compressed/uart-16550.c linux-2.6.39.4/arch/mips/boot/compressed/uart-16550.c
---- linux-2.6.39.4.orig/arch/mips/boot/compressed/uart-16550.c	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/arch/mips/boot/compressed/uart-16550.c	2012-06-02 20:35:49.000000000 +0200
-@@ -18,6 +18,11 @@
- #define PORT(offset) (CKSEG1ADDR(AR7_REGS_UART0) + (4 * offset))
- #endif
- 
-+#ifdef CONFIG_BCM47XX
-+#define UART_BASE 0x18000300
-+#define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset))
-+#endif
-+
- #ifndef PORT
- #error please define the serial port address for your own machine
- #endif
-diff -Nur linux-2.6.39.4.orig/drivers/ssb/driver_mipscore.c linux-2.6.39.4/drivers/ssb/driver_mipscore.c
---- linux-2.6.39.4.orig/drivers/ssb/driver_mipscore.c	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/drivers/ssb/driver_mipscore.c	2012-06-02 20:35:49.000000000 +0200
-@@ -190,10 +190,11 @@
- {
- 	struct ssb_bus *bus = mcore->dev->bus;
- 
-+	printk("Check for vendor with value: %d", bus->chipco.dev->id.vendor);
- 	mcore->flash_buswidth = 2;
- 	if (bus->chipco.dev) {
- 		mcore->flash_window = 0x1c000000;
--		mcore->flash_window_size = 0x02000000;
-+		mcore->flash_window_size = 0x00800000;
- 		if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
- 		               & SSB_CHIPCO_CFG_DS16) == 0)
- 			mcore->flash_buswidth = 1;
-diff -Nur linux-2.6.39.4.orig/init/Kconfig linux-2.6.39.4/init/Kconfig
---- linux-2.6.39.4.orig/init/Kconfig	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/init/Kconfig	2012-06-02 20:36:11.000000000 +0200
-@@ -156,6 +156,7 @@
- config KERNEL_GZIP
- 	bool "Gzip"
- 	depends on HAVE_KERNEL_GZIP
-+	select DECOMPRESS_GZIP
- 	help
- 	  The old and tried gzip compression. It provides a good balance
- 	  between compression ratio and decompression speed.
-@@ -163,6 +164,7 @@
- config KERNEL_BZIP2
- 	bool "Bzip2"
- 	depends on HAVE_KERNEL_BZIP2
-+	select DECOMPRESS_BZIP2
- 	help
- 	  Its compression ratio and speed is intermediate.
- 	  Decompression speed is slowest among the three.  The kernel
-@@ -173,6 +175,7 @@
- config KERNEL_LZMA
- 	bool "LZMA"
- 	depends on HAVE_KERNEL_LZMA
-+	select DECOMPRESS_LZMA
- 	help
- 	  The most recent compression algorithm.
- 	  Its ratio is best, decompression speed is between the other
-@@ -182,6 +185,7 @@
- config KERNEL_XZ
- 	bool "XZ"
- 	depends on HAVE_KERNEL_XZ
-+	select DECOMPRESS_XZ
- 	help
- 	  XZ uses the LZMA2 algorithm and instruction set specific
- 	  BCJ filters which can improve compression ratio of executable
-@@ -197,6 +201,7 @@
- config KERNEL_LZO
- 	bool "LZO"
- 	depends on HAVE_KERNEL_LZO
-+	select DECOMPRESS_LZO
- 	help
- 	  Its compression ratio is the poorest among the 4. The kernel
- 	  size is about 10% bigger than gzip; however its speed
-diff -Nur linux-2.6.39.4.orig/lib/xz/xz_stream.h linux-2.6.39.4/lib/xz/xz_stream.h
---- linux-2.6.39.4.orig/lib/xz/xz_stream.h	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/lib/xz/xz_stream.h	2012-06-02 20:40:18.000000000 +0200
-@@ -40,7 +40,12 @@
-  * compressed size of the file to less than 256 MiB and may also weaken
-  * error detection slightly.
-  */
-+
-+#ifdef __mips__
-+typedef uint32_t vli_type;
-+#else
- typedef uint64_t vli_type;
-+#endif
- 
- #define VLI_MAX ((vli_type)-1 / 2)
- #define VLI_UNKNOWN ((vli_type)-1)
diff --git a/target/linux/patches/3.0.34/fon2100.patch b/target/linux/patches/3.0.34/fon2100.patch
deleted file mode 100644
index 038ff7020..000000000
--- a/target/linux/patches/3.0.34/fon2100.patch
+++ /dev/null
@@ -1,6279 +0,0 @@
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/Kbuild.platforms linux-2.6.39-rc7/arch/mips/Kbuild.platforms
---- linux-2.6.39-rc7.orig/arch/mips/Kbuild.platforms	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/arch/mips/Kbuild.platforms	2011-05-15 21:34:57.000000000 +0200
-@@ -6,6 +6,7 @@
- platforms += bcm47xx
- platforms += bcm63xx
- platforms += cavium-octeon
-+platforms += ar231x
- platforms += cobalt
- platforms += dec
- platforms += emma
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/Kconfig linux-2.6.39-rc7/arch/mips/Kconfig
---- linux-2.6.39-rc7.orig/arch/mips/Kconfig	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/arch/mips/Kconfig	2011-05-16 12:11:11.000000000 +0200
-@@ -121,6 +121,21 @@
- 	help
- 	 Support for BCM63XX based boards
- 
-+config ATHEROS_AR231X
-+	bool "Atheros 231x/531x SoC support"
-+	select CEVT_R4K
-+	select CSRC_R4K
-+	select DMA_NONCOHERENT
-+	select IRQ_CPU
-+	select SYS_HAS_CPU_MIPS32_R1
-+	select SYS_SUPPORTS_BIG_ENDIAN
-+	select SYS_SUPPORTS_32BIT_KERNEL
-+	select GENERIC_GPIO
-+	select SYS_HAS_EARLY_PRINTK
-+	select SYS_SUPPORTS_ZBOOT
-+	help
-+	  Support for AR231x and AR531x based boards
-+
- config MIPS_COBALT
- 	bool "Cobalt Server"
- 	select CEVT_R4K
-@@ -738,6 +753,7 @@
- 
- endchoice
- 
-+source "arch/mips/ar231x/Kconfig"
- source "arch/mips/alchemy/Kconfig"
- source "arch/mips/ath79/Kconfig"
- source "arch/mips/bcm63xx/Kconfig"
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/Kconfig linux-2.6.39-rc7/arch/mips/ar231x/Kconfig
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/Kconfig	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/Kconfig	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,27 @@
-+config ATHEROS_AR5312
-+	bool "Atheros 5312/2312+ support"
-+	depends on ATHEROS_AR231X
-+	default y
-+
-+config ATHEROS_AR2315
-+	bool "Atheros 2315+ support"
-+	depends on ATHEROS_AR231X
-+	select DMA_NONCOHERENT
-+	select CEVT_R4K
-+	select CSRC_R4K
-+	select IRQ_CPU
-+	select SYS_HAS_CPU_MIPS32_R1
-+	select SYS_SUPPORTS_32BIT_KERNEL
-+	select SYS_SUPPORTS_BIG_ENDIAN
-+	select GENERIC_GPIO
-+	default y
-+
-+config ATHEROS_AR2315_PCI
-+	bool "PCI support"
-+	depends on ATHEROS_AR2315
-+	select HW_HAS_PCI
-+	select PCI
-+	select USB_ARCH_HAS_HCD
-+	select USB_ARCH_HAS_OHCI
-+	select USB_ARCH_HAS_EHCI
-+	default n
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/Makefile linux-2.6.39-rc7/arch/mips/ar231x/Makefile
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/Makefile	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/Makefile	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,17 @@
-+#
-+# This file is subject to the terms and conditions of the GNU General Public
-+# License.  See the file "COPYING" in the main directory of this archive
-+# for more details.
-+#
-+# Copyright (C) 2006 FON Technology, SL.
-+# Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+# Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
-+#
-+
-+obj-y += board.o prom.o devices.o
-+
-+obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-+
-+obj-$(CONFIG_ATHEROS_AR5312) += ar5312.o
-+obj-$(CONFIG_ATHEROS_AR2315) += ar2315.o
-+obj-$(CONFIG_ATHEROS_AR2315_PCI) += pci.o
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/Platform linux-2.6.39-rc7/arch/mips/ar231x/Platform
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/Platform	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/Platform	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,6 @@
-+#
-+# Atheros AR5312/AR2312 WiSoC
-+#
-+platform-$(CONFIG_ATHEROS_AR231X)          += ar231x/
-+cflags-$(CONFIG_ATHEROS_AR231X)        += -I$(srctree)/arch/mips/include/asm/mach-ar231x
-+load-$(CONFIG_ATHEROS_AR231X)          += 0xffffffff80041000
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/ar2315.c linux-2.6.39-rc7/arch/mips/ar231x/ar2315.c
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/ar2315.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/ar2315.c	2011-05-15 21:47:07.000000000 +0200
-@@ -0,0 +1,654 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2003 Atheros Communications, Inc.,  All Rights Reserved.
-+ * Copyright (C) 2006 FON Technology, SL.
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
-+ */
-+
-+/*
-+ * Platform devices for Atheros SoCs
-+ */
-+
-+#include <generated/autoconf.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/types.h>
-+#include <linux/string.h>
-+#include <linux/platform_device.h>
-+#include <linux/kernel.h>
-+#include <linux/reboot.h>
-+#include <linux/delay.h>
-+#include <linux/leds.h>
-+#include <asm/bootinfo.h>
-+#include <asm/reboot.h>
-+#include <asm/time.h>
-+#include <asm/irq.h>
-+#include <asm/io.h>
-+#include <asm/gpio.h>
-+
-+#include <ar231x_platform.h>
-+#include <ar2315_regs.h>
-+#include <ar231x.h>
-+#include "devices.h"
-+#include "ar2315.h"
-+
-+static u32 gpiointmask = 0, gpiointval = 0;
-+
-+static inline void ar2315_gpio_irq(void)
-+{
-+	u32 pend;
-+	int bit = -1;
-+
-+	/* only do one gpio interrupt at a time */
-+	pend = (ar231x_read_reg(AR2315_GPIO_DI) ^ gpiointval) & gpiointmask;
-+
-+	if (pend) {
-+		bit = fls(pend) - 1;
-+		pend &= ~(1 << bit);
-+		gpiointval ^= (1 << bit);
-+	}
-+
-+	if (!pend)
-+		ar231x_write_reg(AR2315_ISR, AR2315_ISR_GPIO);
-+
-+	/* Enable interrupt with edge detection */
-+	if ((ar231x_read_reg(AR2315_GPIO_CR) & AR2315_GPIO_CR_M(bit)) != AR2315_GPIO_CR_I(bit))
-+		return;
-+
-+	if (bit >= 0)
-+		do_IRQ(AR531X_GPIO_IRQ_BASE + bit);
-+}
-+
-+#ifdef CONFIG_ATHEROS_AR2315_PCI
-+static inline void pci_abort_irq(void)
-+{
-+	ar231x_write_reg(AR2315_PCI_INT_STATUS, AR2315_PCI_ABORT_INT);
-+}
-+
-+static inline void pci_ack_irq(void)
-+{
-+	ar231x_write_reg(AR2315_PCI_INT_STATUS, AR2315_PCI_EXT_INT);
-+}
-+
-+void ar2315_pci_irq(int irq)
-+{
-+	if (ar231x_read_reg(AR2315_PCI_INT_STATUS) == AR2315_PCI_ABORT_INT)
-+		pci_abort_irq();
-+	else {
-+		do_IRQ(irq);
-+		pci_ack_irq();
-+	}
-+}
-+#endif /* CONFIG_ATHEROS_AR2315_PCI */
-+
-+/*
-+ * Called when an interrupt is received, this function
-+ * determines exactly which interrupt it was, and it
-+ * invokes the appropriate handler.
-+ *
-+ * Implicitly, we also define interrupt priority by
-+ * choosing which to dispatch first.
-+ */
-+static asmlinkage void
-+ar2315_irq_dispatch(void)
-+{
-+	int pending = read_c0_status() & read_c0_cause();
-+
-+	if (pending & CAUSEF_IP3)
-+		do_IRQ(AR2315_IRQ_WLAN0_INTRS);
-+	else if (pending & CAUSEF_IP4)
-+		do_IRQ(AR2315_IRQ_ENET0_INTRS);
-+#ifdef CONFIG_ATHEROS_AR2315_PCI
-+	else if (pending & CAUSEF_IP5)
-+		ar2315_pci_irq(AR2315_IRQ_LCBUS_PCI);
-+#endif
-+	else if (pending & CAUSEF_IP2) {
-+		unsigned int misc_intr = ar231x_read_reg(AR2315_ISR) & ar231x_read_reg(AR2315_IMR);
-+
-+		if (misc_intr & AR2315_ISR_SPI)
-+			do_IRQ(AR531X_MISC_IRQ_SPI);
-+		else if (misc_intr & AR2315_ISR_TIMER)
-+			do_IRQ(AR531X_MISC_IRQ_TIMER);
-+		else if (misc_intr & AR2315_ISR_AHB)
-+			do_IRQ(AR531X_MISC_IRQ_AHB_PROC);
-+		else if (misc_intr & AR2315_ISR_GPIO)
-+			ar2315_gpio_irq();
-+		else if (misc_intr & AR2315_ISR_UART0)
-+			do_IRQ(AR531X_MISC_IRQ_UART0);
-+		else if (misc_intr & AR2315_ISR_WD)
-+			do_IRQ(AR531X_MISC_IRQ_WATCHDOG);
-+		else
-+			do_IRQ(AR531X_MISC_IRQ_NONE);
-+	} else if (pending & CAUSEF_IP7)
-+		do_IRQ(AR531X_IRQ_CPU_CLOCK);
-+}
-+
-+static void ar2315_set_gpiointmask(int gpio, int level)
-+{
-+	u32 reg;
-+
-+	reg = ar231x_read_reg(AR2315_GPIO_INT);
-+	reg &= ~(AR2315_GPIO_INT_M | AR2315_GPIO_INT_LVL_M);
-+	reg |= gpio | AR2315_GPIO_INT_LVL(level);
-+	ar231x_write_reg(AR2315_GPIO_INT, reg);
-+}
-+
-+static void ar2315_gpio_intr_enable(struct irq_data *d)
-+{
-+	unsigned int gpio = d->irq - AR531X_GPIO_IRQ_BASE;
-+
-+	/* Enable interrupt with edge detection */
-+	if ((ar231x_read_reg(AR2315_GPIO_CR) & AR2315_GPIO_CR_M(gpio)) != AR2315_GPIO_CR_I(gpio))
-+		return;
-+
-+	gpiointmask |= (1 << gpio);
-+	ar2315_set_gpiointmask(gpio, 3);
-+}
-+
-+static void ar2315_gpio_intr_disable(struct irq_data *d)
-+{
-+	unsigned int gpio = d->irq - AR531X_GPIO_IRQ_BASE;
-+
-+	/* Disable interrupt */
-+	gpiointmask &= ~(1 << gpio);
-+	ar2315_set_gpiointmask(gpio, 0);
-+}
-+
-+static struct irq_chip ar2315_gpio_intr_controller = {
-+	.name	= "AR2315-GPIO",
-+	.irq_ack      = ar2315_gpio_intr_disable,
-+	.irq_mask_ack = ar2315_gpio_intr_disable,
-+	.irq_mask     = ar2315_gpio_intr_disable,
-+	.irq_unmask   = ar2315_gpio_intr_enable,
-+};
-+
-+static void
-+ar2315_misc_intr_enable(struct irq_data *d)
-+{
-+	unsigned int imr;
-+
-+	imr = ar231x_read_reg(AR2315_IMR);
-+	switch(d->irq) {
-+	case AR531X_MISC_IRQ_SPI:
-+		 imr |= AR2315_ISR_SPI;
-+		 break;
-+	case AR531X_MISC_IRQ_TIMER:
-+	     imr |= AR2315_ISR_TIMER;
-+	     break;
-+	case AR531X_MISC_IRQ_AHB_PROC:
-+	     imr |= AR2315_ISR_AHB;
-+	     break;
-+	case AR531X_MISC_IRQ_GPIO:
-+	     imr |= AR2315_ISR_GPIO;
-+	     break;
-+	case AR531X_MISC_IRQ_UART0:
-+	     imr |= AR2315_ISR_UART0;
-+	     break;
-+	case AR531X_MISC_IRQ_WATCHDOG:
-+	     imr |= AR2315_ISR_WD;
-+	     break;
-+	default:
-+		break;
-+	}
-+	ar231x_write_reg(AR2315_IMR, imr);
-+}
-+
-+static void
-+ar2315_misc_intr_disable(struct irq_data *d)
-+{
-+	unsigned int imr;
-+
-+	imr = ar231x_read_reg(AR2315_IMR);
-+	switch(d->irq) {
-+	case AR531X_MISC_IRQ_SPI:
-+		 imr &= ~AR2315_ISR_SPI;
-+		 break;
-+	case AR531X_MISC_IRQ_TIMER:
-+	     imr &= ~AR2315_ISR_TIMER;
-+	     break;
-+	case AR531X_MISC_IRQ_AHB_PROC:
-+	     imr &= ~AR2315_ISR_AHB;
-+	     break;
-+	case AR531X_MISC_IRQ_GPIO:
-+	     imr &= ~AR2315_ISR_GPIO;
-+	     break;
-+	case AR531X_MISC_IRQ_UART0:
-+	     imr &= ~AR2315_ISR_UART0;
-+	     break;
-+	case AR531X_MISC_IRQ_WATCHDOG:
-+	     imr &= ~AR2315_ISR_WD;
-+	     break;
-+	default:
-+		break;
-+	}
-+	ar231x_write_reg(AR2315_IMR, imr);
-+}
-+
-+
-+static struct irq_chip ar2315_misc_intr_controller = {
-+	.name	= "AR2315-MISC",
-+	.irq_mask     = ar2315_misc_intr_disable,
-+	.irq_unmask   = ar2315_misc_intr_enable,
-+};
-+
-+static irqreturn_t ar2315_ahb_proc_handler(int cpl, void *dev_id)
-+{
-+    ar231x_write_reg(AR2315_AHB_ERR0, AHB_ERROR_DET);
-+    ar231x_read_reg(AR2315_AHB_ERR1);
-+
-+    printk(KERN_ERR "AHB fatal error\n");
-+    machine_restart("AHB error"); /* Catastrophic failure */
-+
-+    return IRQ_HANDLED;
-+}
-+
-+static struct irqaction ar2315_ahb_proc_interrupt  = {
-+	.handler	= ar2315_ahb_proc_handler,
-+	.flags		= IRQF_DISABLED,
-+	.name		= "ar2315_ahb_proc_interrupt",
-+};
-+
-+static struct irqaction cascade  = {
-+	.handler	= no_action,
-+	.flags		= IRQF_DISABLED,
-+	.name		= "cascade",
-+};
-+
-+void
-+ar2315_irq_init(void)
-+{
-+	int i;
-+
-+	if (!is_2315())
-+		return;
-+
-+	ar231x_irq_dispatch = ar2315_irq_dispatch;
-+	gpiointval = ar231x_read_reg(AR2315_GPIO_DI);
-+	for (i = 0; i < AR531X_MISC_IRQ_COUNT; i++) {
-+		int irq = AR531X_MISC_IRQ_BASE + i;
-+		irq_set_chip_and_handler(irq, &ar2315_misc_intr_controller,
-+			handle_level_irq);
-+	}
-+	for (i = 0; i < AR531X_GPIO_IRQ_COUNT; i++) {
-+		int irq = AR531X_GPIO_IRQ_BASE + i;
-+		irq_set_chip_and_handler(irq, &ar2315_gpio_intr_controller,
-+			handle_level_irq);
-+	}
-+	setup_irq(AR531X_MISC_IRQ_GPIO, &cascade);
-+	setup_irq(AR531X_MISC_IRQ_AHB_PROC, &ar2315_ahb_proc_interrupt);
-+	setup_irq(AR2315_IRQ_MISC_INTRS, &cascade);
-+}
-+
-+const struct ar231x_gpiodev ar2315_gpiodev;
-+
-+static u32
-+ar2315_gpio_get_output(void)
-+{
-+	u32 reg;
-+	reg = ar231x_read_reg(AR2315_GPIO_CR);
-+	reg &= ar2315_gpiodev.valid_mask;
-+	return reg;
-+}
-+
-+static u32
-+ar2315_gpio_set_output(u32 mask, u32 val)
-+{
-+	u32 reg;
-+
-+	reg = ar231x_read_reg(AR2315_GPIO_CR);
-+	reg &= ~mask;
-+	reg |= val;
-+	ar231x_write_reg(AR2315_GPIO_CR, reg);
-+	return reg;
-+}
-+
-+static u32
-+ar2315_gpio_get(void)
-+{
-+	u32 reg;
-+	reg = ar231x_read_reg(AR2315_GPIO_DI);
-+	reg &= ar2315_gpiodev.valid_mask;
-+	return reg;
-+}
-+
-+static u32
-+ar2315_gpio_set(u32 mask, u32 value)
-+{
-+	u32 reg;
-+	reg = ar231x_read_reg(AR2315_GPIO_DO);
-+	reg &= ~mask;
-+	reg |= value;
-+	ar231x_write_reg(AR2315_GPIO_DO, reg);
-+	return reg;
-+}
-+
-+const struct ar231x_gpiodev ar2315_gpiodev = {
-+	.valid_mask = (1 << 22) - 1,
-+	.get_output = ar2315_gpio_get_output,
-+	.set_output = ar2315_gpio_set_output,
-+	.get = ar2315_gpio_get,
-+	.set = ar2315_gpio_set,
-+};
-+
-+static struct ar231x_eth ar2315_eth_data = {
-+	.reset_base = AR2315_RESET,
-+	.reset_mac = AR2315_RESET_ENET0,
-+	.reset_phy = AR2315_RESET_EPHY0,
-+	.phy_base = KSEG1ADDR(AR2315_ENET0),
-+	.config = &ar231x_board,
-+};
-+
-+static struct resource ar2315_spiflash_res[] = {
-+	{
-+		.name = "flash_base",
-+		.flags = IORESOURCE_MEM,
-+		.start = KSEG1ADDR(AR2315_SPI_READ),
-+		.end = KSEG1ADDR(AR2315_SPI_READ) + 0x1000000 - 1,
-+	},
-+	{
-+		.name = "flash_regs",
-+		.flags = IORESOURCE_MEM,
-+		.start = 0x11300000,
-+		.end = 0x11300012,
-+	},
-+};
-+
-+static struct platform_device ar2315_spiflash = {
-+	.id = 0,
-+	.name = "spiflash",
-+	.resource = ar2315_spiflash_res,
-+	.num_resources = ARRAY_SIZE(ar2315_spiflash_res)
-+};
-+
-+static struct platform_device ar2315_wdt = {
-+	.id = 0,
-+	.name = "ar2315_wdt",
-+};
-+
-+#define SPI_FLASH_CTL      0x00
-+#define SPI_FLASH_OPCODE   0x04
-+#define SPI_FLASH_DATA     0x08
-+
-+static inline u32
-+spiflash_read_reg(int reg)
-+{
-+	return ar231x_read_reg(AR2315_SPI + reg);
-+}
-+
-+static inline void
-+spiflash_write_reg(int reg, u32 data)
-+{
-+	ar231x_write_reg(AR2315_SPI + reg, data);
-+}
-+
-+static u32
-+spiflash_wait_status(void)
-+{
-+	u32 reg;
-+
-+	do {
-+		reg = spiflash_read_reg(SPI_FLASH_CTL);
-+	} while (reg & SPI_CTL_BUSY);
-+
-+	return reg;
-+}
-+
-+static u8
-+spiflash_probe(void)
-+{
-+	u32 reg;
-+
-+	reg = spiflash_wait_status();
-+	reg &= ~SPI_CTL_TX_RX_CNT_MASK;
-+	reg |= (1 << 4) | 4 | SPI_CTL_START;
-+
-+	spiflash_write_reg(SPI_FLASH_OPCODE, 0xab);
-+	spiflash_write_reg(SPI_FLASH_CTL, reg);
-+
-+	reg = spiflash_wait_status();
-+	reg = spiflash_read_reg(SPI_FLASH_DATA);
-+	reg &= 0xff;
-+
-+	return (u8) reg;
-+}
-+
-+
-+#define STM_8MBIT_SIGNATURE     0x13
-+#define STM_16MBIT_SIGNATURE    0x14
-+#define STM_32MBIT_SIGNATURE    0x15
-+#define STM_64MBIT_SIGNATURE    0x16
-+#define STM_128MBIT_SIGNATURE   0x17
-+
-+static u8 __init *
-+ar2315_flash_limit(void)
-+{
-+	u32 flash_size = 0;
-+
-+	/* probe the flash chip size */
-+	switch(spiflash_probe()) {
-+		case STM_8MBIT_SIGNATURE:
-+			flash_size = 0x00100000;
-+			break;
-+		case STM_16MBIT_SIGNATURE:
-+			flash_size = 0x00200000;
-+			break;
-+		case STM_32MBIT_SIGNATURE:
-+			flash_size = 0x00400000;
-+			break;
-+		case STM_64MBIT_SIGNATURE:
-+			flash_size = 0x00800000;
-+			break;
-+		case STM_128MBIT_SIGNATURE:
-+			flash_size = 0x01000000;
-+			break;
-+	}
-+
-+	ar2315_spiflash_res[0].end = ar2315_spiflash_res[0].start +
-+		flash_size - 1;
-+	return (u8 *) ar2315_spiflash_res[0].end + 1;
-+}
-+
-+#ifdef CONFIG_LEDS_GPIO
-+static struct gpio_led ar2315_leds[6];
-+static struct gpio_led_platform_data ar2315_led_data = {
-+	.leds = (void *) ar2315_leds,
-+};
-+
-+static struct platform_device ar2315_gpio_leds = {
-+	.name = "leds-gpio",
-+	.id = -1,
-+	.dev = {
-+		.platform_data = (void *) &ar2315_led_data,
-+	}
-+};
-+
-+static void __init
-+ar2315_init_gpio(void)
-+{
-+	static char led_names[6][6];
-+	int i, led = 0;
-+
-+	ar2315_led_data.num_leds = 0;
-+	for(i = 1; i < 8; i++)
-+	{
-+		if((i == AR2315_RESET_GPIO) ||
-+		   (i == ar231x_board.config->resetConfigGpio))
-+			continue;
-+
-+		if(i == ar231x_board.config->sysLedGpio)
-+			strcpy(led_names[led], "wlan");
-+		else
-+			sprintf(led_names[led], "gpio%d", i);
-+
-+		ar2315_leds[led].name = led_names[led];
-+		ar2315_leds[led].gpio = i;
-+		ar2315_leds[led].active_low = 0;
-+		led++;
-+	}
-+	ar2315_led_data.num_leds = led;
-+	platform_device_register(&ar2315_gpio_leds);
-+}
-+#else
-+static inline void ar2315_init_gpio(void)
-+{
-+}
-+#endif
-+
-+int __init
-+ar2315_init_devices(void)
-+{
-+	if (!is_2315())
-+		return 0;
-+
-+	/* Find board configuration */
-+	ar231x_find_config(ar2315_flash_limit());
-+	ar2315_eth_data.macaddr = ar231x_board.config->enet0_mac;
-+
-+	ar2315_init_gpio();
-+	platform_device_register(&ar2315_wdt);
-+	platform_device_register(&ar2315_spiflash);
-+	ar231x_add_ethernet(0, KSEG1ADDR(AR2315_ENET0), AR2315_IRQ_ENET0_INTRS,
-+		&ar2315_eth_data);
-+	ar231x_add_wmac(0, AR2315_WLAN0, AR2315_IRQ_WLAN0_INTRS);
-+
-+	return 0;
-+}
-+
-+static void
-+ar2315_restart(char *command)
-+{
-+	void (*mips_reset_vec)(void) = (void *) 0xbfc00000;
-+
-+	local_irq_disable();
-+
-+	/* try reset the system via reset control */
-+	ar231x_write_reg(AR2315_COLD_RESET,AR2317_RESET_SYSTEM);
-+
-+	/* Cold reset does not work on the AR2315/6, use the GPIO reset bits a workaround.
-+	 * give it some time to attempt a gpio based hardware reset
-+	 * (atheros reference design workaround) */
-+	gpio_direction_output(AR2315_RESET_GPIO, 0);
-+	mdelay(100);
-+
-+	/* Some boards (e.g. Senao EOC-2610) don't implement the reset logic
-+	 * workaround. Attempt to jump to the mips reset location -
-+	 * the boot loader itself might be able to recover the system */
-+	mips_reset_vec();
-+}
-+
-+
-+/*
-+ * This table is indexed by bits 5..4 of the CLOCKCTL1 register
-+ * to determine the predevisor value.
-+ */
-+static int __initdata CLOCKCTL1_PREDIVIDE_TABLE[4] = { 1, 2, 4, 5 };
-+static int __initdata PLLC_DIVIDE_TABLE[5] = { 2, 3, 4, 6, 3 };
-+
-+static unsigned int __init
-+ar2315_sys_clk(unsigned int clockCtl)
-+{
-+    unsigned int pllcCtrl,cpuDiv;
-+    unsigned int pllcOut,refdiv,fdiv,divby2;
-+	unsigned int clkDiv;
-+
-+    pllcCtrl = ar231x_read_reg(AR2315_PLLC_CTL);
-+    refdiv = (pllcCtrl & PLLC_REF_DIV_M) >> PLLC_REF_DIV_S;
-+    refdiv = CLOCKCTL1_PREDIVIDE_TABLE[refdiv];
-+    fdiv = (pllcCtrl & PLLC_FDBACK_DIV_M) >> PLLC_FDBACK_DIV_S;
-+    divby2 = (pllcCtrl & PLLC_ADD_FDBACK_DIV_M) >> PLLC_ADD_FDBACK_DIV_S;
-+    divby2 += 1;
-+    pllcOut = (40000000/refdiv)*(2*divby2)*fdiv;
-+
-+
-+    /* clkm input selected */
-+	switch(clockCtl & CPUCLK_CLK_SEL_M) {
-+		case 0:
-+		case 1:
-+			clkDiv = PLLC_DIVIDE_TABLE[(pllcCtrl & PLLC_CLKM_DIV_M) >> PLLC_CLKM_DIV_S];
-+			break;
-+		case 2:
-+			clkDiv = PLLC_DIVIDE_TABLE[(pllcCtrl & PLLC_CLKC_DIV_M) >> PLLC_CLKC_DIV_S];
-+			break;
-+		default:
-+			pllcOut = 40000000;
-+			clkDiv = 1;
-+			break;
-+	}
-+	cpuDiv = (clockCtl & CPUCLK_CLK_DIV_M) >> CPUCLK_CLK_DIV_S;
-+	cpuDiv = cpuDiv * 2 ?: 1;
-+	return (pllcOut/(clkDiv * cpuDiv));
-+}
-+
-+static inline unsigned int
-+ar2315_cpu_frequency(void)
-+{
-+    return ar2315_sys_clk(ar231x_read_reg(AR2315_CPUCLK));
-+}
-+
-+static inline unsigned int
-+ar2315_apb_frequency(void)
-+{
-+    return ar2315_sys_clk(ar231x_read_reg(AR2315_AMBACLK));
-+}
-+
-+void __init
-+ar2315_time_init(void)
-+{
-+	if (!is_2315())
-+		return;
-+
-+	mips_hpt_frequency = ar2315_cpu_frequency() / 2;
-+}
-+
-+void __init
-+ar2315_prom_init(void)
-+{
-+	u32 memsize, memcfg, devid;
-+
-+	if (!is_2315())
-+		return;
-+
-+	memcfg = ar231x_read_reg(AR2315_MEM_CFG);
-+	memsize   = 1 + ((memcfg & SDRAM_DATA_WIDTH_M) >> SDRAM_DATA_WIDTH_S);
-+	memsize <<= 1 + ((memcfg & SDRAM_COL_WIDTH_M) >> SDRAM_COL_WIDTH_S);
-+	memsize <<= 1 + ((memcfg & SDRAM_ROW_WIDTH_M) >> SDRAM_ROW_WIDTH_S);
-+	memsize <<= 3;
-+	add_memory_region(0, memsize, BOOT_MEM_RAM);
-+
-+	/* Detect the hardware based on the device ID */
-+	devid = ar231x_read_reg(AR2315_SREV) & AR2315_REV_CHIP;
-+	switch(devid) {
-+		case 0x90:
-+		case 0x91:
-+			ar231x_devtype = DEV_TYPE_AR2317;
-+			break;
-+		default:
-+			ar231x_devtype = DEV_TYPE_AR2315;
-+			break;
-+	}
-+	ar231x_gpiodev = &ar2315_gpiodev;
-+	ar231x_board.devid = devid;
-+}
-+
-+void __init
-+ar2315_plat_setup(void)
-+{
-+	u32 config;
-+
-+	if (!is_2315())
-+		return;
-+
-+	/* Clear any lingering AHB errors */
-+	config = read_c0_config();
-+	write_c0_config(config & ~0x3);
-+	ar231x_write_reg(AR2315_AHB_ERR0,AHB_ERROR_DET);
-+	ar231x_read_reg(AR2315_AHB_ERR1);
-+	ar231x_write_reg(AR2315_WDC, AR2315_WDC_IGNORE_EXPIRATION);
-+
-+	_machine_restart = ar2315_restart;
-+	ar231x_serial_setup(KSEG1ADDR(AR2315_UART0), ar2315_apb_frequency());
-+}
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/ar2315.h linux-2.6.39-rc7/arch/mips/ar231x/ar2315.h
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/ar2315.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/ar2315.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,37 @@
-+#ifndef __AR2315_H
-+#define __AR2315_H
-+
-+#ifdef CONFIG_ATHEROS_AR2315
-+
-+extern void ar2315_irq_init(void);
-+extern int ar2315_init_devices(void);
-+extern void ar2315_prom_init(void);
-+extern void ar2315_plat_setup(void);
-+extern void ar2315_time_init(void);
-+
-+#else
-+
-+static inline void ar2315_irq_init(void)
-+{
-+}
-+
-+static inline int ar2315_init_devices(void)
-+{
-+	return 0;
-+}
-+
-+static inline void ar2315_prom_init(void)
-+{
-+}
-+
-+static inline void ar2315_plat_setup(void)
-+{
-+}
-+
-+static inline void ar2315_time_init(void)
-+{
-+}
-+
-+#endif
-+
-+#endif
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/ar5312.c linux-2.6.39-rc7/arch/mips/ar231x/ar5312.c
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/ar5312.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/ar5312.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,538 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2003 Atheros Communications, Inc.,  All Rights Reserved.
-+ * Copyright (C) 2006 FON Technology, SL.
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
-+ */
-+
-+/*
-+ * Platform devices for Atheros SoCs
-+ */
-+
-+#include <generated/autoconf.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/types.h>
-+#include <linux/string.h>
-+#include <linux/mtd/physmap.h>
-+#include <linux/platform_device.h>
-+#include <linux/kernel.h>
-+#include <linux/reboot.h>
-+#include <linux/leds.h>
-+#include <asm/bootinfo.h>
-+#include <asm/reboot.h>
-+#include <asm/time.h>
-+#include <asm/irq.h>
-+#include <asm/io.h>
-+#include <gpio.h>
-+
-+#include <ar231x_platform.h>
-+#include <ar5312_regs.h>
-+#include <ar231x.h>
-+#include "devices.h"
-+#include "ar5312.h"
-+
-+static void
-+ar5312_misc_irq_dispatch(void)
-+{
-+	unsigned int ar231x_misc_intrs = ar231x_read_reg(AR531X_ISR) & ar231x_read_reg(AR531X_IMR);
-+
-+	if (ar231x_misc_intrs & AR531X_ISR_TIMER) {
-+		do_IRQ(AR531X_MISC_IRQ_TIMER);
-+		(void)ar231x_read_reg(AR531X_TIMER);
-+	} else if (ar231x_misc_intrs & AR531X_ISR_AHBPROC)
-+		do_IRQ(AR531X_MISC_IRQ_AHB_PROC);
-+	else if ((ar231x_misc_intrs & AR531X_ISR_UART0))
-+		do_IRQ(AR531X_MISC_IRQ_UART0);
-+	else if (ar231x_misc_intrs & AR531X_ISR_WD)
-+		do_IRQ(AR531X_MISC_IRQ_WATCHDOG);
-+	else
-+		do_IRQ(AR531X_MISC_IRQ_NONE);
-+}
-+
-+static asmlinkage void
-+ar5312_irq_dispatch(void)
-+{
-+	int pending = read_c0_status() & read_c0_cause();
-+
-+	if (pending & CAUSEF_IP2)
-+		do_IRQ(AR5312_IRQ_WLAN0_INTRS);
-+	else if (pending & CAUSEF_IP3)
-+		do_IRQ(AR5312_IRQ_ENET0_INTRS);
-+	else if (pending & CAUSEF_IP4)
-+		do_IRQ(AR5312_IRQ_ENET1_INTRS);
-+	else if (pending & CAUSEF_IP5)
-+		do_IRQ(AR5312_IRQ_WLAN1_INTRS);
-+	else if (pending & CAUSEF_IP6)
-+		ar5312_misc_irq_dispatch();
-+	else if (pending & CAUSEF_IP7)
-+		do_IRQ(AR531X_IRQ_CPU_CLOCK);
-+}
-+
-+
-+/* Enable the specified AR531X_MISC_IRQ interrupt */
-+static void
-+ar5312_misc_intr_enable(struct irq_data *d)
-+{
-+	unsigned int imr;
-+
-+	imr = ar231x_read_reg(AR531X_IMR);
-+	imr |= (1 << (d->irq - AR531X_MISC_IRQ_BASE - 1));
-+	ar231x_write_reg(AR531X_IMR, imr);
-+}
-+
-+/* Disable the specified AR531X_MISC_IRQ interrupt */
-+static void
-+ar5312_misc_intr_disable(struct irq_data *d)
-+{
-+	unsigned int imr;
-+
-+	imr = ar231x_read_reg(AR531X_IMR);
-+	imr &= ~(1 << (d->irq - AR531X_MISC_IRQ_BASE - 1));
-+	ar231x_write_reg(AR531X_IMR, imr);
-+	ar231x_read_reg(AR531X_IMR); /* flush write buffer */
-+}
-+
-+static struct irq_chip ar5312_misc_intr_controller = {
-+	.name     = "AR5312-MISC",
-+	.irq_mask     = ar5312_misc_intr_disable,
-+	.irq_unmask   = ar5312_misc_intr_enable,
-+};
-+
-+
-+static irqreturn_t ar5312_ahb_proc_handler(int cpl, void *dev_id)
-+{
-+	u32 proc1 = ar231x_read_reg(AR531X_PROC1);
-+	u32 procAddr = ar231x_read_reg(AR531X_PROCADDR); /* clears error state */
-+	u32 dma1 = ar231x_read_reg(AR531X_DMA1);
-+	u32 dmaAddr = ar231x_read_reg(AR531X_DMAADDR);   /* clears error state */
-+
-+	printk("AHB interrupt: PROCADDR=0x%8.8x  PROC1=0x%8.8x  DMAADDR=0x%8.8x  DMA1=0x%8.8x\n",
-+			procAddr, proc1, dmaAddr, dma1);
-+
-+	machine_restart("AHB error"); /* Catastrophic failure */
-+	return IRQ_HANDLED;
-+}
-+
-+
-+static struct irqaction ar5312_ahb_proc_interrupt  = {
-+	.handler = ar5312_ahb_proc_handler,
-+	.flags   = IRQF_DISABLED,
-+	.name    = "ar5312_ahb_proc_interrupt",
-+};
-+
-+
-+static struct irqaction cascade  = {
-+	.handler = no_action,
-+	.flags   = IRQF_DISABLED,
-+	.name    = "cascade",
-+};
-+
-+void __init ar5312_irq_init(void)
-+{
-+	int i;
-+
-+	if (!is_5312())
-+		return;
-+
-+	ar231x_irq_dispatch = ar5312_irq_dispatch;
-+	for (i = 0; i < AR531X_MISC_IRQ_COUNT; i++) {
-+		int irq = AR531X_MISC_IRQ_BASE + i;
-+		irq_set_chip_and_handler(irq, &ar5312_misc_intr_controller,
-+			handle_level_irq);
-+	}
-+	setup_irq(AR531X_MISC_IRQ_AHB_PROC, &ar5312_ahb_proc_interrupt);
-+	setup_irq(AR5312_IRQ_MISC_INTRS, &cascade);
-+}
-+
-+const struct ar231x_gpiodev ar5312_gpiodev;
-+
-+static u32
-+ar5312_gpio_get_output(void)
-+{
-+	u32 reg;
-+	reg = ~(ar231x_read_reg(AR531X_GPIO_CR));
-+	reg &= ar5312_gpiodev.valid_mask;
-+	return reg;
-+}
-+
-+static u32
-+ar5312_gpio_set_output(u32 mask, u32 val)
-+{
-+	u32 reg;
-+
-+	reg = ar231x_read_reg(AR531X_GPIO_CR);
-+	reg |= mask;
-+	reg &= ~val;
-+	ar231x_write_reg(AR531X_GPIO_CR, reg);
-+	return reg;
-+}
-+
-+static u32
-+ar5312_gpio_get(void)
-+{
-+	u32 reg;
-+	reg = ar231x_read_reg(AR531X_GPIO_DI);
-+	reg &= ar5312_gpiodev.valid_mask;
-+	return reg;
-+}
-+
-+static u32
-+ar5312_gpio_set(u32 mask, u32 value)
-+{
-+	u32 reg;
-+	reg = ar231x_read_reg(AR531X_GPIO_DO);
-+	reg &= ~mask;
-+	reg |= value;
-+	ar231x_write_reg(AR531X_GPIO_DO, reg);
-+	return reg;
-+}
-+
-+const struct ar231x_gpiodev ar5312_gpiodev = {
-+	.valid_mask = (1 << 8) - 1,
-+	.get_output = ar5312_gpio_get_output,
-+	.set_output = ar5312_gpio_set_output,
-+	.get = ar5312_gpio_get,
-+	.set = ar5312_gpio_set,
-+};
-+
-+static struct physmap_flash_data ar5312_flash_data = {
-+	.width = 2,
-+};
-+
-+static struct resource ar5312_flash_resource = {
-+	.start = AR531X_FLASH,
-+	.end = AR531X_FLASH + 0x800000 - 1,
-+	.flags = IORESOURCE_MEM,
-+};
-+
-+static struct ar231x_eth ar5312_eth0_data = {
-+	.reset_base = AR531X_RESET,
-+	.reset_mac = AR531X_RESET_ENET0,
-+	.reset_phy = AR531X_RESET_EPHY0,
-+	.phy_base = KSEG1ADDR(AR531X_ENET0),
-+	.config = &ar231x_board,
-+};
-+
-+static struct ar231x_eth ar5312_eth1_data = {
-+	.reset_base = AR531X_RESET,
-+	.reset_mac = AR531X_RESET_ENET1,
-+	.reset_phy = AR531X_RESET_EPHY1,
-+	.phy_base = KSEG1ADDR(AR531X_ENET1),
-+	.config = &ar231x_board,
-+};
-+
-+static struct platform_device ar5312_physmap_flash = {
-+	.name = "physmap-flash",
-+	.id = 0,
-+	.dev.platform_data = &ar5312_flash_data,
-+	.resource = &ar5312_flash_resource,
-+	.num_resources = 1,
-+};
-+
-+#ifdef CONFIG_LEDS_GPIO
-+static struct gpio_led ar5312_leds[] = {
-+	{ .name = "wlan", .gpio = 0, .active_low = 1, },
-+};
-+
-+static const struct gpio_led_platform_data ar5312_led_data = {
-+	.num_leds = ARRAY_SIZE(ar5312_leds),
-+	.leds = (void *) ar5312_leds,
-+};
-+
-+static struct platform_device ar5312_gpio_leds = {
-+	.name = "leds-gpio",
-+	.id = -1,
-+	.dev.platform_data = (void *) &ar5312_led_data,
-+};
-+#endif
-+
-+/*
-+ * NB: This mapping size is larger than the actual flash size,
-+ * but this shouldn't be a problem here, because the flash
-+ * will simply be mapped multiple times.
-+ */
-+static char __init *ar5312_flash_limit(void)
-+{
-+	u32 ctl;
-+	/*
-+	 * Configure flash bank 0.
-+	 * Assume 8M window size. Flash will be aliased if it's smaller
-+	 */
-+	ctl = FLASHCTL_E |
-+		FLASHCTL_AC_8M |
-+		FLASHCTL_RBLE |
-+		(0x01 << FLASHCTL_IDCY_S) |
-+		(0x07 << FLASHCTL_WST1_S) |
-+		(0x07 << FLASHCTL_WST2_S) |
-+		(ar231x_read_reg(AR531X_FLASHCTL0) & FLASHCTL_MW);
-+
-+	ar231x_write_reg(AR531X_FLASHCTL0, ctl);
-+
-+	/* Disable other flash banks */
-+	ar231x_write_reg(AR531X_FLASHCTL1,
-+		ar231x_read_reg(AR531X_FLASHCTL1) & ~(FLASHCTL_E | FLASHCTL_AC));
-+
-+	ar231x_write_reg(AR531X_FLASHCTL2,
-+		ar231x_read_reg(AR531X_FLASHCTL2) & ~(FLASHCTL_E | FLASHCTL_AC));
-+
-+	return (char *) KSEG1ADDR(AR531X_FLASH + 0x800000);
-+}
-+
-+int __init ar5312_init_devices(void)
-+{
-+	struct ar231x_boarddata *config;
-+	u32 fctl = 0;
-+	const u8 *radio;
-+	u8 *c;
-+
-+	if (!is_5312())
-+		return 0;
-+
-+	/* Locate board/radio config data */
-+	ar231x_find_config(ar5312_flash_limit());
-+	config = ar231x_board.config;
-+
-+
-+	/*
-+	 * Chip IDs and hardware detection for some Atheros
-+	 * models are really broken!
-+	 *
-+	 * Atheros uses a disabled WMAC0 and Silicon ID of AR5312
-+	 * as indication for AR2312, which is otherwise
-+	 * indistinguishable from the real AR5312.
-+	 */
-+	if (ar231x_board.radio) {
-+		radio = ar231x_board.radio + AR531X_RADIO_MASK_OFF;
-+		if ((*((const u32 *) radio) & AR531X_RADIO0_MASK) == 0)
-+			config->flags |= BD_ISCASPER;
-+	} else
-+		radio = NULL;
-+
-+	/* AR2313 has CPU minor rev. 10 */
-+	if ((current_cpu_data.processor_id & 0xff) == 0x0a)
-+		ar231x_devtype = DEV_TYPE_AR2313;
-+
-+	/* AR2312 shares the same Silicon ID as AR5312 */
-+	else if (config->flags & BD_ISCASPER)
-+		ar231x_devtype = DEV_TYPE_AR2312;
-+
-+	/* Everything else is probably AR5312 or compatible */
-+	else
-+		ar231x_devtype = DEV_TYPE_AR5312;
-+
-+	/* fixup flash width */
-+	fctl = ar231x_read_reg(AR531X_FLASHCTL) & FLASHCTL_MW;
-+	switch (fctl) {
-+	case FLASHCTL_MWx16:
-+		ar5312_flash_data.width = 2;
-+		break;
-+	case FLASHCTL_MWx8:
-+	default:
-+		ar5312_flash_data.width = 1;
-+		break;
-+	}
-+
-+	platform_device_register(&ar5312_physmap_flash);
-+
-+#ifdef CONFIG_LEDS_GPIO
-+	ar5312_leds[0].gpio = config->sysLedGpio;
-+	platform_device_register(&ar5312_gpio_leds);
-+#endif
-+
-+	/* Fix up MAC addresses if necessary */
-+	if (!memcmp(config->enet0_mac, "\xff\xff\xff\xff\xff\xff", 6))
-+		memcpy(config->enet0_mac, config->enet1_mac, 6);
-+
-+	/* If ENET0 and ENET1 have the same mac address,
-+	 * increment the one from ENET1 */
-+	if (memcmp(config->enet0_mac, config->enet1_mac, 6) == 0) {
-+		c = config->enet1_mac + 5;
-+		while ((c >= config->enet1_mac) && !(++(*c)))
-+			c--;
-+	}
-+
-+	switch(ar231x_devtype) {
-+	case DEV_TYPE_AR5312:
-+		ar5312_eth0_data.macaddr = config->enet0_mac;
-+		ar231x_add_ethernet(0, KSEG1ADDR(AR531X_ENET0),
-+			AR5312_IRQ_ENET0_INTRS, &ar5312_eth0_data);
-+
-+		ar5312_eth1_data.macaddr = config->enet1_mac;
-+		ar231x_add_ethernet(1, KSEG1ADDR(AR531X_ENET1),
-+			AR5312_IRQ_ENET1_INTRS, &ar5312_eth1_data);
-+
-+		if (!ar231x_board.radio)
-+			return 0;
-+
-+		if ((*((u32 *) radio) & AR531X_RADIO0_MASK) &&
-+		    (config->flags & BD_WLAN0))
-+			ar231x_add_wmac(0, AR531X_WLAN0,
-+				AR5312_IRQ_WLAN0_INTRS);
-+
-+		break;
-+	/*
-+	 * AR2312/3 ethernet uses the PHY of ENET0, but the MAC
-+	 * of ENET1. Atheros calls it 'twisted' for a reason :)
-+	 */
-+	case DEV_TYPE_AR2312:
-+	case DEV_TYPE_AR2313:
-+		ar5312_eth1_data.phy_base = ar5312_eth0_data.phy_base;
-+		ar5312_eth1_data.reset_phy = ar5312_eth0_data.reset_phy;
-+		ar5312_eth1_data.macaddr = config->enet0_mac;
-+		ar231x_add_ethernet(0, KSEG1ADDR(AR531X_ENET1),
-+			AR5312_IRQ_ENET1_INTRS, &ar5312_eth1_data);
-+
-+		if (!ar231x_board.radio)
-+			return 0;
-+		break;
-+	default:
-+		break;
-+	}
-+
-+	if ((*((u32 *) radio) & AR531X_RADIO1_MASK) &&
-+	    (config->flags & BD_WLAN1))
-+		ar231x_add_wmac(1, AR531X_WLAN1,
-+			AR5312_IRQ_WLAN1_INTRS);
-+
-+	return 0;
-+}
-+
-+
-+static void ar5312_restart(char *command)
-+{
-+	/* reset the system */
-+	local_irq_disable();
-+	while(1) {
-+		ar231x_write_reg(AR531X_RESET, AR531X_RESET_SYSTEM);
-+	}
-+}
-+
-+
-+/*
-+ * This table is indexed by bits 5..4 of the CLOCKCTL1 register
-+ * to determine the predevisor value.
-+ */
-+static int __initdata CLOCKCTL1_PREDIVIDE_TABLE[4] = { 1, 2, 4, 5 };
-+
-+
-+static int __init
-+ar5312_cpu_frequency(void)
-+{
-+	unsigned int result;
-+	unsigned int predivide_mask, predivide_shift;
-+	unsigned int multiplier_mask, multiplier_shift;
-+	unsigned int clockCtl1, preDivideSelect, preDivisor, multiplier;
-+	unsigned int doubler_mask;
-+	u16 devid;
-+
-+	/* Trust the bootrom's idea of cpu frequency. */
-+	if ((result = ar231x_read_reg(AR5312_SCRATCH)))
-+		return result;
-+
-+	devid = ar231x_read_reg(AR531X_REV);
-+	devid &= AR531X_REV_MAJ;
-+	devid >>= AR531X_REV_MAJ_S;
-+	if (devid == AR531X_REV_MAJ_AR2313) {
-+		predivide_mask = AR2313_CLOCKCTL1_PREDIVIDE_MASK;
-+		predivide_shift = AR2313_CLOCKCTL1_PREDIVIDE_SHIFT;
-+		multiplier_mask = AR2313_CLOCKCTL1_MULTIPLIER_MASK;
-+		multiplier_shift = AR2313_CLOCKCTL1_MULTIPLIER_SHIFT;
-+		doubler_mask = AR2313_CLOCKCTL1_DOUBLER_MASK;
-+	} else { /* AR5312 and AR2312 */
-+		predivide_mask = AR5312_CLOCKCTL1_PREDIVIDE_MASK;
-+		predivide_shift = AR5312_CLOCKCTL1_PREDIVIDE_SHIFT;
-+		multiplier_mask = AR5312_CLOCKCTL1_MULTIPLIER_MASK;
-+		multiplier_shift = AR5312_CLOCKCTL1_MULTIPLIER_SHIFT;
-+		doubler_mask = AR5312_CLOCKCTL1_DOUBLER_MASK;
-+	}
-+
-+	/*
-+	 * Clocking is derived from a fixed 40MHz input clock.
-+	 *
-+	 *  cpuFreq = InputClock * MULT (where MULT is PLL multiplier)
-+	 *  sysFreq = cpuFreq / 4	   (used for APB clock, serial,
-+	 *							   flash, Timer, Watchdog Timer)
-+	 *
-+	 *  cntFreq = cpuFreq / 2	   (use for CPU count/compare)
-+	 *
-+	 * So, for example, with a PLL multiplier of 5, we have
-+	 *
-+	 *  cpuFreq = 200MHz
-+	 *  sysFreq = 50MHz
-+	 *  cntFreq = 100MHz
-+	 *
-+	 * We compute the CPU frequency, based on PLL settings.
-+	 */
-+
-+	clockCtl1 = ar231x_read_reg(AR5312_CLOCKCTL1);
-+	preDivideSelect = (clockCtl1 & predivide_mask) >> predivide_shift;
-+	preDivisor = CLOCKCTL1_PREDIVIDE_TABLE[preDivideSelect];
-+	multiplier = (clockCtl1 & multiplier_mask) >> multiplier_shift;
-+
-+	if (clockCtl1 & doubler_mask) {
-+		multiplier = multiplier << 1;
-+	}
-+	return (40000000 / preDivisor) * multiplier;
-+}
-+
-+static inline int
-+ar5312_sys_frequency(void)
-+{
-+	return ar5312_cpu_frequency() / 4;
-+}
-+
-+void __init
-+ar5312_time_init(void)
-+{
-+	if (!is_5312())
-+		return;
-+
-+	mips_hpt_frequency = ar5312_cpu_frequency() / 2;
-+}
-+
-+
-+void __init
-+ar5312_prom_init(void)
-+{
-+	u32 memsize, memcfg, bank0AC, bank1AC;
-+	u32 devid;
-+
-+	if (!is_5312())
-+		return;
-+
-+	/* Detect memory size */
-+	memcfg = ar231x_read_reg(AR531X_MEM_CFG1);
-+	bank0AC = (memcfg & MEM_CFG1_AC0) >> MEM_CFG1_AC0_S;
-+	bank1AC = (memcfg & MEM_CFG1_AC1) >> MEM_CFG1_AC1_S;
-+	memsize = (bank0AC ? (1 << (bank0AC+1)) : 0)
-+	        + (bank1AC ? (1 << (bank1AC+1)) : 0);
-+	memsize <<= 20;
-+	add_memory_region(0, memsize, BOOT_MEM_RAM);
-+
-+	devid = ar231x_read_reg(AR531X_REV);
-+	devid >>= AR531X_REV_WMAC_MIN_S;
-+	devid &= AR531X_REV_CHIP;
-+	ar231x_board.devid = (u16) devid;
-+	ar231x_gpiodev = &ar5312_gpiodev;
-+}
-+
-+void __init
-+ar5312_plat_setup(void)
-+{
-+	if (!is_5312())
-+		return;
-+
-+	/* Clear any lingering AHB errors */
-+	ar231x_read_reg(AR531X_PROCADDR);
-+	ar231x_read_reg(AR531X_DMAADDR);
-+	ar231x_write_reg(AR531X_WD_CTRL, AR531X_WD_CTRL_IGNORE_EXPIRATION);
-+
-+	_machine_restart = ar5312_restart;
-+	ar231x_serial_setup(KSEG1ADDR(AR531X_UART0), ar5312_sys_frequency());
-+}
-+
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/ar5312.h linux-2.6.39-rc7/arch/mips/ar231x/ar5312.h
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/ar5312.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/ar5312.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,38 @@
-+#ifndef __AR5312_H
-+#define __AR5312_H
-+
-+#ifdef CONFIG_ATHEROS_AR5312
-+
-+extern void ar5312_irq_init(void);
-+extern int ar5312_init_devices(void);
-+extern void ar5312_prom_init(void);
-+extern void ar5312_plat_setup(void);
-+extern void ar5312_time_init(void);
-+extern void ar5312_time_init(void);
-+
-+#else
-+
-+static inline void ar5312_irq_init(void)
-+{
-+}
-+
-+static inline int ar5312_init_devices(void)
-+{
-+	return 0;
-+}
-+
-+static inline void ar5312_prom_init(void)
-+{
-+}
-+
-+static inline void ar5312_plat_setup(void)
-+{
-+}
-+
-+static inline void ar5312_time_init(void)
-+{
-+}
-+
-+#endif
-+
-+#endif
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/board.c linux-2.6.39-rc7/arch/mips/ar231x/board.c
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/board.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/board.c	2011-05-15 22:16:11.000000000 +0200
-@@ -0,0 +1,261 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2003 Atheros Communications, Inc.,  All Rights Reserved.
-+ * Copyright (C) 2006 FON Technology, SL.
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
-+ */
-+
-+#include <generated/autoconf.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/types.h>
-+#include <linux/string.h>
-+#include <linux/platform_device.h>
-+#include <linux/kernel.h>
-+#include <linux/random.h>
-+#include <linux/etherdevice.h>
-+#include <asm/irq_cpu.h>
-+#include <asm/reboot.h>
-+#include <asm/io.h>
-+
-+#include <ar231x_platform.h>
-+#include "devices.h"
-+#include "ar5312.h"
-+#include "ar2315.h"
-+
-+void (*ar231x_irq_dispatch)(void);
-+
-+static inline bool
-+check_radio_magic(u8 *addr)
-+{
-+	addr += 0x7a; /* offset for flash magic */
-+	if ((addr[0] == 0x5a) && (addr[1] == 0xa5)) {
-+		return 1;
-+	}
-+	return 0;
-+}
-+
-+static inline bool
-+check_board_data(u8 *flash_limit, u8 *addr, bool broken)
-+{
-+	/* config magic found */
-+	if (*((u32 *)addr) == AR531X_BD_MAGIC)
-+		return 1;
-+
-+	if (!broken)
-+		return 0;
-+
-+	if (check_radio_magic(addr + 0xf8))
-+		ar231x_board.radio = addr + 0xf8;
-+	if ((addr < flash_limit + 0x10000) &&
-+	     check_radio_magic(addr + 0x10000))
-+		ar231x_board.radio = addr + 0x10000;
-+
-+	if (ar231x_board.radio) {
-+		/* broken board data detected, use radio data to find the offset,
-+		 * user will fix this */
-+		return 1;
-+	}
-+	return 0;
-+}
-+
-+static u8 *
-+find_board_config(u8 *flash_limit, bool broken)
-+{
-+	u8 *addr;
-+	int found = 0;
-+
-+	for (addr = flash_limit - 0x1000;
-+		addr >= flash_limit - 0x30000;
-+		addr -= 0x1000) {
-+
-+		if (check_board_data(flash_limit, addr, broken)) {
-+			found = 1;
-+			break;
-+		}
-+	}
-+
-+	if (!found)
-+		addr = NULL;
-+
-+	return addr;
-+}
-+
-+static u8 *
-+find_radio_config(u8 *flash_limit, u8 *board_config)
-+{
-+	int found;
-+	u8 *radio_config;
-+
-+	/*
-+	 * Now find the start of Radio Configuration data, using heuristics:
-+	 * Search forward from Board Configuration data by 0x1000 bytes
-+	 * at a time until we find non-0xffffffff.
-+	 */
-+	found = 0;
-+	for (radio_config = board_config + 0x1000;
-+	     (radio_config < flash_limit);
-+	     radio_config += 0x1000) {
-+		if ((*(u32 *)radio_config != 0xffffffff) &&
-+		    check_radio_magic(radio_config)) {
-+			found = 1;
-+			break;
-+		}
-+	}
-+
-+	/* AR2316 relocates radio config to new location */
-+	if (!found) {
-+	    for (radio_config = board_config + 0xf8;
-+			(radio_config < flash_limit - 0x1000 + 0xf8);
-+			 radio_config += 0x1000) {
-+			if ((*(u32 *)radio_config != 0xffffffff) &&
-+				check_radio_magic(radio_config)) {
-+				found = 1;
-+				break;
-+			}
-+	    }
-+	}
-+
-+	if (!found) {
-+		printk("Could not find Radio Configuration data\n");
-+		radio_config = 0;
-+	}
-+
-+	return (u8 *) radio_config;
-+}
-+
-+int __init
-+ar231x_find_config(u8 *flash_limit)
-+{
-+	struct ar231x_boarddata *config;
-+	unsigned int rcfg_size;
-+	int broken_boarddata = 0, i, tmp;
-+	u8 *bcfg, *rcfg;
-+	u8 *board_data;
-+	u8 *radio_data;
-+	u32 offset;
-+
-+	ar231x_board.config = NULL;
-+	ar231x_board.radio = NULL;
-+	/* Copy the board and radio data to RAM, because accessing the mapped
-+	 * memory of the flash directly after booting is not safe */
-+
-+	/* Try to find valid board and radio data */
-+	bcfg = find_board_config(flash_limit, false);
-+
-+	/* If that fails, try to at least find valid radio data */
-+	if (!bcfg) {
-+		bcfg = find_board_config(flash_limit, true);
-+		broken_boarddata = 1;
-+	}
-+
-+	if (!bcfg) {
-+		printk(KERN_WARNING "WARNING: No board configuration data found!\n");
-+		return -ENODEV;
-+	}
-+
-+	board_data = kzalloc(BOARD_CONFIG_BUFSZ, GFP_KERNEL);
-+	ar231x_board.config = (struct ar231x_boarddata *) board_data;
-+	memcpy(board_data, bcfg, 0x100);
-+	if (broken_boarddata) {
-+		printk(KERN_WARNING "WARNING: broken board data detected\n");
-+		config = ar231x_board.config;
-+		if (!memcmp(config->enet0_mac, "\x00\x00\x00\x00\x00\x00", 6)) {
-+			printk(KERN_INFO "Fixing up empty mac addresses\n");
-+			config->resetConfigGpio = 0xffff;
-+			config->sysLedGpio = 0xffff;
-+			random_ether_addr(config->wlan0_mac);
-+			config->wlan0_mac[0] &= ~0x06;
-+			random_ether_addr(config->enet0_mac);
-+			random_ether_addr(config->enet1_mac);
-+		}
-+	}
-+
-+
-+	/* Radio config starts 0x100 bytes after board config, regardless
-+	 * of what the physical layout on the flash chip looks like */
-+
-+	if (ar231x_board.radio)
-+		rcfg = (u8 *) ar231x_board.radio;
-+	else
-+		rcfg = find_radio_config(flash_limit, bcfg);
-+
-+	if (!rcfg)
-+		return -ENODEV;
-+
-+	radio_data = board_data + 0x100 + ((rcfg - bcfg) & 0xfff);
-+	ar231x_board.radio = radio_data;
-+	offset = radio_data - board_data;
-+	printk(KERN_INFO "Radio config found at offset 0x%x(0x%x)\n", rcfg - bcfg, offset);
-+	rcfg_size = BOARD_CONFIG_BUFSZ - offset;
-+	memcpy(radio_data, rcfg, rcfg_size);
-+
-+        for (tmp = 0xff, i = 0; i < ETH_ALEN; i++) 
-+                tmp &= radio_data[i + 0x1d * 2]; 
-+        if (tmp == 0xff) { 
-+                 u16 *eep = (u16 *)radio_data, *bcfgs = (u16 *)bcfg; 
-+                 printk(KERN_INFO "Radio MAC is blank; using board-data\n"); 
-+                 eep[0x1f] = bcfgs[0x30]; 
-+                 eep[0x1e] = bcfgs[0x34]; 
-+                 eep[0x1d] = bcfgs[0x32]; 
-+        } 
-+
-+	return 0;
-+}
-+
-+static void
-+ar231x_halt(void)
-+{
-+	local_irq_disable();
-+	while (1);
-+}
-+
-+void __init
-+plat_mem_setup(void)
-+{
-+	_machine_halt = ar231x_halt;
-+	pm_power_off = ar231x_halt;
-+
-+	ar5312_plat_setup();
-+	ar2315_plat_setup();
-+
-+	/* Disable data watchpoints */
-+	write_c0_watchlo0(0);
-+}
-+
-+
-+asmlinkage void
-+plat_irq_dispatch(void)
-+{
-+	ar231x_irq_dispatch();
-+}
-+
-+void __init
-+plat_time_init(void)
-+{
-+	ar5312_time_init();
-+	ar2315_time_init();
-+}
-+
-+unsigned int __cpuinit
-+get_c0_compare_int(void)
-+{
-+	return CP0_LEGACY_COMPARE_IRQ;
-+}
-+
-+void __init
-+arch_init_irq(void)
-+{
-+	clear_c0_status(ST0_IM);
-+	mips_cpu_irq_init();
-+
-+	/* Initialize interrupt controllers */
-+	ar5312_irq_init();
-+	ar2315_irq_init();
-+}
-+
-+
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/devices.c linux-2.6.39-rc7/arch/mips/ar231x/devices.c
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/devices.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/devices.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,175 @@
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/serial.h>
-+#include <linux/serial_core.h>
-+#include <linux/serial_8250.h>
-+#include <linux/platform_device.h>
-+#include <ar231x_platform.h>
-+#include <ar231x.h>
-+#include "devices.h"
-+#include "ar5312.h"
-+#include "ar2315.h"
-+
-+struct ar231x_board_config ar231x_board;
-+int ar231x_devtype = DEV_TYPE_UNKNOWN;
-+const struct ar231x_gpiodev *ar231x_gpiodev;
-+EXPORT_SYMBOL(ar231x_gpiodev);
-+
-+static struct resource ar231x_eth0_res[] = {
-+	{
-+		.name = "eth0_membase",
-+		.flags = IORESOURCE_MEM,
-+	},
-+	{
-+		.name = "eth0_irq",
-+		.flags = IORESOURCE_IRQ,
-+	}
-+};
-+
-+static struct resource ar231x_eth1_res[] = {
-+	{
-+		.name = "eth1_membase",
-+		.flags = IORESOURCE_MEM,
-+	},
-+	{
-+		.name = "eth1_irq",
-+		.flags = IORESOURCE_IRQ,
-+	}
-+};
-+
-+static struct platform_device ar231x_eth[] = {
-+	{
-+		.id = 0,
-+		.name = "ar231x-eth",
-+		.resource = ar231x_eth0_res,
-+		.num_resources = ARRAY_SIZE(ar231x_eth0_res)
-+	},
-+	{
-+		.id = 1,
-+		.name = "ar231x-eth",
-+		.resource = ar231x_eth1_res,
-+		.num_resources = ARRAY_SIZE(ar231x_eth1_res)
-+	}
-+};
-+
-+static struct resource ar231x_wmac0_res[] = {
-+	{
-+		.name = "wmac0_membase",
-+		.flags = IORESOURCE_MEM,
-+	},
-+	{
-+		.name = "wmac0_irq",
-+		.flags = IORESOURCE_IRQ,
-+	}
-+};
-+
-+static struct resource ar231x_wmac1_res[] = {
-+	{
-+		.name = "wmac1_membase",
-+		.flags = IORESOURCE_MEM,
-+	},
-+	{
-+		.name = "wmac1_irq",
-+		.flags = IORESOURCE_IRQ,
-+	}
-+};
-+
-+
-+static struct platform_device ar231x_wmac[] = {
-+	{
-+		.id = 0,
-+		.name = "ar231x-wmac",
-+		.resource = ar231x_wmac0_res,
-+		.num_resources = ARRAY_SIZE(ar231x_wmac0_res),
-+		.dev.platform_data = &ar231x_board,
-+	},
-+	{
-+		.id = 1,
-+		.name = "ar231x-wmac",
-+		.resource = ar231x_wmac1_res,
-+		.num_resources = ARRAY_SIZE(ar231x_wmac1_res),
-+		.dev.platform_data = &ar231x_board,
-+	},
-+};
-+
-+static const char *devtype_strings[] = {
-+	[DEV_TYPE_AR5312] = "Atheros AR5312",
-+	[DEV_TYPE_AR2312] = "Atheros AR2312",
-+	[DEV_TYPE_AR2313] = "Atheros AR2313",
-+	[DEV_TYPE_AR2315] = "Atheros AR2315",
-+	[DEV_TYPE_AR2316] = "Atheros AR2316",
-+	[DEV_TYPE_AR2317] = "Atheros AR2317",
-+	[DEV_TYPE_UNKNOWN] = "Atheros (unknown)",
-+};
-+
-+const char *get_system_type(void)
-+{
-+	if ((ar231x_devtype >= ARRAY_SIZE(devtype_strings)) ||
-+		!devtype_strings[ar231x_devtype])
-+		return devtype_strings[DEV_TYPE_UNKNOWN];
-+	return devtype_strings[ar231x_devtype];
-+}
-+
-+
-+int __init
-+ar231x_add_ethernet(int nr, u32 base, int irq, void *pdata)
-+{
-+	struct resource *res;
-+
-+	ar231x_eth[nr].dev.platform_data = pdata;
-+	res = &ar231x_eth[nr].resource[0];
-+	res->start = base;
-+	res->end = base + 0x2000 - 1;
-+	res++;
-+	res->start = irq;
-+	res->end = irq;
-+	return platform_device_register(&ar231x_eth[nr]);
-+}
-+
-+void __init
-+ar231x_serial_setup(u32 mapbase, unsigned int uartclk)
-+{
-+	struct uart_port s;
-+
-+	memset(&s, 0, sizeof(s));
-+
-+	s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
-+	s.iotype = UPIO_MEM;
-+	s.irq = AR531X_MISC_IRQ_UART0;
-+	s.regshift = 2;
-+	s.mapbase = mapbase;
-+	s.uartclk = uartclk;
-+	s.membase = (void __iomem *)s.mapbase;
-+
-+	early_serial_setup(&s);
-+}
-+
-+int __init
-+ar231x_add_wmac(int nr, u32 base, int irq)
-+{
-+	struct resource *res;
-+
-+	ar231x_wmac[nr].dev.platform_data = &ar231x_board;
-+	res = &ar231x_wmac[nr].resource[0];
-+	res->start = base;
-+	res->end = base + 0x10000 - 1;
-+	res++;
-+	res->start = irq;
-+	res->end = irq;
-+	return platform_device_register(&ar231x_wmac[nr]);
-+}
-+
-+static int __init ar231x_register_devices(void)
-+{
-+	static struct resource res = {
-+		.start = 0xFFFFFFFF,
-+	};
-+
-+	platform_device_register_simple("GPIODEV", 0, &res, 1);
-+	ar5312_init_devices();
-+	ar2315_init_devices();
-+
-+	return 0;
-+}
-+
-+device_initcall(ar231x_register_devices);
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/devices.h linux-2.6.39-rc7/arch/mips/ar231x/devices.h
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/devices.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/devices.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,37 @@
-+#ifndef __AR231X_DEVICES_H
-+#define __AR231X_DEVICES_H
-+
-+enum {
-+	/* handled by ar5312.c */
-+	DEV_TYPE_AR2312,
-+	DEV_TYPE_AR2313,
-+	DEV_TYPE_AR5312,
-+
-+	/* handled by ar2315.c */
-+	DEV_TYPE_AR2315,
-+	DEV_TYPE_AR2316,
-+	DEV_TYPE_AR2317,
-+
-+	DEV_TYPE_UNKNOWN
-+};
-+
-+extern int ar231x_devtype;
-+extern struct ar231x_board_config ar231x_board;
-+extern asmlinkage void (*ar231x_irq_dispatch)(void);
-+
-+extern int ar231x_find_config(u8 *flash_limit);
-+extern void ar231x_serial_setup(u32 mapbase, unsigned int uartclk);
-+extern int ar231x_add_wmac(int nr, u32 base, int irq);
-+extern int ar231x_add_ethernet(int nr, u32 base, int irq, void *pdata);
-+
-+static inline bool is_2315(void)
-+{
-+	return (current_cpu_data.cputype == CPU_4KEC);
-+}
-+
-+static inline bool is_5312(void)
-+{
-+	return !is_2315();
-+}
-+
-+#endif
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/early_printk.c linux-2.6.39-rc7/arch/mips/ar231x/early_printk.c
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/early_printk.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/early_printk.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,44 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
-+ */
-+
-+#include <linux/mm.h>
-+#include <linux/io.h>
-+#include <linux/serial_reg.h>
-+#include <asm/addrspace.h>
-+
-+#include <asm/mach-ar231x/ar2315_regs.h>
-+#include <asm/mach-ar231x/ar5312_regs.h>
-+#include "devices.h"
-+
-+static inline void prom_uart_wr(void __iomem *base, unsigned reg,
-+				unsigned char ch)
-+{
-+	__raw_writeb(ch, base + 4 * reg);
-+}
-+
-+static inline unsigned char prom_uart_rr(void __iomem *base, unsigned reg)
-+{
-+	return __raw_readb(base + 4 * reg);
-+}
-+
-+void prom_putchar(unsigned char ch)
-+{
-+	static void __iomem *base;
-+
-+	if (unlikely(base == NULL)) {
-+		if (is_2315())
-+			base = (void __iomem *)(KSEG1ADDR(AR2315_UART0));
-+		else
-+			base = (void __iomem *)(KSEG1ADDR(AR531X_UART0));
-+	}
-+
-+	while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0);
-+	prom_uart_wr(base, UART_TX, ch);
-+	while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0);
-+}
-+
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/pci.c linux-2.6.39-rc7/arch/mips/ar231x/pci.c
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/pci.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/pci.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,230 @@
-+/*
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version 2
-+ * of the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/pci.h>
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/mm.h>
-+#include <linux/spinlock.h>
-+#include <linux/delay.h>
-+#include <linux/irq.h>
-+#include <asm/bootinfo.h>
-+#include <asm/paccess.h>
-+#include <asm/irq_cpu.h>
-+#include <asm/io.h>
-+#include <ar231x_platform.h>
-+#include <ar231x.h>
-+#include <ar2315_regs.h>
-+#include "devices.h"
-+
-+#define AR531X_MEM_BASE    0x80800000UL
-+#define AR531X_MEM_SIZE    0x00ffffffUL
-+#define AR531X_IO_SIZE     0x00007fffUL
-+
-+static unsigned long configspace;
-+
-+static int config_access(int devfn, int where, int size, u32 *ptr, bool write)
-+{
-+	unsigned long flags;
-+	int func = PCI_FUNC(devfn);
-+	int dev = PCI_SLOT(devfn);
-+	u32 value = 0;
-+	int err = 0;
-+	u32 addr;
-+
-+	if (((dev != 0) && (dev != 3)) || (func > 2))
-+		return PCIBIOS_DEVICE_NOT_FOUND;
-+
-+	/* Select Configuration access */
-+	local_irq_save(flags);
-+	ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, 0, AR2315_PCIMISC_CFG_SEL);
-+	mb();
-+
-+	addr = (u32) configspace + (1 << (13 + dev)) + (func << 8) + where;
-+	if (size == 1)
-+		addr ^= 0x3;
-+	else if (size == 2)
-+		addr ^= 0x2;
-+
-+	if (write) {
-+		value = *ptr;
-+		if (size == 1)
-+			err = put_dbe(value, (u8 *) addr);
-+		else if (size == 2)
-+			err = put_dbe(value, (u16 *) addr);
-+		else if (size == 4)
-+			err = put_dbe(value, (u32 *) addr);
-+	} else {
-+		if (size == 1)
-+			err = get_dbe(value, (u8 *) addr);
-+		else if (size == 2)
-+			err = get_dbe(value, (u16 *) addr);
-+		else if (size == 4)
-+			err = get_dbe(value, (u32 *) addr);
-+		if (err)
-+			*ptr = 0xffffffff;
-+		else
-+			*ptr = value;
-+	}
-+
-+	/* Select Memory access */
-+	ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_CFG_SEL, 0);
-+	local_irq_restore(flags);
-+
-+	return (err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL);
-+}
-+
-+static int ar231x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * value)
-+{
-+	return config_access(devfn, where, size, value, 0);
-+}
-+
-+static int ar231x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
-+{
-+	return config_access(devfn, where, size, &value, 1);
-+}
-+
-+struct pci_ops ar231x_pci_ops = {
-+	.read	= ar231x_pci_read,
-+	.write	= ar231x_pci_write,
-+};
-+
-+static struct resource ar231x_mem_resource = {
-+	.name	= "AR531x PCI MEM",
-+	.start	= AR531X_MEM_BASE,
-+	.end	= AR531X_MEM_BASE + AR531X_MEM_SIZE - AR531X_IO_SIZE - 1 + 0x4000000,
-+	.flags	= IORESOURCE_MEM,
-+};
-+
-+static struct resource ar231x_io_resource = {
-+	.name	= "AR531x PCI I/O",
-+	.start	= AR531X_MEM_BASE + AR531X_MEM_SIZE - AR531X_IO_SIZE,
-+	.end	= AR531X_MEM_BASE + AR531X_MEM_SIZE - 1,
-+	.flags	= IORESOURCE_IO,
-+};
-+
-+struct pci_controller ar231x_pci_controller = {
-+	.pci_ops		= &ar231x_pci_ops,
-+	.mem_resource	= &ar231x_mem_resource,
-+	.io_resource	= &ar231x_io_resource,
-+	.mem_offset     = 0x00000000UL,
-+	.io_offset      = 0x00000000UL,
-+};
-+
-+int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+	return AR2315_IRQ_LCBUS_PCI;
-+}
-+
-+int pcibios_plat_dev_init(struct pci_dev *dev)
-+{
-+	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 5);
-+	pci_write_config_word(dev, 0x40, 0);
-+
-+	/* Clear any pending Abort or external Interrupts
-+	 * and enable interrupt processing */
-+	ar231x_mask_reg(AR2315_PCI_INTEN_REG, AR2315_PCI_INT_ENABLE, 0);
-+	ar231x_write_reg(AR2315_PCI_INT_STATUS, (AR2315_PCI_ABORT_INT | AR2315_PCI_EXT_INT));
-+	ar231x_write_reg(AR2315_PCI_INT_MASK, (AR2315_PCI_ABORT_INT | AR2315_PCI_EXT_INT));
-+	ar231x_mask_reg(AR2315_PCI_INTEN_REG, 0, AR2315_PCI_INT_ENABLE);
-+
-+	return 0;
-+}
-+
-+static void
-+ar2315_pci_fixup(struct pci_dev *dev)
-+{
-+	unsigned int devfn = dev->devfn;
-+
-+	if (dev->bus->number != 0)
-+		return;
-+
-+	/* Only fix up the PCI host settings */
-+	if ((PCI_SLOT(devfn) != 3) || (PCI_FUNC(devfn) != 0))
-+		return;
-+
-+	/* Fix up MBARs */
-+	pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, HOST_PCI_MBAR0);
-+	pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, HOST_PCI_MBAR1);
-+	pci_write_config_dword(dev, PCI_BASE_ADDRESS_2, HOST_PCI_MBAR2);
-+	pci_write_config_dword(dev, PCI_COMMAND,
-+		PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL |
-+		PCI_COMMAND_INVALIDATE | PCI_COMMAND_PARITY | PCI_COMMAND_SERR |
-+		PCI_COMMAND_FAST_BACK);
-+}
-+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, ar2315_pci_fixup);
-+
-+static int __init
-+ar2315_pci_init(void)
-+{
-+	u32 reg;
-+
-+	if (ar231x_devtype != DEV_TYPE_AR2315)
-+		return -ENODEV;
-+
-+	configspace = (unsigned long) ioremap_nocache(0x80000000, 1*1024*1024); /* Remap PCI config space */
-+	ar231x_pci_controller.io_map_base =
-+		(unsigned long) ioremap_nocache(AR531X_MEM_BASE + AR531X_MEM_SIZE, AR531X_IO_SIZE);
-+	set_io_port_base(ar231x_pci_controller.io_map_base); /* PCI I/O space */
-+
-+	reg = ar231x_mask_reg(AR2315_RESET, 0, AR2315_RESET_PCIDMA);
-+	msleep(10);
-+
-+	reg &= ~AR2315_RESET_PCIDMA;
-+	ar231x_write_reg(AR2315_RESET, reg);
-+	msleep(10);
-+
-+	ar231x_mask_reg(AR2315_ENDIAN_CTL, 0,
-+		AR2315_CONFIG_PCIAHB | AR2315_CONFIG_PCIAHB_BRIDGE);
-+
-+	ar231x_write_reg(AR2315_PCICLK, AR2315_PCICLK_PLLC_CLKM |
-+		(AR2315_PCICLK_IN_FREQ_DIV_6 << AR2315_PCICLK_DIV_S));
-+	ar231x_mask_reg(AR2315_AHB_ARB_CTL, 0, AR2315_ARB_PCI);
-+	ar231x_mask_reg(AR2315_IF_CTL, AR2315_IF_PCI_CLK_MASK | AR2315_IF_MASK,
-+		AR2315_IF_PCI | AR2315_IF_PCI_HOST | AR2315_IF_PCI_INTR |
-+		 (AR2315_IF_PCI_CLK_OUTPUT_CLK << AR2315_IF_PCI_CLK_SHIFT));
-+
-+	/* Reset the PCI bus by setting bits 5-4 in PCI_MCFG */
-+	ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_RST_MODE,
-+		AR2315_PCIRST_LOW);
-+	msleep(100);
-+
-+	/* Bring the PCI out of reset */
-+	ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_RST_MODE,
-+		AR2315_PCIRST_HIGH | AR2315_PCICACHE_DIS | 0x8);
-+
-+	ar231x_write_reg(AR2315_PCI_UNCACHE_CFG,
-+			0x1E | /* 1GB uncached */
-+			(1 << 5) | /* Enable uncached */
-+			(0x2 << 30) /* Base: 0x80000000 */
-+	);
-+	ar231x_read_reg(AR2315_PCI_UNCACHE_CFG);
-+
-+	msleep(500);
-+
-+	/* dirty hack - anyone with a datasheet that knows the memory map ? */
-+	ioport_resource.start = 0x10000000;
-+	ioport_resource.end = 0xffffffff;
-+	iomem_resource.start = 0x10000000;
-+	iomem_resource.end = 0xffffffff;
-+
-+	register_pci_controller(&ar231x_pci_controller);
-+
-+	return 0;
-+}
-+
-+arch_initcall(ar2315_pci_init);
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/prom.c linux-2.6.39-rc7/arch/mips/ar231x/prom.c
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/prom.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/prom.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,37 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright MontaVista Software Inc
-+ * Copyright (C) 2003 Atheros Communications, Inc.,  All Rights Reserved.
-+ * Copyright (C) 2006 FON Technology, SL.
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
-+ */
-+
-+/*
-+ * Prom setup file for ar531x
-+ */
-+
-+#include <linux/init.h>
-+#include <generated/autoconf.h>
-+#include <linux/kernel.h>
-+#include <linux/string.h>
-+#include <linux/mm.h>
-+#include <linux/bootmem.h>
-+
-+#include <asm/bootinfo.h>
-+#include <asm/addrspace.h>
-+#include "ar5312.h"
-+#include "ar2315.h"
-+
-+void __init prom_init(void)
-+{
-+	ar5312_prom_init();
-+	ar2315_prom_init();
-+}
-+
-+void __init prom_free_prom_memory(void)
-+{
-+}
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/reset.c linux-2.6.39-rc7/arch/mips/ar231x/reset.c
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/reset.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/reset.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,161 @@
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/timer.h>
-+#include <linux/interrupt.h>
-+#include <linux/kobject.h>
-+#include <linux/workqueue.h>
-+#include <linux/skbuff.h>
-+#include <linux/netlink.h>
-+#include <net/sock.h>
-+#include <asm/uaccess.h>
-+#include <ar231x_platform.h>
-+#include <ar231x.h>
-+#include <gpio.h>
-+#include "devices.h"
-+
-+#define AR531X_RESET_GPIO_IRQ	(AR531X_GPIO_IRQ(ar231x_board.config->resetConfigGpio))
-+
-+struct event_t {
-+	struct work_struct wq;
-+	int set;
-+	unsigned long jiffies;
-+};
-+
-+static struct timer_list rst_button_timer;
-+static unsigned long seen;
-+
-+struct sock *uevent_sock = NULL;
-+EXPORT_SYMBOL_GPL(uevent_sock);
-+extern u64 uevent_next_seqnum(void);
-+
-+static int no_release_workaround = 1;
-+module_param(no_release_workaround, int, 0);
-+
-+static inline void
-+add_msg(struct sk_buff *skb, char *msg)
-+{
-+	char *scratch;
-+	scratch = skb_put(skb, strlen(msg) + 1);
-+	sprintf(scratch, msg);
-+}
-+
-+static void
-+hotplug_button(struct work_struct *wq)
-+{
-+	struct sk_buff *skb;
-+	struct event_t *event;
-+	size_t len;
-+	char *scratch, *s;
-+	char buf[128];
-+
-+	event = container_of(wq, struct event_t, wq);
-+	if (!uevent_sock)
-+		goto done;
-+
-+	/* allocate message with the maximum possible size */
-+	s = event->set ? "pressed" : "released";
-+	len = strlen(s) + 2;
-+	skb = alloc_skb(NLMSG_GOODSIZE, GFP_KERNEL);
-+	if (!skb)
-+		goto done;
-+
-+	/* add header */
-+	scratch = skb_put(skb, len);
-+	sprintf(scratch, "%s@",s);
-+
-+	/* copy keys to our continuous event payload buffer */
-+	add_msg(skb, "HOME=/");
-+	add_msg(skb, "PATH=/sbin:/bin:/usr/sbin:/usr/bin");
-+	add_msg(skb, "SUBSYSTEM=button");
-+	add_msg(skb, "BUTTON=reset");
-+	add_msg(skb, (event->set ? "ACTION=pressed" : "ACTION=released"));
-+	sprintf(buf, "SEEN=%ld", (event->jiffies - seen)/HZ);
-+	add_msg(skb, buf);
-+	snprintf(buf, 128, "SEQNUM=%llu", uevent_next_seqnum());
-+	add_msg(skb, buf);
-+
-+	NETLINK_CB(skb).dst_group = 1;
-+	netlink_broadcast(uevent_sock, skb, 0, 1, GFP_KERNEL);
-+
-+done:
-+	kfree(event);
-+}
-+
-+static void
-+reset_button_poll(unsigned long unused)
-+{
-+	struct event_t *event;
-+	int gpio = ~0;
-+
-+	if(!no_release_workaround)
-+		return;
-+
-+	gpio = ar231x_gpiodev->get();
-+	gpio &= (1 << (AR531X_RESET_GPIO_IRQ - AR531X_GPIO_IRQ_BASE));
-+	if(gpio) {
-+		rst_button_timer.expires = jiffies + (HZ / 4);
-+		add_timer(&rst_button_timer);
-+		return;
-+	}
-+
-+	event = (struct event_t *) kzalloc(sizeof(struct event_t), GFP_ATOMIC);
-+	if (!event)
-+		return;
-+
-+	event->set = 0;
-+	event->jiffies = jiffies;
-+	INIT_WORK(&event->wq, hotplug_button);
-+	schedule_work(&event->wq);
-+}
-+
-+static irqreturn_t
-+button_handler(int irq, void *dev_id)
-+{
-+	static int pressed = 0;
-+	struct event_t *event;
-+	u32 gpio = ~0;
-+
-+	event = (struct event_t *) kzalloc(sizeof(struct event_t), GFP_ATOMIC);
-+	if (!event)
-+		return IRQ_NONE;
-+
-+	pressed = !pressed;
-+
-+	gpio = ar231x_gpiodev->get() & (1 << (irq - AR531X_GPIO_IRQ_BASE));
-+
-+	event->set = gpio;
-+	if(!event->set)
-+		no_release_workaround = 0;
-+
-+	event->jiffies = jiffies;
-+
-+	INIT_WORK(&event->wq, hotplug_button);
-+	schedule_work(&event->wq);
-+
-+	seen = jiffies;
-+	if(event->set && no_release_workaround)
-+		mod_timer(&rst_button_timer, jiffies + (HZ / 4));
-+
-+	return IRQ_HANDLED;
-+}
-+
-+
-+static int __init
-+ar231x_init_reset(void)
-+{
-+	seen = jiffies;
-+
-+	if (ar231x_board.config->resetConfigGpio == 0xffff)
-+		return -ENODEV;
-+
-+	init_timer(&rst_button_timer);
-+	rst_button_timer.function = reset_button_poll;
-+	rst_button_timer.expires = jiffies + HZ / 50;
-+	add_timer(&rst_button_timer);
-+
-+	request_irq(AR531X_RESET_GPIO_IRQ, &button_handler, IRQF_SAMPLE_RANDOM, "ar231x_reset", NULL);
-+
-+	return 0;
-+}
-+
-+module_init(ar231x_init_reset);
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar2315_regs.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar2315_regs.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar2315_regs.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar2315_regs.h	2011-05-15 21:44:12.000000000 +0200
-@@ -0,0 +1,580 @@
-+/*
-+ * Register definitions for AR2315+
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2003 Atheros Communications, Inc.,  All Rights Reserved.
-+ * Copyright (C) 2006 FON Technology, SL.
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006-2008 Felix Fietkau <nbd@openwrt.org>
-+ */
-+
-+#ifndef __AR2315_REG_H
-+#define __AR2315_REG_H
-+
-+/*
-+ * IRQs
-+ */
-+#define AR2315_IRQ_MISC_INTRS   MIPS_CPU_IRQ_BASE+2 /* C0_CAUSE: 0x0400 */
-+#define AR2315_IRQ_WLAN0_INTRS  MIPS_CPU_IRQ_BASE+3 /* C0_CAUSE: 0x0800 */
-+#define AR2315_IRQ_ENET0_INTRS  MIPS_CPU_IRQ_BASE+4 /* C0_CAUSE: 0x1000 */
-+#define AR2315_IRQ_LCBUS_PCI    MIPS_CPU_IRQ_BASE+5 /* C0_CAUSE: 0x2000 */
-+#define AR2315_IRQ_WLAN0_POLL   MIPS_CPU_IRQ_BASE+6 /* C0_CAUSE: 0x4000 */
-+
-+/*
-+ * Address map
-+ */
-+#define AR2315_SPI_READ         0x08000000      /* SPI FLASH */
-+#define AR2315_WLAN0            0x10000000      /* Wireless MMR */
-+#define AR2315_PCI              0x10100000      /* PCI MMR */
-+#define AR2315_SDRAMCTL         0x10300000      /* SDRAM MMR */
-+#define AR2315_LOCAL            0x10400000      /* LOCAL BUS MMR */
-+#define AR2315_ENET0            0x10500000      /* ETHERNET MMR */
-+#define AR2315_DSLBASE          0x11000000      /* RESET CONTROL MMR */
-+#define AR2315_UART0            0x11100003      /* UART MMR */
-+#define AR2315_SPI              0x11300000      /* SPI FLASH MMR */
-+#define AR2315_PCIEXT           0x80000000      /* pci external */
-+
-+/*
-+ * Reset Register
-+ */
-+#define AR2315_COLD_RESET       (AR2315_DSLBASE + 0x0000)
-+
-+#define AR2315_RESET_COLD_AHB              0x00000001
-+#define AR2315_RESET_COLD_APB              0x00000002
-+#define AR2315_RESET_COLD_CPU              0x00000004
-+#define AR2315_RESET_COLD_CPUWARM          0x00000008
-+#define AR2315_RESET_SYSTEM                (RESET_COLD_CPU | RESET_COLD_APB | RESET_COLD_AHB)      /* full system */
-+#define AR2317_RESET_SYSTEM                0x00000010
-+
-+
-+#define AR2315_RESET            (AR2315_DSLBASE + 0x0004)
-+
-+#define AR2315_RESET_WARM_WLAN0_MAC        0x00000001      /* warm reset WLAN0 MAC */
-+#define AR2315_RESET_WARM_WLAN0_BB         0x00000002      /* warm reset WLAN0 BaseBand */
-+#define AR2315_RESET_MPEGTS_RSVD           0x00000004      /* warm reset MPEG-TS */
-+#define AR2315_RESET_PCIDMA                0x00000008      /* warm reset PCI ahb/dma */
-+#define AR2315_RESET_MEMCTL                0x00000010      /* warm reset memory controller */
-+#define AR2315_RESET_LOCAL                 0x00000020      /* warm reset local bus */
-+#define AR2315_RESET_I2C_RSVD              0x00000040      /* warm reset I2C bus */
-+#define AR2315_RESET_SPI                   0x00000080      /* warm reset SPI interface */
-+#define AR2315_RESET_UART0                 0x00000100      /* warm reset UART0 */
-+#define AR2315_RESET_IR_RSVD               0x00000200      /* warm reset IR interface */
-+#define AR2315_RESET_EPHY0                 0x00000400      /* cold reset ENET0 phy */
-+#define AR2315_RESET_ENET0                 0x00000800      /* cold reset ENET0 mac */
-+
-+/*
-+ * AHB master arbitration control
-+ */
-+#define AR2315_AHB_ARB_CTL      (AR2315_DSLBASE + 0x0008)
-+
-+#define AR2315_ARB_CPU                     0x00000001      /* CPU, default */
-+#define AR2315_ARB_WLAN                    0x00000002      /* WLAN */
-+#define AR2315_ARB_MPEGTS_RSVD             0x00000004      /* MPEG-TS */
-+#define AR2315_ARB_LOCAL                   0x00000008      /* LOCAL */
-+#define AR2315_ARB_PCI                     0x00000010      /* PCI */
-+#define AR2315_ARB_ETHERNET                0x00000020      /* Ethernet */
-+#define AR2315_ARB_RETRY                   0x00000100      /* retry policy, debug only */
-+
-+/*
-+ * Config Register
-+ */
-+#define AR2315_ENDIAN_CTL       (AR2315_DSLBASE + 0x000c)
-+
-+#define AR2315_CONFIG_AHB                  0x00000001      /* EC - AHB bridge endianess */
-+#define AR2315_CONFIG_WLAN                 0x00000002      /* WLAN byteswap */
-+#define AR2315_CONFIG_MPEGTS_RSVD          0x00000004      /* MPEG-TS byteswap */
-+#define AR2315_CONFIG_PCI                  0x00000008      /* PCI byteswap */
-+#define AR2315_CONFIG_MEMCTL               0x00000010      /* Memory controller endianess */
-+#define AR2315_CONFIG_LOCAL                0x00000020      /* Local bus byteswap */
-+#define AR2315_CONFIG_ETHERNET             0x00000040      /* Ethernet byteswap */
-+
-+#define AR2315_CONFIG_MERGE                0x00000200      /* CPU write buffer merge */
-+#define AR2315_CONFIG_CPU                  0x00000400      /* CPU big endian */
-+#define AR2315_CONFIG_PCIAHB               0x00000800
-+#define AR2315_CONFIG_PCIAHB_BRIDGE        0x00001000
-+#define AR2315_CONFIG_SPI                  0x00008000      /* SPI byteswap */
-+#define AR2315_CONFIG_CPU_DRAM             0x00010000
-+#define AR2315_CONFIG_CPU_PCI              0x00020000
-+#define AR2315_CONFIG_CPU_MMR              0x00040000
-+#define AR2315_CONFIG_BIG                  0x00000400
-+
-+
-+/*
-+ * NMI control
-+ */
-+#define AR2315_NMI_CTL          (AR2315_DSLBASE + 0x0010)
-+
-+#define AR2315_NMI_EN  1
-+
-+/*
-+ * Revision Register - Initial value is 0x3010 (WMAC 3.0, AR531X 1.0).
-+ */
-+#define AR2315_SREV             (AR2315_DSLBASE + 0x0014)
-+
-+#define AR2315_REV_MAJ                     0x00f0
-+#define AR2315_REV_MAJ_S                   4
-+#define AR2315_REV_MIN                     0x000f
-+#define AR2315_REV_MIN_S                   0
-+#define AR2315_REV_CHIP                    (AR2315_REV_MAJ|AR2315_REV_MIN)
-+
-+/*
-+ * Interface Enable
-+ */
-+#define AR2315_IF_CTL           (AR2315_DSLBASE + 0x0018)
-+
-+#define AR2315_IF_MASK                     0x00000007
-+#define AR2315_IF_DISABLED                 0
-+#define AR2315_IF_PCI                      1
-+#define AR2315_IF_TS_LOCAL                 2
-+#define AR2315_IF_ALL                      3   /* only for emulation with separate pins */
-+#define AR2315_IF_LOCAL_HOST               0x00000008
-+#define AR2315_IF_PCI_HOST                 0x00000010
-+#define AR2315_IF_PCI_INTR                 0x00000020
-+#define AR2315_IF_PCI_CLK_MASK             0x00030000
-+#define AR2315_IF_PCI_CLK_INPUT            0
-+#define AR2315_IF_PCI_CLK_OUTPUT_LOW       1
-+#define AR2315_IF_PCI_CLK_OUTPUT_CLK       2
-+#define AR2315_IF_PCI_CLK_OUTPUT_HIGH      3
-+#define AR2315_IF_PCI_CLK_SHIFT            16
-+
-+/*
-+ * APB Interrupt control
-+ */
-+
-+#define AR2315_ISR              (AR2315_DSLBASE + 0x0020)
-+#define AR2315_IMR              (AR2315_DSLBASE + 0x0024)
-+#define AR2315_GISR             (AR2315_DSLBASE + 0x0028)
-+
-+#define AR2315_ISR_UART0                   0x0001           /* high speed UART */
-+#define AR2315_ISR_I2C_RSVD                0x0002           /* I2C bus */
-+#define AR2315_ISR_SPI                     0x0004           /* SPI bus */
-+#define AR2315_ISR_AHB                     0x0008           /* AHB error */
-+#define AR2315_ISR_APB                     0x0010           /* APB error */
-+#define AR2315_ISR_TIMER                   0x0020           /* timer */
-+#define AR2315_ISR_GPIO                    0x0040           /* GPIO */
-+#define AR2315_ISR_WD                      0x0080           /* watchdog */
-+#define AR2315_ISR_IR_RSVD                 0x0100           /* IR */
-+
-+#define AR2315_GISR_MISC                   0x0001
-+#define AR2315_GISR_WLAN0                  0x0002
-+#define AR2315_GISR_MPEGTS_RSVD            0x0004
-+#define AR2315_GISR_LOCALPCI               0x0008
-+#define AR2315_GISR_WMACPOLL               0x0010
-+#define AR2315_GISR_TIMER                  0x0020
-+#define AR2315_GISR_ETHERNET               0x0040
-+
-+/*
-+ * Interrupt routing from IO to the processor IP bits
-+ * Define our inter mask and level
-+ */
-+#define AR2315_INTR_MISCIO      SR_IBIT3
-+#define AR2315_INTR_WLAN0       SR_IBIT4
-+#define AR2315_INTR_ENET0       SR_IBIT5
-+#define AR2315_INTR_LOCALPCI    SR_IBIT6
-+#define AR2315_INTR_WMACPOLL    SR_IBIT7
-+#define AR2315_INTR_COMPARE     SR_IBIT8
-+
-+/*
-+ * Timers
-+ */
-+#define AR2315_TIMER            (AR2315_DSLBASE + 0x0030)
-+#define AR2315_RELOAD           (AR2315_DSLBASE + 0x0034)
-+#define AR2315_WD               (AR2315_DSLBASE + 0x0038)
-+#define AR2315_WDC              (AR2315_DSLBASE + 0x003c)
-+
-+#define AR2315_WDC_IGNORE_EXPIRATION       0x00000000
-+#define AR2315_WDC_NMI                     0x00000001               /* NMI on watchdog */
-+#define AR2315_WDC_RESET                   0x00000002               /* reset on watchdog */
-+
-+/*
-+ * CPU Performance Counters
-+ */
-+#define AR2315_PERFCNT0         (AR2315_DSLBASE + 0x0048)
-+#define AR2315_PERFCNT1         (AR2315_DSLBASE + 0x004c)
-+
-+#define AR2315_PERF0_DATAHIT                0x0001  /* Count Data Cache Hits */
-+#define AR2315_PERF0_DATAMISS               0x0002  /* Count Data Cache Misses */
-+#define AR2315_PERF0_INSTHIT                0x0004  /* Count Instruction Cache Hits */
-+#define AR2315_PERF0_INSTMISS               0x0008  /* Count Instruction Cache Misses */
-+#define AR2315_PERF0_ACTIVE                 0x0010  /* Count Active Processor Cycles */
-+#define AR2315_PERF0_WBHIT                  0x0020  /* Count CPU Write Buffer Hits */
-+#define AR2315_PERF0_WBMISS                 0x0040  /* Count CPU Write Buffer Misses */
-+
-+#define AR2315_PERF1_EB_ARDY                0x0001  /* Count EB_ARdy signal */
-+#define AR2315_PERF1_EB_AVALID              0x0002  /* Count EB_AValid signal */
-+#define AR2315_PERF1_EB_WDRDY               0x0004  /* Count EB_WDRdy signal */
-+#define AR2315_PERF1_EB_RDVAL               0x0008  /* Count EB_RdVal signal */
-+#define AR2315_PERF1_VRADDR                 0x0010  /* Count valid read address cycles */
-+#define AR2315_PERF1_VWADDR                 0x0020  /* Count valid write address cycles */
-+#define AR2315_PERF1_VWDATA                 0x0040  /* Count valid write data cycles */
-+
-+/*
-+ * AHB Error Reporting.
-+ */
-+#define AR2315_AHB_ERR0         (AR2315_DSLBASE + 0x0050)  /* error  */
-+#define AR2315_AHB_ERR1         (AR2315_DSLBASE + 0x0054)  /* haddr  */
-+#define AR2315_AHB_ERR2         (AR2315_DSLBASE + 0x0058)  /* hwdata */
-+#define AR2315_AHB_ERR3         (AR2315_DSLBASE + 0x005c)  /* hrdata */
-+#define AR2315_AHB_ERR4         (AR2315_DSLBASE + 0x0060)  /* status */
-+
-+#define AHB_ERROR_DET               1   /* AHB Error has been detected,          */
-+                                        /* write 1 to clear all bits in ERR0     */
-+#define AHB_ERROR_OVR               2   /* AHB Error overflow has been detected  */
-+#define AHB_ERROR_WDT               4   /* AHB Error due to wdt instead of hresp */
-+
-+#define AR2315_PROCERR_HMAST               0x0000000f
-+#define AR2315_PROCERR_HMAST_DFLT          0
-+#define AR2315_PROCERR_HMAST_WMAC          1
-+#define AR2315_PROCERR_HMAST_ENET          2
-+#define AR2315_PROCERR_HMAST_PCIENDPT      3
-+#define AR2315_PROCERR_HMAST_LOCAL         4
-+#define AR2315_PROCERR_HMAST_CPU           5
-+#define AR2315_PROCERR_HMAST_PCITGT        6
-+
-+#define AR2315_PROCERR_HMAST_S             0
-+#define AR2315_PROCERR_HWRITE              0x00000010
-+#define AR2315_PROCERR_HSIZE               0x00000060
-+#define AR2315_PROCERR_HSIZE_S             5
-+#define AR2315_PROCERR_HTRANS              0x00000180
-+#define AR2315_PROCERR_HTRANS_S            7
-+#define AR2315_PROCERR_HBURST              0x00000e00
-+#define AR2315_PROCERR_HBURST_S            9
-+
-+/*
-+ * Clock Control
-+ */
-+#define AR2315_PLLC_CTL         (AR2315_DSLBASE + 0x0064)
-+#define AR2315_PLLV_CTL         (AR2315_DSLBASE + 0x0068)
-+#define AR2315_CPUCLK           (AR2315_DSLBASE + 0x006c)
-+#define AR2315_AMBACLK          (AR2315_DSLBASE + 0x0070)
-+#define AR2315_SYNCCLK          (AR2315_DSLBASE + 0x0074)
-+#define AR2315_DSL_SLEEP_CTL    (AR2315_DSLBASE + 0x0080)
-+#define AR2315_DSL_SLEEP_DUR    (AR2315_DSLBASE + 0x0084)
-+
-+/* PLLc Control fields */
-+#define PLLC_REF_DIV_M              0x00000003
-+#define PLLC_REF_DIV_S              0
-+#define PLLC_FDBACK_DIV_M           0x0000007C
-+#define PLLC_FDBACK_DIV_S           2
-+#define PLLC_ADD_FDBACK_DIV_M       0x00000080
-+#define PLLC_ADD_FDBACK_DIV_S       7
-+#define PLLC_CLKC_DIV_M             0x0001c000
-+#define PLLC_CLKC_DIV_S             14
-+#define PLLC_CLKM_DIV_M             0x00700000
-+#define PLLC_CLKM_DIV_S             20
-+
-+/* CPU CLK Control fields */
-+#define CPUCLK_CLK_SEL_M            0x00000003
-+#define CPUCLK_CLK_SEL_S            0
-+#define CPUCLK_CLK_DIV_M            0x0000000c
-+#define CPUCLK_CLK_DIV_S            2
-+
-+/* AMBA CLK Control fields */
-+#define AMBACLK_CLK_SEL_M           0x00000003
-+#define AMBACLK_CLK_SEL_S           0
-+#define AMBACLK_CLK_DIV_M           0x0000000c
-+#define AMBACLK_CLK_DIV_S           2
-+
-+/*
-+ * GPIO
-+ */
-+#define AR2315_GPIO_DI          (AR2315_DSLBASE + 0x0088)
-+#define AR2315_GPIO_DO          (AR2315_DSLBASE + 0x0090)
-+#define AR2315_GPIO_CR          (AR2315_DSLBASE + 0x0098)
-+#define AR2315_GPIO_INT         (AR2315_DSLBASE + 0x00a0)
-+
-+#define AR2315_GPIO_CR_M(x)                (1 << (x))                  /* mask for i/o */
-+#define AR2315_GPIO_CR_O(x)                (1 << (x))                  /* output */
-+#define AR2315_GPIO_CR_I(x)                (0)                         /* input */
-+
-+#define AR2315_GPIO_INT_S(x)               (x)                         /* interrupt enable */
-+#define AR2315_GPIO_INT_M                  (0x3F)                      /* mask for int */
-+#define AR2315_GPIO_INT_LVL(x)             ((x) << 6)                  /* interrupt level */
-+#define AR2315_GPIO_INT_LVL_M              ((0x3) << 6)                /* mask for int level */
-+
-+#define AR2315_GPIO_INT_MAX_Y				1   /* Maximum value of Y for AR5313_GPIO_INT_* macros */
-+#define AR2315_GPIO_INT_LVL_OFF				0   /* Triggerring off */
-+#define AR2315_GPIO_INT_LVL_LOW				1   /* Low Level Triggered */
-+#define AR2315_GPIO_INT_LVL_HIGH			2   /* High Level Triggered */
-+#define AR2315_GPIO_INT_LVL_EDGE			3   /* Edge Triggered */
-+
-+#define AR2315_RESET_GPIO       5
-+#define AR2315_NUM_GPIO         22
-+
-+/*
-+ *  PCI Clock Control
-+ */
-+#define AR2315_PCICLK           (AR2315_DSLBASE + 0x00a4)
-+
-+#define AR2315_PCICLK_INPUT_M              0x3
-+#define AR2315_PCICLK_INPUT_S              0
-+
-+#define AR2315_PCICLK_PLLC_CLKM            0
-+#define AR2315_PCICLK_PLLC_CLKM1           1
-+#define AR2315_PCICLK_PLLC_CLKC            2
-+#define AR2315_PCICLK_REF_CLK              3
-+
-+#define AR2315_PCICLK_DIV_M                0xc
-+#define AR2315_PCICLK_DIV_S                2
-+
-+#define AR2315_PCICLK_IN_FREQ              0
-+#define AR2315_PCICLK_IN_FREQ_DIV_6        1
-+#define AR2315_PCICLK_IN_FREQ_DIV_8        2
-+#define AR2315_PCICLK_IN_FREQ_DIV_10       3
-+
-+/*
-+ * Observation Control Register
-+ */
-+#define AR2315_OCR              (AR2315_DSLBASE + 0x00b0)
-+#define OCR_GPIO0_IRIN              0x0040
-+#define OCR_GPIO1_IROUT             0x0080
-+#define OCR_GPIO3_RXCLR             0x0200
-+
-+/*
-+ *  General Clock Control
-+ */
-+
-+#define AR2315_MISCCLK          (AR2315_DSLBASE + 0x00b4)
-+#define MISCCLK_PLLBYPASS_EN        0x00000001
-+#define MISCCLK_PROCREFCLK          0x00000002
-+
-+/*
-+ * SDRAM Controller
-+ *   - No read or write buffers are included.
-+ */
-+#define AR2315_MEM_CFG          (AR2315_SDRAMCTL + 0x00)
-+#define AR2315_MEM_CTRL         (AR2315_SDRAMCTL + 0x0c)
-+#define AR2315_MEM_REF          (AR2315_SDRAMCTL + 0x10)
-+
-+#define SDRAM_DATA_WIDTH_M          0x00006000
-+#define SDRAM_DATA_WIDTH_S          13
-+
-+#define SDRAM_COL_WIDTH_M           0x00001E00
-+#define SDRAM_COL_WIDTH_S           9
-+
-+#define SDRAM_ROW_WIDTH_M           0x000001E0
-+#define SDRAM_ROW_WIDTH_S           5
-+
-+#define SDRAM_BANKADDR_BITS_M       0x00000018
-+#define SDRAM_BANKADDR_BITS_S       3
-+
-+/*
-+ * SPI Flash Interface Registers
-+ */
-+
-+#define AR2315_SPI_CTL      (AR2315_SPI + 0x00)
-+#define AR2315_SPI_OPCODE   (AR2315_SPI + 0x04)
-+#define AR2315_SPI_DATA     (AR2315_SPI + 0x08)
-+
-+#define SPI_CTL_START           0x00000100
-+#define SPI_CTL_BUSY            0x00010000
-+#define SPI_CTL_TXCNT_MASK      0x0000000f
-+#define SPI_CTL_RXCNT_MASK      0x000000f0
-+#define SPI_CTL_TX_RX_CNT_MASK  0x000000ff
-+#define SPI_CTL_SIZE_MASK       0x00060000
-+
-+#define SPI_CTL_CLK_SEL_MASK    0x03000000
-+#define SPI_OPCODE_MASK         0x000000ff
-+
-+/*
-+ * PCI Bus Interface Registers
-+ */
-+#define AR2315_PCI_1MS_REG      (AR2315_PCI + 0x0008)
-+#define AR2315_PCI_1MS_MASK     0x3FFFF         /* # of AHB clk cycles in 1ms */
-+
-+#define AR2315_PCI_MISC_CONFIG  (AR2315_PCI + 0x000c)
-+#define AR2315_PCIMISC_TXD_EN   0x00000001      /* Enable TXD for fragments */
-+#define AR2315_PCIMISC_CFG_SEL  0x00000002      /* mem or config cycles */
-+#define AR2315_PCIMISC_GIG_MASK 0x0000000C      /* bits 31-30 for pci req */
-+#define AR2315_PCIMISC_RST_MODE 0x00000030
-+#define AR2315_PCIRST_INPUT     0x00000000      /* 4:5=0 rst is input */
-+#define AR2315_PCIRST_LOW       0x00000010      /* 4:5=1 rst to GND */
-+#define AR2315_PCIRST_HIGH      0x00000020      /* 4:5=2 rst to VDD */
-+#define AR2315_PCIGRANT_EN      0x00000000      /* 6:7=0 early grant en */
-+#define AR2315_PCIGRANT_FRAME   0x00000040      /* 6:7=1 grant waits 4 frame */
-+#define AR2315_PCIGRANT_IDLE    0x00000080      /* 6:7=2 grant waits 4 idle */
-+#define AR2315_PCIGRANT_GAP     0x00000000      /* 6:7=2 grant waits 4 idle */
-+#define AR2315_PCICACHE_DIS     0x00001000      /* PCI external access cache disable */
-+
-+#define AR2315_PCI_OUT_TSTAMP   (AR2315_PCI + 0x0010)
-+
-+#define AR2315_PCI_UNCACHE_CFG  (AR2315_PCI + 0x0014)
-+
-+#define AR2315_PCI_IN_EN        (AR2315_PCI + 0x0100)
-+#define AR2315_PCI_IN_EN0       0x01            /* Enable chain 0 */
-+#define AR2315_PCI_IN_EN1       0x02            /* Enable chain 1 */
-+#define AR2315_PCI_IN_EN2       0x04            /* Enable chain 2 */
-+#define AR2315_PCI_IN_EN3       0x08            /* Enable chain 3 */
-+
-+#define AR2315_PCI_IN_DIS       (AR2315_PCI + 0x0104)
-+#define AR2315_PCI_IN_DIS0      0x01            /* Disable chain 0 */
-+#define AR2315_PCI_IN_DIS1      0x02            /* Disable chain 1 */
-+#define AR2315_PCI_IN_DIS2      0x04            /* Disable chain 2 */
-+#define AR2315_PCI_IN_DIS3      0x08            /* Disable chain 3 */
-+
-+#define AR2315_PCI_IN_PTR       (AR2315_PCI + 0x0200)
-+
-+#define AR2315_PCI_OUT_EN       (AR2315_PCI + 0x0400)
-+#define AR2315_PCI_OUT_EN0      0x01            /* Enable chain 0 */
-+
-+#define AR2315_PCI_OUT_DIS      (AR2315_PCI + 0x0404)
-+#define AR2315_PCI_OUT_DIS0     0x01            /* Disable chain 0 */
-+
-+#define AR2315_PCI_OUT_PTR      (AR2315_PCI + 0x0408)
-+
-+#define AR2315_PCI_INT_STATUS   (AR2315_PCI + 0x0500)   /* write one to clr */
-+#define AR2315_PCI_TXINT        0x00000001      /* Desc In Completed */
-+#define AR2315_PCI_TXOK         0x00000002      /* Desc In OK */
-+#define AR2315_PCI_TXERR        0x00000004      /* Desc In ERR */
-+#define AR2315_PCI_TXEOL        0x00000008      /* Desc In End-of-List */
-+#define AR2315_PCI_RXINT        0x00000010      /* Desc Out Completed */
-+#define AR2315_PCI_RXOK         0x00000020      /* Desc Out OK */
-+#define AR2315_PCI_RXERR        0x00000040      /* Desc Out ERR */
-+#define AR2315_PCI_RXEOL        0x00000080      /* Desc Out EOL */
-+#define AR2315_PCI_TXOOD        0x00000200      /* Desc In Out-of-Desc */
-+#define AR2315_PCI_MASK         0x0000FFFF      /* Desc Mask */
-+#define AR2315_PCI_EXT_INT      0x02000000
-+#define AR2315_PCI_ABORT_INT    0x04000000
-+
-+#define AR2315_PCI_INT_MASK     (AR2315_PCI + 0x0504)   /* same as INT_STATUS */
-+
-+#define AR2315_PCI_INTEN_REG    (AR2315_PCI + 0x0508)
-+#define AR2315_PCI_INT_DISABLE  0x00            /* disable pci interrupts */
-+#define AR2315_PCI_INT_ENABLE   0x01            /* enable pci interrupts */
-+
-+#define AR2315_PCI_HOST_IN_EN   (AR2315_PCI + 0x0800)
-+#define AR2315_PCI_HOST_IN_DIS  (AR2315_PCI + 0x0804)
-+#define AR2315_PCI_HOST_IN_PTR  (AR2315_PCI + 0x0810)
-+#define AR2315_PCI_HOST_OUT_EN  (AR2315_PCI + 0x0900)
-+#define AR2315_PCI_HOST_OUT_DIS (AR2315_PCI + 0x0904)
-+#define AR2315_PCI_HOST_OUT_PTR (AR2315_PCI + 0x0908)
-+
-+
-+/*
-+ * Local Bus Interface Registers
-+ */
-+#define AR2315_LB_CONFIG        (AR2315_LOCAL + 0x0000)
-+#define AR2315_LBCONF_OE        0x00000001      /* =1 OE is low-true */
-+#define AR2315_LBCONF_CS0       0x00000002      /* =1 first CS is low-true */
-+#define AR2315_LBCONF_CS1       0x00000004      /* =1 2nd CS is low-true */
-+#define AR2315_LBCONF_RDY       0x00000008      /* =1 RDY is low-true */
-+#define AR2315_LBCONF_WE        0x00000010      /* =1 Write En is low-true */
-+#define AR2315_LBCONF_WAIT      0x00000020      /* =1 WAIT is low-true */
-+#define AR2315_LBCONF_ADS       0x00000040      /* =1 Adr Strobe is low-true */
-+#define AR2315_LBCONF_MOT       0x00000080      /* =0 Intel, =1 Motorola */
-+#define AR2315_LBCONF_8CS       0x00000100      /* =1 8 bits CS, 0= 16bits */
-+#define AR2315_LBCONF_8DS       0x00000200      /* =1 8 bits Data S, 0=16bits */
-+#define AR2315_LBCONF_ADS_EN    0x00000400      /* =1 Enable ADS */
-+#define AR2315_LBCONF_ADR_OE    0x00000800      /* =1 Adr cap on OE, WE or DS */
-+#define AR2315_LBCONF_ADDT_MUX  0x00001000      /* =1 Adr and Data share bus */
-+#define AR2315_LBCONF_DATA_OE   0x00002000      /* =1 Data cap on OE, WE, DS */
-+#define AR2315_LBCONF_16DATA    0x00004000      /* =1 Data is 16 bits wide */
-+#define AR2315_LBCONF_SWAPDT    0x00008000      /* =1 Byte swap data */
-+#define AR2315_LBCONF_SYNC      0x00010000      /* =1 Bus synchronous to clk */
-+#define AR2315_LBCONF_INT       0x00020000      /* =1 Intr is low true */
-+#define AR2315_LBCONF_INT_CTR0  0x00000000      /* GND high-Z, Vdd is high-Z */
-+#define AR2315_LBCONF_INT_CTR1  0x00040000      /* GND drive, Vdd is high-Z */
-+#define AR2315_LBCONF_INT_CTR2  0x00080000      /* GND high-Z, Vdd drive */
-+#define AR2315_LBCONF_INT_CTR3  0x000C0000      /* GND drive, Vdd drive */
-+#define AR2315_LBCONF_RDY_WAIT  0x00100000      /* =1 RDY is negative of WAIT */
-+#define AR2315_LBCONF_INT_PULSE 0x00200000      /* =1 Interrupt is a pulse */
-+#define AR2315_LBCONF_ENABLE    0x00400000      /* =1 Falcon respond to LB */
-+
-+#define AR2315_LB_CLKSEL        (AR2315_LOCAL + 0x0004)
-+#define AR2315_LBCLK_EXT        0x0001          /* use external clk for lb */
-+
-+#define AR2315_LB_1MS           (AR2315_LOCAL + 0x0008)
-+#define AR2315_LB1MS_MASK       0x3FFFF         /* # of AHB clk cycles in 1ms */
-+
-+#define AR2315_LB_MISCCFG       (AR2315_LOCAL + 0x000C)
-+#define AR2315_LBM_TXD_EN       0x00000001      /* Enable TXD for fragments */
-+#define AR2315_LBM_RX_INTEN     0x00000002      /* Enable LB ints on RX ready */
-+#define AR2315_LBM_MBOXWR_INTEN 0x00000004      /* Enable LB ints on mbox wr */
-+#define AR2315_LBM_MBOXRD_INTEN 0x00000008      /* Enable LB ints on mbox rd */
-+#define AR2315_LMB_DESCSWAP_EN  0x00000010      /* Byte swap desc enable */
-+#define AR2315_LBM_TIMEOUT_MASK 0x00FFFF80
-+#define AR2315_LBM_TIMEOUT_SHFT 7
-+#define AR2315_LBM_PORTMUX      0x07000000
-+
-+
-+#define AR2315_LB_RXTSOFF       (AR2315_LOCAL + 0x0010)
-+
-+#define AR2315_LB_TX_CHAIN_EN   (AR2315_LOCAL + 0x0100)
-+#define AR2315_LB_TXEN_0        0x01
-+#define AR2315_LB_TXEN_1        0x02
-+#define AR2315_LB_TXEN_2        0x04
-+#define AR2315_LB_TXEN_3        0x08
-+
-+#define AR2315_LB_TX_CHAIN_DIS  (AR2315_LOCAL + 0x0104)
-+#define AR2315_LB_TX_DESC_PTR   (AR2315_LOCAL + 0x0200)
-+
-+#define AR2315_LB_RX_CHAIN_EN   (AR2315_LOCAL + 0x0400)
-+#define AR2315_LB_RXEN          0x01
-+
-+#define AR2315_LB_RX_CHAIN_DIS  (AR2315_LOCAL + 0x0404)
-+#define AR2315_LB_RX_DESC_PTR   (AR2315_LOCAL + 0x0408)
-+
-+#define AR2315_LB_INT_STATUS    (AR2315_LOCAL + 0x0500)
-+#define AR2315_INT_TX_DESC      0x0001
-+#define AR2315_INT_TX_OK        0x0002
-+#define AR2315_INT_TX_ERR       0x0004
-+#define AR2315_INT_TX_EOF       0x0008
-+#define AR2315_INT_RX_DESC      0x0010
-+#define AR2315_INT_RX_OK        0x0020
-+#define AR2315_INT_RX_ERR       0x0040
-+#define AR2315_INT_RX_EOF       0x0080
-+#define AR2315_INT_TX_TRUNC     0x0100
-+#define AR2315_INT_TX_STARVE    0x0200
-+#define AR2315_INT_LB_TIMEOUT   0x0400
-+#define AR2315_INT_LB_ERR       0x0800
-+#define AR2315_INT_MBOX_WR      0x1000
-+#define AR2315_INT_MBOX_RD      0x2000
-+
-+/* Bit definitions for INT MASK are the same as INT_STATUS */
-+#define AR2315_LB_INT_MASK      (AR2315_LOCAL + 0x0504)
-+
-+#define AR2315_LB_INT_EN        (AR2315_LOCAL + 0x0508)
-+#define AR2315_LB_MBOX          (AR2315_LOCAL + 0x0600)
-+
-+/*
-+ * IR Interface Registers
-+ */
-+#define AR2315_IR_PKTDATA                   (AR2315_IR + 0x0000)
-+
-+#define AR2315_IR_PKTLEN                    (AR2315_IR + 0x07fc) /* 0 - 63 */
-+
-+#define AR2315_IR_CONTROL                   (AR2315_IR + 0x0800)
-+#define AR2315_IRCTL_TX                     0x00000000  /* use as tranmitter */
-+#define AR2315_IRCTL_RX                     0x00000001  /* use as receiver   */
-+#define AR2315_IRCTL_SAMPLECLK_MASK         0x00003ffe  /* Sample clk divisor mask */
-+#define AR2315_IRCTL_SAMPLECLK_SHFT                  1
-+#define AR2315_IRCTL_OUTPUTCLK_MASK         0x03ffc000  /* Output clk divisor mask */
-+#define AR2315_IRCTL_OUTPUTCLK_SHFT                 14
-+
-+#define AR2315_IR_STATUS                    (AR2315_IR + 0x0804)
-+#define AR2315_IRSTS_RX                     0x00000001  /* receive in progress */
-+#define AR2315_IRSTS_TX                     0x00000002  /* transmit in progress */
-+
-+#define AR2315_IR_CONFIG                    (AR2315_IR + 0x0808)
-+#define AR2315_IRCFG_INVIN                  0x00000001  /* invert input polarity */
-+#define AR2315_IRCFG_INVOUT                 0x00000002  /* invert output polarity */
-+#define AR2315_IRCFG_SEQ_START_WIN_SEL      0x00000004  /* 1 => 28, 0 => 7 */
-+#define AR2315_IRCFG_SEQ_START_THRESH       0x000000f0  /*  */
-+#define AR2315_IRCFG_SEQ_END_UNIT_SEL       0x00000100  /*  */
-+#define AR2315_IRCFG_SEQ_END_UNIT_THRESH    0x00007e00  /*  */
-+#define AR2315_IRCFG_SEQ_END_WIN_SEL        0x00008000  /*  */
-+#define AR2315_IRCFG_SEQ_END_WIN_THRESH     0x001f0000  /*  */
-+#define AR2315_IRCFG_NUM_BACKOFF_WORDS      0x01e00000  /*  */
-+
-+#define HOST_PCI_DEV_ID         3
-+#define HOST_PCI_MBAR0          0x10000000
-+#define HOST_PCI_MBAR1          0x20000000
-+#define HOST_PCI_MBAR2          0x30000000
-+
-+#define HOST_PCI_SDRAM_BASEADDR HOST_PCI_MBAR1
-+#define PCI_DEVICE_MEM_SPACE    0x800000
-+
-+#endif /* __AR2315_REG_H */
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar2315_spiflash.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar2315_spiflash.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar2315_spiflash.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar2315_spiflash.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,116 @@
-+/*
-+ * SPI Flash Memory support header file.
-+ *
-+ * Copyright (c) 2005, Atheros Communications Inc.
-+ * Copyright (C) 2006 FON Technology, SL.
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
-+ *
-+ * This code is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+#ifndef __AR2315_SPIFLASH_H
-+#define __AR2315_SPIFLASH_H
-+
-+#define STM_PAGE_SIZE           256
-+
-+#define SFI_WRITE_BUFFER_SIZE   4
-+#define SFI_FLASH_ADDR_MASK     0x00ffffff
-+
-+#define STM_8MBIT_SIGNATURE     0x13
-+#define STM_M25P80_BYTE_COUNT   1048576
-+#define STM_M25P80_SECTOR_COUNT 16
-+#define STM_M25P80_SECTOR_SIZE  0x10000
-+
-+#define STM_16MBIT_SIGNATURE    0x14
-+#define STM_M25P16_BYTE_COUNT   2097152
-+#define STM_M25P16_SECTOR_COUNT 32
-+#define STM_M25P16_SECTOR_SIZE  0x10000
-+
-+#define STM_32MBIT_SIGNATURE    0x15
-+#define STM_M25P32_BYTE_COUNT   4194304
-+#define STM_M25P32_SECTOR_COUNT 64
-+#define STM_M25P32_SECTOR_SIZE  0x10000
-+
-+#define STM_64MBIT_SIGNATURE    0x16
-+#define STM_M25P64_BYTE_COUNT   8388608
-+#define STM_M25P64_SECTOR_COUNT 128
-+#define STM_M25P64_SECTOR_SIZE  0x10000
-+
-+#define STM_128MBIT_SIGNATURE   0x17
-+#define STM_M25P128_BYTE_COUNT   16777216
-+#define STM_M25P128_SECTOR_COUNT 256
-+#define STM_M25P128_SECTOR_SIZE  0x10000
-+
-+#define STM_1MB_BYTE_COUNT   STM_M25P80_BYTE_COUNT
-+#define STM_1MB_SECTOR_COUNT STM_M25P80_SECTOR_COUNT
-+#define STM_1MB_SECTOR_SIZE  STM_M25P80_SECTOR_SIZE
-+#define STM_2MB_BYTE_COUNT   STM_M25P16_BYTE_COUNT
-+#define STM_2MB_SECTOR_COUNT STM_M25P16_SECTOR_COUNT
-+#define STM_2MB_SECTOR_SIZE  STM_M25P16_SECTOR_SIZE
-+#define STM_4MB_BYTE_COUNT   STM_M25P32_BYTE_COUNT
-+#define STM_4MB_SECTOR_COUNT STM_M25P32_SECTOR_COUNT
-+#define STM_4MB_SECTOR_SIZE  STM_M25P32_SECTOR_SIZE
-+#define STM_8MB_BYTE_COUNT   STM_M25P64_BYTE_COUNT
-+#define STM_8MB_SECTOR_COUNT STM_M25P64_SECTOR_COUNT
-+#define STM_8MB_SECTOR_SIZE  STM_M25P64_SECTOR_SIZE
-+#define STM_16MB_BYTE_COUNT   STM_M25P128_BYTE_COUNT
-+#define STM_16MB_SECTOR_COUNT STM_M25P128_SECTOR_COUNT
-+#define STM_16MB_SECTOR_SIZE  STM_M25P128_SECTOR_SIZE
-+
-+/*
-+ * ST Microelectronics Opcodes for Serial Flash
-+ */
-+
-+#define STM_OP_WR_ENABLE       0x06     /* Write Enable */
-+#define STM_OP_WR_DISABLE      0x04     /* Write Disable */
-+#define STM_OP_RD_STATUS       0x05     /* Read Status */
-+#define STM_OP_WR_STATUS       0x01     /* Write Status */
-+#define STM_OP_RD_DATA         0x03     /* Read Data */
-+#define STM_OP_FAST_RD_DATA    0x0b     /* Fast Read Data */
-+#define STM_OP_PAGE_PGRM       0x02     /* Page Program */
-+#define STM_OP_SECTOR_ERASE    0xd8     /* Sector Erase */
-+#define STM_OP_BULK_ERASE      0xc7     /* Bulk Erase */
-+#define STM_OP_DEEP_PWRDOWN    0xb9     /* Deep Power-Down Mode */
-+#define STM_OP_RD_SIG          0xab     /* Read Electronic Signature */
-+
-+#define STM_STATUS_WIP       0x01       /* Write-In-Progress */
-+#define STM_STATUS_WEL       0x02       /* Write Enable Latch */
-+#define STM_STATUS_BP0       0x04       /* Block Protect 0 */
-+#define STM_STATUS_BP1       0x08       /* Block Protect 1 */
-+#define STM_STATUS_BP2       0x10       /* Block Protect 2 */
-+#define STM_STATUS_SRWD      0x80       /* Status Register Write Disable */
-+
-+/*
-+ * SPI Flash Interface Registers
-+ */
-+#define AR531XPLUS_SPI_READ     0x08000000
-+#define AR531XPLUS_SPI_MMR      0x11300000
-+#define AR531XPLUS_SPI_MMR_SIZE 12
-+
-+#define AR531XPLUS_SPI_CTL      0x00
-+#define AR531XPLUS_SPI_OPCODE   0x04
-+#define AR531XPLUS_SPI_DATA     0x08
-+
-+#define SPI_FLASH_READ          AR531XPLUS_SPI_READ
-+#define SPI_FLASH_MMR           AR531XPLUS_SPI_MMR
-+#define SPI_FLASH_MMR_SIZE      AR531XPLUS_SPI_MMR_SIZE
-+#define SPI_FLASH_CTL           AR531XPLUS_SPI_CTL
-+#define SPI_FLASH_OPCODE        AR531XPLUS_SPI_OPCODE
-+#define SPI_FLASH_DATA          AR531XPLUS_SPI_DATA
-+
-+#define SPI_CTL_START           0x00000100
-+#define SPI_CTL_BUSY            0x00010000
-+#define SPI_CTL_TXCNT_MASK      0x0000000f
-+#define SPI_CTL_RXCNT_MASK      0x000000f0
-+#define SPI_CTL_TX_RX_CNT_MASK  0x000000ff
-+#define SPI_CTL_SIZE_MASK       0x00060000
-+
-+#define SPI_CTL_CLK_SEL_MASK    0x03000000
-+#define SPI_OPCODE_MASK         0x000000ff
-+
-+#define SPI_STATUS_WIP		STM_STATUS_WIP
-+
-+#endif
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar231x.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar231x.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar231x.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar231x.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,54 @@
-+#ifndef __AR531X_H
-+#define __AR531X_H
-+
-+#define AR531X_MISC_IRQ_BASE		0x20
-+#define AR531X_GPIO_IRQ_BASE		0x30
-+
-+/* Software's idea of interrupts handled by "CPU Interrupt Controller" */
-+#define AR531X_IRQ_NONE		MIPS_CPU_IRQ_BASE+0
-+#define AR531X_IRQ_CPU_CLOCK	MIPS_CPU_IRQ_BASE+7 /* C0_CAUSE: 0x8000 */
-+
-+/* Miscellaneous interrupts, which share IP6 */
-+#define AR531X_MISC_IRQ_NONE		AR531X_MISC_IRQ_BASE+0
-+#define AR531X_MISC_IRQ_TIMER		AR531X_MISC_IRQ_BASE+1
-+#define AR531X_MISC_IRQ_AHB_PROC	AR531X_MISC_IRQ_BASE+2
-+#define AR531X_MISC_IRQ_AHB_DMA		AR531X_MISC_IRQ_BASE+3
-+#define AR531X_MISC_IRQ_GPIO		AR531X_MISC_IRQ_BASE+4
-+#define AR531X_MISC_IRQ_UART0		AR531X_MISC_IRQ_BASE+5
-+#define AR531X_MISC_IRQ_UART0_DMA	AR531X_MISC_IRQ_BASE+6
-+#define AR531X_MISC_IRQ_WATCHDOG	AR531X_MISC_IRQ_BASE+7
-+#define AR531X_MISC_IRQ_LOCAL		AR531X_MISC_IRQ_BASE+8
-+#define AR531X_MISC_IRQ_SPI 		AR531X_MISC_IRQ_BASE+9
-+#define AR531X_MISC_IRQ_COUNT		10
-+
-+/* GPIO Interrupts [0..7], share AR531X_MISC_IRQ_GPIO */
-+#define AR531X_GPIO_IRQ_NONE            AR531X_GPIO_IRQ_BASE+0
-+#define AR531X_GPIO_IRQ(n)              AR531X_GPIO_IRQ_BASE+n
-+#define AR531X_GPIO_IRQ_COUNT           22
-+
-+static inline u32
-+ar231x_read_reg(u32 reg)
-+{
-+	return __raw_readl((u32 *) KSEG1ADDR(reg));
-+}
-+
-+static inline void
-+ar231x_write_reg(u32 reg, u32 val)
-+{
-+	__raw_writel(val, (u32 *) KSEG1ADDR(reg));
-+}
-+
-+static inline u32
-+ar231x_mask_reg(u32 reg, u32 mask, u32 val)
-+{
-+	u32 ret;
-+
-+	ret = ar231x_read_reg(reg);
-+	ret &= ~mask;
-+	ret |= val;
-+	ar231x_write_reg(reg, ret);
-+
-+	return ret;
-+}
-+
-+#endif
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar231x_platform.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar231x_platform.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar231x_platform.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar231x_platform.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,83 @@
-+#ifndef __AR531X_PLATFORM_H
-+#define __AR531X_PLATFORM_H
-+
-+/*
-+ * This is board-specific data that is stored in a "fixed" location in flash.
-+ * It is shared across operating systems, so it should not be changed lightly.
-+ * The main reason we need it is in order to extract the ethernet MAC
-+ * address(es).
-+ */
-+struct ar231x_boarddata {
-+    u32 magic;                       /* board data is valid */
-+#define AR531X_BD_MAGIC 0x35333131   /* "5311", for all 531x platforms */
-+    u16 cksum;                       /* checksum (starting with BD_REV 2) */
-+    u16 rev;                         /* revision of this struct */
-+#define BD_REV  4
-+    char boardName[64];            /* Name of board */
-+    u16 major;                       /* Board major number */
-+    u16 minor;                       /* Board minor number */
-+    u32 flags;                      /* Board configuration */
-+#define BD_ENET0        0x00000001   /* ENET0 is stuffed */
-+#define BD_ENET1        0x00000002   /* ENET1 is stuffed */
-+#define BD_UART1        0x00000004   /* UART1 is stuffed */
-+#define BD_UART0        0x00000008   /* UART0 is stuffed (dma) */
-+#define BD_RSTFACTORY   0x00000010   /* Reset factory defaults stuffed */
-+#define BD_SYSLED       0x00000020   /* System LED stuffed */
-+#define BD_EXTUARTCLK   0x00000040   /* External UART clock */
-+#define BD_CPUFREQ      0x00000080   /* cpu freq is valid in nvram */
-+#define BD_SYSFREQ      0x00000100   /* sys freq is set in nvram */
-+#define BD_WLAN0        0x00000200   /* Enable WLAN0 */
-+#define BD_MEMCAP       0x00000400   /* CAP SDRAM @ memCap for testing */
-+#define BD_DISWATCHDOG  0x00000800   /* disable system watchdog */
-+#define BD_WLAN1        0x00001000   /* Enable WLAN1 (ar5212) */
-+#define BD_ISCASPER     0x00002000   /* FLAG for AR2312 */
-+#define BD_WLAN0_2G_EN  0x00004000   /* FLAG for radio0_2G */
-+#define BD_WLAN0_5G_EN  0x00008000   /* FLAG for radio0_2G */
-+#define BD_WLAN1_2G_EN  0x00020000   /* FLAG for radio0_2G */
-+#define BD_WLAN1_5G_EN  0x00040000   /* FLAG for radio0_2G */
-+    u16 resetConfigGpio;             /* Reset factory GPIO pin */
-+    u16 sysLedGpio;                  /* System LED GPIO pin */
-+
-+    u32 cpuFreq;                     /* CPU core frequency in Hz */
-+    u32 sysFreq;                     /* System frequency in Hz */
-+    u32 cntFreq;                     /* Calculated C0_COUNT frequency */
-+
-+    u8  wlan0_mac[6];
-+    u8  enet0_mac[6];
-+    u8  enet1_mac[6];
-+
-+    u16 pciId;                       /* Pseudo PCIID for common code */
-+    u16 memCap;                      /* cap bank1 in MB */
-+
-+    /* version 3 */
-+    u8  wlan1_mac[6];                 /* (ar5212) */
-+};
-+
-+#define BOARD_CONFIG_BUFSZ		0x1000
-+
-+/*
-+ * Platform device information for the Wireless MAC
-+ */
-+struct ar231x_board_config {
-+	u16 devid;
-+
-+	/* board config data */
-+	struct ar231x_boarddata *config;
-+
-+	/* radio calibration data */
-+	const char *radio;
-+};
-+
-+/*
-+ * Platform device information for the Ethernet MAC
-+ */
-+struct ar231x_eth {
-+	u32 reset_base;
-+	u32 reset_mac;
-+	u32 reset_phy;
-+	u32 phy_base;
-+	struct ar231x_board_config *config;
-+	char *macaddr;
-+};
-+
-+#endif /* __AR531X_PLATFORM_H */
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar5312_regs.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar5312_regs.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar5312_regs.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar5312_regs.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,236 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2003 Atheros Communications, Inc.,  All Rights Reserved.
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
-+ */
-+
-+#ifndef AR5312_H
-+#define AR5312_H
-+
-+#include <asm/addrspace.h>
-+
-+/*
-+ * IRQs
-+ */
-+
-+#define AR5312_IRQ_WLAN0_INTRS  MIPS_CPU_IRQ_BASE+2 /* C0_CAUSE: 0x0400 */
-+#define AR5312_IRQ_ENET0_INTRS  MIPS_CPU_IRQ_BASE+3 /* C0_CAUSE: 0x0800 */
-+#define AR5312_IRQ_ENET1_INTRS  MIPS_CPU_IRQ_BASE+4 /* C0_CAUSE: 0x1000 */
-+#define AR5312_IRQ_WLAN1_INTRS  MIPS_CPU_IRQ_BASE+5 /* C0_CAUSE: 0x2000 */
-+#define AR5312_IRQ_MISC_INTRS   MIPS_CPU_IRQ_BASE+6 /* C0_CAUSE: 0x4000 */
-+
-+
-+/* Address Map */
-+#define AR531X_WLAN0            0x18000000
-+#define AR531X_WLAN1            0x18500000
-+#define AR531X_ENET0            0x18100000
-+#define AR531X_ENET1            0x18200000
-+#define AR531X_SDRAMCTL         0x18300000
-+#define AR531X_FLASHCTL         0x18400000
-+#define AR531X_APBBASE		0x1c000000
-+#define AR531X_FLASH            0x1e000000
-+#define AR531X_UART0            0xbc000003      /* UART MMR */
-+
-+/*
-+ * AR531X_NUM_ENET_MAC defines the number of ethernet MACs that
-+ * should be considered available.  The AR5312 supports 2 enet MACS,
-+ * even though many reference boards only actually use 1 of them
-+ * (i.e. Only MAC 0 is actually connected to an enet PHY or PHY switch.
-+ * The AR2312 supports 1 enet MAC.
-+ */
-+#define AR531X_NUM_ENET_MAC             2
-+
-+/*
-+ * Need these defines to determine true number of ethernet MACs
-+ */
-+#define AR5212_AR5312_REV2      0x0052          /* AR5312 WMAC (AP31) */
-+#define AR5212_AR5312_REV7      0x0057          /* AR5312 WMAC (AP30-040) */
-+#define AR5212_AR2313_REV8      0x0058          /* AR2313 WMAC (AP43-030) */
-+#define AR531X_RADIO_MASK_OFF  0xc8
-+#define AR531X_RADIO0_MASK     0x0003
-+#define AR531X_RADIO1_MASK     0x000c
-+#define AR531X_RADIO1_S        2
-+
-+/*
-+ * AR531X_NUM_WMAC defines the number of Wireless MACs that\
-+ * should be considered available.
-+ */
-+#define AR531X_NUM_WMAC                 2
-+
-+/* Reset/Timer Block Address Map */
-+#define AR531X_RESETTMR		(AR531X_APBBASE  + 0x3000)
-+#define AR531X_TIMER		(AR531X_RESETTMR + 0x0000) /* countdown timer */
-+#define AR531X_WD_CTRL          (AR531X_RESETTMR + 0x0008) /* watchdog cntrl */
-+#define AR531X_WD_TIMER         (AR531X_RESETTMR + 0x000c) /* watchdog timer */
-+#define AR531X_ISR		(AR531X_RESETTMR + 0x0010) /* Intr Status Reg */
-+#define AR531X_IMR		(AR531X_RESETTMR + 0x0014) /* Intr Mask Reg */
-+#define AR531X_RESET		(AR531X_RESETTMR + 0x0020)
-+#define AR5312_CLOCKCTL1	(AR531X_RESETTMR + 0x0064)
-+#define AR5312_SCRATCH   	(AR531X_RESETTMR + 0x006c)
-+#define AR531X_PROCADDR		(AR531X_RESETTMR + 0x0070)
-+#define AR531X_PROC1		(AR531X_RESETTMR + 0x0074)
-+#define AR531X_DMAADDR		(AR531X_RESETTMR + 0x0078)
-+#define AR531X_DMA1		(AR531X_RESETTMR + 0x007c)
-+#define AR531X_ENABLE           (AR531X_RESETTMR + 0x0080) /* interface enb */
-+#define AR531X_REV		(AR531X_RESETTMR + 0x0090) /* revision */
-+
-+/* AR531X_WD_CTRL register bit field definitions */
-+#define AR531X_WD_CTRL_IGNORE_EXPIRATION 0x0000
-+#define AR531X_WD_CTRL_NMI               0x0001
-+#define AR531X_WD_CTRL_RESET             0x0002
-+
-+/* AR531X_ISR register bit field definitions */
-+#define AR531X_ISR_NONE		0x0000
-+#define AR531X_ISR_TIMER	0x0001
-+#define AR531X_ISR_AHBPROC	0x0002
-+#define AR531X_ISR_AHBDMA	0x0004
-+#define AR531X_ISR_GPIO		0x0008
-+#define AR531X_ISR_UART0	0x0010
-+#define AR531X_ISR_UART0DMA	0x0020
-+#define AR531X_ISR_WD		0x0040
-+#define AR531X_ISR_LOCAL	0x0080
-+
-+/* AR531X_RESET register bit field definitions */
-+#define AR531X_RESET_SYSTEM     0x00000001  /* cold reset full system */
-+#define AR531X_RESET_PROC       0x00000002  /* cold reset MIPS core */
-+#define AR531X_RESET_WLAN0      0x00000004  /* cold reset WLAN MAC and BB */
-+#define AR531X_RESET_EPHY0      0x00000008  /* cold reset ENET0 phy */
-+#define AR531X_RESET_EPHY1      0x00000010  /* cold reset ENET1 phy */
-+#define AR531X_RESET_ENET0      0x00000020  /* cold reset ENET0 mac */
-+#define AR531X_RESET_ENET1      0x00000040  /* cold reset ENET1 mac */
-+#define AR531X_RESET_UART0      0x00000100  /* cold reset UART0 (high speed) */
-+#define AR531X_RESET_WLAN1      0x00000200  /* cold reset WLAN MAC/BB */
-+#define AR531X_RESET_APB        0x00000400  /* cold reset APB (ar5312) */
-+#define AR531X_RESET_WARM_PROC  0x00001000  /* warm reset MIPS core */
-+#define AR531X_RESET_WARM_WLAN0_MAC 0x00002000  /* warm reset WLAN0 MAC */
-+#define AR531X_RESET_WARM_WLAN0_BB  0x00004000  /* warm reset WLAN0 BaseBand */
-+#define AR531X_RESET_NMI        0x00010000  /* send an NMI to the processor */
-+#define AR531X_RESET_WARM_WLAN1_MAC 0x00020000  /* warm reset WLAN1 mac */
-+#define AR531X_RESET_WARM_WLAN1_BB  0x00040000  /* warm reset WLAN1 baseband */
-+#define AR531X_RESET_LOCAL_BUS  0x00080000  /* reset local bus */
-+#define AR531X_RESET_WDOG       0x00100000  /* last reset was a watchdog */
-+
-+#define AR531X_RESET_WMAC0_BITS \
-+        AR531X_RESET_WLAN0 |\
-+        AR531X_RESET_WARM_WLAN0_MAC |\
-+        AR531X_RESET_WARM_WLAN0_BB
-+
-+#define AR531X_RESERT_WMAC1_BITS \
-+        AR531X_RESET_WLAN1 |\
-+        AR531X_RESET_WARM_WLAN1_MAC |\
-+        AR531X_RESET_WARM_WLAN1_BB
-+
-+/* AR5312_CLOCKCTL1 register bit field definitions */
-+#define AR5312_CLOCKCTL1_PREDIVIDE_MASK    0x00000030
-+#define AR5312_CLOCKCTL1_PREDIVIDE_SHIFT            4
-+#define AR5312_CLOCKCTL1_MULTIPLIER_MASK   0x00001f00
-+#define AR5312_CLOCKCTL1_MULTIPLIER_SHIFT           8
-+#define AR5312_CLOCKCTL1_DOUBLER_MASK      0x00010000
-+
-+/* Valid for AR5312 and AR2312 */
-+#define AR5312_CLOCKCTL1_PREDIVIDE_MASK    0x00000030
-+#define AR5312_CLOCKCTL1_PREDIVIDE_SHIFT            4
-+#define AR5312_CLOCKCTL1_MULTIPLIER_MASK   0x00001f00
-+#define AR5312_CLOCKCTL1_MULTIPLIER_SHIFT           8
-+#define AR5312_CLOCKCTL1_DOUBLER_MASK      0x00010000
-+
-+/* Valid for AR2313 */
-+#define AR2313_CLOCKCTL1_PREDIVIDE_MASK    0x00003000
-+#define AR2313_CLOCKCTL1_PREDIVIDE_SHIFT           12
-+#define AR2313_CLOCKCTL1_MULTIPLIER_MASK   0x001f0000
-+#define AR2313_CLOCKCTL1_MULTIPLIER_SHIFT          16
-+#define AR2313_CLOCKCTL1_DOUBLER_MASK      0x00000000
-+
-+
-+/* AR531X_ENABLE register bit field definitions */
-+#define AR531X_ENABLE_WLAN0              0x0001
-+#define AR531X_ENABLE_ENET0              0x0002
-+#define AR531X_ENABLE_ENET1              0x0004
-+#define AR531X_ENABLE_UART_AND_WLAN1_PIO 0x0008   /* UART, and WLAN1 PIOs */
-+#define AR531X_ENABLE_WLAN1_DMA          0x0010   /* WLAN1 DMAs */
-+#define AR531X_ENABLE_WLAN1 \
-+            (AR531X_ENABLE_UART_AND_WLAN1_PIO | AR531X_ENABLE_WLAN1_DMA)
-+
-+/* AR531X_REV register bit field definitions */
-+#define AR531X_REV_WMAC_MAJ    0xf000
-+#define AR531X_REV_WMAC_MAJ_S  12
-+#define AR531X_REV_WMAC_MIN    0x0f00
-+#define AR531X_REV_WMAC_MIN_S  8
-+#define AR531X_REV_MAJ         0x00f0
-+#define AR531X_REV_MAJ_S       4
-+#define AR531X_REV_MIN         0x000f
-+#define AR531X_REV_MIN_S       0
-+#define AR531X_REV_CHIP        (AR531X_REV_MAJ|AR531X_REV_MIN)
-+
-+/* Major revision numbers, bits 7..4 of Revision ID register */
-+#define AR531X_REV_MAJ_AR5312          0x4
-+#define AR531X_REV_MAJ_AR2313          0x5
-+
-+/* Minor revision numbers, bits 3..0 of Revision ID register */
-+#define AR5312_REV_MIN_DUAL     0x0     /* Dual WLAN version */
-+#define AR5312_REV_MIN_SINGLE   0x1     /* Single WLAN version */
-+
-+/* AR531X_FLASHCTL register bit field definitions */
-+#define FLASHCTL_IDCY   0x0000000f      /* Idle cycle turn around time */
-+#define FLASHCTL_IDCY_S 0
-+#define FLASHCTL_WST1   0x000003e0      /* Wait state 1 */
-+#define FLASHCTL_WST1_S 5
-+#define FLASHCTL_RBLE   0x00000400      /* Read byte lane enable */
-+#define FLASHCTL_WST2   0x0000f800      /* Wait state 2 */
-+#define FLASHCTL_WST2_S 11
-+#define FLASHCTL_AC     0x00070000      /* Flash address check (added) */
-+#define FLASHCTL_AC_S   16
-+#define FLASHCTL_AC_128K 0x00000000
-+#define FLASHCTL_AC_256K 0x00010000
-+#define FLASHCTL_AC_512K 0x00020000
-+#define FLASHCTL_AC_1M   0x00030000
-+#define FLASHCTL_AC_2M   0x00040000
-+#define FLASHCTL_AC_4M   0x00050000
-+#define FLASHCTL_AC_8M   0x00060000
-+#define FLASHCTL_AC_RES  0x00070000     /* 16MB is not supported */
-+#define FLASHCTL_E      0x00080000      /* Flash bank enable (added) */
-+#define FLASHCTL_BUSERR 0x01000000      /* Bus transfer error status flag */
-+#define FLASHCTL_WPERR  0x02000000      /* Write protect error status flag */
-+#define FLASHCTL_WP     0x04000000      /* Write protect */
-+#define FLASHCTL_BM     0x08000000      /* Burst mode */
-+#define FLASHCTL_MW     0x30000000      /* Memory width */
-+#define FLASHCTL_MWx8   0x00000000      /* Memory width x8 */
-+#define FLASHCTL_MWx16  0x10000000      /* Memory width x16 */
-+#define FLASHCTL_MWx32  0x20000000      /* Memory width x32 (not supported) */
-+#define FLASHCTL_ATNR   0x00000000      /* Access type == no retry */
-+#define FLASHCTL_ATR    0x80000000      /* Access type == retry every */
-+#define FLASHCTL_ATR4   0xc0000000      /* Access type == retry every 4 */
-+
-+/* ARM Flash Controller -- 3 flash banks with either x8 or x16 devices.  */
-+#define AR531X_FLASHCTL0        (AR531X_FLASHCTL + 0x00)
-+#define AR531X_FLASHCTL1        (AR531X_FLASHCTL + 0x04)
-+#define AR531X_FLASHCTL2        (AR531X_FLASHCTL + 0x08)
-+
-+/* ARM SDRAM Controller -- just enough to determine memory size */
-+#define AR531X_MEM_CFG1 (AR531X_SDRAMCTL + 0x04)
-+#define MEM_CFG1_AC0    0x00000700      /* bank 0: SDRAM addr check (added) */
-+#define MEM_CFG1_AC0_S  8
-+#define MEM_CFG1_AC1    0x00007000      /* bank 1: SDRAM addr check (added) */
-+#define MEM_CFG1_AC1_S  12
-+
-+/* GPIO Address Map */
-+#define AR531X_GPIO         (AR531X_APBBASE  + 0x2000)
-+#define AR531X_GPIO_DO      (AR531X_GPIO + 0x00)        /* output register */
-+#define AR531X_GPIO_DI      (AR531X_GPIO + 0x04)        /* intput register */
-+#define AR531X_GPIO_CR      (AR531X_GPIO + 0x08)        /* control register */
-+
-+/* GPIO Control Register bit field definitions */
-+#define AR531X_GPIO_CR_M(x)    (1 << (x))                      /* mask for i/o */
-+#define AR531X_GPIO_CR_O(x)    (0 << (x))                      /* mask for output */
-+#define AR531X_GPIO_CR_I(x)    (1 << (x))                      /* mask for input */
-+#define AR531X_GPIO_CR_INT(x)  (1 << ((x)+8))                  /* mask for interrupt */
-+#define AR531X_GPIO_CR_UART(x) (1 << ((x)+16))                 /* uart multiplex */
-+#define AR531X_NUM_GPIO		8
-+
-+
-+#endif
-+
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/cpu-feature-overrides.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/cpu-feature-overrides.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/cpu-feature-overrides.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/cpu-feature-overrides.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,84 @@
-+/*
-+ *  Atheros SoC specific CPU feature overrides
-+ *
-+ *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ *  This file was derived from: include/asm-mips/cpu-features.h
-+ *	Copyright (C) 2003, 2004 Ralf Baechle
-+ *	Copyright (C) 2004 Maciej W. Rozycki
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ *
-+ */
-+#ifndef __ASM_MACH_ATHEROS_CPU_FEATURE_OVERRIDES_H
-+#define __ASM_MACH_ATHEROS_CPU_FEATURE_OVERRIDES_H
-+
-+/*
-+ * The ATHEROS SoCs have MIPS 4Kc/4KEc core.
-+ */
-+#define cpu_has_tlb			1
-+#define cpu_has_4kex			1
-+#define cpu_has_3k_cache		0
-+#define cpu_has_4k_cache		1
-+#define cpu_has_tx39_cache		0
-+#define cpu_has_sb1_cache		0
-+#define cpu_has_fpu			0
-+#define cpu_has_32fpr			0
-+#define cpu_has_counter			1
-+/* #define cpu_has_watch		? */
-+/* #define cpu_has_divec		? */
-+/* #define cpu_has_vce			? */
-+/* #define cpu_has_cache_cdex_p		? */
-+/* #define cpu_has_cache_cdex_s		? */
-+/* #define cpu_has_prefetch		? */
-+/* #define cpu_has_mcheck		? */
-+#define cpu_has_ejtag			1
-+
-+#if !defined(CONFIG_ATHEROS_AR5312)
-+#  define cpu_has_llsc			1
-+#else
-+/*
-+ * The MIPS 4Kc V0.9 core in the AR5312/AR2312 have problems with the
-+ * ll/sc instructions.
-+ */
-+#  define cpu_has_llsc			0
-+#endif
-+
-+#define cpu_has_mips16			0
-+#define cpu_has_mdmx			0
-+#define cpu_has_mips3d			0
-+#define cpu_has_smartmips		0
-+
-+/* #define cpu_has_vtag_icache		? */
-+/* #define cpu_has_dc_aliases		? */
-+/* #define cpu_has_ic_fills_f_dc	? */
-+/* #define cpu_has_pindexed_dcache	? */
-+
-+/* #define cpu_icache_snoops_remote_store	? */
-+
-+#define cpu_has_mips32r1		1
-+
-+#if !defined(CONFIG_ATHEROS_AR5312)
-+#  define cpu_has_mips32r2		1
-+#endif
-+
-+#define cpu_has_mips64r1		0
-+#define cpu_has_mips64r2		0
-+
-+#define cpu_has_dsp			0
-+#define cpu_has_mipsmt			0
-+
-+/* #define cpu_has_nofpuex		? */
-+#define cpu_has_64bits			0
-+#define cpu_has_64bit_zero_reg		0
-+#define cpu_has_64bit_gp_regs		0
-+#define cpu_has_64bit_addresses		0
-+
-+/* #define cpu_has_inclusive_pcaches	? */
-+
-+/* #define cpu_dcache_line_size()	? */
-+/* #define cpu_icache_line_size()	? */
-+
-+#endif /* __ASM_MACH_ATHEROS_CPU_FEATURE_OVERRIDES_H */
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/dma-coherence.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/dma-coherence.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/dma-coherence.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/dma-coherence.h	2011-05-15 21:41:19.000000000 +0200
-@@ -0,0 +1,76 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2006  Ralf Baechle <ralf@linux-mips.org>
-+ * Copyright (C) 2007  Felix Fietkau <nbd@openwrt.org>
-+ *
-+ */
-+#ifndef __ASM_MACH_GENERIC_DMA_COHERENCE_H
-+#define __ASM_MACH_GENERIC_DMA_COHERENCE_H
-+
-+#define PCI_DMA_OFFSET	0x20000000
-+
-+#include <linux/device.h> 
-+
-+static inline dma_addr_t ar231x_dev_offset(struct device *dev) 
-+{ 
-+#ifdef CONFIG_PCI 
-+       extern struct bus_type pci_bus_type; 
-+ 
-+       if (dev && dev->bus == &pci_bus_type) 
-+               return PCI_DMA_OFFSET; 
-+       else 
-+#endif 
-+	       return 0; 
-+} 
-+
-+static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size)
-+{
-+	return virt_to_phys(addr) + ar231x_dev_offset(dev);
-+}
-+
-+static inline dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page)
-+{
-+	return page_to_phys(page) + ar231x_dev_offset(dev);
-+}
-+
-+static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
-+	dma_addr_t dma_addr)
-+{
-+	return dma_addr - ar231x_dev_offset(dev);
-+}
-+
-+static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
-+	size_t size, enum dma_data_direction direction)
-+{
-+}
-+
-+static inline int plat_dma_supported(struct device *dev, u64 mask)
-+{
-+	return 1;
-+}
-+
-+static inline void plat_extra_sync_for_device(struct device *dev)
-+{
-+	return;
-+}
-+
-+static inline int plat_dma_mapping_error(struct device *dev,
-+					 dma_addr_t dma_addr)
-+{
-+	return 0;
-+}
-+
-+static inline int plat_device_is_coherent(struct device *dev)
-+{
-+#ifdef CONFIG_DMA_COHERENT
-+	return 1;
-+#endif
-+#ifdef CONFIG_DMA_NONCOHERENT
-+	return 0;
-+#endif
-+}
-+
-+#endif /* __ASM_MACH_GENERIC_DMA_COHERENCE_H */
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/gpio.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/gpio.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/gpio.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/gpio.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,84 @@
-+#ifndef _ATHEROS_GPIO_H_
-+#define _ATHEROS_GPIO_H_
-+
-+#include <ar231x.h>
-+
-+struct ar231x_gpiodev {
-+	u32 valid_mask;
-+	u32 (*get_output)(void);
-+	u32 (*set_output)(u32 mask, u32 val);
-+	u32 (*get)(void);
-+	u32 (*set)(u32 mask, u32 val);
-+};
-+
-+extern const struct ar231x_gpiodev *ar231x_gpiodev;
-+
-+/*
-+ * Wrappers for the generic GPIO layer
-+ */
-+
-+static inline int gpio_direction_input(unsigned gpio) {
-+	u32 mask = 1 << gpio;
-+
-+	if (!(ar231x_gpiodev->valid_mask & mask))
-+		return -ENXIO;
-+
-+	ar231x_gpiodev->set_output(mask, 0);
-+	return 0;
-+}
-+
-+static inline void gpio_set_value(unsigned gpio, int value) {
-+	u32 mask = 1 << gpio;
-+
-+	if (!(ar231x_gpiodev->valid_mask & mask))
-+		return;
-+
-+	ar231x_gpiodev->set(mask, (!!value) * mask);
-+}
-+
-+static inline int gpio_direction_output(unsigned gpio, int value) {
-+	u32 mask = 1 << gpio;
-+
-+	if (!(ar231x_gpiodev->valid_mask & mask))
-+		return -ENXIO;
-+
-+	ar231x_gpiodev->set_output(mask, mask);
-+	ar231x_gpiodev->set(mask, (!!value) * mask);
-+	return 0;
-+}
-+
-+/* Reads the gpio pin.  Unchecked function */
-+static inline int gpio_get_value(unsigned gpio) {
-+	u32 mask = 1 << gpio;
-+
-+	if (!(ar231x_gpiodev->valid_mask & mask))
-+		return 0;
-+
-+	return !!(ar231x_gpiodev->get() & mask);
-+}
-+
-+static inline int gpio_request(unsigned gpio, const char *label) {
-+	return 0;
-+}
-+
-+static inline void gpio_free(unsigned gpio) {
-+}
-+
-+/* Returns IRQ to attach for gpio.  Unchecked function */
-+static inline int gpio_to_irq(unsigned gpio) {
-+	return AR531X_GPIO_IRQ(gpio);
-+}
-+
-+/* Returns gpio for IRQ attached.  Unchecked function */
-+static inline int irq_to_gpio(unsigned irq) {
-+	return (irq - (AR531X_GPIO_IRQ(0)));
-+}
-+
-+static inline int gpio_set_debounce(unsigned gpio, unsigned debounce)
-+{
-+	return -ENOSYS;
-+}
-+
-+#include <asm-generic/gpio.h> /* cansleep wrappers */
-+
-+#endif
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/reset.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/reset.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/reset.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/reset.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,6 @@
-+#ifndef __AR531X_RESET_H
-+#define __AR531X_RESET_H
-+
-+void ar531x_disable_reset_button(void);
-+
-+#endif /* __AR531X_RESET_H */
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/war.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/war.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/war.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/war.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,25 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Felix Fietkau <nbd@openwrt.org>
-+ */
-+#ifndef __ASM_MIPS_MACH_ATHEROS_WAR_H
-+#define __ASM_MIPS_MACH_ATHEROS_WAR_H
-+
-+#define R4600_V1_INDEX_ICACHEOP_WAR	0
-+#define R4600_V1_HIT_CACHEOP_WAR	0
-+#define R4600_V2_HIT_CACHEOP_WAR	0
-+#define R5432_CP0_INTERRUPT_WAR		0
-+#define BCM1250_M3_WAR			0
-+#define SIBYTE_1956_WAR			0
-+#define MIPS4K_ICACHE_REFILL_WAR	0
-+#define MIPS_CACHE_SYNC_WAR		0
-+#define TX49XX_ICACHE_INDEX_INV_WAR	0
-+#define RM9000_CDEX_SMP_WAR		0
-+#define ICACHE_REFILLS_WORKAROUND_WAR	0
-+#define R10000_LLSC_WAR			0
-+#define MIPS34K_MISSED_ITLB_WAR		0
-+
-+#endif /* __ASM_MIPS_MACH_ATHEROS_WAR_H */
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/kernel/cevt-r4k.c linux-2.6.39-rc7/arch/mips/kernel/cevt-r4k.c
---- linux-2.6.39-rc7.orig/arch/mips/kernel/cevt-r4k.c	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/arch/mips/kernel/cevt-r4k.c	2011-05-15 21:34:57.000000000 +0200
-@@ -168,20 +168,23 @@
- 	struct clock_event_device *cd;
- 	unsigned int irq;
- 
--	if (!cpu_has_counter || !mips_hpt_frequency)
--		return -ENXIO;
--
--	if (!c0_compare_int_usable())
--		return -ENXIO;
--
- 	/*
- 	 * With vectored interrupts things are getting platform specific.
- 	 * get_c0_compare_int is a hook to allow a platform to return the
- 	 * interrupt number of it's liking.
- 	 */
- 	irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
--	if (get_c0_compare_int)
-+	if (get_c0_compare_int) {
- 		irq = get_c0_compare_int();
-+		if ((irq >= MIPS_CPU_IRQ_BASE) && (irq < MIPS_CPU_IRQ_BASE + 8))
-+			cp0_compare_irq = irq - MIPS_CPU_IRQ_BASE;
-+	}
-+
-+	if (!cpu_has_counter || !mips_hpt_frequency)
-+		return -ENXIO;
-+
-+	if (!c0_compare_int_usable())
-+		return -ENXIO;
- 
- 	cd = &per_cpu(mips_clockevent_device, cpu);
- 
-diff -Nur linux-2.6.39-rc7.orig/drivers/mtd/devices/Kconfig linux-2.6.39-rc7/drivers/mtd/devices/Kconfig
---- linux-2.6.39-rc7.orig/drivers/mtd/devices/Kconfig	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/drivers/mtd/devices/Kconfig	2011-05-15 21:34:57.000000000 +0200
-@@ -112,6 +112,10 @@
- 	  Set up your spi devices with the right board-specific platform data,
- 	  if you want to specify device partitioning.
- 
-+config MTD_AR2315
-+	tristate "Atheros AR2315+ SPI Flash support"
-+	depends on ATHEROS_AR2315
-+
- config MTD_SLRAM
- 	tristate "Uncached system RAM"
- 	help
-diff -Nur linux-2.6.39-rc7.orig/drivers/mtd/devices/Makefile linux-2.6.39-rc7/drivers/mtd/devices/Makefile
---- linux-2.6.39-rc7.orig/drivers/mtd/devices/Makefile	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/drivers/mtd/devices/Makefile	2011-05-15 21:34:57.000000000 +0200
-@@ -17,3 +17,4 @@
- obj-$(CONFIG_MTD_DATAFLASH)	+= mtd_dataflash.o
- obj-$(CONFIG_MTD_M25P80)	+= m25p80.o
- obj-$(CONFIG_MTD_SST25L)	+= sst25l.o
-+obj-$(CONFIG_MTD_AR2315)	+= ar2315.o
-diff -Nur linux-2.6.39-rc7.orig/drivers/mtd/devices/ar2315.c linux-2.6.39-rc7/drivers/mtd/devices/ar2315.c
---- linux-2.6.39-rc7.orig/drivers/mtd/devices/ar2315.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/drivers/mtd/devices/ar2315.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,517 @@
-+
-+/*
-+ * MTD driver for the SPI Flash Memory support on Atheros AR2315
-+ *
-+ * Copyright (c) 2005-2006 Atheros Communications Inc.
-+ * Copyright (C) 2006-2007 FON Technology, SL.
-+ * Copyright (C) 2006-2007 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
-+ *
-+ * This code is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/types.h>
-+#include <linux/version.h>
-+#include <linux/errno.h>
-+#include <linux/slab.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/partitions.h>
-+#include <linux/platform_device.h>
-+#include <linux/sched.h>
-+#include <linux/root_dev.h>
-+#include <linux/delay.h>
-+#include <asm/delay.h>
-+#include <asm/io.h>
-+
-+#include <ar2315_spiflash.h>
-+#include <ar231x_platform.h>
-+#include <ar231x.h>
-+
-+
-+#define SPIFLASH "spiflash: "
-+#define busy_wait(_priv, _condition, _wait) do { \
-+	while (_condition) { \
-+		spin_unlock_bh(&_priv->lock); \
-+		if (_wait > 1) \
-+			msleep(_wait); \
-+		else if ((_wait == 1) && need_resched()) \
-+			schedule(); \
-+		else \
-+			udelay(1); \
-+		spin_lock_bh(&_priv->lock); \
-+	} \
-+} while (0)
-+
-+enum {
-+	FLASH_NONE,
-+	FLASH_1MB,
-+	FLASH_2MB,
-+	FLASH_4MB,
-+	FLASH_8MB,
-+	FLASH_16MB,
-+};
-+
-+/* Flash configuration table */
-+struct flashconfig {
-+	u32 byte_cnt;
-+	u32 sector_cnt;
-+	u32 sector_size;
-+};
-+
-+const struct flashconfig flashconfig_tbl[] = {
-+	[FLASH_NONE] = { 0, 0, 0},
-+	[FLASH_1MB]  = { STM_1MB_BYTE_COUNT, STM_1MB_SECTOR_COUNT, STM_1MB_SECTOR_SIZE},
-+	[FLASH_2MB]  = { STM_2MB_BYTE_COUNT, STM_2MB_SECTOR_COUNT, STM_2MB_SECTOR_SIZE},
-+	[FLASH_4MB]  = { STM_4MB_BYTE_COUNT, STM_4MB_SECTOR_COUNT, STM_4MB_SECTOR_SIZE},
-+	[FLASH_8MB]  = { STM_8MB_BYTE_COUNT, STM_8MB_SECTOR_COUNT, STM_8MB_SECTOR_SIZE},
-+	[FLASH_16MB] = { STM_16MB_BYTE_COUNT, STM_16MB_SECTOR_COUNT, STM_16MB_SECTOR_SIZE}
-+};
-+
-+/* Mapping of generic opcodes to STM serial flash opcodes */
-+enum {
-+	SPI_WRITE_ENABLE,
-+	SPI_WRITE_DISABLE,
-+	SPI_RD_STATUS,
-+	SPI_WR_STATUS,
-+	SPI_RD_DATA,
-+	SPI_FAST_RD_DATA,
-+	SPI_PAGE_PROGRAM,
-+	SPI_SECTOR_ERASE,
-+	SPI_BULK_ERASE,
-+	SPI_DEEP_PWRDOWN,
-+	SPI_RD_SIG,
-+};
-+
-+struct opcodes {
-+    __u16 code;
-+    __s8 tx_cnt;
-+    __s8 rx_cnt;
-+};
-+const struct opcodes stm_opcodes[] = {
-+	[SPI_WRITE_ENABLE] = {STM_OP_WR_ENABLE, 1, 0},
-+	[SPI_WRITE_DISABLE] = {STM_OP_WR_DISABLE, 1, 0},
-+	[SPI_RD_STATUS] = {STM_OP_RD_STATUS, 1, 1},
-+	[SPI_WR_STATUS] = {STM_OP_WR_STATUS, 1, 0},
-+	[SPI_RD_DATA] = {STM_OP_RD_DATA, 4, 4},
-+	[SPI_FAST_RD_DATA] = {STM_OP_FAST_RD_DATA, 5, 0},
-+	[SPI_PAGE_PROGRAM] = {STM_OP_PAGE_PGRM, 8, 0},
-+	[SPI_SECTOR_ERASE] = {STM_OP_SECTOR_ERASE, 4, 0},
-+	[SPI_BULK_ERASE] = {STM_OP_BULK_ERASE, 1, 0},
-+	[SPI_DEEP_PWRDOWN] = {STM_OP_DEEP_PWRDOWN, 1, 0},
-+	[SPI_RD_SIG] = {STM_OP_RD_SIG, 4, 1},
-+};
-+
-+/* Driver private data structure */
-+struct spiflash_priv {
-+	struct mtd_info mtd;
-+	void *readaddr; /* memory mapped data for read  */
-+	void *mmraddr;  /* memory mapped register space */
-+	wait_queue_head_t wq;
-+	spinlock_t lock;
-+	int state;
-+};
-+
-+#define to_spiflash(_mtd) container_of(_mtd, struct spiflash_priv, mtd)
-+
-+enum {
-+	FL_READY,
-+	FL_READING,
-+	FL_ERASING,
-+	FL_WRITING
-+};
-+
-+/***************************************************************************************************/
-+
-+static u32
-+spiflash_read_reg(struct spiflash_priv *priv, int reg)
-+{
-+	return ar231x_read_reg((u32) priv->mmraddr + reg);
-+}
-+
-+static void
-+spiflash_write_reg(struct spiflash_priv *priv, int reg, u32 data)
-+{
-+	ar231x_write_reg((u32) priv->mmraddr + reg, data);
-+}
-+
-+static u32
-+spiflash_wait_busy(struct spiflash_priv *priv)
-+{
-+	u32 reg;
-+
-+	busy_wait(priv, (reg = spiflash_read_reg(priv, SPI_FLASH_CTL)) &
-+		SPI_CTL_BUSY, 0);
-+	return reg;
-+}
-+
-+static u32
-+spiflash_sendcmd (struct spiflash_priv *priv, int opcode, u32 addr)
-+{
-+	const struct opcodes *op;
-+	u32 reg, mask;
-+
-+	op = &stm_opcodes[opcode];
-+	reg = spiflash_wait_busy(priv);
-+	spiflash_write_reg(priv, SPI_FLASH_OPCODE,
-+		((u32) op->code) | (addr << 8));
-+
-+	reg &= ~SPI_CTL_TX_RX_CNT_MASK;
-+	reg |= SPI_CTL_START | op->tx_cnt | (op->rx_cnt << 4);
-+
-+	spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
-+	spiflash_wait_busy(priv);
-+
-+	if (!op->rx_cnt)
-+		return 0;
-+
-+	reg = spiflash_read_reg(priv, SPI_FLASH_DATA);
-+
-+	switch (op->rx_cnt) {
-+	case 1:
-+		mask = 0x000000ff;
-+		break;
-+	case 2:
-+		mask = 0x0000ffff;
-+		break;
-+	case 3:
-+		mask = 0x00ffffff;
-+		break;
-+	default:
-+		mask = 0xffffffff;
-+		break;
-+	}
-+	reg &= mask;
-+
-+	return reg;
-+}
-+
-+
-+/*
-+ * Probe SPI flash device
-+ * Function returns 0 for failure.
-+ * and flashconfig_tbl array index for success.
-+ */
-+static int
-+spiflash_probe_chip (struct spiflash_priv *priv)
-+{
-+	u32 sig;
-+	int flash_size;
-+
-+	/* Read the signature on the flash device */
-+	spin_lock_bh(&priv->lock);
-+	sig = spiflash_sendcmd(priv, SPI_RD_SIG, 0);
-+	spin_unlock_bh(&priv->lock);
-+
-+	switch (sig) {
-+	case STM_8MBIT_SIGNATURE:
-+		flash_size = FLASH_1MB;
-+		break;
-+	case STM_16MBIT_SIGNATURE:
-+		flash_size = FLASH_2MB;
-+		break;
-+	case STM_32MBIT_SIGNATURE:
-+		flash_size = FLASH_4MB;
-+		break;
-+	case STM_64MBIT_SIGNATURE:
-+		flash_size = FLASH_8MB;
-+		break;
-+	case STM_128MBIT_SIGNATURE:
-+		flash_size = FLASH_16MB;
-+		break;
-+	default:
-+		printk (KERN_WARNING SPIFLASH "Read of flash device signature failed!\n");
-+		return 0;
-+	}
-+
-+	return flash_size;
-+}
-+
-+
-+/* wait until the flash chip is ready and grab a lock */
-+static int spiflash_wait_ready(struct spiflash_priv *priv, int state)
-+{
-+	DECLARE_WAITQUEUE(wait, current);
-+
-+retry:
-+	spin_lock_bh(&priv->lock);
-+	if (priv->state != FL_READY) {
-+		set_current_state(TASK_UNINTERRUPTIBLE);
-+		add_wait_queue(&priv->wq, &wait);
-+		spin_unlock_bh(&priv->lock);
-+		schedule();
-+		remove_wait_queue(&priv->wq, &wait);
-+
-+		if(signal_pending(current))
-+			return 0;
-+
-+		goto retry;
-+	}
-+	priv->state = state;
-+
-+	return 1;
-+}
-+
-+static inline void spiflash_done(struct spiflash_priv *priv)
-+{
-+	priv->state = FL_READY;
-+	spin_unlock_bh(&priv->lock);
-+	wake_up(&priv->wq);
-+}
-+
-+static void
-+spiflash_wait_complete(struct spiflash_priv *priv, unsigned int timeout)
-+{
-+	busy_wait(priv, spiflash_sendcmd(priv, SPI_RD_STATUS, 0) &
-+		SPI_STATUS_WIP, timeout);
-+	spiflash_done(priv);
-+}
-+
-+
-+
-+static int
-+spiflash_erase (struct mtd_info *mtd, struct erase_info *instr)
-+{
-+	struct spiflash_priv *priv = to_spiflash(mtd);
-+	const struct opcodes *op;
-+	u32 temp, reg;
-+
-+	if (instr->addr + instr->len > mtd->size)
-+		return -EINVAL;
-+
-+	if (!spiflash_wait_ready(priv, FL_ERASING))
-+		return -EINTR;
-+
-+	spiflash_sendcmd(priv, SPI_WRITE_ENABLE, 0);
-+	reg = spiflash_wait_busy(priv);
-+
-+	op = &stm_opcodes[SPI_SECTOR_ERASE];
-+	temp = ((u32)instr->addr << 8) | (u32)(op->code);
-+	spiflash_write_reg(priv, SPI_FLASH_OPCODE, temp);
-+
-+	reg &= ~SPI_CTL_TX_RX_CNT_MASK;
-+	reg |= op->tx_cnt | SPI_CTL_START;
-+	spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
-+
-+	spiflash_wait_complete(priv, 20);
-+
-+	instr->state = MTD_ERASE_DONE;
-+	mtd_erase_callback(instr);
-+
-+	return 0;
-+}
-+
-+static int
-+spiflash_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
-+{
-+	struct spiflash_priv *priv = to_spiflash(mtd);
-+	u8 *read_addr;
-+
-+	if (!len)
-+		return 0;
-+
-+	if (from + len > mtd->size)
-+		return -EINVAL;
-+
-+	*retlen = len;
-+
-+	if (!spiflash_wait_ready(priv, FL_READING))
-+		return -EINTR;
-+
-+	read_addr = (u8 *)(priv->readaddr + from);
-+	memcpy_fromio(buf, read_addr, len);
-+	spiflash_done(priv);
-+
-+	return 0;
-+}
-+
-+static int
-+spiflash_write (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u8 *buf)
-+{
-+	struct spiflash_priv *priv = to_spiflash(mtd);
-+	u32 opcode, bytes_left;
-+
-+	*retlen = 0;
-+
-+	if (!len)
-+		return 0;
-+
-+	if (to + len > mtd->size)
-+		return -EINVAL;
-+
-+	bytes_left = len;
-+
-+	do {
-+		u32 read_len, reg, page_offset, spi_data = 0;
-+
-+		read_len = min(bytes_left, sizeof(u32));
-+
-+		/* 32-bit writes cannot span across a page boundary
-+		 * (256 bytes). This types of writes require two page
-+		 * program operations to handle it correctly. The STM part
-+		 * will write the overflow data to the beginning of the
-+		 * current page as opposed to the subsequent page.
-+		 */
-+		page_offset = (to & (STM_PAGE_SIZE - 1)) + read_len;
-+
-+		if (page_offset > STM_PAGE_SIZE)
-+			read_len -= (page_offset - STM_PAGE_SIZE);
-+
-+		if (!spiflash_wait_ready(priv, FL_WRITING))
-+			return -EINTR;
-+
-+		spiflash_sendcmd(priv, SPI_WRITE_ENABLE, 0);
-+		spi_data = 0;
-+		switch (read_len) {
-+		case 4:
-+			spi_data |= buf[3] << 24;
-+			/* fall through */
-+		case 3:
-+			spi_data |= buf[2] << 16;
-+			/* fall through */
-+		case 2:
-+			spi_data |= buf[1] << 8;
-+			/* fall through */
-+		case 1:
-+			spi_data |= buf[0] & 0xff;
-+			break;
-+		default:
-+			break;
-+		}
-+
-+		spiflash_write_reg(priv, SPI_FLASH_DATA, spi_data);
-+		opcode = stm_opcodes[SPI_PAGE_PROGRAM].code |
-+			(to & 0x00ffffff) << 8;
-+		spiflash_write_reg(priv, SPI_FLASH_OPCODE, opcode);
-+
-+		reg = spiflash_read_reg(priv, SPI_FLASH_CTL);
-+		reg &= ~SPI_CTL_TX_RX_CNT_MASK;
-+		reg |= (read_len + 4) | SPI_CTL_START;
-+		spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
-+
-+		spiflash_wait_complete(priv, 1);
-+
-+		bytes_left -= read_len;
-+		to += read_len;
-+		buf += read_len;
-+
-+		*retlen += read_len;
-+	} while (bytes_left != 0);
-+
-+	return 0;
-+}
-+
-+
-+#ifdef CONFIG_MTD_PARTITIONS
-+static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", "MyLoader", NULL };
-+#endif
-+
-+
-+static int
-+spiflash_probe(struct platform_device *pdev)
-+{
-+	struct spiflash_priv *priv;
-+	struct mtd_partition *parts;
-+	struct mtd_info *mtd;
-+	int index, num_parts;
-+	int result = 0;
-+
-+	priv = kzalloc(sizeof(struct spiflash_priv), GFP_KERNEL);
-+	spin_lock_init(&priv->lock);
-+	init_waitqueue_head(&priv->wq);
-+	priv->state = FL_READY;
-+	mtd = &priv->mtd;
-+
-+	priv->mmraddr = ioremap_nocache(SPI_FLASH_MMR, SPI_FLASH_MMR_SIZE);
-+	if (!priv->mmraddr) {
-+		printk(KERN_WARNING SPIFLASH "Failed to map flash device\n");
-+		goto error;
-+	}
-+
-+	index = spiflash_probe_chip(priv);
-+	if (!index) {
-+		printk (KERN_WARNING SPIFLASH "Found no serial flash device\n");
-+		goto error;
-+	}
-+
-+	priv->readaddr = ioremap_nocache(SPI_FLASH_READ, flashconfig_tbl[index].byte_cnt);
-+	if (!priv->readaddr) {
-+		printk (KERN_WARNING SPIFLASH "Failed to map flash device\n");
-+		goto error;
-+	}
-+
-+	platform_set_drvdata(pdev, priv);
-+	mtd->name = "spiflash";
-+	mtd->type = MTD_NORFLASH;
-+	mtd->flags = (MTD_CAP_NORFLASH|MTD_WRITEABLE);
-+	mtd->size = flashconfig_tbl[index].byte_cnt;
-+	mtd->erasesize = flashconfig_tbl[index].sector_size;
-+	mtd->writesize = 1;
-+	mtd->numeraseregions = 0;
-+	mtd->eraseregions = NULL;
-+	mtd->erase = spiflash_erase;
-+	mtd->read = spiflash_read;
-+	mtd->write = spiflash_write;
-+	mtd->owner = THIS_MODULE;
-+
-+#ifdef CONFIG_MTD_PARTITIONS
-+	/* parse redboot partitions */
-+	num_parts = parse_mtd_partitions(mtd, part_probe_types, &parts, 0);
-+	if (!num_parts)
-+		goto error;
-+
-+	result = add_mtd_partitions(mtd, parts, num_parts);
-+#endif
-+
-+	return result;
-+
-+error:
-+	if (priv->mmraddr)
-+		iounmap(priv->mmraddr);
-+	kfree(priv);
-+	return -ENXIO;
-+}
-+
-+static int
-+spiflash_remove (struct platform_device *pdev)
-+{
-+	struct spiflash_priv *priv = platform_get_drvdata(pdev);
-+	struct mtd_info *mtd = &priv->mtd;
-+
-+	del_mtd_partitions(mtd);
-+	iounmap(priv->mmraddr);
-+	iounmap(priv->readaddr);
-+	kfree(priv);
-+
-+	return 0;
-+}
-+
-+struct platform_driver spiflash_driver = {
-+	.driver.name = "spiflash",
-+	.probe = spiflash_probe,
-+	.remove = spiflash_remove,
-+};
-+
-+int __init
-+spiflash_init (void)
-+{
-+	return platform_driver_register(&spiflash_driver);
-+}
-+
-+void __exit
-+spiflash_exit (void)
-+{
-+	return platform_driver_unregister(&spiflash_driver);
-+}
-+
-+module_init (spiflash_init);
-+module_exit (spiflash_exit);
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("OpenWrt.org, Atheros Communications Inc");
-+MODULE_DESCRIPTION("MTD driver for SPI Flash on Atheros SOC");
-+
-diff -Nur linux-2.6.39-rc7.orig/drivers/mtd/redboot.c linux-2.6.39-rc7/drivers/mtd/redboot.c
---- linux-2.6.39-rc7.orig/drivers/mtd/redboot.c	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/drivers/mtd/redboot.c	2011-05-15 21:34:57.000000000 +0200
-@@ -55,6 +55,22 @@
- 	return 1;
- }
- 
-+static uint32_t mtd_get_offset_erasesize(struct mtd_info *mtd, uint64_t offset)
-+{
-+	struct mtd_erase_region_info *regions = mtd->eraseregions;
-+	int i;
-+
-+	for (i = 0; i < mtd->numeraseregions; i++) {
-+		if (regions[i].offset +
-+		    regions[i].numblocks * regions[i].erasesize <= offset)
-+			continue;
-+
-+		return regions[i].erasesize;
-+	}
-+
-+	return mtd->erasesize;
-+}
-+
- static int parse_redboot_partitions(struct mtd_info *master,
-                              struct mtd_partition **pparts,
-                              unsigned long fis_origin)
-@@ -70,36 +86,38 @@
- 	int namelen = 0;
- 	int nulllen = 0;
- 	int numslots;
-+	int first_slot;
- 	unsigned long offset;
- #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
- 	static char nullstring[] = "unallocated";
- #endif
- 
-+	buf = vmalloc(master->erasesize);
-+	if (!buf)
-+		return -ENOMEM;
-+
-+ restart:
- 	if ( directory < 0 ) {
- 		offset = master->size + directory * master->erasesize;
--		while (master->block_isbad && 
-+		while (master->block_isbad &&
- 		       master->block_isbad(master, offset)) {
- 			if (!offset) {
- 			nogood:
- 				printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n");
-+				vfree(buf);
- 				return -EIO;
- 			}
- 			offset -= master->erasesize;
- 		}
- 	} else {
- 		offset = directory * master->erasesize;
--		while (master->block_isbad && 
-+		while (master->block_isbad &&
- 		       master->block_isbad(master, offset)) {
- 			offset += master->erasesize;
- 			if (offset == master->size)
- 				goto nogood;
- 		}
- 	}
--	buf = vmalloc(master->erasesize);
--
--	if (!buf)
--		return -ENOMEM;
--
- 	printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n",
- 	       master->name, offset);
- 
-@@ -171,13 +189,21 @@
- 	}
- 	if (i == numslots) {
- 		/* Didn't find it */
-+		if (offset + master->erasesize < master->size) {
-+			/* not at the end of the flash yet, maybe next block :) */
-+			directory++;
-+			goto restart;
-+		}
- 		printk(KERN_NOTICE "No RedBoot partition table detected in %s\n",
- 		       master->name);
- 		ret = 0;
- 		goto out;
- 	}
- 
--	for (i = 0; i < numslots; i++) {
-+	first_slot = (buf[i].flash_base & (master->erasesize - 1)) /
-+		     sizeof(struct fis_image_desc);
-+
-+	for (i = first_slot; i < first_slot + numslots; i++) {
- 		struct fis_list *new_fl, **prev;
- 
- 		if (buf[i].name[0] == 0xff) {
-diff -Nur linux-2.6.39-rc7.orig/drivers/net/Kconfig linux-2.6.39-rc7/drivers/net/Kconfig
---- linux-2.6.39-rc7.orig/drivers/net/Kconfig	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/drivers/net/Kconfig	2011-05-15 21:34:57.000000000 +0200
-@@ -251,6 +251,12 @@
- 	help
- 	  Select this if your platform comes with an external 93CX6 eeprom.
- 
-+config AR231X_ETHERNET
-+	tristate "AR231x Ethernet support"
-+	depends on ATHEROS_AR231X
-+	help
-+	  Support for the AR231x/531x ethernet controller
-+
- config MACE
- 	tristate "MACE (Power Mac ethernet) support"
- 	depends on PPC_PMAC && PPC32
-diff -Nur linux-2.6.39-rc7.orig/drivers/net/Makefile linux-2.6.39-rc7/drivers/net/Makefile
---- linux-2.6.39-rc7.orig/drivers/net/Makefile	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/drivers/net/Makefile	2011-05-15 21:34:57.000000000 +0200
-@@ -226,6 +226,7 @@
- obj-$(CONFIG_KORINA) += korina.o
- obj-$(CONFIG_MIPS_JAZZ_SONIC) += jazzsonic.o
- obj-$(CONFIG_MIPS_AU1X00_ENET) += au1000_eth.o
-+obj-$(CONFIG_AR231X_ETHERNET) += ar231x.o
- obj-$(CONFIG_MIPS_SIM_NET) += mipsnet.o
- obj-$(CONFIG_SGI_IOC3_ETH) += ioc3-eth.o
- obj-$(CONFIG_DECLANCE) += declance.o
-diff -Nur linux-2.6.39-rc7.orig/drivers/net/ar231x.c linux-2.6.39-rc7/drivers/net/ar231x.c
---- linux-2.6.39-rc7.orig/drivers/net/ar231x.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/drivers/net/ar231x.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,1293 @@
-+/*
-+ * ar231x.c: Linux driver for the Atheros AR231x Ethernet device.
-+ *
-+ * Copyright (C) 2004 by Sameer Dekate <sdekate@arubanetworks.com>
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
-+ *
-+ * Thanks to Atheros for providing hardware and documentation
-+ * enabling me to write this driver.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * Additional credits:
-+ * 	This code is taken from John Taylor's Sibyte driver and then
-+ * 	modified for the AR2313.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/version.h>
-+#include <linux/types.h>
-+#include <linux/errno.h>
-+#include <linux/ioport.h>
-+#include <linux/pci.h>
-+#include <linux/netdevice.h>
-+#include <linux/etherdevice.h>
-+#include <linux/skbuff.h>
-+#include <linux/init.h>
-+#include <linux/delay.h>
-+#include <linux/mm.h>
-+#include <linux/highmem.h>
-+#include <linux/sockios.h>
-+#include <linux/pkt_sched.h>
-+#include <linux/mii.h>
-+#include <linux/phy.h>
-+#include <linux/ethtool.h>
-+#include <linux/ctype.h>
-+#include <linux/platform_device.h>
-+
-+#include <net/sock.h>
-+#include <net/ip.h>
-+
-+#include <asm/system.h>
-+#include <asm/io.h>
-+#include <asm/irq.h>
-+#include <asm/byteorder.h>
-+#include <asm/uaccess.h>
-+#include <asm/bootinfo.h>
-+
-+#define AR2313_MTU                     1692
-+#define AR2313_PRIOS                   1
-+#define AR2313_QUEUES                  (2*AR2313_PRIOS)
-+#define AR2313_DESCR_ENTRIES           64
-+
-+
-+#ifndef min
-+#define min(a,b)	(((a)<(b))?(a):(b))
-+#endif
-+
-+#ifndef SMP_CACHE_BYTES
-+#define SMP_CACHE_BYTES	L1_CACHE_BYTES
-+#endif
-+
-+#define AR2313_MBOX_SET_BIT  0x8
-+
-+#include "ar231x.h"
-+
-+/*
-+ * New interrupt handler strategy:
-+ *
-+ * An old interrupt handler worked using the traditional method of
-+ * replacing an skbuff with a new one when a packet arrives. However
-+ * the rx rings do not need to contain a static number of buffer
-+ * descriptors, thus it makes sense to move the memory allocation out
-+ * of the main interrupt handler and do it in a bottom half handler
-+ * and only allocate new buffers when the number of buffers in the
-+ * ring is below a certain threshold. In order to avoid starving the
-+ * NIC under heavy load it is however necessary to force allocation
-+ * when hitting a minimum threshold. The strategy for alloction is as
-+ * follows:
-+ *
-+ *     RX_LOW_BUF_THRES    - allocate buffers in the bottom half
-+ *     RX_PANIC_LOW_THRES  - we are very low on buffers, allocate
-+ *                           the buffers in the interrupt handler
-+ *     RX_RING_THRES       - maximum number of buffers in the rx ring
-+ *
-+ * One advantagous side effect of this allocation approach is that the
-+ * entire rx processing can be done without holding any spin lock
-+ * since the rx rings and registers are totally independent of the tx
-+ * ring and its registers.  This of course includes the kmalloc's of
-+ * new skb's. Thus start_xmit can run in parallel with rx processing
-+ * and the memory allocation on SMP systems.
-+ *
-+ * Note that running the skb reallocation in a bottom half opens up
-+ * another can of races which needs to be handled properly. In
-+ * particular it can happen that the interrupt handler tries to run
-+ * the reallocation while the bottom half is either running on another
-+ * CPU or was interrupted on the same CPU. To get around this the
-+ * driver uses bitops to prevent the reallocation routines from being
-+ * reentered.
-+ *
-+ * TX handling can also be done without holding any spin lock, wheee
-+ * this is fun! since tx_csm is only written to by the interrupt
-+ * handler.
-+ */
-+
-+/*
-+ * Threshold values for RX buffer allocation - the low water marks for
-+ * when to start refilling the rings are set to 75% of the ring
-+ * sizes. It seems to make sense to refill the rings entirely from the
-+ * intrrupt handler once it gets below the panic threshold, that way
-+ * we don't risk that the refilling is moved to another CPU when the
-+ * one running the interrupt handler just got the slab code hot in its
-+ * cache.
-+ */
-+#define RX_RING_SIZE		AR2313_DESCR_ENTRIES
-+#define RX_PANIC_THRES	        (RX_RING_SIZE/4)
-+#define RX_LOW_THRES	        ((3*RX_RING_SIZE)/4)
-+#define CRC_LEN                 4
-+#define RX_OFFSET               2
-+
-+#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
-+#define VLAN_HDR                4
-+#else
-+#define VLAN_HDR                0
-+#endif
-+
-+#define AR2313_BUFSIZE		(AR2313_MTU + VLAN_HDR + ETH_HLEN + CRC_LEN + RX_OFFSET)
-+
-+#ifdef MODULE
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Sameer Dekate <sdekate@arubanetworks.com>, Imre Kaloz <kaloz@openwrt.org>, Felix Fietkau <nbd@openwrt.org>");
-+MODULE_DESCRIPTION("AR231x Ethernet driver");
-+#endif
-+
-+#define virt_to_phys(x) ((u32)(x) & 0x1fffffff)
-+
-+// prototypes
-+static void ar231x_halt(struct net_device *dev);
-+static void rx_tasklet_func(unsigned long data);
-+static void rx_tasklet_cleanup(struct net_device *dev);
-+static void ar231x_multicast_list(struct net_device *dev);
-+static void ar231x_tx_timeout(struct net_device *dev);
-+
-+static int ar231x_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum);
-+static int ar231x_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum, u16 value);
-+static int ar231x_mdiobus_reset(struct mii_bus *bus);
-+static int ar231x_mdiobus_probe (struct net_device *dev);
-+static void ar231x_adjust_link(struct net_device *dev);
-+
-+#ifndef ERR
-+#define ERR(fmt, args...) printk("%s: " fmt, __func__, ##args)
-+#endif
-+
-+#ifdef CONFIG_NET_POLL_CONTROLLER
-+static void
-+ar231x_netpoll(struct net_device *dev)
-+{
-+      unsigned long flags;
-+
-+      local_irq_save(flags);
-+      ar231x_interrupt(dev->irq, dev);
-+      local_irq_restore(flags);
-+}
-+#endif
-+
-+static const struct net_device_ops ar231x_ops = {
-+	.ndo_open 		= ar231x_open,
-+	.ndo_stop 		= ar231x_close,
-+	.ndo_start_xmit 	= ar231x_start_xmit,
-+	.ndo_set_multicast_list = ar231x_multicast_list,
-+	.ndo_do_ioctl 		= ar231x_ioctl,
-+	.ndo_change_mtu 	= eth_change_mtu,
-+	.ndo_validate_addr	= eth_validate_addr,
-+	.ndo_set_mac_address 	= eth_mac_addr,
-+	.ndo_tx_timeout		= ar231x_tx_timeout,
-+#ifdef CONFIG_NET_POLL_CONTROLLER
-+	.ndo_poll_controller	= ar231x_netpoll,
-+#endif
-+};
-+
-+int __init ar231x_probe(struct platform_device *pdev)
-+{
-+	struct net_device *dev;
-+	struct ar231x_private *sp;
-+	struct resource *res;
-+	unsigned long ar_eth_base;
-+	char buf[64];
-+
-+	dev = alloc_etherdev(sizeof(struct ar231x_private));
-+
-+	if (dev == NULL) {
-+		printk(KERN_ERR
-+			   "ar231x: Unable to allocate net_device structure!\n");
-+		return -ENOMEM;
-+	}
-+
-+	platform_set_drvdata(pdev, dev);
-+
-+	sp = netdev_priv(dev);
-+	sp->dev = dev;
-+	sp->cfg = pdev->dev.platform_data;
-+
-+	sprintf(buf, "eth%d_membase", pdev->id);
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, buf);
-+	if (!res)
-+		return -ENODEV;
-+
-+	sp->link = 0;
-+	ar_eth_base = res->start;
-+
-+	sprintf(buf, "eth%d_irq", pdev->id);
-+	dev->irq = platform_get_irq_byname(pdev, buf);
-+
-+	spin_lock_init(&sp->lock);
-+
-+	dev->features |= NETIF_F_HIGHDMA;
-+	dev->netdev_ops = &ar231x_ops;
-+
-+	tasklet_init(&sp->rx_tasklet, rx_tasklet_func, (unsigned long) dev);
-+	tasklet_disable(&sp->rx_tasklet);
-+
-+	sp->eth_regs =
-+		ioremap_nocache(virt_to_phys(ar_eth_base), sizeof(*sp->eth_regs));
-+	if (!sp->eth_regs) {
-+		printk("Can't remap eth registers\n");
-+		return (-ENXIO);
-+	}
-+
-+	/*
-+	 * When there's only one MAC, PHY regs are typically on ENET0,
-+	 * even though the MAC might be on ENET1.
-+	 * Needto remap PHY regs separately in this case
-+	 */
-+	if (virt_to_phys(ar_eth_base) == virt_to_phys(sp->phy_regs))
-+		sp->phy_regs = sp->eth_regs;
-+	else {
-+		sp->phy_regs =
-+			ioremap_nocache(virt_to_phys(sp->cfg->phy_base),
-+							sizeof(*sp->phy_regs));
-+		if (!sp->phy_regs) {
-+			printk("Can't remap phy registers\n");
-+			return (-ENXIO);
-+		}
-+	}
-+
-+	sp->dma_regs =
-+		ioremap_nocache(virt_to_phys(ar_eth_base + 0x1000),
-+						sizeof(*sp->dma_regs));
-+	dev->base_addr = (unsigned int) sp->dma_regs;
-+	if (!sp->dma_regs) {
-+		printk("Can't remap DMA registers\n");
-+		return (-ENXIO);
-+	}
-+
-+	sp->int_regs = ioremap_nocache(virt_to_phys(sp->cfg->reset_base), 4);
-+	if (!sp->int_regs) {
-+		printk("Can't remap INTERRUPT registers\n");
-+		return (-ENXIO);
-+	}
-+
-+	strncpy(sp->name, "Atheros AR231x", sizeof(sp->name) - 1);
-+	sp->name[sizeof(sp->name) - 1] = '\0';
-+	memcpy(dev->dev_addr, sp->cfg->macaddr, 6);
-+
-+	if (ar231x_init(dev)) {
-+		/*
-+		 * ar231x_init() calls ar231x_init_cleanup() on error.
-+		 */
-+		kfree(dev);
-+		return -ENODEV;
-+	}
-+
-+	if (register_netdev(dev)) {
-+		printk("%s: register_netdev failed\n", __func__);
-+		return -1;
-+	}
-+
-+	printk("%s: %s: %02x:%02x:%02x:%02x:%02x:%02x, irq %d\n",
-+		   dev->name, sp->name,
-+		   dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
-+		   dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5], dev->irq);
-+
-+	sp->mii_bus = mdiobus_alloc();
-+	if (sp->mii_bus == NULL)
-+		return -1;
-+
-+	sp->mii_bus->priv = dev;
-+	sp->mii_bus->read = ar231x_mdiobus_read;
-+	sp->mii_bus->write = ar231x_mdiobus_write;
-+	sp->mii_bus->reset = ar231x_mdiobus_reset;
-+	sp->mii_bus->name = "ar231x_eth_mii";
-+	snprintf(sp->mii_bus->id, MII_BUS_ID_SIZE, "%d", pdev->id);
-+	sp->mii_bus->irq = kmalloc(sizeof(int), GFP_KERNEL);
-+	*sp->mii_bus->irq = PHY_POLL;
-+
-+	mdiobus_register(sp->mii_bus);
-+
-+	if (ar231x_mdiobus_probe(dev) != 0) {
-+		printk(KERN_ERR "%s: mdiobus_probe failed\n", dev->name);
-+		rx_tasklet_cleanup(dev);
-+		ar231x_init_cleanup(dev);
-+		unregister_netdev(dev);
-+		kfree(dev);
-+		return -ENODEV;
-+	}
-+
-+	/* start link poll timer */
-+	ar231x_setup_timer(dev);
-+
-+	return 0;
-+}
-+
-+
-+static void ar231x_multicast_list(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	unsigned int filter;
-+
-+	filter = sp->eth_regs->mac_control;
-+
-+	if (dev->flags & IFF_PROMISC)
-+		filter |= MAC_CONTROL_PR;
-+	else
-+		filter &= ~MAC_CONTROL_PR;
-+	if ((dev->flags & IFF_ALLMULTI) || (netdev_mc_count(dev) > 0))
-+		filter |= MAC_CONTROL_PM;
-+	else
-+		filter &= ~MAC_CONTROL_PM;
-+
-+	sp->eth_regs->mac_control = filter;
-+}
-+
-+static void rx_tasklet_cleanup(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+
-+	/*
-+	 * Tasklet may be scheduled. Need to get it removed from the list
-+	 * since we're about to free the struct.
-+	 */
-+
-+	sp->unloading = 1;
-+	tasklet_enable(&sp->rx_tasklet);
-+	tasklet_kill(&sp->rx_tasklet);
-+}
-+
-+static int __devexit ar231x_remove(struct platform_device *pdev)
-+{
-+	struct net_device *dev = platform_get_drvdata(pdev);
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	rx_tasklet_cleanup(dev);
-+	ar231x_init_cleanup(dev);
-+	unregister_netdev(dev);
-+	mdiobus_unregister(sp->mii_bus);
-+	mdiobus_free(sp->mii_bus);
-+	kfree(dev);
-+	return 0;
-+}
-+
-+
-+/*
-+ * Restart the AR2313 ethernet controller.
-+ */
-+static int ar231x_restart(struct net_device *dev)
-+{
-+	/* disable interrupts */
-+	disable_irq(dev->irq);
-+
-+	/* stop mac */
-+	ar231x_halt(dev);
-+
-+	/* initialize */
-+	ar231x_init(dev);
-+
-+	/* enable interrupts */
-+	enable_irq(dev->irq);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver ar231x_driver = {
-+	.driver.name = "ar231x-eth",
-+	.probe = ar231x_probe,
-+	.remove = __devexit_p(ar231x_remove),
-+};
-+
-+int __init ar231x_module_init(void)
-+{
-+	return platform_driver_register(&ar231x_driver);
-+}
-+
-+void __exit ar231x_module_cleanup(void)
-+{
-+	platform_driver_unregister(&ar231x_driver);
-+}
-+
-+module_init(ar231x_module_init);
-+module_exit(ar231x_module_cleanup);
-+
-+
-+static void ar231x_free_descriptors(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	if (sp->rx_ring != NULL) {
-+		kfree((void *) KSEG0ADDR(sp->rx_ring));
-+		sp->rx_ring = NULL;
-+		sp->tx_ring = NULL;
-+	}
-+}
-+
-+
-+static int ar231x_allocate_descriptors(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	int size;
-+	int j;
-+	ar231x_descr_t *space;
-+
-+	if (sp->rx_ring != NULL) {
-+		printk("%s: already done.\n", __FUNCTION__);
-+		return 0;
-+	}
-+
-+	size =
-+		(sizeof(ar231x_descr_t) * (AR2313_DESCR_ENTRIES * AR2313_QUEUES));
-+	space = kmalloc(size, GFP_KERNEL);
-+	if (space == NULL)
-+		return 1;
-+
-+	/* invalidate caches */
-+	dma_cache_inv((unsigned int) space, size);
-+
-+	/* now convert pointer to KSEG1 */
-+	space = (ar231x_descr_t *) KSEG1ADDR(space);
-+
-+	memset((void *) space, 0, size);
-+
-+	sp->rx_ring = space;
-+	space += AR2313_DESCR_ENTRIES;
-+
-+	sp->tx_ring = space;
-+	space += AR2313_DESCR_ENTRIES;
-+
-+	/* Initialize the transmit Descriptors */
-+	for (j = 0; j < AR2313_DESCR_ENTRIES; j++) {
-+		ar231x_descr_t *td = &sp->tx_ring[j];
-+		td->status = 0;
-+		td->devcs = DMA_TX1_CHAINED;
-+		td->addr = 0;
-+		td->descr =
-+			virt_to_phys(&sp->
-+						 tx_ring[(j + 1) & (AR2313_DESCR_ENTRIES - 1)]);
-+	}
-+
-+	return 0;
-+}
-+
-+
-+/*
-+ * Generic cleanup handling data allocated during init. Used when the
-+ * module is unloaded or if an error occurs during initialization
-+ */
-+static void ar231x_init_cleanup(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	struct sk_buff *skb;
-+	int j;
-+
-+	ar231x_free_descriptors(dev);
-+
-+	if (sp->eth_regs)
-+		iounmap((void *) sp->eth_regs);
-+	if (sp->dma_regs)
-+		iounmap((void *) sp->dma_regs);
-+
-+	if (sp->rx_skb) {
-+		for (j = 0; j < AR2313_DESCR_ENTRIES; j++) {
-+			skb = sp->rx_skb[j];
-+			if (skb) {
-+				sp->rx_skb[j] = NULL;
-+				dev_kfree_skb(skb);
-+			}
-+		}
-+		kfree(sp->rx_skb);
-+		sp->rx_skb = NULL;
-+	}
-+
-+	if (sp->tx_skb) {
-+		for (j = 0; j < AR2313_DESCR_ENTRIES; j++) {
-+			skb = sp->tx_skb[j];
-+			if (skb) {
-+				sp->tx_skb[j] = NULL;
-+				dev_kfree_skb(skb);
-+			}
-+		}
-+		kfree(sp->tx_skb);
-+		sp->tx_skb = NULL;
-+	}
-+}
-+
-+static int ar231x_setup_timer(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+
-+	init_timer(&sp->link_timer);
-+
-+	sp->link_timer.function = ar231x_link_timer_fn;
-+	sp->link_timer.data = (int) dev;
-+	sp->link_timer.expires = jiffies + HZ;
-+
-+	add_timer(&sp->link_timer);
-+	return 0;
-+
-+}
-+
-+static void ar231x_link_timer_fn(unsigned long data)
-+{
-+	struct net_device *dev = (struct net_device *) data;
-+	struct ar231x_private *sp = netdev_priv(dev);
-+
-+	// see if the link status changed
-+	// This was needed to make sure we set the PHY to the
-+	// autonegotiated value of half or full duplex.
-+	ar231x_check_link(dev);
-+
-+	// Loop faster when we don't have link.
-+	// This was needed to speed up the AP bootstrap time.
-+	if (sp->link == 0) {
-+		mod_timer(&sp->link_timer, jiffies + HZ / 2);
-+	} else {
-+		mod_timer(&sp->link_timer, jiffies + LINK_TIMER);
-+	}
-+}
-+
-+static void ar231x_check_link(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	u16 phyData;
-+
-+	phyData = ar231x_mdiobus_read(sp->mii_bus, sp->phy, MII_BMSR);
-+	if (sp->phyData != phyData) {
-+		if (phyData & BMSR_LSTATUS) {
-+			/* link is present, ready link partner ability to deterine
-+			   duplexity */
-+			int duplex = 0;
-+			u16 reg;
-+
-+			sp->link = 1;
-+			reg = ar231x_mdiobus_read(sp->mii_bus, sp->phy, MII_BMCR);
-+			if (reg & BMCR_ANENABLE) {
-+				/* auto neg enabled */
-+				reg = ar231x_mdiobus_read(sp->mii_bus, sp->phy, MII_LPA);
-+				duplex = (reg & (LPA_100FULL | LPA_10FULL)) ? 1 : 0;
-+			} else {
-+				/* no auto neg, just read duplex config */
-+				duplex = (reg & BMCR_FULLDPLX) ? 1 : 0;
-+			}
-+
-+			printk(KERN_INFO "%s: Configuring MAC for %s duplex\n",
-+				   dev->name, (duplex) ? "full" : "half");
-+
-+			if (duplex) {
-+				/* full duplex */
-+				sp->eth_regs->mac_control =
-+					((sp->eth_regs->
-+					  mac_control | MAC_CONTROL_F) & ~MAC_CONTROL_DRO);
-+			} else {
-+				/* half duplex */
-+				sp->eth_regs->mac_control =
-+					((sp->eth_regs->
-+					  mac_control | MAC_CONTROL_DRO) & ~MAC_CONTROL_F);
-+			}
-+		} else {
-+			/* no link */
-+			sp->link = 0;
-+		}
-+		sp->phyData = phyData;
-+	}
-+}
-+
-+static int ar231x_reset_reg(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	unsigned int ethsal, ethsah;
-+	unsigned int flags;
-+
-+	*sp->int_regs |= sp->cfg->reset_mac;
-+	mdelay(10);
-+	*sp->int_regs &= ~sp->cfg->reset_mac;
-+	mdelay(10);
-+	*sp->int_regs |= sp->cfg->reset_phy;
-+	mdelay(10);
-+	*sp->int_regs &= ~sp->cfg->reset_phy;
-+	mdelay(10);
-+
-+	sp->dma_regs->bus_mode = (DMA_BUS_MODE_SWR);
-+	mdelay(10);
-+	sp->dma_regs->bus_mode =
-+		((32 << DMA_BUS_MODE_PBL_SHIFT) | DMA_BUS_MODE_BLE);
-+
-+	/* enable interrupts */
-+	sp->dma_regs->intr_ena = (DMA_STATUS_AIS |
-+							  DMA_STATUS_NIS |
-+							  DMA_STATUS_RI |
-+							  DMA_STATUS_TI | DMA_STATUS_FBE);
-+	sp->dma_regs->xmt_base = virt_to_phys(sp->tx_ring);
-+	sp->dma_regs->rcv_base = virt_to_phys(sp->rx_ring);
-+	sp->dma_regs->control =
-+		(DMA_CONTROL_SR | DMA_CONTROL_ST | DMA_CONTROL_SF);
-+
-+	sp->eth_regs->flow_control = (FLOW_CONTROL_FCE);
-+	sp->eth_regs->vlan_tag = (0x8100);
-+
-+	/* Enable Ethernet Interface */
-+	flags = (MAC_CONTROL_TE |	/* transmit enable */
-+			 MAC_CONTROL_PM |	/* pass mcast */
-+			 MAC_CONTROL_F |	/* full duplex */
-+			 MAC_CONTROL_HBD);	/* heart beat disabled */
-+
-+	if (dev->flags & IFF_PROMISC) {	/* set promiscuous mode */
-+		flags |= MAC_CONTROL_PR;
-+	}
-+	sp->eth_regs->mac_control = flags;
-+
-+	/* Set all Ethernet station address registers to their initial values */
-+	ethsah = ((((u_int) (dev->dev_addr[5]) << 8) & (u_int) 0x0000FF00) |
-+			  (((u_int) (dev->dev_addr[4]) << 0) & (u_int) 0x000000FF));
-+
-+	ethsal = ((((u_int) (dev->dev_addr[3]) << 24) & (u_int) 0xFF000000) |
-+			  (((u_int) (dev->dev_addr[2]) << 16) & (u_int) 0x00FF0000) |
-+			  (((u_int) (dev->dev_addr[1]) << 8) & (u_int) 0x0000FF00) |
-+			  (((u_int) (dev->dev_addr[0]) << 0) & (u_int) 0x000000FF));
-+
-+	sp->eth_regs->mac_addr[0] = ethsah;
-+	sp->eth_regs->mac_addr[1] = ethsal;
-+
-+	mdelay(10);
-+
-+	return (0);
-+}
-+
-+
-+static int ar231x_init(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	int ecode = 0;
-+
-+	/*
-+	 * Allocate descriptors
-+	 */
-+	if (ar231x_allocate_descriptors(dev)) {
-+		printk("%s: %s: ar231x_allocate_descriptors failed\n",
-+			   dev->name, __FUNCTION__);
-+		ecode = -EAGAIN;
-+		goto init_error;
-+	}
-+
-+	/*
-+	 * Get the memory for the skb rings.
-+	 */
-+	if (sp->rx_skb == NULL) {
-+		sp->rx_skb =
-+			kmalloc(sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES,
-+					GFP_KERNEL);
-+		if (!(sp->rx_skb)) {
-+			printk("%s: %s: rx_skb kmalloc failed\n",
-+				   dev->name, __FUNCTION__);
-+			ecode = -EAGAIN;
-+			goto init_error;
-+		}
-+	}
-+	memset(sp->rx_skb, 0, sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES);
-+
-+	if (sp->tx_skb == NULL) {
-+		sp->tx_skb =
-+			kmalloc(sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES,
-+					GFP_KERNEL);
-+		if (!(sp->tx_skb)) {
-+			printk("%s: %s: tx_skb kmalloc failed\n",
-+				   dev->name, __FUNCTION__);
-+			ecode = -EAGAIN;
-+			goto init_error;
-+		}
-+	}
-+	memset(sp->tx_skb, 0, sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES);
-+
-+	/*
-+	 * Set tx_csm before we start receiving interrupts, otherwise
-+	 * the interrupt handler might think it is supposed to process
-+	 * tx ints before we are up and running, which may cause a null
-+	 * pointer access in the int handler.
-+	 */
-+	sp->rx_skbprd = 0;
-+	sp->cur_rx = 0;
-+	sp->tx_prd = 0;
-+	sp->tx_csm = 0;
-+
-+	/*
-+	 * Zero the stats before starting the interface
-+	 */
-+	memset(&dev->stats, 0, sizeof(dev->stats));
-+
-+	/*
-+	 * We load the ring here as there seem to be no way to tell the
-+	 * firmware to wipe the ring without re-initializing it.
-+	 */
-+	ar231x_load_rx_ring(dev, RX_RING_SIZE);
-+
-+	/*
-+	 * Init hardware
-+	 */
-+	ar231x_reset_reg(dev);
-+
-+	/*
-+	 * Get the IRQ
-+	 */
-+	ecode =
-+		request_irq(dev->irq, &ar231x_interrupt,
-+					IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
-+					dev->name, dev);
-+	if (ecode) {
-+		printk(KERN_WARNING "%s: %s: Requested IRQ %d is busy\n",
-+			   dev->name, __FUNCTION__, dev->irq);
-+		goto init_error;
-+	}
-+
-+
-+	tasklet_enable(&sp->rx_tasklet);
-+
-+	return 0;
-+
-+  init_error:
-+	ar231x_init_cleanup(dev);
-+	return ecode;
-+}
-+
-+/*
-+ * Load the rx ring.
-+ *
-+ * Loading rings is safe without holding the spin lock since this is
-+ * done only before the device is enabled, thus no interrupts are
-+ * generated and by the interrupt handler/tasklet handler.
-+ */
-+static void ar231x_load_rx_ring(struct net_device *dev, int nr_bufs)
-+{
-+
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	short i, idx;
-+
-+	idx = sp->rx_skbprd;
-+
-+	for (i = 0; i < nr_bufs; i++) {
-+		struct sk_buff *skb;
-+		ar231x_descr_t *rd;
-+
-+		if (sp->rx_skb[idx])
-+			break;
-+
-+		skb = netdev_alloc_skb(dev, AR2313_BUFSIZE);
-+		if (!skb) {
-+			printk("\n\n\n\n %s: No memory in system\n\n\n\n",
-+				   __FUNCTION__);
-+			break;
-+		}
-+
-+		/*
-+		 * Make sure IP header starts on a fresh cache line.
-+		 */
-+		skb->dev = dev;
-+		skb_reserve(skb, RX_OFFSET);
-+		sp->rx_skb[idx] = skb;
-+
-+		rd = (ar231x_descr_t *) & sp->rx_ring[idx];
-+
-+		/* initialize dma descriptor */
-+		rd->devcs = ((AR2313_BUFSIZE << DMA_RX1_BSIZE_SHIFT) |
-+					 DMA_RX1_CHAINED);
-+		rd->addr = virt_to_phys(skb->data);
-+		rd->descr =
-+			virt_to_phys(&sp->
-+						 rx_ring[(idx + 1) & (AR2313_DESCR_ENTRIES - 1)]);
-+		rd->status = DMA_RX_OWN;
-+
-+		idx = DSC_NEXT(idx);
-+	}
-+
-+	if (i)
-+		sp->rx_skbprd = idx;
-+
-+	return;
-+}
-+
-+#define AR2313_MAX_PKTS_PER_CALL        64
-+
-+static int ar231x_rx_int(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	struct sk_buff *skb, *skb_new;
-+	ar231x_descr_t *rxdesc;
-+	unsigned int status;
-+	u32 idx;
-+	int pkts = 0;
-+	int rval;
-+
-+	idx = sp->cur_rx;
-+
-+	/* process at most the entire ring and then wait for another interrupt
-+	 */
-+	while (1) {
-+
-+		rxdesc = &sp->rx_ring[idx];
-+		status = rxdesc->status;
-+		if (status & DMA_RX_OWN) {
-+			/* SiByte owns descriptor or descr not yet filled in */
-+			rval = 0;
-+			break;
-+		}
-+
-+		if (++pkts > AR2313_MAX_PKTS_PER_CALL) {
-+			rval = 1;
-+			break;
-+		}
-+
-+		if ((status & DMA_RX_ERROR) && !(status & DMA_RX_LONG)) {
-+			dev->stats.rx_errors++;
-+			dev->stats.rx_dropped++;
-+
-+			/* add statistics counters */
-+			if (status & DMA_RX_ERR_CRC)
-+				dev->stats.rx_crc_errors++;
-+			if (status & DMA_RX_ERR_COL)
-+				dev->stats.rx_over_errors++;
-+			if (status & DMA_RX_ERR_LENGTH)
-+				dev->stats.rx_length_errors++;
-+			if (status & DMA_RX_ERR_RUNT)
-+				dev->stats.rx_over_errors++;
-+			if (status & DMA_RX_ERR_DESC)
-+				dev->stats.rx_over_errors++;
-+
-+		} else {
-+			/* alloc new buffer. */
-+			skb_new = netdev_alloc_skb(dev, AR2313_BUFSIZE + RX_OFFSET);
-+			if (skb_new != NULL) {
-+
-+				skb = sp->rx_skb[idx];
-+				/* set skb */
-+				skb_put(skb,
-+						((status >> DMA_RX_LEN_SHIFT) & 0x3fff) - CRC_LEN);
-+
-+				dev->stats.rx_bytes += skb->len;
-+				skb->protocol = eth_type_trans(skb, dev);
-+				/* pass the packet to upper layers */
-+				netif_rx(skb);
-+
-+				skb_new->dev = dev;
-+				/* 16 bit align */
-+				skb_reserve(skb_new, RX_OFFSET);
-+				/* reset descriptor's curr_addr */
-+				rxdesc->addr = virt_to_phys(skb_new->data);
-+
-+				dev->stats.rx_packets++;
-+				sp->rx_skb[idx] = skb_new;
-+			} else {
-+				dev->stats.rx_dropped++;
-+			}
-+		}
-+
-+		rxdesc->devcs = ((AR2313_BUFSIZE << DMA_RX1_BSIZE_SHIFT) |
-+						 DMA_RX1_CHAINED);
-+		rxdesc->status = DMA_RX_OWN;
-+
-+		idx = DSC_NEXT(idx);
-+	}
-+
-+	sp->cur_rx = idx;
-+
-+	return rval;
-+}
-+
-+
-+static void ar231x_tx_int(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	u32 idx;
-+	struct sk_buff *skb;
-+	ar231x_descr_t *txdesc;
-+	unsigned int status = 0;
-+
-+	idx = sp->tx_csm;
-+
-+	while (idx != sp->tx_prd) {
-+		txdesc = &sp->tx_ring[idx];
-+
-+		if ((status = txdesc->status) & DMA_TX_OWN) {
-+			/* ar231x dma still owns descr */
-+			break;
-+		}
-+		/* done with this descriptor */
-+		dma_unmap_single(NULL, txdesc->addr,
-+						 txdesc->devcs & DMA_TX1_BSIZE_MASK,
-+						 DMA_TO_DEVICE);
-+		txdesc->status = 0;
-+
-+		if (status & DMA_TX_ERROR) {
-+			dev->stats.tx_errors++;
-+			dev->stats.tx_dropped++;
-+			if (status & DMA_TX_ERR_UNDER)
-+				dev->stats.tx_fifo_errors++;
-+			if (status & DMA_TX_ERR_HB)
-+				dev->stats.tx_heartbeat_errors++;
-+			if (status & (DMA_TX_ERR_LOSS | DMA_TX_ERR_LINK))
-+				dev->stats.tx_carrier_errors++;
-+			if (status & (DMA_TX_ERR_LATE |
-+						  DMA_TX_ERR_COL |
-+						  DMA_TX_ERR_JABBER | DMA_TX_ERR_DEFER))
-+				dev->stats.tx_aborted_errors++;
-+		} else {
-+			/* transmit OK */
-+			dev->stats.tx_packets++;
-+		}
-+
-+		skb = sp->tx_skb[idx];
-+		sp->tx_skb[idx] = NULL;
-+		idx = DSC_NEXT(idx);
-+		dev->stats.tx_bytes += skb->len;
-+		dev_kfree_skb_irq(skb);
-+	}
-+
-+	sp->tx_csm = idx;
-+
-+	return;
-+}
-+
-+
-+static void rx_tasklet_func(unsigned long data)
-+{
-+	struct net_device *dev = (struct net_device *) data;
-+	struct ar231x_private *sp = netdev_priv(dev);
-+
-+	if (sp->unloading) {
-+		return;
-+	}
-+
-+	if (ar231x_rx_int(dev)) {
-+		tasklet_hi_schedule(&sp->rx_tasklet);
-+	} else {
-+		unsigned long flags;
-+		spin_lock_irqsave(&sp->lock, flags);
-+		sp->dma_regs->intr_ena |= DMA_STATUS_RI;
-+		spin_unlock_irqrestore(&sp->lock, flags);
-+	}
-+}
-+
-+static void rx_schedule(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+
-+	sp->dma_regs->intr_ena &= ~DMA_STATUS_RI;
-+
-+	tasklet_hi_schedule(&sp->rx_tasklet);
-+}
-+
-+static irqreturn_t ar231x_interrupt(int irq, void *dev_id)
-+{
-+	struct net_device *dev = (struct net_device *) dev_id;
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	unsigned int status, enabled;
-+
-+	/* clear interrupt */
-+	/*
-+	 * Don't clear RI bit if currently disabled.
-+	 */
-+	status = sp->dma_regs->status;
-+	enabled = sp->dma_regs->intr_ena;
-+	sp->dma_regs->status = status & enabled;
-+
-+	if (status & DMA_STATUS_NIS) {
-+		/* normal status */
-+		/*
-+		 * Don't schedule rx processing if interrupt
-+		 * is already disabled.
-+		 */
-+		if (status & enabled & DMA_STATUS_RI) {
-+			/* receive interrupt */
-+			rx_schedule(dev);
-+		}
-+		if (status & DMA_STATUS_TI) {
-+			/* transmit interrupt */
-+			ar231x_tx_int(dev);
-+		}
-+	}
-+
-+	/* abnormal status */
-+	if (status & (DMA_STATUS_FBE | DMA_STATUS_TPS)) {
-+		ar231x_restart(dev);
-+	}
-+	return IRQ_HANDLED;
-+}
-+
-+
-+static int ar231x_open(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	unsigned int ethsal, ethsah;
-+
-+	/* reset the hardware, in case the MAC address changed */
-+	ethsah = ((((u_int) (dev->dev_addr[5]) << 8) & (u_int) 0x0000FF00) |
-+			  (((u_int) (dev->dev_addr[4]) << 0) & (u_int) 0x000000FF));
-+
-+	ethsal = ((((u_int) (dev->dev_addr[3]) << 24) & (u_int) 0xFF000000) |
-+			  (((u_int) (dev->dev_addr[2]) << 16) & (u_int) 0x00FF0000) |
-+			  (((u_int) (dev->dev_addr[1]) << 8) & (u_int) 0x0000FF00) |
-+			  (((u_int) (dev->dev_addr[0]) << 0) & (u_int) 0x000000FF));
-+
-+	sp->eth_regs->mac_addr[0] = ethsah;
-+	sp->eth_regs->mac_addr[1] = ethsal;
-+
-+	mdelay(10);
-+
-+	dev->mtu = 1500;
-+	netif_start_queue(dev);
-+
-+	sp->eth_regs->mac_control |= MAC_CONTROL_RE;
-+
-+	return 0;
-+}
-+
-+static void ar231x_tx_timeout(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&sp->lock, flags);
-+	ar231x_restart(dev);
-+	spin_unlock_irqrestore(&sp->lock, flags);
-+}
-+
-+static void ar231x_halt(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	int j;
-+
-+	tasklet_disable(&sp->rx_tasklet);
-+
-+	/* kill the MAC */
-+	sp->eth_regs->mac_control &= ~(MAC_CONTROL_RE |	/* disable Receives */
-+								   MAC_CONTROL_TE);	/* disable Transmits */
-+	/* stop dma */
-+	sp->dma_regs->control = 0;
-+	sp->dma_regs->bus_mode = DMA_BUS_MODE_SWR;
-+
-+	/* place phy and MAC in reset */
-+	*sp->int_regs |= (sp->cfg->reset_mac | sp->cfg->reset_phy);
-+
-+	/* free buffers on tx ring */
-+	for (j = 0; j < AR2313_DESCR_ENTRIES; j++) {
-+		struct sk_buff *skb;
-+		ar231x_descr_t *txdesc;
-+
-+		txdesc = &sp->tx_ring[j];
-+		txdesc->descr = 0;
-+
-+		skb = sp->tx_skb[j];
-+		if (skb) {
-+			dev_kfree_skb(skb);
-+			sp->tx_skb[j] = NULL;
-+		}
-+	}
-+}
-+
-+/*
-+ * close should do nothing. Here's why. It's called when
-+ * 'ifconfig bond0 down' is run. If it calls free_irq then
-+ * the irq is gone forever ! When bond0 is made 'up' again,
-+ * the ar231x_open () does not call request_irq (). Worse,
-+ * the call to ar231x_halt() generates a WDOG reset due to
-+ * the write to 'sp->int_regs' and the box reboots.
-+ * Commenting this out is good since it allows the
-+ * system to resume when bond0 is made up again.
-+ */
-+static int ar231x_close(struct net_device *dev)
-+{
-+#if 0
-+	/*
-+	 * Disable interrupts
-+	 */
-+	disable_irq(dev->irq);
-+
-+	/*
-+	 * Without (or before) releasing irq and stopping hardware, this
-+	 * is an absolute non-sense, by the way. It will be reset instantly
-+	 * by the first irq.
-+	 */
-+	netif_stop_queue(dev);
-+
-+	/* stop the MAC and DMA engines */
-+	ar231x_halt(dev);
-+
-+	/* release the interrupt */
-+	free_irq(dev->irq, dev);
-+
-+#endif
-+	return 0;
-+}
-+
-+static int ar231x_start_xmit(struct sk_buff *skb, struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	ar231x_descr_t *td;
-+	u32 idx;
-+
-+	idx = sp->tx_prd;
-+	td = &sp->tx_ring[idx];
-+
-+	if (td->status & DMA_TX_OWN) {
-+		/* free skbuf and lie to the caller that we sent it out */
-+		dev->stats.tx_dropped++;
-+		dev_kfree_skb(skb);
-+
-+		/* restart transmitter in case locked */
-+		sp->dma_regs->xmt_poll = 0;
-+		return 0;
-+	}
-+
-+	/* Setup the transmit descriptor. */
-+	td->devcs = ((skb->len << DMA_TX1_BSIZE_SHIFT) |
-+				 (DMA_TX1_LS | DMA_TX1_IC | DMA_TX1_CHAINED));
-+	td->addr = dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE);
-+	td->status = DMA_TX_OWN;
-+
-+	/* kick transmitter last */
-+	sp->dma_regs->xmt_poll = 0;
-+
-+	sp->tx_skb[idx] = skb;
-+	idx = DSC_NEXT(idx);
-+	sp->tx_prd = idx;
-+
-+	return 0;
-+}
-+
-+static int ar231x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
-+{
-+	struct mii_ioctl_data *data = (struct mii_ioctl_data *) &ifr->ifr_data;
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	int ret;
-+
-+	switch (cmd) {
-+
-+	case SIOCETHTOOL:
-+		spin_lock_irq(&sp->lock);
-+		ret = phy_ethtool_ioctl(sp->phy_dev, (void *) ifr->ifr_data);
-+		spin_unlock_irq(&sp->lock);
-+		return ret;
-+
-+	case SIOCSIFHWADDR:
-+		if (copy_from_user
-+			(dev->dev_addr, ifr->ifr_data, sizeof(dev->dev_addr)))
-+			return -EFAULT;
-+		return 0;
-+
-+	case SIOCGIFHWADDR:
-+		if (copy_to_user
-+			(ifr->ifr_data, dev->dev_addr, sizeof(dev->dev_addr)))
-+			return -EFAULT;
-+		return 0;
-+
-+	case SIOCGMIIPHY:
-+	case SIOCGMIIREG:
-+	case SIOCSMIIREG:
-+		return phy_mii_ioctl(sp->phy_dev, data, cmd);
-+
-+	default:
-+		break;
-+	}
-+
-+	return -EOPNOTSUPP;
-+}
-+
-+static void ar231x_adjust_link(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	unsigned int mc;
-+
-+	if (!sp->phy_dev->link)
-+		return;
-+
-+	if (sp->phy_dev->duplex != sp->oldduplex) {
-+		mc = readl(&sp->eth_regs->mac_control);
-+		mc &= ~(MAC_CONTROL_F | MAC_CONTROL_DRO);
-+		if (sp->phy_dev->duplex)
-+			mc |= MAC_CONTROL_F;
-+		else
-+			mc |= MAC_CONTROL_DRO;
-+		writel(mc, &sp->eth_regs->mac_control);
-+		sp->oldduplex = sp->phy_dev->duplex;
-+	}
-+}
-+
-+#define MII_ADDR(phy, reg) \
-+	((reg << MII_ADDR_REG_SHIFT) | (phy << MII_ADDR_PHY_SHIFT))
-+
-+static int
-+ar231x_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
-+{
-+	struct net_device *const dev = bus->priv;
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	volatile ETHERNET_STRUCT *ethernet = sp->phy_regs;
-+
-+	ethernet->mii_addr = MII_ADDR(phy_addr, regnum);
-+	while (ethernet->mii_addr & MII_ADDR_BUSY);
-+	return (ethernet->mii_data >> MII_DATA_SHIFT);
-+}
-+
-+static int
-+ar231x_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
-+             u16 value)
-+{
-+	struct net_device *const dev = bus->priv;
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	volatile ETHERNET_STRUCT *ethernet = sp->phy_regs;
-+
-+	while (ethernet->mii_addr & MII_ADDR_BUSY);
-+	ethernet->mii_data = value << MII_DATA_SHIFT;
-+	ethernet->mii_addr = MII_ADDR(phy_addr, regnum) | MII_ADDR_WRITE;
-+
-+	return 0;
-+}
-+
-+static int ar231x_mdiobus_reset(struct mii_bus *bus)
-+{
-+	struct net_device *const dev = bus->priv;
-+
-+	ar231x_reset_reg(dev);
-+
-+	return 0;
-+}
-+
-+static int ar231x_mdiobus_probe (struct net_device *dev)
-+{
-+	struct ar231x_private *const sp = netdev_priv(dev);
-+	struct phy_device *phydev = NULL;
-+	int phy_addr;
-+
-+	/* find the first (lowest address) PHY on the current MAC's MII bus */
-+	for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
-+		if (sp->mii_bus->phy_map[phy_addr]) {
-+			phydev = sp->mii_bus->phy_map[phy_addr];
-+			sp->phy = phy_addr;
-+			break; /* break out with first one found */
-+		}
-+
-+	if (!phydev) {
-+		printk (KERN_ERR "ar231x: %s: no PHY found\n", dev->name);
-+		return -1;
-+	}
-+
-+	/* now we are supposed to have a proper phydev, to attach to... */
-+	BUG_ON(!phydev);
-+	BUG_ON(phydev->attached_dev);
-+
-+	phydev = phy_connect(dev, dev_name(&phydev->dev), &ar231x_adjust_link, 0,
-+		PHY_INTERFACE_MODE_MII);
-+
-+	if (IS_ERR(phydev)) {
-+		printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
-+		return PTR_ERR(phydev);
-+	}
-+
-+	/* mask with MAC supported features */
-+	phydev->supported &= (SUPPORTED_10baseT_Half
-+		| SUPPORTED_10baseT_Full
-+		| SUPPORTED_100baseT_Half
-+		| SUPPORTED_100baseT_Full
-+		| SUPPORTED_Autoneg
-+		/* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
-+		| SUPPORTED_MII
-+		| SUPPORTED_TP);
-+
-+	phydev->advertising = phydev->supported;
-+
-+	sp->oldduplex = -1;
-+	sp->phy_dev = phydev;
-+
-+	printk(KERN_INFO "%s: attached PHY driver [%s] "
-+		"(mii_bus:phy_addr=%s)\n",
-+		dev->name, phydev->drv->name, dev_name(&phydev->dev));
-+
-+	return 0;
-+}
-+
-diff -Nur linux-2.6.39-rc7.orig/drivers/net/ar231x.h linux-2.6.39-rc7/drivers/net/ar231x.h
---- linux-2.6.39-rc7.orig/drivers/net/ar231x.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/drivers/net/ar231x.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,302 @@
-+/*
-+ * ar231x.h: Linux driver for the Atheros AR231x Ethernet device.
-+ *
-+ * Copyright (C) 2004 by Sameer Dekate <sdekate@arubanetworks.com>
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
-+ *
-+ * Thanks to Atheros for providing hardware and documentation
-+ * enabling me to write this driver.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef _AR2313_H_
-+#define _AR2313_H_
-+
-+#include <generated/autoconf.h>
-+#include <linux/bitops.h>
-+#include <asm/bootinfo.h>
-+#include <ar231x_platform.h>
-+
-+/*
-+ * probe link timer - 5 secs
-+ */
-+#define LINK_TIMER    (5*HZ)
-+
-+#define IS_DMA_TX_INT(X)   (((X) & (DMA_STATUS_TI)) != 0)
-+#define IS_DMA_RX_INT(X)   (((X) & (DMA_STATUS_RI)) != 0)
-+#define IS_DRIVER_OWNED(X) (((X) & (DMA_TX_OWN))    == 0)
-+
-+#define AR2313_TX_TIMEOUT (HZ/4)
-+
-+/*
-+ * Rings
-+ */
-+#define DSC_RING_ENTRIES_SIZE	(AR2313_DESCR_ENTRIES * sizeof(struct desc))
-+#define DSC_NEXT(idx)	        ((idx + 1) & (AR2313_DESCR_ENTRIES - 1))
-+
-+#define AR2313_MBGET		2
-+#define AR2313_MBSET		3
-+#define AR2313_PCI_RECONFIG	4
-+#define AR2313_PCI_DUMP		5
-+#define AR2313_TEST_PANIC	6
-+#define AR2313_TEST_NULLPTR	7
-+#define AR2313_READ_DATA	8
-+#define AR2313_WRITE_DATA	9
-+#define AR2313_GET_VERSION	10
-+#define AR2313_TEST_HANG	11
-+#define AR2313_SYNC		12
-+
-+#define DMA_RX_ERR_CRC		BIT(1)
-+#define DMA_RX_ERR_DRIB		BIT(2)
-+#define DMA_RX_ERR_MII		BIT(3)
-+#define DMA_RX_EV2		BIT(5)
-+#define DMA_RX_ERR_COL		BIT(6)
-+#define DMA_RX_LONG		BIT(7)
-+#define DMA_RX_LS		BIT(8)	/* last descriptor */
-+#define DMA_RX_FS		BIT(9)	/* first descriptor */
-+#define DMA_RX_MF		BIT(10)	/* multicast frame */
-+#define DMA_RX_ERR_RUNT		BIT(11)	/* runt frame */
-+#define DMA_RX_ERR_LENGTH	BIT(12)	/* length error */
-+#define DMA_RX_ERR_DESC		BIT(14)	/* descriptor error */
-+#define DMA_RX_ERROR		BIT(15)	/* error summary */
-+#define DMA_RX_LEN_MASK		0x3fff0000
-+#define DMA_RX_LEN_SHIFT	16
-+#define DMA_RX_FILT		BIT(30)
-+#define DMA_RX_OWN		BIT(31)	/* desc owned by DMA controller */
-+
-+#define DMA_RX1_BSIZE_MASK	0x000007ff
-+#define DMA_RX1_BSIZE_SHIFT	0
-+#define DMA_RX1_CHAINED		BIT(24)
-+#define DMA_RX1_RER		BIT(25)
-+
-+#define DMA_TX_ERR_UNDER	BIT(1)	/* underflow error */
-+#define DMA_TX_ERR_DEFER	BIT(2)	/* excessive deferral */
-+#define DMA_TX_COL_MASK		0x78
-+#define DMA_TX_COL_SHIFT	3
-+#define DMA_TX_ERR_HB		BIT(7)	/* hearbeat failure */
-+#define DMA_TX_ERR_COL		BIT(8)	/* excessive collisions */
-+#define DMA_TX_ERR_LATE		BIT(9)	/* late collision */
-+#define DMA_TX_ERR_LINK		BIT(10)	/* no carrier */
-+#define DMA_TX_ERR_LOSS		BIT(11)	/* loss of carrier */
-+#define DMA_TX_ERR_JABBER	BIT(14)	/* transmit jabber timeout */
-+#define DMA_TX_ERROR		BIT(15)	/* frame aborted */
-+#define DMA_TX_OWN		BIT(31)	/* descr owned by DMA controller */
-+
-+#define DMA_TX1_BSIZE_MASK	0x000007ff
-+#define DMA_TX1_BSIZE_SHIFT	0
-+#define DMA_TX1_CHAINED		BIT(24)	/* chained descriptors */
-+#define DMA_TX1_TER		BIT(25)	/* transmit end of ring */
-+#define DMA_TX1_FS		BIT(29)	/* first segment */
-+#define DMA_TX1_LS		BIT(30)	/* last segment */
-+#define DMA_TX1_IC		BIT(31)	/* interrupt on completion */
-+
-+#define RCVPKT_LENGTH(X)	(X  >> 16)	/* Received pkt Length */
-+
-+#define MAC_CONTROL_RE		BIT(2)	/* receive enable */
-+#define MAC_CONTROL_TE		BIT(3)	/* transmit enable */
-+#define MAC_CONTROL_DC		BIT(5)	/* Deferral check */
-+#define MAC_CONTROL_ASTP	BIT(8)	/* Auto pad strip */
-+#define MAC_CONTROL_DRTY	BIT(10)	/* Disable retry */
-+#define MAC_CONTROL_DBF		BIT(11)	/* Disable bcast frames */
-+#define MAC_CONTROL_LCC		BIT(12)	/* late collision ctrl */
-+#define MAC_CONTROL_HP		BIT(13)	/* Hash Perfect filtering */
-+#define MAC_CONTROL_HASH	BIT(14)	/* Unicast hash filtering */
-+#define MAC_CONTROL_HO		BIT(15)	/* Hash only filtering */
-+#define MAC_CONTROL_PB		BIT(16)	/* Pass Bad frames */
-+#define MAC_CONTROL_IF		BIT(17)	/* Inverse filtering */
-+#define MAC_CONTROL_PR		BIT(18)	/* promiscuous mode (valid frames only) */
-+#define MAC_CONTROL_PM		BIT(19)	/* pass multicast */
-+#define MAC_CONTROL_F		BIT(20)	/* full-duplex */
-+#define MAC_CONTROL_DRO		BIT(23)	/* Disable Receive Own */
-+#define MAC_CONTROL_HBD		BIT(28)	/* heart-beat disabled (MUST BE SET) */
-+#define MAC_CONTROL_BLE		BIT(30)	/* big endian mode */
-+#define MAC_CONTROL_RA		BIT(31)	/* receive all (valid and invalid frames) */
-+
-+#define MII_ADDR_BUSY		BIT(0)
-+#define MII_ADDR_WRITE		BIT(1)
-+#define MII_ADDR_REG_SHIFT	6
-+#define MII_ADDR_PHY_SHIFT	11
-+#define MII_DATA_SHIFT		0
-+
-+#define FLOW_CONTROL_FCE	BIT(1)
-+
-+#define DMA_BUS_MODE_SWR	BIT(0)	/* software reset */
-+#define DMA_BUS_MODE_BLE	BIT(7)	/* big endian mode */
-+#define DMA_BUS_MODE_PBL_SHIFT	8	/* programmable burst length 32 */
-+#define DMA_BUS_MODE_DBO	BIT(20)	/* big-endian descriptors */
-+
-+#define DMA_STATUS_TI		BIT(0)	/* transmit interrupt */
-+#define DMA_STATUS_TPS		BIT(1)	/* transmit process stopped */
-+#define DMA_STATUS_TU		BIT(2)	/* transmit buffer unavailable */
-+#define DMA_STATUS_TJT		BIT(3)	/* transmit buffer timeout */
-+#define DMA_STATUS_UNF		BIT(5)	/* transmit underflow */
-+#define DMA_STATUS_RI		BIT(6)	/* receive interrupt */
-+#define DMA_STATUS_RU		BIT(7)	/* receive buffer unavailable */
-+#define DMA_STATUS_RPS		BIT(8)	/* receive process stopped */
-+#define DMA_STATUS_ETI		BIT(10)	/* early transmit interrupt */
-+#define DMA_STATUS_FBE		BIT(13)	/* fatal bus interrupt */
-+#define DMA_STATUS_ERI		BIT(14)	/* early receive interrupt */
-+#define DMA_STATUS_AIS		BIT(15)	/* abnormal interrupt summary */
-+#define DMA_STATUS_NIS		BIT(16)	/* normal interrupt summary */
-+#define DMA_STATUS_RS_SHIFT	17	/* receive process state */
-+#define DMA_STATUS_TS_SHIFT	20	/* transmit process state */
-+#define DMA_STATUS_EB_SHIFT	23	/* error bits */
-+
-+#define DMA_CONTROL_SR		BIT(1)	/* start receive */
-+#define DMA_CONTROL_ST		BIT(13)	/* start transmit */
-+#define DMA_CONTROL_SF		BIT(21)	/* store and forward */
-+
-+
-+typedef struct {
-+	volatile unsigned int status;	// OWN, Device control and status.
-+	volatile unsigned int devcs;	// pkt Control bits + Length
-+	volatile unsigned int addr;	// Current Address.
-+	volatile unsigned int descr;	// Next descriptor in chain.
-+} ar231x_descr_t;
-+
-+
-+
-+//
-+// New Combo structure for Both Eth0 AND eth1
-+//
-+typedef struct {
-+	volatile unsigned int mac_control;	/* 0x00 */
-+	volatile unsigned int mac_addr[2];	/* 0x04 - 0x08 */
-+	volatile unsigned int mcast_table[2];	/* 0x0c - 0x10 */
-+	volatile unsigned int mii_addr;	/* 0x14 */
-+	volatile unsigned int mii_data;	/* 0x18 */
-+	volatile unsigned int flow_control;	/* 0x1c */
-+	volatile unsigned int vlan_tag;	/* 0x20 */
-+	volatile unsigned int pad[7];	/* 0x24 - 0x3c */
-+	volatile unsigned int ucast_table[8];	/* 0x40-0x5c */
-+
-+} ETHERNET_STRUCT;
-+
-+/********************************************************************
-+ * Interrupt controller
-+ ********************************************************************/
-+
-+typedef struct {
-+	volatile unsigned int wdog_control;	/* 0x08 */
-+	volatile unsigned int wdog_timer;	/* 0x0c */
-+	volatile unsigned int misc_status;	/* 0x10 */
-+	volatile unsigned int misc_mask;	/* 0x14 */
-+	volatile unsigned int global_status;	/* 0x18 */
-+	volatile unsigned int reserved;	/* 0x1c */
-+	volatile unsigned int reset_control;	/* 0x20 */
-+} INTERRUPT;
-+
-+/********************************************************************
-+ * DMA controller
-+ ********************************************************************/
-+typedef struct {
-+	volatile unsigned int bus_mode;	/* 0x00 (CSR0) */
-+	volatile unsigned int xmt_poll;	/* 0x04 (CSR1) */
-+	volatile unsigned int rcv_poll;	/* 0x08 (CSR2) */
-+	volatile unsigned int rcv_base;	/* 0x0c (CSR3) */
-+	volatile unsigned int xmt_base;	/* 0x10 (CSR4) */
-+	volatile unsigned int status;	/* 0x14 (CSR5) */
-+	volatile unsigned int control;	/* 0x18 (CSR6) */
-+	volatile unsigned int intr_ena;	/* 0x1c (CSR7) */
-+	volatile unsigned int rcv_missed;	/* 0x20 (CSR8) */
-+	volatile unsigned int reserved[11];	/* 0x24-0x4c (CSR9-19) */
-+	volatile unsigned int cur_tx_buf_addr;	/* 0x50 (CSR20) */
-+	volatile unsigned int cur_rx_buf_addr;	/* 0x50 (CSR21) */
-+} DMA;
-+
-+/*
-+ * Struct private for the Sibyte.
-+ *
-+ * Elements are grouped so variables used by the tx handling goes
-+ * together, and will go into the same cache lines etc. in order to
-+ * avoid cache line contention between the rx and tx handling on SMP.
-+ *
-+ * Frequently accessed variables are put at the beginning of the
-+ * struct to help the compiler generate better/shorter code.
-+ */
-+struct ar231x_private {
-+	struct net_device *dev;
-+	int version;
-+	u32 mb[2];
-+
-+	volatile ETHERNET_STRUCT *phy_regs;
-+	volatile ETHERNET_STRUCT *eth_regs;
-+	volatile DMA *dma_regs;
-+	volatile u32 *int_regs;
-+	struct ar231x_eth *cfg;
-+
-+	spinlock_t lock;			/* Serialise access to device */
-+
-+	/*
-+	 * RX and TX descriptors, must be adjacent
-+	 */
-+	ar231x_descr_t *rx_ring;
-+	ar231x_descr_t *tx_ring;
-+
-+
-+	struct sk_buff **rx_skb;
-+	struct sk_buff **tx_skb;
-+
-+	/*
-+	 * RX elements
-+	 */
-+	u32 rx_skbprd;
-+	u32 cur_rx;
-+
-+	/*
-+	 * TX elements
-+	 */
-+	u32 tx_prd;
-+	u32 tx_csm;
-+
-+	/*
-+	 * Misc elements
-+	 */
-+	char name[48];
-+	struct {
-+		u32 address;
-+		u32 length;
-+		char *mapping;
-+	} desc;
-+
-+
-+	struct timer_list link_timer;
-+	unsigned short phy;			/* merlot phy = 1, samsung phy = 0x1f */
-+	unsigned short mac;
-+	unsigned short link;		/* 0 - link down, 1 - link up */
-+	u16 phyData;
-+
-+	struct tasklet_struct rx_tasklet;
-+	int unloading;
-+
-+	struct phy_device *phy_dev;
-+	struct mii_bus *mii_bus;
-+	int oldduplex;
-+};
-+
-+
-+/*
-+ * Prototypes
-+ */
-+static int ar231x_init(struct net_device *dev);
-+#ifdef TX_TIMEOUT
-+static void ar231x_tx_timeout(struct net_device *dev);
-+#endif
-+static int ar231x_restart(struct net_device *dev);
-+static void ar231x_load_rx_ring(struct net_device *dev, int bufs);
-+static irqreturn_t ar231x_interrupt(int irq, void *dev_id);
-+static int ar231x_open(struct net_device *dev);
-+static int ar231x_start_xmit(struct sk_buff *skb, struct net_device *dev);
-+static int ar231x_close(struct net_device *dev);
-+static int ar231x_ioctl(struct net_device *dev, struct ifreq *ifr,
-+						int cmd);
-+static void ar231x_init_cleanup(struct net_device *dev);
-+static int ar231x_setup_timer(struct net_device *dev);
-+static void ar231x_link_timer_fn(unsigned long data);
-+static void ar231x_check_link(struct net_device *dev);
-+#endif							/* _AR2313_H_ */
-diff -Nur linux-2.6.39-rc7.orig/drivers/watchdog/Kconfig linux-2.6.39-rc7/drivers/watchdog/Kconfig
---- linux-2.6.39-rc7.orig/drivers/watchdog/Kconfig	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/drivers/watchdog/Kconfig	2011-05-15 21:34:57.000000000 +0200
-@@ -990,6 +990,12 @@
- 	  To compile this driver as a loadable module, choose M here.
- 	  The module will be called bcm63xx_wdt.
- 
-+config ATHEROS_WDT
-+	tristate "Atheros wisoc Watchdog Timer"
-+	depends on ATHEROS_AR231X
-+	help
-+	  Hardware driver for the Atheros wisoc Watchdog Timer.
-+
- # PARISC Architecture
- 
- # POWERPC Architecture
-diff -Nur linux-2.6.39-rc7.orig/drivers/watchdog/Makefile linux-2.6.39-rc7/drivers/watchdog/Makefile
---- linux-2.6.39-rc7.orig/drivers/watchdog/Makefile	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/drivers/watchdog/Makefile	2011-05-15 21:34:57.000000000 +0200
-@@ -120,6 +120,7 @@
- obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt.o
- obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
- obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
-+obj-$(CONFIG_ATHEROS_WDT) += ar2315-wtd.o
- obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
- obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o
- octeon-wdt-y := octeon-wdt-main.o octeon-wdt-nmi.o
-diff -Nur linux-2.6.39-rc7.orig/drivers/watchdog/ar2315-wtd.c linux-2.6.39-rc7/drivers/watchdog/ar2315-wtd.c
---- linux-2.6.39-rc7.orig/drivers/watchdog/ar2315-wtd.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/drivers/watchdog/ar2315-wtd.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,200 @@
-+/*
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-+ *
-+ * Copyright (C) 2008 John Crispin <blogic@openwrt.org>
-+ * Based on EP93xx and ifxmips wdt driver
-+ */
-+
-+#include <linux/interrupt.h>
-+#include <linux/module.h>
-+#include <linux/moduleparam.h>
-+#include <linux/types.h>
-+#include <linux/miscdevice.h>
-+#include <linux/watchdog.h>
-+#include <linux/fs.h>
-+#include <linux/ioport.h>
-+#include <linux/notifier.h>
-+#include <linux/reboot.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+
-+#include <asm/io.h>
-+#include <asm/uaccess.h>
-+#include <asm/system.h>
-+#include <asm/addrspace.h>
-+#include <ar231x_platform.h>
-+#include <ar2315_regs.h>
-+#include <ar231x.h>
-+
-+#define CLOCK_RATE 40000000
-+#define HEARTBEAT(x) (x < 1 || x > 90)?(20):(x)
-+
-+static int wdt_timeout = 20;
-+static int started = 0;
-+static int in_use = 0;
-+
-+static void
-+ar2315_wdt_enable(void)
-+{
-+	ar231x_write_reg(AR2315_WD, wdt_timeout * CLOCK_RATE);
-+	ar231x_write_reg(AR2315_ISR, 0x80);
-+}
-+
-+static ssize_t
-+ar2315_wdt_write(struct file *file, const char __user *data, size_t len, loff_t *ppos)
-+{
-+	if(len)
-+		ar2315_wdt_enable();
-+	return len;
-+}
-+
-+static int
-+ar2315_wdt_open(struct inode *inode, struct file *file)
-+{
-+	if(in_use)
-+		return -EBUSY;
-+	ar2315_wdt_enable();
-+	in_use = started = 1;
-+	return nonseekable_open(inode, file);
-+}
-+
-+static int
-+ar2315_wdt_release(struct inode *inode, struct file *file)
-+{
-+	in_use = 0;
-+	return 0;
-+}
-+
-+static irqreturn_t
-+ar2315_wdt_interrupt(int irq, void *dev_id)
-+{
-+	if(started)
-+	{
-+		printk(KERN_CRIT "watchdog expired, rebooting system\n");
-+		emergency_restart();
-+	} else {
-+		ar231x_write_reg(AR2315_WDC, 0);
-+		ar231x_write_reg(AR2315_WD, 0);
-+		ar231x_write_reg(AR2315_ISR, 0x80);
-+	}
-+	return IRQ_HANDLED;
-+}
-+
-+static struct watchdog_info ident = {
-+	.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
-+	.identity = "ar2315 Watchdog",
-+};
-+
-+static int
-+ar2315_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
-+{
-+	int new_wdt_timeout;
-+	int ret = -ENOIOCTLCMD;
-+
-+	switch(cmd)
-+	{
-+		case WDIOC_GETSUPPORT:
-+			ret = copy_to_user((struct watchdog_info __user *)arg, &ident, sizeof(ident)) ? -EFAULT : 0;
-+			break;
-+
-+		case WDIOC_KEEPALIVE:
-+			ar2315_wdt_enable();
-+			ret = 0;
-+			break;
-+
-+		case WDIOC_SETTIMEOUT:
-+			if((ret = get_user(new_wdt_timeout, (int __user *)arg)))
-+				break;
-+			wdt_timeout = HEARTBEAT(new_wdt_timeout);
-+			ar2315_wdt_enable();
-+			break;
-+
-+		case WDIOC_GETTIMEOUT:
-+			ret = put_user(wdt_timeout, (int __user *)arg);
-+			break;
-+	}
-+	return ret;
-+}
-+
-+static struct file_operations ar2315_wdt_fops = {
-+	.owner		= THIS_MODULE,
-+	.llseek		= no_llseek,
-+	.write		= ar2315_wdt_write,
-+	.unlocked_ioctl	= ar2315_wdt_ioctl,
-+	.open		= ar2315_wdt_open,
-+	.release	= ar2315_wdt_release,
-+};
-+
-+static struct miscdevice ar2315_wdt_miscdev = {
-+	.minor	= WATCHDOG_MINOR,
-+	.name	= "watchdog",
-+	.fops	= &ar2315_wdt_fops,
-+};
-+
-+static int
-+ar2315_wdt_probe(struct platform_device *dev)
-+{
-+	int ret = 0;
-+
-+	ar2315_wdt_enable();
-+	ret = request_irq(AR531X_MISC_IRQ_WATCHDOG, ar2315_wdt_interrupt, IRQF_DISABLED, "ar2315_wdt", NULL);
-+	if(ret)
-+	{
-+		printk(KERN_ERR "ar2315wdt: failed to register inetrrupt\n");
-+		goto out;
-+	}
-+
-+	ret = misc_register(&ar2315_wdt_miscdev);
-+	if(ret)
-+		printk(KERN_ERR "ar2315wdt: failed to register miscdev\n");
-+
-+out:
-+	return ret;
-+}
-+
-+static int
-+ar2315_wdt_remove(struct platform_device *dev)
-+{
-+	misc_deregister(&ar2315_wdt_miscdev);
-+	free_irq(AR531X_MISC_IRQ_WATCHDOG, NULL);
-+	return 0;
-+}
-+
-+static struct platform_driver ar2315_wdt_driver = {
-+	.probe = ar2315_wdt_probe,
-+	.remove = ar2315_wdt_remove,
-+	.driver = {
-+		.name = "ar2315_wdt",
-+		.owner = THIS_MODULE,
-+	},
-+};
-+
-+static int __init
-+init_ar2315_wdt(void)
-+{
-+	int ret = platform_driver_register(&ar2315_wdt_driver);
-+	if(ret)
-+		printk(KERN_INFO "ar2315_wdt: error registering platfom driver!");
-+	return ret;
-+}
-+
-+static void __exit
-+exit_ar2315_wdt(void)
-+{
-+	platform_driver_unregister(&ar2315_wdt_driver);
-+}
-+
-+module_init(init_ar2315_wdt);
-+module_exit(exit_ar2315_wdt);
diff --git a/target/linux/patches/3.0.34/mips-malta.patch b/target/linux/patches/3.0.34/mips-malta.patch
deleted file mode 100644
index cc8789dca..000000000
--- a/target/linux/patches/3.0.34/mips-malta.patch
+++ /dev/null
@@ -1,135 +0,0 @@
-http://lkml.indiana.edu/hypermail/linux/kernel/1105.3/02199.html
-
-diff -Nur linux-2.6.39.orig/arch/mips/include/asm/smp-ops.h linux-2.6.39/arch/mips/include/asm/smp-ops.h
---- linux-2.6.39.orig/arch/mips/include/asm/smp-ops.h	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/arch/mips/include/asm/smp-ops.h	2011-08-29 04:39:03.360480881 +0200
-@@ -56,8 +56,43 @@
- 
- #endif /* !CONFIG_SMP */
- 
--extern struct plat_smp_ops up_smp_ops;
--extern struct plat_smp_ops cmp_smp_ops;
--extern struct plat_smp_ops vsmp_smp_ops;
-+static inline int register_up_smp_ops(void)
-+{
-+#ifdef CONFIG_SMP_UP
-+	extern struct plat_smp_ops up_smp_ops;
-+
-+	register_smp_ops(&up_smp_ops);
-+
-+	return 0;
-+#else
-+	return -ENODEV;
-+#endif
-+}
-+
-+static inline int register_cmp_smp_ops(void)
-+{
-+#ifdef CONFIG_MIPS_CMP
-+	extern struct plat_smp_ops cmp_smp_ops;
-+
-+	register_smp_ops(&cmp_smp_ops);
-+
-+	return 0;
-+#else
-+	return -ENODEV;
-+#endif
-+}
-+
-+static inline int register_vsmp_smp_ops(void)
-+{
-+#ifdef CONFIG_MIPS_MT_SMP
-+	extern struct plat_smp_ops vsmp_smp_ops;
-+
-+	register_smp_ops(&vsmp_smp_ops);
-+
-+	return 0;
-+#else
-+	return -ENODEV;
-+#endif
-+}
- 
- #endif /* __ASM_SMP_OPS_H */
-diff -Nur linux-2.6.39.orig/arch/mips/mipssim/sim_setup.c linux-2.6.39/arch/mips/mipssim/sim_setup.c
---- linux-2.6.39.orig/arch/mips/mipssim/sim_setup.c	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/arch/mips/mipssim/sim_setup.c	2011-08-29 04:39:03.390480572 +0200
-@@ -59,18 +59,17 @@
- 
- 	prom_meminit();
- 
--#ifdef CONFIG_MIPS_MT_SMP
--	if (cpu_has_mipsmt)
--		register_smp_ops(&vsmp_smp_ops);
--	else
--		register_smp_ops(&up_smp_ops);
--#endif
-+	if (cpu_has_mipsmt) {
-+		if (!register_vsmp_smp_ops())
-+			return;
-+
- #ifdef CONFIG_MIPS_MT_SMTC
--	if (cpu_has_mipsmt)
- 		register_smp_ops(&ssmtc_smp_ops);
--	else
--		register_smp_ops(&up_smp_ops);
-+			return;
- #endif
-+	}
-+
-+	register_up_smp_ops();
- }
- 
- static void __init serial_init(void)
-diff -Nur linux-2.6.39.orig/arch/mips/mti-malta/malta-init.c linux-2.6.39/arch/mips/mti-malta/malta-init.c
---- linux-2.6.39.orig/arch/mips/mti-malta/malta-init.c	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/arch/mips/mti-malta/malta-init.c	2011-08-29 04:39:03.700480601 +0200
-@@ -29,6 +29,7 @@
- #include <asm/system.h>
- #include <asm/cacheflush.h>
- #include <asm/traps.h>
-+#include <asm/smp-ops.h>
- 
- #include <asm/gcmpregs.h>
- #include <asm/mips-boards/prom.h>
-@@ -358,15 +359,14 @@
- #ifdef CONFIG_SERIAL_8250_CONSOLE
- 	console_config();
- #endif
--#ifdef CONFIG_MIPS_CMP
- 	/* Early detection of CMP support */
- 	if (gcmp_probe(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ))
--		register_smp_ops(&cmp_smp_ops);
--	else
--#endif
--#ifdef CONFIG_MIPS_MT_SMP
--		register_smp_ops(&vsmp_smp_ops);
--#endif
-+		if (!register_cmp_smp_ops())
-+			return;
-+
-+	if (!register_vsmp_smp_ops())
-+		return;
-+
- #ifdef CONFIG_MIPS_MT_SMTC
- 	register_smp_ops(&msmtc_smp_ops);
- #endif
-diff -Nur linux-2.6.39.orig/arch/mips/pmc-sierra/msp71xx/msp_setup.c linux-2.6.39/arch/mips/pmc-sierra/msp71xx/msp_setup.c
---- linux-2.6.39.orig/arch/mips/pmc-sierra/msp71xx/msp_setup.c	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/arch/mips/pmc-sierra/msp71xx/msp_setup.c	2011-08-29 04:39:03.790480302 +0200
-@@ -228,13 +228,11 @@
- 	 */
- 	msp_serial_setup();
- 
--#ifdef CONFIG_MIPS_MT_SMP
--	register_smp_ops(&vsmp_smp_ops);
--#endif
--
-+	if (register_vsmp_smp_ops()) {
- #ifdef CONFIG_MIPS_MT_SMTC
--	register_smp_ops(&msp_smtc_smp_ops);
-+		register_smp_ops(&msp_smtc_smp_ops);
- #endif
-+	}
- 
- #ifdef CONFIG_PMCTWILED
- 	/*
diff --git a/target/linux/patches/3.0.34/mtd-rootfs.patch b/target/linux/patches/3.0.34/mtd-rootfs.patch
deleted file mode 100644
index 5dad745d8..000000000
--- a/target/linux/patches/3.0.34/mtd-rootfs.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-diff -Nur linux-3.0.17.orig/drivers/mtd/mtdpart.c linux-3.0.17/drivers/mtd/mtdpart.c
---- linux-3.0.17.orig/drivers/mtd/mtdpart.c	2012-01-12 20:54:29.000000000 +0100
-+++ linux-3.0.17/drivers/mtd/mtdpart.c	2012-01-18 12:00:59.000000000 +0100
-@@ -30,6 +30,7 @@
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
- #include <linux/err.h>
-+#include <linux/root_dev.h>
- 
- #include "mtdcore.h"
- 
-@@ -661,6 +662,14 @@
- 		if (IS_ERR(slave))
- 			return PTR_ERR(slave);
- 
-+		if (strcmp(parts[i].name, "rootfs") == 0) {
-+			if (ROOT_DEV == 0) {
-+				printk(KERN_NOTICE "mtd: partition \"rootfs\" "
-+					"set to be root filesystem\n");
-+					ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, i);
-+			}
-+		}
-+
- 		mutex_lock(&mtd_partitions_mutex);
- 		list_add(&slave->list, &mtd_partitions);
- 		mutex_unlock(&mtd_partitions_mutex);
diff --git a/target/linux/patches/3.0.34/x86-build.patch b/target/linux/patches/3.0.34/x86-build.patch
deleted file mode 100644
index 339140f41..000000000
--- a/target/linux/patches/3.0.34/x86-build.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.39-rc6.orig/arch/x86/boot/tools/build.c linux-2.6.39-rc6/arch/x86/boot/tools/build.c
---- linux-2.6.39-rc6.orig/arch/x86/boot/tools/build.c	2011-05-04 04:59:13.000000000 +0200
-+++ linux-2.6.39-rc6/arch/x86/boot/tools/build.c	2011-05-05 20:10:07.000000000 +0200
-@@ -29,7 +29,6 @@
- #include <stdarg.h>
- #include <sys/types.h>
- #include <sys/stat.h>
--#include <sys/sysmacros.h>
- #include <unistd.h>
- #include <fcntl.h>
- #include <sys/mman.h>
diff --git a/target/linux/patches/3.1.10/brcm.patch b/target/linux/patches/3.1.10/brcm.patch
deleted file mode 100644
index 548d26068..000000000
--- a/target/linux/patches/3.1.10/brcm.patch
+++ /dev/null
@@ -1,465 +0,0 @@
-diff -Nur linux-2.6.39.4.orig/arch/mips/Kconfig linux-2.6.39.4/arch/mips/Kconfig
---- linux-2.6.39.4.orig/arch/mips/Kconfig	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/arch/mips/Kconfig	2012-06-02 20:35:49.000000000 +0200
-@@ -103,6 +103,12 @@
- 	select GENERIC_GPIO
- 	select SYS_HAS_EARLY_PRINTK
- 	select CFE
-+	select SYS_SUPPORTS_ZBOOT_UART16550
-+	select HAVE_KERNEL_GZIP
-+        select HAVE_KERNEL_BZIP2
-+        select HAVE_KERNEL_LZMA
-+        select HAVE_KERNEL_XZ
-+        select HAVE_KERNEL_LZO
- 	help
- 	 Support for BCM47XX based boards
- 
-diff -Nur linux-2.6.39.4.orig/arch/mips/Makefile linux-2.6.39.4/arch/mips/Makefile
---- linux-2.6.39.4.orig/arch/mips/Makefile	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/arch/mips/Makefile	2012-06-02 20:35:49.000000000 +0200
-@@ -76,6 +76,7 @@
- all-$(CONFIG_BOOT_ELF32)	:= $(vmlinux-32)
- all-$(CONFIG_BOOT_ELF64)	:= $(vmlinux-64)
- all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlinuz
-+all-$(CONFIG_BCM47XX)		+= vmlinuz.elf
- 
- #
- # GCC uses -G 0 -mabicalls -fpic as default.  We don't want PIC in the kernel
-@@ -276,7 +277,7 @@
- 	$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) arch/mips/boot/$@
- 
- # boot/compressed
--vmlinuz vmlinuz.bin vmlinuz.ecoff vmlinuz.srec: $(vmlinux-32) FORCE
-+vmlinuz vmlinuz.bin vmlinuz.ecoff vmlinuz.srec vmlinuz.elf: $(vmlinux-32) FORCE
- 	$(Q)$(MAKE) $(build)=arch/mips/boot/compressed \
- 	   VMLINUX_LOAD_ADDRESS=$(load-y) 32bit-bfd=$(32bit-bfd) $@
- 
-@@ -313,6 +314,7 @@
- 	echo '  vmlinuz.ecoff        - ECOFF zboot image'
- 	echo '  vmlinuz.bin          - Raw binary zboot image'
- 	echo '  vmlinuz.srec         - SREC zboot image'
-+	echo '  vmlinuz.elf          - ELF self-relocating zboot image'
- 	echo
- 	echo '  These will be default as appropriate for a configured platform.'
- endef
-diff -Nur linux-2.6.39.4.orig/arch/mips/bcm47xx/Makefile linux-2.6.39.4/arch/mips/bcm47xx/Makefile
---- linux-2.6.39.4.orig/arch/mips/bcm47xx/Makefile	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/arch/mips/bcm47xx/Makefile	2012-06-02 20:35:49.000000000 +0200
-@@ -3,4 +3,4 @@
- # under Linux.
- #
- 
--obj-y := gpio.o irq.o nvram.o prom.o serial.o setup.o time.o wgt634u.o
-+obj-y := gpio.o irq.o nvram.o prom.o serial.o setup.o time.o platform.o
-diff -Nur linux-2.6.39.4.orig/arch/mips/bcm47xx/platform.c linux-2.6.39.4/arch/mips/bcm47xx/platform.c
---- linux-2.6.39.4.orig/arch/mips/bcm47xx/platform.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39.4/arch/mips/bcm47xx/platform.c	2012-06-02 20:35:49.000000000 +0200
-@@ -0,0 +1,146 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2010, 2011 Waldemar Brodkorb <wbx@openadk.org>
-+ * Copyright © 2007, 2011 Thorsten Glaser <tg@freewrt.org>
-+ */
-+
-+#include <linux/platform_device.h>
-+#include <linux/module.h>
-+#include <linux/mtd/physmap.h>
-+#include <linux/ssb/ssb.h>
-+
-+#include <asm/mach-bcm47xx/bcm47xx.h>
-+#include <asm/mach-bcm47xx/nvram.h>
-+
-+#define CFGFS_FLASH_SIZE (128 * 1024)
-+
-+static struct mtd_partition bcm47xx_partitions[] = {
-+#define SLOT_CFE 0
-+	{
-+		.name       = "cfe",
-+		.offset     = 0,
-+		.size       = BCM47XX_OVERRIDE_CFESIZE,
-+		.mask_flags = MTD_WRITEABLE		/* force read-only */
-+	},
-+#define SLOT_LINUX 1
-+	{
-+		.name   = "linux",
-+		.offset = 0,
-+		.size   = 0,
-+	},
-+#define SLOT_ROOTFS 2
-+	{
-+		.name   = "rootfs",
-+		.offset = 0,
-+		.size   = 0,
-+	},
-+#define SLOT_CFGFS 3
-+	{
-+		.name   = "cfgfs",
-+		.offset = 0,
-+		.size   = 0,
-+	},
-+#define SLOT_NVRAM 4
-+	{
-+		.name   = "nvram",
-+		.offset = 0,
-+		.size   = 0,
-+	},
-+};
-+
-+static struct physmap_flash_data bcm47xx_flash_data = {
-+	.parts    = bcm47xx_partitions,
-+	.nr_parts = ARRAY_SIZE(bcm47xx_partitions)
-+};
-+
-+static struct resource bcm47xx_flash_resource = {
-+	.flags = IORESOURCE_MEM,
-+};
-+
-+static struct platform_device bcm47xx_flash = {
-+	.name          = "physmap-flash",
-+	.id            = 0,
-+	.dev           = { .platform_data = &bcm47xx_flash_data, },
-+	.resource      = &bcm47xx_flash_resource,
-+	.num_resources = 1,
-+};
-+
-+static struct platform_device *bcm47xx_devices[] __initdata = {
-+	&bcm47xx_flash,
-+};
-+
-+struct bcm47xx_trx_header {
-+#define BCM47XX_TRX_MAGIC 0x30524448
-+	u32 magic;
-+	u32 len;
-+	u32 crc32;
-+	u32 flag_version;
-+	u32 offsets[3];
-+};
-+
-+#define UPTODOWN(slot, psize) do {			\
-+	posn -= psize; left -= psize;			\
-+	bcm47xx_partitions[slot].offset = posn;		\
-+	bcm47xx_partitions[slot].size = psize;		\
-+} while (/* CONSTCOND */ 0)
-+
-+static int __init bcm47xx_register_devices(void)
-+{
-+	u32 flash_size;
-+	size_t left, posn;
-+	struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore;
-+	struct bcm47xx_trx_header *trx_hdr;
-+
-+	trx_hdr = (void *)KSEG1ADDR(mcore->flash_window + BCM47XX_OVERRIDE_CFESIZE);
-+
-+	/* devices might have 2, 4 or 8 MB flash size */
-+#ifdef BCM47XX_OVERRIDE_FLASHSIZE
-+	flash_size = BCM47XX_OVERRIDE_FLASHSIZE;
-+	mcore->flash_window_size = flash_size;
-+#define BCM47XX_OVERRODE_FLASHSIZE " (overridden)"
-+#else
-+	flash_size = mcore->flash_window_size;
-+#define BCM47XX_OVERRODE_FLASHSIZE ""
-+#endif
-+	printk(KERN_INFO "FLASH SIZE%s: %x\n", BCM47XX_OVERRODE_FLASHSIZE,
-+		flash_size);
-+
-+	left = flash_size - BCM47XX_OVERRIDE_CFESIZE;
-+	posn = flash_size;
-+	UPTODOWN(SLOT_NVRAM, BCM47XX_OVERRIDE_NVRAMSIZE);
-+	UPTODOWN(SLOT_CFGFS, CFGFS_FLASH_SIZE);
-+	bcm47xx_partitions[SLOT_LINUX].offset = BCM47XX_OVERRIDE_CFESIZE;
-+	bcm47xx_partitions[SLOT_LINUX].size = left;
-+
-+	if (trx_hdr->magic == BCM47XX_TRX_MAGIC) {
-+		bcm47xx_partitions[SLOT_ROOTFS].offset =
-+		    bcm47xx_partitions[SLOT_LINUX].offset +
-+		    trx_hdr->offsets[1];
-+		bcm47xx_partitions[SLOT_ROOTFS].size =
-+		    bcm47xx_partitions[SLOT_LINUX].size -
-+		    trx_hdr->offsets[1];
-+	} else
-+		printk("bcm47xx/platform: no TRX header found\n");
-+
-+	printk(KERN_INFO "=== Flash map dump ===\n");
-+	for (posn = 0; posn < bcm47xx_flash_data.nr_parts; ++posn)
-+		printk(KERN_INFO " #%u %08X @%08X '%s'\n",
-+		    (unsigned int)posn,
-+		    (unsigned int)bcm47xx_partitions[posn].size,
-+		    (unsigned int)bcm47xx_partitions[posn].offset,
-+		    bcm47xx_partitions[posn].name);
-+	printk(KERN_INFO "=== Hope this works, have a nice day\n");
-+
-+	bcm47xx_flash_data.width = mcore->flash_buswidth;
-+	bcm47xx_flash_resource.start = mcore->flash_window;
-+	bcm47xx_flash_resource.end = mcore->flash_window
-+				   + mcore->flash_window_size
-+				   - 1;
-+	return platform_add_devices(bcm47xx_devices,
-+			    ARRAY_SIZE(bcm47xx_devices));
-+}
-+
-+device_initcall(bcm47xx_register_devices);
-diff -Nur linux-2.6.39.4.orig/arch/mips/boot/compressed/Makefile linux-2.6.39.4/arch/mips/boot/compressed/Makefile
---- linux-2.6.39.4.orig/arch/mips/boot/compressed/Makefile	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/arch/mips/boot/compressed/Makefile	2012-06-02 20:37:43.000000000 +0200
-@@ -44,6 +44,7 @@
- tool_$(CONFIG_KERNEL_BZIP2)   = bzip2
- tool_$(CONFIG_KERNEL_LZMA)    = lzma
- tool_$(CONFIG_KERNEL_LZO)     = lzo
-+tool_$(CONFIG_KERNEL_XZ)      = xzkern
- 
- targets += vmlinux.bin.z
- $(obj)/vmlinux.bin.z: $(obj)/vmlinux.bin FORCE
-@@ -58,8 +59,13 @@
- # Calculate the load address of the compressed kernel image
- hostprogs-y := calc_vmlinuz_load_addr
- 
-+ifdef CONFIG_BCM47XX
-+# XXX just after CFE, just pray the address is static
-+VMLINUZ_LOAD_ADDRESS = 0xffffffff80900000
-+else
- VMLINUZ_LOAD_ADDRESS = $(shell $(obj)/calc_vmlinuz_load_addr \
- 		$(obj)/vmlinux.bin $(VMLINUX_LOAD_ADDRESS))
-+endif
- 
- vmlinuzobjs-y += $(obj)/piggy.o
- 
-@@ -105,4 +111,12 @@
- vmlinuz.srec: vmlinuz
- 	$(call cmd,objcopy)
- 
--clean-files := $(objtree)/vmlinuz $(objtree)/vmlinuz.{32,ecoff,bin,srec}
-+AFLAGS_selfreloc.o := -DVMLINUZ_LOAD_ADDRESS=$(VMLINUZ_LOAD_ADDRESS)
-+CPPFLAGS_selfreloc.lds := $(KBUILD_CFLAGS)
-+
-+arch/mips/boot/compressed/selfreloc.o: arch/mips/boot/compressed/selfreloc.S vmlinuz.bin FORCE
-+
-+vmlinuz.elf: arch/mips/boot/compressed/selfreloc.o arch/mips/boot/compressed/selfreloc.lds FORCE
-+	$(LD) $(LDFLAGS) -T arch/mips/boot/compressed/selfreloc.lds arch/mips/boot/compressed/selfreloc.o -o $@
-+
-+clean-files := $(objtree)/vmlinuz $(objtree)/vmlinuz.{32,ecoff,bin,srec,elf} $(objtree)/arch/mips/boot/compressed/selfreloc.{o,lds}
-diff -Nur linux-2.6.39.4.orig/arch/mips/boot/compressed/decompress.c linux-2.6.39.4/arch/mips/boot/compressed/decompress.c
---- linux-2.6.39.4.orig/arch/mips/boot/compressed/decompress.c	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/arch/mips/boot/compressed/decompress.c	2012-06-02 20:39:09.000000000 +0200
-@@ -43,7 +43,7 @@
- /* activate the code for pre-boot environment */
- #define STATIC static
- 
--#ifdef CONFIG_KERNEL_GZIP
-+#if defined(CONFIG_KERNEL_GZIP) || defined(CONFIG_KERNEL_XZ)
- void *memcpy(void *dest, const void *src, size_t n)
- {
- 	int i;
-@@ -54,6 +54,8 @@
- 		d[i] = s[i];
- 	return dest;
- }
-+#endif
-+#ifdef CONFIG_KERNEL_GZIP
- #include "../../../../lib/decompress_inflate.c"
- #endif
- 
-@@ -78,6 +80,10 @@
- #include "../../../../lib/decompress_unlzo.c"
- #endif
- 
-+#ifdef CONFIG_KERNEL_XZ
-+#include "../../../../lib/decompress_unxz.c"
-+#endif
-+
- void decompress_kernel(unsigned long boot_heap_start)
- {
- 	unsigned long zimage_start, zimage_size;
-diff -Nur linux-2.6.39.4.orig/arch/mips/boot/compressed/selfreloc.S linux-2.6.39.4/arch/mips/boot/compressed/selfreloc.S
---- linux-2.6.39.4.orig/arch/mips/boot/compressed/selfreloc.S	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39.4/arch/mips/boot/compressed/selfreloc.S	2012-06-02 20:35:49.000000000 +0200
-@@ -0,0 +1,54 @@
-+/*-
-+ * written 2011 by Thorsten Glaser <tg@freewrt.org> based on
-+ * arch/mips/boot/compressed/head.S
-+ */
-+
-+#include <asm/asm.h>
-+#include <asm/regdef.h>
-+
-+	.set noreorder
-+	.cprestore
-+
-+	.text
-+	LEAF(selfreloc_start)
-+selfreloc_start:
-+	/* Save boot rom start args */
-+	move	s0, a0
-+	move	s1, a1
-+	move	s2, a2
-+	move	s3, a3
-+
-+	/* Copy code to the correct place */
-+	PTR_LI	a0, VMLINUZ_LOAD_ADDRESS
-+	PTR_LA	a1, imgbeg
-+	PTR_LA	a2, imgend
-+1:	lw	t0, 0(a1)
-+	sw	t0, 0(a0)
-+	add	a1, 4
-+	add	a0, 4
-+	blt	a1, a2, 1b
-+	 nop
-+
-+	/* Restore boot rom start args */
-+	move	a0, s0
-+	move	a1, s1
-+	move	a2, s2
-+	move	a3, s3
-+
-+	/* Jump to the code at its new location */
-+	PTR_LI	k0, VMLINUZ_LOAD_ADDRESS
-+	jr	k0
-+	 nop
-+
-+	/* Just in case we come back… */
-+3:
-+	b	3b
-+	 nop
-+	END(selfreloc_start)
-+
-+	.globl	imgbeg
-+	.p2align 2
-+imgbeg:	.incbin	"vmlinuz.bin"
-+	.globl	imgend
-+	.p2align 2
-+imgend:
-diff -Nur linux-2.6.39.4.orig/arch/mips/boot/compressed/selfreloc.lds.S linux-2.6.39.4/arch/mips/boot/compressed/selfreloc.lds.S
---- linux-2.6.39.4.orig/arch/mips/boot/compressed/selfreloc.lds.S	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39.4/arch/mips/boot/compressed/selfreloc.lds.S	2012-06-02 20:35:49.000000000 +0200
-@@ -0,0 +1,39 @@
-+/*-
-+ * written 2010 by Thorsten Glaser <tg@debian.org> based on
-+ * arch/mips/kernel/vmlinux.lds and arch/mips/boot/compressed/ld.script
-+ */
-+
-+#include <asm/asm-offsets.h>
-+#include <asm/page.h>
-+#include <asm-generic/vmlinux.lds.h>
-+
-+#undef mips
-+#define mips mips
-+OUTPUT_ARCH(mips)
-+ENTRY(selfreloc_start)
-+PHDRS {
-+	text PT_LOAD FLAGS(7);	/* RWX */
-+}
-+SECTIONS
-+{
-+	. = VMLINUX_LOAD_ADDRESS;
-+	.text : {
-+		*(.text)
-+		*(.text.*)
-+		*(.rodata)
-+		*(.rodata.*)
-+		*(.data)
-+		*(.data.*)
-+		*(.bss)
-+		*(.bss.*)
-+	} :text
-+	/DISCARD/ : {
-+		*(.MIPS.options)
-+		*(.options)
-+		*(.pdr)
-+		*(.reginfo)
-+		*(.comment)
-+		*(.note)
-+		*(.gnu.attributes)
-+	}
-+}
-diff -Nur linux-2.6.39.4.orig/arch/mips/boot/compressed/uart-16550.c linux-2.6.39.4/arch/mips/boot/compressed/uart-16550.c
---- linux-2.6.39.4.orig/arch/mips/boot/compressed/uart-16550.c	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/arch/mips/boot/compressed/uart-16550.c	2012-06-02 20:35:49.000000000 +0200
-@@ -18,6 +18,11 @@
- #define PORT(offset) (CKSEG1ADDR(AR7_REGS_UART0) + (4 * offset))
- #endif
- 
-+#ifdef CONFIG_BCM47XX
-+#define UART_BASE 0x18000300
-+#define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset))
-+#endif
-+
- #ifndef PORT
- #error please define the serial port address for your own machine
- #endif
-diff -Nur linux-2.6.39.4.orig/drivers/ssb/driver_mipscore.c linux-2.6.39.4/drivers/ssb/driver_mipscore.c
---- linux-2.6.39.4.orig/drivers/ssb/driver_mipscore.c	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/drivers/ssb/driver_mipscore.c	2012-06-02 20:35:49.000000000 +0200
-@@ -190,10 +190,11 @@
- {
- 	struct ssb_bus *bus = mcore->dev->bus;
- 
-+	printk("Check for vendor with value: %d", bus->chipco.dev->id.vendor);
- 	mcore->flash_buswidth = 2;
- 	if (bus->chipco.dev) {
- 		mcore->flash_window = 0x1c000000;
--		mcore->flash_window_size = 0x02000000;
-+		mcore->flash_window_size = 0x00800000;
- 		if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
- 		               & SSB_CHIPCO_CFG_DS16) == 0)
- 			mcore->flash_buswidth = 1;
-diff -Nur linux-2.6.39.4.orig/init/Kconfig linux-2.6.39.4/init/Kconfig
---- linux-2.6.39.4.orig/init/Kconfig	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/init/Kconfig	2012-06-02 20:36:11.000000000 +0200
-@@ -156,6 +156,7 @@
- config KERNEL_GZIP
- 	bool "Gzip"
- 	depends on HAVE_KERNEL_GZIP
-+	select DECOMPRESS_GZIP
- 	help
- 	  The old and tried gzip compression. It provides a good balance
- 	  between compression ratio and decompression speed.
-@@ -163,6 +164,7 @@
- config KERNEL_BZIP2
- 	bool "Bzip2"
- 	depends on HAVE_KERNEL_BZIP2
-+	select DECOMPRESS_BZIP2
- 	help
- 	  Its compression ratio and speed is intermediate.
- 	  Decompression speed is slowest among the three.  The kernel
-@@ -173,6 +175,7 @@
- config KERNEL_LZMA
- 	bool "LZMA"
- 	depends on HAVE_KERNEL_LZMA
-+	select DECOMPRESS_LZMA
- 	help
- 	  The most recent compression algorithm.
- 	  Its ratio is best, decompression speed is between the other
-@@ -182,6 +185,7 @@
- config KERNEL_XZ
- 	bool "XZ"
- 	depends on HAVE_KERNEL_XZ
-+	select DECOMPRESS_XZ
- 	help
- 	  XZ uses the LZMA2 algorithm and instruction set specific
- 	  BCJ filters which can improve compression ratio of executable
-@@ -197,6 +201,7 @@
- config KERNEL_LZO
- 	bool "LZO"
- 	depends on HAVE_KERNEL_LZO
-+	select DECOMPRESS_LZO
- 	help
- 	  Its compression ratio is the poorest among the 4. The kernel
- 	  size is about 10% bigger than gzip; however its speed
-diff -Nur linux-2.6.39.4.orig/lib/xz/xz_stream.h linux-2.6.39.4/lib/xz/xz_stream.h
---- linux-2.6.39.4.orig/lib/xz/xz_stream.h	2011-08-03 21:43:28.000000000 +0200
-+++ linux-2.6.39.4/lib/xz/xz_stream.h	2012-06-02 20:40:18.000000000 +0200
-@@ -40,7 +40,12 @@
-  * compressed size of the file to less than 256 MiB and may also weaken
-  * error detection slightly.
-  */
-+
-+#ifdef __mips__
-+typedef uint32_t vli_type;
-+#else
- typedef uint64_t vli_type;
-+#endif
- 
- #define VLI_MAX ((vli_type)-1 / 2)
- #define VLI_UNKNOWN ((vli_type)-1)
diff --git a/target/linux/patches/3.1.10/fon2100.patch b/target/linux/patches/3.1.10/fon2100.patch
deleted file mode 100644
index 038ff7020..000000000
--- a/target/linux/patches/3.1.10/fon2100.patch
+++ /dev/null
@@ -1,6279 +0,0 @@
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/Kbuild.platforms linux-2.6.39-rc7/arch/mips/Kbuild.platforms
---- linux-2.6.39-rc7.orig/arch/mips/Kbuild.platforms	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/arch/mips/Kbuild.platforms	2011-05-15 21:34:57.000000000 +0200
-@@ -6,6 +6,7 @@
- platforms += bcm47xx
- platforms += bcm63xx
- platforms += cavium-octeon
-+platforms += ar231x
- platforms += cobalt
- platforms += dec
- platforms += emma
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/Kconfig linux-2.6.39-rc7/arch/mips/Kconfig
---- linux-2.6.39-rc7.orig/arch/mips/Kconfig	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/arch/mips/Kconfig	2011-05-16 12:11:11.000000000 +0200
-@@ -121,6 +121,21 @@
- 	help
- 	 Support for BCM63XX based boards
- 
-+config ATHEROS_AR231X
-+	bool "Atheros 231x/531x SoC support"
-+	select CEVT_R4K
-+	select CSRC_R4K
-+	select DMA_NONCOHERENT
-+	select IRQ_CPU
-+	select SYS_HAS_CPU_MIPS32_R1
-+	select SYS_SUPPORTS_BIG_ENDIAN
-+	select SYS_SUPPORTS_32BIT_KERNEL
-+	select GENERIC_GPIO
-+	select SYS_HAS_EARLY_PRINTK
-+	select SYS_SUPPORTS_ZBOOT
-+	help
-+	  Support for AR231x and AR531x based boards
-+
- config MIPS_COBALT
- 	bool "Cobalt Server"
- 	select CEVT_R4K
-@@ -738,6 +753,7 @@
- 
- endchoice
- 
-+source "arch/mips/ar231x/Kconfig"
- source "arch/mips/alchemy/Kconfig"
- source "arch/mips/ath79/Kconfig"
- source "arch/mips/bcm63xx/Kconfig"
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/Kconfig linux-2.6.39-rc7/arch/mips/ar231x/Kconfig
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/Kconfig	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/Kconfig	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,27 @@
-+config ATHEROS_AR5312
-+	bool "Atheros 5312/2312+ support"
-+	depends on ATHEROS_AR231X
-+	default y
-+
-+config ATHEROS_AR2315
-+	bool "Atheros 2315+ support"
-+	depends on ATHEROS_AR231X
-+	select DMA_NONCOHERENT
-+	select CEVT_R4K
-+	select CSRC_R4K
-+	select IRQ_CPU
-+	select SYS_HAS_CPU_MIPS32_R1
-+	select SYS_SUPPORTS_32BIT_KERNEL
-+	select SYS_SUPPORTS_BIG_ENDIAN
-+	select GENERIC_GPIO
-+	default y
-+
-+config ATHEROS_AR2315_PCI
-+	bool "PCI support"
-+	depends on ATHEROS_AR2315
-+	select HW_HAS_PCI
-+	select PCI
-+	select USB_ARCH_HAS_HCD
-+	select USB_ARCH_HAS_OHCI
-+	select USB_ARCH_HAS_EHCI
-+	default n
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/Makefile linux-2.6.39-rc7/arch/mips/ar231x/Makefile
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/Makefile	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/Makefile	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,17 @@
-+#
-+# This file is subject to the terms and conditions of the GNU General Public
-+# License.  See the file "COPYING" in the main directory of this archive
-+# for more details.
-+#
-+# Copyright (C) 2006 FON Technology, SL.
-+# Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+# Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
-+#
-+
-+obj-y += board.o prom.o devices.o
-+
-+obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-+
-+obj-$(CONFIG_ATHEROS_AR5312) += ar5312.o
-+obj-$(CONFIG_ATHEROS_AR2315) += ar2315.o
-+obj-$(CONFIG_ATHEROS_AR2315_PCI) += pci.o
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/Platform linux-2.6.39-rc7/arch/mips/ar231x/Platform
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/Platform	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/Platform	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,6 @@
-+#
-+# Atheros AR5312/AR2312 WiSoC
-+#
-+platform-$(CONFIG_ATHEROS_AR231X)          += ar231x/
-+cflags-$(CONFIG_ATHEROS_AR231X)        += -I$(srctree)/arch/mips/include/asm/mach-ar231x
-+load-$(CONFIG_ATHEROS_AR231X)          += 0xffffffff80041000
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/ar2315.c linux-2.6.39-rc7/arch/mips/ar231x/ar2315.c
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/ar2315.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/ar2315.c	2011-05-15 21:47:07.000000000 +0200
-@@ -0,0 +1,654 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2003 Atheros Communications, Inc.,  All Rights Reserved.
-+ * Copyright (C) 2006 FON Technology, SL.
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
-+ */
-+
-+/*
-+ * Platform devices for Atheros SoCs
-+ */
-+
-+#include <generated/autoconf.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/types.h>
-+#include <linux/string.h>
-+#include <linux/platform_device.h>
-+#include <linux/kernel.h>
-+#include <linux/reboot.h>
-+#include <linux/delay.h>
-+#include <linux/leds.h>
-+#include <asm/bootinfo.h>
-+#include <asm/reboot.h>
-+#include <asm/time.h>
-+#include <asm/irq.h>
-+#include <asm/io.h>
-+#include <asm/gpio.h>
-+
-+#include <ar231x_platform.h>
-+#include <ar2315_regs.h>
-+#include <ar231x.h>
-+#include "devices.h"
-+#include "ar2315.h"
-+
-+static u32 gpiointmask = 0, gpiointval = 0;
-+
-+static inline void ar2315_gpio_irq(void)
-+{
-+	u32 pend;
-+	int bit = -1;
-+
-+	/* only do one gpio interrupt at a time */
-+	pend = (ar231x_read_reg(AR2315_GPIO_DI) ^ gpiointval) & gpiointmask;
-+
-+	if (pend) {
-+		bit = fls(pend) - 1;
-+		pend &= ~(1 << bit);
-+		gpiointval ^= (1 << bit);
-+	}
-+
-+	if (!pend)
-+		ar231x_write_reg(AR2315_ISR, AR2315_ISR_GPIO);
-+
-+	/* Enable interrupt with edge detection */
-+	if ((ar231x_read_reg(AR2315_GPIO_CR) & AR2315_GPIO_CR_M(bit)) != AR2315_GPIO_CR_I(bit))
-+		return;
-+
-+	if (bit >= 0)
-+		do_IRQ(AR531X_GPIO_IRQ_BASE + bit);
-+}
-+
-+#ifdef CONFIG_ATHEROS_AR2315_PCI
-+static inline void pci_abort_irq(void)
-+{
-+	ar231x_write_reg(AR2315_PCI_INT_STATUS, AR2315_PCI_ABORT_INT);
-+}
-+
-+static inline void pci_ack_irq(void)
-+{
-+	ar231x_write_reg(AR2315_PCI_INT_STATUS, AR2315_PCI_EXT_INT);
-+}
-+
-+void ar2315_pci_irq(int irq)
-+{
-+	if (ar231x_read_reg(AR2315_PCI_INT_STATUS) == AR2315_PCI_ABORT_INT)
-+		pci_abort_irq();
-+	else {
-+		do_IRQ(irq);
-+		pci_ack_irq();
-+	}
-+}
-+#endif /* CONFIG_ATHEROS_AR2315_PCI */
-+
-+/*
-+ * Called when an interrupt is received, this function
-+ * determines exactly which interrupt it was, and it
-+ * invokes the appropriate handler.
-+ *
-+ * Implicitly, we also define interrupt priority by
-+ * choosing which to dispatch first.
-+ */
-+static asmlinkage void
-+ar2315_irq_dispatch(void)
-+{
-+	int pending = read_c0_status() & read_c0_cause();
-+
-+	if (pending & CAUSEF_IP3)
-+		do_IRQ(AR2315_IRQ_WLAN0_INTRS);
-+	else if (pending & CAUSEF_IP4)
-+		do_IRQ(AR2315_IRQ_ENET0_INTRS);
-+#ifdef CONFIG_ATHEROS_AR2315_PCI
-+	else if (pending & CAUSEF_IP5)
-+		ar2315_pci_irq(AR2315_IRQ_LCBUS_PCI);
-+#endif
-+	else if (pending & CAUSEF_IP2) {
-+		unsigned int misc_intr = ar231x_read_reg(AR2315_ISR) & ar231x_read_reg(AR2315_IMR);
-+
-+		if (misc_intr & AR2315_ISR_SPI)
-+			do_IRQ(AR531X_MISC_IRQ_SPI);
-+		else if (misc_intr & AR2315_ISR_TIMER)
-+			do_IRQ(AR531X_MISC_IRQ_TIMER);
-+		else if (misc_intr & AR2315_ISR_AHB)
-+			do_IRQ(AR531X_MISC_IRQ_AHB_PROC);
-+		else if (misc_intr & AR2315_ISR_GPIO)
-+			ar2315_gpio_irq();
-+		else if (misc_intr & AR2315_ISR_UART0)
-+			do_IRQ(AR531X_MISC_IRQ_UART0);
-+		else if (misc_intr & AR2315_ISR_WD)
-+			do_IRQ(AR531X_MISC_IRQ_WATCHDOG);
-+		else
-+			do_IRQ(AR531X_MISC_IRQ_NONE);
-+	} else if (pending & CAUSEF_IP7)
-+		do_IRQ(AR531X_IRQ_CPU_CLOCK);
-+}
-+
-+static void ar2315_set_gpiointmask(int gpio, int level)
-+{
-+	u32 reg;
-+
-+	reg = ar231x_read_reg(AR2315_GPIO_INT);
-+	reg &= ~(AR2315_GPIO_INT_M | AR2315_GPIO_INT_LVL_M);
-+	reg |= gpio | AR2315_GPIO_INT_LVL(level);
-+	ar231x_write_reg(AR2315_GPIO_INT, reg);
-+}
-+
-+static void ar2315_gpio_intr_enable(struct irq_data *d)
-+{
-+	unsigned int gpio = d->irq - AR531X_GPIO_IRQ_BASE;
-+
-+	/* Enable interrupt with edge detection */
-+	if ((ar231x_read_reg(AR2315_GPIO_CR) & AR2315_GPIO_CR_M(gpio)) != AR2315_GPIO_CR_I(gpio))
-+		return;
-+
-+	gpiointmask |= (1 << gpio);
-+	ar2315_set_gpiointmask(gpio, 3);
-+}
-+
-+static void ar2315_gpio_intr_disable(struct irq_data *d)
-+{
-+	unsigned int gpio = d->irq - AR531X_GPIO_IRQ_BASE;
-+
-+	/* Disable interrupt */
-+	gpiointmask &= ~(1 << gpio);
-+	ar2315_set_gpiointmask(gpio, 0);
-+}
-+
-+static struct irq_chip ar2315_gpio_intr_controller = {
-+	.name	= "AR2315-GPIO",
-+	.irq_ack      = ar2315_gpio_intr_disable,
-+	.irq_mask_ack = ar2315_gpio_intr_disable,
-+	.irq_mask     = ar2315_gpio_intr_disable,
-+	.irq_unmask   = ar2315_gpio_intr_enable,
-+};
-+
-+static void
-+ar2315_misc_intr_enable(struct irq_data *d)
-+{
-+	unsigned int imr;
-+
-+	imr = ar231x_read_reg(AR2315_IMR);
-+	switch(d->irq) {
-+	case AR531X_MISC_IRQ_SPI:
-+		 imr |= AR2315_ISR_SPI;
-+		 break;
-+	case AR531X_MISC_IRQ_TIMER:
-+	     imr |= AR2315_ISR_TIMER;
-+	     break;
-+	case AR531X_MISC_IRQ_AHB_PROC:
-+	     imr |= AR2315_ISR_AHB;
-+	     break;
-+	case AR531X_MISC_IRQ_GPIO:
-+	     imr |= AR2315_ISR_GPIO;
-+	     break;
-+	case AR531X_MISC_IRQ_UART0:
-+	     imr |= AR2315_ISR_UART0;
-+	     break;
-+	case AR531X_MISC_IRQ_WATCHDOG:
-+	     imr |= AR2315_ISR_WD;
-+	     break;
-+	default:
-+		break;
-+	}
-+	ar231x_write_reg(AR2315_IMR, imr);
-+}
-+
-+static void
-+ar2315_misc_intr_disable(struct irq_data *d)
-+{
-+	unsigned int imr;
-+
-+	imr = ar231x_read_reg(AR2315_IMR);
-+	switch(d->irq) {
-+	case AR531X_MISC_IRQ_SPI:
-+		 imr &= ~AR2315_ISR_SPI;
-+		 break;
-+	case AR531X_MISC_IRQ_TIMER:
-+	     imr &= ~AR2315_ISR_TIMER;
-+	     break;
-+	case AR531X_MISC_IRQ_AHB_PROC:
-+	     imr &= ~AR2315_ISR_AHB;
-+	     break;
-+	case AR531X_MISC_IRQ_GPIO:
-+	     imr &= ~AR2315_ISR_GPIO;
-+	     break;
-+	case AR531X_MISC_IRQ_UART0:
-+	     imr &= ~AR2315_ISR_UART0;
-+	     break;
-+	case AR531X_MISC_IRQ_WATCHDOG:
-+	     imr &= ~AR2315_ISR_WD;
-+	     break;
-+	default:
-+		break;
-+	}
-+	ar231x_write_reg(AR2315_IMR, imr);
-+}
-+
-+
-+static struct irq_chip ar2315_misc_intr_controller = {
-+	.name	= "AR2315-MISC",
-+	.irq_mask     = ar2315_misc_intr_disable,
-+	.irq_unmask   = ar2315_misc_intr_enable,
-+};
-+
-+static irqreturn_t ar2315_ahb_proc_handler(int cpl, void *dev_id)
-+{
-+    ar231x_write_reg(AR2315_AHB_ERR0, AHB_ERROR_DET);
-+    ar231x_read_reg(AR2315_AHB_ERR1);
-+
-+    printk(KERN_ERR "AHB fatal error\n");
-+    machine_restart("AHB error"); /* Catastrophic failure */
-+
-+    return IRQ_HANDLED;
-+}
-+
-+static struct irqaction ar2315_ahb_proc_interrupt  = {
-+	.handler	= ar2315_ahb_proc_handler,
-+	.flags		= IRQF_DISABLED,
-+	.name		= "ar2315_ahb_proc_interrupt",
-+};
-+
-+static struct irqaction cascade  = {
-+	.handler	= no_action,
-+	.flags		= IRQF_DISABLED,
-+	.name		= "cascade",
-+};
-+
-+void
-+ar2315_irq_init(void)
-+{
-+	int i;
-+
-+	if (!is_2315())
-+		return;
-+
-+	ar231x_irq_dispatch = ar2315_irq_dispatch;
-+	gpiointval = ar231x_read_reg(AR2315_GPIO_DI);
-+	for (i = 0; i < AR531X_MISC_IRQ_COUNT; i++) {
-+		int irq = AR531X_MISC_IRQ_BASE + i;
-+		irq_set_chip_and_handler(irq, &ar2315_misc_intr_controller,
-+			handle_level_irq);
-+	}
-+	for (i = 0; i < AR531X_GPIO_IRQ_COUNT; i++) {
-+		int irq = AR531X_GPIO_IRQ_BASE + i;
-+		irq_set_chip_and_handler(irq, &ar2315_gpio_intr_controller,
-+			handle_level_irq);
-+	}
-+	setup_irq(AR531X_MISC_IRQ_GPIO, &cascade);
-+	setup_irq(AR531X_MISC_IRQ_AHB_PROC, &ar2315_ahb_proc_interrupt);
-+	setup_irq(AR2315_IRQ_MISC_INTRS, &cascade);
-+}
-+
-+const struct ar231x_gpiodev ar2315_gpiodev;
-+
-+static u32
-+ar2315_gpio_get_output(void)
-+{
-+	u32 reg;
-+	reg = ar231x_read_reg(AR2315_GPIO_CR);
-+	reg &= ar2315_gpiodev.valid_mask;
-+	return reg;
-+}
-+
-+static u32
-+ar2315_gpio_set_output(u32 mask, u32 val)
-+{
-+	u32 reg;
-+
-+	reg = ar231x_read_reg(AR2315_GPIO_CR);
-+	reg &= ~mask;
-+	reg |= val;
-+	ar231x_write_reg(AR2315_GPIO_CR, reg);
-+	return reg;
-+}
-+
-+static u32
-+ar2315_gpio_get(void)
-+{
-+	u32 reg;
-+	reg = ar231x_read_reg(AR2315_GPIO_DI);
-+	reg &= ar2315_gpiodev.valid_mask;
-+	return reg;
-+}
-+
-+static u32
-+ar2315_gpio_set(u32 mask, u32 value)
-+{
-+	u32 reg;
-+	reg = ar231x_read_reg(AR2315_GPIO_DO);
-+	reg &= ~mask;
-+	reg |= value;
-+	ar231x_write_reg(AR2315_GPIO_DO, reg);
-+	return reg;
-+}
-+
-+const struct ar231x_gpiodev ar2315_gpiodev = {
-+	.valid_mask = (1 << 22) - 1,
-+	.get_output = ar2315_gpio_get_output,
-+	.set_output = ar2315_gpio_set_output,
-+	.get = ar2315_gpio_get,
-+	.set = ar2315_gpio_set,
-+};
-+
-+static struct ar231x_eth ar2315_eth_data = {
-+	.reset_base = AR2315_RESET,
-+	.reset_mac = AR2315_RESET_ENET0,
-+	.reset_phy = AR2315_RESET_EPHY0,
-+	.phy_base = KSEG1ADDR(AR2315_ENET0),
-+	.config = &ar231x_board,
-+};
-+
-+static struct resource ar2315_spiflash_res[] = {
-+	{
-+		.name = "flash_base",
-+		.flags = IORESOURCE_MEM,
-+		.start = KSEG1ADDR(AR2315_SPI_READ),
-+		.end = KSEG1ADDR(AR2315_SPI_READ) + 0x1000000 - 1,
-+	},
-+	{
-+		.name = "flash_regs",
-+		.flags = IORESOURCE_MEM,
-+		.start = 0x11300000,
-+		.end = 0x11300012,
-+	},
-+};
-+
-+static struct platform_device ar2315_spiflash = {
-+	.id = 0,
-+	.name = "spiflash",
-+	.resource = ar2315_spiflash_res,
-+	.num_resources = ARRAY_SIZE(ar2315_spiflash_res)
-+};
-+
-+static struct platform_device ar2315_wdt = {
-+	.id = 0,
-+	.name = "ar2315_wdt",
-+};
-+
-+#define SPI_FLASH_CTL      0x00
-+#define SPI_FLASH_OPCODE   0x04
-+#define SPI_FLASH_DATA     0x08
-+
-+static inline u32
-+spiflash_read_reg(int reg)
-+{
-+	return ar231x_read_reg(AR2315_SPI + reg);
-+}
-+
-+static inline void
-+spiflash_write_reg(int reg, u32 data)
-+{
-+	ar231x_write_reg(AR2315_SPI + reg, data);
-+}
-+
-+static u32
-+spiflash_wait_status(void)
-+{
-+	u32 reg;
-+
-+	do {
-+		reg = spiflash_read_reg(SPI_FLASH_CTL);
-+	} while (reg & SPI_CTL_BUSY);
-+
-+	return reg;
-+}
-+
-+static u8
-+spiflash_probe(void)
-+{
-+	u32 reg;
-+
-+	reg = spiflash_wait_status();
-+	reg &= ~SPI_CTL_TX_RX_CNT_MASK;
-+	reg |= (1 << 4) | 4 | SPI_CTL_START;
-+
-+	spiflash_write_reg(SPI_FLASH_OPCODE, 0xab);
-+	spiflash_write_reg(SPI_FLASH_CTL, reg);
-+
-+	reg = spiflash_wait_status();
-+	reg = spiflash_read_reg(SPI_FLASH_DATA);
-+	reg &= 0xff;
-+
-+	return (u8) reg;
-+}
-+
-+
-+#define STM_8MBIT_SIGNATURE     0x13
-+#define STM_16MBIT_SIGNATURE    0x14
-+#define STM_32MBIT_SIGNATURE    0x15
-+#define STM_64MBIT_SIGNATURE    0x16
-+#define STM_128MBIT_SIGNATURE   0x17
-+
-+static u8 __init *
-+ar2315_flash_limit(void)
-+{
-+	u32 flash_size = 0;
-+
-+	/* probe the flash chip size */
-+	switch(spiflash_probe()) {
-+		case STM_8MBIT_SIGNATURE:
-+			flash_size = 0x00100000;
-+			break;
-+		case STM_16MBIT_SIGNATURE:
-+			flash_size = 0x00200000;
-+			break;
-+		case STM_32MBIT_SIGNATURE:
-+			flash_size = 0x00400000;
-+			break;
-+		case STM_64MBIT_SIGNATURE:
-+			flash_size = 0x00800000;
-+			break;
-+		case STM_128MBIT_SIGNATURE:
-+			flash_size = 0x01000000;
-+			break;
-+	}
-+
-+	ar2315_spiflash_res[0].end = ar2315_spiflash_res[0].start +
-+		flash_size - 1;
-+	return (u8 *) ar2315_spiflash_res[0].end + 1;
-+}
-+
-+#ifdef CONFIG_LEDS_GPIO
-+static struct gpio_led ar2315_leds[6];
-+static struct gpio_led_platform_data ar2315_led_data = {
-+	.leds = (void *) ar2315_leds,
-+};
-+
-+static struct platform_device ar2315_gpio_leds = {
-+	.name = "leds-gpio",
-+	.id = -1,
-+	.dev = {
-+		.platform_data = (void *) &ar2315_led_data,
-+	}
-+};
-+
-+static void __init
-+ar2315_init_gpio(void)
-+{
-+	static char led_names[6][6];
-+	int i, led = 0;
-+
-+	ar2315_led_data.num_leds = 0;
-+	for(i = 1; i < 8; i++)
-+	{
-+		if((i == AR2315_RESET_GPIO) ||
-+		   (i == ar231x_board.config->resetConfigGpio))
-+			continue;
-+
-+		if(i == ar231x_board.config->sysLedGpio)
-+			strcpy(led_names[led], "wlan");
-+		else
-+			sprintf(led_names[led], "gpio%d", i);
-+
-+		ar2315_leds[led].name = led_names[led];
-+		ar2315_leds[led].gpio = i;
-+		ar2315_leds[led].active_low = 0;
-+		led++;
-+	}
-+	ar2315_led_data.num_leds = led;
-+	platform_device_register(&ar2315_gpio_leds);
-+}
-+#else
-+static inline void ar2315_init_gpio(void)
-+{
-+}
-+#endif
-+
-+int __init
-+ar2315_init_devices(void)
-+{
-+	if (!is_2315())
-+		return 0;
-+
-+	/* Find board configuration */
-+	ar231x_find_config(ar2315_flash_limit());
-+	ar2315_eth_data.macaddr = ar231x_board.config->enet0_mac;
-+
-+	ar2315_init_gpio();
-+	platform_device_register(&ar2315_wdt);
-+	platform_device_register(&ar2315_spiflash);
-+	ar231x_add_ethernet(0, KSEG1ADDR(AR2315_ENET0), AR2315_IRQ_ENET0_INTRS,
-+		&ar2315_eth_data);
-+	ar231x_add_wmac(0, AR2315_WLAN0, AR2315_IRQ_WLAN0_INTRS);
-+
-+	return 0;
-+}
-+
-+static void
-+ar2315_restart(char *command)
-+{
-+	void (*mips_reset_vec)(void) = (void *) 0xbfc00000;
-+
-+	local_irq_disable();
-+
-+	/* try reset the system via reset control */
-+	ar231x_write_reg(AR2315_COLD_RESET,AR2317_RESET_SYSTEM);
-+
-+	/* Cold reset does not work on the AR2315/6, use the GPIO reset bits a workaround.
-+	 * give it some time to attempt a gpio based hardware reset
-+	 * (atheros reference design workaround) */
-+	gpio_direction_output(AR2315_RESET_GPIO, 0);
-+	mdelay(100);
-+
-+	/* Some boards (e.g. Senao EOC-2610) don't implement the reset logic
-+	 * workaround. Attempt to jump to the mips reset location -
-+	 * the boot loader itself might be able to recover the system */
-+	mips_reset_vec();
-+}
-+
-+
-+/*
-+ * This table is indexed by bits 5..4 of the CLOCKCTL1 register
-+ * to determine the predevisor value.
-+ */
-+static int __initdata CLOCKCTL1_PREDIVIDE_TABLE[4] = { 1, 2, 4, 5 };
-+static int __initdata PLLC_DIVIDE_TABLE[5] = { 2, 3, 4, 6, 3 };
-+
-+static unsigned int __init
-+ar2315_sys_clk(unsigned int clockCtl)
-+{
-+    unsigned int pllcCtrl,cpuDiv;
-+    unsigned int pllcOut,refdiv,fdiv,divby2;
-+	unsigned int clkDiv;
-+
-+    pllcCtrl = ar231x_read_reg(AR2315_PLLC_CTL);
-+    refdiv = (pllcCtrl & PLLC_REF_DIV_M) >> PLLC_REF_DIV_S;
-+    refdiv = CLOCKCTL1_PREDIVIDE_TABLE[refdiv];
-+    fdiv = (pllcCtrl & PLLC_FDBACK_DIV_M) >> PLLC_FDBACK_DIV_S;
-+    divby2 = (pllcCtrl & PLLC_ADD_FDBACK_DIV_M) >> PLLC_ADD_FDBACK_DIV_S;
-+    divby2 += 1;
-+    pllcOut = (40000000/refdiv)*(2*divby2)*fdiv;
-+
-+
-+    /* clkm input selected */
-+	switch(clockCtl & CPUCLK_CLK_SEL_M) {
-+		case 0:
-+		case 1:
-+			clkDiv = PLLC_DIVIDE_TABLE[(pllcCtrl & PLLC_CLKM_DIV_M) >> PLLC_CLKM_DIV_S];
-+			break;
-+		case 2:
-+			clkDiv = PLLC_DIVIDE_TABLE[(pllcCtrl & PLLC_CLKC_DIV_M) >> PLLC_CLKC_DIV_S];
-+			break;
-+		default:
-+			pllcOut = 40000000;
-+			clkDiv = 1;
-+			break;
-+	}
-+	cpuDiv = (clockCtl & CPUCLK_CLK_DIV_M) >> CPUCLK_CLK_DIV_S;
-+	cpuDiv = cpuDiv * 2 ?: 1;
-+	return (pllcOut/(clkDiv * cpuDiv));
-+}
-+
-+static inline unsigned int
-+ar2315_cpu_frequency(void)
-+{
-+    return ar2315_sys_clk(ar231x_read_reg(AR2315_CPUCLK));
-+}
-+
-+static inline unsigned int
-+ar2315_apb_frequency(void)
-+{
-+    return ar2315_sys_clk(ar231x_read_reg(AR2315_AMBACLK));
-+}
-+
-+void __init
-+ar2315_time_init(void)
-+{
-+	if (!is_2315())
-+		return;
-+
-+	mips_hpt_frequency = ar2315_cpu_frequency() / 2;
-+}
-+
-+void __init
-+ar2315_prom_init(void)
-+{
-+	u32 memsize, memcfg, devid;
-+
-+	if (!is_2315())
-+		return;
-+
-+	memcfg = ar231x_read_reg(AR2315_MEM_CFG);
-+	memsize   = 1 + ((memcfg & SDRAM_DATA_WIDTH_M) >> SDRAM_DATA_WIDTH_S);
-+	memsize <<= 1 + ((memcfg & SDRAM_COL_WIDTH_M) >> SDRAM_COL_WIDTH_S);
-+	memsize <<= 1 + ((memcfg & SDRAM_ROW_WIDTH_M) >> SDRAM_ROW_WIDTH_S);
-+	memsize <<= 3;
-+	add_memory_region(0, memsize, BOOT_MEM_RAM);
-+
-+	/* Detect the hardware based on the device ID */
-+	devid = ar231x_read_reg(AR2315_SREV) & AR2315_REV_CHIP;
-+	switch(devid) {
-+		case 0x90:
-+		case 0x91:
-+			ar231x_devtype = DEV_TYPE_AR2317;
-+			break;
-+		default:
-+			ar231x_devtype = DEV_TYPE_AR2315;
-+			break;
-+	}
-+	ar231x_gpiodev = &ar2315_gpiodev;
-+	ar231x_board.devid = devid;
-+}
-+
-+void __init
-+ar2315_plat_setup(void)
-+{
-+	u32 config;
-+
-+	if (!is_2315())
-+		return;
-+
-+	/* Clear any lingering AHB errors */
-+	config = read_c0_config();
-+	write_c0_config(config & ~0x3);
-+	ar231x_write_reg(AR2315_AHB_ERR0,AHB_ERROR_DET);
-+	ar231x_read_reg(AR2315_AHB_ERR1);
-+	ar231x_write_reg(AR2315_WDC, AR2315_WDC_IGNORE_EXPIRATION);
-+
-+	_machine_restart = ar2315_restart;
-+	ar231x_serial_setup(KSEG1ADDR(AR2315_UART0), ar2315_apb_frequency());
-+}
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/ar2315.h linux-2.6.39-rc7/arch/mips/ar231x/ar2315.h
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/ar2315.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/ar2315.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,37 @@
-+#ifndef __AR2315_H
-+#define __AR2315_H
-+
-+#ifdef CONFIG_ATHEROS_AR2315
-+
-+extern void ar2315_irq_init(void);
-+extern int ar2315_init_devices(void);
-+extern void ar2315_prom_init(void);
-+extern void ar2315_plat_setup(void);
-+extern void ar2315_time_init(void);
-+
-+#else
-+
-+static inline void ar2315_irq_init(void)
-+{
-+}
-+
-+static inline int ar2315_init_devices(void)
-+{
-+	return 0;
-+}
-+
-+static inline void ar2315_prom_init(void)
-+{
-+}
-+
-+static inline void ar2315_plat_setup(void)
-+{
-+}
-+
-+static inline void ar2315_time_init(void)
-+{
-+}
-+
-+#endif
-+
-+#endif
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/ar5312.c linux-2.6.39-rc7/arch/mips/ar231x/ar5312.c
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/ar5312.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/ar5312.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,538 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2003 Atheros Communications, Inc.,  All Rights Reserved.
-+ * Copyright (C) 2006 FON Technology, SL.
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
-+ */
-+
-+/*
-+ * Platform devices for Atheros SoCs
-+ */
-+
-+#include <generated/autoconf.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/types.h>
-+#include <linux/string.h>
-+#include <linux/mtd/physmap.h>
-+#include <linux/platform_device.h>
-+#include <linux/kernel.h>
-+#include <linux/reboot.h>
-+#include <linux/leds.h>
-+#include <asm/bootinfo.h>
-+#include <asm/reboot.h>
-+#include <asm/time.h>
-+#include <asm/irq.h>
-+#include <asm/io.h>
-+#include <gpio.h>
-+
-+#include <ar231x_platform.h>
-+#include <ar5312_regs.h>
-+#include <ar231x.h>
-+#include "devices.h"
-+#include "ar5312.h"
-+
-+static void
-+ar5312_misc_irq_dispatch(void)
-+{
-+	unsigned int ar231x_misc_intrs = ar231x_read_reg(AR531X_ISR) & ar231x_read_reg(AR531X_IMR);
-+
-+	if (ar231x_misc_intrs & AR531X_ISR_TIMER) {
-+		do_IRQ(AR531X_MISC_IRQ_TIMER);
-+		(void)ar231x_read_reg(AR531X_TIMER);
-+	} else if (ar231x_misc_intrs & AR531X_ISR_AHBPROC)
-+		do_IRQ(AR531X_MISC_IRQ_AHB_PROC);
-+	else if ((ar231x_misc_intrs & AR531X_ISR_UART0))
-+		do_IRQ(AR531X_MISC_IRQ_UART0);
-+	else if (ar231x_misc_intrs & AR531X_ISR_WD)
-+		do_IRQ(AR531X_MISC_IRQ_WATCHDOG);
-+	else
-+		do_IRQ(AR531X_MISC_IRQ_NONE);
-+}
-+
-+static asmlinkage void
-+ar5312_irq_dispatch(void)
-+{
-+	int pending = read_c0_status() & read_c0_cause();
-+
-+	if (pending & CAUSEF_IP2)
-+		do_IRQ(AR5312_IRQ_WLAN0_INTRS);
-+	else if (pending & CAUSEF_IP3)
-+		do_IRQ(AR5312_IRQ_ENET0_INTRS);
-+	else if (pending & CAUSEF_IP4)
-+		do_IRQ(AR5312_IRQ_ENET1_INTRS);
-+	else if (pending & CAUSEF_IP5)
-+		do_IRQ(AR5312_IRQ_WLAN1_INTRS);
-+	else if (pending & CAUSEF_IP6)
-+		ar5312_misc_irq_dispatch();
-+	else if (pending & CAUSEF_IP7)
-+		do_IRQ(AR531X_IRQ_CPU_CLOCK);
-+}
-+
-+
-+/* Enable the specified AR531X_MISC_IRQ interrupt */
-+static void
-+ar5312_misc_intr_enable(struct irq_data *d)
-+{
-+	unsigned int imr;
-+
-+	imr = ar231x_read_reg(AR531X_IMR);
-+	imr |= (1 << (d->irq - AR531X_MISC_IRQ_BASE - 1));
-+	ar231x_write_reg(AR531X_IMR, imr);
-+}
-+
-+/* Disable the specified AR531X_MISC_IRQ interrupt */
-+static void
-+ar5312_misc_intr_disable(struct irq_data *d)
-+{
-+	unsigned int imr;
-+
-+	imr = ar231x_read_reg(AR531X_IMR);
-+	imr &= ~(1 << (d->irq - AR531X_MISC_IRQ_BASE - 1));
-+	ar231x_write_reg(AR531X_IMR, imr);
-+	ar231x_read_reg(AR531X_IMR); /* flush write buffer */
-+}
-+
-+static struct irq_chip ar5312_misc_intr_controller = {
-+	.name     = "AR5312-MISC",
-+	.irq_mask     = ar5312_misc_intr_disable,
-+	.irq_unmask   = ar5312_misc_intr_enable,
-+};
-+
-+
-+static irqreturn_t ar5312_ahb_proc_handler(int cpl, void *dev_id)
-+{
-+	u32 proc1 = ar231x_read_reg(AR531X_PROC1);
-+	u32 procAddr = ar231x_read_reg(AR531X_PROCADDR); /* clears error state */
-+	u32 dma1 = ar231x_read_reg(AR531X_DMA1);
-+	u32 dmaAddr = ar231x_read_reg(AR531X_DMAADDR);   /* clears error state */
-+
-+	printk("AHB interrupt: PROCADDR=0x%8.8x  PROC1=0x%8.8x  DMAADDR=0x%8.8x  DMA1=0x%8.8x\n",
-+			procAddr, proc1, dmaAddr, dma1);
-+
-+	machine_restart("AHB error"); /* Catastrophic failure */
-+	return IRQ_HANDLED;
-+}
-+
-+
-+static struct irqaction ar5312_ahb_proc_interrupt  = {
-+	.handler = ar5312_ahb_proc_handler,
-+	.flags   = IRQF_DISABLED,
-+	.name    = "ar5312_ahb_proc_interrupt",
-+};
-+
-+
-+static struct irqaction cascade  = {
-+	.handler = no_action,
-+	.flags   = IRQF_DISABLED,
-+	.name    = "cascade",
-+};
-+
-+void __init ar5312_irq_init(void)
-+{
-+	int i;
-+
-+	if (!is_5312())
-+		return;
-+
-+	ar231x_irq_dispatch = ar5312_irq_dispatch;
-+	for (i = 0; i < AR531X_MISC_IRQ_COUNT; i++) {
-+		int irq = AR531X_MISC_IRQ_BASE + i;
-+		irq_set_chip_and_handler(irq, &ar5312_misc_intr_controller,
-+			handle_level_irq);
-+	}
-+	setup_irq(AR531X_MISC_IRQ_AHB_PROC, &ar5312_ahb_proc_interrupt);
-+	setup_irq(AR5312_IRQ_MISC_INTRS, &cascade);
-+}
-+
-+const struct ar231x_gpiodev ar5312_gpiodev;
-+
-+static u32
-+ar5312_gpio_get_output(void)
-+{
-+	u32 reg;
-+	reg = ~(ar231x_read_reg(AR531X_GPIO_CR));
-+	reg &= ar5312_gpiodev.valid_mask;
-+	return reg;
-+}
-+
-+static u32
-+ar5312_gpio_set_output(u32 mask, u32 val)
-+{
-+	u32 reg;
-+
-+	reg = ar231x_read_reg(AR531X_GPIO_CR);
-+	reg |= mask;
-+	reg &= ~val;
-+	ar231x_write_reg(AR531X_GPIO_CR, reg);
-+	return reg;
-+}
-+
-+static u32
-+ar5312_gpio_get(void)
-+{
-+	u32 reg;
-+	reg = ar231x_read_reg(AR531X_GPIO_DI);
-+	reg &= ar5312_gpiodev.valid_mask;
-+	return reg;
-+}
-+
-+static u32
-+ar5312_gpio_set(u32 mask, u32 value)
-+{
-+	u32 reg;
-+	reg = ar231x_read_reg(AR531X_GPIO_DO);
-+	reg &= ~mask;
-+	reg |= value;
-+	ar231x_write_reg(AR531X_GPIO_DO, reg);
-+	return reg;
-+}
-+
-+const struct ar231x_gpiodev ar5312_gpiodev = {
-+	.valid_mask = (1 << 8) - 1,
-+	.get_output = ar5312_gpio_get_output,
-+	.set_output = ar5312_gpio_set_output,
-+	.get = ar5312_gpio_get,
-+	.set = ar5312_gpio_set,
-+};
-+
-+static struct physmap_flash_data ar5312_flash_data = {
-+	.width = 2,
-+};
-+
-+static struct resource ar5312_flash_resource = {
-+	.start = AR531X_FLASH,
-+	.end = AR531X_FLASH + 0x800000 - 1,
-+	.flags = IORESOURCE_MEM,
-+};
-+
-+static struct ar231x_eth ar5312_eth0_data = {
-+	.reset_base = AR531X_RESET,
-+	.reset_mac = AR531X_RESET_ENET0,
-+	.reset_phy = AR531X_RESET_EPHY0,
-+	.phy_base = KSEG1ADDR(AR531X_ENET0),
-+	.config = &ar231x_board,
-+};
-+
-+static struct ar231x_eth ar5312_eth1_data = {
-+	.reset_base = AR531X_RESET,
-+	.reset_mac = AR531X_RESET_ENET1,
-+	.reset_phy = AR531X_RESET_EPHY1,
-+	.phy_base = KSEG1ADDR(AR531X_ENET1),
-+	.config = &ar231x_board,
-+};
-+
-+static struct platform_device ar5312_physmap_flash = {
-+	.name = "physmap-flash",
-+	.id = 0,
-+	.dev.platform_data = &ar5312_flash_data,
-+	.resource = &ar5312_flash_resource,
-+	.num_resources = 1,
-+};
-+
-+#ifdef CONFIG_LEDS_GPIO
-+static struct gpio_led ar5312_leds[] = {
-+	{ .name = "wlan", .gpio = 0, .active_low = 1, },
-+};
-+
-+static const struct gpio_led_platform_data ar5312_led_data = {
-+	.num_leds = ARRAY_SIZE(ar5312_leds),
-+	.leds = (void *) ar5312_leds,
-+};
-+
-+static struct platform_device ar5312_gpio_leds = {
-+	.name = "leds-gpio",
-+	.id = -1,
-+	.dev.platform_data = (void *) &ar5312_led_data,
-+};
-+#endif
-+
-+/*
-+ * NB: This mapping size is larger than the actual flash size,
-+ * but this shouldn't be a problem here, because the flash
-+ * will simply be mapped multiple times.
-+ */
-+static char __init *ar5312_flash_limit(void)
-+{
-+	u32 ctl;
-+	/*
-+	 * Configure flash bank 0.
-+	 * Assume 8M window size. Flash will be aliased if it's smaller
-+	 */
-+	ctl = FLASHCTL_E |
-+		FLASHCTL_AC_8M |
-+		FLASHCTL_RBLE |
-+		(0x01 << FLASHCTL_IDCY_S) |
-+		(0x07 << FLASHCTL_WST1_S) |
-+		(0x07 << FLASHCTL_WST2_S) |
-+		(ar231x_read_reg(AR531X_FLASHCTL0) & FLASHCTL_MW);
-+
-+	ar231x_write_reg(AR531X_FLASHCTL0, ctl);
-+
-+	/* Disable other flash banks */
-+	ar231x_write_reg(AR531X_FLASHCTL1,
-+		ar231x_read_reg(AR531X_FLASHCTL1) & ~(FLASHCTL_E | FLASHCTL_AC));
-+
-+	ar231x_write_reg(AR531X_FLASHCTL2,
-+		ar231x_read_reg(AR531X_FLASHCTL2) & ~(FLASHCTL_E | FLASHCTL_AC));
-+
-+	return (char *) KSEG1ADDR(AR531X_FLASH + 0x800000);
-+}
-+
-+int __init ar5312_init_devices(void)
-+{
-+	struct ar231x_boarddata *config;
-+	u32 fctl = 0;
-+	const u8 *radio;
-+	u8 *c;
-+
-+	if (!is_5312())
-+		return 0;
-+
-+	/* Locate board/radio config data */
-+	ar231x_find_config(ar5312_flash_limit());
-+	config = ar231x_board.config;
-+
-+
-+	/*
-+	 * Chip IDs and hardware detection for some Atheros
-+	 * models are really broken!
-+	 *
-+	 * Atheros uses a disabled WMAC0 and Silicon ID of AR5312
-+	 * as indication for AR2312, which is otherwise
-+	 * indistinguishable from the real AR5312.
-+	 */
-+	if (ar231x_board.radio) {
-+		radio = ar231x_board.radio + AR531X_RADIO_MASK_OFF;
-+		if ((*((const u32 *) radio) & AR531X_RADIO0_MASK) == 0)
-+			config->flags |= BD_ISCASPER;
-+	} else
-+		radio = NULL;
-+
-+	/* AR2313 has CPU minor rev. 10 */
-+	if ((current_cpu_data.processor_id & 0xff) == 0x0a)
-+		ar231x_devtype = DEV_TYPE_AR2313;
-+
-+	/* AR2312 shares the same Silicon ID as AR5312 */
-+	else if (config->flags & BD_ISCASPER)
-+		ar231x_devtype = DEV_TYPE_AR2312;
-+
-+	/* Everything else is probably AR5312 or compatible */
-+	else
-+		ar231x_devtype = DEV_TYPE_AR5312;
-+
-+	/* fixup flash width */
-+	fctl = ar231x_read_reg(AR531X_FLASHCTL) & FLASHCTL_MW;
-+	switch (fctl) {
-+	case FLASHCTL_MWx16:
-+		ar5312_flash_data.width = 2;
-+		break;
-+	case FLASHCTL_MWx8:
-+	default:
-+		ar5312_flash_data.width = 1;
-+		break;
-+	}
-+
-+	platform_device_register(&ar5312_physmap_flash);
-+
-+#ifdef CONFIG_LEDS_GPIO
-+	ar5312_leds[0].gpio = config->sysLedGpio;
-+	platform_device_register(&ar5312_gpio_leds);
-+#endif
-+
-+	/* Fix up MAC addresses if necessary */
-+	if (!memcmp(config->enet0_mac, "\xff\xff\xff\xff\xff\xff", 6))
-+		memcpy(config->enet0_mac, config->enet1_mac, 6);
-+
-+	/* If ENET0 and ENET1 have the same mac address,
-+	 * increment the one from ENET1 */
-+	if (memcmp(config->enet0_mac, config->enet1_mac, 6) == 0) {
-+		c = config->enet1_mac + 5;
-+		while ((c >= config->enet1_mac) && !(++(*c)))
-+			c--;
-+	}
-+
-+	switch(ar231x_devtype) {
-+	case DEV_TYPE_AR5312:
-+		ar5312_eth0_data.macaddr = config->enet0_mac;
-+		ar231x_add_ethernet(0, KSEG1ADDR(AR531X_ENET0),
-+			AR5312_IRQ_ENET0_INTRS, &ar5312_eth0_data);
-+
-+		ar5312_eth1_data.macaddr = config->enet1_mac;
-+		ar231x_add_ethernet(1, KSEG1ADDR(AR531X_ENET1),
-+			AR5312_IRQ_ENET1_INTRS, &ar5312_eth1_data);
-+
-+		if (!ar231x_board.radio)
-+			return 0;
-+
-+		if ((*((u32 *) radio) & AR531X_RADIO0_MASK) &&
-+		    (config->flags & BD_WLAN0))
-+			ar231x_add_wmac(0, AR531X_WLAN0,
-+				AR5312_IRQ_WLAN0_INTRS);
-+
-+		break;
-+	/*
-+	 * AR2312/3 ethernet uses the PHY of ENET0, but the MAC
-+	 * of ENET1. Atheros calls it 'twisted' for a reason :)
-+	 */
-+	case DEV_TYPE_AR2312:
-+	case DEV_TYPE_AR2313:
-+		ar5312_eth1_data.phy_base = ar5312_eth0_data.phy_base;
-+		ar5312_eth1_data.reset_phy = ar5312_eth0_data.reset_phy;
-+		ar5312_eth1_data.macaddr = config->enet0_mac;
-+		ar231x_add_ethernet(0, KSEG1ADDR(AR531X_ENET1),
-+			AR5312_IRQ_ENET1_INTRS, &ar5312_eth1_data);
-+
-+		if (!ar231x_board.radio)
-+			return 0;
-+		break;
-+	default:
-+		break;
-+	}
-+
-+	if ((*((u32 *) radio) & AR531X_RADIO1_MASK) &&
-+	    (config->flags & BD_WLAN1))
-+		ar231x_add_wmac(1, AR531X_WLAN1,
-+			AR5312_IRQ_WLAN1_INTRS);
-+
-+	return 0;
-+}
-+
-+
-+static void ar5312_restart(char *command)
-+{
-+	/* reset the system */
-+	local_irq_disable();
-+	while(1) {
-+		ar231x_write_reg(AR531X_RESET, AR531X_RESET_SYSTEM);
-+	}
-+}
-+
-+
-+/*
-+ * This table is indexed by bits 5..4 of the CLOCKCTL1 register
-+ * to determine the predevisor value.
-+ */
-+static int __initdata CLOCKCTL1_PREDIVIDE_TABLE[4] = { 1, 2, 4, 5 };
-+
-+
-+static int __init
-+ar5312_cpu_frequency(void)
-+{
-+	unsigned int result;
-+	unsigned int predivide_mask, predivide_shift;
-+	unsigned int multiplier_mask, multiplier_shift;
-+	unsigned int clockCtl1, preDivideSelect, preDivisor, multiplier;
-+	unsigned int doubler_mask;
-+	u16 devid;
-+
-+	/* Trust the bootrom's idea of cpu frequency. */
-+	if ((result = ar231x_read_reg(AR5312_SCRATCH)))
-+		return result;
-+
-+	devid = ar231x_read_reg(AR531X_REV);
-+	devid &= AR531X_REV_MAJ;
-+	devid >>= AR531X_REV_MAJ_S;
-+	if (devid == AR531X_REV_MAJ_AR2313) {
-+		predivide_mask = AR2313_CLOCKCTL1_PREDIVIDE_MASK;
-+		predivide_shift = AR2313_CLOCKCTL1_PREDIVIDE_SHIFT;
-+		multiplier_mask = AR2313_CLOCKCTL1_MULTIPLIER_MASK;
-+		multiplier_shift = AR2313_CLOCKCTL1_MULTIPLIER_SHIFT;
-+		doubler_mask = AR2313_CLOCKCTL1_DOUBLER_MASK;
-+	} else { /* AR5312 and AR2312 */
-+		predivide_mask = AR5312_CLOCKCTL1_PREDIVIDE_MASK;
-+		predivide_shift = AR5312_CLOCKCTL1_PREDIVIDE_SHIFT;
-+		multiplier_mask = AR5312_CLOCKCTL1_MULTIPLIER_MASK;
-+		multiplier_shift = AR5312_CLOCKCTL1_MULTIPLIER_SHIFT;
-+		doubler_mask = AR5312_CLOCKCTL1_DOUBLER_MASK;
-+	}
-+
-+	/*
-+	 * Clocking is derived from a fixed 40MHz input clock.
-+	 *
-+	 *  cpuFreq = InputClock * MULT (where MULT is PLL multiplier)
-+	 *  sysFreq = cpuFreq / 4	   (used for APB clock, serial,
-+	 *							   flash, Timer, Watchdog Timer)
-+	 *
-+	 *  cntFreq = cpuFreq / 2	   (use for CPU count/compare)
-+	 *
-+	 * So, for example, with a PLL multiplier of 5, we have
-+	 *
-+	 *  cpuFreq = 200MHz
-+	 *  sysFreq = 50MHz
-+	 *  cntFreq = 100MHz
-+	 *
-+	 * We compute the CPU frequency, based on PLL settings.
-+	 */
-+
-+	clockCtl1 = ar231x_read_reg(AR5312_CLOCKCTL1);
-+	preDivideSelect = (clockCtl1 & predivide_mask) >> predivide_shift;
-+	preDivisor = CLOCKCTL1_PREDIVIDE_TABLE[preDivideSelect];
-+	multiplier = (clockCtl1 & multiplier_mask) >> multiplier_shift;
-+
-+	if (clockCtl1 & doubler_mask) {
-+		multiplier = multiplier << 1;
-+	}
-+	return (40000000 / preDivisor) * multiplier;
-+}
-+
-+static inline int
-+ar5312_sys_frequency(void)
-+{
-+	return ar5312_cpu_frequency() / 4;
-+}
-+
-+void __init
-+ar5312_time_init(void)
-+{
-+	if (!is_5312())
-+		return;
-+
-+	mips_hpt_frequency = ar5312_cpu_frequency() / 2;
-+}
-+
-+
-+void __init
-+ar5312_prom_init(void)
-+{
-+	u32 memsize, memcfg, bank0AC, bank1AC;
-+	u32 devid;
-+
-+	if (!is_5312())
-+		return;
-+
-+	/* Detect memory size */
-+	memcfg = ar231x_read_reg(AR531X_MEM_CFG1);
-+	bank0AC = (memcfg & MEM_CFG1_AC0) >> MEM_CFG1_AC0_S;
-+	bank1AC = (memcfg & MEM_CFG1_AC1) >> MEM_CFG1_AC1_S;
-+	memsize = (bank0AC ? (1 << (bank0AC+1)) : 0)
-+	        + (bank1AC ? (1 << (bank1AC+1)) : 0);
-+	memsize <<= 20;
-+	add_memory_region(0, memsize, BOOT_MEM_RAM);
-+
-+	devid = ar231x_read_reg(AR531X_REV);
-+	devid >>= AR531X_REV_WMAC_MIN_S;
-+	devid &= AR531X_REV_CHIP;
-+	ar231x_board.devid = (u16) devid;
-+	ar231x_gpiodev = &ar5312_gpiodev;
-+}
-+
-+void __init
-+ar5312_plat_setup(void)
-+{
-+	if (!is_5312())
-+		return;
-+
-+	/* Clear any lingering AHB errors */
-+	ar231x_read_reg(AR531X_PROCADDR);
-+	ar231x_read_reg(AR531X_DMAADDR);
-+	ar231x_write_reg(AR531X_WD_CTRL, AR531X_WD_CTRL_IGNORE_EXPIRATION);
-+
-+	_machine_restart = ar5312_restart;
-+	ar231x_serial_setup(KSEG1ADDR(AR531X_UART0), ar5312_sys_frequency());
-+}
-+
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/ar5312.h linux-2.6.39-rc7/arch/mips/ar231x/ar5312.h
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/ar5312.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/ar5312.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,38 @@
-+#ifndef __AR5312_H
-+#define __AR5312_H
-+
-+#ifdef CONFIG_ATHEROS_AR5312
-+
-+extern void ar5312_irq_init(void);
-+extern int ar5312_init_devices(void);
-+extern void ar5312_prom_init(void);
-+extern void ar5312_plat_setup(void);
-+extern void ar5312_time_init(void);
-+extern void ar5312_time_init(void);
-+
-+#else
-+
-+static inline void ar5312_irq_init(void)
-+{
-+}
-+
-+static inline int ar5312_init_devices(void)
-+{
-+	return 0;
-+}
-+
-+static inline void ar5312_prom_init(void)
-+{
-+}
-+
-+static inline void ar5312_plat_setup(void)
-+{
-+}
-+
-+static inline void ar5312_time_init(void)
-+{
-+}
-+
-+#endif
-+
-+#endif
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/board.c linux-2.6.39-rc7/arch/mips/ar231x/board.c
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/board.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/board.c	2011-05-15 22:16:11.000000000 +0200
-@@ -0,0 +1,261 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2003 Atheros Communications, Inc.,  All Rights Reserved.
-+ * Copyright (C) 2006 FON Technology, SL.
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
-+ */
-+
-+#include <generated/autoconf.h>
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/types.h>
-+#include <linux/string.h>
-+#include <linux/platform_device.h>
-+#include <linux/kernel.h>
-+#include <linux/random.h>
-+#include <linux/etherdevice.h>
-+#include <asm/irq_cpu.h>
-+#include <asm/reboot.h>
-+#include <asm/io.h>
-+
-+#include <ar231x_platform.h>
-+#include "devices.h"
-+#include "ar5312.h"
-+#include "ar2315.h"
-+
-+void (*ar231x_irq_dispatch)(void);
-+
-+static inline bool
-+check_radio_magic(u8 *addr)
-+{
-+	addr += 0x7a; /* offset for flash magic */
-+	if ((addr[0] == 0x5a) && (addr[1] == 0xa5)) {
-+		return 1;
-+	}
-+	return 0;
-+}
-+
-+static inline bool
-+check_board_data(u8 *flash_limit, u8 *addr, bool broken)
-+{
-+	/* config magic found */
-+	if (*((u32 *)addr) == AR531X_BD_MAGIC)
-+		return 1;
-+
-+	if (!broken)
-+		return 0;
-+
-+	if (check_radio_magic(addr + 0xf8))
-+		ar231x_board.radio = addr + 0xf8;
-+	if ((addr < flash_limit + 0x10000) &&
-+	     check_radio_magic(addr + 0x10000))
-+		ar231x_board.radio = addr + 0x10000;
-+
-+	if (ar231x_board.radio) {
-+		/* broken board data detected, use radio data to find the offset,
-+		 * user will fix this */
-+		return 1;
-+	}
-+	return 0;
-+}
-+
-+static u8 *
-+find_board_config(u8 *flash_limit, bool broken)
-+{
-+	u8 *addr;
-+	int found = 0;
-+
-+	for (addr = flash_limit - 0x1000;
-+		addr >= flash_limit - 0x30000;
-+		addr -= 0x1000) {
-+
-+		if (check_board_data(flash_limit, addr, broken)) {
-+			found = 1;
-+			break;
-+		}
-+	}
-+
-+	if (!found)
-+		addr = NULL;
-+
-+	return addr;
-+}
-+
-+static u8 *
-+find_radio_config(u8 *flash_limit, u8 *board_config)
-+{
-+	int found;
-+	u8 *radio_config;
-+
-+	/*
-+	 * Now find the start of Radio Configuration data, using heuristics:
-+	 * Search forward from Board Configuration data by 0x1000 bytes
-+	 * at a time until we find non-0xffffffff.
-+	 */
-+	found = 0;
-+	for (radio_config = board_config + 0x1000;
-+	     (radio_config < flash_limit);
-+	     radio_config += 0x1000) {
-+		if ((*(u32 *)radio_config != 0xffffffff) &&
-+		    check_radio_magic(radio_config)) {
-+			found = 1;
-+			break;
-+		}
-+	}
-+
-+	/* AR2316 relocates radio config to new location */
-+	if (!found) {
-+	    for (radio_config = board_config + 0xf8;
-+			(radio_config < flash_limit - 0x1000 + 0xf8);
-+			 radio_config += 0x1000) {
-+			if ((*(u32 *)radio_config != 0xffffffff) &&
-+				check_radio_magic(radio_config)) {
-+				found = 1;
-+				break;
-+			}
-+	    }
-+	}
-+
-+	if (!found) {
-+		printk("Could not find Radio Configuration data\n");
-+		radio_config = 0;
-+	}
-+
-+	return (u8 *) radio_config;
-+}
-+
-+int __init
-+ar231x_find_config(u8 *flash_limit)
-+{
-+	struct ar231x_boarddata *config;
-+	unsigned int rcfg_size;
-+	int broken_boarddata = 0, i, tmp;
-+	u8 *bcfg, *rcfg;
-+	u8 *board_data;
-+	u8 *radio_data;
-+	u32 offset;
-+
-+	ar231x_board.config = NULL;
-+	ar231x_board.radio = NULL;
-+	/* Copy the board and radio data to RAM, because accessing the mapped
-+	 * memory of the flash directly after booting is not safe */
-+
-+	/* Try to find valid board and radio data */
-+	bcfg = find_board_config(flash_limit, false);
-+
-+	/* If that fails, try to at least find valid radio data */
-+	if (!bcfg) {
-+		bcfg = find_board_config(flash_limit, true);
-+		broken_boarddata = 1;
-+	}
-+
-+	if (!bcfg) {
-+		printk(KERN_WARNING "WARNING: No board configuration data found!\n");
-+		return -ENODEV;
-+	}
-+
-+	board_data = kzalloc(BOARD_CONFIG_BUFSZ, GFP_KERNEL);
-+	ar231x_board.config = (struct ar231x_boarddata *) board_data;
-+	memcpy(board_data, bcfg, 0x100);
-+	if (broken_boarddata) {
-+		printk(KERN_WARNING "WARNING: broken board data detected\n");
-+		config = ar231x_board.config;
-+		if (!memcmp(config->enet0_mac, "\x00\x00\x00\x00\x00\x00", 6)) {
-+			printk(KERN_INFO "Fixing up empty mac addresses\n");
-+			config->resetConfigGpio = 0xffff;
-+			config->sysLedGpio = 0xffff;
-+			random_ether_addr(config->wlan0_mac);
-+			config->wlan0_mac[0] &= ~0x06;
-+			random_ether_addr(config->enet0_mac);
-+			random_ether_addr(config->enet1_mac);
-+		}
-+	}
-+
-+
-+	/* Radio config starts 0x100 bytes after board config, regardless
-+	 * of what the physical layout on the flash chip looks like */
-+
-+	if (ar231x_board.radio)
-+		rcfg = (u8 *) ar231x_board.radio;
-+	else
-+		rcfg = find_radio_config(flash_limit, bcfg);
-+
-+	if (!rcfg)
-+		return -ENODEV;
-+
-+	radio_data = board_data + 0x100 + ((rcfg - bcfg) & 0xfff);
-+	ar231x_board.radio = radio_data;
-+	offset = radio_data - board_data;
-+	printk(KERN_INFO "Radio config found at offset 0x%x(0x%x)\n", rcfg - bcfg, offset);
-+	rcfg_size = BOARD_CONFIG_BUFSZ - offset;
-+	memcpy(radio_data, rcfg, rcfg_size);
-+
-+        for (tmp = 0xff, i = 0; i < ETH_ALEN; i++) 
-+                tmp &= radio_data[i + 0x1d * 2]; 
-+        if (tmp == 0xff) { 
-+                 u16 *eep = (u16 *)radio_data, *bcfgs = (u16 *)bcfg; 
-+                 printk(KERN_INFO "Radio MAC is blank; using board-data\n"); 
-+                 eep[0x1f] = bcfgs[0x30]; 
-+                 eep[0x1e] = bcfgs[0x34]; 
-+                 eep[0x1d] = bcfgs[0x32]; 
-+        } 
-+
-+	return 0;
-+}
-+
-+static void
-+ar231x_halt(void)
-+{
-+	local_irq_disable();
-+	while (1);
-+}
-+
-+void __init
-+plat_mem_setup(void)
-+{
-+	_machine_halt = ar231x_halt;
-+	pm_power_off = ar231x_halt;
-+
-+	ar5312_plat_setup();
-+	ar2315_plat_setup();
-+
-+	/* Disable data watchpoints */
-+	write_c0_watchlo0(0);
-+}
-+
-+
-+asmlinkage void
-+plat_irq_dispatch(void)
-+{
-+	ar231x_irq_dispatch();
-+}
-+
-+void __init
-+plat_time_init(void)
-+{
-+	ar5312_time_init();
-+	ar2315_time_init();
-+}
-+
-+unsigned int __cpuinit
-+get_c0_compare_int(void)
-+{
-+	return CP0_LEGACY_COMPARE_IRQ;
-+}
-+
-+void __init
-+arch_init_irq(void)
-+{
-+	clear_c0_status(ST0_IM);
-+	mips_cpu_irq_init();
-+
-+	/* Initialize interrupt controllers */
-+	ar5312_irq_init();
-+	ar2315_irq_init();
-+}
-+
-+
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/devices.c linux-2.6.39-rc7/arch/mips/ar231x/devices.c
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/devices.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/devices.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,175 @@
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/serial.h>
-+#include <linux/serial_core.h>
-+#include <linux/serial_8250.h>
-+#include <linux/platform_device.h>
-+#include <ar231x_platform.h>
-+#include <ar231x.h>
-+#include "devices.h"
-+#include "ar5312.h"
-+#include "ar2315.h"
-+
-+struct ar231x_board_config ar231x_board;
-+int ar231x_devtype = DEV_TYPE_UNKNOWN;
-+const struct ar231x_gpiodev *ar231x_gpiodev;
-+EXPORT_SYMBOL(ar231x_gpiodev);
-+
-+static struct resource ar231x_eth0_res[] = {
-+	{
-+		.name = "eth0_membase",
-+		.flags = IORESOURCE_MEM,
-+	},
-+	{
-+		.name = "eth0_irq",
-+		.flags = IORESOURCE_IRQ,
-+	}
-+};
-+
-+static struct resource ar231x_eth1_res[] = {
-+	{
-+		.name = "eth1_membase",
-+		.flags = IORESOURCE_MEM,
-+	},
-+	{
-+		.name = "eth1_irq",
-+		.flags = IORESOURCE_IRQ,
-+	}
-+};
-+
-+static struct platform_device ar231x_eth[] = {
-+	{
-+		.id = 0,
-+		.name = "ar231x-eth",
-+		.resource = ar231x_eth0_res,
-+		.num_resources = ARRAY_SIZE(ar231x_eth0_res)
-+	},
-+	{
-+		.id = 1,
-+		.name = "ar231x-eth",
-+		.resource = ar231x_eth1_res,
-+		.num_resources = ARRAY_SIZE(ar231x_eth1_res)
-+	}
-+};
-+
-+static struct resource ar231x_wmac0_res[] = {
-+	{
-+		.name = "wmac0_membase",
-+		.flags = IORESOURCE_MEM,
-+	},
-+	{
-+		.name = "wmac0_irq",
-+		.flags = IORESOURCE_IRQ,
-+	}
-+};
-+
-+static struct resource ar231x_wmac1_res[] = {
-+	{
-+		.name = "wmac1_membase",
-+		.flags = IORESOURCE_MEM,
-+	},
-+	{
-+		.name = "wmac1_irq",
-+		.flags = IORESOURCE_IRQ,
-+	}
-+};
-+
-+
-+static struct platform_device ar231x_wmac[] = {
-+	{
-+		.id = 0,
-+		.name = "ar231x-wmac",
-+		.resource = ar231x_wmac0_res,
-+		.num_resources = ARRAY_SIZE(ar231x_wmac0_res),
-+		.dev.platform_data = &ar231x_board,
-+	},
-+	{
-+		.id = 1,
-+		.name = "ar231x-wmac",
-+		.resource = ar231x_wmac1_res,
-+		.num_resources = ARRAY_SIZE(ar231x_wmac1_res),
-+		.dev.platform_data = &ar231x_board,
-+	},
-+};
-+
-+static const char *devtype_strings[] = {
-+	[DEV_TYPE_AR5312] = "Atheros AR5312",
-+	[DEV_TYPE_AR2312] = "Atheros AR2312",
-+	[DEV_TYPE_AR2313] = "Atheros AR2313",
-+	[DEV_TYPE_AR2315] = "Atheros AR2315",
-+	[DEV_TYPE_AR2316] = "Atheros AR2316",
-+	[DEV_TYPE_AR2317] = "Atheros AR2317",
-+	[DEV_TYPE_UNKNOWN] = "Atheros (unknown)",
-+};
-+
-+const char *get_system_type(void)
-+{
-+	if ((ar231x_devtype >= ARRAY_SIZE(devtype_strings)) ||
-+		!devtype_strings[ar231x_devtype])
-+		return devtype_strings[DEV_TYPE_UNKNOWN];
-+	return devtype_strings[ar231x_devtype];
-+}
-+
-+
-+int __init
-+ar231x_add_ethernet(int nr, u32 base, int irq, void *pdata)
-+{
-+	struct resource *res;
-+
-+	ar231x_eth[nr].dev.platform_data = pdata;
-+	res = &ar231x_eth[nr].resource[0];
-+	res->start = base;
-+	res->end = base + 0x2000 - 1;
-+	res++;
-+	res->start = irq;
-+	res->end = irq;
-+	return platform_device_register(&ar231x_eth[nr]);
-+}
-+
-+void __init
-+ar231x_serial_setup(u32 mapbase, unsigned int uartclk)
-+{
-+	struct uart_port s;
-+
-+	memset(&s, 0, sizeof(s));
-+
-+	s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
-+	s.iotype = UPIO_MEM;
-+	s.irq = AR531X_MISC_IRQ_UART0;
-+	s.regshift = 2;
-+	s.mapbase = mapbase;
-+	s.uartclk = uartclk;
-+	s.membase = (void __iomem *)s.mapbase;
-+
-+	early_serial_setup(&s);
-+}
-+
-+int __init
-+ar231x_add_wmac(int nr, u32 base, int irq)
-+{
-+	struct resource *res;
-+
-+	ar231x_wmac[nr].dev.platform_data = &ar231x_board;
-+	res = &ar231x_wmac[nr].resource[0];
-+	res->start = base;
-+	res->end = base + 0x10000 - 1;
-+	res++;
-+	res->start = irq;
-+	res->end = irq;
-+	return platform_device_register(&ar231x_wmac[nr]);
-+}
-+
-+static int __init ar231x_register_devices(void)
-+{
-+	static struct resource res = {
-+		.start = 0xFFFFFFFF,
-+	};
-+
-+	platform_device_register_simple("GPIODEV", 0, &res, 1);
-+	ar5312_init_devices();
-+	ar2315_init_devices();
-+
-+	return 0;
-+}
-+
-+device_initcall(ar231x_register_devices);
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/devices.h linux-2.6.39-rc7/arch/mips/ar231x/devices.h
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/devices.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/devices.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,37 @@
-+#ifndef __AR231X_DEVICES_H
-+#define __AR231X_DEVICES_H
-+
-+enum {
-+	/* handled by ar5312.c */
-+	DEV_TYPE_AR2312,
-+	DEV_TYPE_AR2313,
-+	DEV_TYPE_AR5312,
-+
-+	/* handled by ar2315.c */
-+	DEV_TYPE_AR2315,
-+	DEV_TYPE_AR2316,
-+	DEV_TYPE_AR2317,
-+
-+	DEV_TYPE_UNKNOWN
-+};
-+
-+extern int ar231x_devtype;
-+extern struct ar231x_board_config ar231x_board;
-+extern asmlinkage void (*ar231x_irq_dispatch)(void);
-+
-+extern int ar231x_find_config(u8 *flash_limit);
-+extern void ar231x_serial_setup(u32 mapbase, unsigned int uartclk);
-+extern int ar231x_add_wmac(int nr, u32 base, int irq);
-+extern int ar231x_add_ethernet(int nr, u32 base, int irq, void *pdata);
-+
-+static inline bool is_2315(void)
-+{
-+	return (current_cpu_data.cputype == CPU_4KEC);
-+}
-+
-+static inline bool is_5312(void)
-+{
-+	return !is_2315();
-+}
-+
-+#endif
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/early_printk.c linux-2.6.39-rc7/arch/mips/ar231x/early_printk.c
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/early_printk.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/early_printk.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,44 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
-+ */
-+
-+#include <linux/mm.h>
-+#include <linux/io.h>
-+#include <linux/serial_reg.h>
-+#include <asm/addrspace.h>
-+
-+#include <asm/mach-ar231x/ar2315_regs.h>
-+#include <asm/mach-ar231x/ar5312_regs.h>
-+#include "devices.h"
-+
-+static inline void prom_uart_wr(void __iomem *base, unsigned reg,
-+				unsigned char ch)
-+{
-+	__raw_writeb(ch, base + 4 * reg);
-+}
-+
-+static inline unsigned char prom_uart_rr(void __iomem *base, unsigned reg)
-+{
-+	return __raw_readb(base + 4 * reg);
-+}
-+
-+void prom_putchar(unsigned char ch)
-+{
-+	static void __iomem *base;
-+
-+	if (unlikely(base == NULL)) {
-+		if (is_2315())
-+			base = (void __iomem *)(KSEG1ADDR(AR2315_UART0));
-+		else
-+			base = (void __iomem *)(KSEG1ADDR(AR531X_UART0));
-+	}
-+
-+	while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0);
-+	prom_uart_wr(base, UART_TX, ch);
-+	while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0);
-+}
-+
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/pci.c linux-2.6.39-rc7/arch/mips/ar231x/pci.c
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/pci.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/pci.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,230 @@
-+/*
-+ * This program is free software; you can redistribute it and/or
-+ * modify it under the terms of the GNU General Public License
-+ * as published by the Free Software Foundation; either version 2
-+ * of the License, or (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
-+ */
-+
-+#include <linux/types.h>
-+#include <linux/pci.h>
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/mm.h>
-+#include <linux/spinlock.h>
-+#include <linux/delay.h>
-+#include <linux/irq.h>
-+#include <asm/bootinfo.h>
-+#include <asm/paccess.h>
-+#include <asm/irq_cpu.h>
-+#include <asm/io.h>
-+#include <ar231x_platform.h>
-+#include <ar231x.h>
-+#include <ar2315_regs.h>
-+#include "devices.h"
-+
-+#define AR531X_MEM_BASE    0x80800000UL
-+#define AR531X_MEM_SIZE    0x00ffffffUL
-+#define AR531X_IO_SIZE     0x00007fffUL
-+
-+static unsigned long configspace;
-+
-+static int config_access(int devfn, int where, int size, u32 *ptr, bool write)
-+{
-+	unsigned long flags;
-+	int func = PCI_FUNC(devfn);
-+	int dev = PCI_SLOT(devfn);
-+	u32 value = 0;
-+	int err = 0;
-+	u32 addr;
-+
-+	if (((dev != 0) && (dev != 3)) || (func > 2))
-+		return PCIBIOS_DEVICE_NOT_FOUND;
-+
-+	/* Select Configuration access */
-+	local_irq_save(flags);
-+	ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, 0, AR2315_PCIMISC_CFG_SEL);
-+	mb();
-+
-+	addr = (u32) configspace + (1 << (13 + dev)) + (func << 8) + where;
-+	if (size == 1)
-+		addr ^= 0x3;
-+	else if (size == 2)
-+		addr ^= 0x2;
-+
-+	if (write) {
-+		value = *ptr;
-+		if (size == 1)
-+			err = put_dbe(value, (u8 *) addr);
-+		else if (size == 2)
-+			err = put_dbe(value, (u16 *) addr);
-+		else if (size == 4)
-+			err = put_dbe(value, (u32 *) addr);
-+	} else {
-+		if (size == 1)
-+			err = get_dbe(value, (u8 *) addr);
-+		else if (size == 2)
-+			err = get_dbe(value, (u16 *) addr);
-+		else if (size == 4)
-+			err = get_dbe(value, (u32 *) addr);
-+		if (err)
-+			*ptr = 0xffffffff;
-+		else
-+			*ptr = value;
-+	}
-+
-+	/* Select Memory access */
-+	ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_CFG_SEL, 0);
-+	local_irq_restore(flags);
-+
-+	return (err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL);
-+}
-+
-+static int ar231x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * value)
-+{
-+	return config_access(devfn, where, size, value, 0);
-+}
-+
-+static int ar231x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
-+{
-+	return config_access(devfn, where, size, &value, 1);
-+}
-+
-+struct pci_ops ar231x_pci_ops = {
-+	.read	= ar231x_pci_read,
-+	.write	= ar231x_pci_write,
-+};
-+
-+static struct resource ar231x_mem_resource = {
-+	.name	= "AR531x PCI MEM",
-+	.start	= AR531X_MEM_BASE,
-+	.end	= AR531X_MEM_BASE + AR531X_MEM_SIZE - AR531X_IO_SIZE - 1 + 0x4000000,
-+	.flags	= IORESOURCE_MEM,
-+};
-+
-+static struct resource ar231x_io_resource = {
-+	.name	= "AR531x PCI I/O",
-+	.start	= AR531X_MEM_BASE + AR531X_MEM_SIZE - AR531X_IO_SIZE,
-+	.end	= AR531X_MEM_BASE + AR531X_MEM_SIZE - 1,
-+	.flags	= IORESOURCE_IO,
-+};
-+
-+struct pci_controller ar231x_pci_controller = {
-+	.pci_ops		= &ar231x_pci_ops,
-+	.mem_resource	= &ar231x_mem_resource,
-+	.io_resource	= &ar231x_io_resource,
-+	.mem_offset     = 0x00000000UL,
-+	.io_offset      = 0x00000000UL,
-+};
-+
-+int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+	return AR2315_IRQ_LCBUS_PCI;
-+}
-+
-+int pcibios_plat_dev_init(struct pci_dev *dev)
-+{
-+	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 5);
-+	pci_write_config_word(dev, 0x40, 0);
-+
-+	/* Clear any pending Abort or external Interrupts
-+	 * and enable interrupt processing */
-+	ar231x_mask_reg(AR2315_PCI_INTEN_REG, AR2315_PCI_INT_ENABLE, 0);
-+	ar231x_write_reg(AR2315_PCI_INT_STATUS, (AR2315_PCI_ABORT_INT | AR2315_PCI_EXT_INT));
-+	ar231x_write_reg(AR2315_PCI_INT_MASK, (AR2315_PCI_ABORT_INT | AR2315_PCI_EXT_INT));
-+	ar231x_mask_reg(AR2315_PCI_INTEN_REG, 0, AR2315_PCI_INT_ENABLE);
-+
-+	return 0;
-+}
-+
-+static void
-+ar2315_pci_fixup(struct pci_dev *dev)
-+{
-+	unsigned int devfn = dev->devfn;
-+
-+	if (dev->bus->number != 0)
-+		return;
-+
-+	/* Only fix up the PCI host settings */
-+	if ((PCI_SLOT(devfn) != 3) || (PCI_FUNC(devfn) != 0))
-+		return;
-+
-+	/* Fix up MBARs */
-+	pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, HOST_PCI_MBAR0);
-+	pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, HOST_PCI_MBAR1);
-+	pci_write_config_dword(dev, PCI_BASE_ADDRESS_2, HOST_PCI_MBAR2);
-+	pci_write_config_dword(dev, PCI_COMMAND,
-+		PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL |
-+		PCI_COMMAND_INVALIDATE | PCI_COMMAND_PARITY | PCI_COMMAND_SERR |
-+		PCI_COMMAND_FAST_BACK);
-+}
-+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, ar2315_pci_fixup);
-+
-+static int __init
-+ar2315_pci_init(void)
-+{
-+	u32 reg;
-+
-+	if (ar231x_devtype != DEV_TYPE_AR2315)
-+		return -ENODEV;
-+
-+	configspace = (unsigned long) ioremap_nocache(0x80000000, 1*1024*1024); /* Remap PCI config space */
-+	ar231x_pci_controller.io_map_base =
-+		(unsigned long) ioremap_nocache(AR531X_MEM_BASE + AR531X_MEM_SIZE, AR531X_IO_SIZE);
-+	set_io_port_base(ar231x_pci_controller.io_map_base); /* PCI I/O space */
-+
-+	reg = ar231x_mask_reg(AR2315_RESET, 0, AR2315_RESET_PCIDMA);
-+	msleep(10);
-+
-+	reg &= ~AR2315_RESET_PCIDMA;
-+	ar231x_write_reg(AR2315_RESET, reg);
-+	msleep(10);
-+
-+	ar231x_mask_reg(AR2315_ENDIAN_CTL, 0,
-+		AR2315_CONFIG_PCIAHB | AR2315_CONFIG_PCIAHB_BRIDGE);
-+
-+	ar231x_write_reg(AR2315_PCICLK, AR2315_PCICLK_PLLC_CLKM |
-+		(AR2315_PCICLK_IN_FREQ_DIV_6 << AR2315_PCICLK_DIV_S));
-+	ar231x_mask_reg(AR2315_AHB_ARB_CTL, 0, AR2315_ARB_PCI);
-+	ar231x_mask_reg(AR2315_IF_CTL, AR2315_IF_PCI_CLK_MASK | AR2315_IF_MASK,
-+		AR2315_IF_PCI | AR2315_IF_PCI_HOST | AR2315_IF_PCI_INTR |
-+		 (AR2315_IF_PCI_CLK_OUTPUT_CLK << AR2315_IF_PCI_CLK_SHIFT));
-+
-+	/* Reset the PCI bus by setting bits 5-4 in PCI_MCFG */
-+	ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_RST_MODE,
-+		AR2315_PCIRST_LOW);
-+	msleep(100);
-+
-+	/* Bring the PCI out of reset */
-+	ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_RST_MODE,
-+		AR2315_PCIRST_HIGH | AR2315_PCICACHE_DIS | 0x8);
-+
-+	ar231x_write_reg(AR2315_PCI_UNCACHE_CFG,
-+			0x1E | /* 1GB uncached */
-+			(1 << 5) | /* Enable uncached */
-+			(0x2 << 30) /* Base: 0x80000000 */
-+	);
-+	ar231x_read_reg(AR2315_PCI_UNCACHE_CFG);
-+
-+	msleep(500);
-+
-+	/* dirty hack - anyone with a datasheet that knows the memory map ? */
-+	ioport_resource.start = 0x10000000;
-+	ioport_resource.end = 0xffffffff;
-+	iomem_resource.start = 0x10000000;
-+	iomem_resource.end = 0xffffffff;
-+
-+	register_pci_controller(&ar231x_pci_controller);
-+
-+	return 0;
-+}
-+
-+arch_initcall(ar2315_pci_init);
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/prom.c linux-2.6.39-rc7/arch/mips/ar231x/prom.c
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/prom.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/prom.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,37 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright MontaVista Software Inc
-+ * Copyright (C) 2003 Atheros Communications, Inc.,  All Rights Reserved.
-+ * Copyright (C) 2006 FON Technology, SL.
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
-+ */
-+
-+/*
-+ * Prom setup file for ar531x
-+ */
-+
-+#include <linux/init.h>
-+#include <generated/autoconf.h>
-+#include <linux/kernel.h>
-+#include <linux/string.h>
-+#include <linux/mm.h>
-+#include <linux/bootmem.h>
-+
-+#include <asm/bootinfo.h>
-+#include <asm/addrspace.h>
-+#include "ar5312.h"
-+#include "ar2315.h"
-+
-+void __init prom_init(void)
-+{
-+	ar5312_prom_init();
-+	ar2315_prom_init();
-+}
-+
-+void __init prom_free_prom_memory(void)
-+{
-+}
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/ar231x/reset.c linux-2.6.39-rc7/arch/mips/ar231x/reset.c
---- linux-2.6.39-rc7.orig/arch/mips/ar231x/reset.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/ar231x/reset.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,161 @@
-+#include <linux/init.h>
-+#include <linux/module.h>
-+#include <linux/timer.h>
-+#include <linux/interrupt.h>
-+#include <linux/kobject.h>
-+#include <linux/workqueue.h>
-+#include <linux/skbuff.h>
-+#include <linux/netlink.h>
-+#include <net/sock.h>
-+#include <asm/uaccess.h>
-+#include <ar231x_platform.h>
-+#include <ar231x.h>
-+#include <gpio.h>
-+#include "devices.h"
-+
-+#define AR531X_RESET_GPIO_IRQ	(AR531X_GPIO_IRQ(ar231x_board.config->resetConfigGpio))
-+
-+struct event_t {
-+	struct work_struct wq;
-+	int set;
-+	unsigned long jiffies;
-+};
-+
-+static struct timer_list rst_button_timer;
-+static unsigned long seen;
-+
-+struct sock *uevent_sock = NULL;
-+EXPORT_SYMBOL_GPL(uevent_sock);
-+extern u64 uevent_next_seqnum(void);
-+
-+static int no_release_workaround = 1;
-+module_param(no_release_workaround, int, 0);
-+
-+static inline void
-+add_msg(struct sk_buff *skb, char *msg)
-+{
-+	char *scratch;
-+	scratch = skb_put(skb, strlen(msg) + 1);
-+	sprintf(scratch, msg);
-+}
-+
-+static void
-+hotplug_button(struct work_struct *wq)
-+{
-+	struct sk_buff *skb;
-+	struct event_t *event;
-+	size_t len;
-+	char *scratch, *s;
-+	char buf[128];
-+
-+	event = container_of(wq, struct event_t, wq);
-+	if (!uevent_sock)
-+		goto done;
-+
-+	/* allocate message with the maximum possible size */
-+	s = event->set ? "pressed" : "released";
-+	len = strlen(s) + 2;
-+	skb = alloc_skb(NLMSG_GOODSIZE, GFP_KERNEL);
-+	if (!skb)
-+		goto done;
-+
-+	/* add header */
-+	scratch = skb_put(skb, len);
-+	sprintf(scratch, "%s@",s);
-+
-+	/* copy keys to our continuous event payload buffer */
-+	add_msg(skb, "HOME=/");
-+	add_msg(skb, "PATH=/sbin:/bin:/usr/sbin:/usr/bin");
-+	add_msg(skb, "SUBSYSTEM=button");
-+	add_msg(skb, "BUTTON=reset");
-+	add_msg(skb, (event->set ? "ACTION=pressed" : "ACTION=released"));
-+	sprintf(buf, "SEEN=%ld", (event->jiffies - seen)/HZ);
-+	add_msg(skb, buf);
-+	snprintf(buf, 128, "SEQNUM=%llu", uevent_next_seqnum());
-+	add_msg(skb, buf);
-+
-+	NETLINK_CB(skb).dst_group = 1;
-+	netlink_broadcast(uevent_sock, skb, 0, 1, GFP_KERNEL);
-+
-+done:
-+	kfree(event);
-+}
-+
-+static void
-+reset_button_poll(unsigned long unused)
-+{
-+	struct event_t *event;
-+	int gpio = ~0;
-+
-+	if(!no_release_workaround)
-+		return;
-+
-+	gpio = ar231x_gpiodev->get();
-+	gpio &= (1 << (AR531X_RESET_GPIO_IRQ - AR531X_GPIO_IRQ_BASE));
-+	if(gpio) {
-+		rst_button_timer.expires = jiffies + (HZ / 4);
-+		add_timer(&rst_button_timer);
-+		return;
-+	}
-+
-+	event = (struct event_t *) kzalloc(sizeof(struct event_t), GFP_ATOMIC);
-+	if (!event)
-+		return;
-+
-+	event->set = 0;
-+	event->jiffies = jiffies;
-+	INIT_WORK(&event->wq, hotplug_button);
-+	schedule_work(&event->wq);
-+}
-+
-+static irqreturn_t
-+button_handler(int irq, void *dev_id)
-+{
-+	static int pressed = 0;
-+	struct event_t *event;
-+	u32 gpio = ~0;
-+
-+	event = (struct event_t *) kzalloc(sizeof(struct event_t), GFP_ATOMIC);
-+	if (!event)
-+		return IRQ_NONE;
-+
-+	pressed = !pressed;
-+
-+	gpio = ar231x_gpiodev->get() & (1 << (irq - AR531X_GPIO_IRQ_BASE));
-+
-+	event->set = gpio;
-+	if(!event->set)
-+		no_release_workaround = 0;
-+
-+	event->jiffies = jiffies;
-+
-+	INIT_WORK(&event->wq, hotplug_button);
-+	schedule_work(&event->wq);
-+
-+	seen = jiffies;
-+	if(event->set && no_release_workaround)
-+		mod_timer(&rst_button_timer, jiffies + (HZ / 4));
-+
-+	return IRQ_HANDLED;
-+}
-+
-+
-+static int __init
-+ar231x_init_reset(void)
-+{
-+	seen = jiffies;
-+
-+	if (ar231x_board.config->resetConfigGpio == 0xffff)
-+		return -ENODEV;
-+
-+	init_timer(&rst_button_timer);
-+	rst_button_timer.function = reset_button_poll;
-+	rst_button_timer.expires = jiffies + HZ / 50;
-+	add_timer(&rst_button_timer);
-+
-+	request_irq(AR531X_RESET_GPIO_IRQ, &button_handler, IRQF_SAMPLE_RANDOM, "ar231x_reset", NULL);
-+
-+	return 0;
-+}
-+
-+module_init(ar231x_init_reset);
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar2315_regs.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar2315_regs.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar2315_regs.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar2315_regs.h	2011-05-15 21:44:12.000000000 +0200
-@@ -0,0 +1,580 @@
-+/*
-+ * Register definitions for AR2315+
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2003 Atheros Communications, Inc.,  All Rights Reserved.
-+ * Copyright (C) 2006 FON Technology, SL.
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006-2008 Felix Fietkau <nbd@openwrt.org>
-+ */
-+
-+#ifndef __AR2315_REG_H
-+#define __AR2315_REG_H
-+
-+/*
-+ * IRQs
-+ */
-+#define AR2315_IRQ_MISC_INTRS   MIPS_CPU_IRQ_BASE+2 /* C0_CAUSE: 0x0400 */
-+#define AR2315_IRQ_WLAN0_INTRS  MIPS_CPU_IRQ_BASE+3 /* C0_CAUSE: 0x0800 */
-+#define AR2315_IRQ_ENET0_INTRS  MIPS_CPU_IRQ_BASE+4 /* C0_CAUSE: 0x1000 */
-+#define AR2315_IRQ_LCBUS_PCI    MIPS_CPU_IRQ_BASE+5 /* C0_CAUSE: 0x2000 */
-+#define AR2315_IRQ_WLAN0_POLL   MIPS_CPU_IRQ_BASE+6 /* C0_CAUSE: 0x4000 */
-+
-+/*
-+ * Address map
-+ */
-+#define AR2315_SPI_READ         0x08000000      /* SPI FLASH */
-+#define AR2315_WLAN0            0x10000000      /* Wireless MMR */
-+#define AR2315_PCI              0x10100000      /* PCI MMR */
-+#define AR2315_SDRAMCTL         0x10300000      /* SDRAM MMR */
-+#define AR2315_LOCAL            0x10400000      /* LOCAL BUS MMR */
-+#define AR2315_ENET0            0x10500000      /* ETHERNET MMR */
-+#define AR2315_DSLBASE          0x11000000      /* RESET CONTROL MMR */
-+#define AR2315_UART0            0x11100003      /* UART MMR */
-+#define AR2315_SPI              0x11300000      /* SPI FLASH MMR */
-+#define AR2315_PCIEXT           0x80000000      /* pci external */
-+
-+/*
-+ * Reset Register
-+ */
-+#define AR2315_COLD_RESET       (AR2315_DSLBASE + 0x0000)
-+
-+#define AR2315_RESET_COLD_AHB              0x00000001
-+#define AR2315_RESET_COLD_APB              0x00000002
-+#define AR2315_RESET_COLD_CPU              0x00000004
-+#define AR2315_RESET_COLD_CPUWARM          0x00000008
-+#define AR2315_RESET_SYSTEM                (RESET_COLD_CPU | RESET_COLD_APB | RESET_COLD_AHB)      /* full system */
-+#define AR2317_RESET_SYSTEM                0x00000010
-+
-+
-+#define AR2315_RESET            (AR2315_DSLBASE + 0x0004)
-+
-+#define AR2315_RESET_WARM_WLAN0_MAC        0x00000001      /* warm reset WLAN0 MAC */
-+#define AR2315_RESET_WARM_WLAN0_BB         0x00000002      /* warm reset WLAN0 BaseBand */
-+#define AR2315_RESET_MPEGTS_RSVD           0x00000004      /* warm reset MPEG-TS */
-+#define AR2315_RESET_PCIDMA                0x00000008      /* warm reset PCI ahb/dma */
-+#define AR2315_RESET_MEMCTL                0x00000010      /* warm reset memory controller */
-+#define AR2315_RESET_LOCAL                 0x00000020      /* warm reset local bus */
-+#define AR2315_RESET_I2C_RSVD              0x00000040      /* warm reset I2C bus */
-+#define AR2315_RESET_SPI                   0x00000080      /* warm reset SPI interface */
-+#define AR2315_RESET_UART0                 0x00000100      /* warm reset UART0 */
-+#define AR2315_RESET_IR_RSVD               0x00000200      /* warm reset IR interface */
-+#define AR2315_RESET_EPHY0                 0x00000400      /* cold reset ENET0 phy */
-+#define AR2315_RESET_ENET0                 0x00000800      /* cold reset ENET0 mac */
-+
-+/*
-+ * AHB master arbitration control
-+ */
-+#define AR2315_AHB_ARB_CTL      (AR2315_DSLBASE + 0x0008)
-+
-+#define AR2315_ARB_CPU                     0x00000001      /* CPU, default */
-+#define AR2315_ARB_WLAN                    0x00000002      /* WLAN */
-+#define AR2315_ARB_MPEGTS_RSVD             0x00000004      /* MPEG-TS */
-+#define AR2315_ARB_LOCAL                   0x00000008      /* LOCAL */
-+#define AR2315_ARB_PCI                     0x00000010      /* PCI */
-+#define AR2315_ARB_ETHERNET                0x00000020      /* Ethernet */
-+#define AR2315_ARB_RETRY                   0x00000100      /* retry policy, debug only */
-+
-+/*
-+ * Config Register
-+ */
-+#define AR2315_ENDIAN_CTL       (AR2315_DSLBASE + 0x000c)
-+
-+#define AR2315_CONFIG_AHB                  0x00000001      /* EC - AHB bridge endianess */
-+#define AR2315_CONFIG_WLAN                 0x00000002      /* WLAN byteswap */
-+#define AR2315_CONFIG_MPEGTS_RSVD          0x00000004      /* MPEG-TS byteswap */
-+#define AR2315_CONFIG_PCI                  0x00000008      /* PCI byteswap */
-+#define AR2315_CONFIG_MEMCTL               0x00000010      /* Memory controller endianess */
-+#define AR2315_CONFIG_LOCAL                0x00000020      /* Local bus byteswap */
-+#define AR2315_CONFIG_ETHERNET             0x00000040      /* Ethernet byteswap */
-+
-+#define AR2315_CONFIG_MERGE                0x00000200      /* CPU write buffer merge */
-+#define AR2315_CONFIG_CPU                  0x00000400      /* CPU big endian */
-+#define AR2315_CONFIG_PCIAHB               0x00000800
-+#define AR2315_CONFIG_PCIAHB_BRIDGE        0x00001000
-+#define AR2315_CONFIG_SPI                  0x00008000      /* SPI byteswap */
-+#define AR2315_CONFIG_CPU_DRAM             0x00010000
-+#define AR2315_CONFIG_CPU_PCI              0x00020000
-+#define AR2315_CONFIG_CPU_MMR              0x00040000
-+#define AR2315_CONFIG_BIG                  0x00000400
-+
-+
-+/*
-+ * NMI control
-+ */
-+#define AR2315_NMI_CTL          (AR2315_DSLBASE + 0x0010)
-+
-+#define AR2315_NMI_EN  1
-+
-+/*
-+ * Revision Register - Initial value is 0x3010 (WMAC 3.0, AR531X 1.0).
-+ */
-+#define AR2315_SREV             (AR2315_DSLBASE + 0x0014)
-+
-+#define AR2315_REV_MAJ                     0x00f0
-+#define AR2315_REV_MAJ_S                   4
-+#define AR2315_REV_MIN                     0x000f
-+#define AR2315_REV_MIN_S                   0
-+#define AR2315_REV_CHIP                    (AR2315_REV_MAJ|AR2315_REV_MIN)
-+
-+/*
-+ * Interface Enable
-+ */
-+#define AR2315_IF_CTL           (AR2315_DSLBASE + 0x0018)
-+
-+#define AR2315_IF_MASK                     0x00000007
-+#define AR2315_IF_DISABLED                 0
-+#define AR2315_IF_PCI                      1
-+#define AR2315_IF_TS_LOCAL                 2
-+#define AR2315_IF_ALL                      3   /* only for emulation with separate pins */
-+#define AR2315_IF_LOCAL_HOST               0x00000008
-+#define AR2315_IF_PCI_HOST                 0x00000010
-+#define AR2315_IF_PCI_INTR                 0x00000020
-+#define AR2315_IF_PCI_CLK_MASK             0x00030000
-+#define AR2315_IF_PCI_CLK_INPUT            0
-+#define AR2315_IF_PCI_CLK_OUTPUT_LOW       1
-+#define AR2315_IF_PCI_CLK_OUTPUT_CLK       2
-+#define AR2315_IF_PCI_CLK_OUTPUT_HIGH      3
-+#define AR2315_IF_PCI_CLK_SHIFT            16
-+
-+/*
-+ * APB Interrupt control
-+ */
-+
-+#define AR2315_ISR              (AR2315_DSLBASE + 0x0020)
-+#define AR2315_IMR              (AR2315_DSLBASE + 0x0024)
-+#define AR2315_GISR             (AR2315_DSLBASE + 0x0028)
-+
-+#define AR2315_ISR_UART0                   0x0001           /* high speed UART */
-+#define AR2315_ISR_I2C_RSVD                0x0002           /* I2C bus */
-+#define AR2315_ISR_SPI                     0x0004           /* SPI bus */
-+#define AR2315_ISR_AHB                     0x0008           /* AHB error */
-+#define AR2315_ISR_APB                     0x0010           /* APB error */
-+#define AR2315_ISR_TIMER                   0x0020           /* timer */
-+#define AR2315_ISR_GPIO                    0x0040           /* GPIO */
-+#define AR2315_ISR_WD                      0x0080           /* watchdog */
-+#define AR2315_ISR_IR_RSVD                 0x0100           /* IR */
-+
-+#define AR2315_GISR_MISC                   0x0001
-+#define AR2315_GISR_WLAN0                  0x0002
-+#define AR2315_GISR_MPEGTS_RSVD            0x0004
-+#define AR2315_GISR_LOCALPCI               0x0008
-+#define AR2315_GISR_WMACPOLL               0x0010
-+#define AR2315_GISR_TIMER                  0x0020
-+#define AR2315_GISR_ETHERNET               0x0040
-+
-+/*
-+ * Interrupt routing from IO to the processor IP bits
-+ * Define our inter mask and level
-+ */
-+#define AR2315_INTR_MISCIO      SR_IBIT3
-+#define AR2315_INTR_WLAN0       SR_IBIT4
-+#define AR2315_INTR_ENET0       SR_IBIT5
-+#define AR2315_INTR_LOCALPCI    SR_IBIT6
-+#define AR2315_INTR_WMACPOLL    SR_IBIT7
-+#define AR2315_INTR_COMPARE     SR_IBIT8
-+
-+/*
-+ * Timers
-+ */
-+#define AR2315_TIMER            (AR2315_DSLBASE + 0x0030)
-+#define AR2315_RELOAD           (AR2315_DSLBASE + 0x0034)
-+#define AR2315_WD               (AR2315_DSLBASE + 0x0038)
-+#define AR2315_WDC              (AR2315_DSLBASE + 0x003c)
-+
-+#define AR2315_WDC_IGNORE_EXPIRATION       0x00000000
-+#define AR2315_WDC_NMI                     0x00000001               /* NMI on watchdog */
-+#define AR2315_WDC_RESET                   0x00000002               /* reset on watchdog */
-+
-+/*
-+ * CPU Performance Counters
-+ */
-+#define AR2315_PERFCNT0         (AR2315_DSLBASE + 0x0048)
-+#define AR2315_PERFCNT1         (AR2315_DSLBASE + 0x004c)
-+
-+#define AR2315_PERF0_DATAHIT                0x0001  /* Count Data Cache Hits */
-+#define AR2315_PERF0_DATAMISS               0x0002  /* Count Data Cache Misses */
-+#define AR2315_PERF0_INSTHIT                0x0004  /* Count Instruction Cache Hits */
-+#define AR2315_PERF0_INSTMISS               0x0008  /* Count Instruction Cache Misses */
-+#define AR2315_PERF0_ACTIVE                 0x0010  /* Count Active Processor Cycles */
-+#define AR2315_PERF0_WBHIT                  0x0020  /* Count CPU Write Buffer Hits */
-+#define AR2315_PERF0_WBMISS                 0x0040  /* Count CPU Write Buffer Misses */
-+
-+#define AR2315_PERF1_EB_ARDY                0x0001  /* Count EB_ARdy signal */
-+#define AR2315_PERF1_EB_AVALID              0x0002  /* Count EB_AValid signal */
-+#define AR2315_PERF1_EB_WDRDY               0x0004  /* Count EB_WDRdy signal */
-+#define AR2315_PERF1_EB_RDVAL               0x0008  /* Count EB_RdVal signal */
-+#define AR2315_PERF1_VRADDR                 0x0010  /* Count valid read address cycles */
-+#define AR2315_PERF1_VWADDR                 0x0020  /* Count valid write address cycles */
-+#define AR2315_PERF1_VWDATA                 0x0040  /* Count valid write data cycles */
-+
-+/*
-+ * AHB Error Reporting.
-+ */
-+#define AR2315_AHB_ERR0         (AR2315_DSLBASE + 0x0050)  /* error  */
-+#define AR2315_AHB_ERR1         (AR2315_DSLBASE + 0x0054)  /* haddr  */
-+#define AR2315_AHB_ERR2         (AR2315_DSLBASE + 0x0058)  /* hwdata */
-+#define AR2315_AHB_ERR3         (AR2315_DSLBASE + 0x005c)  /* hrdata */
-+#define AR2315_AHB_ERR4         (AR2315_DSLBASE + 0x0060)  /* status */
-+
-+#define AHB_ERROR_DET               1   /* AHB Error has been detected,          */
-+                                        /* write 1 to clear all bits in ERR0     */
-+#define AHB_ERROR_OVR               2   /* AHB Error overflow has been detected  */
-+#define AHB_ERROR_WDT               4   /* AHB Error due to wdt instead of hresp */
-+
-+#define AR2315_PROCERR_HMAST               0x0000000f
-+#define AR2315_PROCERR_HMAST_DFLT          0
-+#define AR2315_PROCERR_HMAST_WMAC          1
-+#define AR2315_PROCERR_HMAST_ENET          2
-+#define AR2315_PROCERR_HMAST_PCIENDPT      3
-+#define AR2315_PROCERR_HMAST_LOCAL         4
-+#define AR2315_PROCERR_HMAST_CPU           5
-+#define AR2315_PROCERR_HMAST_PCITGT        6
-+
-+#define AR2315_PROCERR_HMAST_S             0
-+#define AR2315_PROCERR_HWRITE              0x00000010
-+#define AR2315_PROCERR_HSIZE               0x00000060
-+#define AR2315_PROCERR_HSIZE_S             5
-+#define AR2315_PROCERR_HTRANS              0x00000180
-+#define AR2315_PROCERR_HTRANS_S            7
-+#define AR2315_PROCERR_HBURST              0x00000e00
-+#define AR2315_PROCERR_HBURST_S            9
-+
-+/*
-+ * Clock Control
-+ */
-+#define AR2315_PLLC_CTL         (AR2315_DSLBASE + 0x0064)
-+#define AR2315_PLLV_CTL         (AR2315_DSLBASE + 0x0068)
-+#define AR2315_CPUCLK           (AR2315_DSLBASE + 0x006c)
-+#define AR2315_AMBACLK          (AR2315_DSLBASE + 0x0070)
-+#define AR2315_SYNCCLK          (AR2315_DSLBASE + 0x0074)
-+#define AR2315_DSL_SLEEP_CTL    (AR2315_DSLBASE + 0x0080)
-+#define AR2315_DSL_SLEEP_DUR    (AR2315_DSLBASE + 0x0084)
-+
-+/* PLLc Control fields */
-+#define PLLC_REF_DIV_M              0x00000003
-+#define PLLC_REF_DIV_S              0
-+#define PLLC_FDBACK_DIV_M           0x0000007C
-+#define PLLC_FDBACK_DIV_S           2
-+#define PLLC_ADD_FDBACK_DIV_M       0x00000080
-+#define PLLC_ADD_FDBACK_DIV_S       7
-+#define PLLC_CLKC_DIV_M             0x0001c000
-+#define PLLC_CLKC_DIV_S             14
-+#define PLLC_CLKM_DIV_M             0x00700000
-+#define PLLC_CLKM_DIV_S             20
-+
-+/* CPU CLK Control fields */
-+#define CPUCLK_CLK_SEL_M            0x00000003
-+#define CPUCLK_CLK_SEL_S            0
-+#define CPUCLK_CLK_DIV_M            0x0000000c
-+#define CPUCLK_CLK_DIV_S            2
-+
-+/* AMBA CLK Control fields */
-+#define AMBACLK_CLK_SEL_M           0x00000003
-+#define AMBACLK_CLK_SEL_S           0
-+#define AMBACLK_CLK_DIV_M           0x0000000c
-+#define AMBACLK_CLK_DIV_S           2
-+
-+/*
-+ * GPIO
-+ */
-+#define AR2315_GPIO_DI          (AR2315_DSLBASE + 0x0088)
-+#define AR2315_GPIO_DO          (AR2315_DSLBASE + 0x0090)
-+#define AR2315_GPIO_CR          (AR2315_DSLBASE + 0x0098)
-+#define AR2315_GPIO_INT         (AR2315_DSLBASE + 0x00a0)
-+
-+#define AR2315_GPIO_CR_M(x)                (1 << (x))                  /* mask for i/o */
-+#define AR2315_GPIO_CR_O(x)                (1 << (x))                  /* output */
-+#define AR2315_GPIO_CR_I(x)                (0)                         /* input */
-+
-+#define AR2315_GPIO_INT_S(x)               (x)                         /* interrupt enable */
-+#define AR2315_GPIO_INT_M                  (0x3F)                      /* mask for int */
-+#define AR2315_GPIO_INT_LVL(x)             ((x) << 6)                  /* interrupt level */
-+#define AR2315_GPIO_INT_LVL_M              ((0x3) << 6)                /* mask for int level */
-+
-+#define AR2315_GPIO_INT_MAX_Y				1   /* Maximum value of Y for AR5313_GPIO_INT_* macros */
-+#define AR2315_GPIO_INT_LVL_OFF				0   /* Triggerring off */
-+#define AR2315_GPIO_INT_LVL_LOW				1   /* Low Level Triggered */
-+#define AR2315_GPIO_INT_LVL_HIGH			2   /* High Level Triggered */
-+#define AR2315_GPIO_INT_LVL_EDGE			3   /* Edge Triggered */
-+
-+#define AR2315_RESET_GPIO       5
-+#define AR2315_NUM_GPIO         22
-+
-+/*
-+ *  PCI Clock Control
-+ */
-+#define AR2315_PCICLK           (AR2315_DSLBASE + 0x00a4)
-+
-+#define AR2315_PCICLK_INPUT_M              0x3
-+#define AR2315_PCICLK_INPUT_S              0
-+
-+#define AR2315_PCICLK_PLLC_CLKM            0
-+#define AR2315_PCICLK_PLLC_CLKM1           1
-+#define AR2315_PCICLK_PLLC_CLKC            2
-+#define AR2315_PCICLK_REF_CLK              3
-+
-+#define AR2315_PCICLK_DIV_M                0xc
-+#define AR2315_PCICLK_DIV_S                2
-+
-+#define AR2315_PCICLK_IN_FREQ              0
-+#define AR2315_PCICLK_IN_FREQ_DIV_6        1
-+#define AR2315_PCICLK_IN_FREQ_DIV_8        2
-+#define AR2315_PCICLK_IN_FREQ_DIV_10       3
-+
-+/*
-+ * Observation Control Register
-+ */
-+#define AR2315_OCR              (AR2315_DSLBASE + 0x00b0)
-+#define OCR_GPIO0_IRIN              0x0040
-+#define OCR_GPIO1_IROUT             0x0080
-+#define OCR_GPIO3_RXCLR             0x0200
-+
-+/*
-+ *  General Clock Control
-+ */
-+
-+#define AR2315_MISCCLK          (AR2315_DSLBASE + 0x00b4)
-+#define MISCCLK_PLLBYPASS_EN        0x00000001
-+#define MISCCLK_PROCREFCLK          0x00000002
-+
-+/*
-+ * SDRAM Controller
-+ *   - No read or write buffers are included.
-+ */
-+#define AR2315_MEM_CFG          (AR2315_SDRAMCTL + 0x00)
-+#define AR2315_MEM_CTRL         (AR2315_SDRAMCTL + 0x0c)
-+#define AR2315_MEM_REF          (AR2315_SDRAMCTL + 0x10)
-+
-+#define SDRAM_DATA_WIDTH_M          0x00006000
-+#define SDRAM_DATA_WIDTH_S          13
-+
-+#define SDRAM_COL_WIDTH_M           0x00001E00
-+#define SDRAM_COL_WIDTH_S           9
-+
-+#define SDRAM_ROW_WIDTH_M           0x000001E0
-+#define SDRAM_ROW_WIDTH_S           5
-+
-+#define SDRAM_BANKADDR_BITS_M       0x00000018
-+#define SDRAM_BANKADDR_BITS_S       3
-+
-+/*
-+ * SPI Flash Interface Registers
-+ */
-+
-+#define AR2315_SPI_CTL      (AR2315_SPI + 0x00)
-+#define AR2315_SPI_OPCODE   (AR2315_SPI + 0x04)
-+#define AR2315_SPI_DATA     (AR2315_SPI + 0x08)
-+
-+#define SPI_CTL_START           0x00000100
-+#define SPI_CTL_BUSY            0x00010000
-+#define SPI_CTL_TXCNT_MASK      0x0000000f
-+#define SPI_CTL_RXCNT_MASK      0x000000f0
-+#define SPI_CTL_TX_RX_CNT_MASK  0x000000ff
-+#define SPI_CTL_SIZE_MASK       0x00060000
-+
-+#define SPI_CTL_CLK_SEL_MASK    0x03000000
-+#define SPI_OPCODE_MASK         0x000000ff
-+
-+/*
-+ * PCI Bus Interface Registers
-+ */
-+#define AR2315_PCI_1MS_REG      (AR2315_PCI + 0x0008)
-+#define AR2315_PCI_1MS_MASK     0x3FFFF         /* # of AHB clk cycles in 1ms */
-+
-+#define AR2315_PCI_MISC_CONFIG  (AR2315_PCI + 0x000c)
-+#define AR2315_PCIMISC_TXD_EN   0x00000001      /* Enable TXD for fragments */
-+#define AR2315_PCIMISC_CFG_SEL  0x00000002      /* mem or config cycles */
-+#define AR2315_PCIMISC_GIG_MASK 0x0000000C      /* bits 31-30 for pci req */
-+#define AR2315_PCIMISC_RST_MODE 0x00000030
-+#define AR2315_PCIRST_INPUT     0x00000000      /* 4:5=0 rst is input */
-+#define AR2315_PCIRST_LOW       0x00000010      /* 4:5=1 rst to GND */
-+#define AR2315_PCIRST_HIGH      0x00000020      /* 4:5=2 rst to VDD */
-+#define AR2315_PCIGRANT_EN      0x00000000      /* 6:7=0 early grant en */
-+#define AR2315_PCIGRANT_FRAME   0x00000040      /* 6:7=1 grant waits 4 frame */
-+#define AR2315_PCIGRANT_IDLE    0x00000080      /* 6:7=2 grant waits 4 idle */
-+#define AR2315_PCIGRANT_GAP     0x00000000      /* 6:7=2 grant waits 4 idle */
-+#define AR2315_PCICACHE_DIS     0x00001000      /* PCI external access cache disable */
-+
-+#define AR2315_PCI_OUT_TSTAMP   (AR2315_PCI + 0x0010)
-+
-+#define AR2315_PCI_UNCACHE_CFG  (AR2315_PCI + 0x0014)
-+
-+#define AR2315_PCI_IN_EN        (AR2315_PCI + 0x0100)
-+#define AR2315_PCI_IN_EN0       0x01            /* Enable chain 0 */
-+#define AR2315_PCI_IN_EN1       0x02            /* Enable chain 1 */
-+#define AR2315_PCI_IN_EN2       0x04            /* Enable chain 2 */
-+#define AR2315_PCI_IN_EN3       0x08            /* Enable chain 3 */
-+
-+#define AR2315_PCI_IN_DIS       (AR2315_PCI + 0x0104)
-+#define AR2315_PCI_IN_DIS0      0x01            /* Disable chain 0 */
-+#define AR2315_PCI_IN_DIS1      0x02            /* Disable chain 1 */
-+#define AR2315_PCI_IN_DIS2      0x04            /* Disable chain 2 */
-+#define AR2315_PCI_IN_DIS3      0x08            /* Disable chain 3 */
-+
-+#define AR2315_PCI_IN_PTR       (AR2315_PCI + 0x0200)
-+
-+#define AR2315_PCI_OUT_EN       (AR2315_PCI + 0x0400)
-+#define AR2315_PCI_OUT_EN0      0x01            /* Enable chain 0 */
-+
-+#define AR2315_PCI_OUT_DIS      (AR2315_PCI + 0x0404)
-+#define AR2315_PCI_OUT_DIS0     0x01            /* Disable chain 0 */
-+
-+#define AR2315_PCI_OUT_PTR      (AR2315_PCI + 0x0408)
-+
-+#define AR2315_PCI_INT_STATUS   (AR2315_PCI + 0x0500)   /* write one to clr */
-+#define AR2315_PCI_TXINT        0x00000001      /* Desc In Completed */
-+#define AR2315_PCI_TXOK         0x00000002      /* Desc In OK */
-+#define AR2315_PCI_TXERR        0x00000004      /* Desc In ERR */
-+#define AR2315_PCI_TXEOL        0x00000008      /* Desc In End-of-List */
-+#define AR2315_PCI_RXINT        0x00000010      /* Desc Out Completed */
-+#define AR2315_PCI_RXOK         0x00000020      /* Desc Out OK */
-+#define AR2315_PCI_RXERR        0x00000040      /* Desc Out ERR */
-+#define AR2315_PCI_RXEOL        0x00000080      /* Desc Out EOL */
-+#define AR2315_PCI_TXOOD        0x00000200      /* Desc In Out-of-Desc */
-+#define AR2315_PCI_MASK         0x0000FFFF      /* Desc Mask */
-+#define AR2315_PCI_EXT_INT      0x02000000
-+#define AR2315_PCI_ABORT_INT    0x04000000
-+
-+#define AR2315_PCI_INT_MASK     (AR2315_PCI + 0x0504)   /* same as INT_STATUS */
-+
-+#define AR2315_PCI_INTEN_REG    (AR2315_PCI + 0x0508)
-+#define AR2315_PCI_INT_DISABLE  0x00            /* disable pci interrupts */
-+#define AR2315_PCI_INT_ENABLE   0x01            /* enable pci interrupts */
-+
-+#define AR2315_PCI_HOST_IN_EN   (AR2315_PCI + 0x0800)
-+#define AR2315_PCI_HOST_IN_DIS  (AR2315_PCI + 0x0804)
-+#define AR2315_PCI_HOST_IN_PTR  (AR2315_PCI + 0x0810)
-+#define AR2315_PCI_HOST_OUT_EN  (AR2315_PCI + 0x0900)
-+#define AR2315_PCI_HOST_OUT_DIS (AR2315_PCI + 0x0904)
-+#define AR2315_PCI_HOST_OUT_PTR (AR2315_PCI + 0x0908)
-+
-+
-+/*
-+ * Local Bus Interface Registers
-+ */
-+#define AR2315_LB_CONFIG        (AR2315_LOCAL + 0x0000)
-+#define AR2315_LBCONF_OE        0x00000001      /* =1 OE is low-true */
-+#define AR2315_LBCONF_CS0       0x00000002      /* =1 first CS is low-true */
-+#define AR2315_LBCONF_CS1       0x00000004      /* =1 2nd CS is low-true */
-+#define AR2315_LBCONF_RDY       0x00000008      /* =1 RDY is low-true */
-+#define AR2315_LBCONF_WE        0x00000010      /* =1 Write En is low-true */
-+#define AR2315_LBCONF_WAIT      0x00000020      /* =1 WAIT is low-true */
-+#define AR2315_LBCONF_ADS       0x00000040      /* =1 Adr Strobe is low-true */
-+#define AR2315_LBCONF_MOT       0x00000080      /* =0 Intel, =1 Motorola */
-+#define AR2315_LBCONF_8CS       0x00000100      /* =1 8 bits CS, 0= 16bits */
-+#define AR2315_LBCONF_8DS       0x00000200      /* =1 8 bits Data S, 0=16bits */
-+#define AR2315_LBCONF_ADS_EN    0x00000400      /* =1 Enable ADS */
-+#define AR2315_LBCONF_ADR_OE    0x00000800      /* =1 Adr cap on OE, WE or DS */
-+#define AR2315_LBCONF_ADDT_MUX  0x00001000      /* =1 Adr and Data share bus */
-+#define AR2315_LBCONF_DATA_OE   0x00002000      /* =1 Data cap on OE, WE, DS */
-+#define AR2315_LBCONF_16DATA    0x00004000      /* =1 Data is 16 bits wide */
-+#define AR2315_LBCONF_SWAPDT    0x00008000      /* =1 Byte swap data */
-+#define AR2315_LBCONF_SYNC      0x00010000      /* =1 Bus synchronous to clk */
-+#define AR2315_LBCONF_INT       0x00020000      /* =1 Intr is low true */
-+#define AR2315_LBCONF_INT_CTR0  0x00000000      /* GND high-Z, Vdd is high-Z */
-+#define AR2315_LBCONF_INT_CTR1  0x00040000      /* GND drive, Vdd is high-Z */
-+#define AR2315_LBCONF_INT_CTR2  0x00080000      /* GND high-Z, Vdd drive */
-+#define AR2315_LBCONF_INT_CTR3  0x000C0000      /* GND drive, Vdd drive */
-+#define AR2315_LBCONF_RDY_WAIT  0x00100000      /* =1 RDY is negative of WAIT */
-+#define AR2315_LBCONF_INT_PULSE 0x00200000      /* =1 Interrupt is a pulse */
-+#define AR2315_LBCONF_ENABLE    0x00400000      /* =1 Falcon respond to LB */
-+
-+#define AR2315_LB_CLKSEL        (AR2315_LOCAL + 0x0004)
-+#define AR2315_LBCLK_EXT        0x0001          /* use external clk for lb */
-+
-+#define AR2315_LB_1MS           (AR2315_LOCAL + 0x0008)
-+#define AR2315_LB1MS_MASK       0x3FFFF         /* # of AHB clk cycles in 1ms */
-+
-+#define AR2315_LB_MISCCFG       (AR2315_LOCAL + 0x000C)
-+#define AR2315_LBM_TXD_EN       0x00000001      /* Enable TXD for fragments */
-+#define AR2315_LBM_RX_INTEN     0x00000002      /* Enable LB ints on RX ready */
-+#define AR2315_LBM_MBOXWR_INTEN 0x00000004      /* Enable LB ints on mbox wr */
-+#define AR2315_LBM_MBOXRD_INTEN 0x00000008      /* Enable LB ints on mbox rd */
-+#define AR2315_LMB_DESCSWAP_EN  0x00000010      /* Byte swap desc enable */
-+#define AR2315_LBM_TIMEOUT_MASK 0x00FFFF80
-+#define AR2315_LBM_TIMEOUT_SHFT 7
-+#define AR2315_LBM_PORTMUX      0x07000000
-+
-+
-+#define AR2315_LB_RXTSOFF       (AR2315_LOCAL + 0x0010)
-+
-+#define AR2315_LB_TX_CHAIN_EN   (AR2315_LOCAL + 0x0100)
-+#define AR2315_LB_TXEN_0        0x01
-+#define AR2315_LB_TXEN_1        0x02
-+#define AR2315_LB_TXEN_2        0x04
-+#define AR2315_LB_TXEN_3        0x08
-+
-+#define AR2315_LB_TX_CHAIN_DIS  (AR2315_LOCAL + 0x0104)
-+#define AR2315_LB_TX_DESC_PTR   (AR2315_LOCAL + 0x0200)
-+
-+#define AR2315_LB_RX_CHAIN_EN   (AR2315_LOCAL + 0x0400)
-+#define AR2315_LB_RXEN          0x01
-+
-+#define AR2315_LB_RX_CHAIN_DIS  (AR2315_LOCAL + 0x0404)
-+#define AR2315_LB_RX_DESC_PTR   (AR2315_LOCAL + 0x0408)
-+
-+#define AR2315_LB_INT_STATUS    (AR2315_LOCAL + 0x0500)
-+#define AR2315_INT_TX_DESC      0x0001
-+#define AR2315_INT_TX_OK        0x0002
-+#define AR2315_INT_TX_ERR       0x0004
-+#define AR2315_INT_TX_EOF       0x0008
-+#define AR2315_INT_RX_DESC      0x0010
-+#define AR2315_INT_RX_OK        0x0020
-+#define AR2315_INT_RX_ERR       0x0040
-+#define AR2315_INT_RX_EOF       0x0080
-+#define AR2315_INT_TX_TRUNC     0x0100
-+#define AR2315_INT_TX_STARVE    0x0200
-+#define AR2315_INT_LB_TIMEOUT   0x0400
-+#define AR2315_INT_LB_ERR       0x0800
-+#define AR2315_INT_MBOX_WR      0x1000
-+#define AR2315_INT_MBOX_RD      0x2000
-+
-+/* Bit definitions for INT MASK are the same as INT_STATUS */
-+#define AR2315_LB_INT_MASK      (AR2315_LOCAL + 0x0504)
-+
-+#define AR2315_LB_INT_EN        (AR2315_LOCAL + 0x0508)
-+#define AR2315_LB_MBOX          (AR2315_LOCAL + 0x0600)
-+
-+/*
-+ * IR Interface Registers
-+ */
-+#define AR2315_IR_PKTDATA                   (AR2315_IR + 0x0000)
-+
-+#define AR2315_IR_PKTLEN                    (AR2315_IR + 0x07fc) /* 0 - 63 */
-+
-+#define AR2315_IR_CONTROL                   (AR2315_IR + 0x0800)
-+#define AR2315_IRCTL_TX                     0x00000000  /* use as tranmitter */
-+#define AR2315_IRCTL_RX                     0x00000001  /* use as receiver   */
-+#define AR2315_IRCTL_SAMPLECLK_MASK         0x00003ffe  /* Sample clk divisor mask */
-+#define AR2315_IRCTL_SAMPLECLK_SHFT                  1
-+#define AR2315_IRCTL_OUTPUTCLK_MASK         0x03ffc000  /* Output clk divisor mask */
-+#define AR2315_IRCTL_OUTPUTCLK_SHFT                 14
-+
-+#define AR2315_IR_STATUS                    (AR2315_IR + 0x0804)
-+#define AR2315_IRSTS_RX                     0x00000001  /* receive in progress */
-+#define AR2315_IRSTS_TX                     0x00000002  /* transmit in progress */
-+
-+#define AR2315_IR_CONFIG                    (AR2315_IR + 0x0808)
-+#define AR2315_IRCFG_INVIN                  0x00000001  /* invert input polarity */
-+#define AR2315_IRCFG_INVOUT                 0x00000002  /* invert output polarity */
-+#define AR2315_IRCFG_SEQ_START_WIN_SEL      0x00000004  /* 1 => 28, 0 => 7 */
-+#define AR2315_IRCFG_SEQ_START_THRESH       0x000000f0  /*  */
-+#define AR2315_IRCFG_SEQ_END_UNIT_SEL       0x00000100  /*  */
-+#define AR2315_IRCFG_SEQ_END_UNIT_THRESH    0x00007e00  /*  */
-+#define AR2315_IRCFG_SEQ_END_WIN_SEL        0x00008000  /*  */
-+#define AR2315_IRCFG_SEQ_END_WIN_THRESH     0x001f0000  /*  */
-+#define AR2315_IRCFG_NUM_BACKOFF_WORDS      0x01e00000  /*  */
-+
-+#define HOST_PCI_DEV_ID         3
-+#define HOST_PCI_MBAR0          0x10000000
-+#define HOST_PCI_MBAR1          0x20000000
-+#define HOST_PCI_MBAR2          0x30000000
-+
-+#define HOST_PCI_SDRAM_BASEADDR HOST_PCI_MBAR1
-+#define PCI_DEVICE_MEM_SPACE    0x800000
-+
-+#endif /* __AR2315_REG_H */
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar2315_spiflash.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar2315_spiflash.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar2315_spiflash.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar2315_spiflash.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,116 @@
-+/*
-+ * SPI Flash Memory support header file.
-+ *
-+ * Copyright (c) 2005, Atheros Communications Inc.
-+ * Copyright (C) 2006 FON Technology, SL.
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
-+ *
-+ * This code is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+#ifndef __AR2315_SPIFLASH_H
-+#define __AR2315_SPIFLASH_H
-+
-+#define STM_PAGE_SIZE           256
-+
-+#define SFI_WRITE_BUFFER_SIZE   4
-+#define SFI_FLASH_ADDR_MASK     0x00ffffff
-+
-+#define STM_8MBIT_SIGNATURE     0x13
-+#define STM_M25P80_BYTE_COUNT   1048576
-+#define STM_M25P80_SECTOR_COUNT 16
-+#define STM_M25P80_SECTOR_SIZE  0x10000
-+
-+#define STM_16MBIT_SIGNATURE    0x14
-+#define STM_M25P16_BYTE_COUNT   2097152
-+#define STM_M25P16_SECTOR_COUNT 32
-+#define STM_M25P16_SECTOR_SIZE  0x10000
-+
-+#define STM_32MBIT_SIGNATURE    0x15
-+#define STM_M25P32_BYTE_COUNT   4194304
-+#define STM_M25P32_SECTOR_COUNT 64
-+#define STM_M25P32_SECTOR_SIZE  0x10000
-+
-+#define STM_64MBIT_SIGNATURE    0x16
-+#define STM_M25P64_BYTE_COUNT   8388608
-+#define STM_M25P64_SECTOR_COUNT 128
-+#define STM_M25P64_SECTOR_SIZE  0x10000
-+
-+#define STM_128MBIT_SIGNATURE   0x17
-+#define STM_M25P128_BYTE_COUNT   16777216
-+#define STM_M25P128_SECTOR_COUNT 256
-+#define STM_M25P128_SECTOR_SIZE  0x10000
-+
-+#define STM_1MB_BYTE_COUNT   STM_M25P80_BYTE_COUNT
-+#define STM_1MB_SECTOR_COUNT STM_M25P80_SECTOR_COUNT
-+#define STM_1MB_SECTOR_SIZE  STM_M25P80_SECTOR_SIZE
-+#define STM_2MB_BYTE_COUNT   STM_M25P16_BYTE_COUNT
-+#define STM_2MB_SECTOR_COUNT STM_M25P16_SECTOR_COUNT
-+#define STM_2MB_SECTOR_SIZE  STM_M25P16_SECTOR_SIZE
-+#define STM_4MB_BYTE_COUNT   STM_M25P32_BYTE_COUNT
-+#define STM_4MB_SECTOR_COUNT STM_M25P32_SECTOR_COUNT
-+#define STM_4MB_SECTOR_SIZE  STM_M25P32_SECTOR_SIZE
-+#define STM_8MB_BYTE_COUNT   STM_M25P64_BYTE_COUNT
-+#define STM_8MB_SECTOR_COUNT STM_M25P64_SECTOR_COUNT
-+#define STM_8MB_SECTOR_SIZE  STM_M25P64_SECTOR_SIZE
-+#define STM_16MB_BYTE_COUNT   STM_M25P128_BYTE_COUNT
-+#define STM_16MB_SECTOR_COUNT STM_M25P128_SECTOR_COUNT
-+#define STM_16MB_SECTOR_SIZE  STM_M25P128_SECTOR_SIZE
-+
-+/*
-+ * ST Microelectronics Opcodes for Serial Flash
-+ */
-+
-+#define STM_OP_WR_ENABLE       0x06     /* Write Enable */
-+#define STM_OP_WR_DISABLE      0x04     /* Write Disable */
-+#define STM_OP_RD_STATUS       0x05     /* Read Status */
-+#define STM_OP_WR_STATUS       0x01     /* Write Status */
-+#define STM_OP_RD_DATA         0x03     /* Read Data */
-+#define STM_OP_FAST_RD_DATA    0x0b     /* Fast Read Data */
-+#define STM_OP_PAGE_PGRM       0x02     /* Page Program */
-+#define STM_OP_SECTOR_ERASE    0xd8     /* Sector Erase */
-+#define STM_OP_BULK_ERASE      0xc7     /* Bulk Erase */
-+#define STM_OP_DEEP_PWRDOWN    0xb9     /* Deep Power-Down Mode */
-+#define STM_OP_RD_SIG          0xab     /* Read Electronic Signature */
-+
-+#define STM_STATUS_WIP       0x01       /* Write-In-Progress */
-+#define STM_STATUS_WEL       0x02       /* Write Enable Latch */
-+#define STM_STATUS_BP0       0x04       /* Block Protect 0 */
-+#define STM_STATUS_BP1       0x08       /* Block Protect 1 */
-+#define STM_STATUS_BP2       0x10       /* Block Protect 2 */
-+#define STM_STATUS_SRWD      0x80       /* Status Register Write Disable */
-+
-+/*
-+ * SPI Flash Interface Registers
-+ */
-+#define AR531XPLUS_SPI_READ     0x08000000
-+#define AR531XPLUS_SPI_MMR      0x11300000
-+#define AR531XPLUS_SPI_MMR_SIZE 12
-+
-+#define AR531XPLUS_SPI_CTL      0x00
-+#define AR531XPLUS_SPI_OPCODE   0x04
-+#define AR531XPLUS_SPI_DATA     0x08
-+
-+#define SPI_FLASH_READ          AR531XPLUS_SPI_READ
-+#define SPI_FLASH_MMR           AR531XPLUS_SPI_MMR
-+#define SPI_FLASH_MMR_SIZE      AR531XPLUS_SPI_MMR_SIZE
-+#define SPI_FLASH_CTL           AR531XPLUS_SPI_CTL
-+#define SPI_FLASH_OPCODE        AR531XPLUS_SPI_OPCODE
-+#define SPI_FLASH_DATA          AR531XPLUS_SPI_DATA
-+
-+#define SPI_CTL_START           0x00000100
-+#define SPI_CTL_BUSY            0x00010000
-+#define SPI_CTL_TXCNT_MASK      0x0000000f
-+#define SPI_CTL_RXCNT_MASK      0x000000f0
-+#define SPI_CTL_TX_RX_CNT_MASK  0x000000ff
-+#define SPI_CTL_SIZE_MASK       0x00060000
-+
-+#define SPI_CTL_CLK_SEL_MASK    0x03000000
-+#define SPI_OPCODE_MASK         0x000000ff
-+
-+#define SPI_STATUS_WIP		STM_STATUS_WIP
-+
-+#endif
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar231x.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar231x.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar231x.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar231x.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,54 @@
-+#ifndef __AR531X_H
-+#define __AR531X_H
-+
-+#define AR531X_MISC_IRQ_BASE		0x20
-+#define AR531X_GPIO_IRQ_BASE		0x30
-+
-+/* Software's idea of interrupts handled by "CPU Interrupt Controller" */
-+#define AR531X_IRQ_NONE		MIPS_CPU_IRQ_BASE+0
-+#define AR531X_IRQ_CPU_CLOCK	MIPS_CPU_IRQ_BASE+7 /* C0_CAUSE: 0x8000 */
-+
-+/* Miscellaneous interrupts, which share IP6 */
-+#define AR531X_MISC_IRQ_NONE		AR531X_MISC_IRQ_BASE+0
-+#define AR531X_MISC_IRQ_TIMER		AR531X_MISC_IRQ_BASE+1
-+#define AR531X_MISC_IRQ_AHB_PROC	AR531X_MISC_IRQ_BASE+2
-+#define AR531X_MISC_IRQ_AHB_DMA		AR531X_MISC_IRQ_BASE+3
-+#define AR531X_MISC_IRQ_GPIO		AR531X_MISC_IRQ_BASE+4
-+#define AR531X_MISC_IRQ_UART0		AR531X_MISC_IRQ_BASE+5
-+#define AR531X_MISC_IRQ_UART0_DMA	AR531X_MISC_IRQ_BASE+6
-+#define AR531X_MISC_IRQ_WATCHDOG	AR531X_MISC_IRQ_BASE+7
-+#define AR531X_MISC_IRQ_LOCAL		AR531X_MISC_IRQ_BASE+8
-+#define AR531X_MISC_IRQ_SPI 		AR531X_MISC_IRQ_BASE+9
-+#define AR531X_MISC_IRQ_COUNT		10
-+
-+/* GPIO Interrupts [0..7], share AR531X_MISC_IRQ_GPIO */
-+#define AR531X_GPIO_IRQ_NONE            AR531X_GPIO_IRQ_BASE+0
-+#define AR531X_GPIO_IRQ(n)              AR531X_GPIO_IRQ_BASE+n
-+#define AR531X_GPIO_IRQ_COUNT           22
-+
-+static inline u32
-+ar231x_read_reg(u32 reg)
-+{
-+	return __raw_readl((u32 *) KSEG1ADDR(reg));
-+}
-+
-+static inline void
-+ar231x_write_reg(u32 reg, u32 val)
-+{
-+	__raw_writel(val, (u32 *) KSEG1ADDR(reg));
-+}
-+
-+static inline u32
-+ar231x_mask_reg(u32 reg, u32 mask, u32 val)
-+{
-+	u32 ret;
-+
-+	ret = ar231x_read_reg(reg);
-+	ret &= ~mask;
-+	ret |= val;
-+	ar231x_write_reg(reg, ret);
-+
-+	return ret;
-+}
-+
-+#endif
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar231x_platform.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar231x_platform.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar231x_platform.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar231x_platform.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,83 @@
-+#ifndef __AR531X_PLATFORM_H
-+#define __AR531X_PLATFORM_H
-+
-+/*
-+ * This is board-specific data that is stored in a "fixed" location in flash.
-+ * It is shared across operating systems, so it should not be changed lightly.
-+ * The main reason we need it is in order to extract the ethernet MAC
-+ * address(es).
-+ */
-+struct ar231x_boarddata {
-+    u32 magic;                       /* board data is valid */
-+#define AR531X_BD_MAGIC 0x35333131   /* "5311", for all 531x platforms */
-+    u16 cksum;                       /* checksum (starting with BD_REV 2) */
-+    u16 rev;                         /* revision of this struct */
-+#define BD_REV  4
-+    char boardName[64];            /* Name of board */
-+    u16 major;                       /* Board major number */
-+    u16 minor;                       /* Board minor number */
-+    u32 flags;                      /* Board configuration */
-+#define BD_ENET0        0x00000001   /* ENET0 is stuffed */
-+#define BD_ENET1        0x00000002   /* ENET1 is stuffed */
-+#define BD_UART1        0x00000004   /* UART1 is stuffed */
-+#define BD_UART0        0x00000008   /* UART0 is stuffed (dma) */
-+#define BD_RSTFACTORY   0x00000010   /* Reset factory defaults stuffed */
-+#define BD_SYSLED       0x00000020   /* System LED stuffed */
-+#define BD_EXTUARTCLK   0x00000040   /* External UART clock */
-+#define BD_CPUFREQ      0x00000080   /* cpu freq is valid in nvram */
-+#define BD_SYSFREQ      0x00000100   /* sys freq is set in nvram */
-+#define BD_WLAN0        0x00000200   /* Enable WLAN0 */
-+#define BD_MEMCAP       0x00000400   /* CAP SDRAM @ memCap for testing */
-+#define BD_DISWATCHDOG  0x00000800   /* disable system watchdog */
-+#define BD_WLAN1        0x00001000   /* Enable WLAN1 (ar5212) */
-+#define BD_ISCASPER     0x00002000   /* FLAG for AR2312 */
-+#define BD_WLAN0_2G_EN  0x00004000   /* FLAG for radio0_2G */
-+#define BD_WLAN0_5G_EN  0x00008000   /* FLAG for radio0_2G */
-+#define BD_WLAN1_2G_EN  0x00020000   /* FLAG for radio0_2G */
-+#define BD_WLAN1_5G_EN  0x00040000   /* FLAG for radio0_2G */
-+    u16 resetConfigGpio;             /* Reset factory GPIO pin */
-+    u16 sysLedGpio;                  /* System LED GPIO pin */
-+
-+    u32 cpuFreq;                     /* CPU core frequency in Hz */
-+    u32 sysFreq;                     /* System frequency in Hz */
-+    u32 cntFreq;                     /* Calculated C0_COUNT frequency */
-+
-+    u8  wlan0_mac[6];
-+    u8  enet0_mac[6];
-+    u8  enet1_mac[6];
-+
-+    u16 pciId;                       /* Pseudo PCIID for common code */
-+    u16 memCap;                      /* cap bank1 in MB */
-+
-+    /* version 3 */
-+    u8  wlan1_mac[6];                 /* (ar5212) */
-+};
-+
-+#define BOARD_CONFIG_BUFSZ		0x1000
-+
-+/*
-+ * Platform device information for the Wireless MAC
-+ */
-+struct ar231x_board_config {
-+	u16 devid;
-+
-+	/* board config data */
-+	struct ar231x_boarddata *config;
-+
-+	/* radio calibration data */
-+	const char *radio;
-+};
-+
-+/*
-+ * Platform device information for the Ethernet MAC
-+ */
-+struct ar231x_eth {
-+	u32 reset_base;
-+	u32 reset_mac;
-+	u32 reset_phy;
-+	u32 phy_base;
-+	struct ar231x_board_config *config;
-+	char *macaddr;
-+};
-+
-+#endif /* __AR531X_PLATFORM_H */
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar5312_regs.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar5312_regs.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/ar5312_regs.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/ar5312_regs.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,236 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2003 Atheros Communications, Inc.,  All Rights Reserved.
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
-+ */
-+
-+#ifndef AR5312_H
-+#define AR5312_H
-+
-+#include <asm/addrspace.h>
-+
-+/*
-+ * IRQs
-+ */
-+
-+#define AR5312_IRQ_WLAN0_INTRS  MIPS_CPU_IRQ_BASE+2 /* C0_CAUSE: 0x0400 */
-+#define AR5312_IRQ_ENET0_INTRS  MIPS_CPU_IRQ_BASE+3 /* C0_CAUSE: 0x0800 */
-+#define AR5312_IRQ_ENET1_INTRS  MIPS_CPU_IRQ_BASE+4 /* C0_CAUSE: 0x1000 */
-+#define AR5312_IRQ_WLAN1_INTRS  MIPS_CPU_IRQ_BASE+5 /* C0_CAUSE: 0x2000 */
-+#define AR5312_IRQ_MISC_INTRS   MIPS_CPU_IRQ_BASE+6 /* C0_CAUSE: 0x4000 */
-+
-+
-+/* Address Map */
-+#define AR531X_WLAN0            0x18000000
-+#define AR531X_WLAN1            0x18500000
-+#define AR531X_ENET0            0x18100000
-+#define AR531X_ENET1            0x18200000
-+#define AR531X_SDRAMCTL         0x18300000
-+#define AR531X_FLASHCTL         0x18400000
-+#define AR531X_APBBASE		0x1c000000
-+#define AR531X_FLASH            0x1e000000
-+#define AR531X_UART0            0xbc000003      /* UART MMR */
-+
-+/*
-+ * AR531X_NUM_ENET_MAC defines the number of ethernet MACs that
-+ * should be considered available.  The AR5312 supports 2 enet MACS,
-+ * even though many reference boards only actually use 1 of them
-+ * (i.e. Only MAC 0 is actually connected to an enet PHY or PHY switch.
-+ * The AR2312 supports 1 enet MAC.
-+ */
-+#define AR531X_NUM_ENET_MAC             2
-+
-+/*
-+ * Need these defines to determine true number of ethernet MACs
-+ */
-+#define AR5212_AR5312_REV2      0x0052          /* AR5312 WMAC (AP31) */
-+#define AR5212_AR5312_REV7      0x0057          /* AR5312 WMAC (AP30-040) */
-+#define AR5212_AR2313_REV8      0x0058          /* AR2313 WMAC (AP43-030) */
-+#define AR531X_RADIO_MASK_OFF  0xc8
-+#define AR531X_RADIO0_MASK     0x0003
-+#define AR531X_RADIO1_MASK     0x000c
-+#define AR531X_RADIO1_S        2
-+
-+/*
-+ * AR531X_NUM_WMAC defines the number of Wireless MACs that\
-+ * should be considered available.
-+ */
-+#define AR531X_NUM_WMAC                 2
-+
-+/* Reset/Timer Block Address Map */
-+#define AR531X_RESETTMR		(AR531X_APBBASE  + 0x3000)
-+#define AR531X_TIMER		(AR531X_RESETTMR + 0x0000) /* countdown timer */
-+#define AR531X_WD_CTRL          (AR531X_RESETTMR + 0x0008) /* watchdog cntrl */
-+#define AR531X_WD_TIMER         (AR531X_RESETTMR + 0x000c) /* watchdog timer */
-+#define AR531X_ISR		(AR531X_RESETTMR + 0x0010) /* Intr Status Reg */
-+#define AR531X_IMR		(AR531X_RESETTMR + 0x0014) /* Intr Mask Reg */
-+#define AR531X_RESET		(AR531X_RESETTMR + 0x0020)
-+#define AR5312_CLOCKCTL1	(AR531X_RESETTMR + 0x0064)
-+#define AR5312_SCRATCH   	(AR531X_RESETTMR + 0x006c)
-+#define AR531X_PROCADDR		(AR531X_RESETTMR + 0x0070)
-+#define AR531X_PROC1		(AR531X_RESETTMR + 0x0074)
-+#define AR531X_DMAADDR		(AR531X_RESETTMR + 0x0078)
-+#define AR531X_DMA1		(AR531X_RESETTMR + 0x007c)
-+#define AR531X_ENABLE           (AR531X_RESETTMR + 0x0080) /* interface enb */
-+#define AR531X_REV		(AR531X_RESETTMR + 0x0090) /* revision */
-+
-+/* AR531X_WD_CTRL register bit field definitions */
-+#define AR531X_WD_CTRL_IGNORE_EXPIRATION 0x0000
-+#define AR531X_WD_CTRL_NMI               0x0001
-+#define AR531X_WD_CTRL_RESET             0x0002
-+
-+/* AR531X_ISR register bit field definitions */
-+#define AR531X_ISR_NONE		0x0000
-+#define AR531X_ISR_TIMER	0x0001
-+#define AR531X_ISR_AHBPROC	0x0002
-+#define AR531X_ISR_AHBDMA	0x0004
-+#define AR531X_ISR_GPIO		0x0008
-+#define AR531X_ISR_UART0	0x0010
-+#define AR531X_ISR_UART0DMA	0x0020
-+#define AR531X_ISR_WD		0x0040
-+#define AR531X_ISR_LOCAL	0x0080
-+
-+/* AR531X_RESET register bit field definitions */
-+#define AR531X_RESET_SYSTEM     0x00000001  /* cold reset full system */
-+#define AR531X_RESET_PROC       0x00000002  /* cold reset MIPS core */
-+#define AR531X_RESET_WLAN0      0x00000004  /* cold reset WLAN MAC and BB */
-+#define AR531X_RESET_EPHY0      0x00000008  /* cold reset ENET0 phy */
-+#define AR531X_RESET_EPHY1      0x00000010  /* cold reset ENET1 phy */
-+#define AR531X_RESET_ENET0      0x00000020  /* cold reset ENET0 mac */
-+#define AR531X_RESET_ENET1      0x00000040  /* cold reset ENET1 mac */
-+#define AR531X_RESET_UART0      0x00000100  /* cold reset UART0 (high speed) */
-+#define AR531X_RESET_WLAN1      0x00000200  /* cold reset WLAN MAC/BB */
-+#define AR531X_RESET_APB        0x00000400  /* cold reset APB (ar5312) */
-+#define AR531X_RESET_WARM_PROC  0x00001000  /* warm reset MIPS core */
-+#define AR531X_RESET_WARM_WLAN0_MAC 0x00002000  /* warm reset WLAN0 MAC */
-+#define AR531X_RESET_WARM_WLAN0_BB  0x00004000  /* warm reset WLAN0 BaseBand */
-+#define AR531X_RESET_NMI        0x00010000  /* send an NMI to the processor */
-+#define AR531X_RESET_WARM_WLAN1_MAC 0x00020000  /* warm reset WLAN1 mac */
-+#define AR531X_RESET_WARM_WLAN1_BB  0x00040000  /* warm reset WLAN1 baseband */
-+#define AR531X_RESET_LOCAL_BUS  0x00080000  /* reset local bus */
-+#define AR531X_RESET_WDOG       0x00100000  /* last reset was a watchdog */
-+
-+#define AR531X_RESET_WMAC0_BITS \
-+        AR531X_RESET_WLAN0 |\
-+        AR531X_RESET_WARM_WLAN0_MAC |\
-+        AR531X_RESET_WARM_WLAN0_BB
-+
-+#define AR531X_RESERT_WMAC1_BITS \
-+        AR531X_RESET_WLAN1 |\
-+        AR531X_RESET_WARM_WLAN1_MAC |\
-+        AR531X_RESET_WARM_WLAN1_BB
-+
-+/* AR5312_CLOCKCTL1 register bit field definitions */
-+#define AR5312_CLOCKCTL1_PREDIVIDE_MASK    0x00000030
-+#define AR5312_CLOCKCTL1_PREDIVIDE_SHIFT            4
-+#define AR5312_CLOCKCTL1_MULTIPLIER_MASK   0x00001f00
-+#define AR5312_CLOCKCTL1_MULTIPLIER_SHIFT           8
-+#define AR5312_CLOCKCTL1_DOUBLER_MASK      0x00010000
-+
-+/* Valid for AR5312 and AR2312 */
-+#define AR5312_CLOCKCTL1_PREDIVIDE_MASK    0x00000030
-+#define AR5312_CLOCKCTL1_PREDIVIDE_SHIFT            4
-+#define AR5312_CLOCKCTL1_MULTIPLIER_MASK   0x00001f00
-+#define AR5312_CLOCKCTL1_MULTIPLIER_SHIFT           8
-+#define AR5312_CLOCKCTL1_DOUBLER_MASK      0x00010000
-+
-+/* Valid for AR2313 */
-+#define AR2313_CLOCKCTL1_PREDIVIDE_MASK    0x00003000
-+#define AR2313_CLOCKCTL1_PREDIVIDE_SHIFT           12
-+#define AR2313_CLOCKCTL1_MULTIPLIER_MASK   0x001f0000
-+#define AR2313_CLOCKCTL1_MULTIPLIER_SHIFT          16
-+#define AR2313_CLOCKCTL1_DOUBLER_MASK      0x00000000
-+
-+
-+/* AR531X_ENABLE register bit field definitions */
-+#define AR531X_ENABLE_WLAN0              0x0001
-+#define AR531X_ENABLE_ENET0              0x0002
-+#define AR531X_ENABLE_ENET1              0x0004
-+#define AR531X_ENABLE_UART_AND_WLAN1_PIO 0x0008   /* UART, and WLAN1 PIOs */
-+#define AR531X_ENABLE_WLAN1_DMA          0x0010   /* WLAN1 DMAs */
-+#define AR531X_ENABLE_WLAN1 \
-+            (AR531X_ENABLE_UART_AND_WLAN1_PIO | AR531X_ENABLE_WLAN1_DMA)
-+
-+/* AR531X_REV register bit field definitions */
-+#define AR531X_REV_WMAC_MAJ    0xf000
-+#define AR531X_REV_WMAC_MAJ_S  12
-+#define AR531X_REV_WMAC_MIN    0x0f00
-+#define AR531X_REV_WMAC_MIN_S  8
-+#define AR531X_REV_MAJ         0x00f0
-+#define AR531X_REV_MAJ_S       4
-+#define AR531X_REV_MIN         0x000f
-+#define AR531X_REV_MIN_S       0
-+#define AR531X_REV_CHIP        (AR531X_REV_MAJ|AR531X_REV_MIN)
-+
-+/* Major revision numbers, bits 7..4 of Revision ID register */
-+#define AR531X_REV_MAJ_AR5312          0x4
-+#define AR531X_REV_MAJ_AR2313          0x5
-+
-+/* Minor revision numbers, bits 3..0 of Revision ID register */
-+#define AR5312_REV_MIN_DUAL     0x0     /* Dual WLAN version */
-+#define AR5312_REV_MIN_SINGLE   0x1     /* Single WLAN version */
-+
-+/* AR531X_FLASHCTL register bit field definitions */
-+#define FLASHCTL_IDCY   0x0000000f      /* Idle cycle turn around time */
-+#define FLASHCTL_IDCY_S 0
-+#define FLASHCTL_WST1   0x000003e0      /* Wait state 1 */
-+#define FLASHCTL_WST1_S 5
-+#define FLASHCTL_RBLE   0x00000400      /* Read byte lane enable */
-+#define FLASHCTL_WST2   0x0000f800      /* Wait state 2 */
-+#define FLASHCTL_WST2_S 11
-+#define FLASHCTL_AC     0x00070000      /* Flash address check (added) */
-+#define FLASHCTL_AC_S   16
-+#define FLASHCTL_AC_128K 0x00000000
-+#define FLASHCTL_AC_256K 0x00010000
-+#define FLASHCTL_AC_512K 0x00020000
-+#define FLASHCTL_AC_1M   0x00030000
-+#define FLASHCTL_AC_2M   0x00040000
-+#define FLASHCTL_AC_4M   0x00050000
-+#define FLASHCTL_AC_8M   0x00060000
-+#define FLASHCTL_AC_RES  0x00070000     /* 16MB is not supported */
-+#define FLASHCTL_E      0x00080000      /* Flash bank enable (added) */
-+#define FLASHCTL_BUSERR 0x01000000      /* Bus transfer error status flag */
-+#define FLASHCTL_WPERR  0x02000000      /* Write protect error status flag */
-+#define FLASHCTL_WP     0x04000000      /* Write protect */
-+#define FLASHCTL_BM     0x08000000      /* Burst mode */
-+#define FLASHCTL_MW     0x30000000      /* Memory width */
-+#define FLASHCTL_MWx8   0x00000000      /* Memory width x8 */
-+#define FLASHCTL_MWx16  0x10000000      /* Memory width x16 */
-+#define FLASHCTL_MWx32  0x20000000      /* Memory width x32 (not supported) */
-+#define FLASHCTL_ATNR   0x00000000      /* Access type == no retry */
-+#define FLASHCTL_ATR    0x80000000      /* Access type == retry every */
-+#define FLASHCTL_ATR4   0xc0000000      /* Access type == retry every 4 */
-+
-+/* ARM Flash Controller -- 3 flash banks with either x8 or x16 devices.  */
-+#define AR531X_FLASHCTL0        (AR531X_FLASHCTL + 0x00)
-+#define AR531X_FLASHCTL1        (AR531X_FLASHCTL + 0x04)
-+#define AR531X_FLASHCTL2        (AR531X_FLASHCTL + 0x08)
-+
-+/* ARM SDRAM Controller -- just enough to determine memory size */
-+#define AR531X_MEM_CFG1 (AR531X_SDRAMCTL + 0x04)
-+#define MEM_CFG1_AC0    0x00000700      /* bank 0: SDRAM addr check (added) */
-+#define MEM_CFG1_AC0_S  8
-+#define MEM_CFG1_AC1    0x00007000      /* bank 1: SDRAM addr check (added) */
-+#define MEM_CFG1_AC1_S  12
-+
-+/* GPIO Address Map */
-+#define AR531X_GPIO         (AR531X_APBBASE  + 0x2000)
-+#define AR531X_GPIO_DO      (AR531X_GPIO + 0x00)        /* output register */
-+#define AR531X_GPIO_DI      (AR531X_GPIO + 0x04)        /* intput register */
-+#define AR531X_GPIO_CR      (AR531X_GPIO + 0x08)        /* control register */
-+
-+/* GPIO Control Register bit field definitions */
-+#define AR531X_GPIO_CR_M(x)    (1 << (x))                      /* mask for i/o */
-+#define AR531X_GPIO_CR_O(x)    (0 << (x))                      /* mask for output */
-+#define AR531X_GPIO_CR_I(x)    (1 << (x))                      /* mask for input */
-+#define AR531X_GPIO_CR_INT(x)  (1 << ((x)+8))                  /* mask for interrupt */
-+#define AR531X_GPIO_CR_UART(x) (1 << ((x)+16))                 /* uart multiplex */
-+#define AR531X_NUM_GPIO		8
-+
-+
-+#endif
-+
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/cpu-feature-overrides.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/cpu-feature-overrides.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/cpu-feature-overrides.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/cpu-feature-overrides.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,84 @@
-+/*
-+ *  Atheros SoC specific CPU feature overrides
-+ *
-+ *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ *  This file was derived from: include/asm-mips/cpu-features.h
-+ *	Copyright (C) 2003, 2004 Ralf Baechle
-+ *	Copyright (C) 2004 Maciej W. Rozycki
-+ *
-+ *  This program is free software; you can redistribute it and/or modify it
-+ *  under the terms of the GNU General Public License version 2 as published
-+ *  by the Free Software Foundation.
-+ *
-+ */
-+#ifndef __ASM_MACH_ATHEROS_CPU_FEATURE_OVERRIDES_H
-+#define __ASM_MACH_ATHEROS_CPU_FEATURE_OVERRIDES_H
-+
-+/*
-+ * The ATHEROS SoCs have MIPS 4Kc/4KEc core.
-+ */
-+#define cpu_has_tlb			1
-+#define cpu_has_4kex			1
-+#define cpu_has_3k_cache		0
-+#define cpu_has_4k_cache		1
-+#define cpu_has_tx39_cache		0
-+#define cpu_has_sb1_cache		0
-+#define cpu_has_fpu			0
-+#define cpu_has_32fpr			0
-+#define cpu_has_counter			1
-+/* #define cpu_has_watch		? */
-+/* #define cpu_has_divec		? */
-+/* #define cpu_has_vce			? */
-+/* #define cpu_has_cache_cdex_p		? */
-+/* #define cpu_has_cache_cdex_s		? */
-+/* #define cpu_has_prefetch		? */
-+/* #define cpu_has_mcheck		? */
-+#define cpu_has_ejtag			1
-+
-+#if !defined(CONFIG_ATHEROS_AR5312)
-+#  define cpu_has_llsc			1
-+#else
-+/*
-+ * The MIPS 4Kc V0.9 core in the AR5312/AR2312 have problems with the
-+ * ll/sc instructions.
-+ */
-+#  define cpu_has_llsc			0
-+#endif
-+
-+#define cpu_has_mips16			0
-+#define cpu_has_mdmx			0
-+#define cpu_has_mips3d			0
-+#define cpu_has_smartmips		0
-+
-+/* #define cpu_has_vtag_icache		? */
-+/* #define cpu_has_dc_aliases		? */
-+/* #define cpu_has_ic_fills_f_dc	? */
-+/* #define cpu_has_pindexed_dcache	? */
-+
-+/* #define cpu_icache_snoops_remote_store	? */
-+
-+#define cpu_has_mips32r1		1
-+
-+#if !defined(CONFIG_ATHEROS_AR5312)
-+#  define cpu_has_mips32r2		1
-+#endif
-+
-+#define cpu_has_mips64r1		0
-+#define cpu_has_mips64r2		0
-+
-+#define cpu_has_dsp			0
-+#define cpu_has_mipsmt			0
-+
-+/* #define cpu_has_nofpuex		? */
-+#define cpu_has_64bits			0
-+#define cpu_has_64bit_zero_reg		0
-+#define cpu_has_64bit_gp_regs		0
-+#define cpu_has_64bit_addresses		0
-+
-+/* #define cpu_has_inclusive_pcaches	? */
-+
-+/* #define cpu_dcache_line_size()	? */
-+/* #define cpu_icache_line_size()	? */
-+
-+#endif /* __ASM_MACH_ATHEROS_CPU_FEATURE_OVERRIDES_H */
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/dma-coherence.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/dma-coherence.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/dma-coherence.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/dma-coherence.h	2011-05-15 21:41:19.000000000 +0200
-@@ -0,0 +1,76 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2006  Ralf Baechle <ralf@linux-mips.org>
-+ * Copyright (C) 2007  Felix Fietkau <nbd@openwrt.org>
-+ *
-+ */
-+#ifndef __ASM_MACH_GENERIC_DMA_COHERENCE_H
-+#define __ASM_MACH_GENERIC_DMA_COHERENCE_H
-+
-+#define PCI_DMA_OFFSET	0x20000000
-+
-+#include <linux/device.h> 
-+
-+static inline dma_addr_t ar231x_dev_offset(struct device *dev) 
-+{ 
-+#ifdef CONFIG_PCI 
-+       extern struct bus_type pci_bus_type; 
-+ 
-+       if (dev && dev->bus == &pci_bus_type) 
-+               return PCI_DMA_OFFSET; 
-+       else 
-+#endif 
-+	       return 0; 
-+} 
-+
-+static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size)
-+{
-+	return virt_to_phys(addr) + ar231x_dev_offset(dev);
-+}
-+
-+static inline dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page)
-+{
-+	return page_to_phys(page) + ar231x_dev_offset(dev);
-+}
-+
-+static inline unsigned long plat_dma_addr_to_phys(struct device *dev,
-+	dma_addr_t dma_addr)
-+{
-+	return dma_addr - ar231x_dev_offset(dev);
-+}
-+
-+static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr,
-+	size_t size, enum dma_data_direction direction)
-+{
-+}
-+
-+static inline int plat_dma_supported(struct device *dev, u64 mask)
-+{
-+	return 1;
-+}
-+
-+static inline void plat_extra_sync_for_device(struct device *dev)
-+{
-+	return;
-+}
-+
-+static inline int plat_dma_mapping_error(struct device *dev,
-+					 dma_addr_t dma_addr)
-+{
-+	return 0;
-+}
-+
-+static inline int plat_device_is_coherent(struct device *dev)
-+{
-+#ifdef CONFIG_DMA_COHERENT
-+	return 1;
-+#endif
-+#ifdef CONFIG_DMA_NONCOHERENT
-+	return 0;
-+#endif
-+}
-+
-+#endif /* __ASM_MACH_GENERIC_DMA_COHERENCE_H */
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/gpio.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/gpio.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/gpio.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/gpio.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,84 @@
-+#ifndef _ATHEROS_GPIO_H_
-+#define _ATHEROS_GPIO_H_
-+
-+#include <ar231x.h>
-+
-+struct ar231x_gpiodev {
-+	u32 valid_mask;
-+	u32 (*get_output)(void);
-+	u32 (*set_output)(u32 mask, u32 val);
-+	u32 (*get)(void);
-+	u32 (*set)(u32 mask, u32 val);
-+};
-+
-+extern const struct ar231x_gpiodev *ar231x_gpiodev;
-+
-+/*
-+ * Wrappers for the generic GPIO layer
-+ */
-+
-+static inline int gpio_direction_input(unsigned gpio) {
-+	u32 mask = 1 << gpio;
-+
-+	if (!(ar231x_gpiodev->valid_mask & mask))
-+		return -ENXIO;
-+
-+	ar231x_gpiodev->set_output(mask, 0);
-+	return 0;
-+}
-+
-+static inline void gpio_set_value(unsigned gpio, int value) {
-+	u32 mask = 1 << gpio;
-+
-+	if (!(ar231x_gpiodev->valid_mask & mask))
-+		return;
-+
-+	ar231x_gpiodev->set(mask, (!!value) * mask);
-+}
-+
-+static inline int gpio_direction_output(unsigned gpio, int value) {
-+	u32 mask = 1 << gpio;
-+
-+	if (!(ar231x_gpiodev->valid_mask & mask))
-+		return -ENXIO;
-+
-+	ar231x_gpiodev->set_output(mask, mask);
-+	ar231x_gpiodev->set(mask, (!!value) * mask);
-+	return 0;
-+}
-+
-+/* Reads the gpio pin.  Unchecked function */
-+static inline int gpio_get_value(unsigned gpio) {
-+	u32 mask = 1 << gpio;
-+
-+	if (!(ar231x_gpiodev->valid_mask & mask))
-+		return 0;
-+
-+	return !!(ar231x_gpiodev->get() & mask);
-+}
-+
-+static inline int gpio_request(unsigned gpio, const char *label) {
-+	return 0;
-+}
-+
-+static inline void gpio_free(unsigned gpio) {
-+}
-+
-+/* Returns IRQ to attach for gpio.  Unchecked function */
-+static inline int gpio_to_irq(unsigned gpio) {
-+	return AR531X_GPIO_IRQ(gpio);
-+}
-+
-+/* Returns gpio for IRQ attached.  Unchecked function */
-+static inline int irq_to_gpio(unsigned irq) {
-+	return (irq - (AR531X_GPIO_IRQ(0)));
-+}
-+
-+static inline int gpio_set_debounce(unsigned gpio, unsigned debounce)
-+{
-+	return -ENOSYS;
-+}
-+
-+#include <asm-generic/gpio.h> /* cansleep wrappers */
-+
-+#endif
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/reset.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/reset.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/reset.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/reset.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,6 @@
-+#ifndef __AR531X_RESET_H
-+#define __AR531X_RESET_H
-+
-+void ar531x_disable_reset_button(void);
-+
-+#endif /* __AR531X_RESET_H */
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/war.h linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/war.h
---- linux-2.6.39-rc7.orig/arch/mips/include/asm/mach-ar231x/war.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/arch/mips/include/asm/mach-ar231x/war.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,25 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Felix Fietkau <nbd@openwrt.org>
-+ */
-+#ifndef __ASM_MIPS_MACH_ATHEROS_WAR_H
-+#define __ASM_MIPS_MACH_ATHEROS_WAR_H
-+
-+#define R4600_V1_INDEX_ICACHEOP_WAR	0
-+#define R4600_V1_HIT_CACHEOP_WAR	0
-+#define R4600_V2_HIT_CACHEOP_WAR	0
-+#define R5432_CP0_INTERRUPT_WAR		0
-+#define BCM1250_M3_WAR			0
-+#define SIBYTE_1956_WAR			0
-+#define MIPS4K_ICACHE_REFILL_WAR	0
-+#define MIPS_CACHE_SYNC_WAR		0
-+#define TX49XX_ICACHE_INDEX_INV_WAR	0
-+#define RM9000_CDEX_SMP_WAR		0
-+#define ICACHE_REFILLS_WORKAROUND_WAR	0
-+#define R10000_LLSC_WAR			0
-+#define MIPS34K_MISSED_ITLB_WAR		0
-+
-+#endif /* __ASM_MIPS_MACH_ATHEROS_WAR_H */
-diff -Nur linux-2.6.39-rc7.orig/arch/mips/kernel/cevt-r4k.c linux-2.6.39-rc7/arch/mips/kernel/cevt-r4k.c
---- linux-2.6.39-rc7.orig/arch/mips/kernel/cevt-r4k.c	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/arch/mips/kernel/cevt-r4k.c	2011-05-15 21:34:57.000000000 +0200
-@@ -168,20 +168,23 @@
- 	struct clock_event_device *cd;
- 	unsigned int irq;
- 
--	if (!cpu_has_counter || !mips_hpt_frequency)
--		return -ENXIO;
--
--	if (!c0_compare_int_usable())
--		return -ENXIO;
--
- 	/*
- 	 * With vectored interrupts things are getting platform specific.
- 	 * get_c0_compare_int is a hook to allow a platform to return the
- 	 * interrupt number of it's liking.
- 	 */
- 	irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
--	if (get_c0_compare_int)
-+	if (get_c0_compare_int) {
- 		irq = get_c0_compare_int();
-+		if ((irq >= MIPS_CPU_IRQ_BASE) && (irq < MIPS_CPU_IRQ_BASE + 8))
-+			cp0_compare_irq = irq - MIPS_CPU_IRQ_BASE;
-+	}
-+
-+	if (!cpu_has_counter || !mips_hpt_frequency)
-+		return -ENXIO;
-+
-+	if (!c0_compare_int_usable())
-+		return -ENXIO;
- 
- 	cd = &per_cpu(mips_clockevent_device, cpu);
- 
-diff -Nur linux-2.6.39-rc7.orig/drivers/mtd/devices/Kconfig linux-2.6.39-rc7/drivers/mtd/devices/Kconfig
---- linux-2.6.39-rc7.orig/drivers/mtd/devices/Kconfig	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/drivers/mtd/devices/Kconfig	2011-05-15 21:34:57.000000000 +0200
-@@ -112,6 +112,10 @@
- 	  Set up your spi devices with the right board-specific platform data,
- 	  if you want to specify device partitioning.
- 
-+config MTD_AR2315
-+	tristate "Atheros AR2315+ SPI Flash support"
-+	depends on ATHEROS_AR2315
-+
- config MTD_SLRAM
- 	tristate "Uncached system RAM"
- 	help
-diff -Nur linux-2.6.39-rc7.orig/drivers/mtd/devices/Makefile linux-2.6.39-rc7/drivers/mtd/devices/Makefile
---- linux-2.6.39-rc7.orig/drivers/mtd/devices/Makefile	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/drivers/mtd/devices/Makefile	2011-05-15 21:34:57.000000000 +0200
-@@ -17,3 +17,4 @@
- obj-$(CONFIG_MTD_DATAFLASH)	+= mtd_dataflash.o
- obj-$(CONFIG_MTD_M25P80)	+= m25p80.o
- obj-$(CONFIG_MTD_SST25L)	+= sst25l.o
-+obj-$(CONFIG_MTD_AR2315)	+= ar2315.o
-diff -Nur linux-2.6.39-rc7.orig/drivers/mtd/devices/ar2315.c linux-2.6.39-rc7/drivers/mtd/devices/ar2315.c
---- linux-2.6.39-rc7.orig/drivers/mtd/devices/ar2315.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/drivers/mtd/devices/ar2315.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,517 @@
-+
-+/*
-+ * MTD driver for the SPI Flash Memory support on Atheros AR2315
-+ *
-+ * Copyright (c) 2005-2006 Atheros Communications Inc.
-+ * Copyright (C) 2006-2007 FON Technology, SL.
-+ * Copyright (C) 2006-2007 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
-+ *
-+ * This code is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/types.h>
-+#include <linux/version.h>
-+#include <linux/errno.h>
-+#include <linux/slab.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/partitions.h>
-+#include <linux/platform_device.h>
-+#include <linux/sched.h>
-+#include <linux/root_dev.h>
-+#include <linux/delay.h>
-+#include <asm/delay.h>
-+#include <asm/io.h>
-+
-+#include <ar2315_spiflash.h>
-+#include <ar231x_platform.h>
-+#include <ar231x.h>
-+
-+
-+#define SPIFLASH "spiflash: "
-+#define busy_wait(_priv, _condition, _wait) do { \
-+	while (_condition) { \
-+		spin_unlock_bh(&_priv->lock); \
-+		if (_wait > 1) \
-+			msleep(_wait); \
-+		else if ((_wait == 1) && need_resched()) \
-+			schedule(); \
-+		else \
-+			udelay(1); \
-+		spin_lock_bh(&_priv->lock); \
-+	} \
-+} while (0)
-+
-+enum {
-+	FLASH_NONE,
-+	FLASH_1MB,
-+	FLASH_2MB,
-+	FLASH_4MB,
-+	FLASH_8MB,
-+	FLASH_16MB,
-+};
-+
-+/* Flash configuration table */
-+struct flashconfig {
-+	u32 byte_cnt;
-+	u32 sector_cnt;
-+	u32 sector_size;
-+};
-+
-+const struct flashconfig flashconfig_tbl[] = {
-+	[FLASH_NONE] = { 0, 0, 0},
-+	[FLASH_1MB]  = { STM_1MB_BYTE_COUNT, STM_1MB_SECTOR_COUNT, STM_1MB_SECTOR_SIZE},
-+	[FLASH_2MB]  = { STM_2MB_BYTE_COUNT, STM_2MB_SECTOR_COUNT, STM_2MB_SECTOR_SIZE},
-+	[FLASH_4MB]  = { STM_4MB_BYTE_COUNT, STM_4MB_SECTOR_COUNT, STM_4MB_SECTOR_SIZE},
-+	[FLASH_8MB]  = { STM_8MB_BYTE_COUNT, STM_8MB_SECTOR_COUNT, STM_8MB_SECTOR_SIZE},
-+	[FLASH_16MB] = { STM_16MB_BYTE_COUNT, STM_16MB_SECTOR_COUNT, STM_16MB_SECTOR_SIZE}
-+};
-+
-+/* Mapping of generic opcodes to STM serial flash opcodes */
-+enum {
-+	SPI_WRITE_ENABLE,
-+	SPI_WRITE_DISABLE,
-+	SPI_RD_STATUS,
-+	SPI_WR_STATUS,
-+	SPI_RD_DATA,
-+	SPI_FAST_RD_DATA,
-+	SPI_PAGE_PROGRAM,
-+	SPI_SECTOR_ERASE,
-+	SPI_BULK_ERASE,
-+	SPI_DEEP_PWRDOWN,
-+	SPI_RD_SIG,
-+};
-+
-+struct opcodes {
-+    __u16 code;
-+    __s8 tx_cnt;
-+    __s8 rx_cnt;
-+};
-+const struct opcodes stm_opcodes[] = {
-+	[SPI_WRITE_ENABLE] = {STM_OP_WR_ENABLE, 1, 0},
-+	[SPI_WRITE_DISABLE] = {STM_OP_WR_DISABLE, 1, 0},
-+	[SPI_RD_STATUS] = {STM_OP_RD_STATUS, 1, 1},
-+	[SPI_WR_STATUS] = {STM_OP_WR_STATUS, 1, 0},
-+	[SPI_RD_DATA] = {STM_OP_RD_DATA, 4, 4},
-+	[SPI_FAST_RD_DATA] = {STM_OP_FAST_RD_DATA, 5, 0},
-+	[SPI_PAGE_PROGRAM] = {STM_OP_PAGE_PGRM, 8, 0},
-+	[SPI_SECTOR_ERASE] = {STM_OP_SECTOR_ERASE, 4, 0},
-+	[SPI_BULK_ERASE] = {STM_OP_BULK_ERASE, 1, 0},
-+	[SPI_DEEP_PWRDOWN] = {STM_OP_DEEP_PWRDOWN, 1, 0},
-+	[SPI_RD_SIG] = {STM_OP_RD_SIG, 4, 1},
-+};
-+
-+/* Driver private data structure */
-+struct spiflash_priv {
-+	struct mtd_info mtd;
-+	void *readaddr; /* memory mapped data for read  */
-+	void *mmraddr;  /* memory mapped register space */
-+	wait_queue_head_t wq;
-+	spinlock_t lock;
-+	int state;
-+};
-+
-+#define to_spiflash(_mtd) container_of(_mtd, struct spiflash_priv, mtd)
-+
-+enum {
-+	FL_READY,
-+	FL_READING,
-+	FL_ERASING,
-+	FL_WRITING
-+};
-+
-+/***************************************************************************************************/
-+
-+static u32
-+spiflash_read_reg(struct spiflash_priv *priv, int reg)
-+{
-+	return ar231x_read_reg((u32) priv->mmraddr + reg);
-+}
-+
-+static void
-+spiflash_write_reg(struct spiflash_priv *priv, int reg, u32 data)
-+{
-+	ar231x_write_reg((u32) priv->mmraddr + reg, data);
-+}
-+
-+static u32
-+spiflash_wait_busy(struct spiflash_priv *priv)
-+{
-+	u32 reg;
-+
-+	busy_wait(priv, (reg = spiflash_read_reg(priv, SPI_FLASH_CTL)) &
-+		SPI_CTL_BUSY, 0);
-+	return reg;
-+}
-+
-+static u32
-+spiflash_sendcmd (struct spiflash_priv *priv, int opcode, u32 addr)
-+{
-+	const struct opcodes *op;
-+	u32 reg, mask;
-+
-+	op = &stm_opcodes[opcode];
-+	reg = spiflash_wait_busy(priv);
-+	spiflash_write_reg(priv, SPI_FLASH_OPCODE,
-+		((u32) op->code) | (addr << 8));
-+
-+	reg &= ~SPI_CTL_TX_RX_CNT_MASK;
-+	reg |= SPI_CTL_START | op->tx_cnt | (op->rx_cnt << 4);
-+
-+	spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
-+	spiflash_wait_busy(priv);
-+
-+	if (!op->rx_cnt)
-+		return 0;
-+
-+	reg = spiflash_read_reg(priv, SPI_FLASH_DATA);
-+
-+	switch (op->rx_cnt) {
-+	case 1:
-+		mask = 0x000000ff;
-+		break;
-+	case 2:
-+		mask = 0x0000ffff;
-+		break;
-+	case 3:
-+		mask = 0x00ffffff;
-+		break;
-+	default:
-+		mask = 0xffffffff;
-+		break;
-+	}
-+	reg &= mask;
-+
-+	return reg;
-+}
-+
-+
-+/*
-+ * Probe SPI flash device
-+ * Function returns 0 for failure.
-+ * and flashconfig_tbl array index for success.
-+ */
-+static int
-+spiflash_probe_chip (struct spiflash_priv *priv)
-+{
-+	u32 sig;
-+	int flash_size;
-+
-+	/* Read the signature on the flash device */
-+	spin_lock_bh(&priv->lock);
-+	sig = spiflash_sendcmd(priv, SPI_RD_SIG, 0);
-+	spin_unlock_bh(&priv->lock);
-+
-+	switch (sig) {
-+	case STM_8MBIT_SIGNATURE:
-+		flash_size = FLASH_1MB;
-+		break;
-+	case STM_16MBIT_SIGNATURE:
-+		flash_size = FLASH_2MB;
-+		break;
-+	case STM_32MBIT_SIGNATURE:
-+		flash_size = FLASH_4MB;
-+		break;
-+	case STM_64MBIT_SIGNATURE:
-+		flash_size = FLASH_8MB;
-+		break;
-+	case STM_128MBIT_SIGNATURE:
-+		flash_size = FLASH_16MB;
-+		break;
-+	default:
-+		printk (KERN_WARNING SPIFLASH "Read of flash device signature failed!\n");
-+		return 0;
-+	}
-+
-+	return flash_size;
-+}
-+
-+
-+/* wait until the flash chip is ready and grab a lock */
-+static int spiflash_wait_ready(struct spiflash_priv *priv, int state)
-+{
-+	DECLARE_WAITQUEUE(wait, current);
-+
-+retry:
-+	spin_lock_bh(&priv->lock);
-+	if (priv->state != FL_READY) {
-+		set_current_state(TASK_UNINTERRUPTIBLE);
-+		add_wait_queue(&priv->wq, &wait);
-+		spin_unlock_bh(&priv->lock);
-+		schedule();
-+		remove_wait_queue(&priv->wq, &wait);
-+
-+		if(signal_pending(current))
-+			return 0;
-+
-+		goto retry;
-+	}
-+	priv->state = state;
-+
-+	return 1;
-+}
-+
-+static inline void spiflash_done(struct spiflash_priv *priv)
-+{
-+	priv->state = FL_READY;
-+	spin_unlock_bh(&priv->lock);
-+	wake_up(&priv->wq);
-+}
-+
-+static void
-+spiflash_wait_complete(struct spiflash_priv *priv, unsigned int timeout)
-+{
-+	busy_wait(priv, spiflash_sendcmd(priv, SPI_RD_STATUS, 0) &
-+		SPI_STATUS_WIP, timeout);
-+	spiflash_done(priv);
-+}
-+
-+
-+
-+static int
-+spiflash_erase (struct mtd_info *mtd, struct erase_info *instr)
-+{
-+	struct spiflash_priv *priv = to_spiflash(mtd);
-+	const struct opcodes *op;
-+	u32 temp, reg;
-+
-+	if (instr->addr + instr->len > mtd->size)
-+		return -EINVAL;
-+
-+	if (!spiflash_wait_ready(priv, FL_ERASING))
-+		return -EINTR;
-+
-+	spiflash_sendcmd(priv, SPI_WRITE_ENABLE, 0);
-+	reg = spiflash_wait_busy(priv);
-+
-+	op = &stm_opcodes[SPI_SECTOR_ERASE];
-+	temp = ((u32)instr->addr << 8) | (u32)(op->code);
-+	spiflash_write_reg(priv, SPI_FLASH_OPCODE, temp);
-+
-+	reg &= ~SPI_CTL_TX_RX_CNT_MASK;
-+	reg |= op->tx_cnt | SPI_CTL_START;
-+	spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
-+
-+	spiflash_wait_complete(priv, 20);
-+
-+	instr->state = MTD_ERASE_DONE;
-+	mtd_erase_callback(instr);
-+
-+	return 0;
-+}
-+
-+static int
-+spiflash_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
-+{
-+	struct spiflash_priv *priv = to_spiflash(mtd);
-+	u8 *read_addr;
-+
-+	if (!len)
-+		return 0;
-+
-+	if (from + len > mtd->size)
-+		return -EINVAL;
-+
-+	*retlen = len;
-+
-+	if (!spiflash_wait_ready(priv, FL_READING))
-+		return -EINTR;
-+
-+	read_addr = (u8 *)(priv->readaddr + from);
-+	memcpy_fromio(buf, read_addr, len);
-+	spiflash_done(priv);
-+
-+	return 0;
-+}
-+
-+static int
-+spiflash_write (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u8 *buf)
-+{
-+	struct spiflash_priv *priv = to_spiflash(mtd);
-+	u32 opcode, bytes_left;
-+
-+	*retlen = 0;
-+
-+	if (!len)
-+		return 0;
-+
-+	if (to + len > mtd->size)
-+		return -EINVAL;
-+
-+	bytes_left = len;
-+
-+	do {
-+		u32 read_len, reg, page_offset, spi_data = 0;
-+
-+		read_len = min(bytes_left, sizeof(u32));
-+
-+		/* 32-bit writes cannot span across a page boundary
-+		 * (256 bytes). This types of writes require two page
-+		 * program operations to handle it correctly. The STM part
-+		 * will write the overflow data to the beginning of the
-+		 * current page as opposed to the subsequent page.
-+		 */
-+		page_offset = (to & (STM_PAGE_SIZE - 1)) + read_len;
-+
-+		if (page_offset > STM_PAGE_SIZE)
-+			read_len -= (page_offset - STM_PAGE_SIZE);
-+
-+		if (!spiflash_wait_ready(priv, FL_WRITING))
-+			return -EINTR;
-+
-+		spiflash_sendcmd(priv, SPI_WRITE_ENABLE, 0);
-+		spi_data = 0;
-+		switch (read_len) {
-+		case 4:
-+			spi_data |= buf[3] << 24;
-+			/* fall through */
-+		case 3:
-+			spi_data |= buf[2] << 16;
-+			/* fall through */
-+		case 2:
-+			spi_data |= buf[1] << 8;
-+			/* fall through */
-+		case 1:
-+			spi_data |= buf[0] & 0xff;
-+			break;
-+		default:
-+			break;
-+		}
-+
-+		spiflash_write_reg(priv, SPI_FLASH_DATA, spi_data);
-+		opcode = stm_opcodes[SPI_PAGE_PROGRAM].code |
-+			(to & 0x00ffffff) << 8;
-+		spiflash_write_reg(priv, SPI_FLASH_OPCODE, opcode);
-+
-+		reg = spiflash_read_reg(priv, SPI_FLASH_CTL);
-+		reg &= ~SPI_CTL_TX_RX_CNT_MASK;
-+		reg |= (read_len + 4) | SPI_CTL_START;
-+		spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
-+
-+		spiflash_wait_complete(priv, 1);
-+
-+		bytes_left -= read_len;
-+		to += read_len;
-+		buf += read_len;
-+
-+		*retlen += read_len;
-+	} while (bytes_left != 0);
-+
-+	return 0;
-+}
-+
-+
-+#ifdef CONFIG_MTD_PARTITIONS
-+static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", "MyLoader", NULL };
-+#endif
-+
-+
-+static int
-+spiflash_probe(struct platform_device *pdev)
-+{
-+	struct spiflash_priv *priv;
-+	struct mtd_partition *parts;
-+	struct mtd_info *mtd;
-+	int index, num_parts;
-+	int result = 0;
-+
-+	priv = kzalloc(sizeof(struct spiflash_priv), GFP_KERNEL);
-+	spin_lock_init(&priv->lock);
-+	init_waitqueue_head(&priv->wq);
-+	priv->state = FL_READY;
-+	mtd = &priv->mtd;
-+
-+	priv->mmraddr = ioremap_nocache(SPI_FLASH_MMR, SPI_FLASH_MMR_SIZE);
-+	if (!priv->mmraddr) {
-+		printk(KERN_WARNING SPIFLASH "Failed to map flash device\n");
-+		goto error;
-+	}
-+
-+	index = spiflash_probe_chip(priv);
-+	if (!index) {
-+		printk (KERN_WARNING SPIFLASH "Found no serial flash device\n");
-+		goto error;
-+	}
-+
-+	priv->readaddr = ioremap_nocache(SPI_FLASH_READ, flashconfig_tbl[index].byte_cnt);
-+	if (!priv->readaddr) {
-+		printk (KERN_WARNING SPIFLASH "Failed to map flash device\n");
-+		goto error;
-+	}
-+
-+	platform_set_drvdata(pdev, priv);
-+	mtd->name = "spiflash";
-+	mtd->type = MTD_NORFLASH;
-+	mtd->flags = (MTD_CAP_NORFLASH|MTD_WRITEABLE);
-+	mtd->size = flashconfig_tbl[index].byte_cnt;
-+	mtd->erasesize = flashconfig_tbl[index].sector_size;
-+	mtd->writesize = 1;
-+	mtd->numeraseregions = 0;
-+	mtd->eraseregions = NULL;
-+	mtd->erase = spiflash_erase;
-+	mtd->read = spiflash_read;
-+	mtd->write = spiflash_write;
-+	mtd->owner = THIS_MODULE;
-+
-+#ifdef CONFIG_MTD_PARTITIONS
-+	/* parse redboot partitions */
-+	num_parts = parse_mtd_partitions(mtd, part_probe_types, &parts, 0);
-+	if (!num_parts)
-+		goto error;
-+
-+	result = add_mtd_partitions(mtd, parts, num_parts);
-+#endif
-+
-+	return result;
-+
-+error:
-+	if (priv->mmraddr)
-+		iounmap(priv->mmraddr);
-+	kfree(priv);
-+	return -ENXIO;
-+}
-+
-+static int
-+spiflash_remove (struct platform_device *pdev)
-+{
-+	struct spiflash_priv *priv = platform_get_drvdata(pdev);
-+	struct mtd_info *mtd = &priv->mtd;
-+
-+	del_mtd_partitions(mtd);
-+	iounmap(priv->mmraddr);
-+	iounmap(priv->readaddr);
-+	kfree(priv);
-+
-+	return 0;
-+}
-+
-+struct platform_driver spiflash_driver = {
-+	.driver.name = "spiflash",
-+	.probe = spiflash_probe,
-+	.remove = spiflash_remove,
-+};
-+
-+int __init
-+spiflash_init (void)
-+{
-+	return platform_driver_register(&spiflash_driver);
-+}
-+
-+void __exit
-+spiflash_exit (void)
-+{
-+	return platform_driver_unregister(&spiflash_driver);
-+}
-+
-+module_init (spiflash_init);
-+module_exit (spiflash_exit);
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("OpenWrt.org, Atheros Communications Inc");
-+MODULE_DESCRIPTION("MTD driver for SPI Flash on Atheros SOC");
-+
-diff -Nur linux-2.6.39-rc7.orig/drivers/mtd/redboot.c linux-2.6.39-rc7/drivers/mtd/redboot.c
---- linux-2.6.39-rc7.orig/drivers/mtd/redboot.c	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/drivers/mtd/redboot.c	2011-05-15 21:34:57.000000000 +0200
-@@ -55,6 +55,22 @@
- 	return 1;
- }
- 
-+static uint32_t mtd_get_offset_erasesize(struct mtd_info *mtd, uint64_t offset)
-+{
-+	struct mtd_erase_region_info *regions = mtd->eraseregions;
-+	int i;
-+
-+	for (i = 0; i < mtd->numeraseregions; i++) {
-+		if (regions[i].offset +
-+		    regions[i].numblocks * regions[i].erasesize <= offset)
-+			continue;
-+
-+		return regions[i].erasesize;
-+	}
-+
-+	return mtd->erasesize;
-+}
-+
- static int parse_redboot_partitions(struct mtd_info *master,
-                              struct mtd_partition **pparts,
-                              unsigned long fis_origin)
-@@ -70,36 +86,38 @@
- 	int namelen = 0;
- 	int nulllen = 0;
- 	int numslots;
-+	int first_slot;
- 	unsigned long offset;
- #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
- 	static char nullstring[] = "unallocated";
- #endif
- 
-+	buf = vmalloc(master->erasesize);
-+	if (!buf)
-+		return -ENOMEM;
-+
-+ restart:
- 	if ( directory < 0 ) {
- 		offset = master->size + directory * master->erasesize;
--		while (master->block_isbad && 
-+		while (master->block_isbad &&
- 		       master->block_isbad(master, offset)) {
- 			if (!offset) {
- 			nogood:
- 				printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n");
-+				vfree(buf);
- 				return -EIO;
- 			}
- 			offset -= master->erasesize;
- 		}
- 	} else {
- 		offset = directory * master->erasesize;
--		while (master->block_isbad && 
-+		while (master->block_isbad &&
- 		       master->block_isbad(master, offset)) {
- 			offset += master->erasesize;
- 			if (offset == master->size)
- 				goto nogood;
- 		}
- 	}
--	buf = vmalloc(master->erasesize);
--
--	if (!buf)
--		return -ENOMEM;
--
- 	printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n",
- 	       master->name, offset);
- 
-@@ -171,13 +189,21 @@
- 	}
- 	if (i == numslots) {
- 		/* Didn't find it */
-+		if (offset + master->erasesize < master->size) {
-+			/* not at the end of the flash yet, maybe next block :) */
-+			directory++;
-+			goto restart;
-+		}
- 		printk(KERN_NOTICE "No RedBoot partition table detected in %s\n",
- 		       master->name);
- 		ret = 0;
- 		goto out;
- 	}
- 
--	for (i = 0; i < numslots; i++) {
-+	first_slot = (buf[i].flash_base & (master->erasesize - 1)) /
-+		     sizeof(struct fis_image_desc);
-+
-+	for (i = first_slot; i < first_slot + numslots; i++) {
- 		struct fis_list *new_fl, **prev;
- 
- 		if (buf[i].name[0] == 0xff) {
-diff -Nur linux-2.6.39-rc7.orig/drivers/net/Kconfig linux-2.6.39-rc7/drivers/net/Kconfig
---- linux-2.6.39-rc7.orig/drivers/net/Kconfig	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/drivers/net/Kconfig	2011-05-15 21:34:57.000000000 +0200
-@@ -251,6 +251,12 @@
- 	help
- 	  Select this if your platform comes with an external 93CX6 eeprom.
- 
-+config AR231X_ETHERNET
-+	tristate "AR231x Ethernet support"
-+	depends on ATHEROS_AR231X
-+	help
-+	  Support for the AR231x/531x ethernet controller
-+
- config MACE
- 	tristate "MACE (Power Mac ethernet) support"
- 	depends on PPC_PMAC && PPC32
-diff -Nur linux-2.6.39-rc7.orig/drivers/net/Makefile linux-2.6.39-rc7/drivers/net/Makefile
---- linux-2.6.39-rc7.orig/drivers/net/Makefile	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/drivers/net/Makefile	2011-05-15 21:34:57.000000000 +0200
-@@ -226,6 +226,7 @@
- obj-$(CONFIG_KORINA) += korina.o
- obj-$(CONFIG_MIPS_JAZZ_SONIC) += jazzsonic.o
- obj-$(CONFIG_MIPS_AU1X00_ENET) += au1000_eth.o
-+obj-$(CONFIG_AR231X_ETHERNET) += ar231x.o
- obj-$(CONFIG_MIPS_SIM_NET) += mipsnet.o
- obj-$(CONFIG_SGI_IOC3_ETH) += ioc3-eth.o
- obj-$(CONFIG_DECLANCE) += declance.o
-diff -Nur linux-2.6.39-rc7.orig/drivers/net/ar231x.c linux-2.6.39-rc7/drivers/net/ar231x.c
---- linux-2.6.39-rc7.orig/drivers/net/ar231x.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/drivers/net/ar231x.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,1293 @@
-+/*
-+ * ar231x.c: Linux driver for the Atheros AR231x Ethernet device.
-+ *
-+ * Copyright (C) 2004 by Sameer Dekate <sdekate@arubanetworks.com>
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
-+ *
-+ * Thanks to Atheros for providing hardware and documentation
-+ * enabling me to write this driver.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * Additional credits:
-+ * 	This code is taken from John Taylor's Sibyte driver and then
-+ * 	modified for the AR2313.
-+ */
-+
-+#include <linux/module.h>
-+#include <linux/version.h>
-+#include <linux/types.h>
-+#include <linux/errno.h>
-+#include <linux/ioport.h>
-+#include <linux/pci.h>
-+#include <linux/netdevice.h>
-+#include <linux/etherdevice.h>
-+#include <linux/skbuff.h>
-+#include <linux/init.h>
-+#include <linux/delay.h>
-+#include <linux/mm.h>
-+#include <linux/highmem.h>
-+#include <linux/sockios.h>
-+#include <linux/pkt_sched.h>
-+#include <linux/mii.h>
-+#include <linux/phy.h>
-+#include <linux/ethtool.h>
-+#include <linux/ctype.h>
-+#include <linux/platform_device.h>
-+
-+#include <net/sock.h>
-+#include <net/ip.h>
-+
-+#include <asm/system.h>
-+#include <asm/io.h>
-+#include <asm/irq.h>
-+#include <asm/byteorder.h>
-+#include <asm/uaccess.h>
-+#include <asm/bootinfo.h>
-+
-+#define AR2313_MTU                     1692
-+#define AR2313_PRIOS                   1
-+#define AR2313_QUEUES                  (2*AR2313_PRIOS)
-+#define AR2313_DESCR_ENTRIES           64
-+
-+
-+#ifndef min
-+#define min(a,b)	(((a)<(b))?(a):(b))
-+#endif
-+
-+#ifndef SMP_CACHE_BYTES
-+#define SMP_CACHE_BYTES	L1_CACHE_BYTES
-+#endif
-+
-+#define AR2313_MBOX_SET_BIT  0x8
-+
-+#include "ar231x.h"
-+
-+/*
-+ * New interrupt handler strategy:
-+ *
-+ * An old interrupt handler worked using the traditional method of
-+ * replacing an skbuff with a new one when a packet arrives. However
-+ * the rx rings do not need to contain a static number of buffer
-+ * descriptors, thus it makes sense to move the memory allocation out
-+ * of the main interrupt handler and do it in a bottom half handler
-+ * and only allocate new buffers when the number of buffers in the
-+ * ring is below a certain threshold. In order to avoid starving the
-+ * NIC under heavy load it is however necessary to force allocation
-+ * when hitting a minimum threshold. The strategy for alloction is as
-+ * follows:
-+ *
-+ *     RX_LOW_BUF_THRES    - allocate buffers in the bottom half
-+ *     RX_PANIC_LOW_THRES  - we are very low on buffers, allocate
-+ *                           the buffers in the interrupt handler
-+ *     RX_RING_THRES       - maximum number of buffers in the rx ring
-+ *
-+ * One advantagous side effect of this allocation approach is that the
-+ * entire rx processing can be done without holding any spin lock
-+ * since the rx rings and registers are totally independent of the tx
-+ * ring and its registers.  This of course includes the kmalloc's of
-+ * new skb's. Thus start_xmit can run in parallel with rx processing
-+ * and the memory allocation on SMP systems.
-+ *
-+ * Note that running the skb reallocation in a bottom half opens up
-+ * another can of races which needs to be handled properly. In
-+ * particular it can happen that the interrupt handler tries to run
-+ * the reallocation while the bottom half is either running on another
-+ * CPU or was interrupted on the same CPU. To get around this the
-+ * driver uses bitops to prevent the reallocation routines from being
-+ * reentered.
-+ *
-+ * TX handling can also be done without holding any spin lock, wheee
-+ * this is fun! since tx_csm is only written to by the interrupt
-+ * handler.
-+ */
-+
-+/*
-+ * Threshold values for RX buffer allocation - the low water marks for
-+ * when to start refilling the rings are set to 75% of the ring
-+ * sizes. It seems to make sense to refill the rings entirely from the
-+ * intrrupt handler once it gets below the panic threshold, that way
-+ * we don't risk that the refilling is moved to another CPU when the
-+ * one running the interrupt handler just got the slab code hot in its
-+ * cache.
-+ */
-+#define RX_RING_SIZE		AR2313_DESCR_ENTRIES
-+#define RX_PANIC_THRES	        (RX_RING_SIZE/4)
-+#define RX_LOW_THRES	        ((3*RX_RING_SIZE)/4)
-+#define CRC_LEN                 4
-+#define RX_OFFSET               2
-+
-+#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
-+#define VLAN_HDR                4
-+#else
-+#define VLAN_HDR                0
-+#endif
-+
-+#define AR2313_BUFSIZE		(AR2313_MTU + VLAN_HDR + ETH_HLEN + CRC_LEN + RX_OFFSET)
-+
-+#ifdef MODULE
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Sameer Dekate <sdekate@arubanetworks.com>, Imre Kaloz <kaloz@openwrt.org>, Felix Fietkau <nbd@openwrt.org>");
-+MODULE_DESCRIPTION("AR231x Ethernet driver");
-+#endif
-+
-+#define virt_to_phys(x) ((u32)(x) & 0x1fffffff)
-+
-+// prototypes
-+static void ar231x_halt(struct net_device *dev);
-+static void rx_tasklet_func(unsigned long data);
-+static void rx_tasklet_cleanup(struct net_device *dev);
-+static void ar231x_multicast_list(struct net_device *dev);
-+static void ar231x_tx_timeout(struct net_device *dev);
-+
-+static int ar231x_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum);
-+static int ar231x_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum, u16 value);
-+static int ar231x_mdiobus_reset(struct mii_bus *bus);
-+static int ar231x_mdiobus_probe (struct net_device *dev);
-+static void ar231x_adjust_link(struct net_device *dev);
-+
-+#ifndef ERR
-+#define ERR(fmt, args...) printk("%s: " fmt, __func__, ##args)
-+#endif
-+
-+#ifdef CONFIG_NET_POLL_CONTROLLER
-+static void
-+ar231x_netpoll(struct net_device *dev)
-+{
-+      unsigned long flags;
-+
-+      local_irq_save(flags);
-+      ar231x_interrupt(dev->irq, dev);
-+      local_irq_restore(flags);
-+}
-+#endif
-+
-+static const struct net_device_ops ar231x_ops = {
-+	.ndo_open 		= ar231x_open,
-+	.ndo_stop 		= ar231x_close,
-+	.ndo_start_xmit 	= ar231x_start_xmit,
-+	.ndo_set_multicast_list = ar231x_multicast_list,
-+	.ndo_do_ioctl 		= ar231x_ioctl,
-+	.ndo_change_mtu 	= eth_change_mtu,
-+	.ndo_validate_addr	= eth_validate_addr,
-+	.ndo_set_mac_address 	= eth_mac_addr,
-+	.ndo_tx_timeout		= ar231x_tx_timeout,
-+#ifdef CONFIG_NET_POLL_CONTROLLER
-+	.ndo_poll_controller	= ar231x_netpoll,
-+#endif
-+};
-+
-+int __init ar231x_probe(struct platform_device *pdev)
-+{
-+	struct net_device *dev;
-+	struct ar231x_private *sp;
-+	struct resource *res;
-+	unsigned long ar_eth_base;
-+	char buf[64];
-+
-+	dev = alloc_etherdev(sizeof(struct ar231x_private));
-+
-+	if (dev == NULL) {
-+		printk(KERN_ERR
-+			   "ar231x: Unable to allocate net_device structure!\n");
-+		return -ENOMEM;
-+	}
-+
-+	platform_set_drvdata(pdev, dev);
-+
-+	sp = netdev_priv(dev);
-+	sp->dev = dev;
-+	sp->cfg = pdev->dev.platform_data;
-+
-+	sprintf(buf, "eth%d_membase", pdev->id);
-+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, buf);
-+	if (!res)
-+		return -ENODEV;
-+
-+	sp->link = 0;
-+	ar_eth_base = res->start;
-+
-+	sprintf(buf, "eth%d_irq", pdev->id);
-+	dev->irq = platform_get_irq_byname(pdev, buf);
-+
-+	spin_lock_init(&sp->lock);
-+
-+	dev->features |= NETIF_F_HIGHDMA;
-+	dev->netdev_ops = &ar231x_ops;
-+
-+	tasklet_init(&sp->rx_tasklet, rx_tasklet_func, (unsigned long) dev);
-+	tasklet_disable(&sp->rx_tasklet);
-+
-+	sp->eth_regs =
-+		ioremap_nocache(virt_to_phys(ar_eth_base), sizeof(*sp->eth_regs));
-+	if (!sp->eth_regs) {
-+		printk("Can't remap eth registers\n");
-+		return (-ENXIO);
-+	}
-+
-+	/*
-+	 * When there's only one MAC, PHY regs are typically on ENET0,
-+	 * even though the MAC might be on ENET1.
-+	 * Needto remap PHY regs separately in this case
-+	 */
-+	if (virt_to_phys(ar_eth_base) == virt_to_phys(sp->phy_regs))
-+		sp->phy_regs = sp->eth_regs;
-+	else {
-+		sp->phy_regs =
-+			ioremap_nocache(virt_to_phys(sp->cfg->phy_base),
-+							sizeof(*sp->phy_regs));
-+		if (!sp->phy_regs) {
-+			printk("Can't remap phy registers\n");
-+			return (-ENXIO);
-+		}
-+	}
-+
-+	sp->dma_regs =
-+		ioremap_nocache(virt_to_phys(ar_eth_base + 0x1000),
-+						sizeof(*sp->dma_regs));
-+	dev->base_addr = (unsigned int) sp->dma_regs;
-+	if (!sp->dma_regs) {
-+		printk("Can't remap DMA registers\n");
-+		return (-ENXIO);
-+	}
-+
-+	sp->int_regs = ioremap_nocache(virt_to_phys(sp->cfg->reset_base), 4);
-+	if (!sp->int_regs) {
-+		printk("Can't remap INTERRUPT registers\n");
-+		return (-ENXIO);
-+	}
-+
-+	strncpy(sp->name, "Atheros AR231x", sizeof(sp->name) - 1);
-+	sp->name[sizeof(sp->name) - 1] = '\0';
-+	memcpy(dev->dev_addr, sp->cfg->macaddr, 6);
-+
-+	if (ar231x_init(dev)) {
-+		/*
-+		 * ar231x_init() calls ar231x_init_cleanup() on error.
-+		 */
-+		kfree(dev);
-+		return -ENODEV;
-+	}
-+
-+	if (register_netdev(dev)) {
-+		printk("%s: register_netdev failed\n", __func__);
-+		return -1;
-+	}
-+
-+	printk("%s: %s: %02x:%02x:%02x:%02x:%02x:%02x, irq %d\n",
-+		   dev->name, sp->name,
-+		   dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
-+		   dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5], dev->irq);
-+
-+	sp->mii_bus = mdiobus_alloc();
-+	if (sp->mii_bus == NULL)
-+		return -1;
-+
-+	sp->mii_bus->priv = dev;
-+	sp->mii_bus->read = ar231x_mdiobus_read;
-+	sp->mii_bus->write = ar231x_mdiobus_write;
-+	sp->mii_bus->reset = ar231x_mdiobus_reset;
-+	sp->mii_bus->name = "ar231x_eth_mii";
-+	snprintf(sp->mii_bus->id, MII_BUS_ID_SIZE, "%d", pdev->id);
-+	sp->mii_bus->irq = kmalloc(sizeof(int), GFP_KERNEL);
-+	*sp->mii_bus->irq = PHY_POLL;
-+
-+	mdiobus_register(sp->mii_bus);
-+
-+	if (ar231x_mdiobus_probe(dev) != 0) {
-+		printk(KERN_ERR "%s: mdiobus_probe failed\n", dev->name);
-+		rx_tasklet_cleanup(dev);
-+		ar231x_init_cleanup(dev);
-+		unregister_netdev(dev);
-+		kfree(dev);
-+		return -ENODEV;
-+	}
-+
-+	/* start link poll timer */
-+	ar231x_setup_timer(dev);
-+
-+	return 0;
-+}
-+
-+
-+static void ar231x_multicast_list(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	unsigned int filter;
-+
-+	filter = sp->eth_regs->mac_control;
-+
-+	if (dev->flags & IFF_PROMISC)
-+		filter |= MAC_CONTROL_PR;
-+	else
-+		filter &= ~MAC_CONTROL_PR;
-+	if ((dev->flags & IFF_ALLMULTI) || (netdev_mc_count(dev) > 0))
-+		filter |= MAC_CONTROL_PM;
-+	else
-+		filter &= ~MAC_CONTROL_PM;
-+
-+	sp->eth_regs->mac_control = filter;
-+}
-+
-+static void rx_tasklet_cleanup(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+
-+	/*
-+	 * Tasklet may be scheduled. Need to get it removed from the list
-+	 * since we're about to free the struct.
-+	 */
-+
-+	sp->unloading = 1;
-+	tasklet_enable(&sp->rx_tasklet);
-+	tasklet_kill(&sp->rx_tasklet);
-+}
-+
-+static int __devexit ar231x_remove(struct platform_device *pdev)
-+{
-+	struct net_device *dev = platform_get_drvdata(pdev);
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	rx_tasklet_cleanup(dev);
-+	ar231x_init_cleanup(dev);
-+	unregister_netdev(dev);
-+	mdiobus_unregister(sp->mii_bus);
-+	mdiobus_free(sp->mii_bus);
-+	kfree(dev);
-+	return 0;
-+}
-+
-+
-+/*
-+ * Restart the AR2313 ethernet controller.
-+ */
-+static int ar231x_restart(struct net_device *dev)
-+{
-+	/* disable interrupts */
-+	disable_irq(dev->irq);
-+
-+	/* stop mac */
-+	ar231x_halt(dev);
-+
-+	/* initialize */
-+	ar231x_init(dev);
-+
-+	/* enable interrupts */
-+	enable_irq(dev->irq);
-+
-+	return 0;
-+}
-+
-+static struct platform_driver ar231x_driver = {
-+	.driver.name = "ar231x-eth",
-+	.probe = ar231x_probe,
-+	.remove = __devexit_p(ar231x_remove),
-+};
-+
-+int __init ar231x_module_init(void)
-+{
-+	return platform_driver_register(&ar231x_driver);
-+}
-+
-+void __exit ar231x_module_cleanup(void)
-+{
-+	platform_driver_unregister(&ar231x_driver);
-+}
-+
-+module_init(ar231x_module_init);
-+module_exit(ar231x_module_cleanup);
-+
-+
-+static void ar231x_free_descriptors(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	if (sp->rx_ring != NULL) {
-+		kfree((void *) KSEG0ADDR(sp->rx_ring));
-+		sp->rx_ring = NULL;
-+		sp->tx_ring = NULL;
-+	}
-+}
-+
-+
-+static int ar231x_allocate_descriptors(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	int size;
-+	int j;
-+	ar231x_descr_t *space;
-+
-+	if (sp->rx_ring != NULL) {
-+		printk("%s: already done.\n", __FUNCTION__);
-+		return 0;
-+	}
-+
-+	size =
-+		(sizeof(ar231x_descr_t) * (AR2313_DESCR_ENTRIES * AR2313_QUEUES));
-+	space = kmalloc(size, GFP_KERNEL);
-+	if (space == NULL)
-+		return 1;
-+
-+	/* invalidate caches */
-+	dma_cache_inv((unsigned int) space, size);
-+
-+	/* now convert pointer to KSEG1 */
-+	space = (ar231x_descr_t *) KSEG1ADDR(space);
-+
-+	memset((void *) space, 0, size);
-+
-+	sp->rx_ring = space;
-+	space += AR2313_DESCR_ENTRIES;
-+
-+	sp->tx_ring = space;
-+	space += AR2313_DESCR_ENTRIES;
-+
-+	/* Initialize the transmit Descriptors */
-+	for (j = 0; j < AR2313_DESCR_ENTRIES; j++) {
-+		ar231x_descr_t *td = &sp->tx_ring[j];
-+		td->status = 0;
-+		td->devcs = DMA_TX1_CHAINED;
-+		td->addr = 0;
-+		td->descr =
-+			virt_to_phys(&sp->
-+						 tx_ring[(j + 1) & (AR2313_DESCR_ENTRIES - 1)]);
-+	}
-+
-+	return 0;
-+}
-+
-+
-+/*
-+ * Generic cleanup handling data allocated during init. Used when the
-+ * module is unloaded or if an error occurs during initialization
-+ */
-+static void ar231x_init_cleanup(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	struct sk_buff *skb;
-+	int j;
-+
-+	ar231x_free_descriptors(dev);
-+
-+	if (sp->eth_regs)
-+		iounmap((void *) sp->eth_regs);
-+	if (sp->dma_regs)
-+		iounmap((void *) sp->dma_regs);
-+
-+	if (sp->rx_skb) {
-+		for (j = 0; j < AR2313_DESCR_ENTRIES; j++) {
-+			skb = sp->rx_skb[j];
-+			if (skb) {
-+				sp->rx_skb[j] = NULL;
-+				dev_kfree_skb(skb);
-+			}
-+		}
-+		kfree(sp->rx_skb);
-+		sp->rx_skb = NULL;
-+	}
-+
-+	if (sp->tx_skb) {
-+		for (j = 0; j < AR2313_DESCR_ENTRIES; j++) {
-+			skb = sp->tx_skb[j];
-+			if (skb) {
-+				sp->tx_skb[j] = NULL;
-+				dev_kfree_skb(skb);
-+			}
-+		}
-+		kfree(sp->tx_skb);
-+		sp->tx_skb = NULL;
-+	}
-+}
-+
-+static int ar231x_setup_timer(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+
-+	init_timer(&sp->link_timer);
-+
-+	sp->link_timer.function = ar231x_link_timer_fn;
-+	sp->link_timer.data = (int) dev;
-+	sp->link_timer.expires = jiffies + HZ;
-+
-+	add_timer(&sp->link_timer);
-+	return 0;
-+
-+}
-+
-+static void ar231x_link_timer_fn(unsigned long data)
-+{
-+	struct net_device *dev = (struct net_device *) data;
-+	struct ar231x_private *sp = netdev_priv(dev);
-+
-+	// see if the link status changed
-+	// This was needed to make sure we set the PHY to the
-+	// autonegotiated value of half or full duplex.
-+	ar231x_check_link(dev);
-+
-+	// Loop faster when we don't have link.
-+	// This was needed to speed up the AP bootstrap time.
-+	if (sp->link == 0) {
-+		mod_timer(&sp->link_timer, jiffies + HZ / 2);
-+	} else {
-+		mod_timer(&sp->link_timer, jiffies + LINK_TIMER);
-+	}
-+}
-+
-+static void ar231x_check_link(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	u16 phyData;
-+
-+	phyData = ar231x_mdiobus_read(sp->mii_bus, sp->phy, MII_BMSR);
-+	if (sp->phyData != phyData) {
-+		if (phyData & BMSR_LSTATUS) {
-+			/* link is present, ready link partner ability to deterine
-+			   duplexity */
-+			int duplex = 0;
-+			u16 reg;
-+
-+			sp->link = 1;
-+			reg = ar231x_mdiobus_read(sp->mii_bus, sp->phy, MII_BMCR);
-+			if (reg & BMCR_ANENABLE) {
-+				/* auto neg enabled */
-+				reg = ar231x_mdiobus_read(sp->mii_bus, sp->phy, MII_LPA);
-+				duplex = (reg & (LPA_100FULL | LPA_10FULL)) ? 1 : 0;
-+			} else {
-+				/* no auto neg, just read duplex config */
-+				duplex = (reg & BMCR_FULLDPLX) ? 1 : 0;
-+			}
-+
-+			printk(KERN_INFO "%s: Configuring MAC for %s duplex\n",
-+				   dev->name, (duplex) ? "full" : "half");
-+
-+			if (duplex) {
-+				/* full duplex */
-+				sp->eth_regs->mac_control =
-+					((sp->eth_regs->
-+					  mac_control | MAC_CONTROL_F) & ~MAC_CONTROL_DRO);
-+			} else {
-+				/* half duplex */
-+				sp->eth_regs->mac_control =
-+					((sp->eth_regs->
-+					  mac_control | MAC_CONTROL_DRO) & ~MAC_CONTROL_F);
-+			}
-+		} else {
-+			/* no link */
-+			sp->link = 0;
-+		}
-+		sp->phyData = phyData;
-+	}
-+}
-+
-+static int ar231x_reset_reg(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	unsigned int ethsal, ethsah;
-+	unsigned int flags;
-+
-+	*sp->int_regs |= sp->cfg->reset_mac;
-+	mdelay(10);
-+	*sp->int_regs &= ~sp->cfg->reset_mac;
-+	mdelay(10);
-+	*sp->int_regs |= sp->cfg->reset_phy;
-+	mdelay(10);
-+	*sp->int_regs &= ~sp->cfg->reset_phy;
-+	mdelay(10);
-+
-+	sp->dma_regs->bus_mode = (DMA_BUS_MODE_SWR);
-+	mdelay(10);
-+	sp->dma_regs->bus_mode =
-+		((32 << DMA_BUS_MODE_PBL_SHIFT) | DMA_BUS_MODE_BLE);
-+
-+	/* enable interrupts */
-+	sp->dma_regs->intr_ena = (DMA_STATUS_AIS |
-+							  DMA_STATUS_NIS |
-+							  DMA_STATUS_RI |
-+							  DMA_STATUS_TI | DMA_STATUS_FBE);
-+	sp->dma_regs->xmt_base = virt_to_phys(sp->tx_ring);
-+	sp->dma_regs->rcv_base = virt_to_phys(sp->rx_ring);
-+	sp->dma_regs->control =
-+		(DMA_CONTROL_SR | DMA_CONTROL_ST | DMA_CONTROL_SF);
-+
-+	sp->eth_regs->flow_control = (FLOW_CONTROL_FCE);
-+	sp->eth_regs->vlan_tag = (0x8100);
-+
-+	/* Enable Ethernet Interface */
-+	flags = (MAC_CONTROL_TE |	/* transmit enable */
-+			 MAC_CONTROL_PM |	/* pass mcast */
-+			 MAC_CONTROL_F |	/* full duplex */
-+			 MAC_CONTROL_HBD);	/* heart beat disabled */
-+
-+	if (dev->flags & IFF_PROMISC) {	/* set promiscuous mode */
-+		flags |= MAC_CONTROL_PR;
-+	}
-+	sp->eth_regs->mac_control = flags;
-+
-+	/* Set all Ethernet station address registers to their initial values */
-+	ethsah = ((((u_int) (dev->dev_addr[5]) << 8) & (u_int) 0x0000FF00) |
-+			  (((u_int) (dev->dev_addr[4]) << 0) & (u_int) 0x000000FF));
-+
-+	ethsal = ((((u_int) (dev->dev_addr[3]) << 24) & (u_int) 0xFF000000) |
-+			  (((u_int) (dev->dev_addr[2]) << 16) & (u_int) 0x00FF0000) |
-+			  (((u_int) (dev->dev_addr[1]) << 8) & (u_int) 0x0000FF00) |
-+			  (((u_int) (dev->dev_addr[0]) << 0) & (u_int) 0x000000FF));
-+
-+	sp->eth_regs->mac_addr[0] = ethsah;
-+	sp->eth_regs->mac_addr[1] = ethsal;
-+
-+	mdelay(10);
-+
-+	return (0);
-+}
-+
-+
-+static int ar231x_init(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	int ecode = 0;
-+
-+	/*
-+	 * Allocate descriptors
-+	 */
-+	if (ar231x_allocate_descriptors(dev)) {
-+		printk("%s: %s: ar231x_allocate_descriptors failed\n",
-+			   dev->name, __FUNCTION__);
-+		ecode = -EAGAIN;
-+		goto init_error;
-+	}
-+
-+	/*
-+	 * Get the memory for the skb rings.
-+	 */
-+	if (sp->rx_skb == NULL) {
-+		sp->rx_skb =
-+			kmalloc(sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES,
-+					GFP_KERNEL);
-+		if (!(sp->rx_skb)) {
-+			printk("%s: %s: rx_skb kmalloc failed\n",
-+				   dev->name, __FUNCTION__);
-+			ecode = -EAGAIN;
-+			goto init_error;
-+		}
-+	}
-+	memset(sp->rx_skb, 0, sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES);
-+
-+	if (sp->tx_skb == NULL) {
-+		sp->tx_skb =
-+			kmalloc(sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES,
-+					GFP_KERNEL);
-+		if (!(sp->tx_skb)) {
-+			printk("%s: %s: tx_skb kmalloc failed\n",
-+				   dev->name, __FUNCTION__);
-+			ecode = -EAGAIN;
-+			goto init_error;
-+		}
-+	}
-+	memset(sp->tx_skb, 0, sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES);
-+
-+	/*
-+	 * Set tx_csm before we start receiving interrupts, otherwise
-+	 * the interrupt handler might think it is supposed to process
-+	 * tx ints before we are up and running, which may cause a null
-+	 * pointer access in the int handler.
-+	 */
-+	sp->rx_skbprd = 0;
-+	sp->cur_rx = 0;
-+	sp->tx_prd = 0;
-+	sp->tx_csm = 0;
-+
-+	/*
-+	 * Zero the stats before starting the interface
-+	 */
-+	memset(&dev->stats, 0, sizeof(dev->stats));
-+
-+	/*
-+	 * We load the ring here as there seem to be no way to tell the
-+	 * firmware to wipe the ring without re-initializing it.
-+	 */
-+	ar231x_load_rx_ring(dev, RX_RING_SIZE);
-+
-+	/*
-+	 * Init hardware
-+	 */
-+	ar231x_reset_reg(dev);
-+
-+	/*
-+	 * Get the IRQ
-+	 */
-+	ecode =
-+		request_irq(dev->irq, &ar231x_interrupt,
-+					IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
-+					dev->name, dev);
-+	if (ecode) {
-+		printk(KERN_WARNING "%s: %s: Requested IRQ %d is busy\n",
-+			   dev->name, __FUNCTION__, dev->irq);
-+		goto init_error;
-+	}
-+
-+
-+	tasklet_enable(&sp->rx_tasklet);
-+
-+	return 0;
-+
-+  init_error:
-+	ar231x_init_cleanup(dev);
-+	return ecode;
-+}
-+
-+/*
-+ * Load the rx ring.
-+ *
-+ * Loading rings is safe without holding the spin lock since this is
-+ * done only before the device is enabled, thus no interrupts are
-+ * generated and by the interrupt handler/tasklet handler.
-+ */
-+static void ar231x_load_rx_ring(struct net_device *dev, int nr_bufs)
-+{
-+
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	short i, idx;
-+
-+	idx = sp->rx_skbprd;
-+
-+	for (i = 0; i < nr_bufs; i++) {
-+		struct sk_buff *skb;
-+		ar231x_descr_t *rd;
-+
-+		if (sp->rx_skb[idx])
-+			break;
-+
-+		skb = netdev_alloc_skb(dev, AR2313_BUFSIZE);
-+		if (!skb) {
-+			printk("\n\n\n\n %s: No memory in system\n\n\n\n",
-+				   __FUNCTION__);
-+			break;
-+		}
-+
-+		/*
-+		 * Make sure IP header starts on a fresh cache line.
-+		 */
-+		skb->dev = dev;
-+		skb_reserve(skb, RX_OFFSET);
-+		sp->rx_skb[idx] = skb;
-+
-+		rd = (ar231x_descr_t *) & sp->rx_ring[idx];
-+
-+		/* initialize dma descriptor */
-+		rd->devcs = ((AR2313_BUFSIZE << DMA_RX1_BSIZE_SHIFT) |
-+					 DMA_RX1_CHAINED);
-+		rd->addr = virt_to_phys(skb->data);
-+		rd->descr =
-+			virt_to_phys(&sp->
-+						 rx_ring[(idx + 1) & (AR2313_DESCR_ENTRIES - 1)]);
-+		rd->status = DMA_RX_OWN;
-+
-+		idx = DSC_NEXT(idx);
-+	}
-+
-+	if (i)
-+		sp->rx_skbprd = idx;
-+
-+	return;
-+}
-+
-+#define AR2313_MAX_PKTS_PER_CALL        64
-+
-+static int ar231x_rx_int(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	struct sk_buff *skb, *skb_new;
-+	ar231x_descr_t *rxdesc;
-+	unsigned int status;
-+	u32 idx;
-+	int pkts = 0;
-+	int rval;
-+
-+	idx = sp->cur_rx;
-+
-+	/* process at most the entire ring and then wait for another interrupt
-+	 */
-+	while (1) {
-+
-+		rxdesc = &sp->rx_ring[idx];
-+		status = rxdesc->status;
-+		if (status & DMA_RX_OWN) {
-+			/* SiByte owns descriptor or descr not yet filled in */
-+			rval = 0;
-+			break;
-+		}
-+
-+		if (++pkts > AR2313_MAX_PKTS_PER_CALL) {
-+			rval = 1;
-+			break;
-+		}
-+
-+		if ((status & DMA_RX_ERROR) && !(status & DMA_RX_LONG)) {
-+			dev->stats.rx_errors++;
-+			dev->stats.rx_dropped++;
-+
-+			/* add statistics counters */
-+			if (status & DMA_RX_ERR_CRC)
-+				dev->stats.rx_crc_errors++;
-+			if (status & DMA_RX_ERR_COL)
-+				dev->stats.rx_over_errors++;
-+			if (status & DMA_RX_ERR_LENGTH)
-+				dev->stats.rx_length_errors++;
-+			if (status & DMA_RX_ERR_RUNT)
-+				dev->stats.rx_over_errors++;
-+			if (status & DMA_RX_ERR_DESC)
-+				dev->stats.rx_over_errors++;
-+
-+		} else {
-+			/* alloc new buffer. */
-+			skb_new = netdev_alloc_skb(dev, AR2313_BUFSIZE + RX_OFFSET);
-+			if (skb_new != NULL) {
-+
-+				skb = sp->rx_skb[idx];
-+				/* set skb */
-+				skb_put(skb,
-+						((status >> DMA_RX_LEN_SHIFT) & 0x3fff) - CRC_LEN);
-+
-+				dev->stats.rx_bytes += skb->len;
-+				skb->protocol = eth_type_trans(skb, dev);
-+				/* pass the packet to upper layers */
-+				netif_rx(skb);
-+
-+				skb_new->dev = dev;
-+				/* 16 bit align */
-+				skb_reserve(skb_new, RX_OFFSET);
-+				/* reset descriptor's curr_addr */
-+				rxdesc->addr = virt_to_phys(skb_new->data);
-+
-+				dev->stats.rx_packets++;
-+				sp->rx_skb[idx] = skb_new;
-+			} else {
-+				dev->stats.rx_dropped++;
-+			}
-+		}
-+
-+		rxdesc->devcs = ((AR2313_BUFSIZE << DMA_RX1_BSIZE_SHIFT) |
-+						 DMA_RX1_CHAINED);
-+		rxdesc->status = DMA_RX_OWN;
-+
-+		idx = DSC_NEXT(idx);
-+	}
-+
-+	sp->cur_rx = idx;
-+
-+	return rval;
-+}
-+
-+
-+static void ar231x_tx_int(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	u32 idx;
-+	struct sk_buff *skb;
-+	ar231x_descr_t *txdesc;
-+	unsigned int status = 0;
-+
-+	idx = sp->tx_csm;
-+
-+	while (idx != sp->tx_prd) {
-+		txdesc = &sp->tx_ring[idx];
-+
-+		if ((status = txdesc->status) & DMA_TX_OWN) {
-+			/* ar231x dma still owns descr */
-+			break;
-+		}
-+		/* done with this descriptor */
-+		dma_unmap_single(NULL, txdesc->addr,
-+						 txdesc->devcs & DMA_TX1_BSIZE_MASK,
-+						 DMA_TO_DEVICE);
-+		txdesc->status = 0;
-+
-+		if (status & DMA_TX_ERROR) {
-+			dev->stats.tx_errors++;
-+			dev->stats.tx_dropped++;
-+			if (status & DMA_TX_ERR_UNDER)
-+				dev->stats.tx_fifo_errors++;
-+			if (status & DMA_TX_ERR_HB)
-+				dev->stats.tx_heartbeat_errors++;
-+			if (status & (DMA_TX_ERR_LOSS | DMA_TX_ERR_LINK))
-+				dev->stats.tx_carrier_errors++;
-+			if (status & (DMA_TX_ERR_LATE |
-+						  DMA_TX_ERR_COL |
-+						  DMA_TX_ERR_JABBER | DMA_TX_ERR_DEFER))
-+				dev->stats.tx_aborted_errors++;
-+		} else {
-+			/* transmit OK */
-+			dev->stats.tx_packets++;
-+		}
-+
-+		skb = sp->tx_skb[idx];
-+		sp->tx_skb[idx] = NULL;
-+		idx = DSC_NEXT(idx);
-+		dev->stats.tx_bytes += skb->len;
-+		dev_kfree_skb_irq(skb);
-+	}
-+
-+	sp->tx_csm = idx;
-+
-+	return;
-+}
-+
-+
-+static void rx_tasklet_func(unsigned long data)
-+{
-+	struct net_device *dev = (struct net_device *) data;
-+	struct ar231x_private *sp = netdev_priv(dev);
-+
-+	if (sp->unloading) {
-+		return;
-+	}
-+
-+	if (ar231x_rx_int(dev)) {
-+		tasklet_hi_schedule(&sp->rx_tasklet);
-+	} else {
-+		unsigned long flags;
-+		spin_lock_irqsave(&sp->lock, flags);
-+		sp->dma_regs->intr_ena |= DMA_STATUS_RI;
-+		spin_unlock_irqrestore(&sp->lock, flags);
-+	}
-+}
-+
-+static void rx_schedule(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+
-+	sp->dma_regs->intr_ena &= ~DMA_STATUS_RI;
-+
-+	tasklet_hi_schedule(&sp->rx_tasklet);
-+}
-+
-+static irqreturn_t ar231x_interrupt(int irq, void *dev_id)
-+{
-+	struct net_device *dev = (struct net_device *) dev_id;
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	unsigned int status, enabled;
-+
-+	/* clear interrupt */
-+	/*
-+	 * Don't clear RI bit if currently disabled.
-+	 */
-+	status = sp->dma_regs->status;
-+	enabled = sp->dma_regs->intr_ena;
-+	sp->dma_regs->status = status & enabled;
-+
-+	if (status & DMA_STATUS_NIS) {
-+		/* normal status */
-+		/*
-+		 * Don't schedule rx processing if interrupt
-+		 * is already disabled.
-+		 */
-+		if (status & enabled & DMA_STATUS_RI) {
-+			/* receive interrupt */
-+			rx_schedule(dev);
-+		}
-+		if (status & DMA_STATUS_TI) {
-+			/* transmit interrupt */
-+			ar231x_tx_int(dev);
-+		}
-+	}
-+
-+	/* abnormal status */
-+	if (status & (DMA_STATUS_FBE | DMA_STATUS_TPS)) {
-+		ar231x_restart(dev);
-+	}
-+	return IRQ_HANDLED;
-+}
-+
-+
-+static int ar231x_open(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	unsigned int ethsal, ethsah;
-+
-+	/* reset the hardware, in case the MAC address changed */
-+	ethsah = ((((u_int) (dev->dev_addr[5]) << 8) & (u_int) 0x0000FF00) |
-+			  (((u_int) (dev->dev_addr[4]) << 0) & (u_int) 0x000000FF));
-+
-+	ethsal = ((((u_int) (dev->dev_addr[3]) << 24) & (u_int) 0xFF000000) |
-+			  (((u_int) (dev->dev_addr[2]) << 16) & (u_int) 0x00FF0000) |
-+			  (((u_int) (dev->dev_addr[1]) << 8) & (u_int) 0x0000FF00) |
-+			  (((u_int) (dev->dev_addr[0]) << 0) & (u_int) 0x000000FF));
-+
-+	sp->eth_regs->mac_addr[0] = ethsah;
-+	sp->eth_regs->mac_addr[1] = ethsal;
-+
-+	mdelay(10);
-+
-+	dev->mtu = 1500;
-+	netif_start_queue(dev);
-+
-+	sp->eth_regs->mac_control |= MAC_CONTROL_RE;
-+
-+	return 0;
-+}
-+
-+static void ar231x_tx_timeout(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	unsigned long flags;
-+
-+	spin_lock_irqsave(&sp->lock, flags);
-+	ar231x_restart(dev);
-+	spin_unlock_irqrestore(&sp->lock, flags);
-+}
-+
-+static void ar231x_halt(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	int j;
-+
-+	tasklet_disable(&sp->rx_tasklet);
-+
-+	/* kill the MAC */
-+	sp->eth_regs->mac_control &= ~(MAC_CONTROL_RE |	/* disable Receives */
-+								   MAC_CONTROL_TE);	/* disable Transmits */
-+	/* stop dma */
-+	sp->dma_regs->control = 0;
-+	sp->dma_regs->bus_mode = DMA_BUS_MODE_SWR;
-+
-+	/* place phy and MAC in reset */
-+	*sp->int_regs |= (sp->cfg->reset_mac | sp->cfg->reset_phy);
-+
-+	/* free buffers on tx ring */
-+	for (j = 0; j < AR2313_DESCR_ENTRIES; j++) {
-+		struct sk_buff *skb;
-+		ar231x_descr_t *txdesc;
-+
-+		txdesc = &sp->tx_ring[j];
-+		txdesc->descr = 0;
-+
-+		skb = sp->tx_skb[j];
-+		if (skb) {
-+			dev_kfree_skb(skb);
-+			sp->tx_skb[j] = NULL;
-+		}
-+	}
-+}
-+
-+/*
-+ * close should do nothing. Here's why. It's called when
-+ * 'ifconfig bond0 down' is run. If it calls free_irq then
-+ * the irq is gone forever ! When bond0 is made 'up' again,
-+ * the ar231x_open () does not call request_irq (). Worse,
-+ * the call to ar231x_halt() generates a WDOG reset due to
-+ * the write to 'sp->int_regs' and the box reboots.
-+ * Commenting this out is good since it allows the
-+ * system to resume when bond0 is made up again.
-+ */
-+static int ar231x_close(struct net_device *dev)
-+{
-+#if 0
-+	/*
-+	 * Disable interrupts
-+	 */
-+	disable_irq(dev->irq);
-+
-+	/*
-+	 * Without (or before) releasing irq and stopping hardware, this
-+	 * is an absolute non-sense, by the way. It will be reset instantly
-+	 * by the first irq.
-+	 */
-+	netif_stop_queue(dev);
-+
-+	/* stop the MAC and DMA engines */
-+	ar231x_halt(dev);
-+
-+	/* release the interrupt */
-+	free_irq(dev->irq, dev);
-+
-+#endif
-+	return 0;
-+}
-+
-+static int ar231x_start_xmit(struct sk_buff *skb, struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	ar231x_descr_t *td;
-+	u32 idx;
-+
-+	idx = sp->tx_prd;
-+	td = &sp->tx_ring[idx];
-+
-+	if (td->status & DMA_TX_OWN) {
-+		/* free skbuf and lie to the caller that we sent it out */
-+		dev->stats.tx_dropped++;
-+		dev_kfree_skb(skb);
-+
-+		/* restart transmitter in case locked */
-+		sp->dma_regs->xmt_poll = 0;
-+		return 0;
-+	}
-+
-+	/* Setup the transmit descriptor. */
-+	td->devcs = ((skb->len << DMA_TX1_BSIZE_SHIFT) |
-+				 (DMA_TX1_LS | DMA_TX1_IC | DMA_TX1_CHAINED));
-+	td->addr = dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE);
-+	td->status = DMA_TX_OWN;
-+
-+	/* kick transmitter last */
-+	sp->dma_regs->xmt_poll = 0;
-+
-+	sp->tx_skb[idx] = skb;
-+	idx = DSC_NEXT(idx);
-+	sp->tx_prd = idx;
-+
-+	return 0;
-+}
-+
-+static int ar231x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
-+{
-+	struct mii_ioctl_data *data = (struct mii_ioctl_data *) &ifr->ifr_data;
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	int ret;
-+
-+	switch (cmd) {
-+
-+	case SIOCETHTOOL:
-+		spin_lock_irq(&sp->lock);
-+		ret = phy_ethtool_ioctl(sp->phy_dev, (void *) ifr->ifr_data);
-+		spin_unlock_irq(&sp->lock);
-+		return ret;
-+
-+	case SIOCSIFHWADDR:
-+		if (copy_from_user
-+			(dev->dev_addr, ifr->ifr_data, sizeof(dev->dev_addr)))
-+			return -EFAULT;
-+		return 0;
-+
-+	case SIOCGIFHWADDR:
-+		if (copy_to_user
-+			(ifr->ifr_data, dev->dev_addr, sizeof(dev->dev_addr)))
-+			return -EFAULT;
-+		return 0;
-+
-+	case SIOCGMIIPHY:
-+	case SIOCGMIIREG:
-+	case SIOCSMIIREG:
-+		return phy_mii_ioctl(sp->phy_dev, data, cmd);
-+
-+	default:
-+		break;
-+	}
-+
-+	return -EOPNOTSUPP;
-+}
-+
-+static void ar231x_adjust_link(struct net_device *dev)
-+{
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	unsigned int mc;
-+
-+	if (!sp->phy_dev->link)
-+		return;
-+
-+	if (sp->phy_dev->duplex != sp->oldduplex) {
-+		mc = readl(&sp->eth_regs->mac_control);
-+		mc &= ~(MAC_CONTROL_F | MAC_CONTROL_DRO);
-+		if (sp->phy_dev->duplex)
-+			mc |= MAC_CONTROL_F;
-+		else
-+			mc |= MAC_CONTROL_DRO;
-+		writel(mc, &sp->eth_regs->mac_control);
-+		sp->oldduplex = sp->phy_dev->duplex;
-+	}
-+}
-+
-+#define MII_ADDR(phy, reg) \
-+	((reg << MII_ADDR_REG_SHIFT) | (phy << MII_ADDR_PHY_SHIFT))
-+
-+static int
-+ar231x_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
-+{
-+	struct net_device *const dev = bus->priv;
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	volatile ETHERNET_STRUCT *ethernet = sp->phy_regs;
-+
-+	ethernet->mii_addr = MII_ADDR(phy_addr, regnum);
-+	while (ethernet->mii_addr & MII_ADDR_BUSY);
-+	return (ethernet->mii_data >> MII_DATA_SHIFT);
-+}
-+
-+static int
-+ar231x_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
-+             u16 value)
-+{
-+	struct net_device *const dev = bus->priv;
-+	struct ar231x_private *sp = netdev_priv(dev);
-+	volatile ETHERNET_STRUCT *ethernet = sp->phy_regs;
-+
-+	while (ethernet->mii_addr & MII_ADDR_BUSY);
-+	ethernet->mii_data = value << MII_DATA_SHIFT;
-+	ethernet->mii_addr = MII_ADDR(phy_addr, regnum) | MII_ADDR_WRITE;
-+
-+	return 0;
-+}
-+
-+static int ar231x_mdiobus_reset(struct mii_bus *bus)
-+{
-+	struct net_device *const dev = bus->priv;
-+
-+	ar231x_reset_reg(dev);
-+
-+	return 0;
-+}
-+
-+static int ar231x_mdiobus_probe (struct net_device *dev)
-+{
-+	struct ar231x_private *const sp = netdev_priv(dev);
-+	struct phy_device *phydev = NULL;
-+	int phy_addr;
-+
-+	/* find the first (lowest address) PHY on the current MAC's MII bus */
-+	for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
-+		if (sp->mii_bus->phy_map[phy_addr]) {
-+			phydev = sp->mii_bus->phy_map[phy_addr];
-+			sp->phy = phy_addr;
-+			break; /* break out with first one found */
-+		}
-+
-+	if (!phydev) {
-+		printk (KERN_ERR "ar231x: %s: no PHY found\n", dev->name);
-+		return -1;
-+	}
-+
-+	/* now we are supposed to have a proper phydev, to attach to... */
-+	BUG_ON(!phydev);
-+	BUG_ON(phydev->attached_dev);
-+
-+	phydev = phy_connect(dev, dev_name(&phydev->dev), &ar231x_adjust_link, 0,
-+		PHY_INTERFACE_MODE_MII);
-+
-+	if (IS_ERR(phydev)) {
-+		printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
-+		return PTR_ERR(phydev);
-+	}
-+
-+	/* mask with MAC supported features */
-+	phydev->supported &= (SUPPORTED_10baseT_Half
-+		| SUPPORTED_10baseT_Full
-+		| SUPPORTED_100baseT_Half
-+		| SUPPORTED_100baseT_Full
-+		| SUPPORTED_Autoneg
-+		/* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
-+		| SUPPORTED_MII
-+		| SUPPORTED_TP);
-+
-+	phydev->advertising = phydev->supported;
-+
-+	sp->oldduplex = -1;
-+	sp->phy_dev = phydev;
-+
-+	printk(KERN_INFO "%s: attached PHY driver [%s] "
-+		"(mii_bus:phy_addr=%s)\n",
-+		dev->name, phydev->drv->name, dev_name(&phydev->dev));
-+
-+	return 0;
-+}
-+
-diff -Nur linux-2.6.39-rc7.orig/drivers/net/ar231x.h linux-2.6.39-rc7/drivers/net/ar231x.h
---- linux-2.6.39-rc7.orig/drivers/net/ar231x.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/drivers/net/ar231x.h	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,302 @@
-+/*
-+ * ar231x.h: Linux driver for the Atheros AR231x Ethernet device.
-+ *
-+ * Copyright (C) 2004 by Sameer Dekate <sdekate@arubanetworks.com>
-+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
-+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
-+ *
-+ * Thanks to Atheros for providing hardware and documentation
-+ * enabling me to write this driver.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ */
-+
-+#ifndef _AR2313_H_
-+#define _AR2313_H_
-+
-+#include <generated/autoconf.h>
-+#include <linux/bitops.h>
-+#include <asm/bootinfo.h>
-+#include <ar231x_platform.h>
-+
-+/*
-+ * probe link timer - 5 secs
-+ */
-+#define LINK_TIMER    (5*HZ)
-+
-+#define IS_DMA_TX_INT(X)   (((X) & (DMA_STATUS_TI)) != 0)
-+#define IS_DMA_RX_INT(X)   (((X) & (DMA_STATUS_RI)) != 0)
-+#define IS_DRIVER_OWNED(X) (((X) & (DMA_TX_OWN))    == 0)
-+
-+#define AR2313_TX_TIMEOUT (HZ/4)
-+
-+/*
-+ * Rings
-+ */
-+#define DSC_RING_ENTRIES_SIZE	(AR2313_DESCR_ENTRIES * sizeof(struct desc))
-+#define DSC_NEXT(idx)	        ((idx + 1) & (AR2313_DESCR_ENTRIES - 1))
-+
-+#define AR2313_MBGET		2
-+#define AR2313_MBSET		3
-+#define AR2313_PCI_RECONFIG	4
-+#define AR2313_PCI_DUMP		5
-+#define AR2313_TEST_PANIC	6
-+#define AR2313_TEST_NULLPTR	7
-+#define AR2313_READ_DATA	8
-+#define AR2313_WRITE_DATA	9
-+#define AR2313_GET_VERSION	10
-+#define AR2313_TEST_HANG	11
-+#define AR2313_SYNC		12
-+
-+#define DMA_RX_ERR_CRC		BIT(1)
-+#define DMA_RX_ERR_DRIB		BIT(2)
-+#define DMA_RX_ERR_MII		BIT(3)
-+#define DMA_RX_EV2		BIT(5)
-+#define DMA_RX_ERR_COL		BIT(6)
-+#define DMA_RX_LONG		BIT(7)
-+#define DMA_RX_LS		BIT(8)	/* last descriptor */
-+#define DMA_RX_FS		BIT(9)	/* first descriptor */
-+#define DMA_RX_MF		BIT(10)	/* multicast frame */
-+#define DMA_RX_ERR_RUNT		BIT(11)	/* runt frame */
-+#define DMA_RX_ERR_LENGTH	BIT(12)	/* length error */
-+#define DMA_RX_ERR_DESC		BIT(14)	/* descriptor error */
-+#define DMA_RX_ERROR		BIT(15)	/* error summary */
-+#define DMA_RX_LEN_MASK		0x3fff0000
-+#define DMA_RX_LEN_SHIFT	16
-+#define DMA_RX_FILT		BIT(30)
-+#define DMA_RX_OWN		BIT(31)	/* desc owned by DMA controller */
-+
-+#define DMA_RX1_BSIZE_MASK	0x000007ff
-+#define DMA_RX1_BSIZE_SHIFT	0
-+#define DMA_RX1_CHAINED		BIT(24)
-+#define DMA_RX1_RER		BIT(25)
-+
-+#define DMA_TX_ERR_UNDER	BIT(1)	/* underflow error */
-+#define DMA_TX_ERR_DEFER	BIT(2)	/* excessive deferral */
-+#define DMA_TX_COL_MASK		0x78
-+#define DMA_TX_COL_SHIFT	3
-+#define DMA_TX_ERR_HB		BIT(7)	/* hearbeat failure */
-+#define DMA_TX_ERR_COL		BIT(8)	/* excessive collisions */
-+#define DMA_TX_ERR_LATE		BIT(9)	/* late collision */
-+#define DMA_TX_ERR_LINK		BIT(10)	/* no carrier */
-+#define DMA_TX_ERR_LOSS		BIT(11)	/* loss of carrier */
-+#define DMA_TX_ERR_JABBER	BIT(14)	/* transmit jabber timeout */
-+#define DMA_TX_ERROR		BIT(15)	/* frame aborted */
-+#define DMA_TX_OWN		BIT(31)	/* descr owned by DMA controller */
-+
-+#define DMA_TX1_BSIZE_MASK	0x000007ff
-+#define DMA_TX1_BSIZE_SHIFT	0
-+#define DMA_TX1_CHAINED		BIT(24)	/* chained descriptors */
-+#define DMA_TX1_TER		BIT(25)	/* transmit end of ring */
-+#define DMA_TX1_FS		BIT(29)	/* first segment */
-+#define DMA_TX1_LS		BIT(30)	/* last segment */
-+#define DMA_TX1_IC		BIT(31)	/* interrupt on completion */
-+
-+#define RCVPKT_LENGTH(X)	(X  >> 16)	/* Received pkt Length */
-+
-+#define MAC_CONTROL_RE		BIT(2)	/* receive enable */
-+#define MAC_CONTROL_TE		BIT(3)	/* transmit enable */
-+#define MAC_CONTROL_DC		BIT(5)	/* Deferral check */
-+#define MAC_CONTROL_ASTP	BIT(8)	/* Auto pad strip */
-+#define MAC_CONTROL_DRTY	BIT(10)	/* Disable retry */
-+#define MAC_CONTROL_DBF		BIT(11)	/* Disable bcast frames */
-+#define MAC_CONTROL_LCC		BIT(12)	/* late collision ctrl */
-+#define MAC_CONTROL_HP		BIT(13)	/* Hash Perfect filtering */
-+#define MAC_CONTROL_HASH	BIT(14)	/* Unicast hash filtering */
-+#define MAC_CONTROL_HO		BIT(15)	/* Hash only filtering */
-+#define MAC_CONTROL_PB		BIT(16)	/* Pass Bad frames */
-+#define MAC_CONTROL_IF		BIT(17)	/* Inverse filtering */
-+#define MAC_CONTROL_PR		BIT(18)	/* promiscuous mode (valid frames only) */
-+#define MAC_CONTROL_PM		BIT(19)	/* pass multicast */
-+#define MAC_CONTROL_F		BIT(20)	/* full-duplex */
-+#define MAC_CONTROL_DRO		BIT(23)	/* Disable Receive Own */
-+#define MAC_CONTROL_HBD		BIT(28)	/* heart-beat disabled (MUST BE SET) */
-+#define MAC_CONTROL_BLE		BIT(30)	/* big endian mode */
-+#define MAC_CONTROL_RA		BIT(31)	/* receive all (valid and invalid frames) */
-+
-+#define MII_ADDR_BUSY		BIT(0)
-+#define MII_ADDR_WRITE		BIT(1)
-+#define MII_ADDR_REG_SHIFT	6
-+#define MII_ADDR_PHY_SHIFT	11
-+#define MII_DATA_SHIFT		0
-+
-+#define FLOW_CONTROL_FCE	BIT(1)
-+
-+#define DMA_BUS_MODE_SWR	BIT(0)	/* software reset */
-+#define DMA_BUS_MODE_BLE	BIT(7)	/* big endian mode */
-+#define DMA_BUS_MODE_PBL_SHIFT	8	/* programmable burst length 32 */
-+#define DMA_BUS_MODE_DBO	BIT(20)	/* big-endian descriptors */
-+
-+#define DMA_STATUS_TI		BIT(0)	/* transmit interrupt */
-+#define DMA_STATUS_TPS		BIT(1)	/* transmit process stopped */
-+#define DMA_STATUS_TU		BIT(2)	/* transmit buffer unavailable */
-+#define DMA_STATUS_TJT		BIT(3)	/* transmit buffer timeout */
-+#define DMA_STATUS_UNF		BIT(5)	/* transmit underflow */
-+#define DMA_STATUS_RI		BIT(6)	/* receive interrupt */
-+#define DMA_STATUS_RU		BIT(7)	/* receive buffer unavailable */
-+#define DMA_STATUS_RPS		BIT(8)	/* receive process stopped */
-+#define DMA_STATUS_ETI		BIT(10)	/* early transmit interrupt */
-+#define DMA_STATUS_FBE		BIT(13)	/* fatal bus interrupt */
-+#define DMA_STATUS_ERI		BIT(14)	/* early receive interrupt */
-+#define DMA_STATUS_AIS		BIT(15)	/* abnormal interrupt summary */
-+#define DMA_STATUS_NIS		BIT(16)	/* normal interrupt summary */
-+#define DMA_STATUS_RS_SHIFT	17	/* receive process state */
-+#define DMA_STATUS_TS_SHIFT	20	/* transmit process state */
-+#define DMA_STATUS_EB_SHIFT	23	/* error bits */
-+
-+#define DMA_CONTROL_SR		BIT(1)	/* start receive */
-+#define DMA_CONTROL_ST		BIT(13)	/* start transmit */
-+#define DMA_CONTROL_SF		BIT(21)	/* store and forward */
-+
-+
-+typedef struct {
-+	volatile unsigned int status;	// OWN, Device control and status.
-+	volatile unsigned int devcs;	// pkt Control bits + Length
-+	volatile unsigned int addr;	// Current Address.
-+	volatile unsigned int descr;	// Next descriptor in chain.
-+} ar231x_descr_t;
-+
-+
-+
-+//
-+// New Combo structure for Both Eth0 AND eth1
-+//
-+typedef struct {
-+	volatile unsigned int mac_control;	/* 0x00 */
-+	volatile unsigned int mac_addr[2];	/* 0x04 - 0x08 */
-+	volatile unsigned int mcast_table[2];	/* 0x0c - 0x10 */
-+	volatile unsigned int mii_addr;	/* 0x14 */
-+	volatile unsigned int mii_data;	/* 0x18 */
-+	volatile unsigned int flow_control;	/* 0x1c */
-+	volatile unsigned int vlan_tag;	/* 0x20 */
-+	volatile unsigned int pad[7];	/* 0x24 - 0x3c */
-+	volatile unsigned int ucast_table[8];	/* 0x40-0x5c */
-+
-+} ETHERNET_STRUCT;
-+
-+/********************************************************************
-+ * Interrupt controller
-+ ********************************************************************/
-+
-+typedef struct {
-+	volatile unsigned int wdog_control;	/* 0x08 */
-+	volatile unsigned int wdog_timer;	/* 0x0c */
-+	volatile unsigned int misc_status;	/* 0x10 */
-+	volatile unsigned int misc_mask;	/* 0x14 */
-+	volatile unsigned int global_status;	/* 0x18 */
-+	volatile unsigned int reserved;	/* 0x1c */
-+	volatile unsigned int reset_control;	/* 0x20 */
-+} INTERRUPT;
-+
-+/********************************************************************
-+ * DMA controller
-+ ********************************************************************/
-+typedef struct {
-+	volatile unsigned int bus_mode;	/* 0x00 (CSR0) */
-+	volatile unsigned int xmt_poll;	/* 0x04 (CSR1) */
-+	volatile unsigned int rcv_poll;	/* 0x08 (CSR2) */
-+	volatile unsigned int rcv_base;	/* 0x0c (CSR3) */
-+	volatile unsigned int xmt_base;	/* 0x10 (CSR4) */
-+	volatile unsigned int status;	/* 0x14 (CSR5) */
-+	volatile unsigned int control;	/* 0x18 (CSR6) */
-+	volatile unsigned int intr_ena;	/* 0x1c (CSR7) */
-+	volatile unsigned int rcv_missed;	/* 0x20 (CSR8) */
-+	volatile unsigned int reserved[11];	/* 0x24-0x4c (CSR9-19) */
-+	volatile unsigned int cur_tx_buf_addr;	/* 0x50 (CSR20) */
-+	volatile unsigned int cur_rx_buf_addr;	/* 0x50 (CSR21) */
-+} DMA;
-+
-+/*
-+ * Struct private for the Sibyte.
-+ *
-+ * Elements are grouped so variables used by the tx handling goes
-+ * together, and will go into the same cache lines etc. in order to
-+ * avoid cache line contention between the rx and tx handling on SMP.
-+ *
-+ * Frequently accessed variables are put at the beginning of the
-+ * struct to help the compiler generate better/shorter code.
-+ */
-+struct ar231x_private {
-+	struct net_device *dev;
-+	int version;
-+	u32 mb[2];
-+
-+	volatile ETHERNET_STRUCT *phy_regs;
-+	volatile ETHERNET_STRUCT *eth_regs;
-+	volatile DMA *dma_regs;
-+	volatile u32 *int_regs;
-+	struct ar231x_eth *cfg;
-+
-+	spinlock_t lock;			/* Serialise access to device */
-+
-+	/*
-+	 * RX and TX descriptors, must be adjacent
-+	 */
-+	ar231x_descr_t *rx_ring;
-+	ar231x_descr_t *tx_ring;
-+
-+
-+	struct sk_buff **rx_skb;
-+	struct sk_buff **tx_skb;
-+
-+	/*
-+	 * RX elements
-+	 */
-+	u32 rx_skbprd;
-+	u32 cur_rx;
-+
-+	/*
-+	 * TX elements
-+	 */
-+	u32 tx_prd;
-+	u32 tx_csm;
-+
-+	/*
-+	 * Misc elements
-+	 */
-+	char name[48];
-+	struct {
-+		u32 address;
-+		u32 length;
-+		char *mapping;
-+	} desc;
-+
-+
-+	struct timer_list link_timer;
-+	unsigned short phy;			/* merlot phy = 1, samsung phy = 0x1f */
-+	unsigned short mac;
-+	unsigned short link;		/* 0 - link down, 1 - link up */
-+	u16 phyData;
-+
-+	struct tasklet_struct rx_tasklet;
-+	int unloading;
-+
-+	struct phy_device *phy_dev;
-+	struct mii_bus *mii_bus;
-+	int oldduplex;
-+};
-+
-+
-+/*
-+ * Prototypes
-+ */
-+static int ar231x_init(struct net_device *dev);
-+#ifdef TX_TIMEOUT
-+static void ar231x_tx_timeout(struct net_device *dev);
-+#endif
-+static int ar231x_restart(struct net_device *dev);
-+static void ar231x_load_rx_ring(struct net_device *dev, int bufs);
-+static irqreturn_t ar231x_interrupt(int irq, void *dev_id);
-+static int ar231x_open(struct net_device *dev);
-+static int ar231x_start_xmit(struct sk_buff *skb, struct net_device *dev);
-+static int ar231x_close(struct net_device *dev);
-+static int ar231x_ioctl(struct net_device *dev, struct ifreq *ifr,
-+						int cmd);
-+static void ar231x_init_cleanup(struct net_device *dev);
-+static int ar231x_setup_timer(struct net_device *dev);
-+static void ar231x_link_timer_fn(unsigned long data);
-+static void ar231x_check_link(struct net_device *dev);
-+#endif							/* _AR2313_H_ */
-diff -Nur linux-2.6.39-rc7.orig/drivers/watchdog/Kconfig linux-2.6.39-rc7/drivers/watchdog/Kconfig
---- linux-2.6.39-rc7.orig/drivers/watchdog/Kconfig	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/drivers/watchdog/Kconfig	2011-05-15 21:34:57.000000000 +0200
-@@ -990,6 +990,12 @@
- 	  To compile this driver as a loadable module, choose M here.
- 	  The module will be called bcm63xx_wdt.
- 
-+config ATHEROS_WDT
-+	tristate "Atheros wisoc Watchdog Timer"
-+	depends on ATHEROS_AR231X
-+	help
-+	  Hardware driver for the Atheros wisoc Watchdog Timer.
-+
- # PARISC Architecture
- 
- # POWERPC Architecture
-diff -Nur linux-2.6.39-rc7.orig/drivers/watchdog/Makefile linux-2.6.39-rc7/drivers/watchdog/Makefile
---- linux-2.6.39-rc7.orig/drivers/watchdog/Makefile	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/drivers/watchdog/Makefile	2011-05-15 21:34:57.000000000 +0200
-@@ -120,6 +120,7 @@
- obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt.o
- obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
- obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
-+obj-$(CONFIG_ATHEROS_WDT) += ar2315-wtd.o
- obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
- obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o
- octeon-wdt-y := octeon-wdt-main.o octeon-wdt-nmi.o
-diff -Nur linux-2.6.39-rc7.orig/drivers/watchdog/ar2315-wtd.c linux-2.6.39-rc7/drivers/watchdog/ar2315-wtd.c
---- linux-2.6.39-rc7.orig/drivers/watchdog/ar2315-wtd.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.39-rc7/drivers/watchdog/ar2315-wtd.c	2011-05-15 21:34:57.000000000 +0200
-@@ -0,0 +1,200 @@
-+/*
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
-+ *
-+ * Copyright (C) 2008 John Crispin <blogic@openwrt.org>
-+ * Based on EP93xx and ifxmips wdt driver
-+ */
-+
-+#include <linux/interrupt.h>
-+#include <linux/module.h>
-+#include <linux/moduleparam.h>
-+#include <linux/types.h>
-+#include <linux/miscdevice.h>
-+#include <linux/watchdog.h>
-+#include <linux/fs.h>
-+#include <linux/ioport.h>
-+#include <linux/notifier.h>
-+#include <linux/reboot.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+
-+#include <asm/io.h>
-+#include <asm/uaccess.h>
-+#include <asm/system.h>
-+#include <asm/addrspace.h>
-+#include <ar231x_platform.h>
-+#include <ar2315_regs.h>
-+#include <ar231x.h>
-+
-+#define CLOCK_RATE 40000000
-+#define HEARTBEAT(x) (x < 1 || x > 90)?(20):(x)
-+
-+static int wdt_timeout = 20;
-+static int started = 0;
-+static int in_use = 0;
-+
-+static void
-+ar2315_wdt_enable(void)
-+{
-+	ar231x_write_reg(AR2315_WD, wdt_timeout * CLOCK_RATE);
-+	ar231x_write_reg(AR2315_ISR, 0x80);
-+}
-+
-+static ssize_t
-+ar2315_wdt_write(struct file *file, const char __user *data, size_t len, loff_t *ppos)
-+{
-+	if(len)
-+		ar2315_wdt_enable();
-+	return len;
-+}
-+
-+static int
-+ar2315_wdt_open(struct inode *inode, struct file *file)
-+{
-+	if(in_use)
-+		return -EBUSY;
-+	ar2315_wdt_enable();
-+	in_use = started = 1;
-+	return nonseekable_open(inode, file);
-+}
-+
-+static int
-+ar2315_wdt_release(struct inode *inode, struct file *file)
-+{
-+	in_use = 0;
-+	return 0;
-+}
-+
-+static irqreturn_t
-+ar2315_wdt_interrupt(int irq, void *dev_id)
-+{
-+	if(started)
-+	{
-+		printk(KERN_CRIT "watchdog expired, rebooting system\n");
-+		emergency_restart();
-+	} else {
-+		ar231x_write_reg(AR2315_WDC, 0);
-+		ar231x_write_reg(AR2315_WD, 0);
-+		ar231x_write_reg(AR2315_ISR, 0x80);
-+	}
-+	return IRQ_HANDLED;
-+}
-+
-+static struct watchdog_info ident = {
-+	.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
-+	.identity = "ar2315 Watchdog",
-+};
-+
-+static int
-+ar2315_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
-+{
-+	int new_wdt_timeout;
-+	int ret = -ENOIOCTLCMD;
-+
-+	switch(cmd)
-+	{
-+		case WDIOC_GETSUPPORT:
-+			ret = copy_to_user((struct watchdog_info __user *)arg, &ident, sizeof(ident)) ? -EFAULT : 0;
-+			break;
-+
-+		case WDIOC_KEEPALIVE:
-+			ar2315_wdt_enable();
-+			ret = 0;
-+			break;
-+
-+		case WDIOC_SETTIMEOUT:
-+			if((ret = get_user(new_wdt_timeout, (int __user *)arg)))
-+				break;
-+			wdt_timeout = HEARTBEAT(new_wdt_timeout);
-+			ar2315_wdt_enable();
-+			break;
-+
-+		case WDIOC_GETTIMEOUT:
-+			ret = put_user(wdt_timeout, (int __user *)arg);
-+			break;
-+	}
-+	return ret;
-+}
-+
-+static struct file_operations ar2315_wdt_fops = {
-+	.owner		= THIS_MODULE,
-+	.llseek		= no_llseek,
-+	.write		= ar2315_wdt_write,
-+	.unlocked_ioctl	= ar2315_wdt_ioctl,
-+	.open		= ar2315_wdt_open,
-+	.release	= ar2315_wdt_release,
-+};
-+
-+static struct miscdevice ar2315_wdt_miscdev = {
-+	.minor	= WATCHDOG_MINOR,
-+	.name	= "watchdog",
-+	.fops	= &ar2315_wdt_fops,
-+};
-+
-+static int
-+ar2315_wdt_probe(struct platform_device *dev)
-+{
-+	int ret = 0;
-+
-+	ar2315_wdt_enable();
-+	ret = request_irq(AR531X_MISC_IRQ_WATCHDOG, ar2315_wdt_interrupt, IRQF_DISABLED, "ar2315_wdt", NULL);
-+	if(ret)
-+	{
-+		printk(KERN_ERR "ar2315wdt: failed to register inetrrupt\n");
-+		goto out;
-+	}
-+
-+	ret = misc_register(&ar2315_wdt_miscdev);
-+	if(ret)
-+		printk(KERN_ERR "ar2315wdt: failed to register miscdev\n");
-+
-+out:
-+	return ret;
-+}
-+
-+static int
-+ar2315_wdt_remove(struct platform_device *dev)
-+{
-+	misc_deregister(&ar2315_wdt_miscdev);
-+	free_irq(AR531X_MISC_IRQ_WATCHDOG, NULL);
-+	return 0;
-+}
-+
-+static struct platform_driver ar2315_wdt_driver = {
-+	.probe = ar2315_wdt_probe,
-+	.remove = ar2315_wdt_remove,
-+	.driver = {
-+		.name = "ar2315_wdt",
-+		.owner = THIS_MODULE,
-+	},
-+};
-+
-+static int __init
-+init_ar2315_wdt(void)
-+{
-+	int ret = platform_driver_register(&ar2315_wdt_driver);
-+	if(ret)
-+		printk(KERN_INFO "ar2315_wdt: error registering platfom driver!");
-+	return ret;
-+}
-+
-+static void __exit
-+exit_ar2315_wdt(void)
-+{
-+	platform_driver_unregister(&ar2315_wdt_driver);
-+}
-+
-+module_init(init_ar2315_wdt);
-+module_exit(exit_ar2315_wdt);
diff --git a/target/linux/patches/3.1.10/mtd-rootfs.patch b/target/linux/patches/3.1.10/mtd-rootfs.patch
deleted file mode 100644
index 5dad745d8..000000000
--- a/target/linux/patches/3.1.10/mtd-rootfs.patch
+++ /dev/null
@@ -1,26 +0,0 @@
-diff -Nur linux-3.0.17.orig/drivers/mtd/mtdpart.c linux-3.0.17/drivers/mtd/mtdpart.c
---- linux-3.0.17.orig/drivers/mtd/mtdpart.c	2012-01-12 20:54:29.000000000 +0100
-+++ linux-3.0.17/drivers/mtd/mtdpart.c	2012-01-18 12:00:59.000000000 +0100
-@@ -30,6 +30,7 @@
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
- #include <linux/err.h>
-+#include <linux/root_dev.h>
- 
- #include "mtdcore.h"
- 
-@@ -661,6 +662,14 @@
- 		if (IS_ERR(slave))
- 			return PTR_ERR(slave);
- 
-+		if (strcmp(parts[i].name, "rootfs") == 0) {
-+			if (ROOT_DEV == 0) {
-+				printk(KERN_NOTICE "mtd: partition \"rootfs\" "
-+					"set to be root filesystem\n");
-+					ROOT_DEV = MKDEV(MTD_BLOCK_MAJOR, i);
-+			}
-+		}
-+
- 		mutex_lock(&mtd_partitions_mutex);
- 		list_add(&slave->list, &mtd_partitions);
- 		mutex_unlock(&mtd_partitions_mutex);
diff --git a/target/linux/patches/3.1.10/uuid.patch b/target/linux/patches/3.1.10/uuid.patch
deleted file mode 100644
index 2529fdab5..000000000
--- a/target/linux/patches/3.1.10/uuid.patch
+++ /dev/null
@@ -1,255 +0,0 @@
-diff -Nur linux-2.6.38.4.orig/block/genhd.c linux-2.6.38.4/block/genhd.c
---- linux-2.6.38.4.orig/block/genhd.c	2011-04-21 23:34:46.000000000 +0200
-+++ linux-2.6.38.4/block/genhd.c	2011-04-27 19:21:18.668912036 +0200
-@@ -34,7 +34,7 @@
- static DEFINE_MUTEX(ext_devt_mutex);
- static DEFINE_IDR(ext_devt_idr);
- 
--static struct device_type disk_type;
-+struct device_type disk_type;
- 
- static void disk_add_events(struct gendisk *disk);
- static void disk_del_events(struct gendisk *disk);
-@@ -1118,7 +1118,7 @@
- 	return NULL;
- }
- 
--static struct device_type disk_type = {
-+struct device_type disk_type = {
- 	.name		= "disk",
- 	.groups		= disk_attr_groups,
- 	.release	= disk_release,
-diff -Nur linux-2.6.38.4.orig/init/do_mounts.c linux-2.6.38.4/init/do_mounts.c
---- linux-2.6.38.4.orig/init/do_mounts.c	2011-04-21 23:34:46.000000000 +0200
-+++ linux-2.6.38.4/init/do_mounts.c	2011-04-27 19:26:52.721413000 +0200
-@@ -32,6 +32,132 @@
- 
- dev_t ROOT_DEV;
- 
-+#ifdef CONFIG_EXT2_FS
-+/* support for root=UUID=ce40d6b2-18eb-4a75-aefe-7ddb0995ce63 bootargs */
-+
-+#include <linux/ext2_fs.h>
-+
-+__u8 root_dev_uuid[16];
-+int root_dev_type;	/* 0 = normal (/dev/hda1, 0301); 1 = UUID; 3 = bad */
-+
-+/* imported from block/genhd.c after removing its static qualifier */
-+extern struct device_type disk_type;
-+
-+/* helper function */
-+static __u8 __init fromhex(char c)
-+{
-+	if (c >= '0' && c <= '9')
-+		return (c - '0');
-+	c &= ~32;
-+	if (c >= 'A' && c <= 'F')
-+		return (c - 'A' + 10);
-+	return (0xFF);
-+}
-+
-+static void __init parse_uuid(const char *s)
-+{
-+	int i;
-+	__u8 j, k;
-+
-+	if (strlen(s) != 36 || s[8] != '-' || s[13] != '-' ||
-+	    s[18] != '-' || s[23] != '-')
-+		goto bad_uuid;
-+	for (i = 0; i < 16; i++) {
-+		if (*s == '-')
-+			++s;
-+		j = fromhex(*s++);
-+		k = fromhex(*s++);
-+		if (j == 0xFF || k == 0xFF)
-+			goto bad_uuid;
-+		root_dev_uuid[i] = (j << 4) | k;
-+	}
-+	return;
-+ bad_uuid:
-+	/* we cannot panic here, defer */
-+	root_dev_type = 3;
-+}
-+
-+/* from drivers/md/md.c */
-+static void __init initcode_bi_complete(struct bio *bio, int error)
-+{
-+	complete((struct completion*)bio->bi_private);
-+}
-+
-+static int __init initcode_sync_page_read(struct block_device *bdev,
-+    sector_t sector, int size, struct page *page)
-+{
-+	struct bio *bio = bio_alloc(GFP_NOIO, 1);
-+	struct completion event;
-+	int ret, rw = READ;
-+
-+	rw |= REQ_SYNC;
-+
-+	bio->bi_bdev = bdev;
-+	bio->bi_sector = sector;
-+	bio_add_page(bio, page, size, 0);
-+	init_completion(&event);
-+	bio->bi_private = &event;
-+	bio->bi_end_io = initcode_bi_complete;
-+	submit_bio(rw, bio);
-+	wait_for_completion(&event);
-+
-+	ret = test_bit(BIO_UPTODATE, &bio->bi_flags);
-+	bio_put(bio);
-+	/* 0 = failure */
-+	return ret;
-+}
-+
-+/* most of this taken from fs/ext2/super.c */
-+static int __init check_dev(struct gendisk *thedisk, dev_t devt,
-+    int blocksize, struct page *page)
-+{
-+	struct ext2_super_block * es;
-+	struct block_device *bdev;
-+	unsigned long sb_block = 1;
-+	unsigned long logic_sb_block;
-+	unsigned long offset = 0;
-+	int rv = /* not found */ 0;
-+	char bff[22];
-+
-+	bdev = bdget(devt);
-+	if (blkdev_get(bdev, FMODE_READ, NULL)) {
-+		printk(KERN_ERR "VFS: opening block device %s failed!\n",
-+		    format_dev_t(bff, devt));
-+		return (0);
-+	}
-+
-+	if (blocksize != BLOCK_SIZE) {
-+		logic_sb_block = (sb_block*BLOCK_SIZE) / blocksize;
-+		offset = (sb_block*BLOCK_SIZE) % blocksize;
-+	} else {
-+		logic_sb_block = sb_block;
-+	}
-+
-+//	printk(KERN_ERR "D: attempting to read %d @%lu from "
-+//	    "bdev %p devt %08X %s\n", blocksize, logic_sb_block,
-+//	    bdev, devt, format_dev_t(bff, devt));
-+	if (!initcode_sync_page_read(bdev, logic_sb_block, blocksize, page)) {
-+//		printk(KERN_ERR "D: failed!\n");
-+		goto out;
-+	}
-+	es = (struct ext2_super_block *)(((char *)page_address(page)) + offset);
-+	if (le16_to_cpu(es->s_magic) == EXT2_SUPER_MAGIC) {
-+//		printk(KERN_ERR "D: has uuid "
-+//		    "%02X%02X%02X%02X-%02X%02X-%02X%02X-%02X%02X-%02X%02X%02X%02X%02X%02X\n",
-+//		    es->s_uuid[0], es->s_uuid[1], es->s_uuid[2], es->s_uuid[3],
-+//		    es->s_uuid[4], es->s_uuid[5], es->s_uuid[6], es->s_uuid[7],
-+//		    es->s_uuid[8], es->s_uuid[9], es->s_uuid[10], es->s_uuid[11],
-+//		    es->s_uuid[12], es->s_uuid[13], es->s_uuid[14], es->s_uuid[15]);
-+		if (!memcmp(es->s_uuid, root_dev_uuid, 16))
-+			rv = /* found */ 1;
-+	}
-+//	  else printk(KERN_ERR "D: bad ext2fs magic\n");
-+ out:
-+	blkdev_put(bdev, FMODE_READ);
-+	return (rv);
-+}
-+#endif /* CONFIG_EXT2_FS for UUID support */
-+
- static int __init load_ramdisk(char *str)
- {
- 	rd_doload = simple_strtol(str,NULL,0) & 3;
-@@ -218,6 +344,13 @@
- static int __init root_dev_setup(char *line)
- {
- 	strlcpy(saved_root_name, line, sizeof(saved_root_name));
-+#ifdef CONFIG_EXT2_FS
-+	root_dev_type = 0;
-+	if (!strncmp(line, "UUID=", 5)) {
-+		root_dev_type = 1;
-+		parse_uuid(line + 5);
-+	}
-+#endif /* CONFIG_EXT2_FS for UUID support */
- 	return 1;
- }
- 
-@@ -403,6 +536,83 @@
- 
- void __init mount_root(void)
- {
-+#ifdef CONFIG_EXT2_FS
-+	/* UUID support */
-+//	printk_all_partitions();
-+	if (root_dev_type == 1) {
-+		int blocksize;
-+
-+		/* from block/genhd.c printk_all_partitions */
-+		struct class_dev_iter iter;
-+		struct device *dev;
-+
-+		/* from drivers/md/md.c */
-+		struct page *sb_page;
-+
-+		if (!(sb_page = alloc_page(GFP_KERNEL))) {
-+			printk(KERN_ERR "VFS: no memory for bio page\n");
-+			goto nomemforbio;
-+		}
-+
-+//		printk(KERN_ERR "D: root is: "
-+//		    "%02X%02X%02X%02X-%02X%02X-%02X%02X-%02X%02X-%02X%02X%02X%02X%02X%02X\n",
-+//		    root_dev_uuid[0], root_dev_uuid[1], root_dev_uuid[2], root_dev_uuid[3],
-+//		    root_dev_uuid[4], root_dev_uuid[5], root_dev_uuid[6], root_dev_uuid[7],
-+//		    root_dev_uuid[8], root_dev_uuid[9], root_dev_uuid[10], root_dev_uuid[11],
-+//		    root_dev_uuid[12], root_dev_uuid[13], root_dev_uuid[14], root_dev_uuid[15]);
-+		/* from block/genhd.c printk_all_partitions */
-+//		printk(KERN_ERR "D: begin iter\n");
-+		class_dev_iter_init(&iter, &block_class, NULL, &disk_type);
-+		while (root_dev_type && (dev = class_dev_iter_next(&iter))) {
-+//			char bff[22];
-+			struct gendisk *disk = dev_to_disk(dev);
-+			struct disk_part_iter piter;
-+			struct hd_struct *part;
-+			if (get_capacity(disk) == 0 ||
-+			    (disk->flags & GENHD_FL_SUPPRESS_PARTITION_INFO)) {
-+//				printk(KERN_ERR "D: ignoring\n");
-+				continue;
-+			}
-+			blocksize = queue_logical_block_size(disk->queue);
-+//			printk(KERN_ERR "D: gendisk, blocksize %d "
-+//			    "name '%s' devt %08X %s #part %d\n", blocksize,
-+//			    disk->disk_name, dev->devt,
-+//			    format_dev_t(bff, dev->devt),
-+//			    disk_max_parts(disk));
-+			disk_part_iter_init(&piter, disk, DISK_PITER_INCL_PART0);
-+			while (root_dev_type && (part = disk_part_iter_next(&piter))) {
-+				/* avoid empty or too small partitions */
-+//				printk(KERN_ERR "D: part #%d start %llu "
-+//				    "nr %llu\n", part->partno,
-+//				    (__u64)part->start_sect,
-+//				    (__u64)part->nr_sects);
-+				if (part->nr_sects < 8)
-+					continue;
-+				if (check_dev(disk, MKDEV(MAJOR(dev->devt),
-+				    MINOR(dev->devt) + part->partno),
-+				    blocksize, sb_page)) {
-+					ROOT_DEV = part_devt(part);
-+//					printk(KERN_ERR "D: got match!\n");
-+					// comment out below for debugging
-+					root_dev_type = 0;
-+				}
-+			}
-+			disk_part_iter_exit(&piter);
-+		}
-+//		printk(KERN_ERR "D: end iter\n");
-+		class_dev_iter_exit(&iter);
-+		put_page(sb_page);
-+	}
-+ nomemforbio:
-+	if (root_dev_type == 1)
-+		printk(KERN_ERR "VFS: Unable to find root by UUID %s.\n",
-+		    saved_root_name + 5);
-+	else if (root_dev_type == 3)
-+		/* execute deferred panic from parse_uuid */
-+		panic("Badly formatted UUID %s was supplied as kernel "
-+		    "parameter root", saved_root_name + 5);
-+#endif /* CONFIG_EXT2_FS for UUID support */
-+
- #ifdef CONFIG_ROOT_NFS
- 	if (MAJOR(ROOT_DEV) == UNNAMED_MAJOR) {
- 		if (mount_nfs_root())
diff --git a/target/linux/patches/3.1.10/x86-build.patch b/target/linux/patches/3.1.10/x86-build.patch
deleted file mode 100644
index 339140f41..000000000
--- a/target/linux/patches/3.1.10/x86-build.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.39-rc6.orig/arch/x86/boot/tools/build.c linux-2.6.39-rc6/arch/x86/boot/tools/build.c
---- linux-2.6.39-rc6.orig/arch/x86/boot/tools/build.c	2011-05-04 04:59:13.000000000 +0200
-+++ linux-2.6.39-rc6/arch/x86/boot/tools/build.c	2011-05-05 20:10:07.000000000 +0200
-@@ -29,7 +29,6 @@
- #include <stdarg.h>
- #include <sys/types.h>
- #include <sys/stat.h>
--#include <sys/sysmacros.h>
- #include <unistd.h>
- #include <fcntl.h>
- #include <sys/mman.h>
diff --git a/target/linux/patches/3.2.20/brcm.patch b/target/linux/patches/3.2.20/brcm.patch
deleted file mode 100644
index e3e37237f..000000000
--- a/target/linux/patches/3.2.20/brcm.patch
+++ /dev/null
@@ -1,466 +0,0 @@
-diff -Nur linux-3.2.18.orig/arch/mips/Kconfig linux-3.2.18/arch/mips/Kconfig
---- linux-3.2.18.orig/arch/mips/Kconfig	2012-05-20 23:56:54.000000000 +0200
-+++ linux-3.2.18/arch/mips/Kconfig	2012-06-07 17:55:16.000000000 +0200
-@@ -99,6 +99,12 @@
- 	select GENERIC_GPIO
- 	select SYS_HAS_EARLY_PRINTK
- 	select CFE
-+	select SYS_SUPPORTS_ZBOOT_UART16550
-+	select HAVE_KERNEL_GZIP
-+        select HAVE_KERNEL_BZIP2
-+        select HAVE_KERNEL_LZMA
-+        select HAVE_KERNEL_XZ
-+        select HAVE_KERNEL_LZO
- 	help
- 	 Support for BCM47XX based boards
- 
-diff -Nur linux-3.2.18.orig/arch/mips/Makefile linux-3.2.18/arch/mips/Makefile
---- linux-3.2.18.orig/arch/mips/Makefile	2012-05-20 23:56:54.000000000 +0200
-+++ linux-3.2.18/arch/mips/Makefile	2012-06-07 17:55:16.000000000 +0200
-@@ -76,6 +76,7 @@
- all-$(CONFIG_BOOT_ELF32)	:= $(vmlinux-32)
- all-$(CONFIG_BOOT_ELF64)	:= $(vmlinux-64)
- all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlinuz
-+all-$(CONFIG_BCM47XX)		+= vmlinuz.elf
- 
- #
- # GCC uses -G 0 -mabicalls -fpic as default.  We don't want PIC in the kernel
-@@ -276,7 +277,7 @@
- 	$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) arch/mips/boot/$@
- 
- # boot/compressed
--vmlinuz vmlinuz.bin vmlinuz.ecoff vmlinuz.srec: $(vmlinux-32) FORCE
-+vmlinuz vmlinuz.bin vmlinuz.ecoff vmlinuz.srec vmlinuz.elf: $(vmlinux-32) FORCE
- 	$(Q)$(MAKE) $(build)=arch/mips/boot/compressed \
- 	   VMLINUX_LOAD_ADDRESS=$(load-y) 32bit-bfd=$(32bit-bfd) $@
- 
-@@ -315,6 +316,7 @@
- 	echo '  vmlinuz.ecoff        - ECOFF zboot image'
- 	echo '  vmlinuz.bin          - Raw binary zboot image'
- 	echo '  vmlinuz.srec         - SREC zboot image'
-+	echo '  vmlinuz.elf          - ELF self-relocating zboot image'
- 	echo
- 	echo '  These will be default as appropriate for a configured platform.'
- endef
-diff -Nur linux-3.2.18.orig/arch/mips/bcm47xx/Makefile linux-3.2.18/arch/mips/bcm47xx/Makefile
---- linux-3.2.18.orig/arch/mips/bcm47xx/Makefile	2012-05-20 23:56:54.000000000 +0200
-+++ linux-3.2.18/arch/mips/bcm47xx/Makefile	2012-06-07 17:55:43.000000000 +0200
-@@ -3,5 +3,4 @@
- # under Linux.
- #
- 
--obj-y 				+= gpio.o irq.o nvram.o prom.o serial.o setup.o time.o
--obj-$(CONFIG_BCM47XX_SSB)	+= wgt634u.o
-+obj-y 				+= gpio.o irq.o nvram.o prom.o serial.o setup.o time.o platform.o
-diff -Nur linux-3.2.18.orig/arch/mips/bcm47xx/platform.c linux-3.2.18/arch/mips/bcm47xx/platform.c
---- linux-3.2.18.orig/arch/mips/bcm47xx/platform.c	1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.2.18/arch/mips/bcm47xx/platform.c	2012-06-07 18:19:11.000000000 +0200
-@@ -0,0 +1,146 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License.  See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2010, 2011 Waldemar Brodkorb <wbx@openadk.org>
-+ * Copyright © 2007, 2011 Thorsten Glaser <tg@freewrt.org>
-+ */
-+
-+#include <linux/platform_device.h>
-+#include <linux/module.h>
-+#include <linux/mtd/physmap.h>
-+#include <linux/ssb/ssb.h>
-+
-+#include <asm/mach-bcm47xx/bcm47xx.h>
-+#include <asm/mach-bcm47xx/nvram.h>
-+
-+#define CFGFS_FLASH_SIZE (128 * 1024)
-+
-+static struct mtd_partition bcm47xx_partitions[] = {
-+#define SLOT_CFE 0
-+	{
-+		.name       = "cfe",
-+		.offset     = 0,
-+		.size       = BCM47XX_OVERRIDE_CFESIZE,
-+		.mask_flags = MTD_WRITEABLE		/* force read-only */
-+	},
-+#define SLOT_LINUX 1
-+	{
-+		.name   = "linux",
-+		.offset = 0,
-+		.size   = 0,
-+	},
-+#define SLOT_ROOTFS 2
-+	{
-+		.name   = "rootfs",
-+		.offset = 0,
-+		.size   = 0,
-+	},
-+#define SLOT_CFGFS 3
-+	{
-+		.name   = "cfgfs",
-+		.offset = 0,
-+		.size   = 0,
-+	},
-+#define SLOT_NVRAM 4
-+	{
-+		.name   = "nvram",
-+		.offset = 0,
-+		.size   = 0,
-+	},
-+};
-+
-+static struct physmap_flash_data bcm47xx_flash_data = {
-+	.parts    = bcm47xx_partitions,
-+	.nr_parts = ARRAY_SIZE(bcm47xx_partitions)
-+};
-+
-+static struct resource bcm47xx_flash_resource = {
-+	.flags = IORESOURCE_MEM,
-+};
-+
-+static struct platform_device bcm47xx_flash = {
-+	.name          = "physmap-flash",
-+	.id            = 0,
-+	.dev           = { .platform_data = &bcm47xx_flash_data, },
-+	.resource      = &bcm47xx_flash_resource,
-+	.num_resources = 1,
-+};
-+
-+static struct platform_device *bcm47xx_devices[] __initdata = {
-+	&bcm47xx_flash,
-+};
-+
-+struct bcm47xx_trx_header {
-+#define BCM47XX_TRX_MAGIC 0x30524448
-+	u32 magic;
-+	u32 len;
-+	u32 crc32;
-+	u32 flag_version;
-+	u32 offsets[3];
-+};
-+
-+#define UPTODOWN(slot, psize) do {			\
-+	posn -= psize; left -= psize;			\
-+	bcm47xx_partitions[slot].offset = posn;		\
-+	bcm47xx_partitions[slot].size = psize;		\
-+} while (/* CONSTCOND */ 0)
-+
-+static int __init bcm47xx_register_devices(void)
-+{
-+	u32 flash_size;
-+	size_t left, posn;
-+	struct ssb_mipscore *mcore = &bcm47xx_bus.ssb.mipscore;
-+	struct bcm47xx_trx_header *trx_hdr;
-+
-+	trx_hdr = (void *)KSEG1ADDR(mcore->flash_window + BCM47XX_OVERRIDE_CFESIZE);
-+
-+	/* devices might have 2, 4 or 8 MB flash size */
-+#ifdef BCM47XX_OVERRIDE_FLASHSIZE
-+	flash_size = BCM47XX_OVERRIDE_FLASHSIZE;
-+	mcore->flash_window_size = flash_size;
-+#define BCM47XX_OVERRODE_FLASHSIZE " (overridden)"
-+#else
-+	flash_size = mcore->flash_window_size;
-+#define BCM47XX_OVERRODE_FLASHSIZE ""
-+#endif
-+	printk(KERN_INFO "FLASH SIZE%s: %x\n", BCM47XX_OVERRODE_FLASHSIZE,
-+		flash_size);
-+
-+	left = flash_size - BCM47XX_OVERRIDE_CFESIZE;
-+	posn = flash_size;
-+	UPTODOWN(SLOT_NVRAM, BCM47XX_OVERRIDE_NVRAMSIZE);
-+	UPTODOWN(SLOT_CFGFS, CFGFS_FLASH_SIZE);
-+	bcm47xx_partitions[SLOT_LINUX].offset = BCM47XX_OVERRIDE_CFESIZE;
-+	bcm47xx_partitions[SLOT_LINUX].size = left;
-+
-+	if (trx_hdr->magic == BCM47XX_TRX_MAGIC) {
-+		bcm47xx_partitions[SLOT_ROOTFS].offset =
-+		    bcm47xx_partitions[SLOT_LINUX].offset +
-+		    trx_hdr->offsets[1];
-+		bcm47xx_partitions[SLOT_ROOTFS].size =
-+		    bcm47xx_partitions[SLOT_LINUX].size -
-+		    trx_hdr->offsets[1];
-+	} else
-+		printk("bcm47xx/platform: no TRX header found\n");
-+
-+	printk(KERN_INFO "=== Flash map dump ===\n");
-+	for (posn = 0; posn < bcm47xx_flash_data.nr_parts; ++posn)
-+		printk(KERN_INFO " #%u %08X @%08X '%s'\n",
-+		    (unsigned int)posn,
-+		    (unsigned int)bcm47xx_partitions[posn].size,
-+		    (unsigned int)bcm47xx_partitions[posn].offset,
-+		    bcm47xx_partitions[posn].name);
-+	printk(KERN_INFO "=== Hope this works, have a nice day\n");
-+
-+	bcm47xx_flash_data.width = mcore->flash_buswidth;
-+	bcm47xx_flash_resource.start = mcore->flash_window;
-+	bcm47xx_flash_resource.end = mcore->flash_window
-+				   + mcore->flash_window_size
-+				   - 1;
-+	return platform_add_devices(bcm47xx_devices,
-+			    ARRAY_SIZE(bcm47xx_devices));
-+}
-+
-+device_initcall(bcm47xx_register_devices);
-diff -Nur linux-3.2.18.orig/arch/mips/boot/compressed/Makefile linux-3.2.18/arch/mips/boot/compressed/Makefile
---- linux-3.2.18.orig/arch/mips/boot/compressed/Makefile	2012-05-20 23:56:54.000000000 +0200
-+++ linux-3.2.18/arch/mips/boot/compressed/Makefile	2012-06-07 17:55:16.000000000 +0200
-@@ -44,6 +44,7 @@
- tool_$(CONFIG_KERNEL_BZIP2)   = bzip2
- tool_$(CONFIG_KERNEL_LZMA)    = lzma
- tool_$(CONFIG_KERNEL_LZO)     = lzo
-+tool_$(CONFIG_KERNEL_XZ)      = xzkern
- 
- targets += vmlinux.bin.z
- $(obj)/vmlinux.bin.z: $(obj)/vmlinux.bin FORCE
-@@ -58,8 +59,13 @@
- # Calculate the load address of the compressed kernel image
- hostprogs-y := calc_vmlinuz_load_addr
- 
-+ifdef CONFIG_BCM47XX
-+# XXX just after CFE, just pray the address is static
-+VMLINUZ_LOAD_ADDRESS = 0xffffffff80900000
-+else
- VMLINUZ_LOAD_ADDRESS = $(shell $(obj)/calc_vmlinuz_load_addr \
- 		$(obj)/vmlinux.bin $(VMLINUX_LOAD_ADDRESS))
-+endif
- 
- vmlinuzobjs-y += $(obj)/piggy.o
- 
-@@ -105,4 +111,12 @@
- vmlinuz.srec: vmlinuz
- 	$(call cmd,objcopy)
- 
--clean-files := $(objtree)/vmlinuz $(objtree)/vmlinuz.{32,ecoff,bin,srec}
-+AFLAGS_selfreloc.o := -DVMLINUZ_LOAD_ADDRESS=$(VMLINUZ_LOAD_ADDRESS)
-+CPPFLAGS_selfreloc.lds := $(KBUILD_CFLAGS)
-+
-+arch/mips/boot/compressed/selfreloc.o: arch/mips/boot/compressed/selfreloc.S vmlinuz.bin FORCE
-+
-+vmlinuz.elf: arch/mips/boot/compressed/selfreloc.o arch/mips/boot/compressed/selfreloc.lds FORCE
-+	$(LD) $(LDFLAGS) -T arch/mips/boot/compressed/selfreloc.lds arch/mips/boot/compressed/selfreloc.o -o $@
-+
-+clean-files := $(objtree)/vmlinuz $(objtree)/vmlinuz.{32,ecoff,bin,srec,elf} $(objtree)/arch/mips/boot/compressed/selfreloc.{o,lds}
-diff -Nur linux-3.2.18.orig/arch/mips/boot/compressed/decompress.c linux-3.2.18/arch/mips/boot/compressed/decompress.c
---- linux-3.2.18.orig/arch/mips/boot/compressed/decompress.c	2012-05-20 23:56:54.000000000 +0200
-+++ linux-3.2.18/arch/mips/boot/compressed/decompress.c	2012-06-07 17:55:16.000000000 +0200
-@@ -43,7 +43,7 @@
- /* activate the code for pre-boot environment */
- #define STATIC static
- 
--#ifdef CONFIG_KERNEL_GZIP
-+#if defined(CONFIG_KERNEL_GZIP) || defined(CONFIG_KERNEL_XZ)
- void *memcpy(void *dest, const void *src, size_t n)
- {
- 	int i;
-@@ -54,6 +54,8 @@
- 		d[i] = s[i];
- 	return dest;
- }
-+#endif
-+#ifdef CONFIG_KERNEL_GZIP
- #include "../../../../lib/decompress_inflate.c"
- #endif
- 
-@@ -78,6 +80,10 @@
- #include "../../../../lib/decompress_unlzo.c"
- #endif
- 
-+#ifdef CONFIG_KERNEL_XZ
-+#include "../../../../lib/decompress_unxz.c"
-+#endif
-+
- void decompress_kernel(unsigned long boot_heap_start)
- {
- 	unsigned long zimage_start, zimage_size;
-diff -Nur linux-3.2.18.orig/arch/mips/boot/compressed/selfreloc.S linux-3.2.18/arch/mips/boot/compressed/selfreloc.S
---- linux-3.2.18.orig/arch/mips/boot/compressed/selfreloc.S	1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.2.18/arch/mips/boot/compressed/selfreloc.S	2012-06-07 17:55:16.000000000 +0200
-@@ -0,0 +1,54 @@
-+/*-
-+ * written 2011 by Thorsten Glaser <tg@freewrt.org> based on
-+ * arch/mips/boot/compressed/head.S
-+ */
-+
-+#include <asm/asm.h>
-+#include <asm/regdef.h>
-+
-+	.set noreorder
-+	.cprestore
-+
-+	.text
-+	LEAF(selfreloc_start)
-+selfreloc_start:
-+	/* Save boot rom start args */
-+	move	s0, a0
-+	move	s1, a1
-+	move	s2, a2
-+	move	s3, a3
-+
-+	/* Copy code to the correct place */
-+	PTR_LI	a0, VMLINUZ_LOAD_ADDRESS
-+	PTR_LA	a1, imgbeg
-+	PTR_LA	a2, imgend
-+1:	lw	t0, 0(a1)
-+	sw	t0, 0(a0)
-+	add	a1, 4
-+	add	a0, 4
-+	blt	a1, a2, 1b
-+	 nop
-+
-+	/* Restore boot rom start args */
-+	move	a0, s0
-+	move	a1, s1
-+	move	a2, s2
-+	move	a3, s3
-+
-+	/* Jump to the code at its new location */
-+	PTR_LI	k0, VMLINUZ_LOAD_ADDRESS
-+	jr	k0
-+	 nop
-+
-+	/* Just in case we come back… */
-+3:
-+	b	3b
-+	 nop
-+	END(selfreloc_start)
-+
-+	.globl	imgbeg
-+	.p2align 2
-+imgbeg:	.incbin	"vmlinuz.bin"
-+	.globl	imgend
-+	.p2align 2
-+imgend:
-diff -Nur linux-3.2.18.orig/arch/mips/boot/compressed/selfreloc.lds.S linux-3.2.18/arch/mips/boot/compressed/selfreloc.lds.S
---- linux-3.2.18.orig/arch/mips/boot/compressed/selfreloc.lds.S	1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.2.18/arch/mips/boot/compressed/selfreloc.lds.S	2012-06-07 17:55:16.000000000 +0200
-@@ -0,0 +1,39 @@
-+/*-
-+ * written 2010 by Thorsten Glaser <tg@debian.org> based on
-+ * arch/mips/kernel/vmlinux.lds and arch/mips/boot/compressed/ld.script
-+ */
-+
-+#include <asm/asm-offsets.h>
-+#include <asm/page.h>
-+#include <asm-generic/vmlinux.lds.h>
-+
-+#undef mips
-+#define mips mips
-+OUTPUT_ARCH(mips)
-+ENTRY(selfreloc_start)
-+PHDRS {
-+	text PT_LOAD FLAGS(7);	/* RWX */
-+}
-+SECTIONS
-+{
-+	. = VMLINUX_LOAD_ADDRESS;
-+	.text : {
-+		*(.text)
-+		*(.text.*)
-+		*(.rodata)
-+		*(.rodata.*)
-+		*(.data)
-+		*(.data.*)
-+		*(.bss)
-+		*(.bss.*)
-+	} :text
-+	/DISCARD/ : {
-+		*(.MIPS.options)
-+		*(.options)
-+		*(.pdr)
-+		*(.reginfo)
-+		*(.comment)
-+		*(.note)
-+		*(.gnu.attributes)
-+	}
-+}
-diff -Nur linux-3.2.18.orig/arch/mips/boot/compressed/uart-16550.c linux-3.2.18/arch/mips/boot/compressed/uart-16550.c
---- linux-3.2.18.orig/arch/mips/boot/compressed/uart-16550.c	2012-05-20 23:56:54.000000000 +0200
-+++ linux-3.2.18/arch/mips/boot/compressed/uart-16550.c	2012-06-07 17:55:16.000000000 +0200
-@@ -18,6 +18,11 @@
- #define PORT(offset) (CKSEG1ADDR(AR7_REGS_UART0) + (4 * offset))
- #endif
- 
-+#ifdef CONFIG_BCM47XX
-+#define UART_BASE 0x18000300
-+#define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset))
-+#endif
-+
- #ifndef PORT
- #error please define the serial port address for your own machine
- #endif
-diff -Nur linux-3.2.18.orig/drivers/ssb/driver_mipscore.c linux-3.2.18/drivers/ssb/driver_mipscore.c
---- linux-3.2.18.orig/drivers/ssb/driver_mipscore.c	2012-05-20 23:56:54.000000000 +0200
-+++ linux-3.2.18/drivers/ssb/driver_mipscore.c	2012-06-07 17:55:16.000000000 +0200
-@@ -190,10 +190,11 @@
- {
- 	struct ssb_bus *bus = mcore->dev->bus;
- 
-+	printk("Check for vendor with value: %d", bus->chipco.dev->id.vendor);
- 	mcore->flash_buswidth = 2;
- 	if (bus->chipco.dev) {
- 		mcore->flash_window = 0x1c000000;
--		mcore->flash_window_size = 0x02000000;
-+		mcore->flash_window_size = 0x00800000;
- 		if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
- 		               & SSB_CHIPCO_CFG_DS16) == 0)
- 			mcore->flash_buswidth = 1;
-diff -Nur linux-3.2.18.orig/init/Kconfig linux-3.2.18/init/Kconfig
---- linux-3.2.18.orig/init/Kconfig	2012-05-20 23:56:54.000000000 +0200
-+++ linux-3.2.18/init/Kconfig	2012-06-07 17:55:16.000000000 +0200
-@@ -155,6 +155,7 @@
- config KERNEL_GZIP
- 	bool "Gzip"
- 	depends on HAVE_KERNEL_GZIP
-+	select DECOMPRESS_GZIP
- 	help
- 	  The old and tried gzip compression. It provides a good balance
- 	  between compression ratio and decompression speed.
-@@ -162,6 +163,7 @@
- config KERNEL_BZIP2
- 	bool "Bzip2"
- 	depends on HAVE_KERNEL_BZIP2
-+	select DECOMPRESS_BZIP2
- 	help
- 	  Its compression ratio and speed is intermediate.
- 	  Decompression speed is slowest among the three.  The kernel
-@@ -172,6 +174,7 @@
- config KERNEL_LZMA
- 	bool "LZMA"
- 	depends on HAVE_KERNEL_LZMA
-+	select DECOMPRESS_LZMA
- 	help
- 	  The most recent compression algorithm.
- 	  Its ratio is best, decompression speed is between the other
-@@ -181,6 +184,7 @@
- config KERNEL_XZ
- 	bool "XZ"
- 	depends on HAVE_KERNEL_XZ
-+	select DECOMPRESS_XZ
- 	help
- 	  XZ uses the LZMA2 algorithm and instruction set specific
- 	  BCJ filters which can improve compression ratio of executable
-@@ -196,6 +200,7 @@
- config KERNEL_LZO
- 	bool "LZO"
- 	depends on HAVE_KERNEL_LZO
-+	select DECOMPRESS_LZO
- 	help
- 	  Its compression ratio is the poorest among the 4. The kernel
- 	  size is about 10% bigger than gzip; however its speed
-diff -Nur linux-3.2.18.orig/lib/xz/xz_stream.h linux-3.2.18/lib/xz/xz_stream.h
---- linux-3.2.18.orig/lib/xz/xz_stream.h	2012-05-20 23:56:54.000000000 +0200
-+++ linux-3.2.18/lib/xz/xz_stream.h	2012-06-07 17:55:16.000000000 +0200
-@@ -40,7 +40,12 @@
-  * compressed size of the file to less than 256 MiB and may also weaken
-  * error detection slightly.
-  */
-+
-+#ifdef __mips__
-+typedef uint32_t vli_type;
-+#else
- typedef uint64_t vli_type;
-+#endif
- 
- #define VLI_MAX ((vli_type)-1 / 2)
- #define VLI_UNKNOWN ((vli_type)-1)
diff --git a/target/linux/patches/3.2.20/bsd-compatibility.patch b/target/linux/patches/3.2.20/bsd-compatibility.patch
deleted file mode 100644
index 9e91a62de..000000000
--- a/target/linux/patches/3.2.20/bsd-compatibility.patch
+++ /dev/null
@@ -1,2512 +0,0 @@
-diff -Nur linux-2.6.36.orig/scripts/Makefile.lib linux-2.6.36/scripts/Makefile.lib
---- linux-2.6.36.orig/scripts/Makefile.lib	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/scripts/Makefile.lib	2010-11-28 18:34:22.000000000 +0100
-@@ -216,7 +216,12 @@
- size_append = printf $(shell						\
- dec_size=0;								\
- for F in $1; do								\
--	fsize=$$(stat -c "%s" $$F);					\
-+	if stat -qs .>/dev/null 2>&1; then				\
-+		statcmd='stat -f %z';					\
-+	else								\
-+		statcmd='stat -c %s';					\
-+	fi;								\
-+	fsize=$$($$statcmd $$F);					\
- 	dec_size=$$(expr $$dec_size + $$fsize);				\
- done;									\
- printf "%08x\n" $$dec_size |						\
-diff -Nur linux-2.6.36.orig/scripts/mod/mk_elfconfig.c linux-2.6.36/scripts/mod/mk_elfconfig.c
---- linux-2.6.36.orig/scripts/mod/mk_elfconfig.c	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/scripts/mod/mk_elfconfig.c	2010-11-28 18:33:24.000000000 +0100
-@@ -1,7 +1,18 @@
- #include <stdio.h>
- #include <stdlib.h>
- #include <string.h>
--#include <elf.h>
-+
-+#define EI_NIDENT (16)
-+#define ELFMAG          "\177ELF"
-+
-+#define SELFMAG         4
-+#define EI_CLASS        4
-+#define ELFCLASS32      1               /* 32-bit objects */
-+#define ELFCLASS64      2               /* 64-bit objects */
-+
-+#define EI_DATA         5               /* Data encoding byte index */
-+#define ELFDATA2LSB     1               /* 2's complement, little endian */
-+#define ELFDATA2MSB     2               /* 2's complement, big endian */
- 
- int
- main(int argc, char **argv)
-diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpost.h
---- linux-2.6.36.orig/scripts/mod/modpost.h	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/scripts/mod/modpost.h	2010-11-28 18:33:24.000000000 +0100
-@@ -7,7 +7,2453 @@
- #include <sys/mman.h>
- #include <fcntl.h>
- #include <unistd.h>
--#include <elf.h>
-+
-+
-+/* This file defines standard ELF types, structures, and macros.
-+   Copyright (C) 1995-1999,2000,2001,2002,2003 Free Software Foundation, Inc.
-+   This file is part of the GNU C Library.
-+
-+   The GNU C Library is free software; you can redistribute it and/or
-+   modify it under the terms of the GNU Lesser General Public
-+   License as published by the Free Software Foundation; either
-+   version 2.1 of the License, or (at your option) any later version.
-+
-+   The GNU C Library is distributed in the hope that it will be useful,
-+   but WITHOUT ANY WARRANTY; without even the implied warranty of
-+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-+   Lesser General Public License for more details.
-+
-+   You should have received a copy of the GNU Lesser General Public
-+   License along with the GNU C Library; if not, write to the Free
-+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
-+   02111-1307 USA.  */
-+
-+#ifndef _ELF_H
-+#define	_ELF_H 1
-+
-+__BEGIN_DECLS
-+
-+/* Standard ELF types.  */
-+
-+#include <stdint.h>
-+
-+/* Type for a 16-bit quantity.  */
-+typedef uint16_t Elf32_Half;
-+typedef uint16_t Elf64_Half;
-+
-+/* Types for signed and unsigned 32-bit quantities.  */
-+typedef uint32_t Elf32_Word;
-+typedef	int32_t  Elf32_Sword;
-+typedef uint32_t Elf64_Word;
-+typedef	int32_t  Elf64_Sword;
-+
-+/* Types for signed and unsigned 64-bit quantities.  */
-+typedef uint64_t Elf32_Xword;
-+typedef	int64_t  Elf32_Sxword;
-+typedef uint64_t Elf64_Xword;
-+typedef	int64_t  Elf64_Sxword;
-+
-+/* Type of addresses.  */
-+typedef uint32_t Elf32_Addr;
-+typedef uint64_t Elf64_Addr;
-+
-+/* Type of file offsets.  */
-+typedef uint32_t Elf32_Off;
-+typedef uint64_t Elf64_Off;
-+
-+/* Type for section indices, which are 16-bit quantities.  */
-+typedef uint16_t Elf32_Section;
-+typedef uint16_t Elf64_Section;
-+
-+/* Type for version symbol information.  */
-+typedef Elf32_Half Elf32_Versym;
-+typedef Elf64_Half Elf64_Versym;
-+
-+
-+/* The ELF file header.  This appears at the start of every ELF file.  */
-+
-+#define EI_NIDENT (16)
-+
-+typedef struct
-+{
-+  unsigned char	e_ident[EI_NIDENT];	/* Magic number and other info */
-+  Elf32_Half	e_type;			/* Object file type */
-+  Elf32_Half	e_machine;		/* Architecture */
-+  Elf32_Word	e_version;		/* Object file version */
-+  Elf32_Addr	e_entry;		/* Entry point virtual address */
-+  Elf32_Off	e_phoff;		/* Program header table file offset */
-+  Elf32_Off	e_shoff;		/* Section header table file offset */
-+  Elf32_Word	e_flags;		/* Processor-specific flags */
-+  Elf32_Half	e_ehsize;		/* ELF header size in bytes */
-+  Elf32_Half	e_phentsize;		/* Program header table entry size */
-+  Elf32_Half	e_phnum;		/* Program header table entry count */
-+  Elf32_Half	e_shentsize;		/* Section header table entry size */
-+  Elf32_Half	e_shnum;		/* Section header table entry count */
-+  Elf32_Half	e_shstrndx;		/* Section header string table index */
-+} Elf32_Ehdr;
-+
-+typedef struct
-+{
-+  unsigned char	e_ident[EI_NIDENT];	/* Magic number and other info */
-+  Elf64_Half	e_type;			/* Object file type */
-+  Elf64_Half	e_machine;		/* Architecture */
-+  Elf64_Word	e_version;		/* Object file version */
-+  Elf64_Addr	e_entry;		/* Entry point virtual address */
-+  Elf64_Off	e_phoff;		/* Program header table file offset */
-+  Elf64_Off	e_shoff;		/* Section header table file offset */
-+  Elf64_Word	e_flags;		/* Processor-specific flags */
-+  Elf64_Half	e_ehsize;		/* ELF header size in bytes */
-+  Elf64_Half	e_phentsize;		/* Program header table entry size */
-+  Elf64_Half	e_phnum;		/* Program header table entry count */
-+  Elf64_Half	e_shentsize;		/* Section header table entry size */
-+  Elf64_Half	e_shnum;		/* Section header table entry count */
-+  Elf64_Half	e_shstrndx;		/* Section header string table index */
-+} Elf64_Ehdr;
-+
-+/* Fields in the e_ident array.  The EI_* macros are indices into the
-+   array.  The macros under each EI_* macro are the values the byte
-+   may have.  */
-+
-+#define EI_MAG0		0		/* File identification byte 0 index */
-+#define ELFMAG0		0x7f		/* Magic number byte 0 */
-+
-+#define EI_MAG1		1		/* File identification byte 1 index */
-+#define ELFMAG1		'E'		/* Magic number byte 1 */
-+
-+#define EI_MAG2		2		/* File identification byte 2 index */
-+#define ELFMAG2		'L'		/* Magic number byte 2 */
-+
-+#define EI_MAG3		3		/* File identification byte 3 index */
-+#define ELFMAG3		'F'		/* Magic number byte 3 */
-+
-+/* Conglomeration of the identification bytes, for easy testing as a word.  */
-+#define	ELFMAG		"\177ELF"
-+#define	SELFMAG		4
-+
-+#define EI_CLASS	4		/* File class byte index */
-+#define ELFCLASSNONE	0		/* Invalid class */
-+#define ELFCLASS32	1		/* 32-bit objects */
-+#define ELFCLASS64	2		/* 64-bit objects */
-+#define ELFCLASSNUM	3
-+
-+#define EI_DATA		5		/* Data encoding byte index */
-+#define ELFDATANONE	0		/* Invalid data encoding */
-+#define ELFDATA2LSB	1		/* 2's complement, little endian */
-+#define ELFDATA2MSB	2		/* 2's complement, big endian */
-+#define ELFDATANUM	3
-+
-+#define EI_VERSION	6		/* File version byte index */
-+					/* Value must be EV_CURRENT */
-+
-+#define EI_OSABI	7		/* OS ABI identification */
-+#define ELFOSABI_NONE		0	/* UNIX System V ABI */
-+#define ELFOSABI_SYSV		0	/* Alias.  */
-+#define ELFOSABI_HPUX		1	/* HP-UX */
-+#define ELFOSABI_NETBSD		2	/* NetBSD.  */
-+#define ELFOSABI_LINUX		3	/* Linux.  */
-+#define ELFOSABI_SOLARIS	6	/* Sun Solaris.  */
-+#define ELFOSABI_AIX		7	/* IBM AIX.  */
-+#define ELFOSABI_IRIX		8	/* SGI Irix.  */
-+#define ELFOSABI_FREEBSD	9	/* FreeBSD.  */
-+#define ELFOSABI_TRU64		10	/* Compaq TRU64 UNIX.  */
-+#define ELFOSABI_MODESTO	11	/* Novell Modesto.  */
-+#define ELFOSABI_OPENBSD	12	/* OpenBSD.  */
-+#define ELFOSABI_ARM		97	/* ARM */
-+#define ELFOSABI_STANDALONE	255	/* Standalone (embedded) application */
-+
-+#define EI_ABIVERSION	8		/* ABI version */
-+
-+#define EI_PAD		9		/* Byte index of padding bytes */
-+
-+/* Legal values for e_type (object file type).  */
-+
-+#define ET_NONE		0		/* No file type */
-+#define ET_REL		1		/* Relocatable file */
-+#define ET_EXEC		2		/* Executable file */
-+#define ET_DYN		3		/* Shared object file */
-+#define ET_CORE		4		/* Core file */
-+#define	ET_NUM		5		/* Number of defined types */
-+#define ET_LOOS		0xfe00		/* OS-specific range start */
-+#define ET_HIOS		0xfeff		/* OS-specific range end */
-+#define ET_LOPROC	0xff00		/* Processor-specific range start */
-+#define ET_HIPROC	0xffff		/* Processor-specific range end */
-+
-+/* Legal values for e_machine (architecture).  */
-+
-+#define EM_NONE		 0		/* No machine */
-+#define EM_M32		 1		/* AT&T WE 32100 */
-+#define EM_SPARC	 2		/* SUN SPARC */
-+#define EM_386		 3		/* Intel 80386 */
-+#define EM_68K		 4		/* Motorola m68k family */
-+#define EM_88K		 5		/* Motorola m88k family */
-+#define EM_860		 7		/* Intel 80860 */
-+#define EM_MIPS		 8		/* MIPS R3000 big-endian */
-+#define EM_S370		 9		/* IBM System/370 */
-+#define EM_MIPS_RS3_LE	10		/* MIPS R3000 little-endian */
-+
-+#define EM_PARISC	15		/* HPPA */
-+#define EM_VPP500	17		/* Fujitsu VPP500 */
-+#define EM_SPARC32PLUS	18		/* Sun's "v8plus" */
-+#define EM_960		19		/* Intel 80960 */
-+#define EM_PPC		20		/* PowerPC */
-+#define EM_PPC64	21		/* PowerPC 64-bit */
-+#define EM_S390		22		/* IBM S390 */
-+
-+#define EM_V800		36		/* NEC V800 series */
-+#define EM_FR20		37		/* Fujitsu FR20 */
-+#define EM_RH32		38		/* TRW RH-32 */
-+#define EM_RCE		39		/* Motorola RCE */
-+#define EM_ARM		40		/* ARM */
-+#define EM_FAKE_ALPHA	41		/* Digital Alpha */
-+#define EM_SH		42		/* Hitachi SH */
-+#define EM_SPARCV9	43		/* SPARC v9 64-bit */
-+#define EM_TRICORE	44		/* Siemens Tricore */
-+#define EM_ARC		45		/* Argonaut RISC Core */
-+#define EM_H8_300	46		/* Hitachi H8/300 */
-+#define EM_H8_300H	47		/* Hitachi H8/300H */
-+#define EM_H8S		48		/* Hitachi H8S */
-+#define EM_H8_500	49		/* Hitachi H8/500 */
-+#define EM_IA_64	50		/* Intel Merced */
-+#define EM_MIPS_X	51		/* Stanford MIPS-X */
-+#define EM_COLDFIRE	52		/* Motorola Coldfire */
-+#define EM_68HC12	53		/* Motorola M68HC12 */
-+#define EM_MMA		54		/* Fujitsu MMA Multimedia Accelerator*/
-+#define EM_PCP		55		/* Siemens PCP */
-+#define EM_NCPU		56		/* Sony nCPU embeeded RISC */
-+#define EM_NDR1		57		/* Denso NDR1 microprocessor */
-+#define EM_STARCORE	58		/* Motorola Start*Core processor */
-+#define EM_ME16		59		/* Toyota ME16 processor */
-+#define EM_ST100	60		/* STMicroelectronic ST100 processor */
-+#define EM_TINYJ	61		/* Advanced Logic Corp. Tinyj emb.fam*/
-+#define EM_X86_64	62		/* AMD x86-64 architecture */
-+#define EM_PDSP		63		/* Sony DSP Processor */
-+
-+#define EM_FX66		66		/* Siemens FX66 microcontroller */
-+#define EM_ST9PLUS	67		/* STMicroelectronics ST9+ 8/16 mc */
-+#define EM_ST7		68		/* STmicroelectronics ST7 8 bit mc */
-+#define EM_68HC16	69		/* Motorola MC68HC16 microcontroller */
-+#define EM_68HC11	70		/* Motorola MC68HC11 microcontroller */
-+#define EM_68HC08	71		/* Motorola MC68HC08 microcontroller */
-+#define EM_68HC05	72		/* Motorola MC68HC05 microcontroller */
-+#define EM_SVX		73		/* Silicon Graphics SVx */
-+#define EM_ST19		74		/* STMicroelectronics ST19 8 bit mc */
-+#define EM_VAX		75		/* Digital VAX */
-+#define EM_CRIS		76		/* Axis Communications 32-bit embedded processor */
-+#define EM_JAVELIN	77		/* Infineon Technologies 32-bit embedded processor */
-+#define EM_FIREPATH	78		/* Element 14 64-bit DSP Processor */
-+#define EM_ZSP		79		/* LSI Logic 16-bit DSP Processor */
-+#define EM_MMIX		80		/* Donald Knuth's educational 64-bit processor */
-+#define EM_HUANY	81		/* Harvard University machine-independent object files */
-+#define EM_PRISM	82		/* SiTera Prism */
-+#define EM_AVR		83		/* Atmel AVR 8-bit microcontroller */
-+#define EM_FR30		84		/* Fujitsu FR30 */
-+#define EM_D10V		85		/* Mitsubishi D10V */
-+#define EM_D30V		86		/* Mitsubishi D30V */
-+#define EM_V850		87		/* NEC v850 */
-+#define EM_M32R		88		/* Mitsubishi M32R */
-+#define EM_MN10300	89		/* Matsushita MN10300 */
-+#define EM_MN10200	90		/* Matsushita MN10200 */
-+#define EM_PJ		91		/* picoJava */
-+#define EM_OPENRISC	92		/* OpenRISC 32-bit embedded processor */
-+#define EM_ARC_A5	93		/* ARC Cores Tangent-A5 */
-+#define EM_XTENSA	94		/* Tensilica Xtensa Architecture */
-+#define EM_NUM		95
-+
-+/* If it is necessary to assign new unofficial EM_* values, please
-+   pick large random numbers (0x8523, 0xa7f2, etc.) to minimize the
-+   chances of collision with official or non-GNU unofficial values.  */
-+
-+#define EM_ALPHA	0x9026
-+
-+/* Legal values for e_version (version).  */
-+
-+#define EV_NONE		0		/* Invalid ELF version */
-+#define EV_CURRENT	1		/* Current version */
-+#define EV_NUM		2
-+
-+/* Section header.  */
-+
-+typedef struct
-+{
-+  Elf32_Word	sh_name;		/* Section name (string tbl index) */
-+  Elf32_Word	sh_type;		/* Section type */
-+  Elf32_Word	sh_flags;		/* Section flags */
-+  Elf32_Addr	sh_addr;		/* Section virtual addr at execution */
-+  Elf32_Off	sh_offset;		/* Section file offset */
-+  Elf32_Word	sh_size;		/* Section size in bytes */
-+  Elf32_Word	sh_link;		/* Link to another section */
-+  Elf32_Word	sh_info;		/* Additional section information */
-+  Elf32_Word	sh_addralign;		/* Section alignment */
-+  Elf32_Word	sh_entsize;		/* Entry size if section holds table */
-+} Elf32_Shdr;
-+
-+typedef struct
-+{
-+  Elf64_Word	sh_name;		/* Section name (string tbl index) */
-+  Elf64_Word	sh_type;		/* Section type */
-+  Elf64_Xword	sh_flags;		/* Section flags */
-+  Elf64_Addr	sh_addr;		/* Section virtual addr at execution */
-+  Elf64_Off	sh_offset;		/* Section file offset */
-+  Elf64_Xword	sh_size;		/* Section size in bytes */
-+  Elf64_Word	sh_link;		/* Link to another section */
-+  Elf64_Word	sh_info;		/* Additional section information */
-+  Elf64_Xword	sh_addralign;		/* Section alignment */
-+  Elf64_Xword	sh_entsize;		/* Entry size if section holds table */
-+} Elf64_Shdr;
-+
-+/* Special section indices.  */
-+
-+#define SHN_UNDEF	0		/* Undefined section */
-+#define SHN_LORESERVE	0xff00		/* Start of reserved indices */
-+#define SHN_LOPROC	0xff00		/* Start of processor-specific */
-+#define SHN_HIPROC	0xff1f		/* End of processor-specific */
-+#define SHN_LOOS	0xff20		/* Start of OS-specific */
-+#define SHN_HIOS	0xff3f		/* End of OS-specific */
-+#define SHN_ABS		0xfff1		/* Associated symbol is absolute */
-+#define SHN_COMMON	0xfff2		/* Associated symbol is common */
-+#define SHN_XINDEX	0xffff		/* Index is in extra table.  */
-+#define SHN_HIRESERVE	0xffff		/* End of reserved indices */
-+
-+/* Legal values for sh_type (section type).  */
-+
-+#define SHT_NULL	  0		/* Section header table entry unused */
-+#define SHT_PROGBITS	  1		/* Program data */
-+#define SHT_SYMTAB	  2		/* Symbol table */
-+#define SHT_STRTAB	  3		/* String table */
-+#define SHT_RELA	  4		/* Relocation entries with addends */
-+#define SHT_HASH	  5		/* Symbol hash table */
-+#define SHT_DYNAMIC	  6		/* Dynamic linking information */
-+#define SHT_NOTE	  7		/* Notes */
-+#define SHT_NOBITS	  8		/* Program space with no data (bss) */
-+#define SHT_REL		  9		/* Relocation entries, no addends */
-+#define SHT_SHLIB	  10		/* Reserved */
-+#define SHT_DYNSYM	  11		/* Dynamic linker symbol table */
-+#define SHT_INIT_ARRAY	  14		/* Array of constructors */
-+#define SHT_FINI_ARRAY	  15		/* Array of destructors */
-+#define SHT_PREINIT_ARRAY 16		/* Array of pre-constructors */
-+#define SHT_GROUP	  17		/* Section group */
-+#define SHT_SYMTAB_SHNDX  18		/* Extended section indeces */
-+#define	SHT_NUM		  19		/* Number of defined types.  */
-+#define SHT_LOOS	  0x60000000	/* Start OS-specific */
-+#define SHT_GNU_LIBLIST	  0x6ffffff7	/* Prelink library list */
-+#define SHT_CHECKSUM	  0x6ffffff8	/* Checksum for DSO content.  */
-+#define SHT_LOSUNW	  0x6ffffffa	/* Sun-specific low bound.  */
-+#define SHT_SUNW_move	  0x6ffffffa
-+#define SHT_SUNW_COMDAT   0x6ffffffb
-+#define SHT_SUNW_syminfo  0x6ffffffc
-+#define SHT_GNU_verdef	  0x6ffffffd	/* Version definition section.  */
-+#define SHT_GNU_verneed	  0x6ffffffe	/* Version needs section.  */
-+#define SHT_GNU_versym	  0x6fffffff	/* Version symbol table.  */
-+#define SHT_HISUNW	  0x6fffffff	/* Sun-specific high bound.  */
-+#define SHT_HIOS	  0x6fffffff	/* End OS-specific type */
-+#define SHT_LOPROC	  0x70000000	/* Start of processor-specific */
-+#define SHT_HIPROC	  0x7fffffff	/* End of processor-specific */
-+#define SHT_LOUSER	  0x80000000	/* Start of application-specific */
-+#define SHT_HIUSER	  0x8fffffff	/* End of application-specific */
-+
-+/* Legal values for sh_flags (section flags).  */
-+
-+#define SHF_WRITE	     (1 << 0)	/* Writable */
-+#define SHF_ALLOC	     (1 << 1)	/* Occupies memory during execution */
-+#define SHF_EXECINSTR	     (1 << 2)	/* Executable */
-+#define SHF_MERGE	     (1 << 4)	/* Might be merged */
-+#define SHF_STRINGS	     (1 << 5)	/* Contains nul-terminated strings */
-+#define SHF_INFO_LINK	     (1 << 6)	/* `sh_info' contains SHT index */
-+#define SHF_LINK_ORDER	     (1 << 7)	/* Preserve order after combining */
-+#define SHF_OS_NONCONFORMING (1 << 8)	/* Non-standard OS specific handling
-+					   required */
-+#define SHF_GROUP	     (1 << 9)	/* Section is member of a group.  */
-+#define SHF_TLS		     (1 << 10)	/* Section hold thread-local data.  */
-+#define SHF_MASKOS	     0x0ff00000	/* OS-specific.  */
-+#define SHF_MASKPROC	     0xf0000000	/* Processor-specific */
-+
-+/* Section group handling.  */
-+#define GRP_COMDAT	0x1		/* Mark group as COMDAT.  */
-+
-+/* Symbol table entry.  */
-+
-+typedef struct
-+{
-+  Elf32_Word	st_name;		/* Symbol name (string tbl index) */
-+  Elf32_Addr	st_value;		/* Symbol value */
-+  Elf32_Word	st_size;		/* Symbol size */
-+  unsigned char	st_info;		/* Symbol type and binding */
-+  unsigned char	st_other;		/* Symbol visibility */
-+  Elf32_Section	st_shndx;		/* Section index */
-+} Elf32_Sym;
-+
-+typedef struct
-+{
-+  Elf64_Word	st_name;		/* Symbol name (string tbl index) */
-+  unsigned char	st_info;		/* Symbol type and binding */
-+  unsigned char st_other;		/* Symbol visibility */
-+  Elf64_Section	st_shndx;		/* Section index */
-+  Elf64_Addr	st_value;		/* Symbol value */
-+  Elf64_Xword	st_size;		/* Symbol size */
-+} Elf64_Sym;
-+
-+/* The syminfo section if available contains additional information about
-+   every dynamic symbol.  */
-+
-+typedef struct
-+{
-+  Elf32_Half si_boundto;		/* Direct bindings, symbol bound to */
-+  Elf32_Half si_flags;			/* Per symbol flags */
-+} Elf32_Syminfo;
-+
-+typedef struct
-+{
-+  Elf64_Half si_boundto;		/* Direct bindings, symbol bound to */
-+  Elf64_Half si_flags;			/* Per symbol flags */
-+} Elf64_Syminfo;
-+
-+/* Possible values for si_boundto.  */
-+#define SYMINFO_BT_SELF		0xffff	/* Symbol bound to self */
-+#define SYMINFO_BT_PARENT	0xfffe	/* Symbol bound to parent */
-+#define SYMINFO_BT_LOWRESERVE	0xff00	/* Beginning of reserved entries */
-+
-+/* Possible bitmasks for si_flags.  */
-+#define SYMINFO_FLG_DIRECT	0x0001	/* Direct bound symbol */
-+#define SYMINFO_FLG_PASSTHRU	0x0002	/* Pass-thru symbol for translator */
-+#define SYMINFO_FLG_COPY	0x0004	/* Symbol is a copy-reloc */
-+#define SYMINFO_FLG_LAZYLOAD	0x0008	/* Symbol bound to object to be lazy
-+					   loaded */
-+/* Syminfo version values.  */
-+#define SYMINFO_NONE		0
-+#define SYMINFO_CURRENT		1
-+#define SYMINFO_NUM		2
-+
-+
-+/* How to extract and insert information held in the st_info field.  */
-+
-+#define ELF32_ST_BIND(val)		(((unsigned char) (val)) >> 4)
-+#define ELF32_ST_TYPE(val)		((val) & 0xf)
-+#define ELF32_ST_INFO(bind, type)	(((bind) << 4) + ((type) & 0xf))
-+
-+/* Both Elf32_Sym and Elf64_Sym use the same one-byte st_info field.  */
-+#define ELF64_ST_BIND(val)		ELF32_ST_BIND (val)
-+#define ELF64_ST_TYPE(val)		ELF32_ST_TYPE (val)
-+#define ELF64_ST_INFO(bind, type)	ELF32_ST_INFO ((bind), (type))
-+
-+/* Legal values for ST_BIND subfield of st_info (symbol binding).  */
-+
-+#define STB_LOCAL	0		/* Local symbol */
-+#define STB_GLOBAL	1		/* Global symbol */
-+#define STB_WEAK	2		/* Weak symbol */
-+#define	STB_NUM		3		/* Number of defined types.  */
-+#define STB_LOOS	10		/* Start of OS-specific */
-+#define STB_HIOS	12		/* End of OS-specific */
-+#define STB_LOPROC	13		/* Start of processor-specific */
-+#define STB_HIPROC	15		/* End of processor-specific */
-+
-+/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
-+
-+#define STT_NOTYPE	0		/* Symbol type is unspecified */
-+#define STT_OBJECT	1		/* Symbol is a data object */
-+#define STT_FUNC	2		/* Symbol is a code object */
-+#define STT_SECTION	3		/* Symbol associated with a section */
-+#define STT_FILE	4		/* Symbol's name is file name */
-+#define STT_COMMON	5		/* Symbol is a common data object */
-+#define STT_TLS		6		/* Symbol is thread-local data object*/
-+#define	STT_NUM		7		/* Number of defined types.  */
-+#define STT_LOOS	10		/* Start of OS-specific */
-+#define STT_HIOS	12		/* End of OS-specific */
-+#define STT_LOPROC	13		/* Start of processor-specific */
-+#define STT_HIPROC	15		/* End of processor-specific */
-+
-+
-+/* Symbol table indices are found in the hash buckets and chain table
-+   of a symbol hash table section.  This special index value indicates
-+   the end of a chain, meaning no further symbols are found in that bucket.  */
-+
-+#define STN_UNDEF	0		/* End of a chain.  */
-+
-+
-+/* How to extract and insert information held in the st_other field.  */
-+
-+#define ELF32_ST_VISIBILITY(o)	((o) & 0x03)
-+
-+/* For ELF64 the definitions are the same.  */
-+#define ELF64_ST_VISIBILITY(o)	ELF32_ST_VISIBILITY (o)
-+
-+/* Symbol visibility specification encoded in the st_other field.  */
-+#define STV_DEFAULT	0		/* Default symbol visibility rules */
-+#define STV_INTERNAL	1		/* Processor specific hidden class */
-+#define STV_HIDDEN	2		/* Sym unavailable in other modules */
-+#define STV_PROTECTED	3		/* Not preemptible, not exported */
-+
-+
-+/* Relocation table entry without addend (in section of type SHT_REL).  */
-+
-+typedef struct
-+{
-+  Elf32_Addr	r_offset;		/* Address */
-+  Elf32_Word	r_info;			/* Relocation type and symbol index */
-+} Elf32_Rel;
-+
-+/* I have seen two different definitions of the Elf64_Rel and
-+   Elf64_Rela structures, so we'll leave them out until Novell (or
-+   whoever) gets their act together.  */
-+/* The following, at least, is used on Sparc v9, MIPS, and Alpha.  */
-+
-+typedef struct
-+{
-+  Elf64_Addr	r_offset;		/* Address */
-+  Elf64_Xword	r_info;			/* Relocation type and symbol index */
-+} Elf64_Rel;
-+
-+/* Relocation table entry with addend (in section of type SHT_RELA).  */
-+
-+typedef struct
-+{
-+  Elf32_Addr	r_offset;		/* Address */
-+  Elf32_Word	r_info;			/* Relocation type and symbol index */
-+  Elf32_Sword	r_addend;		/* Addend */
-+} Elf32_Rela;
-+
-+typedef struct
-+{
-+  Elf64_Addr	r_offset;		/* Address */
-+  Elf64_Xword	r_info;			/* Relocation type and symbol index */
-+  Elf64_Sxword	r_addend;		/* Addend */
-+} Elf64_Rela;
-+
-+/* How to extract and insert information held in the r_info field.  */
-+
-+#define ELF32_R_SYM(val)		((val) >> 8)
-+#define ELF32_R_TYPE(val)		((val) & 0xff)
-+#define ELF32_R_INFO(sym, type)		(((sym) << 8) + ((type) & 0xff))
-+
-+#define ELF64_R_SYM(i)			((i) >> 32)
-+#define ELF64_R_TYPE(i)			((i) & 0xffffffff)
-+#define ELF64_R_INFO(sym,type)		((((Elf64_Xword) (sym)) << 32) + (type))
-+
-+/* Program segment header.  */
-+
-+typedef struct
-+{
-+  Elf32_Word	p_type;			/* Segment type */
-+  Elf32_Off	p_offset;		/* Segment file offset */
-+  Elf32_Addr	p_vaddr;		/* Segment virtual address */
-+  Elf32_Addr	p_paddr;		/* Segment physical address */
-+  Elf32_Word	p_filesz;		/* Segment size in file */
-+  Elf32_Word	p_memsz;		/* Segment size in memory */
-+  Elf32_Word	p_flags;		/* Segment flags */
-+  Elf32_Word	p_align;		/* Segment alignment */
-+} Elf32_Phdr;
-+
-+typedef struct
-+{
-+  Elf64_Word	p_type;			/* Segment type */
-+  Elf64_Word	p_flags;		/* Segment flags */
-+  Elf64_Off	p_offset;		/* Segment file offset */
-+  Elf64_Addr	p_vaddr;		/* Segment virtual address */
-+  Elf64_Addr	p_paddr;		/* Segment physical address */
-+  Elf64_Xword	p_filesz;		/* Segment size in file */
-+  Elf64_Xword	p_memsz;		/* Segment size in memory */
-+  Elf64_Xword	p_align;		/* Segment alignment */
-+} Elf64_Phdr;
-+
-+/* Legal values for p_type (segment type).  */
-+
-+#define	PT_NULL		0		/* Program header table entry unused */
-+#define PT_LOAD		1		/* Loadable program segment */
-+#define PT_DYNAMIC	2		/* Dynamic linking information */
-+#define PT_INTERP	3		/* Program interpreter */
-+#define PT_NOTE		4		/* Auxiliary information */
-+#define PT_SHLIB	5		/* Reserved */
-+#define PT_PHDR		6		/* Entry for header table itself */
-+#define PT_TLS		7		/* Thread-local storage segment */
-+#define	PT_NUM		8		/* Number of defined types */
-+#define PT_LOOS		0x60000000	/* Start of OS-specific */
-+#define PT_GNU_EH_FRAME	0x6474e550	/* GCC .eh_frame_hdr segment */
-+#define PT_GNU_STACK	0x6474e551	/* Indicates stack executability */
-+#define PT_LOSUNW	0x6ffffffa
-+#define PT_SUNWBSS	0x6ffffffa	/* Sun Specific segment */
-+#define PT_SUNWSTACK	0x6ffffffb	/* Stack segment */
-+#define PT_HISUNW	0x6fffffff
-+#define PT_HIOS		0x6fffffff	/* End of OS-specific */
-+#define PT_LOPROC	0x70000000	/* Start of processor-specific */
-+#define PT_HIPROC	0x7fffffff	/* End of processor-specific */
-+
-+/* Legal values for p_flags (segment flags).  */
-+
-+#define PF_X		(1 << 0)	/* Segment is executable */
-+#define PF_W		(1 << 1)	/* Segment is writable */
-+#define PF_R		(1 << 2)	/* Segment is readable */
-+#define PF_MASKOS	0x0ff00000	/* OS-specific */
-+#define PF_MASKPROC	0xf0000000	/* Processor-specific */
-+
-+/* Legal values for note segment descriptor types for core files. */
-+
-+#define NT_PRSTATUS	1		/* Contains copy of prstatus struct */
-+#define NT_FPREGSET	2		/* Contains copy of fpregset struct */
-+#define NT_PRPSINFO	3		/* Contains copy of prpsinfo struct */
-+#define NT_PRXREG	4		/* Contains copy of prxregset struct */
-+#define NT_TASKSTRUCT	4		/* Contains copy of task structure */
-+#define NT_PLATFORM	5		/* String from sysinfo(SI_PLATFORM) */
-+#define NT_AUXV		6		/* Contains copy of auxv array */
-+#define NT_GWINDOWS	7		/* Contains copy of gwindows struct */
-+#define NT_ASRS		8		/* Contains copy of asrset struct */
-+#define NT_PSTATUS	10		/* Contains copy of pstatus struct */
-+#define NT_PSINFO	13		/* Contains copy of psinfo struct */
-+#define NT_PRCRED	14		/* Contains copy of prcred struct */
-+#define NT_UTSNAME	15		/* Contains copy of utsname struct */
-+#define NT_LWPSTATUS	16		/* Contains copy of lwpstatus struct */
-+#define NT_LWPSINFO	17		/* Contains copy of lwpinfo struct */
-+#define NT_PRFPXREG	20		/* Contains copy of fprxregset struct*/
-+
-+/* Legal values for the note segment descriptor types for object files.  */
-+
-+#define NT_VERSION	1		/* Contains a version string.  */
-+
-+
-+/* Dynamic section entry.  */
-+
-+typedef struct
-+{
-+  Elf32_Sword	d_tag;			/* Dynamic entry type */
-+  union
-+    {
-+      Elf32_Word d_val;			/* Integer value */
-+      Elf32_Addr d_ptr;			/* Address value */
-+    } d_un;
-+} Elf32_Dyn;
-+
-+typedef struct
-+{
-+  Elf64_Sxword	d_tag;			/* Dynamic entry type */
-+  union
-+    {
-+      Elf64_Xword d_val;		/* Integer value */
-+      Elf64_Addr d_ptr;			/* Address value */
-+    } d_un;
-+} Elf64_Dyn;
-+
-+/* Legal values for d_tag (dynamic entry type).  */
-+
-+#define DT_NULL		0		/* Marks end of dynamic section */
-+#define DT_NEEDED	1		/* Name of needed library */
-+#define DT_PLTRELSZ	2		/* Size in bytes of PLT relocs */
-+#define DT_PLTGOT	3		/* Processor defined value */
-+#define DT_HASH		4		/* Address of symbol hash table */
-+#define DT_STRTAB	5		/* Address of string table */
-+#define DT_SYMTAB	6		/* Address of symbol table */
-+#define DT_RELA		7		/* Address of Rela relocs */
-+#define DT_RELASZ	8		/* Total size of Rela relocs */
-+#define DT_RELAENT	9		/* Size of one Rela reloc */
-+#define DT_STRSZ	10		/* Size of string table */
-+#define DT_SYMENT	11		/* Size of one symbol table entry */
-+#define DT_INIT		12		/* Address of init function */
-+#define DT_FINI		13		/* Address of termination function */
-+#define DT_SONAME	14		/* Name of shared object */
-+#define DT_RPATH	15		/* Library search path (deprecated) */
-+#define DT_SYMBOLIC	16		/* Start symbol search here */
-+#define DT_REL		17		/* Address of Rel relocs */
-+#define DT_RELSZ	18		/* Total size of Rel relocs */
-+#define DT_RELENT	19		/* Size of one Rel reloc */
-+#define DT_PLTREL	20		/* Type of reloc in PLT */
-+#define DT_DEBUG	21		/* For debugging; unspecified */
-+#define DT_TEXTREL	22		/* Reloc might modify .text */
-+#define DT_JMPREL	23		/* Address of PLT relocs */
-+#define	DT_BIND_NOW	24		/* Process relocations of object */
-+#define	DT_INIT_ARRAY	25		/* Array with addresses of init fct */
-+#define	DT_FINI_ARRAY	26		/* Array with addresses of fini fct */
-+#define	DT_INIT_ARRAYSZ	27		/* Size in bytes of DT_INIT_ARRAY */
-+#define	DT_FINI_ARRAYSZ	28		/* Size in bytes of DT_FINI_ARRAY */
-+#define DT_RUNPATH	29		/* Library search path */
-+#define DT_FLAGS	30		/* Flags for the object being loaded */
-+#define DT_ENCODING	32		/* Start of encoded range */
-+#define DT_PREINIT_ARRAY 32		/* Array with addresses of preinit fct*/
-+#define DT_PREINIT_ARRAYSZ 33		/* size in bytes of DT_PREINIT_ARRAY */
-+#define	DT_NUM		34		/* Number used */
-+#define DT_LOOS		0x6000000d	/* Start of OS-specific */
-+#define DT_HIOS		0x6ffff000	/* End of OS-specific */
-+#define DT_LOPROC	0x70000000	/* Start of processor-specific */
-+#define DT_HIPROC	0x7fffffff	/* End of processor-specific */
-+#define	DT_PROCNUM	DT_MIPS_NUM	/* Most used by any processor */
-+
-+/* DT_* entries which fall between DT_VALRNGHI & DT_VALRNGLO use the
-+   Dyn.d_un.d_val field of the Elf*_Dyn structure.  This follows Sun's
-+   approach.  */
-+#define DT_VALRNGLO	0x6ffffd00
-+#define DT_GNU_PRELINKED 0x6ffffdf5	/* Prelinking timestamp */
-+#define DT_GNU_CONFLICTSZ 0x6ffffdf6	/* Size of conflict section */
-+#define DT_GNU_LIBLISTSZ 0x6ffffdf7	/* Size of library list */
-+#define DT_CHECKSUM	0x6ffffdf8
-+#define DT_PLTPADSZ	0x6ffffdf9
-+#define DT_MOVEENT	0x6ffffdfa
-+#define DT_MOVESZ	0x6ffffdfb
-+#define DT_FEATURE_1	0x6ffffdfc	/* Feature selection (DTF_*).  */
-+#define DT_POSFLAG_1	0x6ffffdfd	/* Flags for DT_* entries, effecting
-+					   the following DT_* entry.  */
-+#define DT_SYMINSZ	0x6ffffdfe	/* Size of syminfo table (in bytes) */
-+#define DT_SYMINENT	0x6ffffdff	/* Entry size of syminfo */
-+#define DT_VALRNGHI	0x6ffffdff
-+#define DT_VALTAGIDX(tag)	(DT_VALRNGHI - (tag))	/* Reverse order! */
-+#define DT_VALNUM 12
-+
-+/* DT_* entries which fall between DT_ADDRRNGHI & DT_ADDRRNGLO use the
-+   Dyn.d_un.d_ptr field of the Elf*_Dyn structure.
-+
-+   If any adjustment is made to the ELF object after it has been
-+   built these entries will need to be adjusted.  */
-+#define DT_ADDRRNGLO	0x6ffffe00
-+#define DT_GNU_CONFLICT	0x6ffffef8	/* Start of conflict section */
-+#define DT_GNU_LIBLIST	0x6ffffef9	/* Library list */
-+#define DT_CONFIG	0x6ffffefa	/* Configuration information.  */
-+#define DT_DEPAUDIT	0x6ffffefb	/* Dependency auditing.  */
-+#define DT_AUDIT	0x6ffffefc	/* Object auditing.  */
-+#define	DT_PLTPAD	0x6ffffefd	/* PLT padding.  */
-+#define	DT_MOVETAB	0x6ffffefe	/* Move table.  */
-+#define DT_SYMINFO	0x6ffffeff	/* Syminfo table.  */
-+#define DT_ADDRRNGHI	0x6ffffeff
-+#define DT_ADDRTAGIDX(tag)	(DT_ADDRRNGHI - (tag))	/* Reverse order! */
-+#define DT_ADDRNUM 10
-+
-+/* The versioning entry types.  The next are defined as part of the
-+   GNU extension.  */
-+#define DT_VERSYM	0x6ffffff0
-+
-+#define DT_RELACOUNT	0x6ffffff9
-+#define DT_RELCOUNT	0x6ffffffa
-+
-+/* These were chosen by Sun.  */
-+#define DT_FLAGS_1	0x6ffffffb	/* State flags, see DF_1_* below.  */
-+#define	DT_VERDEF	0x6ffffffc	/* Address of version definition
-+					   table */
-+#define	DT_VERDEFNUM	0x6ffffffd	/* Number of version definitions */
-+#define	DT_VERNEED	0x6ffffffe	/* Address of table with needed
-+					   versions */
-+#define	DT_VERNEEDNUM	0x6fffffff	/* Number of needed versions */
-+#define DT_VERSIONTAGIDX(tag)	(DT_VERNEEDNUM - (tag))	/* Reverse order! */
-+#define DT_VERSIONTAGNUM 16
-+
-+/* Sun added these machine-independent extensions in the "processor-specific"
-+   range.  Be compatible.  */
-+#define DT_AUXILIARY    0x7ffffffd      /* Shared object to load before self */
-+#define DT_FILTER       0x7fffffff      /* Shared object to get values from */
-+#define DT_EXTRATAGIDX(tag)	((Elf32_Word)-((Elf32_Sword) (tag) <<1>>1)-1)
-+#define DT_EXTRANUM	3
-+
-+/* Values of `d_un.d_val' in the DT_FLAGS entry.  */
-+#define DF_ORIGIN	0x00000001	/* Object may use DF_ORIGIN */
-+#define DF_SYMBOLIC	0x00000002	/* Symbol resolutions starts here */
-+#define DF_TEXTREL	0x00000004	/* Object contains text relocations */
-+#define DF_BIND_NOW	0x00000008	/* No lazy binding for this object */
-+#define DF_STATIC_TLS	0x00000010	/* Module uses the static TLS model */
-+
-+/* State flags selectable in the `d_un.d_val' element of the DT_FLAGS_1
-+   entry in the dynamic section.  */
-+#define DF_1_NOW	0x00000001	/* Set RTLD_NOW for this object.  */
-+#define DF_1_GLOBAL	0x00000002	/* Set RTLD_GLOBAL for this object.  */
-+#define DF_1_GROUP	0x00000004	/* Set RTLD_GROUP for this object.  */
-+#define DF_1_NODELETE	0x00000008	/* Set RTLD_NODELETE for this object.*/
-+#define DF_1_LOADFLTR	0x00000010	/* Trigger filtee loading at runtime.*/
-+#define DF_1_INITFIRST	0x00000020	/* Set RTLD_INITFIRST for this object*/
-+#define DF_1_NOOPEN	0x00000040	/* Set RTLD_NOOPEN for this object.  */
-+#define DF_1_ORIGIN	0x00000080	/* $ORIGIN must be handled.  */
-+#define DF_1_DIRECT	0x00000100	/* Direct binding enabled.  */
-+#define DF_1_TRANS	0x00000200
-+#define DF_1_INTERPOSE	0x00000400	/* Object is used to interpose.  */
-+#define DF_1_NODEFLIB	0x00000800	/* Ignore default lib search path.  */
-+#define DF_1_NODUMP	0x00001000	/* Object can't be dldump'ed.  */
-+#define DF_1_CONFALT	0x00002000	/* Configuration alternative created.*/
-+#define DF_1_ENDFILTEE	0x00004000	/* Filtee terminates filters search. */
-+#define	DF_1_DISPRELDNE	0x00008000	/* Disp reloc applied at build time. */
-+#define	DF_1_DISPRELPND	0x00010000	/* Disp reloc applied at run-time.  */
-+
-+/* Flags for the feature selection in DT_FEATURE_1.  */
-+#define DTF_1_PARINIT	0x00000001
-+#define DTF_1_CONFEXP	0x00000002
-+
-+/* Flags in the DT_POSFLAG_1 entry effecting only the next DT_* entry.  */
-+#define DF_P1_LAZYLOAD	0x00000001	/* Lazyload following object.  */
-+#define DF_P1_GROUPPERM	0x00000002	/* Symbols from next object are not
-+					   generally available.  */
-+
-+/* Version definition sections.  */
-+
-+typedef struct
-+{
-+  Elf32_Half	vd_version;		/* Version revision */
-+  Elf32_Half	vd_flags;		/* Version information */
-+  Elf32_Half	vd_ndx;			/* Version Index */
-+  Elf32_Half	vd_cnt;			/* Number of associated aux entries */
-+  Elf32_Word	vd_hash;		/* Version name hash value */
-+  Elf32_Word	vd_aux;			/* Offset in bytes to verdaux array */
-+  Elf32_Word	vd_next;		/* Offset in bytes to next verdef
-+					   entry */
-+} Elf32_Verdef;
-+
-+typedef struct
-+{
-+  Elf64_Half	vd_version;		/* Version revision */
-+  Elf64_Half	vd_flags;		/* Version information */
-+  Elf64_Half	vd_ndx;			/* Version Index */
-+  Elf64_Half	vd_cnt;			/* Number of associated aux entries */
-+  Elf64_Word	vd_hash;		/* Version name hash value */
-+  Elf64_Word	vd_aux;			/* Offset in bytes to verdaux array */
-+  Elf64_Word	vd_next;		/* Offset in bytes to next verdef
-+					   entry */
-+} Elf64_Verdef;
-+
-+
-+/* Legal values for vd_version (version revision).  */
-+#define VER_DEF_NONE	0		/* No version */
-+#define VER_DEF_CURRENT	1		/* Current version */
-+#define VER_DEF_NUM	2		/* Given version number */
-+
-+/* Legal values for vd_flags (version information flags).  */
-+#define VER_FLG_BASE	0x1		/* Version definition of file itself */
-+#define VER_FLG_WEAK	0x2		/* Weak version identifier */
-+
-+/* Versym symbol index values.  */
-+#define	VER_NDX_LOCAL		0	/* Symbol is local.  */
-+#define	VER_NDX_GLOBAL		1	/* Symbol is global.  */
-+#define	VER_NDX_LORESERVE	0xff00	/* Beginning of reserved entries.  */
-+#define	VER_NDX_ELIMINATE	0xff01	/* Symbol is to be eliminated.  */
-+
-+/* Auxialiary version information.  */
-+
-+typedef struct
-+{
-+  Elf32_Word	vda_name;		/* Version or dependency names */
-+  Elf32_Word	vda_next;		/* Offset in bytes to next verdaux
-+					   entry */
-+} Elf32_Verdaux;
-+
-+typedef struct
-+{
-+  Elf64_Word	vda_name;		/* Version or dependency names */
-+  Elf64_Word	vda_next;		/* Offset in bytes to next verdaux
-+					   entry */
-+} Elf64_Verdaux;
-+
-+
-+/* Version dependency section.  */
-+
-+typedef struct
-+{
-+  Elf32_Half	vn_version;		/* Version of structure */
-+  Elf32_Half	vn_cnt;			/* Number of associated aux entries */
-+  Elf32_Word	vn_file;		/* Offset of filename for this
-+					   dependency */
-+  Elf32_Word	vn_aux;			/* Offset in bytes to vernaux array */
-+  Elf32_Word	vn_next;		/* Offset in bytes to next verneed
-+					   entry */
-+} Elf32_Verneed;
-+
-+typedef struct
-+{
-+  Elf64_Half	vn_version;		/* Version of structure */
-+  Elf64_Half	vn_cnt;			/* Number of associated aux entries */
-+  Elf64_Word	vn_file;		/* Offset of filename for this
-+					   dependency */
-+  Elf64_Word	vn_aux;			/* Offset in bytes to vernaux array */
-+  Elf64_Word	vn_next;		/* Offset in bytes to next verneed
-+					   entry */
-+} Elf64_Verneed;
-+
-+
-+/* Legal values for vn_version (version revision).  */
-+#define VER_NEED_NONE	 0		/* No version */
-+#define VER_NEED_CURRENT 1		/* Current version */
-+#define VER_NEED_NUM	 2		/* Given version number */
-+
-+/* Auxiliary needed version information.  */
-+
-+typedef struct
-+{
-+  Elf32_Word	vna_hash;		/* Hash value of dependency name */
-+  Elf32_Half	vna_flags;		/* Dependency specific information */
-+  Elf32_Half	vna_other;		/* Unused */
-+  Elf32_Word	vna_name;		/* Dependency name string offset */
-+  Elf32_Word	vna_next;		/* Offset in bytes to next vernaux
-+					   entry */
-+} Elf32_Vernaux;
-+
-+typedef struct
-+{
-+  Elf64_Word	vna_hash;		/* Hash value of dependency name */
-+  Elf64_Half	vna_flags;		/* Dependency specific information */
-+  Elf64_Half	vna_other;		/* Unused */
-+  Elf64_Word	vna_name;		/* Dependency name string offset */
-+  Elf64_Word	vna_next;		/* Offset in bytes to next vernaux
-+					   entry */
-+} Elf64_Vernaux;
-+
-+
-+/* Legal values for vna_flags.  */
-+#define VER_FLG_WEAK	0x2		/* Weak version identifier */
-+
-+
-+/* Auxiliary vector.  */
-+
-+/* This vector is normally only used by the program interpreter.  The
-+   usual definition in an ABI supplement uses the name auxv_t.  The
-+   vector is not usually defined in a standard <elf.h> file, but it
-+   can't hurt.  We rename it to avoid conflicts.  The sizes of these
-+   types are an arrangement between the exec server and the program
-+   interpreter, so we don't fully specify them here.  */
-+
-+typedef struct
-+{
-+  int a_type;			/* Entry type */
-+  union
-+    {
-+      long int a_val;		/* Integer value */
-+      void *a_ptr;		/* Pointer value */
-+      void (*a_fcn) (void);	/* Function pointer value */
-+    } a_un;
-+} Elf32_auxv_t;
-+
-+typedef struct
-+{
-+  long int a_type;		/* Entry type */
-+  union
-+    {
-+      long int a_val;		/* Integer value */
-+      void *a_ptr;		/* Pointer value */
-+      void (*a_fcn) (void);	/* Function pointer value */
-+    } a_un;
-+} Elf64_auxv_t;
-+
-+/* Legal values for a_type (entry type).  */
-+
-+#define AT_NULL		0		/* End of vector */
-+#define AT_IGNORE	1		/* Entry should be ignored */
-+#define AT_EXECFD	2		/* File descriptor of program */
-+#define AT_PHDR		3		/* Program headers for program */
-+#define AT_PHENT	4		/* Size of program header entry */
-+#define AT_PHNUM	5		/* Number of program headers */
-+#define AT_PAGESZ	6		/* System page size */
-+#define AT_BASE		7		/* Base address of interpreter */
-+#define AT_FLAGS	8		/* Flags */
-+#define AT_ENTRY	9		/* Entry point of program */
-+#define AT_NOTELF	10		/* Program is not ELF */
-+#define AT_UID		11		/* Real uid */
-+#define AT_EUID		12		/* Effective uid */
-+#define AT_GID		13		/* Real gid */
-+#define AT_EGID		14		/* Effective gid */
-+#define AT_CLKTCK	17		/* Frequency of times() */
-+
-+/* Some more special a_type values describing the hardware.  */
-+#define AT_PLATFORM	15		/* String identifying platform.  */
-+#define AT_HWCAP	16		/* Machine dependent hints about
-+					   processor capabilities.  */
-+
-+/* This entry gives some information about the FPU initialization
-+   performed by the kernel.  */
-+#define AT_FPUCW	18		/* Used FPU control word.  */
-+
-+/* Cache block sizes.  */
-+#define AT_DCACHEBSIZE	19		/* Data cache block size.  */
-+#define AT_ICACHEBSIZE	20		/* Instruction cache block size.  */
-+#define AT_UCACHEBSIZE	21		/* Unified cache block size.  */
-+
-+/* A special ignored value for PPC, used by the kernel to control the
-+   interpretation of the AUXV. Must be > 16.  */
-+#define AT_IGNOREPPC	22		/* Entry should be ignored.  */
-+
-+#define	AT_SECURE	23		/* Boolean, was exec setuid-like?  */
-+
-+/* Pointer to the global system page used for system calls and other
-+   nice things.  */
-+#define AT_SYSINFO	32
-+#define AT_SYSINFO_EHDR	33
-+
-+
-+/* Note section contents.  Each entry in the note section begins with
-+   a header of a fixed form.  */
-+
-+typedef struct
-+{
-+  Elf32_Word n_namesz;			/* Length of the note's name.  */
-+  Elf32_Word n_descsz;			/* Length of the note's descriptor.  */
-+  Elf32_Word n_type;			/* Type of the note.  */
-+} Elf32_Nhdr;
-+
-+typedef struct
-+{
-+  Elf64_Word n_namesz;			/* Length of the note's name.  */
-+  Elf64_Word n_descsz;			/* Length of the note's descriptor.  */
-+  Elf64_Word n_type;			/* Type of the note.  */
-+} Elf64_Nhdr;
-+
-+/* Known names of notes.  */
-+
-+/* Solaris entries in the note section have this name.  */
-+#define ELF_NOTE_SOLARIS	"SUNW Solaris"
-+
-+/* Note entries for GNU systems have this name.  */
-+#define ELF_NOTE_GNU		"GNU"
-+
-+
-+/* Defined types of notes for Solaris.  */
-+
-+/* Value of descriptor (one word) is desired pagesize for the binary.  */
-+#define ELF_NOTE_PAGESIZE_HINT	1
-+
-+
-+/* Defined note types for GNU systems.  */
-+
-+/* ABI information.  The descriptor consists of words:
-+   word 0: OS descriptor
-+   word 1: major version of the ABI
-+   word 2: minor version of the ABI
-+   word 3: subminor version of the ABI
-+*/
-+#define ELF_NOTE_ABI		1
-+
-+/* Known OSes.  These value can appear in word 0 of an ELF_NOTE_ABI
-+   note section entry.  */
-+#define ELF_NOTE_OS_LINUX	0
-+#define ELF_NOTE_OS_GNU		1
-+#define ELF_NOTE_OS_SOLARIS2	2
-+#define ELF_NOTE_OS_FREEBSD	3
-+
-+
-+/* Move records.  */
-+typedef struct
-+{
-+  Elf32_Xword m_value;		/* Symbol value.  */
-+  Elf32_Word m_info;		/* Size and index.  */
-+  Elf32_Word m_poffset;		/* Symbol offset.  */
-+  Elf32_Half m_repeat;		/* Repeat count.  */
-+  Elf32_Half m_stride;		/* Stride info.  */
-+} Elf32_Move;
-+
-+typedef struct
-+{
-+  Elf64_Xword m_value;		/* Symbol value.  */
-+  Elf64_Xword m_info;		/* Size and index.  */
-+  Elf64_Xword m_poffset;	/* Symbol offset.  */
-+  Elf64_Half m_repeat;		/* Repeat count.  */
-+  Elf64_Half m_stride;		/* Stride info.  */
-+} Elf64_Move;
-+
-+/* Macro to construct move records.  */
-+#define ELF32_M_SYM(info)	((info) >> 8)
-+#define ELF32_M_SIZE(info)	((unsigned char) (info))
-+#define ELF32_M_INFO(sym, size)	(((sym) << 8) + (unsigned char) (size))
-+
-+#define ELF64_M_SYM(info)	ELF32_M_SYM (info)
-+#define ELF64_M_SIZE(info)	ELF32_M_SIZE (info)
-+#define ELF64_M_INFO(sym, size)	ELF32_M_INFO (sym, size)
-+
-+
-+/* Motorola 68k specific definitions.  */
-+
-+/* Values for Elf32_Ehdr.e_flags.  */
-+#define EF_CPU32	0x00810000
-+
-+/* m68k relocs.  */
-+
-+#define R_68K_NONE	0		/* No reloc */
-+#define R_68K_32	1		/* Direct 32 bit  */
-+#define R_68K_16	2		/* Direct 16 bit  */
-+#define R_68K_8		3		/* Direct 8 bit  */
-+#define R_68K_PC32	4		/* PC relative 32 bit */
-+#define R_68K_PC16	5		/* PC relative 16 bit */
-+#define R_68K_PC8	6		/* PC relative 8 bit */
-+#define R_68K_GOT32	7		/* 32 bit PC relative GOT entry */
-+#define R_68K_GOT16	8		/* 16 bit PC relative GOT entry */
-+#define R_68K_GOT8	9		/* 8 bit PC relative GOT entry */
-+#define R_68K_GOT32O	10		/* 32 bit GOT offset */
-+#define R_68K_GOT16O	11		/* 16 bit GOT offset */
-+#define R_68K_GOT8O	12		/* 8 bit GOT offset */
-+#define R_68K_PLT32	13		/* 32 bit PC relative PLT address */
-+#define R_68K_PLT16	14		/* 16 bit PC relative PLT address */
-+#define R_68K_PLT8	15		/* 8 bit PC relative PLT address */
-+#define R_68K_PLT32O	16		/* 32 bit PLT offset */
-+#define R_68K_PLT16O	17		/* 16 bit PLT offset */
-+#define R_68K_PLT8O	18		/* 8 bit PLT offset */
-+#define R_68K_COPY	19		/* Copy symbol at runtime */
-+#define R_68K_GLOB_DAT	20		/* Create GOT entry */
-+#define R_68K_JMP_SLOT	21		/* Create PLT entry */
-+#define R_68K_RELATIVE	22		/* Adjust by program base */
-+/* Keep this the last entry.  */
-+#define R_68K_NUM	23
-+
-+/* Intel 80386 specific definitions.  */
-+
-+/* i386 relocs.  */
-+
-+#define R_386_NONE	   0		/* No reloc */
-+#define R_386_32	   1		/* Direct 32 bit  */
-+#define R_386_PC32	   2		/* PC relative 32 bit */
-+#define R_386_GOT32	   3		/* 32 bit GOT entry */
-+#define R_386_PLT32	   4		/* 32 bit PLT address */
-+#define R_386_COPY	   5		/* Copy symbol at runtime */
-+#define R_386_GLOB_DAT	   6		/* Create GOT entry */
-+#define R_386_JMP_SLOT	   7		/* Create PLT entry */
-+#define R_386_RELATIVE	   8		/* Adjust by program base */
-+#define R_386_GOTOFF	   9		/* 32 bit offset to GOT */
-+#define R_386_GOTPC	   10		/* 32 bit PC relative offset to GOT */
-+#define R_386_32PLT	   11
-+#define R_386_TLS_TPOFF	   14		/* Offset in static TLS block */
-+#define R_386_TLS_IE	   15		/* Address of GOT entry for static TLS
-+					   block offset */
-+#define R_386_TLS_GOTIE	   16		/* GOT entry for static TLS block
-+					   offset */
-+#define R_386_TLS_LE	   17		/* Offset relative to static TLS
-+					   block */
-+#define R_386_TLS_GD	   18		/* Direct 32 bit for GNU version of
-+					   general dynamic thread local data */
-+#define R_386_TLS_LDM	   19		/* Direct 32 bit for GNU version of
-+					   local dynamic thread local data
-+					   in LE code */
-+#define R_386_16	   20
-+#define R_386_PC16	   21
-+#define R_386_8		   22
-+#define R_386_PC8	   23
-+#define R_386_TLS_GD_32	   24		/* Direct 32 bit for general dynamic
-+					   thread local data */
-+#define R_386_TLS_GD_PUSH  25		/* Tag for pushl in GD TLS code */
-+#define R_386_TLS_GD_CALL  26		/* Relocation for call to
-+					   __tls_get_addr() */
-+#define R_386_TLS_GD_POP   27		/* Tag for popl in GD TLS code */
-+#define R_386_TLS_LDM_32   28		/* Direct 32 bit for local dynamic
-+					   thread local data in LE code */
-+#define R_386_TLS_LDM_PUSH 29		/* Tag for pushl in LDM TLS code */
-+#define R_386_TLS_LDM_CALL 30		/* Relocation for call to
-+					   __tls_get_addr() in LDM code */
-+#define R_386_TLS_LDM_POP  31		/* Tag for popl in LDM TLS code */
-+#define R_386_TLS_LDO_32   32		/* Offset relative to TLS block */
-+#define R_386_TLS_IE_32	   33		/* GOT entry for negated static TLS
-+					   block offset */
-+#define R_386_TLS_LE_32	   34		/* Negated offset relative to static
-+					   TLS block */
-+#define R_386_TLS_DTPMOD32 35		/* ID of module containing symbol */
-+#define R_386_TLS_DTPOFF32 36		/* Offset in TLS block */
-+#define R_386_TLS_TPOFF32  37		/* Negated offset in static TLS block */
-+/* Keep this the last entry.  */
-+#define R_386_NUM	   38
-+
-+/* SUN SPARC specific definitions.  */
-+
-+/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
-+
-+#define STT_REGISTER	13		/* Global register reserved to app. */
-+
-+/* Values for Elf64_Ehdr.e_flags.  */
-+
-+#define EF_SPARCV9_MM		3
-+#define EF_SPARCV9_TSO		0
-+#define EF_SPARCV9_PSO		1
-+#define EF_SPARCV9_RMO		2
-+#define EF_SPARC_LEDATA		0x800000 /* little endian data */
-+#define EF_SPARC_EXT_MASK	0xFFFF00
-+#define EF_SPARC_32PLUS		0x000100 /* generic V8+ features */
-+#define EF_SPARC_SUN_US1	0x000200 /* Sun UltraSPARC1 extensions */
-+#define EF_SPARC_HAL_R1		0x000400 /* HAL R1 extensions */
-+#define EF_SPARC_SUN_US3	0x000800 /* Sun UltraSPARCIII extensions */
-+
-+/* SPARC relocs.  */
-+
-+#define R_SPARC_NONE		0	/* No reloc */
-+#define R_SPARC_8		1	/* Direct 8 bit */
-+#define R_SPARC_16		2	/* Direct 16 bit */
-+#define R_SPARC_32		3	/* Direct 32 bit */
-+#define R_SPARC_DISP8		4	/* PC relative 8 bit */
-+#define R_SPARC_DISP16		5	/* PC relative 16 bit */
-+#define R_SPARC_DISP32		6	/* PC relative 32 bit */
-+#define R_SPARC_WDISP30		7	/* PC relative 30 bit shifted */
-+#define R_SPARC_WDISP22		8	/* PC relative 22 bit shifted */
-+#define R_SPARC_HI22		9	/* High 22 bit */
-+#define R_SPARC_22		10	/* Direct 22 bit */
-+#define R_SPARC_13		11	/* Direct 13 bit */
-+#define R_SPARC_LO10		12	/* Truncated 10 bit */
-+#define R_SPARC_GOT10		13	/* Truncated 10 bit GOT entry */
-+#define R_SPARC_GOT13		14	/* 13 bit GOT entry */
-+#define R_SPARC_GOT22		15	/* 22 bit GOT entry shifted */
-+#define R_SPARC_PC10		16	/* PC relative 10 bit truncated */
-+#define R_SPARC_PC22		17	/* PC relative 22 bit shifted */
-+#define R_SPARC_WPLT30		18	/* 30 bit PC relative PLT address */
-+#define R_SPARC_COPY		19	/* Copy symbol at runtime */
-+#define R_SPARC_GLOB_DAT	20	/* Create GOT entry */
-+#define R_SPARC_JMP_SLOT	21	/* Create PLT entry */
-+#define R_SPARC_RELATIVE	22	/* Adjust by program base */
-+#define R_SPARC_UA32		23	/* Direct 32 bit unaligned */
-+
-+/* Additional Sparc64 relocs.  */
-+
-+#define R_SPARC_PLT32		24	/* Direct 32 bit ref to PLT entry */
-+#define R_SPARC_HIPLT22		25	/* High 22 bit PLT entry */
-+#define R_SPARC_LOPLT10		26	/* Truncated 10 bit PLT entry */
-+#define R_SPARC_PCPLT32		27	/* PC rel 32 bit ref to PLT entry */
-+#define R_SPARC_PCPLT22		28	/* PC rel high 22 bit PLT entry */
-+#define R_SPARC_PCPLT10		29	/* PC rel trunc 10 bit PLT entry */
-+#define R_SPARC_10		30	/* Direct 10 bit */
-+#define R_SPARC_11		31	/* Direct 11 bit */
-+#define R_SPARC_64		32	/* Direct 64 bit */
-+#define R_SPARC_OLO10		33	/* 10bit with secondary 13bit addend */
-+#define R_SPARC_HH22		34	/* Top 22 bits of direct 64 bit */
-+#define R_SPARC_HM10		35	/* High middle 10 bits of ... */
-+#define R_SPARC_LM22		36	/* Low middle 22 bits of ... */
-+#define R_SPARC_PC_HH22		37	/* Top 22 bits of pc rel 64 bit */
-+#define R_SPARC_PC_HM10		38	/* High middle 10 bit of ... */
-+#define R_SPARC_PC_LM22		39	/* Low miggle 22 bits of ... */
-+#define R_SPARC_WDISP16		40	/* PC relative 16 bit shifted */
-+#define R_SPARC_WDISP19		41	/* PC relative 19 bit shifted */
-+#define R_SPARC_7		43	/* Direct 7 bit */
-+#define R_SPARC_5		44	/* Direct 5 bit */
-+#define R_SPARC_6		45	/* Direct 6 bit */
-+#define R_SPARC_DISP64		46	/* PC relative 64 bit */
-+#define R_SPARC_PLT64		47	/* Direct 64 bit ref to PLT entry */
-+#define R_SPARC_HIX22		48	/* High 22 bit complemented */
-+#define R_SPARC_LOX10		49	/* Truncated 11 bit complemented */
-+#define R_SPARC_H44		50	/* Direct high 12 of 44 bit */
-+#define R_SPARC_M44		51	/* Direct mid 22 of 44 bit */
-+#define R_SPARC_L44		52	/* Direct low 10 of 44 bit */
-+#define R_SPARC_REGISTER	53	/* Global register usage */
-+#define R_SPARC_UA64		54	/* Direct 64 bit unaligned */
-+#define R_SPARC_UA16		55	/* Direct 16 bit unaligned */
-+#define R_SPARC_TLS_GD_HI22	56
-+#define R_SPARC_TLS_GD_LO10	57
-+#define R_SPARC_TLS_GD_ADD	58
-+#define R_SPARC_TLS_GD_CALL	59
-+#define R_SPARC_TLS_LDM_HI22	60
-+#define R_SPARC_TLS_LDM_LO10	61
-+#define R_SPARC_TLS_LDM_ADD	62
-+#define R_SPARC_TLS_LDM_CALL	63
-+#define R_SPARC_TLS_LDO_HIX22	64
-+#define R_SPARC_TLS_LDO_LOX10	65
-+#define R_SPARC_TLS_LDO_ADD	66
-+#define R_SPARC_TLS_IE_HI22	67
-+#define R_SPARC_TLS_IE_LO10	68
-+#define R_SPARC_TLS_IE_LD	69
-+#define R_SPARC_TLS_IE_LDX	70
-+#define R_SPARC_TLS_IE_ADD	71
-+#define R_SPARC_TLS_LE_HIX22	72
-+#define R_SPARC_TLS_LE_LOX10	73
-+#define R_SPARC_TLS_DTPMOD32	74
-+#define R_SPARC_TLS_DTPMOD64	75
-+#define R_SPARC_TLS_DTPOFF32	76
-+#define R_SPARC_TLS_DTPOFF64	77
-+#define R_SPARC_TLS_TPOFF32	78
-+#define R_SPARC_TLS_TPOFF64	79
-+/* Keep this the last entry.  */
-+#define R_SPARC_NUM		80
-+
-+/* For Sparc64, legal values for d_tag of Elf64_Dyn.  */
-+
-+#define DT_SPARC_REGISTER 0x70000001
-+#define DT_SPARC_NUM	2
-+
-+/* Bits present in AT_HWCAP, primarily for Sparc32.  */
-+
-+#define HWCAP_SPARC_FLUSH	1	/* The cpu supports flush insn.  */
-+#define HWCAP_SPARC_STBAR	2
-+#define HWCAP_SPARC_SWAP	4
-+#define HWCAP_SPARC_MULDIV	8
-+#define HWCAP_SPARC_V9		16	/* The cpu is v9, so v8plus is ok.  */
-+#define HWCAP_SPARC_ULTRA3	32
-+
-+/* MIPS R3000 specific definitions.  */
-+
-+/* Legal values for e_flags field of Elf32_Ehdr.  */
-+
-+#define EF_MIPS_NOREORDER   1		/* A .noreorder directive was used */
-+#define EF_MIPS_PIC	    2		/* Contains PIC code */
-+#define EF_MIPS_CPIC	    4		/* Uses PIC calling sequence */
-+#define EF_MIPS_XGOT	    8
-+#define EF_MIPS_64BIT_WHIRL 16
-+#define EF_MIPS_ABI2	    32
-+#define EF_MIPS_ABI_ON32    64
-+#define EF_MIPS_ARCH	    0xf0000000	/* MIPS architecture level */
-+
-+/* Legal values for MIPS architecture level.  */
-+
-+#define EF_MIPS_ARCH_1	    0x00000000	/* -mips1 code.  */
-+#define EF_MIPS_ARCH_2	    0x10000000	/* -mips2 code.  */
-+#define EF_MIPS_ARCH_3	    0x20000000	/* -mips3 code.  */
-+#define EF_MIPS_ARCH_4	    0x30000000	/* -mips4 code.  */
-+#define EF_MIPS_ARCH_5	    0x40000000	/* -mips5 code.  */
-+#define EF_MIPS_ARCH_32	    0x60000000	/* MIPS32 code.  */
-+#define EF_MIPS_ARCH_64	    0x70000000	/* MIPS64 code.  */
-+
-+/* The following are non-official names and should not be used.  */
-+
-+#define E_MIPS_ARCH_1	  0x00000000	/* -mips1 code.  */
-+#define E_MIPS_ARCH_2	  0x10000000	/* -mips2 code.  */
-+#define E_MIPS_ARCH_3	  0x20000000	/* -mips3 code.  */
-+#define E_MIPS_ARCH_4	  0x30000000	/* -mips4 code.  */
-+#define E_MIPS_ARCH_5	  0x40000000	/* -mips5 code.  */
-+#define E_MIPS_ARCH_32	  0x60000000	/* MIPS32 code.  */
-+#define E_MIPS_ARCH_64	  0x70000000	/* MIPS64 code.  */
-+
-+/* Special section indices.  */
-+
-+#define SHN_MIPS_ACOMMON    0xff00	/* Allocated common symbols */
-+#define SHN_MIPS_TEXT	    0xff01	/* Allocated test symbols.  */
-+#define SHN_MIPS_DATA	    0xff02	/* Allocated data symbols.  */
-+#define SHN_MIPS_SCOMMON    0xff03	/* Small common symbols */
-+#define SHN_MIPS_SUNDEFINED 0xff04	/* Small undefined symbols */
-+
-+/* Legal values for sh_type field of Elf32_Shdr.  */
-+
-+#define SHT_MIPS_LIBLIST       0x70000000 /* Shared objects used in link */
-+#define SHT_MIPS_MSYM	       0x70000001
-+#define SHT_MIPS_CONFLICT      0x70000002 /* Conflicting symbols */
-+#define SHT_MIPS_GPTAB	       0x70000003 /* Global data area sizes */
-+#define SHT_MIPS_UCODE	       0x70000004 /* Reserved for SGI/MIPS compilers */
-+#define SHT_MIPS_DEBUG	       0x70000005 /* MIPS ECOFF debugging information*/
-+#define SHT_MIPS_REGINFO       0x70000006 /* Register usage information */
-+#define SHT_MIPS_PACKAGE       0x70000007
-+#define SHT_MIPS_PACKSYM       0x70000008
-+#define SHT_MIPS_RELD	       0x70000009
-+#define SHT_MIPS_IFACE         0x7000000b
-+#define SHT_MIPS_CONTENT       0x7000000c
-+#define SHT_MIPS_OPTIONS       0x7000000d /* Miscellaneous options.  */
-+#define SHT_MIPS_SHDR	       0x70000010
-+#define SHT_MIPS_FDESC	       0x70000011
-+#define SHT_MIPS_EXTSYM	       0x70000012
-+#define SHT_MIPS_DENSE	       0x70000013
-+#define SHT_MIPS_PDESC	       0x70000014
-+#define SHT_MIPS_LOCSYM	       0x70000015
-+#define SHT_MIPS_AUXSYM	       0x70000016
-+#define SHT_MIPS_OPTSYM	       0x70000017
-+#define SHT_MIPS_LOCSTR	       0x70000018
-+#define SHT_MIPS_LINE	       0x70000019
-+#define SHT_MIPS_RFDESC	       0x7000001a
-+#define SHT_MIPS_DELTASYM      0x7000001b
-+#define SHT_MIPS_DELTAINST     0x7000001c
-+#define SHT_MIPS_DELTACLASS    0x7000001d
-+#define SHT_MIPS_DWARF         0x7000001e /* DWARF debugging information.  */
-+#define SHT_MIPS_DELTADECL     0x7000001f
-+#define SHT_MIPS_SYMBOL_LIB    0x70000020
-+#define SHT_MIPS_EVENTS	       0x70000021 /* Event section.  */
-+#define SHT_MIPS_TRANSLATE     0x70000022
-+#define SHT_MIPS_PIXIE	       0x70000023
-+#define SHT_MIPS_XLATE	       0x70000024
-+#define SHT_MIPS_XLATE_DEBUG   0x70000025
-+#define SHT_MIPS_WHIRL	       0x70000026
-+#define SHT_MIPS_EH_REGION     0x70000027
-+#define SHT_MIPS_XLATE_OLD     0x70000028
-+#define SHT_MIPS_PDR_EXCEPTION 0x70000029
-+
-+/* Legal values for sh_flags field of Elf32_Shdr.  */
-+
-+#define SHF_MIPS_GPREL	 0x10000000	/* Must be part of global data area */
-+#define SHF_MIPS_MERGE	 0x20000000
-+#define SHF_MIPS_ADDR	 0x40000000
-+#define SHF_MIPS_STRINGS 0x80000000
-+#define SHF_MIPS_NOSTRIP 0x08000000
-+#define SHF_MIPS_LOCAL	 0x04000000
-+#define SHF_MIPS_NAMES	 0x02000000
-+#define SHF_MIPS_NODUPE	 0x01000000
-+
-+
-+/* Symbol tables.  */
-+
-+/* MIPS specific values for `st_other'.  */
-+#define STO_MIPS_DEFAULT		0x0
-+#define STO_MIPS_INTERNAL		0x1
-+#define STO_MIPS_HIDDEN			0x2
-+#define STO_MIPS_PROTECTED		0x3
-+#define STO_MIPS_SC_ALIGN_UNUSED	0xff
-+
-+/* MIPS specific values for `st_info'.  */
-+#define STB_MIPS_SPLIT_COMMON		13
-+
-+/* Entries found in sections of type SHT_MIPS_GPTAB.  */
-+
-+typedef union
-+{
-+  struct
-+    {
-+      Elf32_Word gt_current_g_value;	/* -G value used for compilation */
-+      Elf32_Word gt_unused;		/* Not used */
-+    } gt_header;			/* First entry in section */
-+  struct
-+    {
-+      Elf32_Word gt_g_value;		/* If this value were used for -G */
-+      Elf32_Word gt_bytes;		/* This many bytes would be used */
-+    } gt_entry;				/* Subsequent entries in section */
-+} Elf32_gptab;
-+
-+/* Entry found in sections of type SHT_MIPS_REGINFO.  */
-+
-+typedef struct
-+{
-+  Elf32_Word	ri_gprmask;		/* General registers used */
-+  Elf32_Word	ri_cprmask[4];		/* Coprocessor registers used */
-+  Elf32_Sword	ri_gp_value;		/* $gp register value */
-+} Elf32_RegInfo;
-+
-+/* Entries found in sections of type SHT_MIPS_OPTIONS.  */
-+
-+typedef struct
-+{
-+  unsigned char kind;		/* Determines interpretation of the
-+				   variable part of descriptor.  */
-+  unsigned char size;		/* Size of descriptor, including header.  */
-+  Elf32_Section section;	/* Section header index of section affected,
-+				   0 for global options.  */
-+  Elf32_Word info;		/* Kind-specific information.  */
-+} Elf_Options;
-+
-+/* Values for `kind' field in Elf_Options.  */
-+
-+#define ODK_NULL	0	/* Undefined.  */
-+#define ODK_REGINFO	1	/* Register usage information.  */
-+#define ODK_EXCEPTIONS	2	/* Exception processing options.  */
-+#define ODK_PAD		3	/* Section padding options.  */
-+#define ODK_HWPATCH	4	/* Hardware workarounds performed */
-+#define ODK_FILL	5	/* record the fill value used by the linker. */
-+#define ODK_TAGS	6	/* reserve space for desktop tools to write. */
-+#define ODK_HWAND	7	/* HW workarounds.  'AND' bits when merging. */
-+#define ODK_HWOR	8	/* HW workarounds.  'OR' bits when merging.  */
-+
-+/* Values for `info' in Elf_Options for ODK_EXCEPTIONS entries.  */
-+
-+#define OEX_FPU_MIN	0x1f	/* FPE's which MUST be enabled.  */
-+#define OEX_FPU_MAX	0x1f00	/* FPE's which MAY be enabled.  */
-+#define OEX_PAGE0	0x10000	/* page zero must be mapped.  */
-+#define OEX_SMM		0x20000	/* Force sequential memory mode?  */
-+#define OEX_FPDBUG	0x40000	/* Force floating point debug mode?  */
-+#define OEX_PRECISEFP	OEX_FPDBUG
-+#define OEX_DISMISS	0x80000	/* Dismiss invalid address faults?  */
-+
-+#define OEX_FPU_INVAL	0x10
-+#define OEX_FPU_DIV0	0x08
-+#define OEX_FPU_OFLO	0x04
-+#define OEX_FPU_UFLO	0x02
-+#define OEX_FPU_INEX	0x01
-+
-+/* Masks for `info' in Elf_Options for an ODK_HWPATCH entry.  */
-+
-+#define OHW_R4KEOP	0x1	/* R4000 end-of-page patch.  */
-+#define OHW_R8KPFETCH	0x2	/* may need R8000 prefetch patch.  */
-+#define OHW_R5KEOP	0x4	/* R5000 end-of-page patch.  */
-+#define OHW_R5KCVTL	0x8	/* R5000 cvt.[ds].l bug.  clean=1.  */
-+
-+#define OPAD_PREFIX	0x1
-+#define OPAD_POSTFIX	0x2
-+#define OPAD_SYMBOL	0x4
-+
-+/* Entry found in `.options' section.  */
-+
-+typedef struct
-+{
-+  Elf32_Word hwp_flags1;	/* Extra flags.  */
-+  Elf32_Word hwp_flags2;	/* Extra flags.  */
-+} Elf_Options_Hw;
-+
-+/* Masks for `info' in ElfOptions for ODK_HWAND and ODK_HWOR entries.  */
-+
-+#define OHWA0_R4KEOP_CHECKED	0x00000001
-+#define OHWA1_R4KEOP_CLEAN	0x00000002
-+
-+/* MIPS relocs.  */
-+
-+#define R_MIPS_NONE		0	/* No reloc */
-+#define R_MIPS_16		1	/* Direct 16 bit */
-+#define R_MIPS_32		2	/* Direct 32 bit */
-+#define R_MIPS_REL32		3	/* PC relative 32 bit */
-+#define R_MIPS_26		4	/* Direct 26 bit shifted */
-+#define R_MIPS_HI16		5	/* High 16 bit */
-+#define R_MIPS_LO16		6	/* Low 16 bit */
-+#define R_MIPS_GPREL16		7	/* GP relative 16 bit */
-+#define R_MIPS_LITERAL		8	/* 16 bit literal entry */
-+#define R_MIPS_GOT16		9	/* 16 bit GOT entry */
-+#define R_MIPS_PC16		10	/* PC relative 16 bit */
-+#define R_MIPS_CALL16		11	/* 16 bit GOT entry for function */
-+#define R_MIPS_GPREL32		12	/* GP relative 32 bit */
-+
-+#define R_MIPS_SHIFT5		16
-+#define R_MIPS_SHIFT6		17
-+#define R_MIPS_64		18
-+#define R_MIPS_GOT_DISP		19
-+#define R_MIPS_GOT_PAGE		20
-+#define R_MIPS_GOT_OFST		21
-+#define R_MIPS_GOT_HI16		22
-+#define R_MIPS_GOT_LO16		23
-+#define R_MIPS_SUB		24
-+#define R_MIPS_INSERT_A		25
-+#define R_MIPS_INSERT_B		26
-+#define R_MIPS_DELETE		27
-+#define R_MIPS_HIGHER		28
-+#define R_MIPS_HIGHEST		29
-+#define R_MIPS_CALL_HI16	30
-+#define R_MIPS_CALL_LO16	31
-+#define R_MIPS_SCN_DISP		32
-+#define R_MIPS_REL16		33
-+#define R_MIPS_ADD_IMMEDIATE	34
-+#define R_MIPS_PJUMP		35
-+#define R_MIPS_RELGOT		36
-+#define R_MIPS_JALR		37
-+/* Keep this the last entry.  */
-+#define R_MIPS_NUM		38
-+
-+/* Legal values for p_type field of Elf32_Phdr.  */
-+
-+#define PT_MIPS_REGINFO	0x70000000	/* Register usage information */
-+#define PT_MIPS_RTPROC  0x70000001	/* Runtime procedure table. */
-+#define PT_MIPS_OPTIONS 0x70000002
-+
-+/* Special program header types.  */
-+
-+#define PF_MIPS_LOCAL	0x10000000
-+
-+/* Legal values for d_tag field of Elf32_Dyn.  */
-+
-+#define DT_MIPS_RLD_VERSION  0x70000001	/* Runtime linker interface version */
-+#define DT_MIPS_TIME_STAMP   0x70000002	/* Timestamp */
-+#define DT_MIPS_ICHECKSUM    0x70000003	/* Checksum */
-+#define DT_MIPS_IVERSION     0x70000004	/* Version string (string tbl index) */
-+#define DT_MIPS_FLAGS	     0x70000005	/* Flags */
-+#define DT_MIPS_BASE_ADDRESS 0x70000006	/* Base address */
-+#define DT_MIPS_MSYM	     0x70000007
-+#define DT_MIPS_CONFLICT     0x70000008	/* Address of CONFLICT section */
-+#define DT_MIPS_LIBLIST	     0x70000009	/* Address of LIBLIST section */
-+#define DT_MIPS_LOCAL_GOTNO  0x7000000a	/* Number of local GOT entries */
-+#define DT_MIPS_CONFLICTNO   0x7000000b	/* Number of CONFLICT entries */
-+#define DT_MIPS_LIBLISTNO    0x70000010	/* Number of LIBLIST entries */
-+#define DT_MIPS_SYMTABNO     0x70000011	/* Number of DYNSYM entries */
-+#define DT_MIPS_UNREFEXTNO   0x70000012	/* First external DYNSYM */
-+#define DT_MIPS_GOTSYM	     0x70000013	/* First GOT entry in DYNSYM */
-+#define DT_MIPS_HIPAGENO     0x70000014	/* Number of GOT page table entries */
-+#define DT_MIPS_RLD_MAP	     0x70000016	/* Address of run time loader map.  */
-+#define DT_MIPS_DELTA_CLASS  0x70000017	/* Delta C++ class definition.  */
-+#define DT_MIPS_DELTA_CLASS_NO    0x70000018 /* Number of entries in
-+						DT_MIPS_DELTA_CLASS.  */
-+#define DT_MIPS_DELTA_INSTANCE    0x70000019 /* Delta C++ class instances.  */
-+#define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a /* Number of entries in
-+						DT_MIPS_DELTA_INSTANCE.  */
-+#define DT_MIPS_DELTA_RELOC  0x7000001b /* Delta relocations.  */
-+#define DT_MIPS_DELTA_RELOC_NO 0x7000001c /* Number of entries in
-+					     DT_MIPS_DELTA_RELOC.  */
-+#define DT_MIPS_DELTA_SYM    0x7000001d /* Delta symbols that Delta
-+					   relocations refer to.  */
-+#define DT_MIPS_DELTA_SYM_NO 0x7000001e /* Number of entries in
-+					   DT_MIPS_DELTA_SYM.  */
-+#define DT_MIPS_DELTA_CLASSSYM 0x70000020 /* Delta symbols that hold the
-+					     class declaration.  */
-+#define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021 /* Number of entries in
-+						DT_MIPS_DELTA_CLASSSYM.  */
-+#define DT_MIPS_CXX_FLAGS    0x70000022 /* Flags indicating for C++ flavor.  */
-+#define DT_MIPS_PIXIE_INIT   0x70000023
-+#define DT_MIPS_SYMBOL_LIB   0x70000024
-+#define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025
-+#define DT_MIPS_LOCAL_GOTIDX 0x70000026
-+#define DT_MIPS_HIDDEN_GOTIDX 0x70000027
-+#define DT_MIPS_PROTECTED_GOTIDX 0x70000028
-+#define DT_MIPS_OPTIONS	     0x70000029 /* Address of .options.  */
-+#define DT_MIPS_INTERFACE    0x7000002a /* Address of .interface.  */
-+#define DT_MIPS_DYNSTR_ALIGN 0x7000002b
-+#define DT_MIPS_INTERFACE_SIZE 0x7000002c /* Size of the .interface section. */
-+#define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d /* Address of rld_text_rsolve
-+						    function stored in GOT.  */
-+#define DT_MIPS_PERF_SUFFIX  0x7000002e /* Default suffix of dso to be added
-+					   by rld on dlopen() calls.  */
-+#define DT_MIPS_COMPACT_SIZE 0x7000002f /* (O32)Size of compact rel section. */
-+#define DT_MIPS_GP_VALUE     0x70000030 /* GP value for aux GOTs.  */
-+#define DT_MIPS_AUX_DYNAMIC  0x70000031 /* Address of aux .dynamic.  */
-+#define DT_MIPS_NUM	     0x32
-+
-+/* Legal values for DT_MIPS_FLAGS Elf32_Dyn entry.  */
-+
-+#define RHF_NONE		   0		/* No flags */
-+#define RHF_QUICKSTART		   (1 << 0)	/* Use quickstart */
-+#define RHF_NOTPOT		   (1 << 1)	/* Hash size not power of 2 */
-+#define RHF_NO_LIBRARY_REPLACEMENT (1 << 2)	/* Ignore LD_LIBRARY_PATH */
-+#define RHF_NO_MOVE		   (1 << 3)
-+#define RHF_SGI_ONLY		   (1 << 4)
-+#define RHF_GUARANTEE_INIT	   (1 << 5)
-+#define RHF_DELTA_C_PLUS_PLUS	   (1 << 6)
-+#define RHF_GUARANTEE_START_INIT   (1 << 7)
-+#define RHF_PIXIE		   (1 << 8)
-+#define RHF_DEFAULT_DELAY_LOAD	   (1 << 9)
-+#define RHF_REQUICKSTART	   (1 << 10)
-+#define RHF_REQUICKSTARTED	   (1 << 11)
-+#define RHF_CORD		   (1 << 12)
-+#define RHF_NO_UNRES_UNDEF	   (1 << 13)
-+#define RHF_RLD_ORDER_SAFE	   (1 << 14)
-+
-+/* Entries found in sections of type SHT_MIPS_LIBLIST.  */
-+
-+typedef struct
-+{
-+  Elf32_Word l_name;		/* Name (string table index) */
-+  Elf32_Word l_time_stamp;	/* Timestamp */
-+  Elf32_Word l_checksum;	/* Checksum */
-+  Elf32_Word l_version;		/* Interface version */
-+  Elf32_Word l_flags;		/* Flags */
-+} Elf32_Lib;
-+
-+typedef struct
-+{
-+  Elf64_Word l_name;		/* Name (string table index) */
-+  Elf64_Word l_time_stamp;	/* Timestamp */
-+  Elf64_Word l_checksum;	/* Checksum */
-+  Elf64_Word l_version;		/* Interface version */
-+  Elf64_Word l_flags;		/* Flags */
-+} Elf64_Lib;
-+
-+
-+/* Legal values for l_flags.  */
-+
-+#define LL_NONE		  0
-+#define LL_EXACT_MATCH	  (1 << 0)	/* Require exact match */
-+#define LL_IGNORE_INT_VER (1 << 1)	/* Ignore interface version */
-+#define LL_REQUIRE_MINOR  (1 << 2)
-+#define LL_EXPORTS	  (1 << 3)
-+#define LL_DELAY_LOAD	  (1 << 4)
-+#define LL_DELTA	  (1 << 5)
-+
-+/* Entries found in sections of type SHT_MIPS_CONFLICT.  */
-+
-+typedef Elf32_Addr Elf32_Conflict;
-+
-+
-+/* HPPA specific definitions.  */
-+
-+/* Legal values for e_flags field of Elf32_Ehdr.  */
-+
-+#define EF_PARISC_TRAPNIL	0x00010000 /* Trap nil pointer dereference.  */
-+#define EF_PARISC_EXT		0x00020000 /* Program uses arch. extensions. */
-+#define EF_PARISC_LSB		0x00040000 /* Program expects little endian. */
-+#define EF_PARISC_WIDE		0x00080000 /* Program expects wide mode.  */
-+#define EF_PARISC_NO_KABP	0x00100000 /* No kernel assisted branch
-+					      prediction.  */
-+#define EF_PARISC_LAZYSWAP	0x00400000 /* Allow lazy swapping.  */
-+#define EF_PARISC_ARCH		0x0000ffff /* Architecture version.  */
-+
-+/* Defined values for `e_flags & EF_PARISC_ARCH' are:  */
-+
-+#define EFA_PARISC_1_0		    0x020b /* PA-RISC 1.0 big-endian.  */
-+#define EFA_PARISC_1_1		    0x0210 /* PA-RISC 1.1 big-endian.  */
-+#define EFA_PARISC_2_0		    0x0214 /* PA-RISC 2.0 big-endian.  */
-+
-+/* Additional section indeces.  */
-+
-+#define SHN_PARISC_ANSI_COMMON	0xff00	   /* Section for tenatively declared
-+					      symbols in ANSI C.  */
-+#define SHN_PARISC_HUGE_COMMON	0xff01	   /* Common blocks in huge model.  */
-+
-+/* Legal values for sh_type field of Elf32_Shdr.  */
-+
-+#define SHT_PARISC_EXT		0x70000000 /* Contains product specific ext. */
-+#define SHT_PARISC_UNWIND	0x70000001 /* Unwind information.  */
-+#define SHT_PARISC_DOC		0x70000002 /* Debug info for optimized code. */
-+
-+/* Legal values for sh_flags field of Elf32_Shdr.  */
-+
-+#define SHF_PARISC_SHORT	0x20000000 /* Section with short addressing. */
-+#define SHF_PARISC_HUGE		0x40000000 /* Section far from gp.  */
-+#define SHF_PARISC_SBP		0x80000000 /* Static branch prediction code. */
-+
-+/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
-+
-+#define STT_PARISC_MILLICODE	13	/* Millicode function entry point.  */
-+
-+#define STT_HP_OPAQUE		(STT_LOOS + 0x1)
-+#define STT_HP_STUB		(STT_LOOS + 0x2)
-+
-+/* HPPA relocs.  */
-+
-+#define R_PARISC_NONE		0	/* No reloc.  */
-+#define R_PARISC_DIR32		1	/* Direct 32-bit reference.  */
-+#define R_PARISC_DIR21L		2	/* Left 21 bits of eff. address.  */
-+#define R_PARISC_DIR17R		3	/* Right 17 bits of eff. address.  */
-+#define R_PARISC_DIR17F		4	/* 17 bits of eff. address.  */
-+#define R_PARISC_DIR14R		6	/* Right 14 bits of eff. address.  */
-+#define R_PARISC_PCREL32	9	/* 32-bit rel. address.  */
-+#define R_PARISC_PCREL21L	10	/* Left 21 bits of rel. address.  */
-+#define R_PARISC_PCREL17R	11	/* Right 17 bits of rel. address.  */
-+#define R_PARISC_PCREL17F	12	/* 17 bits of rel. address.  */
-+#define R_PARISC_PCREL14R	14	/* Right 14 bits of rel. address.  */
-+#define R_PARISC_DPREL21L	18	/* Left 21 bits of rel. address.  */
-+#define R_PARISC_DPREL14R	22	/* Right 14 bits of rel. address.  */
-+#define R_PARISC_GPREL21L	26	/* GP-relative, left 21 bits.  */
-+#define R_PARISC_GPREL14R	30	/* GP-relative, right 14 bits.  */
-+#define R_PARISC_LTOFF21L	34	/* LT-relative, left 21 bits.  */
-+#define R_PARISC_LTOFF14R	38	/* LT-relative, right 14 bits.  */
-+#define R_PARISC_SECREL32	41	/* 32 bits section rel. address.  */
-+#define R_PARISC_SEGBASE	48	/* No relocation, set segment base.  */
-+#define R_PARISC_SEGREL32	49	/* 32 bits segment rel. address.  */
-+#define R_PARISC_PLTOFF21L	50	/* PLT rel. address, left 21 bits.  */
-+#define R_PARISC_PLTOFF14R	54	/* PLT rel. address, right 14 bits.  */
-+#define R_PARISC_LTOFF_FPTR32	57	/* 32 bits LT-rel. function pointer. */
-+#define R_PARISC_LTOFF_FPTR21L	58	/* LT-rel. fct ptr, left 21 bits. */
-+#define R_PARISC_LTOFF_FPTR14R	62	/* LT-rel. fct ptr, right 14 bits. */
-+#define R_PARISC_FPTR64		64	/* 64 bits function address.  */
-+#define R_PARISC_PLABEL32	65	/* 32 bits function address.  */
-+#define R_PARISC_PCREL64	72	/* 64 bits PC-rel. address.  */
-+#define R_PARISC_PCREL22F	74	/* 22 bits PC-rel. address.  */
-+#define R_PARISC_PCREL14WR	75	/* PC-rel. address, right 14 bits.  */
-+#define R_PARISC_PCREL14DR	76	/* PC rel. address, right 14 bits.  */
-+#define R_PARISC_PCREL16F	77	/* 16 bits PC-rel. address.  */
-+#define R_PARISC_PCREL16WF	78	/* 16 bits PC-rel. address.  */
-+#define R_PARISC_PCREL16DF	79	/* 16 bits PC-rel. address.  */
-+#define R_PARISC_DIR64		80	/* 64 bits of eff. address.  */
-+#define R_PARISC_DIR14WR	83	/* 14 bits of eff. address.  */
-+#define R_PARISC_DIR14DR	84	/* 14 bits of eff. address.  */
-+#define R_PARISC_DIR16F		85	/* 16 bits of eff. address.  */
-+#define R_PARISC_DIR16WF	86	/* 16 bits of eff. address.  */
-+#define R_PARISC_DIR16DF	87	/* 16 bits of eff. address.  */
-+#define R_PARISC_GPREL64	88	/* 64 bits of GP-rel. address.  */
-+#define R_PARISC_GPREL14WR	91	/* GP-rel. address, right 14 bits.  */
-+#define R_PARISC_GPREL14DR	92	/* GP-rel. address, right 14 bits.  */
-+#define R_PARISC_GPREL16F	93	/* 16 bits GP-rel. address.  */
-+#define R_PARISC_GPREL16WF	94	/* 16 bits GP-rel. address.  */
-+#define R_PARISC_GPREL16DF	95	/* 16 bits GP-rel. address.  */
-+#define R_PARISC_LTOFF64	96	/* 64 bits LT-rel. address.  */
-+#define R_PARISC_LTOFF14WR	99	/* LT-rel. address, right 14 bits.  */
-+#define R_PARISC_LTOFF14DR	100	/* LT-rel. address, right 14 bits.  */
-+#define R_PARISC_LTOFF16F	101	/* 16 bits LT-rel. address.  */
-+#define R_PARISC_LTOFF16WF	102	/* 16 bits LT-rel. address.  */
-+#define R_PARISC_LTOFF16DF	103	/* 16 bits LT-rel. address.  */
-+#define R_PARISC_SECREL64	104	/* 64 bits section rel. address.  */
-+#define R_PARISC_SEGREL64	112	/* 64 bits segment rel. address.  */
-+#define R_PARISC_PLTOFF14WR	115	/* PLT-rel. address, right 14 bits.  */
-+#define R_PARISC_PLTOFF14DR	116	/* PLT-rel. address, right 14 bits.  */
-+#define R_PARISC_PLTOFF16F	117	/* 16 bits LT-rel. address.  */
-+#define R_PARISC_PLTOFF16WF	118	/* 16 bits PLT-rel. address.  */
-+#define R_PARISC_PLTOFF16DF	119	/* 16 bits PLT-rel. address.  */
-+#define R_PARISC_LTOFF_FPTR64	120	/* 64 bits LT-rel. function ptr.  */
-+#define R_PARISC_LTOFF_FPTR14WR	123	/* LT-rel. fct. ptr., right 14 bits. */
-+#define R_PARISC_LTOFF_FPTR14DR	124	/* LT-rel. fct. ptr., right 14 bits. */
-+#define R_PARISC_LTOFF_FPTR16F	125	/* 16 bits LT-rel. function ptr.  */
-+#define R_PARISC_LTOFF_FPTR16WF	126	/* 16 bits LT-rel. function ptr.  */
-+#define R_PARISC_LTOFF_FPTR16DF	127	/* 16 bits LT-rel. function ptr.  */
-+#define R_PARISC_LORESERVE	128
-+#define R_PARISC_COPY		128	/* Copy relocation.  */
-+#define R_PARISC_IPLT		129	/* Dynamic reloc, imported PLT */
-+#define R_PARISC_EPLT		130	/* Dynamic reloc, exported PLT */
-+#define R_PARISC_TPREL32	153	/* 32 bits TP-rel. address.  */
-+#define R_PARISC_TPREL21L	154	/* TP-rel. address, left 21 bits.  */
-+#define R_PARISC_TPREL14R	158	/* TP-rel. address, right 14 bits.  */
-+#define R_PARISC_LTOFF_TP21L	162	/* LT-TP-rel. address, left 21 bits. */
-+#define R_PARISC_LTOFF_TP14R	166	/* LT-TP-rel. address, right 14 bits.*/
-+#define R_PARISC_LTOFF_TP14F	167	/* 14 bits LT-TP-rel. address.  */
-+#define R_PARISC_TPREL64	216	/* 64 bits TP-rel. address.  */
-+#define R_PARISC_TPREL14WR	219	/* TP-rel. address, right 14 bits.  */
-+#define R_PARISC_TPREL14DR	220	/* TP-rel. address, right 14 bits.  */
-+#define R_PARISC_TPREL16F	221	/* 16 bits TP-rel. address.  */
-+#define R_PARISC_TPREL16WF	222	/* 16 bits TP-rel. address.  */
-+#define R_PARISC_TPREL16DF	223	/* 16 bits TP-rel. address.  */
-+#define R_PARISC_LTOFF_TP64	224	/* 64 bits LT-TP-rel. address.  */
-+#define R_PARISC_LTOFF_TP14WR	227	/* LT-TP-rel. address, right 14 bits.*/
-+#define R_PARISC_LTOFF_TP14DR	228	/* LT-TP-rel. address, right 14 bits.*/
-+#define R_PARISC_LTOFF_TP16F	229	/* 16 bits LT-TP-rel. address.  */
-+#define R_PARISC_LTOFF_TP16WF	230	/* 16 bits LT-TP-rel. address.  */
-+#define R_PARISC_LTOFF_TP16DF	231	/* 16 bits LT-TP-rel. address.  */
-+#define R_PARISC_HIRESERVE	255
-+
-+/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr.  */
-+
-+#define PT_HP_TLS		(PT_LOOS + 0x0)
-+#define PT_HP_CORE_NONE		(PT_LOOS + 0x1)
-+#define PT_HP_CORE_VERSION	(PT_LOOS + 0x2)
-+#define PT_HP_CORE_KERNEL	(PT_LOOS + 0x3)
-+#define PT_HP_CORE_COMM		(PT_LOOS + 0x4)
-+#define PT_HP_CORE_PROC		(PT_LOOS + 0x5)
-+#define PT_HP_CORE_LOADABLE	(PT_LOOS + 0x6)
-+#define PT_HP_CORE_STACK	(PT_LOOS + 0x7)
-+#define PT_HP_CORE_SHM		(PT_LOOS + 0x8)
-+#define PT_HP_CORE_MMF		(PT_LOOS + 0x9)
-+#define PT_HP_PARALLEL		(PT_LOOS + 0x10)
-+#define PT_HP_FASTBIND		(PT_LOOS + 0x11)
-+#define PT_HP_OPT_ANNOT		(PT_LOOS + 0x12)
-+#define PT_HP_HSL_ANNOT		(PT_LOOS + 0x13)
-+#define PT_HP_STACK		(PT_LOOS + 0x14)
-+
-+#define PT_PARISC_ARCHEXT	0x70000000
-+#define PT_PARISC_UNWIND	0x70000001
-+
-+/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr.  */
-+
-+#define PF_PARISC_SBP		0x08000000
-+
-+#define PF_HP_PAGE_SIZE		0x00100000
-+#define PF_HP_FAR_SHARED	0x00200000
-+#define PF_HP_NEAR_SHARED	0x00400000
-+#define PF_HP_CODE		0x01000000
-+#define PF_HP_MODIFY		0x02000000
-+#define PF_HP_LAZYSWAP		0x04000000
-+#define PF_HP_SBP		0x08000000
-+
-+
-+/* Alpha specific definitions.  */
-+
-+/* Legal values for e_flags field of Elf64_Ehdr.  */
-+
-+#define EF_ALPHA_32BIT		1	/* All addresses must be < 2GB.  */
-+#define EF_ALPHA_CANRELAX	2	/* Relocations for relaxing exist.  */
-+
-+/* Legal values for sh_type field of Elf64_Shdr.  */
-+
-+/* These two are primerily concerned with ECOFF debugging info.  */
-+#define SHT_ALPHA_DEBUG		0x70000001
-+#define SHT_ALPHA_REGINFO	0x70000002
-+
-+/* Legal values for sh_flags field of Elf64_Shdr.  */
-+
-+#define SHF_ALPHA_GPREL		0x10000000
-+
-+/* Legal values for st_other field of Elf64_Sym.  */
-+#define STO_ALPHA_NOPV		0x80	/* No PV required.  */
-+#define STO_ALPHA_STD_GPLOAD	0x88	/* PV only used for initial ldgp.  */
-+
-+/* Alpha relocs.  */
-+
-+#define R_ALPHA_NONE		0	/* No reloc */
-+#define R_ALPHA_REFLONG		1	/* Direct 32 bit */
-+#define R_ALPHA_REFQUAD		2	/* Direct 64 bit */
-+#define R_ALPHA_GPREL32		3	/* GP relative 32 bit */
-+#define R_ALPHA_LITERAL		4	/* GP relative 16 bit w/optimization */
-+#define R_ALPHA_LITUSE		5	/* Optimization hint for LITERAL */
-+#define R_ALPHA_GPDISP		6	/* Add displacement to GP */
-+#define R_ALPHA_BRADDR		7	/* PC+4 relative 23 bit shifted */
-+#define R_ALPHA_HINT		8	/* PC+4 relative 16 bit shifted */
-+#define R_ALPHA_SREL16		9	/* PC relative 16 bit */
-+#define R_ALPHA_SREL32		10	/* PC relative 32 bit */
-+#define R_ALPHA_SREL64		11	/* PC relative 64 bit */
-+#define R_ALPHA_GPRELHIGH	17	/* GP relative 32 bit, high 16 bits */
-+#define R_ALPHA_GPRELLOW	18	/* GP relative 32 bit, low 16 bits */
-+#define R_ALPHA_GPREL16		19	/* GP relative 16 bit */
-+#define R_ALPHA_COPY		24	/* Copy symbol at runtime */
-+#define R_ALPHA_GLOB_DAT	25	/* Create GOT entry */
-+#define R_ALPHA_JMP_SLOT	26	/* Create PLT entry */
-+#define R_ALPHA_RELATIVE	27	/* Adjust by program base */
-+#define R_ALPHA_TLS_GD_HI	28
-+#define R_ALPHA_TLSGD		29
-+#define R_ALPHA_TLS_LDM		30
-+#define R_ALPHA_DTPMOD64	31
-+#define R_ALPHA_GOTDTPREL	32
-+#define R_ALPHA_DTPREL64	33
-+#define R_ALPHA_DTPRELHI	34
-+#define R_ALPHA_DTPRELLO	35
-+#define R_ALPHA_DTPREL16	36
-+#define R_ALPHA_GOTTPREL	37
-+#define R_ALPHA_TPREL64		38
-+#define R_ALPHA_TPRELHI		39
-+#define R_ALPHA_TPRELLO		40
-+#define R_ALPHA_TPREL16		41
-+/* Keep this the last entry.  */
-+#define R_ALPHA_NUM		46
-+
-+/* Magic values of the LITUSE relocation addend.  */
-+#define LITUSE_ALPHA_ADDR	0
-+#define LITUSE_ALPHA_BASE	1
-+#define LITUSE_ALPHA_BYTOFF	2
-+#define LITUSE_ALPHA_JSR	3
-+#define LITUSE_ALPHA_TLS_GD	4
-+#define LITUSE_ALPHA_TLS_LDM	5
-+
-+
-+/* PowerPC specific declarations */
-+
-+/* Values for Elf32/64_Ehdr.e_flags.  */
-+#define EF_PPC_EMB		0x80000000	/* PowerPC embedded flag */
-+
-+/* Cygnus local bits below */
-+#define EF_PPC_RELOCATABLE	0x00010000	/* PowerPC -mrelocatable flag*/
-+#define EF_PPC_RELOCATABLE_LIB	0x00008000	/* PowerPC -mrelocatable-lib
-+						   flag */
-+
-+/* PowerPC relocations defined by the ABIs */
-+#define R_PPC_NONE		0
-+#define R_PPC_ADDR32		1	/* 32bit absolute address */
-+#define R_PPC_ADDR24		2	/* 26bit address, 2 bits ignored.  */
-+#define R_PPC_ADDR16		3	/* 16bit absolute address */
-+#define R_PPC_ADDR16_LO		4	/* lower 16bit of absolute address */
-+#define R_PPC_ADDR16_HI		5	/* high 16bit of absolute address */
-+#define R_PPC_ADDR16_HA		6	/* adjusted high 16bit */
-+#define R_PPC_ADDR14		7	/* 16bit address, 2 bits ignored */
-+#define R_PPC_ADDR14_BRTAKEN	8
-+#define R_PPC_ADDR14_BRNTAKEN	9
-+#define R_PPC_REL24		10	/* PC relative 26 bit */
-+#define R_PPC_REL14		11	/* PC relative 16 bit */
-+#define R_PPC_REL14_BRTAKEN	12
-+#define R_PPC_REL14_BRNTAKEN	13
-+#define R_PPC_GOT16		14
-+#define R_PPC_GOT16_LO		15
-+#define R_PPC_GOT16_HI		16
-+#define R_PPC_GOT16_HA		17
-+#define R_PPC_PLTREL24		18
-+#define R_PPC_COPY		19
-+#define R_PPC_GLOB_DAT		20
-+#define R_PPC_JMP_SLOT		21
-+#define R_PPC_RELATIVE		22
-+#define R_PPC_LOCAL24PC		23
-+#define R_PPC_UADDR32		24
-+#define R_PPC_UADDR16		25
-+#define R_PPC_REL32		26
-+#define R_PPC_PLT32		27
-+#define R_PPC_PLTREL32		28
-+#define R_PPC_PLT16_LO		29
-+#define R_PPC_PLT16_HI		30
-+#define R_PPC_PLT16_HA		31
-+#define R_PPC_SDAREL16		32
-+#define R_PPC_SECTOFF		33
-+#define R_PPC_SECTOFF_LO	34
-+#define R_PPC_SECTOFF_HI	35
-+#define R_PPC_SECTOFF_HA	36
-+
-+/* PowerPC relocations defined for the TLS access ABI.  */
-+#define R_PPC_TLS		67 /* none	(sym+add)@tls */
-+#define R_PPC_DTPMOD32		68 /* word32	(sym+add)@dtpmod */
-+#define R_PPC_TPREL16		69 /* half16*	(sym+add)@tprel */
-+#define R_PPC_TPREL16_LO	70 /* half16	(sym+add)@tprel@l */
-+#define R_PPC_TPREL16_HI	71 /* half16	(sym+add)@tprel@h */
-+#define R_PPC_TPREL16_HA	72 /* half16	(sym+add)@tprel@ha */
-+#define R_PPC_TPREL32		73 /* word32	(sym+add)@tprel */
-+#define R_PPC_DTPREL16		74 /* half16*	(sym+add)@dtprel */
-+#define R_PPC_DTPREL16_LO	75 /* half16	(sym+add)@dtprel@l */
-+#define R_PPC_DTPREL16_HI	76 /* half16	(sym+add)@dtprel@h */
-+#define R_PPC_DTPREL16_HA	77 /* half16	(sym+add)@dtprel@ha */
-+#define R_PPC_DTPREL32		78 /* word32	(sym+add)@dtprel */
-+#define R_PPC_GOT_TLSGD16	79 /* half16*	(sym+add)@got@tlsgd */
-+#define R_PPC_GOT_TLSGD16_LO	80 /* half16	(sym+add)@got@tlsgd@l */
-+#define R_PPC_GOT_TLSGD16_HI	81 /* half16	(sym+add)@got@tlsgd@h */
-+#define R_PPC_GOT_TLSGD16_HA	82 /* half16	(sym+add)@got@tlsgd@ha */
-+#define R_PPC_GOT_TLSLD16	83 /* half16*	(sym+add)@got@tlsld */
-+#define R_PPC_GOT_TLSLD16_LO	84 /* half16	(sym+add)@got@tlsld@l */
-+#define R_PPC_GOT_TLSLD16_HI	85 /* half16	(sym+add)@got@tlsld@h */
-+#define R_PPC_GOT_TLSLD16_HA	86 /* half16	(sym+add)@got@tlsld@ha */
-+#define R_PPC_GOT_TPREL16	87 /* half16*	(sym+add)@got@tprel */
-+#define R_PPC_GOT_TPREL16_LO	88 /* half16	(sym+add)@got@tprel@l */
-+#define R_PPC_GOT_TPREL16_HI	89 /* half16	(sym+add)@got@tprel@h */
-+#define R_PPC_GOT_TPREL16_HA	90 /* half16	(sym+add)@got@tprel@ha */
-+#define R_PPC_GOT_DTPREL16	91 /* half16*	(sym+add)@got@dtprel */
-+#define R_PPC_GOT_DTPREL16_LO	92 /* half16*	(sym+add)@got@dtprel@l */
-+#define R_PPC_GOT_DTPREL16_HI	93 /* half16*	(sym+add)@got@dtprel@h */
-+#define R_PPC_GOT_DTPREL16_HA	94 /* half16*	(sym+add)@got@dtprel@ha */
-+
-+/* Keep this the last entry.  */
-+#define R_PPC_NUM		95
-+
-+/* The remaining relocs are from the Embedded ELF ABI, and are not
-+   in the SVR4 ELF ABI.  */
-+#define R_PPC_EMB_NADDR32	101
-+#define R_PPC_EMB_NADDR16	102
-+#define R_PPC_EMB_NADDR16_LO	103
-+#define R_PPC_EMB_NADDR16_HI	104
-+#define R_PPC_EMB_NADDR16_HA	105
-+#define R_PPC_EMB_SDAI16	106
-+#define R_PPC_EMB_SDA2I16	107
-+#define R_PPC_EMB_SDA2REL	108
-+#define R_PPC_EMB_SDA21		109	/* 16 bit offset in SDA */
-+#define R_PPC_EMB_MRKREF	110
-+#define R_PPC_EMB_RELSEC16	111
-+#define R_PPC_EMB_RELST_LO	112
-+#define R_PPC_EMB_RELST_HI	113
-+#define R_PPC_EMB_RELST_HA	114
-+#define R_PPC_EMB_BIT_FLD	115
-+#define R_PPC_EMB_RELSDA	116	/* 16 bit relative offset in SDA */
-+
-+/* Diab tool relocations.  */
-+#define R_PPC_DIAB_SDA21_LO	180	/* like EMB_SDA21, but lower 16 bit */
-+#define R_PPC_DIAB_SDA21_HI	181	/* like EMB_SDA21, but high 16 bit */
-+#define R_PPC_DIAB_SDA21_HA	182	/* like EMB_SDA21, adjusted high 16 */
-+#define R_PPC_DIAB_RELSDA_LO	183	/* like EMB_RELSDA, but lower 16 bit */
-+#define R_PPC_DIAB_RELSDA_HI	184	/* like EMB_RELSDA, but high 16 bit */
-+#define R_PPC_DIAB_RELSDA_HA	185	/* like EMB_RELSDA, adjusted high 16 */
-+
-+/* This is a phony reloc to handle any old fashioned TOC16 references
-+   that may still be in object files.  */
-+#define R_PPC_TOC16		255
-+
-+
-+/* PowerPC64 relocations defined by the ABIs */
-+#define R_PPC64_NONE		R_PPC_NONE
-+#define R_PPC64_ADDR32		R_PPC_ADDR32 /* 32bit absolute address */
-+#define R_PPC64_ADDR24		R_PPC_ADDR24 /* 26bit address, word aligned */
-+#define R_PPC64_ADDR16		R_PPC_ADDR16 /* 16bit absolute address */
-+#define R_PPC64_ADDR16_LO	R_PPC_ADDR16_LO	/* lower 16bits of address */
-+#define R_PPC64_ADDR16_HI	R_PPC_ADDR16_HI	/* high 16bits of address. */
-+#define R_PPC64_ADDR16_HA	R_PPC_ADDR16_HA /* adjusted high 16bits.  */
-+#define R_PPC64_ADDR14		R_PPC_ADDR14 /* 16bit address, word aligned */
-+#define R_PPC64_ADDR14_BRTAKEN	R_PPC_ADDR14_BRTAKEN
-+#define R_PPC64_ADDR14_BRNTAKEN	R_PPC_ADDR14_BRNTAKEN
-+#define R_PPC64_REL24		R_PPC_REL24 /* PC-rel. 26 bit, word aligned */
-+#define R_PPC64_REL14		R_PPC_REL14 /* PC relative 16 bit */
-+#define R_PPC64_REL14_BRTAKEN	R_PPC_REL14_BRTAKEN
-+#define R_PPC64_REL14_BRNTAKEN	R_PPC_REL14_BRNTAKEN
-+#define R_PPC64_GOT16		R_PPC_GOT16
-+#define R_PPC64_GOT16_LO	R_PPC_GOT16_LO
-+#define R_PPC64_GOT16_HI	R_PPC_GOT16_HI
-+#define R_PPC64_GOT16_HA	R_PPC_GOT16_HA
-+
-+#define R_PPC64_COPY		R_PPC_COPY
-+#define R_PPC64_GLOB_DAT	R_PPC_GLOB_DAT
-+#define R_PPC64_JMP_SLOT	R_PPC_JMP_SLOT
-+#define R_PPC64_RELATIVE	R_PPC_RELATIVE
-+
-+#define R_PPC64_UADDR32		R_PPC_UADDR32
-+#define R_PPC64_UADDR16		R_PPC_UADDR16
-+#define R_PPC64_REL32		R_PPC_REL32
-+#define R_PPC64_PLT32		R_PPC_PLT32
-+#define R_PPC64_PLTREL32	R_PPC_PLTREL32
-+#define R_PPC64_PLT16_LO	R_PPC_PLT16_LO
-+#define R_PPC64_PLT16_HI	R_PPC_PLT16_HI
-+#define R_PPC64_PLT16_HA	R_PPC_PLT16_HA
-+
-+#define R_PPC64_SECTOFF		R_PPC_SECTOFF
-+#define R_PPC64_SECTOFF_LO	R_PPC_SECTOFF_LO
-+#define R_PPC64_SECTOFF_HI	R_PPC_SECTOFF_HI
-+#define R_PPC64_SECTOFF_HA	R_PPC_SECTOFF_HA
-+#define R_PPC64_ADDR30		37 /* word30 (S + A - P) >> 2 */
-+#define R_PPC64_ADDR64		38 /* doubleword64 S + A */
-+#define R_PPC64_ADDR16_HIGHER	39 /* half16 #higher(S + A) */
-+#define R_PPC64_ADDR16_HIGHERA	40 /* half16 #highera(S + A) */
-+#define R_PPC64_ADDR16_HIGHEST	41 /* half16 #highest(S + A) */
-+#define R_PPC64_ADDR16_HIGHESTA	42 /* half16 #highesta(S + A) */
-+#define R_PPC64_UADDR64		43 /* doubleword64 S + A */
-+#define R_PPC64_REL64		44 /* doubleword64 S + A - P */
-+#define R_PPC64_PLT64		45 /* doubleword64 L + A */
-+#define R_PPC64_PLTREL64	46 /* doubleword64 L + A - P */
-+#define R_PPC64_TOC16		47 /* half16* S + A - .TOC */
-+#define R_PPC64_TOC16_LO	48 /* half16 #lo(S + A - .TOC.) */
-+#define R_PPC64_TOC16_HI	49 /* half16 #hi(S + A - .TOC.) */
-+#define R_PPC64_TOC16_HA	50 /* half16 #ha(S + A - .TOC.) */
-+#define R_PPC64_TOC		51 /* doubleword64 .TOC */
-+#define R_PPC64_PLTGOT16	52 /* half16* M + A */
-+#define R_PPC64_PLTGOT16_LO	53 /* half16 #lo(M + A) */
-+#define R_PPC64_PLTGOT16_HI	54 /* half16 #hi(M + A) */
-+#define R_PPC64_PLTGOT16_HA	55 /* half16 #ha(M + A) */
-+
-+#define R_PPC64_ADDR16_DS	56 /* half16ds* (S + A) >> 2 */
-+#define R_PPC64_ADDR16_LO_DS	57 /* half16ds  #lo(S + A) >> 2 */
-+#define R_PPC64_GOT16_DS	58 /* half16ds* (G + A) >> 2 */
-+#define R_PPC64_GOT16_LO_DS	59 /* half16ds  #lo(G + A) >> 2 */
-+#define R_PPC64_PLT16_LO_DS	60 /* half16ds  #lo(L + A) >> 2 */
-+#define R_PPC64_SECTOFF_DS	61 /* half16ds* (R + A) >> 2 */
-+#define R_PPC64_SECTOFF_LO_DS	62 /* half16ds  #lo(R + A) >> 2 */
-+#define R_PPC64_TOC16_DS	63 /* half16ds* (S + A - .TOC.) >> 2 */
-+#define R_PPC64_TOC16_LO_DS	64 /* half16ds  #lo(S + A - .TOC.) >> 2 */
-+#define R_PPC64_PLTGOT16_DS	65 /* half16ds* (M + A) >> 2 */
-+#define R_PPC64_PLTGOT16_LO_DS	66 /* half16ds  #lo(M + A) >> 2 */
-+
-+/* PowerPC64 relocations defined for the TLS access ABI.  */
-+#define R_PPC64_TLS		67 /* none	(sym+add)@tls */
-+#define R_PPC64_DTPMOD64	68 /* doubleword64 (sym+add)@dtpmod */
-+#define R_PPC64_TPREL16		69 /* half16*	(sym+add)@tprel */
-+#define R_PPC64_TPREL16_LO	70 /* half16	(sym+add)@tprel@l */
-+#define R_PPC64_TPREL16_HI	71 /* half16	(sym+add)@tprel@h */
-+#define R_PPC64_TPREL16_HA	72 /* half16	(sym+add)@tprel@ha */
-+#define R_PPC64_TPREL64		73 /* doubleword64 (sym+add)@tprel */
-+#define R_PPC64_DTPREL16	74 /* half16*	(sym+add)@dtprel */
-+#define R_PPC64_DTPREL16_LO	75 /* half16	(sym+add)@dtprel@l */
-+#define R_PPC64_DTPREL16_HI	76 /* half16	(sym+add)@dtprel@h */
-+#define R_PPC64_DTPREL16_HA	77 /* half16	(sym+add)@dtprel@ha */
-+#define R_PPC64_DTPREL64	78 /* doubleword64 (sym+add)@dtprel */
-+#define R_PPC64_GOT_TLSGD16	79 /* half16*	(sym+add)@got@tlsgd */
-+#define R_PPC64_GOT_TLSGD16_LO	80 /* half16	(sym+add)@got@tlsgd@l */
-+#define R_PPC64_GOT_TLSGD16_HI	81 /* half16	(sym+add)@got@tlsgd@h */
-+#define R_PPC64_GOT_TLSGD16_HA	82 /* half16	(sym+add)@got@tlsgd@ha */
-+#define R_PPC64_GOT_TLSLD16	83 /* half16*	(sym+add)@got@tlsld */
-+#define R_PPC64_GOT_TLSLD16_LO	84 /* half16	(sym+add)@got@tlsld@l */
-+#define R_PPC64_GOT_TLSLD16_HI	85 /* half16	(sym+add)@got@tlsld@h */
-+#define R_PPC64_GOT_TLSLD16_HA	86 /* half16	(sym+add)@got@tlsld@ha */
-+#define R_PPC64_GOT_TPREL16_DS	87 /* half16ds*	(sym+add)@got@tprel */
-+#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
-+#define R_PPC64_GOT_TPREL16_HI	89 /* half16	(sym+add)@got@tprel@h */
-+#define R_PPC64_GOT_TPREL16_HA	90 /* half16	(sym+add)@got@tprel@ha */
-+#define R_PPC64_GOT_DTPREL16_DS	91 /* half16ds*	(sym+add)@got@dtprel */
-+#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
-+#define R_PPC64_GOT_DTPREL16_HI	93 /* half16	(sym+add)@got@dtprel@h */
-+#define R_PPC64_GOT_DTPREL16_HA	94 /* half16	(sym+add)@got@dtprel@ha */
-+#define R_PPC64_TPREL16_DS	95 /* half16ds*	(sym+add)@tprel */
-+#define R_PPC64_TPREL16_LO_DS	96 /* half16ds	(sym+add)@tprel@l */
-+#define R_PPC64_TPREL16_HIGHER	97 /* half16	(sym+add)@tprel@higher */
-+#define R_PPC64_TPREL16_HIGHERA	98 /* half16	(sym+add)@tprel@highera */
-+#define R_PPC64_TPREL16_HIGHEST	99 /* half16	(sym+add)@tprel@highest */
-+#define R_PPC64_TPREL16_HIGHESTA 100 /* half16	(sym+add)@tprel@highesta */
-+#define R_PPC64_DTPREL16_DS	101 /* half16ds* (sym+add)@dtprel */
-+#define R_PPC64_DTPREL16_LO_DS	102 /* half16ds	(sym+add)@dtprel@l */
-+#define R_PPC64_DTPREL16_HIGHER	103 /* half16	(sym+add)@dtprel@higher */
-+#define R_PPC64_DTPREL16_HIGHERA 104 /* half16	(sym+add)@dtprel@highera */
-+#define R_PPC64_DTPREL16_HIGHEST 105 /* half16	(sym+add)@dtprel@highest */
-+#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16	(sym+add)@dtprel@highesta */
-+
-+/* Keep this the last entry.  */
-+#define R_PPC64_NUM		107
-+
-+/* PowerPC64 specific values for the Dyn d_tag field.  */
-+#define DT_PPC64_GLINK  (DT_LOPROC + 0)
-+#define DT_PPC64_NUM    1
-+
-+
-+/* ARM specific declarations */
-+
-+/* Processor specific flags for the ELF header e_flags field.  */
-+#define EF_ARM_RELEXEC     0x01
-+#define EF_ARM_HASENTRY    0x02
-+#define EF_ARM_INTERWORK   0x04
-+#define EF_ARM_APCS_26     0x08
-+#define EF_ARM_APCS_FLOAT  0x10
-+#define EF_ARM_PIC         0x20
-+#define EF_ARM_ALIGN8      0x40		/* 8-bit structure alignment is in use */
-+#define EF_ARM_NEW_ABI     0x80
-+#define EF_ARM_OLD_ABI     0x100
-+
-+/* Other constants defined in the ARM ELF spec. version B-01.  */
-+/* NB. These conflict with values defined above.  */
-+#define EF_ARM_SYMSARESORTED	0x04
-+#define EF_ARM_DYNSYMSUSESEGIDX 0x08
-+#define EF_ARM_MAPSYMSFIRST	0x10
-+#define EF_ARM_EABIMASK		0XFF000000
-+
-+#define EF_ARM_EABI_VERSION(flags) ((flags) & EF_ARM_EABIMASK)
-+#define EF_ARM_EABI_UNKNOWN  0x00000000
-+#define EF_ARM_EABI_VER1     0x01000000
-+#define EF_ARM_EABI_VER2     0x02000000
-+
-+/* Additional symbol types for Thumb */
-+#define STT_ARM_TFUNC      0xd
-+
-+/* ARM-specific values for sh_flags */
-+#define SHF_ARM_ENTRYSECT  0x10000000   /* Section contains an entry point */
-+#define SHF_ARM_COMDEF     0x80000000   /* Section may be multiply defined
-+					   in the input to a link step */
-+
-+/* ARM-specific program header flags */
-+#define PF_ARM_SB          0x10000000   /* Segment contains the location
-+					   addressed by the static base */
-+
-+/* ARM relocs.  */
-+#define R_ARM_NONE		0	/* No reloc */
-+#define R_ARM_PC24		1	/* PC relative 26 bit branch */
-+#define R_ARM_ABS32		2	/* Direct 32 bit  */
-+#define R_ARM_REL32		3	/* PC relative 32 bit */
-+#define R_ARM_PC13		4
-+#define R_ARM_ABS16		5	/* Direct 16 bit */
-+#define R_ARM_ABS12		6	/* Direct 12 bit */
-+#define R_ARM_THM_ABS5		7
-+#define R_ARM_ABS8		8	/* Direct 8 bit */
-+#define R_ARM_SBREL32		9
-+#define R_ARM_THM_PC22		10
-+#define R_ARM_THM_PC8		11
-+#define R_ARM_AMP_VCALL9	12
-+#define R_ARM_SWI24		13
-+#define R_ARM_THM_SWI8		14
-+#define R_ARM_XPC25		15
-+#define R_ARM_THM_XPC22		16
-+#define R_ARM_COPY		20	/* Copy symbol at runtime */
-+#define R_ARM_GLOB_DAT		21	/* Create GOT entry */
-+#define R_ARM_JUMP_SLOT		22	/* Create PLT entry */
-+#define R_ARM_RELATIVE		23	/* Adjust by program base */
-+#define R_ARM_GOTOFF		24	/* 32 bit offset to GOT */
-+#define R_ARM_GOTPC		25	/* 32 bit PC relative offset to GOT */
-+#define R_ARM_GOT32		26	/* 32 bit GOT entry */
-+#define R_ARM_PLT32		27	/* 32 bit PLT address */
-+#define R_ARM_ALU_PCREL_7_0	32
-+#define R_ARM_ALU_PCREL_15_8	33
-+#define R_ARM_ALU_PCREL_23_15	34
-+#define R_ARM_LDR_SBREL_11_0	35
-+#define R_ARM_ALU_SBREL_19_12	36
-+#define R_ARM_ALU_SBREL_27_20	37
-+#define R_ARM_GNU_VTENTRY	100
-+#define R_ARM_GNU_VTINHERIT	101
-+#define R_ARM_THM_PC11		102	/* thumb unconditional branch */
-+#define R_ARM_THM_PC9		103	/* thumb conditional branch */
-+#define R_ARM_RXPC25		249
-+#define R_ARM_RSBREL32		250
-+#define R_ARM_THM_RPC22		251
-+#define R_ARM_RREL32		252
-+#define R_ARM_RABS22		253
-+#define R_ARM_RPC24		254
-+#define R_ARM_RBASE		255
-+/* Keep this the last entry.  */
-+#define R_ARM_NUM		256
-+
-+/* IA-64 specific declarations.  */
-+
-+/* Processor specific flags for the Ehdr e_flags field.  */
-+#define EF_IA_64_MASKOS		0x0000000f	/* os-specific flags */
-+#define EF_IA_64_ABI64		0x00000010	/* 64-bit ABI */
-+#define EF_IA_64_ARCH		0xff000000	/* arch. version mask */
-+
-+/* Processor specific values for the Phdr p_type field.  */
-+#define PT_IA_64_ARCHEXT	(PT_LOPROC + 0)	/* arch extension bits */
-+#define PT_IA_64_UNWIND		(PT_LOPROC + 1)	/* ia64 unwind bits */
-+
-+/* Processor specific flags for the Phdr p_flags field.  */
-+#define PF_IA_64_NORECOV	0x80000000	/* spec insns w/o recovery */
-+
-+/* Processor specific values for the Shdr sh_type field.  */
-+#define SHT_IA_64_EXT		(SHT_LOPROC + 0) /* extension bits */
-+#define SHT_IA_64_UNWIND	(SHT_LOPROC + 1) /* unwind bits */
-+
-+/* Processor specific flags for the Shdr sh_flags field.  */
-+#define SHF_IA_64_SHORT		0x10000000	/* section near gp */
-+#define SHF_IA_64_NORECOV	0x20000000	/* spec insns w/o recovery */
-+
-+/* Processor specific values for the Dyn d_tag field.  */
-+#define DT_IA_64_PLT_RESERVE	(DT_LOPROC + 0)
-+#define DT_IA_64_NUM		1
-+
-+/* IA-64 relocations.  */
-+#define R_IA64_NONE		0x00	/* none */
-+#define R_IA64_IMM14		0x21	/* symbol + addend, add imm14 */
-+#define R_IA64_IMM22		0x22	/* symbol + addend, add imm22 */
-+#define R_IA64_IMM64		0x23	/* symbol + addend, mov imm64 */
-+#define R_IA64_DIR32MSB		0x24	/* symbol + addend, data4 MSB */
-+#define R_IA64_DIR32LSB		0x25	/* symbol + addend, data4 LSB */
-+#define R_IA64_DIR64MSB		0x26	/* symbol + addend, data8 MSB */
-+#define R_IA64_DIR64LSB		0x27	/* symbol + addend, data8 LSB */
-+#define R_IA64_GPREL22		0x2a	/* @gprel(sym + add), add imm22 */
-+#define R_IA64_GPREL64I		0x2b	/* @gprel(sym + add), mov imm64 */
-+#define R_IA64_GPREL32MSB	0x2c	/* @gprel(sym + add), data4 MSB */
-+#define R_IA64_GPREL32LSB	0x2d	/* @gprel(sym + add), data4 LSB */
-+#define R_IA64_GPREL64MSB	0x2e	/* @gprel(sym + add), data8 MSB */
-+#define R_IA64_GPREL64LSB	0x2f	/* @gprel(sym + add), data8 LSB */
-+#define R_IA64_LTOFF22		0x32	/* @ltoff(sym + add), add imm22 */
-+#define R_IA64_LTOFF64I		0x33	/* @ltoff(sym + add), mov imm64 */
-+#define R_IA64_PLTOFF22		0x3a	/* @pltoff(sym + add), add imm22 */
-+#define R_IA64_PLTOFF64I	0x3b	/* @pltoff(sym + add), mov imm64 */
-+#define R_IA64_PLTOFF64MSB	0x3e	/* @pltoff(sym + add), data8 MSB */
-+#define R_IA64_PLTOFF64LSB	0x3f	/* @pltoff(sym + add), data8 LSB */
-+#define R_IA64_FPTR64I		0x43	/* @fptr(sym + add), mov imm64 */
-+#define R_IA64_FPTR32MSB	0x44	/* @fptr(sym + add), data4 MSB */
-+#define R_IA64_FPTR32LSB	0x45	/* @fptr(sym + add), data4 LSB */
-+#define R_IA64_FPTR64MSB	0x46	/* @fptr(sym + add), data8 MSB */
-+#define R_IA64_FPTR64LSB	0x47	/* @fptr(sym + add), data8 LSB */
-+#define R_IA64_PCREL60B		0x48	/* @pcrel(sym + add), brl */
-+#define R_IA64_PCREL21B		0x49	/* @pcrel(sym + add), ptb, call */
-+#define R_IA64_PCREL21M		0x4a	/* @pcrel(sym + add), chk.s */
-+#define R_IA64_PCREL21F		0x4b	/* @pcrel(sym + add), fchkf */
-+#define R_IA64_PCREL32MSB	0x4c	/* @pcrel(sym + add), data4 MSB */
-+#define R_IA64_PCREL32LSB	0x4d	/* @pcrel(sym + add), data4 LSB */
-+#define R_IA64_PCREL64MSB	0x4e	/* @pcrel(sym + add), data8 MSB */
-+#define R_IA64_PCREL64LSB	0x4f	/* @pcrel(sym + add), data8 LSB */
-+#define R_IA64_LTOFF_FPTR22	0x52	/* @ltoff(@fptr(s+a)), imm22 */
-+#define R_IA64_LTOFF_FPTR64I	0x53	/* @ltoff(@fptr(s+a)), imm64 */
-+#define R_IA64_LTOFF_FPTR32MSB	0x54	/* @ltoff(@fptr(s+a)), data4 MSB */
-+#define R_IA64_LTOFF_FPTR32LSB	0x55	/* @ltoff(@fptr(s+a)), data4 LSB */
-+#define R_IA64_LTOFF_FPTR64MSB	0x56	/* @ltoff(@fptr(s+a)), data8 MSB */
-+#define R_IA64_LTOFF_FPTR64LSB	0x57	/* @ltoff(@fptr(s+a)), data8 LSB */
-+#define R_IA64_SEGREL32MSB	0x5c	/* @segrel(sym + add), data4 MSB */
-+#define R_IA64_SEGREL32LSB	0x5d	/* @segrel(sym + add), data4 LSB */
-+#define R_IA64_SEGREL64MSB	0x5e	/* @segrel(sym + add), data8 MSB */
-+#define R_IA64_SEGREL64LSB	0x5f	/* @segrel(sym + add), data8 LSB */
-+#define R_IA64_SECREL32MSB	0x64	/* @secrel(sym + add), data4 MSB */
-+#define R_IA64_SECREL32LSB	0x65	/* @secrel(sym + add), data4 LSB */
-+#define R_IA64_SECREL64MSB	0x66	/* @secrel(sym + add), data8 MSB */
-+#define R_IA64_SECREL64LSB	0x67	/* @secrel(sym + add), data8 LSB */
-+#define R_IA64_REL32MSB		0x6c	/* data 4 + REL */
-+#define R_IA64_REL32LSB		0x6d	/* data 4 + REL */
-+#define R_IA64_REL64MSB		0x6e	/* data 8 + REL */
-+#define R_IA64_REL64LSB		0x6f	/* data 8 + REL */
-+#define R_IA64_LTV32MSB		0x74	/* symbol + addend, data4 MSB */
-+#define R_IA64_LTV32LSB		0x75	/* symbol + addend, data4 LSB */
-+#define R_IA64_LTV64MSB		0x76	/* symbol + addend, data8 MSB */
-+#define R_IA64_LTV64LSB		0x77	/* symbol + addend, data8 LSB */
-+#define R_IA64_PCREL21BI	0x79	/* @pcrel(sym + add), 21bit inst */
-+#define R_IA64_PCREL22		0x7a	/* @pcrel(sym + add), 22bit inst */
-+#define R_IA64_PCREL64I		0x7b	/* @pcrel(sym + add), 64bit inst */
-+#define R_IA64_IPLTMSB		0x80	/* dynamic reloc, imported PLT, MSB */
-+#define R_IA64_IPLTLSB		0x81	/* dynamic reloc, imported PLT, LSB */
-+#define R_IA64_COPY		0x84	/* copy relocation */
-+#define R_IA64_SUB		0x85	/* Addend and symbol difference */
-+#define R_IA64_LTOFF22X		0x86	/* LTOFF22, relaxable.  */
-+#define R_IA64_LDXMOV		0x87	/* Use of LTOFF22X.  */
-+#define R_IA64_TPREL14		0x91	/* @tprel(sym + add), imm14 */
-+#define R_IA64_TPREL22		0x92	/* @tprel(sym + add), imm22 */
-+#define R_IA64_TPREL64I		0x93	/* @tprel(sym + add), imm64 */
-+#define R_IA64_TPREL64MSB	0x96	/* @tprel(sym + add), data8 MSB */
-+#define R_IA64_TPREL64LSB	0x97	/* @tprel(sym + add), data8 LSB */
-+#define R_IA64_LTOFF_TPREL22	0x9a	/* @ltoff(@tprel(s+a)), imm2 */
-+#define R_IA64_DTPMOD64MSB	0xa6	/* @dtpmod(sym + add), data8 MSB */
-+#define R_IA64_DTPMOD64LSB	0xa7	/* @dtpmod(sym + add), data8 LSB */
-+#define R_IA64_LTOFF_DTPMOD22	0xaa	/* @ltoff(@dtpmod(sym + add)), imm22 */
-+#define R_IA64_DTPREL14		0xb1	/* @dtprel(sym + add), imm14 */
-+#define R_IA64_DTPREL22		0xb2	/* @dtprel(sym + add), imm22 */
-+#define R_IA64_DTPREL64I	0xb3	/* @dtprel(sym + add), imm64 */
-+#define R_IA64_DTPREL32MSB	0xb4	/* @dtprel(sym + add), data4 MSB */
-+#define R_IA64_DTPREL32LSB	0xb5	/* @dtprel(sym + add), data4 LSB */
-+#define R_IA64_DTPREL64MSB	0xb6	/* @dtprel(sym + add), data8 MSB */
-+#define R_IA64_DTPREL64LSB	0xb7	/* @dtprel(sym + add), data8 LSB */
-+#define R_IA64_LTOFF_DTPREL22	0xba	/* @ltoff(@dtprel(s+a)), imm22 */
-+
-+/* SH specific declarations */
-+
-+/* SH relocs.  */
-+#define	R_SH_NONE		0
-+#define	R_SH_DIR32		1
-+#define	R_SH_REL32		2
-+#define	R_SH_DIR8WPN		3
-+#define	R_SH_IND12W		4
-+#define	R_SH_DIR8WPL		5
-+#define	R_SH_DIR8WPZ		6
-+#define	R_SH_DIR8BP		7
-+#define	R_SH_DIR8W		8
-+#define	R_SH_DIR8L		9
-+#define	R_SH_SWITCH16		25
-+#define	R_SH_SWITCH32		26
-+#define	R_SH_USES		27
-+#define	R_SH_COUNT		28
-+#define	R_SH_ALIGN		29
-+#define	R_SH_CODE		30
-+#define	R_SH_DATA		31
-+#define	R_SH_LABEL		32
-+#define	R_SH_SWITCH8		33
-+#define	R_SH_GNU_VTINHERIT	34
-+#define	R_SH_GNU_VTENTRY	35
-+#define	R_SH_TLS_GD_32		144
-+#define	R_SH_TLS_LD_32		145
-+#define	R_SH_TLS_LDO_32		146
-+#define	R_SH_TLS_IE_32		147
-+#define	R_SH_TLS_LE_32		148
-+#define	R_SH_TLS_DTPMOD32	149
-+#define	R_SH_TLS_DTPOFF32	150
-+#define	R_SH_TLS_TPOFF32	151
-+#define	R_SH_GOT32		160
-+#define	R_SH_PLT32		161
-+#define	R_SH_COPY		162
-+#define	R_SH_GLOB_DAT		163
-+#define	R_SH_JMP_SLOT		164
-+#define	R_SH_RELATIVE		165
-+#define	R_SH_GOTOFF		166
-+#define	R_SH_GOTPC		167
-+/* Keep this the last entry.  */
-+#define	R_SH_NUM		256
-+
-+/* Additional s390 relocs */
-+
-+#define R_390_NONE		0	/* No reloc.  */
-+#define R_390_8			1	/* Direct 8 bit.  */
-+#define R_390_12		2	/* Direct 12 bit.  */
-+#define R_390_16		3	/* Direct 16 bit.  */
-+#define R_390_32		4	/* Direct 32 bit.  */
-+#define R_390_PC32		5	/* PC relative 32 bit.	*/
-+#define R_390_GOT12		6	/* 12 bit GOT offset.  */
-+#define R_390_GOT32		7	/* 32 bit GOT offset.  */
-+#define R_390_PLT32		8	/* 32 bit PC relative PLT address.  */
-+#define R_390_COPY		9	/* Copy symbol at runtime.  */
-+#define R_390_GLOB_DAT		10	/* Create GOT entry.  */
-+#define R_390_JMP_SLOT		11	/* Create PLT entry.  */
-+#define R_390_RELATIVE		12	/* Adjust by program base.  */
-+#define R_390_GOTOFF32		13	/* 32 bit offset to GOT.	 */
-+#define R_390_GOTPC		14	/* 32 bit PC relative offset to GOT.  */
-+#define R_390_GOT16		15	/* 16 bit GOT offset.  */
-+#define R_390_PC16		16	/* PC relative 16 bit.	*/
-+#define R_390_PC16DBL		17	/* PC relative 16 bit shifted by 1.  */
-+#define R_390_PLT16DBL		18	/* 16 bit PC rel. PLT shifted by 1.  */
-+#define R_390_PC32DBL		19	/* PC relative 32 bit shifted by 1.  */
-+#define R_390_PLT32DBL		20	/* 32 bit PC rel. PLT shifted by 1.  */
-+#define R_390_GOTPCDBL		21	/* 32 bit PC rel. GOT shifted by 1.  */
-+#define R_390_64		22	/* Direct 64 bit.  */
-+#define R_390_PC64		23	/* PC relative 64 bit.	*/
-+#define R_390_GOT64		24	/* 64 bit GOT offset.  */
-+#define R_390_PLT64		25	/* 64 bit PC relative PLT address.  */
-+#define R_390_GOTENT		26	/* 32 bit PC rel. to GOT entry >> 1. */
-+#define R_390_GOTOFF16		27	/* 16 bit offset to GOT. */
-+#define R_390_GOTOFF64		28	/* 64 bit offset to GOT. */
-+#define R_390_GOTPLT12		29	/* 12 bit offset to jump slot.	*/
-+#define R_390_GOTPLT16		30	/* 16 bit offset to jump slot.	*/
-+#define R_390_GOTPLT32		31	/* 32 bit offset to jump slot.	*/
-+#define R_390_GOTPLT64		32	/* 64 bit offset to jump slot.	*/
-+#define R_390_GOTPLTENT		33	/* 32 bit rel. offset to jump slot.  */
-+#define R_390_PLTOFF16		34	/* 16 bit offset from GOT to PLT. */
-+#define R_390_PLTOFF32		35	/* 32 bit offset from GOT to PLT. */
-+#define R_390_PLTOFF64		36	/* 16 bit offset from GOT to PLT. */
-+#define R_390_TLS_LOAD		37	/* Tag for load insn in TLS code.  */
-+#define R_390_TLS_GDCALL	38	/* Tag for function call in general
-+					   dynamic TLS code. */
-+#define R_390_TLS_LDCALL	39	/* Tag for function call in local
-+					   dynamic TLS code. */
-+#define R_390_TLS_GD32		40	/* Direct 32 bit for general dynamic
-+					   thread local data.  */
-+#define R_390_TLS_GD64		41	/* Direct 64 bit for general dynamic
-+					  thread local data.  */
-+#define R_390_TLS_GOTIE12	42	/* 12 bit GOT offset for static TLS
-+					   block offset.  */
-+#define R_390_TLS_GOTIE32	43	/* 32 bit GOT offset for static TLS
-+					   block offset.  */
-+#define R_390_TLS_GOTIE64	44	/* 64 bit GOT offset for static TLS
-+					   block offset. */
-+#define R_390_TLS_LDM32		45	/* Direct 32 bit for local dynamic
-+					   thread local data in LE code.  */
-+#define R_390_TLS_LDM64		46	/* Direct 64 bit for local dynamic
-+					   thread local data in LE code.  */
-+#define R_390_TLS_IE32		47	/* 32 bit address of GOT entry for
-+					   negated static TLS block offset.  */
-+#define R_390_TLS_IE64		48	/* 64 bit address of GOT entry for
-+					   negated static TLS block offset.  */
-+#define R_390_TLS_IEENT		49	/* 32 bit rel. offset to GOT entry for
-+					   negated static TLS block offset.  */
-+#define R_390_TLS_LE32		50	/* 32 bit negated offset relative to
-+					   static TLS block.  */
-+#define R_390_TLS_LE64		51	/* 64 bit negated offset relative to
-+					   static TLS block.  */
-+#define R_390_TLS_LDO32		52	/* 32 bit offset relative to TLS
-+					   block.  */
-+#define R_390_TLS_LDO64		53	/* 64 bit offset relative to TLS
-+					   block.  */
-+#define R_390_TLS_DTPMOD	54	/* ID of module containing symbol.  */
-+#define R_390_TLS_DTPOFF	55	/* Offset in TLS block.	 */
-+#define R_390_TLS_TPOFF		56	/* Negated offset in static TLS
-+					   block.  */
-+
-+/* Keep this the last entry.  */
-+#define R_390_NUM		57
-+
-+/* CRIS relocations.  */
-+#define R_CRIS_NONE		0
-+#define R_CRIS_8		1
-+#define R_CRIS_16		2
-+#define R_CRIS_32		3
-+#define R_CRIS_8_PCREL		4
-+#define R_CRIS_16_PCREL		5
-+#define R_CRIS_32_PCREL		6
-+#define R_CRIS_GNU_VTINHERIT	7
-+#define R_CRIS_GNU_VTENTRY	8
-+#define R_CRIS_COPY		9
-+#define R_CRIS_GLOB_DAT		10
-+#define R_CRIS_JUMP_SLOT	11
-+#define R_CRIS_RELATIVE		12
-+#define R_CRIS_16_GOT		13
-+#define R_CRIS_32_GOT		14
-+#define R_CRIS_16_GOTPLT	15
-+#define R_CRIS_32_GOTPLT	16
-+#define R_CRIS_32_GOTREL	17
-+#define R_CRIS_32_PLT_GOTREL	18
-+#define R_CRIS_32_PLT_PCREL	19
-+
-+#define R_CRIS_NUM		20
-+
-+/* AMD x86-64 relocations.  */
-+#define R_X86_64_NONE		0	/* No reloc */
-+#define R_X86_64_64		1	/* Direct 64 bit  */
-+#define R_X86_64_PC32		2	/* PC relative 32 bit signed */
-+#define R_X86_64_GOT32		3	/* 32 bit GOT entry */
-+#define R_X86_64_PLT32		4	/* 32 bit PLT address */
-+#define R_X86_64_COPY		5	/* Copy symbol at runtime */
-+#define R_X86_64_GLOB_DAT	6	/* Create GOT entry */
-+#define R_X86_64_JUMP_SLOT	7	/* Create PLT entry */
-+#define R_X86_64_RELATIVE	8	/* Adjust by program base */
-+#define R_X86_64_GOTPCREL	9	/* 32 bit signed PC relative
-+					   offset to GOT */
-+#define R_X86_64_32		10	/* Direct 32 bit zero extended */
-+#define R_X86_64_32S		11	/* Direct 32 bit sign extended */
-+#define R_X86_64_16		12	/* Direct 16 bit zero extended */
-+#define R_X86_64_PC16		13	/* 16 bit sign extended pc relative */
-+#define R_X86_64_8		14	/* Direct 8 bit sign extended  */
-+#define R_X86_64_PC8		15	/* 8 bit sign extended pc relative */
-+#define R_X86_64_DTPMOD64	16	/* ID of module containing symbol */
-+#define R_X86_64_DTPOFF64	17	/* Offset in module's TLS block */
-+#define R_X86_64_TPOFF64	18	/* Offset in initial TLS block */
-+#define R_X86_64_TLSGD		19	/* 32 bit signed PC relative offset
-+					   to two GOT entries for GD symbol */
-+#define R_X86_64_TLSLD		20	/* 32 bit signed PC relative offset
-+					   to two GOT entries for LD symbol */
-+#define R_X86_64_DTPOFF32	21	/* Offset in TLS block */
-+#define R_X86_64_GOTTPOFF	22	/* 32 bit signed PC relative offset
-+					   to GOT entry for IE symbol */
-+#define R_X86_64_TPOFF32	23	/* Offset in initial TLS block */
-+
-+#define R_X86_64_NUM		24
-+
-+__END_DECLS
-+
-+#endif	/* elf.h */
- 
- #include "elfconfig.h"
- 
-@@ -195,3 +2641,4 @@
- void fatal(const char *fmt, ...);
- void warn(const char *fmt, ...);
- void merror(const char *fmt, ...);
-+
-diff -Nur linux-2.6.36.orig/scripts/mod/sumversion.c linux-2.6.36/scripts/mod/sumversion.c
---- linux-2.6.36.orig/scripts/mod/sumversion.c	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/scripts/mod/sumversion.c	2010-11-28 18:33:24.000000000 +0100
-@@ -1,4 +1,4 @@
--#include <netinet/in.h>
-+/* #include <netinet/in.h> */
- #ifdef __sun__
- #include <inttypes.h>
- #else
diff --git a/target/linux/patches/3.2.20/cris-etrax.patch b/target/linux/patches/3.2.20/cris-etrax.patch
deleted file mode 100644
index a80d9a8b8..000000000
--- a/target/linux/patches/3.2.20/cris-etrax.patch
+++ /dev/null
@@ -1,12 +0,0 @@
-diff -Nur linux-2.6.39.orig/arch/cris/arch-v32/drivers/i2c.h linux-2.6.39/arch/cris/arch-v32/drivers/i2c.h
---- linux-2.6.39.orig/arch/cris/arch-v32/drivers/i2c.h	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/arch/cris/arch-v32/drivers/i2c.h	2011-08-24 19:15:05.000000000 +0200
-@@ -2,7 +2,7 @@
- #include <linux/init.h>
- 
- /* High level I2C actions */
--int __init i2c_init(void);
-+static int __init i2c_init(void);
- int i2c_write(unsigned char theSlave, void *data, size_t nbytes);
- int i2c_read(unsigned char theSlave, void *data, size_t nbytes);
- int i2c_writereg(unsigned char theSlave, unsigned char theReg, unsigned char theValue);
diff --git a/target/linux/patches/3.2.20/defaults.patch b/target/linux/patches/3.2.20/defaults.patch
deleted file mode 100644
index 58aae610b..000000000
--- a/target/linux/patches/3.2.20/defaults.patch
+++ /dev/null
@@ -1,22 +0,0 @@
-diff -Nur linux-3.0.4.orig/fs/Kconfig linux-3.0.4/fs/Kconfig
---- linux-3.0.4.orig/fs/Kconfig	2011-08-29 22:56:30.000000000 +0200
-+++ linux-3.0.4/fs/Kconfig	2011-10-15 22:08:44.000000000 +0200
-@@ -47,7 +47,7 @@
- 	def_bool n
- 
- config EXPORTFS
--	tristate
-+	def_bool y
- 
- config FILE_LOCKING
- 	bool "Enable POSIX file locking API" if EXPERT
-diff -Nur linux-3.0.4.orig/fs/notify/Kconfig linux-3.0.4/fs/notify/Kconfig
---- linux-3.0.4.orig/fs/notify/Kconfig	2011-08-29 22:56:30.000000000 +0200
-+++ linux-3.0.4/fs/notify/Kconfig	2011-10-15 22:02:00.000000000 +0200
-@@ -1,5 +1,5 @@
- config FSNOTIFY
--	def_bool n
-+	def_bool y
- 
- source "fs/notify/dnotify/Kconfig"
- source "fs/notify/inotify/Kconfig"
diff --git a/target/linux/patches/3.2.20/gemalto.patch b/target/linux/patches/3.2.20/gemalto.patch
deleted file mode 100644
index f3c223b5e..000000000
--- a/target/linux/patches/3.2.20/gemalto.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.36.orig/drivers/tty/serial/serial_cs.c linux-2.6.36/drivers/serial/serial_cs.c
---- linux-2.6.36.orig/drivers/tty/serial/serial_cs.c	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/drivers/tty/serial/serial_cs.c	2010-12-13 23:03:40.000000000 +0100
-@@ -794,6 +794,7 @@
- 	PCMCIA_DEVICE_MANF_CARD(0x0137, 0x0025),
- 	PCMCIA_DEVICE_MANF_CARD(0x0137, 0x0045),
- 	PCMCIA_DEVICE_MANF_CARD(0x0137, 0x0052),
-+	PCMCIA_DEVICE_MANF_CARD(0x0157, 0x0100), /* Gemalto SCR */
- 	PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0006), /* Psion 56K+Fax */
- 	PCMCIA_DEVICE_MANF_CARD(0x0200, 0x0001), /* MultiMobile */
- 	PCMCIA_DEVICE_PROD_ID134("ADV", "TECH", "COMpad-32/85", 0x67459937, 0x916d02ba, 0x8fbe92ae),
diff --git a/target/linux/patches/3.2.20/mmc-host.patch b/target/linux/patches/3.2.20/mmc-host.patch
deleted file mode 100644
index 3d0e37add..000000000
--- a/target/linux/patches/3.2.20/mmc-host.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-diff -Nur linux-2.6.39-rc6.orig/drivers/mmc/host/Kconfig linux-2.6.39-rc6/drivers/mmc/host/Kconfig
---- linux-2.6.39-rc6.orig/drivers/mmc/host/Kconfig	2011-05-04 04:59:13.000000000 +0200
-+++ linux-2.6.39-rc6/drivers/mmc/host/Kconfig	2011-05-10 23:39:01.000000000 +0200
-@@ -253,13 +253,6 @@
- 
- 	  If unsure, say N.
- 
--choice
--	prompt "Atmel SD/MMC Driver"
--	depends on AVR32 || ARCH_AT91
--	default MMC_ATMELMCI if AVR32
--	help
--	  Choose which driver to use for the Atmel MCI Silicon
--
- config MMC_AT91
- 	tristate "AT91 SD/MMC Card Interface support"
- 	depends on ARCH_AT91
-@@ -268,18 +261,6 @@
- 
- 	  If unsure, say N.
- 
--config MMC_ATMELMCI
--	tristate "Atmel Multimedia Card Interface support"
--	depends on AVR32 || ARCH_AT91
--	help
--	  This selects the Atmel Multimedia Card Interface driver. If
--	  you have an AT32 (AVR32) or AT91 platform with a Multimedia
--	  Card slot, say Y or M here.
--
--	  If unsure, say N.
--
--endchoice
--
- config MMC_ATMELMCI_DMA
- 	bool "Atmel MCI DMA support (EXPERIMENTAL)"
- 	depends on MMC_ATMELMCI && (AVR32 || ARCH_AT91SAM9G45) && DMA_ENGINE && EXPERIMENTAL
diff --git a/target/linux/patches/3.2.20/non-static.patch b/target/linux/patches/3.2.20/non-static.patch
deleted file mode 100644
index a967703d0..000000000
--- a/target/linux/patches/3.2.20/non-static.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-diff -Nur linux-2.6.39-rc6.orig/fs/namei.c linux-2.6.39-rc6/fs/namei.c
---- linux-2.6.39-rc6.orig/fs/namei.c	2011-05-04 04:59:13.000000000 +0200
-+++ linux-2.6.39-rc6/fs/namei.c	2011-05-05 11:30:14.000000000 +0200
-@@ -1769,7 +1769,7 @@
-  * needs parent already locked. Doesn't follow mounts.
-  * SMP-safe.
-  */
--static struct dentry *lookup_hash(struct nameidata *nd)
-+struct dentry *lookup_hash(struct nameidata *nd)
- {
- 	return __lookup_hash(&nd->last, nd->path.dentry, nd);
- }
-diff -Nur linux-2.6.39-rc6.orig/fs/splice.c linux-2.6.39-rc6/fs/splice.c
---- linux-2.6.39-rc6.orig/fs/splice.c	2011-05-04 04:59:13.000000000 +0200
-+++ linux-2.6.39-rc6/fs/splice.c	2011-05-05 11:31:04.000000000 +0200
-@@ -1081,7 +1081,7 @@
- /*
-  * Attempt to initiate a splice from pipe to file.
-  */
--static long do_splice_from(struct pipe_inode_info *pipe, struct file *out,
-+long do_splice_from(struct pipe_inode_info *pipe, struct file *out,
- 			   loff_t *ppos, size_t len, unsigned int flags)
- {
- 	ssize_t (*splice_write)(struct pipe_inode_info *, struct file *,
-@@ -1109,7 +1109,7 @@
- /*
-  * Attempt to initiate a splice from a file to a pipe.
-  */
--static long do_splice_to(struct file *in, loff_t *ppos,
-+long do_splice_to(struct file *in, loff_t *ppos,
- 			 struct pipe_inode_info *pipe, size_t len,
- 			 unsigned int flags)
- {
diff --git a/target/linux/patches/3.2.20/sparc-include.patch b/target/linux/patches/3.2.20/sparc-include.patch
deleted file mode 100644
index 2f8ffd061..000000000
--- a/target/linux/patches/3.2.20/sparc-include.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.39-rc7.orig/arch/sparc/boot/btfixupprep.c linux-2.6.39-rc7/arch/sparc/boot/btfixupprep.c
---- linux-2.6.39-rc7.orig/arch/sparc/boot/btfixupprep.c	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/arch/sparc/boot/btfixupprep.c	2011-05-21 13:34:40.000000000 +0200
-@@ -25,7 +25,6 @@
- #include <errno.h>
- #include <unistd.h>
- #include <stdlib.h>
--#include <malloc.h>
- 
- #define MAXSYMS 1024
- 
diff --git a/target/linux/patches/3.2.20/startup.patch b/target/linux/patches/3.2.20/startup.patch
deleted file mode 100644
index 68e8987b0..000000000
--- a/target/linux/patches/3.2.20/startup.patch
+++ /dev/null
@@ -1,20 +0,0 @@
-diff -Nur linux-2.6.34.orig/init/main.c linux-2.6.34/init/main.c
---- linux-2.6.34.orig/init/main.c	2010-05-16 23:17:36.000000000 +0200
-+++ linux-2.6.34/init/main.c	2010-05-20 20:13:26.321613615 +0200
-@@ -842,6 +842,7 @@
- 		printk(KERN_WARNING "Failed to execute %s.  Attempting "
- 					"defaults...\n", execute_command);
- 	}
-+	run_init_process("/init");
- 	run_init_process("/sbin/init");
- 	run_init_process("/etc/init");
- 	run_init_process("/bin/init");
-@@ -889,6 +890,8 @@
- 	if (sys_open((const char __user *) "/dev/console", O_RDWR, 0) < 0)
- 		printk(KERN_WARNING "Warning: unable to open an initial console.\n");
- 
-+	printk(KERN_WARNING "Starting Linux (built with OpenADK).\n");
-+
- 	(void) sys_dup(0);
- 	(void) sys_dup(0);
- 	/*
diff --git a/target/linux/patches/3.2.20/usb-defaults-off.patch b/target/linux/patches/3.2.20/usb-defaults-off.patch
deleted file mode 100644
index 31367108a..000000000
--- a/target/linux/patches/3.2.20/usb-defaults-off.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-diff -Nur linux-2.6.37.orig//drivers/usb/core/Kconfig linux-2.6.37/drivers/usb/core/Kconfig
---- linux-2.6.37.orig//drivers/usb/core/Kconfig	2011-01-05 01:50:19.000000000 +0100
-+++ linux-2.6.37/drivers/usb/core/Kconfig	2011-04-12 19:04:23.000000000 +0200
-@@ -59,7 +59,7 @@
- config USB_DEVICE_CLASS
- 	bool "USB device class-devices (DEPRECATED)"
- 	depends on USB
--	default y
-+	default n
- 	---help---
- 	  Userspace access to USB devices is granted by device-nodes exported
- 	  directly from the usbdev in sysfs. Old versions of the driver
-diff -Nur linux-2.6.37.orig//drivers/usb/host/Kconfig linux-2.6.37/drivers/usb/host/Kconfig
---- linux-2.6.37.orig//drivers/usb/host/Kconfig	2011-01-05 01:50:19.000000000 +0100
-+++ linux-2.6.37/drivers/usb/host/Kconfig	2011-04-12 19:04:48.000000000 +0200
-@@ -62,6 +62,7 @@
- config USB_EHCI_ROOT_HUB_TT
- 	bool "Root Hub Transaction Translators"
- 	depends on USB_EHCI_HCD
-+	default n
- 	---help---
- 	  Some EHCI chips have vendor-specific extensions to integrate
- 	  transaction translators, so that no OHCI or UHCI companion
-@@ -74,7 +75,7 @@
- config USB_EHCI_TT_NEWSCHED
- 	bool "Improved Transaction Translator scheduling"
- 	depends on USB_EHCI_HCD
--	default y
-+	default n
- 	---help---
- 	  This changes the periodic scheduling code to fill more of the low
- 	  and full speed bandwidth available from the Transaction Translator
diff --git a/target/linux/patches/3.2.20/uuid.patch b/target/linux/patches/3.2.20/uuid.patch
deleted file mode 100644
index 2529fdab5..000000000
--- a/target/linux/patches/3.2.20/uuid.patch
+++ /dev/null
@@ -1,255 +0,0 @@
-diff -Nur linux-2.6.38.4.orig/block/genhd.c linux-2.6.38.4/block/genhd.c
---- linux-2.6.38.4.orig/block/genhd.c	2011-04-21 23:34:46.000000000 +0200
-+++ linux-2.6.38.4/block/genhd.c	2011-04-27 19:21:18.668912036 +0200
-@@ -34,7 +34,7 @@
- static DEFINE_MUTEX(ext_devt_mutex);
- static DEFINE_IDR(ext_devt_idr);
- 
--static struct device_type disk_type;
-+struct device_type disk_type;
- 
- static void disk_add_events(struct gendisk *disk);
- static void disk_del_events(struct gendisk *disk);
-@@ -1118,7 +1118,7 @@
- 	return NULL;
- }
- 
--static struct device_type disk_type = {
-+struct device_type disk_type = {
- 	.name		= "disk",
- 	.groups		= disk_attr_groups,
- 	.release	= disk_release,
-diff -Nur linux-2.6.38.4.orig/init/do_mounts.c linux-2.6.38.4/init/do_mounts.c
---- linux-2.6.38.4.orig/init/do_mounts.c	2011-04-21 23:34:46.000000000 +0200
-+++ linux-2.6.38.4/init/do_mounts.c	2011-04-27 19:26:52.721413000 +0200
-@@ -32,6 +32,132 @@
- 
- dev_t ROOT_DEV;
- 
-+#ifdef CONFIG_EXT2_FS
-+/* support for root=UUID=ce40d6b2-18eb-4a75-aefe-7ddb0995ce63 bootargs */
-+
-+#include <linux/ext2_fs.h>
-+
-+__u8 root_dev_uuid[16];
-+int root_dev_type;	/* 0 = normal (/dev/hda1, 0301); 1 = UUID; 3 = bad */
-+
-+/* imported from block/genhd.c after removing its static qualifier */
-+extern struct device_type disk_type;
-+
-+/* helper function */
-+static __u8 __init fromhex(char c)
-+{
-+	if (c >= '0' && c <= '9')
-+		return (c - '0');
-+	c &= ~32;
-+	if (c >= 'A' && c <= 'F')
-+		return (c - 'A' + 10);
-+	return (0xFF);
-+}
-+
-+static void __init parse_uuid(const char *s)
-+{
-+	int i;
-+	__u8 j, k;
-+
-+	if (strlen(s) != 36 || s[8] != '-' || s[13] != '-' ||
-+	    s[18] != '-' || s[23] != '-')
-+		goto bad_uuid;
-+	for (i = 0; i < 16; i++) {
-+		if (*s == '-')
-+			++s;
-+		j = fromhex(*s++);
-+		k = fromhex(*s++);
-+		if (j == 0xFF || k == 0xFF)
-+			goto bad_uuid;
-+		root_dev_uuid[i] = (j << 4) | k;
-+	}
-+	return;
-+ bad_uuid:
-+	/* we cannot panic here, defer */
-+	root_dev_type = 3;
-+}
-+
-+/* from drivers/md/md.c */
-+static void __init initcode_bi_complete(struct bio *bio, int error)
-+{
-+	complete((struct completion*)bio->bi_private);
-+}
-+
-+static int __init initcode_sync_page_read(struct block_device *bdev,
-+    sector_t sector, int size, struct page *page)
-+{
-+	struct bio *bio = bio_alloc(GFP_NOIO, 1);
-+	struct completion event;
-+	int ret, rw = READ;
-+
-+	rw |= REQ_SYNC;
-+
-+	bio->bi_bdev = bdev;
-+	bio->bi_sector = sector;
-+	bio_add_page(bio, page, size, 0);
-+	init_completion(&event);
-+	bio->bi_private = &event;
-+	bio->bi_end_io = initcode_bi_complete;
-+	submit_bio(rw, bio);
-+	wait_for_completion(&event);
-+
-+	ret = test_bit(BIO_UPTODATE, &bio->bi_flags);
-+	bio_put(bio);
-+	/* 0 = failure */
-+	return ret;
-+}
-+
-+/* most of this taken from fs/ext2/super.c */
-+static int __init check_dev(struct gendisk *thedisk, dev_t devt,
-+    int blocksize, struct page *page)
-+{
-+	struct ext2_super_block * es;
-+	struct block_device *bdev;
-+	unsigned long sb_block = 1;
-+	unsigned long logic_sb_block;
-+	unsigned long offset = 0;
-+	int rv = /* not found */ 0;
-+	char bff[22];
-+
-+	bdev = bdget(devt);
-+	if (blkdev_get(bdev, FMODE_READ, NULL)) {
-+		printk(KERN_ERR "VFS: opening block device %s failed!\n",
-+		    format_dev_t(bff, devt));
-+		return (0);
-+	}
-+
-+	if (blocksize != BLOCK_SIZE) {
-+		logic_sb_block = (sb_block*BLOCK_SIZE) / blocksize;
-+		offset = (sb_block*BLOCK_SIZE) % blocksize;
-+	} else {
-+		logic_sb_block = sb_block;
-+	}
-+
-+//	printk(KERN_ERR "D: attempting to read %d @%lu from "
-+//	    "bdev %p devt %08X %s\n", blocksize, logic_sb_block,
-+//	    bdev, devt, format_dev_t(bff, devt));
-+	if (!initcode_sync_page_read(bdev, logic_sb_block, blocksize, page)) {
-+//		printk(KERN_ERR "D: failed!\n");
-+		goto out;
-+	}
-+	es = (struct ext2_super_block *)(((char *)page_address(page)) + offset);
-+	if (le16_to_cpu(es->s_magic) == EXT2_SUPER_MAGIC) {
-+//		printk(KERN_ERR "D: has uuid "
-+//		    "%02X%02X%02X%02X-%02X%02X-%02X%02X-%02X%02X-%02X%02X%02X%02X%02X%02X\n",
-+//		    es->s_uuid[0], es->s_uuid[1], es->s_uuid[2], es->s_uuid[3],
-+//		    es->s_uuid[4], es->s_uuid[5], es->s_uuid[6], es->s_uuid[7],
-+//		    es->s_uuid[8], es->s_uuid[9], es->s_uuid[10], es->s_uuid[11],
-+//		    es->s_uuid[12], es->s_uuid[13], es->s_uuid[14], es->s_uuid[15]);
-+		if (!memcmp(es->s_uuid, root_dev_uuid, 16))
-+			rv = /* found */ 1;
-+	}
-+//	  else printk(KERN_ERR "D: bad ext2fs magic\n");
-+ out:
-+	blkdev_put(bdev, FMODE_READ);
-+	return (rv);
-+}
-+#endif /* CONFIG_EXT2_FS for UUID support */
-+
- static int __init load_ramdisk(char *str)
- {
- 	rd_doload = simple_strtol(str,NULL,0) & 3;
-@@ -218,6 +344,13 @@
- static int __init root_dev_setup(char *line)
- {
- 	strlcpy(saved_root_name, line, sizeof(saved_root_name));
-+#ifdef CONFIG_EXT2_FS
-+	root_dev_type = 0;
-+	if (!strncmp(line, "UUID=", 5)) {
-+		root_dev_type = 1;
-+		parse_uuid(line + 5);
-+	}
-+#endif /* CONFIG_EXT2_FS for UUID support */
- 	return 1;
- }
- 
-@@ -403,6 +536,83 @@
- 
- void __init mount_root(void)
- {
-+#ifdef CONFIG_EXT2_FS
-+	/* UUID support */
-+//	printk_all_partitions();
-+	if (root_dev_type == 1) {
-+		int blocksize;
-+
-+		/* from block/genhd.c printk_all_partitions */
-+		struct class_dev_iter iter;
-+		struct device *dev;
-+
-+		/* from drivers/md/md.c */
-+		struct page *sb_page;
-+
-+		if (!(sb_page = alloc_page(GFP_KERNEL))) {
-+			printk(KERN_ERR "VFS: no memory for bio page\n");
-+			goto nomemforbio;
-+		}
-+
-+//		printk(KERN_ERR "D: root is: "
-+//		    "%02X%02X%02X%02X-%02X%02X-%02X%02X-%02X%02X-%02X%02X%02X%02X%02X%02X\n",
-+//		    root_dev_uuid[0], root_dev_uuid[1], root_dev_uuid[2], root_dev_uuid[3],
-+//		    root_dev_uuid[4], root_dev_uuid[5], root_dev_uuid[6], root_dev_uuid[7],
-+//		    root_dev_uuid[8], root_dev_uuid[9], root_dev_uuid[10], root_dev_uuid[11],
-+//		    root_dev_uuid[12], root_dev_uuid[13], root_dev_uuid[14], root_dev_uuid[15]);
-+		/* from block/genhd.c printk_all_partitions */
-+//		printk(KERN_ERR "D: begin iter\n");
-+		class_dev_iter_init(&iter, &block_class, NULL, &disk_type);
-+		while (root_dev_type && (dev = class_dev_iter_next(&iter))) {
-+//			char bff[22];
-+			struct gendisk *disk = dev_to_disk(dev);
-+			struct disk_part_iter piter;
-+			struct hd_struct *part;
-+			if (get_capacity(disk) == 0 ||
-+			    (disk->flags & GENHD_FL_SUPPRESS_PARTITION_INFO)) {
-+//				printk(KERN_ERR "D: ignoring\n");
-+				continue;
-+			}
-+			blocksize = queue_logical_block_size(disk->queue);
-+//			printk(KERN_ERR "D: gendisk, blocksize %d "
-+//			    "name '%s' devt %08X %s #part %d\n", blocksize,
-+//			    disk->disk_name, dev->devt,
-+//			    format_dev_t(bff, dev->devt),
-+//			    disk_max_parts(disk));
-+			disk_part_iter_init(&piter, disk, DISK_PITER_INCL_PART0);
-+			while (root_dev_type && (part = disk_part_iter_next(&piter))) {
-+				/* avoid empty or too small partitions */
-+//				printk(KERN_ERR "D: part #%d start %llu "
-+//				    "nr %llu\n", part->partno,
-+//				    (__u64)part->start_sect,
-+//				    (__u64)part->nr_sects);
-+				if (part->nr_sects < 8)
-+					continue;
-+				if (check_dev(disk, MKDEV(MAJOR(dev->devt),
-+				    MINOR(dev->devt) + part->partno),
-+				    blocksize, sb_page)) {
-+					ROOT_DEV = part_devt(part);
-+//					printk(KERN_ERR "D: got match!\n");
-+					// comment out below for debugging
-+					root_dev_type = 0;
-+				}
-+			}
-+			disk_part_iter_exit(&piter);
-+		}
-+//		printk(KERN_ERR "D: end iter\n");
-+		class_dev_iter_exit(&iter);
-+		put_page(sb_page);
-+	}
-+ nomemforbio:
-+	if (root_dev_type == 1)
-+		printk(KERN_ERR "VFS: Unable to find root by UUID %s.\n",
-+		    saved_root_name + 5);
-+	else if (root_dev_type == 3)
-+		/* execute deferred panic from parse_uuid */
-+		panic("Badly formatted UUID %s was supplied as kernel "
-+		    "parameter root", saved_root_name + 5);
-+#endif /* CONFIG_EXT2_FS for UUID support */
-+
- #ifdef CONFIG_ROOT_NFS
- 	if (MAJOR(ROOT_DEV) == UNNAMED_MAJOR) {
- 		if (mount_nfs_root())
diff --git a/target/linux/patches/3.2.20/vga-cons-default-off.patch b/target/linux/patches/3.2.20/vga-cons-default-off.patch
deleted file mode 100644
index 178aeeeb9..000000000
--- a/target/linux/patches/3.2.20/vga-cons-default-off.patch
+++ /dev/null
@@ -1,12 +0,0 @@
-diff -Nur linux-2.6.37.orig//drivers/video/console/Kconfig linux-2.6.37/drivers/video/console/Kconfig
---- linux-2.6.37.orig//drivers/video/console/Kconfig	2011-01-05 01:50:19.000000000 +0100
-+++ linux-2.6.37/drivers/video/console/Kconfig	2011-04-12 16:29:34.000000000 +0200
-@@ -7,7 +7,7 @@
- config VGA_CONSOLE
- 	bool "VGA text console" if EMBEDDED || !X86
- 	depends on !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !SUPERH && !BLACKFIN && !AVR32 && !MN10300 && (!ARM || ARCH_FOOTBRIDGE || ARCH_INTEGRATOR || ARCH_NETWINDER)
--	default y
-+	default n
- 	help
- 	  Saying Y here will allow you to use Linux in text mode through a
- 	  display that complies with the generic VGA standard. Virtually
diff --git a/target/linux/patches/3.2.20/wlan-cf.patch b/target/linux/patches/3.2.20/wlan-cf.patch
deleted file mode 100644
index fc20759e2..000000000
--- a/target/linux/patches/3.2.20/wlan-cf.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.39.orig/drivers/net/wireless/hostap/hostap_cs.c linux-2.6.39/drivers/net/wireless/hostap/hostap_cs.c
---- linux-2.6.39.orig/drivers/net/wireless/hostap/hostap_cs.c	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/net/wireless/hostap/hostap_cs.c	2011-09-12 02:46:26.987984145 +0200
-@@ -623,6 +623,7 @@
- static struct pcmcia_device_id hostap_cs_ids[] = {
- 	PCMCIA_DEVICE_MANF_CARD(0x000b, 0x7100),
- 	PCMCIA_DEVICE_MANF_CARD(0x000b, 0x7300),
-+	PCMCIA_DEVICE_MANF_CARD(0x0004, 0x2003),
- 	PCMCIA_DEVICE_MANF_CARD(0x0101, 0x0777),
- 	PCMCIA_DEVICE_MANF_CARD(0x0126, 0x8000),
- 	PCMCIA_DEVICE_MANF_CARD(0x0138, 0x0002),
diff --git a/target/linux/patches/3.2.20/x86-build.patch b/target/linux/patches/3.2.20/x86-build.patch
deleted file mode 100644
index 339140f41..000000000
--- a/target/linux/patches/3.2.20/x86-build.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.39-rc6.orig/arch/x86/boot/tools/build.c linux-2.6.39-rc6/arch/x86/boot/tools/build.c
---- linux-2.6.39-rc6.orig/arch/x86/boot/tools/build.c	2011-05-04 04:59:13.000000000 +0200
-+++ linux-2.6.39-rc6/arch/x86/boot/tools/build.c	2011-05-05 20:10:07.000000000 +0200
-@@ -29,7 +29,6 @@
- #include <stdarg.h>
- #include <sys/types.h>
- #include <sys/stat.h>
--#include <sys/sysmacros.h>
- #include <unistd.h>
- #include <fcntl.h>
- #include <sys/mman.h>
diff --git a/target/linux/patches/3.2.20/zlib-inflate.patch b/target/linux/patches/3.2.20/zlib-inflate.patch
deleted file mode 100644
index 58e1f6d21..000000000
--- a/target/linux/patches/3.2.20/zlib-inflate.patch
+++ /dev/null
@@ -1,12 +0,0 @@
-diff -Nur linux-2.6.37.orig/lib/Kconfig linux-2.6.37/lib/Kconfig
---- linux-2.6.37.orig/lib/Kconfig	2011-01-05 01:50:19.000000000 +0100
-+++ linux-2.6.37/lib/Kconfig	2011-03-01 20:10:29.833370667 +0100
-@@ -95,7 +95,7 @@
- # compression support is select'ed if needed
- #
- config ZLIB_INFLATE
--	tristate
-+	boolean
- 
- config ZLIB_DEFLATE
- 	tristate
diff --git a/target/linux/patches/3.3.8/cris-etrax.patch b/target/linux/patches/3.3.8/cris-etrax.patch
deleted file mode 100644
index a80d9a8b8..000000000
--- a/target/linux/patches/3.3.8/cris-etrax.patch
+++ /dev/null
@@ -1,12 +0,0 @@
-diff -Nur linux-2.6.39.orig/arch/cris/arch-v32/drivers/i2c.h linux-2.6.39/arch/cris/arch-v32/drivers/i2c.h
---- linux-2.6.39.orig/arch/cris/arch-v32/drivers/i2c.h	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/arch/cris/arch-v32/drivers/i2c.h	2011-08-24 19:15:05.000000000 +0200
-@@ -2,7 +2,7 @@
- #include <linux/init.h>
- 
- /* High level I2C actions */
--int __init i2c_init(void);
-+static int __init i2c_init(void);
- int i2c_write(unsigned char theSlave, void *data, size_t nbytes);
- int i2c_read(unsigned char theSlave, void *data, size_t nbytes);
- int i2c_writereg(unsigned char theSlave, unsigned char theReg, unsigned char theValue);
diff --git a/target/linux/patches/3.3.8/defaults.patch b/target/linux/patches/3.3.8/defaults.patch
deleted file mode 100644
index 58aae610b..000000000
--- a/target/linux/patches/3.3.8/defaults.patch
+++ /dev/null
@@ -1,22 +0,0 @@
-diff -Nur linux-3.0.4.orig/fs/Kconfig linux-3.0.4/fs/Kconfig
---- linux-3.0.4.orig/fs/Kconfig	2011-08-29 22:56:30.000000000 +0200
-+++ linux-3.0.4/fs/Kconfig	2011-10-15 22:08:44.000000000 +0200
-@@ -47,7 +47,7 @@
- 	def_bool n
- 
- config EXPORTFS
--	tristate
-+	def_bool y
- 
- config FILE_LOCKING
- 	bool "Enable POSIX file locking API" if EXPERT
-diff -Nur linux-3.0.4.orig/fs/notify/Kconfig linux-3.0.4/fs/notify/Kconfig
---- linux-3.0.4.orig/fs/notify/Kconfig	2011-08-29 22:56:30.000000000 +0200
-+++ linux-3.0.4/fs/notify/Kconfig	2011-10-15 22:02:00.000000000 +0200
-@@ -1,5 +1,5 @@
- config FSNOTIFY
--	def_bool n
-+	def_bool y
- 
- source "fs/notify/dnotify/Kconfig"
- source "fs/notify/inotify/Kconfig"
diff --git a/target/linux/patches/3.3.8/gemalto.patch b/target/linux/patches/3.3.8/gemalto.patch
deleted file mode 100644
index f3c223b5e..000000000
--- a/target/linux/patches/3.3.8/gemalto.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.36.orig/drivers/tty/serial/serial_cs.c linux-2.6.36/drivers/serial/serial_cs.c
---- linux-2.6.36.orig/drivers/tty/serial/serial_cs.c	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/drivers/tty/serial/serial_cs.c	2010-12-13 23:03:40.000000000 +0100
-@@ -794,6 +794,7 @@
- 	PCMCIA_DEVICE_MANF_CARD(0x0137, 0x0025),
- 	PCMCIA_DEVICE_MANF_CARD(0x0137, 0x0045),
- 	PCMCIA_DEVICE_MANF_CARD(0x0137, 0x0052),
-+	PCMCIA_DEVICE_MANF_CARD(0x0157, 0x0100), /* Gemalto SCR */
- 	PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0006), /* Psion 56K+Fax */
- 	PCMCIA_DEVICE_MANF_CARD(0x0200, 0x0001), /* MultiMobile */
- 	PCMCIA_DEVICE_PROD_ID134("ADV", "TECH", "COMpad-32/85", 0x67459937, 0x916d02ba, 0x8fbe92ae),
diff --git a/target/linux/patches/3.3.8/mmc-host.patch b/target/linux/patches/3.3.8/mmc-host.patch
deleted file mode 100644
index 3d0e37add..000000000
--- a/target/linux/patches/3.3.8/mmc-host.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-diff -Nur linux-2.6.39-rc6.orig/drivers/mmc/host/Kconfig linux-2.6.39-rc6/drivers/mmc/host/Kconfig
---- linux-2.6.39-rc6.orig/drivers/mmc/host/Kconfig	2011-05-04 04:59:13.000000000 +0200
-+++ linux-2.6.39-rc6/drivers/mmc/host/Kconfig	2011-05-10 23:39:01.000000000 +0200
-@@ -253,13 +253,6 @@
- 
- 	  If unsure, say N.
- 
--choice
--	prompt "Atmel SD/MMC Driver"
--	depends on AVR32 || ARCH_AT91
--	default MMC_ATMELMCI if AVR32
--	help
--	  Choose which driver to use for the Atmel MCI Silicon
--
- config MMC_AT91
- 	tristate "AT91 SD/MMC Card Interface support"
- 	depends on ARCH_AT91
-@@ -268,18 +261,6 @@
- 
- 	  If unsure, say N.
- 
--config MMC_ATMELMCI
--	tristate "Atmel Multimedia Card Interface support"
--	depends on AVR32 || ARCH_AT91
--	help
--	  This selects the Atmel Multimedia Card Interface driver. If
--	  you have an AT32 (AVR32) or AT91 platform with a Multimedia
--	  Card slot, say Y or M here.
--
--	  If unsure, say N.
--
--endchoice
--
- config MMC_ATMELMCI_DMA
- 	bool "Atmel MCI DMA support (EXPERIMENTAL)"
- 	depends on MMC_ATMELMCI && (AVR32 || ARCH_AT91SAM9G45) && DMA_ENGINE && EXPERIMENTAL
diff --git a/target/linux/patches/3.3.8/non-static.patch b/target/linux/patches/3.3.8/non-static.patch
deleted file mode 100644
index a967703d0..000000000
--- a/target/linux/patches/3.3.8/non-static.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-diff -Nur linux-2.6.39-rc6.orig/fs/namei.c linux-2.6.39-rc6/fs/namei.c
---- linux-2.6.39-rc6.orig/fs/namei.c	2011-05-04 04:59:13.000000000 +0200
-+++ linux-2.6.39-rc6/fs/namei.c	2011-05-05 11:30:14.000000000 +0200
-@@ -1769,7 +1769,7 @@
-  * needs parent already locked. Doesn't follow mounts.
-  * SMP-safe.
-  */
--static struct dentry *lookup_hash(struct nameidata *nd)
-+struct dentry *lookup_hash(struct nameidata *nd)
- {
- 	return __lookup_hash(&nd->last, nd->path.dentry, nd);
- }
-diff -Nur linux-2.6.39-rc6.orig/fs/splice.c linux-2.6.39-rc6/fs/splice.c
---- linux-2.6.39-rc6.orig/fs/splice.c	2011-05-04 04:59:13.000000000 +0200
-+++ linux-2.6.39-rc6/fs/splice.c	2011-05-05 11:31:04.000000000 +0200
-@@ -1081,7 +1081,7 @@
- /*
-  * Attempt to initiate a splice from pipe to file.
-  */
--static long do_splice_from(struct pipe_inode_info *pipe, struct file *out,
-+long do_splice_from(struct pipe_inode_info *pipe, struct file *out,
- 			   loff_t *ppos, size_t len, unsigned int flags)
- {
- 	ssize_t (*splice_write)(struct pipe_inode_info *, struct file *,
-@@ -1109,7 +1109,7 @@
- /*
-  * Attempt to initiate a splice from a file to a pipe.
-  */
--static long do_splice_to(struct file *in, loff_t *ppos,
-+long do_splice_to(struct file *in, loff_t *ppos,
- 			 struct pipe_inode_info *pipe, size_t len,
- 			 unsigned int flags)
- {
diff --git a/target/linux/patches/3.3.8/sparc-include.patch b/target/linux/patches/3.3.8/sparc-include.patch
deleted file mode 100644
index 2f8ffd061..000000000
--- a/target/linux/patches/3.3.8/sparc-include.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.39-rc7.orig/arch/sparc/boot/btfixupprep.c linux-2.6.39-rc7/arch/sparc/boot/btfixupprep.c
---- linux-2.6.39-rc7.orig/arch/sparc/boot/btfixupprep.c	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/arch/sparc/boot/btfixupprep.c	2011-05-21 13:34:40.000000000 +0200
-@@ -25,7 +25,6 @@
- #include <errno.h>
- #include <unistd.h>
- #include <stdlib.h>
--#include <malloc.h>
- 
- #define MAXSYMS 1024
- 
diff --git a/target/linux/patches/3.3.8/startup.patch b/target/linux/patches/3.3.8/startup.patch
deleted file mode 100644
index 68e8987b0..000000000
--- a/target/linux/patches/3.3.8/startup.patch
+++ /dev/null
@@ -1,20 +0,0 @@
-diff -Nur linux-2.6.34.orig/init/main.c linux-2.6.34/init/main.c
---- linux-2.6.34.orig/init/main.c	2010-05-16 23:17:36.000000000 +0200
-+++ linux-2.6.34/init/main.c	2010-05-20 20:13:26.321613615 +0200
-@@ -842,6 +842,7 @@
- 		printk(KERN_WARNING "Failed to execute %s.  Attempting "
- 					"defaults...\n", execute_command);
- 	}
-+	run_init_process("/init");
- 	run_init_process("/sbin/init");
- 	run_init_process("/etc/init");
- 	run_init_process("/bin/init");
-@@ -889,6 +890,8 @@
- 	if (sys_open((const char __user *) "/dev/console", O_RDWR, 0) < 0)
- 		printk(KERN_WARNING "Warning: unable to open an initial console.\n");
- 
-+	printk(KERN_WARNING "Starting Linux (built with OpenADK).\n");
-+
- 	(void) sys_dup(0);
- 	(void) sys_dup(0);
- 	/*
diff --git a/target/linux/patches/3.3.8/usb-defaults-off.patch b/target/linux/patches/3.3.8/usb-defaults-off.patch
deleted file mode 100644
index 31367108a..000000000
--- a/target/linux/patches/3.3.8/usb-defaults-off.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-diff -Nur linux-2.6.37.orig//drivers/usb/core/Kconfig linux-2.6.37/drivers/usb/core/Kconfig
---- linux-2.6.37.orig//drivers/usb/core/Kconfig	2011-01-05 01:50:19.000000000 +0100
-+++ linux-2.6.37/drivers/usb/core/Kconfig	2011-04-12 19:04:23.000000000 +0200
-@@ -59,7 +59,7 @@
- config USB_DEVICE_CLASS
- 	bool "USB device class-devices (DEPRECATED)"
- 	depends on USB
--	default y
-+	default n
- 	---help---
- 	  Userspace access to USB devices is granted by device-nodes exported
- 	  directly from the usbdev in sysfs. Old versions of the driver
-diff -Nur linux-2.6.37.orig//drivers/usb/host/Kconfig linux-2.6.37/drivers/usb/host/Kconfig
---- linux-2.6.37.orig//drivers/usb/host/Kconfig	2011-01-05 01:50:19.000000000 +0100
-+++ linux-2.6.37/drivers/usb/host/Kconfig	2011-04-12 19:04:48.000000000 +0200
-@@ -62,6 +62,7 @@
- config USB_EHCI_ROOT_HUB_TT
- 	bool "Root Hub Transaction Translators"
- 	depends on USB_EHCI_HCD
-+	default n
- 	---help---
- 	  Some EHCI chips have vendor-specific extensions to integrate
- 	  transaction translators, so that no OHCI or UHCI companion
-@@ -74,7 +75,7 @@
- config USB_EHCI_TT_NEWSCHED
- 	bool "Improved Transaction Translator scheduling"
- 	depends on USB_EHCI_HCD
--	default y
-+	default n
- 	---help---
- 	  This changes the periodic scheduling code to fill more of the low
- 	  and full speed bandwidth available from the Transaction Translator
diff --git a/target/linux/patches/3.3.8/uuid.patch b/target/linux/patches/3.3.8/uuid.patch
deleted file mode 100644
index 2529fdab5..000000000
--- a/target/linux/patches/3.3.8/uuid.patch
+++ /dev/null
@@ -1,255 +0,0 @@
-diff -Nur linux-2.6.38.4.orig/block/genhd.c linux-2.6.38.4/block/genhd.c
---- linux-2.6.38.4.orig/block/genhd.c	2011-04-21 23:34:46.000000000 +0200
-+++ linux-2.6.38.4/block/genhd.c	2011-04-27 19:21:18.668912036 +0200
-@@ -34,7 +34,7 @@
- static DEFINE_MUTEX(ext_devt_mutex);
- static DEFINE_IDR(ext_devt_idr);
- 
--static struct device_type disk_type;
-+struct device_type disk_type;
- 
- static void disk_add_events(struct gendisk *disk);
- static void disk_del_events(struct gendisk *disk);
-@@ -1118,7 +1118,7 @@
- 	return NULL;
- }
- 
--static struct device_type disk_type = {
-+struct device_type disk_type = {
- 	.name		= "disk",
- 	.groups		= disk_attr_groups,
- 	.release	= disk_release,
-diff -Nur linux-2.6.38.4.orig/init/do_mounts.c linux-2.6.38.4/init/do_mounts.c
---- linux-2.6.38.4.orig/init/do_mounts.c	2011-04-21 23:34:46.000000000 +0200
-+++ linux-2.6.38.4/init/do_mounts.c	2011-04-27 19:26:52.721413000 +0200
-@@ -32,6 +32,132 @@
- 
- dev_t ROOT_DEV;
- 
-+#ifdef CONFIG_EXT2_FS
-+/* support for root=UUID=ce40d6b2-18eb-4a75-aefe-7ddb0995ce63 bootargs */
-+
-+#include <linux/ext2_fs.h>
-+
-+__u8 root_dev_uuid[16];
-+int root_dev_type;	/* 0 = normal (/dev/hda1, 0301); 1 = UUID; 3 = bad */
-+
-+/* imported from block/genhd.c after removing its static qualifier */
-+extern struct device_type disk_type;
-+
-+/* helper function */
-+static __u8 __init fromhex(char c)
-+{
-+	if (c >= '0' && c <= '9')
-+		return (c - '0');
-+	c &= ~32;
-+	if (c >= 'A' && c <= 'F')
-+		return (c - 'A' + 10);
-+	return (0xFF);
-+}
-+
-+static void __init parse_uuid(const char *s)
-+{
-+	int i;
-+	__u8 j, k;
-+
-+	if (strlen(s) != 36 || s[8] != '-' || s[13] != '-' ||
-+	    s[18] != '-' || s[23] != '-')
-+		goto bad_uuid;
-+	for (i = 0; i < 16; i++) {
-+		if (*s == '-')
-+			++s;
-+		j = fromhex(*s++);
-+		k = fromhex(*s++);
-+		if (j == 0xFF || k == 0xFF)
-+			goto bad_uuid;
-+		root_dev_uuid[i] = (j << 4) | k;
-+	}
-+	return;
-+ bad_uuid:
-+	/* we cannot panic here, defer */
-+	root_dev_type = 3;
-+}
-+
-+/* from drivers/md/md.c */
-+static void __init initcode_bi_complete(struct bio *bio, int error)
-+{
-+	complete((struct completion*)bio->bi_private);
-+}
-+
-+static int __init initcode_sync_page_read(struct block_device *bdev,
-+    sector_t sector, int size, struct page *page)
-+{
-+	struct bio *bio = bio_alloc(GFP_NOIO, 1);
-+	struct completion event;
-+	int ret, rw = READ;
-+
-+	rw |= REQ_SYNC;
-+
-+	bio->bi_bdev = bdev;
-+	bio->bi_sector = sector;
-+	bio_add_page(bio, page, size, 0);
-+	init_completion(&event);
-+	bio->bi_private = &event;
-+	bio->bi_end_io = initcode_bi_complete;
-+	submit_bio(rw, bio);
-+	wait_for_completion(&event);
-+
-+	ret = test_bit(BIO_UPTODATE, &bio->bi_flags);
-+	bio_put(bio);
-+	/* 0 = failure */
-+	return ret;
-+}
-+
-+/* most of this taken from fs/ext2/super.c */
-+static int __init check_dev(struct gendisk *thedisk, dev_t devt,
-+    int blocksize, struct page *page)
-+{
-+	struct ext2_super_block * es;
-+	struct block_device *bdev;
-+	unsigned long sb_block = 1;
-+	unsigned long logic_sb_block;
-+	unsigned long offset = 0;
-+	int rv = /* not found */ 0;
-+	char bff[22];
-+
-+	bdev = bdget(devt);
-+	if (blkdev_get(bdev, FMODE_READ, NULL)) {
-+		printk(KERN_ERR "VFS: opening block device %s failed!\n",
-+		    format_dev_t(bff, devt));
-+		return (0);
-+	}
-+
-+	if (blocksize != BLOCK_SIZE) {
-+		logic_sb_block = (sb_block*BLOCK_SIZE) / blocksize;
-+		offset = (sb_block*BLOCK_SIZE) % blocksize;
-+	} else {
-+		logic_sb_block = sb_block;
-+	}
-+
-+//	printk(KERN_ERR "D: attempting to read %d @%lu from "
-+//	    "bdev %p devt %08X %s\n", blocksize, logic_sb_block,
-+//	    bdev, devt, format_dev_t(bff, devt));
-+	if (!initcode_sync_page_read(bdev, logic_sb_block, blocksize, page)) {
-+//		printk(KERN_ERR "D: failed!\n");
-+		goto out;
-+	}
-+	es = (struct ext2_super_block *)(((char *)page_address(page)) + offset);
-+	if (le16_to_cpu(es->s_magic) == EXT2_SUPER_MAGIC) {
-+//		printk(KERN_ERR "D: has uuid "
-+//		    "%02X%02X%02X%02X-%02X%02X-%02X%02X-%02X%02X-%02X%02X%02X%02X%02X%02X\n",
-+//		    es->s_uuid[0], es->s_uuid[1], es->s_uuid[2], es->s_uuid[3],
-+//		    es->s_uuid[4], es->s_uuid[5], es->s_uuid[6], es->s_uuid[7],
-+//		    es->s_uuid[8], es->s_uuid[9], es->s_uuid[10], es->s_uuid[11],
-+//		    es->s_uuid[12], es->s_uuid[13], es->s_uuid[14], es->s_uuid[15]);
-+		if (!memcmp(es->s_uuid, root_dev_uuid, 16))
-+			rv = /* found */ 1;
-+	}
-+//	  else printk(KERN_ERR "D: bad ext2fs magic\n");
-+ out:
-+	blkdev_put(bdev, FMODE_READ);
-+	return (rv);
-+}
-+#endif /* CONFIG_EXT2_FS for UUID support */
-+
- static int __init load_ramdisk(char *str)
- {
- 	rd_doload = simple_strtol(str,NULL,0) & 3;
-@@ -218,6 +344,13 @@
- static int __init root_dev_setup(char *line)
- {
- 	strlcpy(saved_root_name, line, sizeof(saved_root_name));
-+#ifdef CONFIG_EXT2_FS
-+	root_dev_type = 0;
-+	if (!strncmp(line, "UUID=", 5)) {
-+		root_dev_type = 1;
-+		parse_uuid(line + 5);
-+	}
-+#endif /* CONFIG_EXT2_FS for UUID support */
- 	return 1;
- }
- 
-@@ -403,6 +536,83 @@
- 
- void __init mount_root(void)
- {
-+#ifdef CONFIG_EXT2_FS
-+	/* UUID support */
-+//	printk_all_partitions();
-+	if (root_dev_type == 1) {
-+		int blocksize;
-+
-+		/* from block/genhd.c printk_all_partitions */
-+		struct class_dev_iter iter;
-+		struct device *dev;
-+
-+		/* from drivers/md/md.c */
-+		struct page *sb_page;
-+
-+		if (!(sb_page = alloc_page(GFP_KERNEL))) {
-+			printk(KERN_ERR "VFS: no memory for bio page\n");
-+			goto nomemforbio;
-+		}
-+
-+//		printk(KERN_ERR "D: root is: "
-+//		    "%02X%02X%02X%02X-%02X%02X-%02X%02X-%02X%02X-%02X%02X%02X%02X%02X%02X\n",
-+//		    root_dev_uuid[0], root_dev_uuid[1], root_dev_uuid[2], root_dev_uuid[3],
-+//		    root_dev_uuid[4], root_dev_uuid[5], root_dev_uuid[6], root_dev_uuid[7],
-+//		    root_dev_uuid[8], root_dev_uuid[9], root_dev_uuid[10], root_dev_uuid[11],
-+//		    root_dev_uuid[12], root_dev_uuid[13], root_dev_uuid[14], root_dev_uuid[15]);
-+		/* from block/genhd.c printk_all_partitions */
-+//		printk(KERN_ERR "D: begin iter\n");
-+		class_dev_iter_init(&iter, &block_class, NULL, &disk_type);
-+		while (root_dev_type && (dev = class_dev_iter_next(&iter))) {
-+//			char bff[22];
-+			struct gendisk *disk = dev_to_disk(dev);
-+			struct disk_part_iter piter;
-+			struct hd_struct *part;
-+			if (get_capacity(disk) == 0 ||
-+			    (disk->flags & GENHD_FL_SUPPRESS_PARTITION_INFO)) {
-+//				printk(KERN_ERR "D: ignoring\n");
-+				continue;
-+			}
-+			blocksize = queue_logical_block_size(disk->queue);
-+//			printk(KERN_ERR "D: gendisk, blocksize %d "
-+//			    "name '%s' devt %08X %s #part %d\n", blocksize,
-+//			    disk->disk_name, dev->devt,
-+//			    format_dev_t(bff, dev->devt),
-+//			    disk_max_parts(disk));
-+			disk_part_iter_init(&piter, disk, DISK_PITER_INCL_PART0);
-+			while (root_dev_type && (part = disk_part_iter_next(&piter))) {
-+				/* avoid empty or too small partitions */
-+//				printk(KERN_ERR "D: part #%d start %llu "
-+//				    "nr %llu\n", part->partno,
-+//				    (__u64)part->start_sect,
-+//				    (__u64)part->nr_sects);
-+				if (part->nr_sects < 8)
-+					continue;
-+				if (check_dev(disk, MKDEV(MAJOR(dev->devt),
-+				    MINOR(dev->devt) + part->partno),
-+				    blocksize, sb_page)) {
-+					ROOT_DEV = part_devt(part);
-+//					printk(KERN_ERR "D: got match!\n");
-+					// comment out below for debugging
-+					root_dev_type = 0;
-+				}
-+			}
-+			disk_part_iter_exit(&piter);
-+		}
-+//		printk(KERN_ERR "D: end iter\n");
-+		class_dev_iter_exit(&iter);
-+		put_page(sb_page);
-+	}
-+ nomemforbio:
-+	if (root_dev_type == 1)
-+		printk(KERN_ERR "VFS: Unable to find root by UUID %s.\n",
-+		    saved_root_name + 5);
-+	else if (root_dev_type == 3)
-+		/* execute deferred panic from parse_uuid */
-+		panic("Badly formatted UUID %s was supplied as kernel "
-+		    "parameter root", saved_root_name + 5);
-+#endif /* CONFIG_EXT2_FS for UUID support */
-+
- #ifdef CONFIG_ROOT_NFS
- 	if (MAJOR(ROOT_DEV) == UNNAMED_MAJOR) {
- 		if (mount_nfs_root())
diff --git a/target/linux/patches/3.3.8/vga-cons-default-off.patch b/target/linux/patches/3.3.8/vga-cons-default-off.patch
deleted file mode 100644
index 178aeeeb9..000000000
--- a/target/linux/patches/3.3.8/vga-cons-default-off.patch
+++ /dev/null
@@ -1,12 +0,0 @@
-diff -Nur linux-2.6.37.orig//drivers/video/console/Kconfig linux-2.6.37/drivers/video/console/Kconfig
---- linux-2.6.37.orig//drivers/video/console/Kconfig	2011-01-05 01:50:19.000000000 +0100
-+++ linux-2.6.37/drivers/video/console/Kconfig	2011-04-12 16:29:34.000000000 +0200
-@@ -7,7 +7,7 @@
- config VGA_CONSOLE
- 	bool "VGA text console" if EMBEDDED || !X86
- 	depends on !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !SUPERH && !BLACKFIN && !AVR32 && !MN10300 && (!ARM || ARCH_FOOTBRIDGE || ARCH_INTEGRATOR || ARCH_NETWINDER)
--	default y
-+	default n
- 	help
- 	  Saying Y here will allow you to use Linux in text mode through a
- 	  display that complies with the generic VGA standard. Virtually
diff --git a/target/linux/patches/3.3.8/wlan-cf.patch b/target/linux/patches/3.3.8/wlan-cf.patch
deleted file mode 100644
index fc20759e2..000000000
--- a/target/linux/patches/3.3.8/wlan-cf.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.39.orig/drivers/net/wireless/hostap/hostap_cs.c linux-2.6.39/drivers/net/wireless/hostap/hostap_cs.c
---- linux-2.6.39.orig/drivers/net/wireless/hostap/hostap_cs.c	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/net/wireless/hostap/hostap_cs.c	2011-09-12 02:46:26.987984145 +0200
-@@ -623,6 +623,7 @@
- static struct pcmcia_device_id hostap_cs_ids[] = {
- 	PCMCIA_DEVICE_MANF_CARD(0x000b, 0x7100),
- 	PCMCIA_DEVICE_MANF_CARD(0x000b, 0x7300),
-+	PCMCIA_DEVICE_MANF_CARD(0x0004, 0x2003),
- 	PCMCIA_DEVICE_MANF_CARD(0x0101, 0x0777),
- 	PCMCIA_DEVICE_MANF_CARD(0x0126, 0x8000),
- 	PCMCIA_DEVICE_MANF_CARD(0x0138, 0x0002),
diff --git a/target/linux/patches/3.3.8/x86-build.patch b/target/linux/patches/3.3.8/x86-build.patch
deleted file mode 100644
index 339140f41..000000000
--- a/target/linux/patches/3.3.8/x86-build.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.39-rc6.orig/arch/x86/boot/tools/build.c linux-2.6.39-rc6/arch/x86/boot/tools/build.c
---- linux-2.6.39-rc6.orig/arch/x86/boot/tools/build.c	2011-05-04 04:59:13.000000000 +0200
-+++ linux-2.6.39-rc6/arch/x86/boot/tools/build.c	2011-05-05 20:10:07.000000000 +0200
-@@ -29,7 +29,6 @@
- #include <stdarg.h>
- #include <sys/types.h>
- #include <sys/stat.h>
--#include <sys/sysmacros.h>
- #include <unistd.h>
- #include <fcntl.h>
- #include <sys/mman.h>
diff --git a/target/linux/patches/3.3.8/zlib-inflate.patch b/target/linux/patches/3.3.8/zlib-inflate.patch
deleted file mode 100644
index 58e1f6d21..000000000
--- a/target/linux/patches/3.3.8/zlib-inflate.patch
+++ /dev/null
@@ -1,12 +0,0 @@
-diff -Nur linux-2.6.37.orig/lib/Kconfig linux-2.6.37/lib/Kconfig
---- linux-2.6.37.orig/lib/Kconfig	2011-01-05 01:50:19.000000000 +0100
-+++ linux-2.6.37/lib/Kconfig	2011-03-01 20:10:29.833370667 +0100
-@@ -95,7 +95,7 @@
- # compression support is select'ed if needed
- #
- config ZLIB_INFLATE
--	tristate
-+	boolean
- 
- config ZLIB_DEFLATE
- 	tristate
diff --git a/target/linux/patches/3.4.4/bsd-compatibility.patch b/target/linux/patches/3.4.4/bsd-compatibility.patch
deleted file mode 100644
index 9e91a62de..000000000
--- a/target/linux/patches/3.4.4/bsd-compatibility.patch
+++ /dev/null
@@ -1,2512 +0,0 @@
-diff -Nur linux-2.6.36.orig/scripts/Makefile.lib linux-2.6.36/scripts/Makefile.lib
---- linux-2.6.36.orig/scripts/Makefile.lib	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/scripts/Makefile.lib	2010-11-28 18:34:22.000000000 +0100
-@@ -216,7 +216,12 @@
- size_append = printf $(shell						\
- dec_size=0;								\
- for F in $1; do								\
--	fsize=$$(stat -c "%s" $$F);					\
-+	if stat -qs .>/dev/null 2>&1; then				\
-+		statcmd='stat -f %z';					\
-+	else								\
-+		statcmd='stat -c %s';					\
-+	fi;								\
-+	fsize=$$($$statcmd $$F);					\
- 	dec_size=$$(expr $$dec_size + $$fsize);				\
- done;									\
- printf "%08x\n" $$dec_size |						\
-diff -Nur linux-2.6.36.orig/scripts/mod/mk_elfconfig.c linux-2.6.36/scripts/mod/mk_elfconfig.c
---- linux-2.6.36.orig/scripts/mod/mk_elfconfig.c	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/scripts/mod/mk_elfconfig.c	2010-11-28 18:33:24.000000000 +0100
-@@ -1,7 +1,18 @@
- #include <stdio.h>
- #include <stdlib.h>
- #include <string.h>
--#include <elf.h>
-+
-+#define EI_NIDENT (16)
-+#define ELFMAG          "\177ELF"
-+
-+#define SELFMAG         4
-+#define EI_CLASS        4
-+#define ELFCLASS32      1               /* 32-bit objects */
-+#define ELFCLASS64      2               /* 64-bit objects */
-+
-+#define EI_DATA         5               /* Data encoding byte index */
-+#define ELFDATA2LSB     1               /* 2's complement, little endian */
-+#define ELFDATA2MSB     2               /* 2's complement, big endian */
- 
- int
- main(int argc, char **argv)
-diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpost.h
---- linux-2.6.36.orig/scripts/mod/modpost.h	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/scripts/mod/modpost.h	2010-11-28 18:33:24.000000000 +0100
-@@ -7,7 +7,2453 @@
- #include <sys/mman.h>
- #include <fcntl.h>
- #include <unistd.h>
--#include <elf.h>
-+
-+
-+/* This file defines standard ELF types, structures, and macros.
-+   Copyright (C) 1995-1999,2000,2001,2002,2003 Free Software Foundation, Inc.
-+   This file is part of the GNU C Library.
-+
-+   The GNU C Library is free software; you can redistribute it and/or
-+   modify it under the terms of the GNU Lesser General Public
-+   License as published by the Free Software Foundation; either
-+   version 2.1 of the License, or (at your option) any later version.
-+
-+   The GNU C Library is distributed in the hope that it will be useful,
-+   but WITHOUT ANY WARRANTY; without even the implied warranty of
-+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-+   Lesser General Public License for more details.
-+
-+   You should have received a copy of the GNU Lesser General Public
-+   License along with the GNU C Library; if not, write to the Free
-+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
-+   02111-1307 USA.  */
-+
-+#ifndef _ELF_H
-+#define	_ELF_H 1
-+
-+__BEGIN_DECLS
-+
-+/* Standard ELF types.  */
-+
-+#include <stdint.h>
-+
-+/* Type for a 16-bit quantity.  */
-+typedef uint16_t Elf32_Half;
-+typedef uint16_t Elf64_Half;
-+
-+/* Types for signed and unsigned 32-bit quantities.  */
-+typedef uint32_t Elf32_Word;
-+typedef	int32_t  Elf32_Sword;
-+typedef uint32_t Elf64_Word;
-+typedef	int32_t  Elf64_Sword;
-+
-+/* Types for signed and unsigned 64-bit quantities.  */
-+typedef uint64_t Elf32_Xword;
-+typedef	int64_t  Elf32_Sxword;
-+typedef uint64_t Elf64_Xword;
-+typedef	int64_t  Elf64_Sxword;
-+
-+/* Type of addresses.  */
-+typedef uint32_t Elf32_Addr;
-+typedef uint64_t Elf64_Addr;
-+
-+/* Type of file offsets.  */
-+typedef uint32_t Elf32_Off;
-+typedef uint64_t Elf64_Off;
-+
-+/* Type for section indices, which are 16-bit quantities.  */
-+typedef uint16_t Elf32_Section;
-+typedef uint16_t Elf64_Section;
-+
-+/* Type for version symbol information.  */
-+typedef Elf32_Half Elf32_Versym;
-+typedef Elf64_Half Elf64_Versym;
-+
-+
-+/* The ELF file header.  This appears at the start of every ELF file.  */
-+
-+#define EI_NIDENT (16)
-+
-+typedef struct
-+{
-+  unsigned char	e_ident[EI_NIDENT];	/* Magic number and other info */
-+  Elf32_Half	e_type;			/* Object file type */
-+  Elf32_Half	e_machine;		/* Architecture */
-+  Elf32_Word	e_version;		/* Object file version */
-+  Elf32_Addr	e_entry;		/* Entry point virtual address */
-+  Elf32_Off	e_phoff;		/* Program header table file offset */
-+  Elf32_Off	e_shoff;		/* Section header table file offset */
-+  Elf32_Word	e_flags;		/* Processor-specific flags */
-+  Elf32_Half	e_ehsize;		/* ELF header size in bytes */
-+  Elf32_Half	e_phentsize;		/* Program header table entry size */
-+  Elf32_Half	e_phnum;		/* Program header table entry count */
-+  Elf32_Half	e_shentsize;		/* Section header table entry size */
-+  Elf32_Half	e_shnum;		/* Section header table entry count */
-+  Elf32_Half	e_shstrndx;		/* Section header string table index */
-+} Elf32_Ehdr;
-+
-+typedef struct
-+{
-+  unsigned char	e_ident[EI_NIDENT];	/* Magic number and other info */
-+  Elf64_Half	e_type;			/* Object file type */
-+  Elf64_Half	e_machine;		/* Architecture */
-+  Elf64_Word	e_version;		/* Object file version */
-+  Elf64_Addr	e_entry;		/* Entry point virtual address */
-+  Elf64_Off	e_phoff;		/* Program header table file offset */
-+  Elf64_Off	e_shoff;		/* Section header table file offset */
-+  Elf64_Word	e_flags;		/* Processor-specific flags */
-+  Elf64_Half	e_ehsize;		/* ELF header size in bytes */
-+  Elf64_Half	e_phentsize;		/* Program header table entry size */
-+  Elf64_Half	e_phnum;		/* Program header table entry count */
-+  Elf64_Half	e_shentsize;		/* Section header table entry size */
-+  Elf64_Half	e_shnum;		/* Section header table entry count */
-+  Elf64_Half	e_shstrndx;		/* Section header string table index */
-+} Elf64_Ehdr;
-+
-+/* Fields in the e_ident array.  The EI_* macros are indices into the
-+   array.  The macros under each EI_* macro are the values the byte
-+   may have.  */
-+
-+#define EI_MAG0		0		/* File identification byte 0 index */
-+#define ELFMAG0		0x7f		/* Magic number byte 0 */
-+
-+#define EI_MAG1		1		/* File identification byte 1 index */
-+#define ELFMAG1		'E'		/* Magic number byte 1 */
-+
-+#define EI_MAG2		2		/* File identification byte 2 index */
-+#define ELFMAG2		'L'		/* Magic number byte 2 */
-+
-+#define EI_MAG3		3		/* File identification byte 3 index */
-+#define ELFMAG3		'F'		/* Magic number byte 3 */
-+
-+/* Conglomeration of the identification bytes, for easy testing as a word.  */
-+#define	ELFMAG		"\177ELF"
-+#define	SELFMAG		4
-+
-+#define EI_CLASS	4		/* File class byte index */
-+#define ELFCLASSNONE	0		/* Invalid class */
-+#define ELFCLASS32	1		/* 32-bit objects */
-+#define ELFCLASS64	2		/* 64-bit objects */
-+#define ELFCLASSNUM	3
-+
-+#define EI_DATA		5		/* Data encoding byte index */
-+#define ELFDATANONE	0		/* Invalid data encoding */
-+#define ELFDATA2LSB	1		/* 2's complement, little endian */
-+#define ELFDATA2MSB	2		/* 2's complement, big endian */
-+#define ELFDATANUM	3
-+
-+#define EI_VERSION	6		/* File version byte index */
-+					/* Value must be EV_CURRENT */
-+
-+#define EI_OSABI	7		/* OS ABI identification */
-+#define ELFOSABI_NONE		0	/* UNIX System V ABI */
-+#define ELFOSABI_SYSV		0	/* Alias.  */
-+#define ELFOSABI_HPUX		1	/* HP-UX */
-+#define ELFOSABI_NETBSD		2	/* NetBSD.  */
-+#define ELFOSABI_LINUX		3	/* Linux.  */
-+#define ELFOSABI_SOLARIS	6	/* Sun Solaris.  */
-+#define ELFOSABI_AIX		7	/* IBM AIX.  */
-+#define ELFOSABI_IRIX		8	/* SGI Irix.  */
-+#define ELFOSABI_FREEBSD	9	/* FreeBSD.  */
-+#define ELFOSABI_TRU64		10	/* Compaq TRU64 UNIX.  */
-+#define ELFOSABI_MODESTO	11	/* Novell Modesto.  */
-+#define ELFOSABI_OPENBSD	12	/* OpenBSD.  */
-+#define ELFOSABI_ARM		97	/* ARM */
-+#define ELFOSABI_STANDALONE	255	/* Standalone (embedded) application */
-+
-+#define EI_ABIVERSION	8		/* ABI version */
-+
-+#define EI_PAD		9		/* Byte index of padding bytes */
-+
-+/* Legal values for e_type (object file type).  */
-+
-+#define ET_NONE		0		/* No file type */
-+#define ET_REL		1		/* Relocatable file */
-+#define ET_EXEC		2		/* Executable file */
-+#define ET_DYN		3		/* Shared object file */
-+#define ET_CORE		4		/* Core file */
-+#define	ET_NUM		5		/* Number of defined types */
-+#define ET_LOOS		0xfe00		/* OS-specific range start */
-+#define ET_HIOS		0xfeff		/* OS-specific range end */
-+#define ET_LOPROC	0xff00		/* Processor-specific range start */
-+#define ET_HIPROC	0xffff		/* Processor-specific range end */
-+
-+/* Legal values for e_machine (architecture).  */
-+
-+#define EM_NONE		 0		/* No machine */
-+#define EM_M32		 1		/* AT&T WE 32100 */
-+#define EM_SPARC	 2		/* SUN SPARC */
-+#define EM_386		 3		/* Intel 80386 */
-+#define EM_68K		 4		/* Motorola m68k family */
-+#define EM_88K		 5		/* Motorola m88k family */
-+#define EM_860		 7		/* Intel 80860 */
-+#define EM_MIPS		 8		/* MIPS R3000 big-endian */
-+#define EM_S370		 9		/* IBM System/370 */
-+#define EM_MIPS_RS3_LE	10		/* MIPS R3000 little-endian */
-+
-+#define EM_PARISC	15		/* HPPA */
-+#define EM_VPP500	17		/* Fujitsu VPP500 */
-+#define EM_SPARC32PLUS	18		/* Sun's "v8plus" */
-+#define EM_960		19		/* Intel 80960 */
-+#define EM_PPC		20		/* PowerPC */
-+#define EM_PPC64	21		/* PowerPC 64-bit */
-+#define EM_S390		22		/* IBM S390 */
-+
-+#define EM_V800		36		/* NEC V800 series */
-+#define EM_FR20		37		/* Fujitsu FR20 */
-+#define EM_RH32		38		/* TRW RH-32 */
-+#define EM_RCE		39		/* Motorola RCE */
-+#define EM_ARM		40		/* ARM */
-+#define EM_FAKE_ALPHA	41		/* Digital Alpha */
-+#define EM_SH		42		/* Hitachi SH */
-+#define EM_SPARCV9	43		/* SPARC v9 64-bit */
-+#define EM_TRICORE	44		/* Siemens Tricore */
-+#define EM_ARC		45		/* Argonaut RISC Core */
-+#define EM_H8_300	46		/* Hitachi H8/300 */
-+#define EM_H8_300H	47		/* Hitachi H8/300H */
-+#define EM_H8S		48		/* Hitachi H8S */
-+#define EM_H8_500	49		/* Hitachi H8/500 */
-+#define EM_IA_64	50		/* Intel Merced */
-+#define EM_MIPS_X	51		/* Stanford MIPS-X */
-+#define EM_COLDFIRE	52		/* Motorola Coldfire */
-+#define EM_68HC12	53		/* Motorola M68HC12 */
-+#define EM_MMA		54		/* Fujitsu MMA Multimedia Accelerator*/
-+#define EM_PCP		55		/* Siemens PCP */
-+#define EM_NCPU		56		/* Sony nCPU embeeded RISC */
-+#define EM_NDR1		57		/* Denso NDR1 microprocessor */
-+#define EM_STARCORE	58		/* Motorola Start*Core processor */
-+#define EM_ME16		59		/* Toyota ME16 processor */
-+#define EM_ST100	60		/* STMicroelectronic ST100 processor */
-+#define EM_TINYJ	61		/* Advanced Logic Corp. Tinyj emb.fam*/
-+#define EM_X86_64	62		/* AMD x86-64 architecture */
-+#define EM_PDSP		63		/* Sony DSP Processor */
-+
-+#define EM_FX66		66		/* Siemens FX66 microcontroller */
-+#define EM_ST9PLUS	67		/* STMicroelectronics ST9+ 8/16 mc */
-+#define EM_ST7		68		/* STmicroelectronics ST7 8 bit mc */
-+#define EM_68HC16	69		/* Motorola MC68HC16 microcontroller */
-+#define EM_68HC11	70		/* Motorola MC68HC11 microcontroller */
-+#define EM_68HC08	71		/* Motorola MC68HC08 microcontroller */
-+#define EM_68HC05	72		/* Motorola MC68HC05 microcontroller */
-+#define EM_SVX		73		/* Silicon Graphics SVx */
-+#define EM_ST19		74		/* STMicroelectronics ST19 8 bit mc */
-+#define EM_VAX		75		/* Digital VAX */
-+#define EM_CRIS		76		/* Axis Communications 32-bit embedded processor */
-+#define EM_JAVELIN	77		/* Infineon Technologies 32-bit embedded processor */
-+#define EM_FIREPATH	78		/* Element 14 64-bit DSP Processor */
-+#define EM_ZSP		79		/* LSI Logic 16-bit DSP Processor */
-+#define EM_MMIX		80		/* Donald Knuth's educational 64-bit processor */
-+#define EM_HUANY	81		/* Harvard University machine-independent object files */
-+#define EM_PRISM	82		/* SiTera Prism */
-+#define EM_AVR		83		/* Atmel AVR 8-bit microcontroller */
-+#define EM_FR30		84		/* Fujitsu FR30 */
-+#define EM_D10V		85		/* Mitsubishi D10V */
-+#define EM_D30V		86		/* Mitsubishi D30V */
-+#define EM_V850		87		/* NEC v850 */
-+#define EM_M32R		88		/* Mitsubishi M32R */
-+#define EM_MN10300	89		/* Matsushita MN10300 */
-+#define EM_MN10200	90		/* Matsushita MN10200 */
-+#define EM_PJ		91		/* picoJava */
-+#define EM_OPENRISC	92		/* OpenRISC 32-bit embedded processor */
-+#define EM_ARC_A5	93		/* ARC Cores Tangent-A5 */
-+#define EM_XTENSA	94		/* Tensilica Xtensa Architecture */
-+#define EM_NUM		95
-+
-+/* If it is necessary to assign new unofficial EM_* values, please
-+   pick large random numbers (0x8523, 0xa7f2, etc.) to minimize the
-+   chances of collision with official or non-GNU unofficial values.  */
-+
-+#define EM_ALPHA	0x9026
-+
-+/* Legal values for e_version (version).  */
-+
-+#define EV_NONE		0		/* Invalid ELF version */
-+#define EV_CURRENT	1		/* Current version */
-+#define EV_NUM		2
-+
-+/* Section header.  */
-+
-+typedef struct
-+{
-+  Elf32_Word	sh_name;		/* Section name (string tbl index) */
-+  Elf32_Word	sh_type;		/* Section type */
-+  Elf32_Word	sh_flags;		/* Section flags */
-+  Elf32_Addr	sh_addr;		/* Section virtual addr at execution */
-+  Elf32_Off	sh_offset;		/* Section file offset */
-+  Elf32_Word	sh_size;		/* Section size in bytes */
-+  Elf32_Word	sh_link;		/* Link to another section */
-+  Elf32_Word	sh_info;		/* Additional section information */
-+  Elf32_Word	sh_addralign;		/* Section alignment */
-+  Elf32_Word	sh_entsize;		/* Entry size if section holds table */
-+} Elf32_Shdr;
-+
-+typedef struct
-+{
-+  Elf64_Word	sh_name;		/* Section name (string tbl index) */
-+  Elf64_Word	sh_type;		/* Section type */
-+  Elf64_Xword	sh_flags;		/* Section flags */
-+  Elf64_Addr	sh_addr;		/* Section virtual addr at execution */
-+  Elf64_Off	sh_offset;		/* Section file offset */
-+  Elf64_Xword	sh_size;		/* Section size in bytes */
-+  Elf64_Word	sh_link;		/* Link to another section */
-+  Elf64_Word	sh_info;		/* Additional section information */
-+  Elf64_Xword	sh_addralign;		/* Section alignment */
-+  Elf64_Xword	sh_entsize;		/* Entry size if section holds table */
-+} Elf64_Shdr;
-+
-+/* Special section indices.  */
-+
-+#define SHN_UNDEF	0		/* Undefined section */
-+#define SHN_LORESERVE	0xff00		/* Start of reserved indices */
-+#define SHN_LOPROC	0xff00		/* Start of processor-specific */
-+#define SHN_HIPROC	0xff1f		/* End of processor-specific */
-+#define SHN_LOOS	0xff20		/* Start of OS-specific */
-+#define SHN_HIOS	0xff3f		/* End of OS-specific */
-+#define SHN_ABS		0xfff1		/* Associated symbol is absolute */
-+#define SHN_COMMON	0xfff2		/* Associated symbol is common */
-+#define SHN_XINDEX	0xffff		/* Index is in extra table.  */
-+#define SHN_HIRESERVE	0xffff		/* End of reserved indices */
-+
-+/* Legal values for sh_type (section type).  */
-+
-+#define SHT_NULL	  0		/* Section header table entry unused */
-+#define SHT_PROGBITS	  1		/* Program data */
-+#define SHT_SYMTAB	  2		/* Symbol table */
-+#define SHT_STRTAB	  3		/* String table */
-+#define SHT_RELA	  4		/* Relocation entries with addends */
-+#define SHT_HASH	  5		/* Symbol hash table */
-+#define SHT_DYNAMIC	  6		/* Dynamic linking information */
-+#define SHT_NOTE	  7		/* Notes */
-+#define SHT_NOBITS	  8		/* Program space with no data (bss) */
-+#define SHT_REL		  9		/* Relocation entries, no addends */
-+#define SHT_SHLIB	  10		/* Reserved */
-+#define SHT_DYNSYM	  11		/* Dynamic linker symbol table */
-+#define SHT_INIT_ARRAY	  14		/* Array of constructors */
-+#define SHT_FINI_ARRAY	  15		/* Array of destructors */
-+#define SHT_PREINIT_ARRAY 16		/* Array of pre-constructors */
-+#define SHT_GROUP	  17		/* Section group */
-+#define SHT_SYMTAB_SHNDX  18		/* Extended section indeces */
-+#define	SHT_NUM		  19		/* Number of defined types.  */
-+#define SHT_LOOS	  0x60000000	/* Start OS-specific */
-+#define SHT_GNU_LIBLIST	  0x6ffffff7	/* Prelink library list */
-+#define SHT_CHECKSUM	  0x6ffffff8	/* Checksum for DSO content.  */
-+#define SHT_LOSUNW	  0x6ffffffa	/* Sun-specific low bound.  */
-+#define SHT_SUNW_move	  0x6ffffffa
-+#define SHT_SUNW_COMDAT   0x6ffffffb
-+#define SHT_SUNW_syminfo  0x6ffffffc
-+#define SHT_GNU_verdef	  0x6ffffffd	/* Version definition section.  */
-+#define SHT_GNU_verneed	  0x6ffffffe	/* Version needs section.  */
-+#define SHT_GNU_versym	  0x6fffffff	/* Version symbol table.  */
-+#define SHT_HISUNW	  0x6fffffff	/* Sun-specific high bound.  */
-+#define SHT_HIOS	  0x6fffffff	/* End OS-specific type */
-+#define SHT_LOPROC	  0x70000000	/* Start of processor-specific */
-+#define SHT_HIPROC	  0x7fffffff	/* End of processor-specific */
-+#define SHT_LOUSER	  0x80000000	/* Start of application-specific */
-+#define SHT_HIUSER	  0x8fffffff	/* End of application-specific */
-+
-+/* Legal values for sh_flags (section flags).  */
-+
-+#define SHF_WRITE	     (1 << 0)	/* Writable */
-+#define SHF_ALLOC	     (1 << 1)	/* Occupies memory during execution */
-+#define SHF_EXECINSTR	     (1 << 2)	/* Executable */
-+#define SHF_MERGE	     (1 << 4)	/* Might be merged */
-+#define SHF_STRINGS	     (1 << 5)	/* Contains nul-terminated strings */
-+#define SHF_INFO_LINK	     (1 << 6)	/* `sh_info' contains SHT index */
-+#define SHF_LINK_ORDER	     (1 << 7)	/* Preserve order after combining */
-+#define SHF_OS_NONCONFORMING (1 << 8)	/* Non-standard OS specific handling
-+					   required */
-+#define SHF_GROUP	     (1 << 9)	/* Section is member of a group.  */
-+#define SHF_TLS		     (1 << 10)	/* Section hold thread-local data.  */
-+#define SHF_MASKOS	     0x0ff00000	/* OS-specific.  */
-+#define SHF_MASKPROC	     0xf0000000	/* Processor-specific */
-+
-+/* Section group handling.  */
-+#define GRP_COMDAT	0x1		/* Mark group as COMDAT.  */
-+
-+/* Symbol table entry.  */
-+
-+typedef struct
-+{
-+  Elf32_Word	st_name;		/* Symbol name (string tbl index) */
-+  Elf32_Addr	st_value;		/* Symbol value */
-+  Elf32_Word	st_size;		/* Symbol size */
-+  unsigned char	st_info;		/* Symbol type and binding */
-+  unsigned char	st_other;		/* Symbol visibility */
-+  Elf32_Section	st_shndx;		/* Section index */
-+} Elf32_Sym;
-+
-+typedef struct
-+{
-+  Elf64_Word	st_name;		/* Symbol name (string tbl index) */
-+  unsigned char	st_info;		/* Symbol type and binding */
-+  unsigned char st_other;		/* Symbol visibility */
-+  Elf64_Section	st_shndx;		/* Section index */
-+  Elf64_Addr	st_value;		/* Symbol value */
-+  Elf64_Xword	st_size;		/* Symbol size */
-+} Elf64_Sym;
-+
-+/* The syminfo section if available contains additional information about
-+   every dynamic symbol.  */
-+
-+typedef struct
-+{
-+  Elf32_Half si_boundto;		/* Direct bindings, symbol bound to */
-+  Elf32_Half si_flags;			/* Per symbol flags */
-+} Elf32_Syminfo;
-+
-+typedef struct
-+{
-+  Elf64_Half si_boundto;		/* Direct bindings, symbol bound to */
-+  Elf64_Half si_flags;			/* Per symbol flags */
-+} Elf64_Syminfo;
-+
-+/* Possible values for si_boundto.  */
-+#define SYMINFO_BT_SELF		0xffff	/* Symbol bound to self */
-+#define SYMINFO_BT_PARENT	0xfffe	/* Symbol bound to parent */
-+#define SYMINFO_BT_LOWRESERVE	0xff00	/* Beginning of reserved entries */
-+
-+/* Possible bitmasks for si_flags.  */
-+#define SYMINFO_FLG_DIRECT	0x0001	/* Direct bound symbol */
-+#define SYMINFO_FLG_PASSTHRU	0x0002	/* Pass-thru symbol for translator */
-+#define SYMINFO_FLG_COPY	0x0004	/* Symbol is a copy-reloc */
-+#define SYMINFO_FLG_LAZYLOAD	0x0008	/* Symbol bound to object to be lazy
-+					   loaded */
-+/* Syminfo version values.  */
-+#define SYMINFO_NONE		0
-+#define SYMINFO_CURRENT		1
-+#define SYMINFO_NUM		2
-+
-+
-+/* How to extract and insert information held in the st_info field.  */
-+
-+#define ELF32_ST_BIND(val)		(((unsigned char) (val)) >> 4)
-+#define ELF32_ST_TYPE(val)		((val) & 0xf)
-+#define ELF32_ST_INFO(bind, type)	(((bind) << 4) + ((type) & 0xf))
-+
-+/* Both Elf32_Sym and Elf64_Sym use the same one-byte st_info field.  */
-+#define ELF64_ST_BIND(val)		ELF32_ST_BIND (val)
-+#define ELF64_ST_TYPE(val)		ELF32_ST_TYPE (val)
-+#define ELF64_ST_INFO(bind, type)	ELF32_ST_INFO ((bind), (type))
-+
-+/* Legal values for ST_BIND subfield of st_info (symbol binding).  */
-+
-+#define STB_LOCAL	0		/* Local symbol */
-+#define STB_GLOBAL	1		/* Global symbol */
-+#define STB_WEAK	2		/* Weak symbol */
-+#define	STB_NUM		3		/* Number of defined types.  */
-+#define STB_LOOS	10		/* Start of OS-specific */
-+#define STB_HIOS	12		/* End of OS-specific */
-+#define STB_LOPROC	13		/* Start of processor-specific */
-+#define STB_HIPROC	15		/* End of processor-specific */
-+
-+/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
-+
-+#define STT_NOTYPE	0		/* Symbol type is unspecified */
-+#define STT_OBJECT	1		/* Symbol is a data object */
-+#define STT_FUNC	2		/* Symbol is a code object */
-+#define STT_SECTION	3		/* Symbol associated with a section */
-+#define STT_FILE	4		/* Symbol's name is file name */
-+#define STT_COMMON	5		/* Symbol is a common data object */
-+#define STT_TLS		6		/* Symbol is thread-local data object*/
-+#define	STT_NUM		7		/* Number of defined types.  */
-+#define STT_LOOS	10		/* Start of OS-specific */
-+#define STT_HIOS	12		/* End of OS-specific */
-+#define STT_LOPROC	13		/* Start of processor-specific */
-+#define STT_HIPROC	15		/* End of processor-specific */
-+
-+
-+/* Symbol table indices are found in the hash buckets and chain table
-+   of a symbol hash table section.  This special index value indicates
-+   the end of a chain, meaning no further symbols are found in that bucket.  */
-+
-+#define STN_UNDEF	0		/* End of a chain.  */
-+
-+
-+/* How to extract and insert information held in the st_other field.  */
-+
-+#define ELF32_ST_VISIBILITY(o)	((o) & 0x03)
-+
-+/* For ELF64 the definitions are the same.  */
-+#define ELF64_ST_VISIBILITY(o)	ELF32_ST_VISIBILITY (o)
-+
-+/* Symbol visibility specification encoded in the st_other field.  */
-+#define STV_DEFAULT	0		/* Default symbol visibility rules */
-+#define STV_INTERNAL	1		/* Processor specific hidden class */
-+#define STV_HIDDEN	2		/* Sym unavailable in other modules */
-+#define STV_PROTECTED	3		/* Not preemptible, not exported */
-+
-+
-+/* Relocation table entry without addend (in section of type SHT_REL).  */
-+
-+typedef struct
-+{
-+  Elf32_Addr	r_offset;		/* Address */
-+  Elf32_Word	r_info;			/* Relocation type and symbol index */
-+} Elf32_Rel;
-+
-+/* I have seen two different definitions of the Elf64_Rel and
-+   Elf64_Rela structures, so we'll leave them out until Novell (or
-+   whoever) gets their act together.  */
-+/* The following, at least, is used on Sparc v9, MIPS, and Alpha.  */
-+
-+typedef struct
-+{
-+  Elf64_Addr	r_offset;		/* Address */
-+  Elf64_Xword	r_info;			/* Relocation type and symbol index */
-+} Elf64_Rel;
-+
-+/* Relocation table entry with addend (in section of type SHT_RELA).  */
-+
-+typedef struct
-+{
-+  Elf32_Addr	r_offset;		/* Address */
-+  Elf32_Word	r_info;			/* Relocation type and symbol index */
-+  Elf32_Sword	r_addend;		/* Addend */
-+} Elf32_Rela;
-+
-+typedef struct
-+{
-+  Elf64_Addr	r_offset;		/* Address */
-+  Elf64_Xword	r_info;			/* Relocation type and symbol index */
-+  Elf64_Sxword	r_addend;		/* Addend */
-+} Elf64_Rela;
-+
-+/* How to extract and insert information held in the r_info field.  */
-+
-+#define ELF32_R_SYM(val)		((val) >> 8)
-+#define ELF32_R_TYPE(val)		((val) & 0xff)
-+#define ELF32_R_INFO(sym, type)		(((sym) << 8) + ((type) & 0xff))
-+
-+#define ELF64_R_SYM(i)			((i) >> 32)
-+#define ELF64_R_TYPE(i)			((i) & 0xffffffff)
-+#define ELF64_R_INFO(sym,type)		((((Elf64_Xword) (sym)) << 32) + (type))
-+
-+/* Program segment header.  */
-+
-+typedef struct
-+{
-+  Elf32_Word	p_type;			/* Segment type */
-+  Elf32_Off	p_offset;		/* Segment file offset */
-+  Elf32_Addr	p_vaddr;		/* Segment virtual address */
-+  Elf32_Addr	p_paddr;		/* Segment physical address */
-+  Elf32_Word	p_filesz;		/* Segment size in file */
-+  Elf32_Word	p_memsz;		/* Segment size in memory */
-+  Elf32_Word	p_flags;		/* Segment flags */
-+  Elf32_Word	p_align;		/* Segment alignment */
-+} Elf32_Phdr;
-+
-+typedef struct
-+{
-+  Elf64_Word	p_type;			/* Segment type */
-+  Elf64_Word	p_flags;		/* Segment flags */
-+  Elf64_Off	p_offset;		/* Segment file offset */
-+  Elf64_Addr	p_vaddr;		/* Segment virtual address */
-+  Elf64_Addr	p_paddr;		/* Segment physical address */
-+  Elf64_Xword	p_filesz;		/* Segment size in file */
-+  Elf64_Xword	p_memsz;		/* Segment size in memory */
-+  Elf64_Xword	p_align;		/* Segment alignment */
-+} Elf64_Phdr;
-+
-+/* Legal values for p_type (segment type).  */
-+
-+#define	PT_NULL		0		/* Program header table entry unused */
-+#define PT_LOAD		1		/* Loadable program segment */
-+#define PT_DYNAMIC	2		/* Dynamic linking information */
-+#define PT_INTERP	3		/* Program interpreter */
-+#define PT_NOTE		4		/* Auxiliary information */
-+#define PT_SHLIB	5		/* Reserved */
-+#define PT_PHDR		6		/* Entry for header table itself */
-+#define PT_TLS		7		/* Thread-local storage segment */
-+#define	PT_NUM		8		/* Number of defined types */
-+#define PT_LOOS		0x60000000	/* Start of OS-specific */
-+#define PT_GNU_EH_FRAME	0x6474e550	/* GCC .eh_frame_hdr segment */
-+#define PT_GNU_STACK	0x6474e551	/* Indicates stack executability */
-+#define PT_LOSUNW	0x6ffffffa
-+#define PT_SUNWBSS	0x6ffffffa	/* Sun Specific segment */
-+#define PT_SUNWSTACK	0x6ffffffb	/* Stack segment */
-+#define PT_HISUNW	0x6fffffff
-+#define PT_HIOS		0x6fffffff	/* End of OS-specific */
-+#define PT_LOPROC	0x70000000	/* Start of processor-specific */
-+#define PT_HIPROC	0x7fffffff	/* End of processor-specific */
-+
-+/* Legal values for p_flags (segment flags).  */
-+
-+#define PF_X		(1 << 0)	/* Segment is executable */
-+#define PF_W		(1 << 1)	/* Segment is writable */
-+#define PF_R		(1 << 2)	/* Segment is readable */
-+#define PF_MASKOS	0x0ff00000	/* OS-specific */
-+#define PF_MASKPROC	0xf0000000	/* Processor-specific */
-+
-+/* Legal values for note segment descriptor types for core files. */
-+
-+#define NT_PRSTATUS	1		/* Contains copy of prstatus struct */
-+#define NT_FPREGSET	2		/* Contains copy of fpregset struct */
-+#define NT_PRPSINFO	3		/* Contains copy of prpsinfo struct */
-+#define NT_PRXREG	4		/* Contains copy of prxregset struct */
-+#define NT_TASKSTRUCT	4		/* Contains copy of task structure */
-+#define NT_PLATFORM	5		/* String from sysinfo(SI_PLATFORM) */
-+#define NT_AUXV		6		/* Contains copy of auxv array */
-+#define NT_GWINDOWS	7		/* Contains copy of gwindows struct */
-+#define NT_ASRS		8		/* Contains copy of asrset struct */
-+#define NT_PSTATUS	10		/* Contains copy of pstatus struct */
-+#define NT_PSINFO	13		/* Contains copy of psinfo struct */
-+#define NT_PRCRED	14		/* Contains copy of prcred struct */
-+#define NT_UTSNAME	15		/* Contains copy of utsname struct */
-+#define NT_LWPSTATUS	16		/* Contains copy of lwpstatus struct */
-+#define NT_LWPSINFO	17		/* Contains copy of lwpinfo struct */
-+#define NT_PRFPXREG	20		/* Contains copy of fprxregset struct*/
-+
-+/* Legal values for the note segment descriptor types for object files.  */
-+
-+#define NT_VERSION	1		/* Contains a version string.  */
-+
-+
-+/* Dynamic section entry.  */
-+
-+typedef struct
-+{
-+  Elf32_Sword	d_tag;			/* Dynamic entry type */
-+  union
-+    {
-+      Elf32_Word d_val;			/* Integer value */
-+      Elf32_Addr d_ptr;			/* Address value */
-+    } d_un;
-+} Elf32_Dyn;
-+
-+typedef struct
-+{
-+  Elf64_Sxword	d_tag;			/* Dynamic entry type */
-+  union
-+    {
-+      Elf64_Xword d_val;		/* Integer value */
-+      Elf64_Addr d_ptr;			/* Address value */
-+    } d_un;
-+} Elf64_Dyn;
-+
-+/* Legal values for d_tag (dynamic entry type).  */
-+
-+#define DT_NULL		0		/* Marks end of dynamic section */
-+#define DT_NEEDED	1		/* Name of needed library */
-+#define DT_PLTRELSZ	2		/* Size in bytes of PLT relocs */
-+#define DT_PLTGOT	3		/* Processor defined value */
-+#define DT_HASH		4		/* Address of symbol hash table */
-+#define DT_STRTAB	5		/* Address of string table */
-+#define DT_SYMTAB	6		/* Address of symbol table */
-+#define DT_RELA		7		/* Address of Rela relocs */
-+#define DT_RELASZ	8		/* Total size of Rela relocs */
-+#define DT_RELAENT	9		/* Size of one Rela reloc */
-+#define DT_STRSZ	10		/* Size of string table */
-+#define DT_SYMENT	11		/* Size of one symbol table entry */
-+#define DT_INIT		12		/* Address of init function */
-+#define DT_FINI		13		/* Address of termination function */
-+#define DT_SONAME	14		/* Name of shared object */
-+#define DT_RPATH	15		/* Library search path (deprecated) */
-+#define DT_SYMBOLIC	16		/* Start symbol search here */
-+#define DT_REL		17		/* Address of Rel relocs */
-+#define DT_RELSZ	18		/* Total size of Rel relocs */
-+#define DT_RELENT	19		/* Size of one Rel reloc */
-+#define DT_PLTREL	20		/* Type of reloc in PLT */
-+#define DT_DEBUG	21		/* For debugging; unspecified */
-+#define DT_TEXTREL	22		/* Reloc might modify .text */
-+#define DT_JMPREL	23		/* Address of PLT relocs */
-+#define	DT_BIND_NOW	24		/* Process relocations of object */
-+#define	DT_INIT_ARRAY	25		/* Array with addresses of init fct */
-+#define	DT_FINI_ARRAY	26		/* Array with addresses of fini fct */
-+#define	DT_INIT_ARRAYSZ	27		/* Size in bytes of DT_INIT_ARRAY */
-+#define	DT_FINI_ARRAYSZ	28		/* Size in bytes of DT_FINI_ARRAY */
-+#define DT_RUNPATH	29		/* Library search path */
-+#define DT_FLAGS	30		/* Flags for the object being loaded */
-+#define DT_ENCODING	32		/* Start of encoded range */
-+#define DT_PREINIT_ARRAY 32		/* Array with addresses of preinit fct*/
-+#define DT_PREINIT_ARRAYSZ 33		/* size in bytes of DT_PREINIT_ARRAY */
-+#define	DT_NUM		34		/* Number used */
-+#define DT_LOOS		0x6000000d	/* Start of OS-specific */
-+#define DT_HIOS		0x6ffff000	/* End of OS-specific */
-+#define DT_LOPROC	0x70000000	/* Start of processor-specific */
-+#define DT_HIPROC	0x7fffffff	/* End of processor-specific */
-+#define	DT_PROCNUM	DT_MIPS_NUM	/* Most used by any processor */
-+
-+/* DT_* entries which fall between DT_VALRNGHI & DT_VALRNGLO use the
-+   Dyn.d_un.d_val field of the Elf*_Dyn structure.  This follows Sun's
-+   approach.  */
-+#define DT_VALRNGLO	0x6ffffd00
-+#define DT_GNU_PRELINKED 0x6ffffdf5	/* Prelinking timestamp */
-+#define DT_GNU_CONFLICTSZ 0x6ffffdf6	/* Size of conflict section */
-+#define DT_GNU_LIBLISTSZ 0x6ffffdf7	/* Size of library list */
-+#define DT_CHECKSUM	0x6ffffdf8
-+#define DT_PLTPADSZ	0x6ffffdf9
-+#define DT_MOVEENT	0x6ffffdfa
-+#define DT_MOVESZ	0x6ffffdfb
-+#define DT_FEATURE_1	0x6ffffdfc	/* Feature selection (DTF_*).  */
-+#define DT_POSFLAG_1	0x6ffffdfd	/* Flags for DT_* entries, effecting
-+					   the following DT_* entry.  */
-+#define DT_SYMINSZ	0x6ffffdfe	/* Size of syminfo table (in bytes) */
-+#define DT_SYMINENT	0x6ffffdff	/* Entry size of syminfo */
-+#define DT_VALRNGHI	0x6ffffdff
-+#define DT_VALTAGIDX(tag)	(DT_VALRNGHI - (tag))	/* Reverse order! */
-+#define DT_VALNUM 12
-+
-+/* DT_* entries which fall between DT_ADDRRNGHI & DT_ADDRRNGLO use the
-+   Dyn.d_un.d_ptr field of the Elf*_Dyn structure.
-+
-+   If any adjustment is made to the ELF object after it has been
-+   built these entries will need to be adjusted.  */
-+#define DT_ADDRRNGLO	0x6ffffe00
-+#define DT_GNU_CONFLICT	0x6ffffef8	/* Start of conflict section */
-+#define DT_GNU_LIBLIST	0x6ffffef9	/* Library list */
-+#define DT_CONFIG	0x6ffffefa	/* Configuration information.  */
-+#define DT_DEPAUDIT	0x6ffffefb	/* Dependency auditing.  */
-+#define DT_AUDIT	0x6ffffefc	/* Object auditing.  */
-+#define	DT_PLTPAD	0x6ffffefd	/* PLT padding.  */
-+#define	DT_MOVETAB	0x6ffffefe	/* Move table.  */
-+#define DT_SYMINFO	0x6ffffeff	/* Syminfo table.  */
-+#define DT_ADDRRNGHI	0x6ffffeff
-+#define DT_ADDRTAGIDX(tag)	(DT_ADDRRNGHI - (tag))	/* Reverse order! */
-+#define DT_ADDRNUM 10
-+
-+/* The versioning entry types.  The next are defined as part of the
-+   GNU extension.  */
-+#define DT_VERSYM	0x6ffffff0
-+
-+#define DT_RELACOUNT	0x6ffffff9
-+#define DT_RELCOUNT	0x6ffffffa
-+
-+/* These were chosen by Sun.  */
-+#define DT_FLAGS_1	0x6ffffffb	/* State flags, see DF_1_* below.  */
-+#define	DT_VERDEF	0x6ffffffc	/* Address of version definition
-+					   table */
-+#define	DT_VERDEFNUM	0x6ffffffd	/* Number of version definitions */
-+#define	DT_VERNEED	0x6ffffffe	/* Address of table with needed
-+					   versions */
-+#define	DT_VERNEEDNUM	0x6fffffff	/* Number of needed versions */
-+#define DT_VERSIONTAGIDX(tag)	(DT_VERNEEDNUM - (tag))	/* Reverse order! */
-+#define DT_VERSIONTAGNUM 16
-+
-+/* Sun added these machine-independent extensions in the "processor-specific"
-+   range.  Be compatible.  */
-+#define DT_AUXILIARY    0x7ffffffd      /* Shared object to load before self */
-+#define DT_FILTER       0x7fffffff      /* Shared object to get values from */
-+#define DT_EXTRATAGIDX(tag)	((Elf32_Word)-((Elf32_Sword) (tag) <<1>>1)-1)
-+#define DT_EXTRANUM	3
-+
-+/* Values of `d_un.d_val' in the DT_FLAGS entry.  */
-+#define DF_ORIGIN	0x00000001	/* Object may use DF_ORIGIN */
-+#define DF_SYMBOLIC	0x00000002	/* Symbol resolutions starts here */
-+#define DF_TEXTREL	0x00000004	/* Object contains text relocations */
-+#define DF_BIND_NOW	0x00000008	/* No lazy binding for this object */
-+#define DF_STATIC_TLS	0x00000010	/* Module uses the static TLS model */
-+
-+/* State flags selectable in the `d_un.d_val' element of the DT_FLAGS_1
-+   entry in the dynamic section.  */
-+#define DF_1_NOW	0x00000001	/* Set RTLD_NOW for this object.  */
-+#define DF_1_GLOBAL	0x00000002	/* Set RTLD_GLOBAL for this object.  */
-+#define DF_1_GROUP	0x00000004	/* Set RTLD_GROUP for this object.  */
-+#define DF_1_NODELETE	0x00000008	/* Set RTLD_NODELETE for this object.*/
-+#define DF_1_LOADFLTR	0x00000010	/* Trigger filtee loading at runtime.*/
-+#define DF_1_INITFIRST	0x00000020	/* Set RTLD_INITFIRST for this object*/
-+#define DF_1_NOOPEN	0x00000040	/* Set RTLD_NOOPEN for this object.  */
-+#define DF_1_ORIGIN	0x00000080	/* $ORIGIN must be handled.  */
-+#define DF_1_DIRECT	0x00000100	/* Direct binding enabled.  */
-+#define DF_1_TRANS	0x00000200
-+#define DF_1_INTERPOSE	0x00000400	/* Object is used to interpose.  */
-+#define DF_1_NODEFLIB	0x00000800	/* Ignore default lib search path.  */
-+#define DF_1_NODUMP	0x00001000	/* Object can't be dldump'ed.  */
-+#define DF_1_CONFALT	0x00002000	/* Configuration alternative created.*/
-+#define DF_1_ENDFILTEE	0x00004000	/* Filtee terminates filters search. */
-+#define	DF_1_DISPRELDNE	0x00008000	/* Disp reloc applied at build time. */
-+#define	DF_1_DISPRELPND	0x00010000	/* Disp reloc applied at run-time.  */
-+
-+/* Flags for the feature selection in DT_FEATURE_1.  */
-+#define DTF_1_PARINIT	0x00000001
-+#define DTF_1_CONFEXP	0x00000002
-+
-+/* Flags in the DT_POSFLAG_1 entry effecting only the next DT_* entry.  */
-+#define DF_P1_LAZYLOAD	0x00000001	/* Lazyload following object.  */
-+#define DF_P1_GROUPPERM	0x00000002	/* Symbols from next object are not
-+					   generally available.  */
-+
-+/* Version definition sections.  */
-+
-+typedef struct
-+{
-+  Elf32_Half	vd_version;		/* Version revision */
-+  Elf32_Half	vd_flags;		/* Version information */
-+  Elf32_Half	vd_ndx;			/* Version Index */
-+  Elf32_Half	vd_cnt;			/* Number of associated aux entries */
-+  Elf32_Word	vd_hash;		/* Version name hash value */
-+  Elf32_Word	vd_aux;			/* Offset in bytes to verdaux array */
-+  Elf32_Word	vd_next;		/* Offset in bytes to next verdef
-+					   entry */
-+} Elf32_Verdef;
-+
-+typedef struct
-+{
-+  Elf64_Half	vd_version;		/* Version revision */
-+  Elf64_Half	vd_flags;		/* Version information */
-+  Elf64_Half	vd_ndx;			/* Version Index */
-+  Elf64_Half	vd_cnt;			/* Number of associated aux entries */
-+  Elf64_Word	vd_hash;		/* Version name hash value */
-+  Elf64_Word	vd_aux;			/* Offset in bytes to verdaux array */
-+  Elf64_Word	vd_next;		/* Offset in bytes to next verdef
-+					   entry */
-+} Elf64_Verdef;
-+
-+
-+/* Legal values for vd_version (version revision).  */
-+#define VER_DEF_NONE	0		/* No version */
-+#define VER_DEF_CURRENT	1		/* Current version */
-+#define VER_DEF_NUM	2		/* Given version number */
-+
-+/* Legal values for vd_flags (version information flags).  */
-+#define VER_FLG_BASE	0x1		/* Version definition of file itself */
-+#define VER_FLG_WEAK	0x2		/* Weak version identifier */
-+
-+/* Versym symbol index values.  */
-+#define	VER_NDX_LOCAL		0	/* Symbol is local.  */
-+#define	VER_NDX_GLOBAL		1	/* Symbol is global.  */
-+#define	VER_NDX_LORESERVE	0xff00	/* Beginning of reserved entries.  */
-+#define	VER_NDX_ELIMINATE	0xff01	/* Symbol is to be eliminated.  */
-+
-+/* Auxialiary version information.  */
-+
-+typedef struct
-+{
-+  Elf32_Word	vda_name;		/* Version or dependency names */
-+  Elf32_Word	vda_next;		/* Offset in bytes to next verdaux
-+					   entry */
-+} Elf32_Verdaux;
-+
-+typedef struct
-+{
-+  Elf64_Word	vda_name;		/* Version or dependency names */
-+  Elf64_Word	vda_next;		/* Offset in bytes to next verdaux
-+					   entry */
-+} Elf64_Verdaux;
-+
-+
-+/* Version dependency section.  */
-+
-+typedef struct
-+{
-+  Elf32_Half	vn_version;		/* Version of structure */
-+  Elf32_Half	vn_cnt;			/* Number of associated aux entries */
-+  Elf32_Word	vn_file;		/* Offset of filename for this
-+					   dependency */
-+  Elf32_Word	vn_aux;			/* Offset in bytes to vernaux array */
-+  Elf32_Word	vn_next;		/* Offset in bytes to next verneed
-+					   entry */
-+} Elf32_Verneed;
-+
-+typedef struct
-+{
-+  Elf64_Half	vn_version;		/* Version of structure */
-+  Elf64_Half	vn_cnt;			/* Number of associated aux entries */
-+  Elf64_Word	vn_file;		/* Offset of filename for this
-+					   dependency */
-+  Elf64_Word	vn_aux;			/* Offset in bytes to vernaux array */
-+  Elf64_Word	vn_next;		/* Offset in bytes to next verneed
-+					   entry */
-+} Elf64_Verneed;
-+
-+
-+/* Legal values for vn_version (version revision).  */
-+#define VER_NEED_NONE	 0		/* No version */
-+#define VER_NEED_CURRENT 1		/* Current version */
-+#define VER_NEED_NUM	 2		/* Given version number */
-+
-+/* Auxiliary needed version information.  */
-+
-+typedef struct
-+{
-+  Elf32_Word	vna_hash;		/* Hash value of dependency name */
-+  Elf32_Half	vna_flags;		/* Dependency specific information */
-+  Elf32_Half	vna_other;		/* Unused */
-+  Elf32_Word	vna_name;		/* Dependency name string offset */
-+  Elf32_Word	vna_next;		/* Offset in bytes to next vernaux
-+					   entry */
-+} Elf32_Vernaux;
-+
-+typedef struct
-+{
-+  Elf64_Word	vna_hash;		/* Hash value of dependency name */
-+  Elf64_Half	vna_flags;		/* Dependency specific information */
-+  Elf64_Half	vna_other;		/* Unused */
-+  Elf64_Word	vna_name;		/* Dependency name string offset */
-+  Elf64_Word	vna_next;		/* Offset in bytes to next vernaux
-+					   entry */
-+} Elf64_Vernaux;
-+
-+
-+/* Legal values for vna_flags.  */
-+#define VER_FLG_WEAK	0x2		/* Weak version identifier */
-+
-+
-+/* Auxiliary vector.  */
-+
-+/* This vector is normally only used by the program interpreter.  The
-+   usual definition in an ABI supplement uses the name auxv_t.  The
-+   vector is not usually defined in a standard <elf.h> file, but it
-+   can't hurt.  We rename it to avoid conflicts.  The sizes of these
-+   types are an arrangement between the exec server and the program
-+   interpreter, so we don't fully specify them here.  */
-+
-+typedef struct
-+{
-+  int a_type;			/* Entry type */
-+  union
-+    {
-+      long int a_val;		/* Integer value */
-+      void *a_ptr;		/* Pointer value */
-+      void (*a_fcn) (void);	/* Function pointer value */
-+    } a_un;
-+} Elf32_auxv_t;
-+
-+typedef struct
-+{
-+  long int a_type;		/* Entry type */
-+  union
-+    {
-+      long int a_val;		/* Integer value */
-+      void *a_ptr;		/* Pointer value */
-+      void (*a_fcn) (void);	/* Function pointer value */
-+    } a_un;
-+} Elf64_auxv_t;
-+
-+/* Legal values for a_type (entry type).  */
-+
-+#define AT_NULL		0		/* End of vector */
-+#define AT_IGNORE	1		/* Entry should be ignored */
-+#define AT_EXECFD	2		/* File descriptor of program */
-+#define AT_PHDR		3		/* Program headers for program */
-+#define AT_PHENT	4		/* Size of program header entry */
-+#define AT_PHNUM	5		/* Number of program headers */
-+#define AT_PAGESZ	6		/* System page size */
-+#define AT_BASE		7		/* Base address of interpreter */
-+#define AT_FLAGS	8		/* Flags */
-+#define AT_ENTRY	9		/* Entry point of program */
-+#define AT_NOTELF	10		/* Program is not ELF */
-+#define AT_UID		11		/* Real uid */
-+#define AT_EUID		12		/* Effective uid */
-+#define AT_GID		13		/* Real gid */
-+#define AT_EGID		14		/* Effective gid */
-+#define AT_CLKTCK	17		/* Frequency of times() */
-+
-+/* Some more special a_type values describing the hardware.  */
-+#define AT_PLATFORM	15		/* String identifying platform.  */
-+#define AT_HWCAP	16		/* Machine dependent hints about
-+					   processor capabilities.  */
-+
-+/* This entry gives some information about the FPU initialization
-+   performed by the kernel.  */
-+#define AT_FPUCW	18		/* Used FPU control word.  */
-+
-+/* Cache block sizes.  */
-+#define AT_DCACHEBSIZE	19		/* Data cache block size.  */
-+#define AT_ICACHEBSIZE	20		/* Instruction cache block size.  */
-+#define AT_UCACHEBSIZE	21		/* Unified cache block size.  */
-+
-+/* A special ignored value for PPC, used by the kernel to control the
-+   interpretation of the AUXV. Must be > 16.  */
-+#define AT_IGNOREPPC	22		/* Entry should be ignored.  */
-+
-+#define	AT_SECURE	23		/* Boolean, was exec setuid-like?  */
-+
-+/* Pointer to the global system page used for system calls and other
-+   nice things.  */
-+#define AT_SYSINFO	32
-+#define AT_SYSINFO_EHDR	33
-+
-+
-+/* Note section contents.  Each entry in the note section begins with
-+   a header of a fixed form.  */
-+
-+typedef struct
-+{
-+  Elf32_Word n_namesz;			/* Length of the note's name.  */
-+  Elf32_Word n_descsz;			/* Length of the note's descriptor.  */
-+  Elf32_Word n_type;			/* Type of the note.  */
-+} Elf32_Nhdr;
-+
-+typedef struct
-+{
-+  Elf64_Word n_namesz;			/* Length of the note's name.  */
-+  Elf64_Word n_descsz;			/* Length of the note's descriptor.  */
-+  Elf64_Word n_type;			/* Type of the note.  */
-+} Elf64_Nhdr;
-+
-+/* Known names of notes.  */
-+
-+/* Solaris entries in the note section have this name.  */
-+#define ELF_NOTE_SOLARIS	"SUNW Solaris"
-+
-+/* Note entries for GNU systems have this name.  */
-+#define ELF_NOTE_GNU		"GNU"
-+
-+
-+/* Defined types of notes for Solaris.  */
-+
-+/* Value of descriptor (one word) is desired pagesize for the binary.  */
-+#define ELF_NOTE_PAGESIZE_HINT	1
-+
-+
-+/* Defined note types for GNU systems.  */
-+
-+/* ABI information.  The descriptor consists of words:
-+   word 0: OS descriptor
-+   word 1: major version of the ABI
-+   word 2: minor version of the ABI
-+   word 3: subminor version of the ABI
-+*/
-+#define ELF_NOTE_ABI		1
-+
-+/* Known OSes.  These value can appear in word 0 of an ELF_NOTE_ABI
-+   note section entry.  */
-+#define ELF_NOTE_OS_LINUX	0
-+#define ELF_NOTE_OS_GNU		1
-+#define ELF_NOTE_OS_SOLARIS2	2
-+#define ELF_NOTE_OS_FREEBSD	3
-+
-+
-+/* Move records.  */
-+typedef struct
-+{
-+  Elf32_Xword m_value;		/* Symbol value.  */
-+  Elf32_Word m_info;		/* Size and index.  */
-+  Elf32_Word m_poffset;		/* Symbol offset.  */
-+  Elf32_Half m_repeat;		/* Repeat count.  */
-+  Elf32_Half m_stride;		/* Stride info.  */
-+} Elf32_Move;
-+
-+typedef struct
-+{
-+  Elf64_Xword m_value;		/* Symbol value.  */
-+  Elf64_Xword m_info;		/* Size and index.  */
-+  Elf64_Xword m_poffset;	/* Symbol offset.  */
-+  Elf64_Half m_repeat;		/* Repeat count.  */
-+  Elf64_Half m_stride;		/* Stride info.  */
-+} Elf64_Move;
-+
-+/* Macro to construct move records.  */
-+#define ELF32_M_SYM(info)	((info) >> 8)
-+#define ELF32_M_SIZE(info)	((unsigned char) (info))
-+#define ELF32_M_INFO(sym, size)	(((sym) << 8) + (unsigned char) (size))
-+
-+#define ELF64_M_SYM(info)	ELF32_M_SYM (info)
-+#define ELF64_M_SIZE(info)	ELF32_M_SIZE (info)
-+#define ELF64_M_INFO(sym, size)	ELF32_M_INFO (sym, size)
-+
-+
-+/* Motorola 68k specific definitions.  */
-+
-+/* Values for Elf32_Ehdr.e_flags.  */
-+#define EF_CPU32	0x00810000
-+
-+/* m68k relocs.  */
-+
-+#define R_68K_NONE	0		/* No reloc */
-+#define R_68K_32	1		/* Direct 32 bit  */
-+#define R_68K_16	2		/* Direct 16 bit  */
-+#define R_68K_8		3		/* Direct 8 bit  */
-+#define R_68K_PC32	4		/* PC relative 32 bit */
-+#define R_68K_PC16	5		/* PC relative 16 bit */
-+#define R_68K_PC8	6		/* PC relative 8 bit */
-+#define R_68K_GOT32	7		/* 32 bit PC relative GOT entry */
-+#define R_68K_GOT16	8		/* 16 bit PC relative GOT entry */
-+#define R_68K_GOT8	9		/* 8 bit PC relative GOT entry */
-+#define R_68K_GOT32O	10		/* 32 bit GOT offset */
-+#define R_68K_GOT16O	11		/* 16 bit GOT offset */
-+#define R_68K_GOT8O	12		/* 8 bit GOT offset */
-+#define R_68K_PLT32	13		/* 32 bit PC relative PLT address */
-+#define R_68K_PLT16	14		/* 16 bit PC relative PLT address */
-+#define R_68K_PLT8	15		/* 8 bit PC relative PLT address */
-+#define R_68K_PLT32O	16		/* 32 bit PLT offset */
-+#define R_68K_PLT16O	17		/* 16 bit PLT offset */
-+#define R_68K_PLT8O	18		/* 8 bit PLT offset */
-+#define R_68K_COPY	19		/* Copy symbol at runtime */
-+#define R_68K_GLOB_DAT	20		/* Create GOT entry */
-+#define R_68K_JMP_SLOT	21		/* Create PLT entry */
-+#define R_68K_RELATIVE	22		/* Adjust by program base */
-+/* Keep this the last entry.  */
-+#define R_68K_NUM	23
-+
-+/* Intel 80386 specific definitions.  */
-+
-+/* i386 relocs.  */
-+
-+#define R_386_NONE	   0		/* No reloc */
-+#define R_386_32	   1		/* Direct 32 bit  */
-+#define R_386_PC32	   2		/* PC relative 32 bit */
-+#define R_386_GOT32	   3		/* 32 bit GOT entry */
-+#define R_386_PLT32	   4		/* 32 bit PLT address */
-+#define R_386_COPY	   5		/* Copy symbol at runtime */
-+#define R_386_GLOB_DAT	   6		/* Create GOT entry */
-+#define R_386_JMP_SLOT	   7		/* Create PLT entry */
-+#define R_386_RELATIVE	   8		/* Adjust by program base */
-+#define R_386_GOTOFF	   9		/* 32 bit offset to GOT */
-+#define R_386_GOTPC	   10		/* 32 bit PC relative offset to GOT */
-+#define R_386_32PLT	   11
-+#define R_386_TLS_TPOFF	   14		/* Offset in static TLS block */
-+#define R_386_TLS_IE	   15		/* Address of GOT entry for static TLS
-+					   block offset */
-+#define R_386_TLS_GOTIE	   16		/* GOT entry for static TLS block
-+					   offset */
-+#define R_386_TLS_LE	   17		/* Offset relative to static TLS
-+					   block */
-+#define R_386_TLS_GD	   18		/* Direct 32 bit for GNU version of
-+					   general dynamic thread local data */
-+#define R_386_TLS_LDM	   19		/* Direct 32 bit for GNU version of
-+					   local dynamic thread local data
-+					   in LE code */
-+#define R_386_16	   20
-+#define R_386_PC16	   21
-+#define R_386_8		   22
-+#define R_386_PC8	   23
-+#define R_386_TLS_GD_32	   24		/* Direct 32 bit for general dynamic
-+					   thread local data */
-+#define R_386_TLS_GD_PUSH  25		/* Tag for pushl in GD TLS code */
-+#define R_386_TLS_GD_CALL  26		/* Relocation for call to
-+					   __tls_get_addr() */
-+#define R_386_TLS_GD_POP   27		/* Tag for popl in GD TLS code */
-+#define R_386_TLS_LDM_32   28		/* Direct 32 bit for local dynamic
-+					   thread local data in LE code */
-+#define R_386_TLS_LDM_PUSH 29		/* Tag for pushl in LDM TLS code */
-+#define R_386_TLS_LDM_CALL 30		/* Relocation for call to
-+					   __tls_get_addr() in LDM code */
-+#define R_386_TLS_LDM_POP  31		/* Tag for popl in LDM TLS code */
-+#define R_386_TLS_LDO_32   32		/* Offset relative to TLS block */
-+#define R_386_TLS_IE_32	   33		/* GOT entry for negated static TLS
-+					   block offset */
-+#define R_386_TLS_LE_32	   34		/* Negated offset relative to static
-+					   TLS block */
-+#define R_386_TLS_DTPMOD32 35		/* ID of module containing symbol */
-+#define R_386_TLS_DTPOFF32 36		/* Offset in TLS block */
-+#define R_386_TLS_TPOFF32  37		/* Negated offset in static TLS block */
-+/* Keep this the last entry.  */
-+#define R_386_NUM	   38
-+
-+/* SUN SPARC specific definitions.  */
-+
-+/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
-+
-+#define STT_REGISTER	13		/* Global register reserved to app. */
-+
-+/* Values for Elf64_Ehdr.e_flags.  */
-+
-+#define EF_SPARCV9_MM		3
-+#define EF_SPARCV9_TSO		0
-+#define EF_SPARCV9_PSO		1
-+#define EF_SPARCV9_RMO		2
-+#define EF_SPARC_LEDATA		0x800000 /* little endian data */
-+#define EF_SPARC_EXT_MASK	0xFFFF00
-+#define EF_SPARC_32PLUS		0x000100 /* generic V8+ features */
-+#define EF_SPARC_SUN_US1	0x000200 /* Sun UltraSPARC1 extensions */
-+#define EF_SPARC_HAL_R1		0x000400 /* HAL R1 extensions */
-+#define EF_SPARC_SUN_US3	0x000800 /* Sun UltraSPARCIII extensions */
-+
-+/* SPARC relocs.  */
-+
-+#define R_SPARC_NONE		0	/* No reloc */
-+#define R_SPARC_8		1	/* Direct 8 bit */
-+#define R_SPARC_16		2	/* Direct 16 bit */
-+#define R_SPARC_32		3	/* Direct 32 bit */
-+#define R_SPARC_DISP8		4	/* PC relative 8 bit */
-+#define R_SPARC_DISP16		5	/* PC relative 16 bit */
-+#define R_SPARC_DISP32		6	/* PC relative 32 bit */
-+#define R_SPARC_WDISP30		7	/* PC relative 30 bit shifted */
-+#define R_SPARC_WDISP22		8	/* PC relative 22 bit shifted */
-+#define R_SPARC_HI22		9	/* High 22 bit */
-+#define R_SPARC_22		10	/* Direct 22 bit */
-+#define R_SPARC_13		11	/* Direct 13 bit */
-+#define R_SPARC_LO10		12	/* Truncated 10 bit */
-+#define R_SPARC_GOT10		13	/* Truncated 10 bit GOT entry */
-+#define R_SPARC_GOT13		14	/* 13 bit GOT entry */
-+#define R_SPARC_GOT22		15	/* 22 bit GOT entry shifted */
-+#define R_SPARC_PC10		16	/* PC relative 10 bit truncated */
-+#define R_SPARC_PC22		17	/* PC relative 22 bit shifted */
-+#define R_SPARC_WPLT30		18	/* 30 bit PC relative PLT address */
-+#define R_SPARC_COPY		19	/* Copy symbol at runtime */
-+#define R_SPARC_GLOB_DAT	20	/* Create GOT entry */
-+#define R_SPARC_JMP_SLOT	21	/* Create PLT entry */
-+#define R_SPARC_RELATIVE	22	/* Adjust by program base */
-+#define R_SPARC_UA32		23	/* Direct 32 bit unaligned */
-+
-+/* Additional Sparc64 relocs.  */
-+
-+#define R_SPARC_PLT32		24	/* Direct 32 bit ref to PLT entry */
-+#define R_SPARC_HIPLT22		25	/* High 22 bit PLT entry */
-+#define R_SPARC_LOPLT10		26	/* Truncated 10 bit PLT entry */
-+#define R_SPARC_PCPLT32		27	/* PC rel 32 bit ref to PLT entry */
-+#define R_SPARC_PCPLT22		28	/* PC rel high 22 bit PLT entry */
-+#define R_SPARC_PCPLT10		29	/* PC rel trunc 10 bit PLT entry */
-+#define R_SPARC_10		30	/* Direct 10 bit */
-+#define R_SPARC_11		31	/* Direct 11 bit */
-+#define R_SPARC_64		32	/* Direct 64 bit */
-+#define R_SPARC_OLO10		33	/* 10bit with secondary 13bit addend */
-+#define R_SPARC_HH22		34	/* Top 22 bits of direct 64 bit */
-+#define R_SPARC_HM10		35	/* High middle 10 bits of ... */
-+#define R_SPARC_LM22		36	/* Low middle 22 bits of ... */
-+#define R_SPARC_PC_HH22		37	/* Top 22 bits of pc rel 64 bit */
-+#define R_SPARC_PC_HM10		38	/* High middle 10 bit of ... */
-+#define R_SPARC_PC_LM22		39	/* Low miggle 22 bits of ... */
-+#define R_SPARC_WDISP16		40	/* PC relative 16 bit shifted */
-+#define R_SPARC_WDISP19		41	/* PC relative 19 bit shifted */
-+#define R_SPARC_7		43	/* Direct 7 bit */
-+#define R_SPARC_5		44	/* Direct 5 bit */
-+#define R_SPARC_6		45	/* Direct 6 bit */
-+#define R_SPARC_DISP64		46	/* PC relative 64 bit */
-+#define R_SPARC_PLT64		47	/* Direct 64 bit ref to PLT entry */
-+#define R_SPARC_HIX22		48	/* High 22 bit complemented */
-+#define R_SPARC_LOX10		49	/* Truncated 11 bit complemented */
-+#define R_SPARC_H44		50	/* Direct high 12 of 44 bit */
-+#define R_SPARC_M44		51	/* Direct mid 22 of 44 bit */
-+#define R_SPARC_L44		52	/* Direct low 10 of 44 bit */
-+#define R_SPARC_REGISTER	53	/* Global register usage */
-+#define R_SPARC_UA64		54	/* Direct 64 bit unaligned */
-+#define R_SPARC_UA16		55	/* Direct 16 bit unaligned */
-+#define R_SPARC_TLS_GD_HI22	56
-+#define R_SPARC_TLS_GD_LO10	57
-+#define R_SPARC_TLS_GD_ADD	58
-+#define R_SPARC_TLS_GD_CALL	59
-+#define R_SPARC_TLS_LDM_HI22	60
-+#define R_SPARC_TLS_LDM_LO10	61
-+#define R_SPARC_TLS_LDM_ADD	62
-+#define R_SPARC_TLS_LDM_CALL	63
-+#define R_SPARC_TLS_LDO_HIX22	64
-+#define R_SPARC_TLS_LDO_LOX10	65
-+#define R_SPARC_TLS_LDO_ADD	66
-+#define R_SPARC_TLS_IE_HI22	67
-+#define R_SPARC_TLS_IE_LO10	68
-+#define R_SPARC_TLS_IE_LD	69
-+#define R_SPARC_TLS_IE_LDX	70
-+#define R_SPARC_TLS_IE_ADD	71
-+#define R_SPARC_TLS_LE_HIX22	72
-+#define R_SPARC_TLS_LE_LOX10	73
-+#define R_SPARC_TLS_DTPMOD32	74
-+#define R_SPARC_TLS_DTPMOD64	75
-+#define R_SPARC_TLS_DTPOFF32	76
-+#define R_SPARC_TLS_DTPOFF64	77
-+#define R_SPARC_TLS_TPOFF32	78
-+#define R_SPARC_TLS_TPOFF64	79
-+/* Keep this the last entry.  */
-+#define R_SPARC_NUM		80
-+
-+/* For Sparc64, legal values for d_tag of Elf64_Dyn.  */
-+
-+#define DT_SPARC_REGISTER 0x70000001
-+#define DT_SPARC_NUM	2
-+
-+/* Bits present in AT_HWCAP, primarily for Sparc32.  */
-+
-+#define HWCAP_SPARC_FLUSH	1	/* The cpu supports flush insn.  */
-+#define HWCAP_SPARC_STBAR	2
-+#define HWCAP_SPARC_SWAP	4
-+#define HWCAP_SPARC_MULDIV	8
-+#define HWCAP_SPARC_V9		16	/* The cpu is v9, so v8plus is ok.  */
-+#define HWCAP_SPARC_ULTRA3	32
-+
-+/* MIPS R3000 specific definitions.  */
-+
-+/* Legal values for e_flags field of Elf32_Ehdr.  */
-+
-+#define EF_MIPS_NOREORDER   1		/* A .noreorder directive was used */
-+#define EF_MIPS_PIC	    2		/* Contains PIC code */
-+#define EF_MIPS_CPIC	    4		/* Uses PIC calling sequence */
-+#define EF_MIPS_XGOT	    8
-+#define EF_MIPS_64BIT_WHIRL 16
-+#define EF_MIPS_ABI2	    32
-+#define EF_MIPS_ABI_ON32    64
-+#define EF_MIPS_ARCH	    0xf0000000	/* MIPS architecture level */
-+
-+/* Legal values for MIPS architecture level.  */
-+
-+#define EF_MIPS_ARCH_1	    0x00000000	/* -mips1 code.  */
-+#define EF_MIPS_ARCH_2	    0x10000000	/* -mips2 code.  */
-+#define EF_MIPS_ARCH_3	    0x20000000	/* -mips3 code.  */
-+#define EF_MIPS_ARCH_4	    0x30000000	/* -mips4 code.  */
-+#define EF_MIPS_ARCH_5	    0x40000000	/* -mips5 code.  */
-+#define EF_MIPS_ARCH_32	    0x60000000	/* MIPS32 code.  */
-+#define EF_MIPS_ARCH_64	    0x70000000	/* MIPS64 code.  */
-+
-+/* The following are non-official names and should not be used.  */
-+
-+#define E_MIPS_ARCH_1	  0x00000000	/* -mips1 code.  */
-+#define E_MIPS_ARCH_2	  0x10000000	/* -mips2 code.  */
-+#define E_MIPS_ARCH_3	  0x20000000	/* -mips3 code.  */
-+#define E_MIPS_ARCH_4	  0x30000000	/* -mips4 code.  */
-+#define E_MIPS_ARCH_5	  0x40000000	/* -mips5 code.  */
-+#define E_MIPS_ARCH_32	  0x60000000	/* MIPS32 code.  */
-+#define E_MIPS_ARCH_64	  0x70000000	/* MIPS64 code.  */
-+
-+/* Special section indices.  */
-+
-+#define SHN_MIPS_ACOMMON    0xff00	/* Allocated common symbols */
-+#define SHN_MIPS_TEXT	    0xff01	/* Allocated test symbols.  */
-+#define SHN_MIPS_DATA	    0xff02	/* Allocated data symbols.  */
-+#define SHN_MIPS_SCOMMON    0xff03	/* Small common symbols */
-+#define SHN_MIPS_SUNDEFINED 0xff04	/* Small undefined symbols */
-+
-+/* Legal values for sh_type field of Elf32_Shdr.  */
-+
-+#define SHT_MIPS_LIBLIST       0x70000000 /* Shared objects used in link */
-+#define SHT_MIPS_MSYM	       0x70000001
-+#define SHT_MIPS_CONFLICT      0x70000002 /* Conflicting symbols */
-+#define SHT_MIPS_GPTAB	       0x70000003 /* Global data area sizes */
-+#define SHT_MIPS_UCODE	       0x70000004 /* Reserved for SGI/MIPS compilers */
-+#define SHT_MIPS_DEBUG	       0x70000005 /* MIPS ECOFF debugging information*/
-+#define SHT_MIPS_REGINFO       0x70000006 /* Register usage information */
-+#define SHT_MIPS_PACKAGE       0x70000007
-+#define SHT_MIPS_PACKSYM       0x70000008
-+#define SHT_MIPS_RELD	       0x70000009
-+#define SHT_MIPS_IFACE         0x7000000b
-+#define SHT_MIPS_CONTENT       0x7000000c
-+#define SHT_MIPS_OPTIONS       0x7000000d /* Miscellaneous options.  */
-+#define SHT_MIPS_SHDR	       0x70000010
-+#define SHT_MIPS_FDESC	       0x70000011
-+#define SHT_MIPS_EXTSYM	       0x70000012
-+#define SHT_MIPS_DENSE	       0x70000013
-+#define SHT_MIPS_PDESC	       0x70000014
-+#define SHT_MIPS_LOCSYM	       0x70000015
-+#define SHT_MIPS_AUXSYM	       0x70000016
-+#define SHT_MIPS_OPTSYM	       0x70000017
-+#define SHT_MIPS_LOCSTR	       0x70000018
-+#define SHT_MIPS_LINE	       0x70000019
-+#define SHT_MIPS_RFDESC	       0x7000001a
-+#define SHT_MIPS_DELTASYM      0x7000001b
-+#define SHT_MIPS_DELTAINST     0x7000001c
-+#define SHT_MIPS_DELTACLASS    0x7000001d
-+#define SHT_MIPS_DWARF         0x7000001e /* DWARF debugging information.  */
-+#define SHT_MIPS_DELTADECL     0x7000001f
-+#define SHT_MIPS_SYMBOL_LIB    0x70000020
-+#define SHT_MIPS_EVENTS	       0x70000021 /* Event section.  */
-+#define SHT_MIPS_TRANSLATE     0x70000022
-+#define SHT_MIPS_PIXIE	       0x70000023
-+#define SHT_MIPS_XLATE	       0x70000024
-+#define SHT_MIPS_XLATE_DEBUG   0x70000025
-+#define SHT_MIPS_WHIRL	       0x70000026
-+#define SHT_MIPS_EH_REGION     0x70000027
-+#define SHT_MIPS_XLATE_OLD     0x70000028
-+#define SHT_MIPS_PDR_EXCEPTION 0x70000029
-+
-+/* Legal values for sh_flags field of Elf32_Shdr.  */
-+
-+#define SHF_MIPS_GPREL	 0x10000000	/* Must be part of global data area */
-+#define SHF_MIPS_MERGE	 0x20000000
-+#define SHF_MIPS_ADDR	 0x40000000
-+#define SHF_MIPS_STRINGS 0x80000000
-+#define SHF_MIPS_NOSTRIP 0x08000000
-+#define SHF_MIPS_LOCAL	 0x04000000
-+#define SHF_MIPS_NAMES	 0x02000000
-+#define SHF_MIPS_NODUPE	 0x01000000
-+
-+
-+/* Symbol tables.  */
-+
-+/* MIPS specific values for `st_other'.  */
-+#define STO_MIPS_DEFAULT		0x0
-+#define STO_MIPS_INTERNAL		0x1
-+#define STO_MIPS_HIDDEN			0x2
-+#define STO_MIPS_PROTECTED		0x3
-+#define STO_MIPS_SC_ALIGN_UNUSED	0xff
-+
-+/* MIPS specific values for `st_info'.  */
-+#define STB_MIPS_SPLIT_COMMON		13
-+
-+/* Entries found in sections of type SHT_MIPS_GPTAB.  */
-+
-+typedef union
-+{
-+  struct
-+    {
-+      Elf32_Word gt_current_g_value;	/* -G value used for compilation */
-+      Elf32_Word gt_unused;		/* Not used */
-+    } gt_header;			/* First entry in section */
-+  struct
-+    {
-+      Elf32_Word gt_g_value;		/* If this value were used for -G */
-+      Elf32_Word gt_bytes;		/* This many bytes would be used */
-+    } gt_entry;				/* Subsequent entries in section */
-+} Elf32_gptab;
-+
-+/* Entry found in sections of type SHT_MIPS_REGINFO.  */
-+
-+typedef struct
-+{
-+  Elf32_Word	ri_gprmask;		/* General registers used */
-+  Elf32_Word	ri_cprmask[4];		/* Coprocessor registers used */
-+  Elf32_Sword	ri_gp_value;		/* $gp register value */
-+} Elf32_RegInfo;
-+
-+/* Entries found in sections of type SHT_MIPS_OPTIONS.  */
-+
-+typedef struct
-+{
-+  unsigned char kind;		/* Determines interpretation of the
-+				   variable part of descriptor.  */
-+  unsigned char size;		/* Size of descriptor, including header.  */
-+  Elf32_Section section;	/* Section header index of section affected,
-+				   0 for global options.  */
-+  Elf32_Word info;		/* Kind-specific information.  */
-+} Elf_Options;
-+
-+/* Values for `kind' field in Elf_Options.  */
-+
-+#define ODK_NULL	0	/* Undefined.  */
-+#define ODK_REGINFO	1	/* Register usage information.  */
-+#define ODK_EXCEPTIONS	2	/* Exception processing options.  */
-+#define ODK_PAD		3	/* Section padding options.  */
-+#define ODK_HWPATCH	4	/* Hardware workarounds performed */
-+#define ODK_FILL	5	/* record the fill value used by the linker. */
-+#define ODK_TAGS	6	/* reserve space for desktop tools to write. */
-+#define ODK_HWAND	7	/* HW workarounds.  'AND' bits when merging. */
-+#define ODK_HWOR	8	/* HW workarounds.  'OR' bits when merging.  */
-+
-+/* Values for `info' in Elf_Options for ODK_EXCEPTIONS entries.  */
-+
-+#define OEX_FPU_MIN	0x1f	/* FPE's which MUST be enabled.  */
-+#define OEX_FPU_MAX	0x1f00	/* FPE's which MAY be enabled.  */
-+#define OEX_PAGE0	0x10000	/* page zero must be mapped.  */
-+#define OEX_SMM		0x20000	/* Force sequential memory mode?  */
-+#define OEX_FPDBUG	0x40000	/* Force floating point debug mode?  */
-+#define OEX_PRECISEFP	OEX_FPDBUG
-+#define OEX_DISMISS	0x80000	/* Dismiss invalid address faults?  */
-+
-+#define OEX_FPU_INVAL	0x10
-+#define OEX_FPU_DIV0	0x08
-+#define OEX_FPU_OFLO	0x04
-+#define OEX_FPU_UFLO	0x02
-+#define OEX_FPU_INEX	0x01
-+
-+/* Masks for `info' in Elf_Options for an ODK_HWPATCH entry.  */
-+
-+#define OHW_R4KEOP	0x1	/* R4000 end-of-page patch.  */
-+#define OHW_R8KPFETCH	0x2	/* may need R8000 prefetch patch.  */
-+#define OHW_R5KEOP	0x4	/* R5000 end-of-page patch.  */
-+#define OHW_R5KCVTL	0x8	/* R5000 cvt.[ds].l bug.  clean=1.  */
-+
-+#define OPAD_PREFIX	0x1
-+#define OPAD_POSTFIX	0x2
-+#define OPAD_SYMBOL	0x4
-+
-+/* Entry found in `.options' section.  */
-+
-+typedef struct
-+{
-+  Elf32_Word hwp_flags1;	/* Extra flags.  */
-+  Elf32_Word hwp_flags2;	/* Extra flags.  */
-+} Elf_Options_Hw;
-+
-+/* Masks for `info' in ElfOptions for ODK_HWAND and ODK_HWOR entries.  */
-+
-+#define OHWA0_R4KEOP_CHECKED	0x00000001
-+#define OHWA1_R4KEOP_CLEAN	0x00000002
-+
-+/* MIPS relocs.  */
-+
-+#define R_MIPS_NONE		0	/* No reloc */
-+#define R_MIPS_16		1	/* Direct 16 bit */
-+#define R_MIPS_32		2	/* Direct 32 bit */
-+#define R_MIPS_REL32		3	/* PC relative 32 bit */
-+#define R_MIPS_26		4	/* Direct 26 bit shifted */
-+#define R_MIPS_HI16		5	/* High 16 bit */
-+#define R_MIPS_LO16		6	/* Low 16 bit */
-+#define R_MIPS_GPREL16		7	/* GP relative 16 bit */
-+#define R_MIPS_LITERAL		8	/* 16 bit literal entry */
-+#define R_MIPS_GOT16		9	/* 16 bit GOT entry */
-+#define R_MIPS_PC16		10	/* PC relative 16 bit */
-+#define R_MIPS_CALL16		11	/* 16 bit GOT entry for function */
-+#define R_MIPS_GPREL32		12	/* GP relative 32 bit */
-+
-+#define R_MIPS_SHIFT5		16
-+#define R_MIPS_SHIFT6		17
-+#define R_MIPS_64		18
-+#define R_MIPS_GOT_DISP		19
-+#define R_MIPS_GOT_PAGE		20
-+#define R_MIPS_GOT_OFST		21
-+#define R_MIPS_GOT_HI16		22
-+#define R_MIPS_GOT_LO16		23
-+#define R_MIPS_SUB		24
-+#define R_MIPS_INSERT_A		25
-+#define R_MIPS_INSERT_B		26
-+#define R_MIPS_DELETE		27
-+#define R_MIPS_HIGHER		28
-+#define R_MIPS_HIGHEST		29
-+#define R_MIPS_CALL_HI16	30
-+#define R_MIPS_CALL_LO16	31
-+#define R_MIPS_SCN_DISP		32
-+#define R_MIPS_REL16		33
-+#define R_MIPS_ADD_IMMEDIATE	34
-+#define R_MIPS_PJUMP		35
-+#define R_MIPS_RELGOT		36
-+#define R_MIPS_JALR		37
-+/* Keep this the last entry.  */
-+#define R_MIPS_NUM		38
-+
-+/* Legal values for p_type field of Elf32_Phdr.  */
-+
-+#define PT_MIPS_REGINFO	0x70000000	/* Register usage information */
-+#define PT_MIPS_RTPROC  0x70000001	/* Runtime procedure table. */
-+#define PT_MIPS_OPTIONS 0x70000002
-+
-+/* Special program header types.  */
-+
-+#define PF_MIPS_LOCAL	0x10000000
-+
-+/* Legal values for d_tag field of Elf32_Dyn.  */
-+
-+#define DT_MIPS_RLD_VERSION  0x70000001	/* Runtime linker interface version */
-+#define DT_MIPS_TIME_STAMP   0x70000002	/* Timestamp */
-+#define DT_MIPS_ICHECKSUM    0x70000003	/* Checksum */
-+#define DT_MIPS_IVERSION     0x70000004	/* Version string (string tbl index) */
-+#define DT_MIPS_FLAGS	     0x70000005	/* Flags */
-+#define DT_MIPS_BASE_ADDRESS 0x70000006	/* Base address */
-+#define DT_MIPS_MSYM	     0x70000007
-+#define DT_MIPS_CONFLICT     0x70000008	/* Address of CONFLICT section */
-+#define DT_MIPS_LIBLIST	     0x70000009	/* Address of LIBLIST section */
-+#define DT_MIPS_LOCAL_GOTNO  0x7000000a	/* Number of local GOT entries */
-+#define DT_MIPS_CONFLICTNO   0x7000000b	/* Number of CONFLICT entries */
-+#define DT_MIPS_LIBLISTNO    0x70000010	/* Number of LIBLIST entries */
-+#define DT_MIPS_SYMTABNO     0x70000011	/* Number of DYNSYM entries */
-+#define DT_MIPS_UNREFEXTNO   0x70000012	/* First external DYNSYM */
-+#define DT_MIPS_GOTSYM	     0x70000013	/* First GOT entry in DYNSYM */
-+#define DT_MIPS_HIPAGENO     0x70000014	/* Number of GOT page table entries */
-+#define DT_MIPS_RLD_MAP	     0x70000016	/* Address of run time loader map.  */
-+#define DT_MIPS_DELTA_CLASS  0x70000017	/* Delta C++ class definition.  */
-+#define DT_MIPS_DELTA_CLASS_NO    0x70000018 /* Number of entries in
-+						DT_MIPS_DELTA_CLASS.  */
-+#define DT_MIPS_DELTA_INSTANCE    0x70000019 /* Delta C++ class instances.  */
-+#define DT_MIPS_DELTA_INSTANCE_NO 0x7000001a /* Number of entries in
-+						DT_MIPS_DELTA_INSTANCE.  */
-+#define DT_MIPS_DELTA_RELOC  0x7000001b /* Delta relocations.  */
-+#define DT_MIPS_DELTA_RELOC_NO 0x7000001c /* Number of entries in
-+					     DT_MIPS_DELTA_RELOC.  */
-+#define DT_MIPS_DELTA_SYM    0x7000001d /* Delta symbols that Delta
-+					   relocations refer to.  */
-+#define DT_MIPS_DELTA_SYM_NO 0x7000001e /* Number of entries in
-+					   DT_MIPS_DELTA_SYM.  */
-+#define DT_MIPS_DELTA_CLASSSYM 0x70000020 /* Delta symbols that hold the
-+					     class declaration.  */
-+#define DT_MIPS_DELTA_CLASSSYM_NO 0x70000021 /* Number of entries in
-+						DT_MIPS_DELTA_CLASSSYM.  */
-+#define DT_MIPS_CXX_FLAGS    0x70000022 /* Flags indicating for C++ flavor.  */
-+#define DT_MIPS_PIXIE_INIT   0x70000023
-+#define DT_MIPS_SYMBOL_LIB   0x70000024
-+#define DT_MIPS_LOCALPAGE_GOTIDX 0x70000025
-+#define DT_MIPS_LOCAL_GOTIDX 0x70000026
-+#define DT_MIPS_HIDDEN_GOTIDX 0x70000027
-+#define DT_MIPS_PROTECTED_GOTIDX 0x70000028
-+#define DT_MIPS_OPTIONS	     0x70000029 /* Address of .options.  */
-+#define DT_MIPS_INTERFACE    0x7000002a /* Address of .interface.  */
-+#define DT_MIPS_DYNSTR_ALIGN 0x7000002b
-+#define DT_MIPS_INTERFACE_SIZE 0x7000002c /* Size of the .interface section. */
-+#define DT_MIPS_RLD_TEXT_RESOLVE_ADDR 0x7000002d /* Address of rld_text_rsolve
-+						    function stored in GOT.  */
-+#define DT_MIPS_PERF_SUFFIX  0x7000002e /* Default suffix of dso to be added
-+					   by rld on dlopen() calls.  */
-+#define DT_MIPS_COMPACT_SIZE 0x7000002f /* (O32)Size of compact rel section. */
-+#define DT_MIPS_GP_VALUE     0x70000030 /* GP value for aux GOTs.  */
-+#define DT_MIPS_AUX_DYNAMIC  0x70000031 /* Address of aux .dynamic.  */
-+#define DT_MIPS_NUM	     0x32
-+
-+/* Legal values for DT_MIPS_FLAGS Elf32_Dyn entry.  */
-+
-+#define RHF_NONE		   0		/* No flags */
-+#define RHF_QUICKSTART		   (1 << 0)	/* Use quickstart */
-+#define RHF_NOTPOT		   (1 << 1)	/* Hash size not power of 2 */
-+#define RHF_NO_LIBRARY_REPLACEMENT (1 << 2)	/* Ignore LD_LIBRARY_PATH */
-+#define RHF_NO_MOVE		   (1 << 3)
-+#define RHF_SGI_ONLY		   (1 << 4)
-+#define RHF_GUARANTEE_INIT	   (1 << 5)
-+#define RHF_DELTA_C_PLUS_PLUS	   (1 << 6)
-+#define RHF_GUARANTEE_START_INIT   (1 << 7)
-+#define RHF_PIXIE		   (1 << 8)
-+#define RHF_DEFAULT_DELAY_LOAD	   (1 << 9)
-+#define RHF_REQUICKSTART	   (1 << 10)
-+#define RHF_REQUICKSTARTED	   (1 << 11)
-+#define RHF_CORD		   (1 << 12)
-+#define RHF_NO_UNRES_UNDEF	   (1 << 13)
-+#define RHF_RLD_ORDER_SAFE	   (1 << 14)
-+
-+/* Entries found in sections of type SHT_MIPS_LIBLIST.  */
-+
-+typedef struct
-+{
-+  Elf32_Word l_name;		/* Name (string table index) */
-+  Elf32_Word l_time_stamp;	/* Timestamp */
-+  Elf32_Word l_checksum;	/* Checksum */
-+  Elf32_Word l_version;		/* Interface version */
-+  Elf32_Word l_flags;		/* Flags */
-+} Elf32_Lib;
-+
-+typedef struct
-+{
-+  Elf64_Word l_name;		/* Name (string table index) */
-+  Elf64_Word l_time_stamp;	/* Timestamp */
-+  Elf64_Word l_checksum;	/* Checksum */
-+  Elf64_Word l_version;		/* Interface version */
-+  Elf64_Word l_flags;		/* Flags */
-+} Elf64_Lib;
-+
-+
-+/* Legal values for l_flags.  */
-+
-+#define LL_NONE		  0
-+#define LL_EXACT_MATCH	  (1 << 0)	/* Require exact match */
-+#define LL_IGNORE_INT_VER (1 << 1)	/* Ignore interface version */
-+#define LL_REQUIRE_MINOR  (1 << 2)
-+#define LL_EXPORTS	  (1 << 3)
-+#define LL_DELAY_LOAD	  (1 << 4)
-+#define LL_DELTA	  (1 << 5)
-+
-+/* Entries found in sections of type SHT_MIPS_CONFLICT.  */
-+
-+typedef Elf32_Addr Elf32_Conflict;
-+
-+
-+/* HPPA specific definitions.  */
-+
-+/* Legal values for e_flags field of Elf32_Ehdr.  */
-+
-+#define EF_PARISC_TRAPNIL	0x00010000 /* Trap nil pointer dereference.  */
-+#define EF_PARISC_EXT		0x00020000 /* Program uses arch. extensions. */
-+#define EF_PARISC_LSB		0x00040000 /* Program expects little endian. */
-+#define EF_PARISC_WIDE		0x00080000 /* Program expects wide mode.  */
-+#define EF_PARISC_NO_KABP	0x00100000 /* No kernel assisted branch
-+					      prediction.  */
-+#define EF_PARISC_LAZYSWAP	0x00400000 /* Allow lazy swapping.  */
-+#define EF_PARISC_ARCH		0x0000ffff /* Architecture version.  */
-+
-+/* Defined values for `e_flags & EF_PARISC_ARCH' are:  */
-+
-+#define EFA_PARISC_1_0		    0x020b /* PA-RISC 1.0 big-endian.  */
-+#define EFA_PARISC_1_1		    0x0210 /* PA-RISC 1.1 big-endian.  */
-+#define EFA_PARISC_2_0		    0x0214 /* PA-RISC 2.0 big-endian.  */
-+
-+/* Additional section indeces.  */
-+
-+#define SHN_PARISC_ANSI_COMMON	0xff00	   /* Section for tenatively declared
-+					      symbols in ANSI C.  */
-+#define SHN_PARISC_HUGE_COMMON	0xff01	   /* Common blocks in huge model.  */
-+
-+/* Legal values for sh_type field of Elf32_Shdr.  */
-+
-+#define SHT_PARISC_EXT		0x70000000 /* Contains product specific ext. */
-+#define SHT_PARISC_UNWIND	0x70000001 /* Unwind information.  */
-+#define SHT_PARISC_DOC		0x70000002 /* Debug info for optimized code. */
-+
-+/* Legal values for sh_flags field of Elf32_Shdr.  */
-+
-+#define SHF_PARISC_SHORT	0x20000000 /* Section with short addressing. */
-+#define SHF_PARISC_HUGE		0x40000000 /* Section far from gp.  */
-+#define SHF_PARISC_SBP		0x80000000 /* Static branch prediction code. */
-+
-+/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
-+
-+#define STT_PARISC_MILLICODE	13	/* Millicode function entry point.  */
-+
-+#define STT_HP_OPAQUE		(STT_LOOS + 0x1)
-+#define STT_HP_STUB		(STT_LOOS + 0x2)
-+
-+/* HPPA relocs.  */
-+
-+#define R_PARISC_NONE		0	/* No reloc.  */
-+#define R_PARISC_DIR32		1	/* Direct 32-bit reference.  */
-+#define R_PARISC_DIR21L		2	/* Left 21 bits of eff. address.  */
-+#define R_PARISC_DIR17R		3	/* Right 17 bits of eff. address.  */
-+#define R_PARISC_DIR17F		4	/* 17 bits of eff. address.  */
-+#define R_PARISC_DIR14R		6	/* Right 14 bits of eff. address.  */
-+#define R_PARISC_PCREL32	9	/* 32-bit rel. address.  */
-+#define R_PARISC_PCREL21L	10	/* Left 21 bits of rel. address.  */
-+#define R_PARISC_PCREL17R	11	/* Right 17 bits of rel. address.  */
-+#define R_PARISC_PCREL17F	12	/* 17 bits of rel. address.  */
-+#define R_PARISC_PCREL14R	14	/* Right 14 bits of rel. address.  */
-+#define R_PARISC_DPREL21L	18	/* Left 21 bits of rel. address.  */
-+#define R_PARISC_DPREL14R	22	/* Right 14 bits of rel. address.  */
-+#define R_PARISC_GPREL21L	26	/* GP-relative, left 21 bits.  */
-+#define R_PARISC_GPREL14R	30	/* GP-relative, right 14 bits.  */
-+#define R_PARISC_LTOFF21L	34	/* LT-relative, left 21 bits.  */
-+#define R_PARISC_LTOFF14R	38	/* LT-relative, right 14 bits.  */
-+#define R_PARISC_SECREL32	41	/* 32 bits section rel. address.  */
-+#define R_PARISC_SEGBASE	48	/* No relocation, set segment base.  */
-+#define R_PARISC_SEGREL32	49	/* 32 bits segment rel. address.  */
-+#define R_PARISC_PLTOFF21L	50	/* PLT rel. address, left 21 bits.  */
-+#define R_PARISC_PLTOFF14R	54	/* PLT rel. address, right 14 bits.  */
-+#define R_PARISC_LTOFF_FPTR32	57	/* 32 bits LT-rel. function pointer. */
-+#define R_PARISC_LTOFF_FPTR21L	58	/* LT-rel. fct ptr, left 21 bits. */
-+#define R_PARISC_LTOFF_FPTR14R	62	/* LT-rel. fct ptr, right 14 bits. */
-+#define R_PARISC_FPTR64		64	/* 64 bits function address.  */
-+#define R_PARISC_PLABEL32	65	/* 32 bits function address.  */
-+#define R_PARISC_PCREL64	72	/* 64 bits PC-rel. address.  */
-+#define R_PARISC_PCREL22F	74	/* 22 bits PC-rel. address.  */
-+#define R_PARISC_PCREL14WR	75	/* PC-rel. address, right 14 bits.  */
-+#define R_PARISC_PCREL14DR	76	/* PC rel. address, right 14 bits.  */
-+#define R_PARISC_PCREL16F	77	/* 16 bits PC-rel. address.  */
-+#define R_PARISC_PCREL16WF	78	/* 16 bits PC-rel. address.  */
-+#define R_PARISC_PCREL16DF	79	/* 16 bits PC-rel. address.  */
-+#define R_PARISC_DIR64		80	/* 64 bits of eff. address.  */
-+#define R_PARISC_DIR14WR	83	/* 14 bits of eff. address.  */
-+#define R_PARISC_DIR14DR	84	/* 14 bits of eff. address.  */
-+#define R_PARISC_DIR16F		85	/* 16 bits of eff. address.  */
-+#define R_PARISC_DIR16WF	86	/* 16 bits of eff. address.  */
-+#define R_PARISC_DIR16DF	87	/* 16 bits of eff. address.  */
-+#define R_PARISC_GPREL64	88	/* 64 bits of GP-rel. address.  */
-+#define R_PARISC_GPREL14WR	91	/* GP-rel. address, right 14 bits.  */
-+#define R_PARISC_GPREL14DR	92	/* GP-rel. address, right 14 bits.  */
-+#define R_PARISC_GPREL16F	93	/* 16 bits GP-rel. address.  */
-+#define R_PARISC_GPREL16WF	94	/* 16 bits GP-rel. address.  */
-+#define R_PARISC_GPREL16DF	95	/* 16 bits GP-rel. address.  */
-+#define R_PARISC_LTOFF64	96	/* 64 bits LT-rel. address.  */
-+#define R_PARISC_LTOFF14WR	99	/* LT-rel. address, right 14 bits.  */
-+#define R_PARISC_LTOFF14DR	100	/* LT-rel. address, right 14 bits.  */
-+#define R_PARISC_LTOFF16F	101	/* 16 bits LT-rel. address.  */
-+#define R_PARISC_LTOFF16WF	102	/* 16 bits LT-rel. address.  */
-+#define R_PARISC_LTOFF16DF	103	/* 16 bits LT-rel. address.  */
-+#define R_PARISC_SECREL64	104	/* 64 bits section rel. address.  */
-+#define R_PARISC_SEGREL64	112	/* 64 bits segment rel. address.  */
-+#define R_PARISC_PLTOFF14WR	115	/* PLT-rel. address, right 14 bits.  */
-+#define R_PARISC_PLTOFF14DR	116	/* PLT-rel. address, right 14 bits.  */
-+#define R_PARISC_PLTOFF16F	117	/* 16 bits LT-rel. address.  */
-+#define R_PARISC_PLTOFF16WF	118	/* 16 bits PLT-rel. address.  */
-+#define R_PARISC_PLTOFF16DF	119	/* 16 bits PLT-rel. address.  */
-+#define R_PARISC_LTOFF_FPTR64	120	/* 64 bits LT-rel. function ptr.  */
-+#define R_PARISC_LTOFF_FPTR14WR	123	/* LT-rel. fct. ptr., right 14 bits. */
-+#define R_PARISC_LTOFF_FPTR14DR	124	/* LT-rel. fct. ptr., right 14 bits. */
-+#define R_PARISC_LTOFF_FPTR16F	125	/* 16 bits LT-rel. function ptr.  */
-+#define R_PARISC_LTOFF_FPTR16WF	126	/* 16 bits LT-rel. function ptr.  */
-+#define R_PARISC_LTOFF_FPTR16DF	127	/* 16 bits LT-rel. function ptr.  */
-+#define R_PARISC_LORESERVE	128
-+#define R_PARISC_COPY		128	/* Copy relocation.  */
-+#define R_PARISC_IPLT		129	/* Dynamic reloc, imported PLT */
-+#define R_PARISC_EPLT		130	/* Dynamic reloc, exported PLT */
-+#define R_PARISC_TPREL32	153	/* 32 bits TP-rel. address.  */
-+#define R_PARISC_TPREL21L	154	/* TP-rel. address, left 21 bits.  */
-+#define R_PARISC_TPREL14R	158	/* TP-rel. address, right 14 bits.  */
-+#define R_PARISC_LTOFF_TP21L	162	/* LT-TP-rel. address, left 21 bits. */
-+#define R_PARISC_LTOFF_TP14R	166	/* LT-TP-rel. address, right 14 bits.*/
-+#define R_PARISC_LTOFF_TP14F	167	/* 14 bits LT-TP-rel. address.  */
-+#define R_PARISC_TPREL64	216	/* 64 bits TP-rel. address.  */
-+#define R_PARISC_TPREL14WR	219	/* TP-rel. address, right 14 bits.  */
-+#define R_PARISC_TPREL14DR	220	/* TP-rel. address, right 14 bits.  */
-+#define R_PARISC_TPREL16F	221	/* 16 bits TP-rel. address.  */
-+#define R_PARISC_TPREL16WF	222	/* 16 bits TP-rel. address.  */
-+#define R_PARISC_TPREL16DF	223	/* 16 bits TP-rel. address.  */
-+#define R_PARISC_LTOFF_TP64	224	/* 64 bits LT-TP-rel. address.  */
-+#define R_PARISC_LTOFF_TP14WR	227	/* LT-TP-rel. address, right 14 bits.*/
-+#define R_PARISC_LTOFF_TP14DR	228	/* LT-TP-rel. address, right 14 bits.*/
-+#define R_PARISC_LTOFF_TP16F	229	/* 16 bits LT-TP-rel. address.  */
-+#define R_PARISC_LTOFF_TP16WF	230	/* 16 bits LT-TP-rel. address.  */
-+#define R_PARISC_LTOFF_TP16DF	231	/* 16 bits LT-TP-rel. address.  */
-+#define R_PARISC_HIRESERVE	255
-+
-+/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr.  */
-+
-+#define PT_HP_TLS		(PT_LOOS + 0x0)
-+#define PT_HP_CORE_NONE		(PT_LOOS + 0x1)
-+#define PT_HP_CORE_VERSION	(PT_LOOS + 0x2)
-+#define PT_HP_CORE_KERNEL	(PT_LOOS + 0x3)
-+#define PT_HP_CORE_COMM		(PT_LOOS + 0x4)
-+#define PT_HP_CORE_PROC		(PT_LOOS + 0x5)
-+#define PT_HP_CORE_LOADABLE	(PT_LOOS + 0x6)
-+#define PT_HP_CORE_STACK	(PT_LOOS + 0x7)
-+#define PT_HP_CORE_SHM		(PT_LOOS + 0x8)
-+#define PT_HP_CORE_MMF		(PT_LOOS + 0x9)
-+#define PT_HP_PARALLEL		(PT_LOOS + 0x10)
-+#define PT_HP_FASTBIND		(PT_LOOS + 0x11)
-+#define PT_HP_OPT_ANNOT		(PT_LOOS + 0x12)
-+#define PT_HP_HSL_ANNOT		(PT_LOOS + 0x13)
-+#define PT_HP_STACK		(PT_LOOS + 0x14)
-+
-+#define PT_PARISC_ARCHEXT	0x70000000
-+#define PT_PARISC_UNWIND	0x70000001
-+
-+/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr.  */
-+
-+#define PF_PARISC_SBP		0x08000000
-+
-+#define PF_HP_PAGE_SIZE		0x00100000
-+#define PF_HP_FAR_SHARED	0x00200000
-+#define PF_HP_NEAR_SHARED	0x00400000
-+#define PF_HP_CODE		0x01000000
-+#define PF_HP_MODIFY		0x02000000
-+#define PF_HP_LAZYSWAP		0x04000000
-+#define PF_HP_SBP		0x08000000
-+
-+
-+/* Alpha specific definitions.  */
-+
-+/* Legal values for e_flags field of Elf64_Ehdr.  */
-+
-+#define EF_ALPHA_32BIT		1	/* All addresses must be < 2GB.  */
-+#define EF_ALPHA_CANRELAX	2	/* Relocations for relaxing exist.  */
-+
-+/* Legal values for sh_type field of Elf64_Shdr.  */
-+
-+/* These two are primerily concerned with ECOFF debugging info.  */
-+#define SHT_ALPHA_DEBUG		0x70000001
-+#define SHT_ALPHA_REGINFO	0x70000002
-+
-+/* Legal values for sh_flags field of Elf64_Shdr.  */
-+
-+#define SHF_ALPHA_GPREL		0x10000000
-+
-+/* Legal values for st_other field of Elf64_Sym.  */
-+#define STO_ALPHA_NOPV		0x80	/* No PV required.  */
-+#define STO_ALPHA_STD_GPLOAD	0x88	/* PV only used for initial ldgp.  */
-+
-+/* Alpha relocs.  */
-+
-+#define R_ALPHA_NONE		0	/* No reloc */
-+#define R_ALPHA_REFLONG		1	/* Direct 32 bit */
-+#define R_ALPHA_REFQUAD		2	/* Direct 64 bit */
-+#define R_ALPHA_GPREL32		3	/* GP relative 32 bit */
-+#define R_ALPHA_LITERAL		4	/* GP relative 16 bit w/optimization */
-+#define R_ALPHA_LITUSE		5	/* Optimization hint for LITERAL */
-+#define R_ALPHA_GPDISP		6	/* Add displacement to GP */
-+#define R_ALPHA_BRADDR		7	/* PC+4 relative 23 bit shifted */
-+#define R_ALPHA_HINT		8	/* PC+4 relative 16 bit shifted */
-+#define R_ALPHA_SREL16		9	/* PC relative 16 bit */
-+#define R_ALPHA_SREL32		10	/* PC relative 32 bit */
-+#define R_ALPHA_SREL64		11	/* PC relative 64 bit */
-+#define R_ALPHA_GPRELHIGH	17	/* GP relative 32 bit, high 16 bits */
-+#define R_ALPHA_GPRELLOW	18	/* GP relative 32 bit, low 16 bits */
-+#define R_ALPHA_GPREL16		19	/* GP relative 16 bit */
-+#define R_ALPHA_COPY		24	/* Copy symbol at runtime */
-+#define R_ALPHA_GLOB_DAT	25	/* Create GOT entry */
-+#define R_ALPHA_JMP_SLOT	26	/* Create PLT entry */
-+#define R_ALPHA_RELATIVE	27	/* Adjust by program base */
-+#define R_ALPHA_TLS_GD_HI	28
-+#define R_ALPHA_TLSGD		29
-+#define R_ALPHA_TLS_LDM		30
-+#define R_ALPHA_DTPMOD64	31
-+#define R_ALPHA_GOTDTPREL	32
-+#define R_ALPHA_DTPREL64	33
-+#define R_ALPHA_DTPRELHI	34
-+#define R_ALPHA_DTPRELLO	35
-+#define R_ALPHA_DTPREL16	36
-+#define R_ALPHA_GOTTPREL	37
-+#define R_ALPHA_TPREL64		38
-+#define R_ALPHA_TPRELHI		39
-+#define R_ALPHA_TPRELLO		40
-+#define R_ALPHA_TPREL16		41
-+/* Keep this the last entry.  */
-+#define R_ALPHA_NUM		46
-+
-+/* Magic values of the LITUSE relocation addend.  */
-+#define LITUSE_ALPHA_ADDR	0
-+#define LITUSE_ALPHA_BASE	1
-+#define LITUSE_ALPHA_BYTOFF	2
-+#define LITUSE_ALPHA_JSR	3
-+#define LITUSE_ALPHA_TLS_GD	4
-+#define LITUSE_ALPHA_TLS_LDM	5
-+
-+
-+/* PowerPC specific declarations */
-+
-+/* Values for Elf32/64_Ehdr.e_flags.  */
-+#define EF_PPC_EMB		0x80000000	/* PowerPC embedded flag */
-+
-+/* Cygnus local bits below */
-+#define EF_PPC_RELOCATABLE	0x00010000	/* PowerPC -mrelocatable flag*/
-+#define EF_PPC_RELOCATABLE_LIB	0x00008000	/* PowerPC -mrelocatable-lib
-+						   flag */
-+
-+/* PowerPC relocations defined by the ABIs */
-+#define R_PPC_NONE		0
-+#define R_PPC_ADDR32		1	/* 32bit absolute address */
-+#define R_PPC_ADDR24		2	/* 26bit address, 2 bits ignored.  */
-+#define R_PPC_ADDR16		3	/* 16bit absolute address */
-+#define R_PPC_ADDR16_LO		4	/* lower 16bit of absolute address */
-+#define R_PPC_ADDR16_HI		5	/* high 16bit of absolute address */
-+#define R_PPC_ADDR16_HA		6	/* adjusted high 16bit */
-+#define R_PPC_ADDR14		7	/* 16bit address, 2 bits ignored */
-+#define R_PPC_ADDR14_BRTAKEN	8
-+#define R_PPC_ADDR14_BRNTAKEN	9
-+#define R_PPC_REL24		10	/* PC relative 26 bit */
-+#define R_PPC_REL14		11	/* PC relative 16 bit */
-+#define R_PPC_REL14_BRTAKEN	12
-+#define R_PPC_REL14_BRNTAKEN	13
-+#define R_PPC_GOT16		14
-+#define R_PPC_GOT16_LO		15
-+#define R_PPC_GOT16_HI		16
-+#define R_PPC_GOT16_HA		17
-+#define R_PPC_PLTREL24		18
-+#define R_PPC_COPY		19
-+#define R_PPC_GLOB_DAT		20
-+#define R_PPC_JMP_SLOT		21
-+#define R_PPC_RELATIVE		22
-+#define R_PPC_LOCAL24PC		23
-+#define R_PPC_UADDR32		24
-+#define R_PPC_UADDR16		25
-+#define R_PPC_REL32		26
-+#define R_PPC_PLT32		27
-+#define R_PPC_PLTREL32		28
-+#define R_PPC_PLT16_LO		29
-+#define R_PPC_PLT16_HI		30
-+#define R_PPC_PLT16_HA		31
-+#define R_PPC_SDAREL16		32
-+#define R_PPC_SECTOFF		33
-+#define R_PPC_SECTOFF_LO	34
-+#define R_PPC_SECTOFF_HI	35
-+#define R_PPC_SECTOFF_HA	36
-+
-+/* PowerPC relocations defined for the TLS access ABI.  */
-+#define R_PPC_TLS		67 /* none	(sym+add)@tls */
-+#define R_PPC_DTPMOD32		68 /* word32	(sym+add)@dtpmod */
-+#define R_PPC_TPREL16		69 /* half16*	(sym+add)@tprel */
-+#define R_PPC_TPREL16_LO	70 /* half16	(sym+add)@tprel@l */
-+#define R_PPC_TPREL16_HI	71 /* half16	(sym+add)@tprel@h */
-+#define R_PPC_TPREL16_HA	72 /* half16	(sym+add)@tprel@ha */
-+#define R_PPC_TPREL32		73 /* word32	(sym+add)@tprel */
-+#define R_PPC_DTPREL16		74 /* half16*	(sym+add)@dtprel */
-+#define R_PPC_DTPREL16_LO	75 /* half16	(sym+add)@dtprel@l */
-+#define R_PPC_DTPREL16_HI	76 /* half16	(sym+add)@dtprel@h */
-+#define R_PPC_DTPREL16_HA	77 /* half16	(sym+add)@dtprel@ha */
-+#define R_PPC_DTPREL32		78 /* word32	(sym+add)@dtprel */
-+#define R_PPC_GOT_TLSGD16	79 /* half16*	(sym+add)@got@tlsgd */
-+#define R_PPC_GOT_TLSGD16_LO	80 /* half16	(sym+add)@got@tlsgd@l */
-+#define R_PPC_GOT_TLSGD16_HI	81 /* half16	(sym+add)@got@tlsgd@h */
-+#define R_PPC_GOT_TLSGD16_HA	82 /* half16	(sym+add)@got@tlsgd@ha */
-+#define R_PPC_GOT_TLSLD16	83 /* half16*	(sym+add)@got@tlsld */
-+#define R_PPC_GOT_TLSLD16_LO	84 /* half16	(sym+add)@got@tlsld@l */
-+#define R_PPC_GOT_TLSLD16_HI	85 /* half16	(sym+add)@got@tlsld@h */
-+#define R_PPC_GOT_TLSLD16_HA	86 /* half16	(sym+add)@got@tlsld@ha */
-+#define R_PPC_GOT_TPREL16	87 /* half16*	(sym+add)@got@tprel */
-+#define R_PPC_GOT_TPREL16_LO	88 /* half16	(sym+add)@got@tprel@l */
-+#define R_PPC_GOT_TPREL16_HI	89 /* half16	(sym+add)@got@tprel@h */
-+#define R_PPC_GOT_TPREL16_HA	90 /* half16	(sym+add)@got@tprel@ha */
-+#define R_PPC_GOT_DTPREL16	91 /* half16*	(sym+add)@got@dtprel */
-+#define R_PPC_GOT_DTPREL16_LO	92 /* half16*	(sym+add)@got@dtprel@l */
-+#define R_PPC_GOT_DTPREL16_HI	93 /* half16*	(sym+add)@got@dtprel@h */
-+#define R_PPC_GOT_DTPREL16_HA	94 /* half16*	(sym+add)@got@dtprel@ha */
-+
-+/* Keep this the last entry.  */
-+#define R_PPC_NUM		95
-+
-+/* The remaining relocs are from the Embedded ELF ABI, and are not
-+   in the SVR4 ELF ABI.  */
-+#define R_PPC_EMB_NADDR32	101
-+#define R_PPC_EMB_NADDR16	102
-+#define R_PPC_EMB_NADDR16_LO	103
-+#define R_PPC_EMB_NADDR16_HI	104
-+#define R_PPC_EMB_NADDR16_HA	105
-+#define R_PPC_EMB_SDAI16	106
-+#define R_PPC_EMB_SDA2I16	107
-+#define R_PPC_EMB_SDA2REL	108
-+#define R_PPC_EMB_SDA21		109	/* 16 bit offset in SDA */
-+#define R_PPC_EMB_MRKREF	110
-+#define R_PPC_EMB_RELSEC16	111
-+#define R_PPC_EMB_RELST_LO	112
-+#define R_PPC_EMB_RELST_HI	113
-+#define R_PPC_EMB_RELST_HA	114
-+#define R_PPC_EMB_BIT_FLD	115
-+#define R_PPC_EMB_RELSDA	116	/* 16 bit relative offset in SDA */
-+
-+/* Diab tool relocations.  */
-+#define R_PPC_DIAB_SDA21_LO	180	/* like EMB_SDA21, but lower 16 bit */
-+#define R_PPC_DIAB_SDA21_HI	181	/* like EMB_SDA21, but high 16 bit */
-+#define R_PPC_DIAB_SDA21_HA	182	/* like EMB_SDA21, adjusted high 16 */
-+#define R_PPC_DIAB_RELSDA_LO	183	/* like EMB_RELSDA, but lower 16 bit */
-+#define R_PPC_DIAB_RELSDA_HI	184	/* like EMB_RELSDA, but high 16 bit */
-+#define R_PPC_DIAB_RELSDA_HA	185	/* like EMB_RELSDA, adjusted high 16 */
-+
-+/* This is a phony reloc to handle any old fashioned TOC16 references
-+   that may still be in object files.  */
-+#define R_PPC_TOC16		255
-+
-+
-+/* PowerPC64 relocations defined by the ABIs */
-+#define R_PPC64_NONE		R_PPC_NONE
-+#define R_PPC64_ADDR32		R_PPC_ADDR32 /* 32bit absolute address */
-+#define R_PPC64_ADDR24		R_PPC_ADDR24 /* 26bit address, word aligned */
-+#define R_PPC64_ADDR16		R_PPC_ADDR16 /* 16bit absolute address */
-+#define R_PPC64_ADDR16_LO	R_PPC_ADDR16_LO	/* lower 16bits of address */
-+#define R_PPC64_ADDR16_HI	R_PPC_ADDR16_HI	/* high 16bits of address. */
-+#define R_PPC64_ADDR16_HA	R_PPC_ADDR16_HA /* adjusted high 16bits.  */
-+#define R_PPC64_ADDR14		R_PPC_ADDR14 /* 16bit address, word aligned */
-+#define R_PPC64_ADDR14_BRTAKEN	R_PPC_ADDR14_BRTAKEN
-+#define R_PPC64_ADDR14_BRNTAKEN	R_PPC_ADDR14_BRNTAKEN
-+#define R_PPC64_REL24		R_PPC_REL24 /* PC-rel. 26 bit, word aligned */
-+#define R_PPC64_REL14		R_PPC_REL14 /* PC relative 16 bit */
-+#define R_PPC64_REL14_BRTAKEN	R_PPC_REL14_BRTAKEN
-+#define R_PPC64_REL14_BRNTAKEN	R_PPC_REL14_BRNTAKEN
-+#define R_PPC64_GOT16		R_PPC_GOT16
-+#define R_PPC64_GOT16_LO	R_PPC_GOT16_LO
-+#define R_PPC64_GOT16_HI	R_PPC_GOT16_HI
-+#define R_PPC64_GOT16_HA	R_PPC_GOT16_HA
-+
-+#define R_PPC64_COPY		R_PPC_COPY
-+#define R_PPC64_GLOB_DAT	R_PPC_GLOB_DAT
-+#define R_PPC64_JMP_SLOT	R_PPC_JMP_SLOT
-+#define R_PPC64_RELATIVE	R_PPC_RELATIVE
-+
-+#define R_PPC64_UADDR32		R_PPC_UADDR32
-+#define R_PPC64_UADDR16		R_PPC_UADDR16
-+#define R_PPC64_REL32		R_PPC_REL32
-+#define R_PPC64_PLT32		R_PPC_PLT32
-+#define R_PPC64_PLTREL32	R_PPC_PLTREL32
-+#define R_PPC64_PLT16_LO	R_PPC_PLT16_LO
-+#define R_PPC64_PLT16_HI	R_PPC_PLT16_HI
-+#define R_PPC64_PLT16_HA	R_PPC_PLT16_HA
-+
-+#define R_PPC64_SECTOFF		R_PPC_SECTOFF
-+#define R_PPC64_SECTOFF_LO	R_PPC_SECTOFF_LO
-+#define R_PPC64_SECTOFF_HI	R_PPC_SECTOFF_HI
-+#define R_PPC64_SECTOFF_HA	R_PPC_SECTOFF_HA
-+#define R_PPC64_ADDR30		37 /* word30 (S + A - P) >> 2 */
-+#define R_PPC64_ADDR64		38 /* doubleword64 S + A */
-+#define R_PPC64_ADDR16_HIGHER	39 /* half16 #higher(S + A) */
-+#define R_PPC64_ADDR16_HIGHERA	40 /* half16 #highera(S + A) */
-+#define R_PPC64_ADDR16_HIGHEST	41 /* half16 #highest(S + A) */
-+#define R_PPC64_ADDR16_HIGHESTA	42 /* half16 #highesta(S + A) */
-+#define R_PPC64_UADDR64		43 /* doubleword64 S + A */
-+#define R_PPC64_REL64		44 /* doubleword64 S + A - P */
-+#define R_PPC64_PLT64		45 /* doubleword64 L + A */
-+#define R_PPC64_PLTREL64	46 /* doubleword64 L + A - P */
-+#define R_PPC64_TOC16		47 /* half16* S + A - .TOC */
-+#define R_PPC64_TOC16_LO	48 /* half16 #lo(S + A - .TOC.) */
-+#define R_PPC64_TOC16_HI	49 /* half16 #hi(S + A - .TOC.) */
-+#define R_PPC64_TOC16_HA	50 /* half16 #ha(S + A - .TOC.) */
-+#define R_PPC64_TOC		51 /* doubleword64 .TOC */
-+#define R_PPC64_PLTGOT16	52 /* half16* M + A */
-+#define R_PPC64_PLTGOT16_LO	53 /* half16 #lo(M + A) */
-+#define R_PPC64_PLTGOT16_HI	54 /* half16 #hi(M + A) */
-+#define R_PPC64_PLTGOT16_HA	55 /* half16 #ha(M + A) */
-+
-+#define R_PPC64_ADDR16_DS	56 /* half16ds* (S + A) >> 2 */
-+#define R_PPC64_ADDR16_LO_DS	57 /* half16ds  #lo(S + A) >> 2 */
-+#define R_PPC64_GOT16_DS	58 /* half16ds* (G + A) >> 2 */
-+#define R_PPC64_GOT16_LO_DS	59 /* half16ds  #lo(G + A) >> 2 */
-+#define R_PPC64_PLT16_LO_DS	60 /* half16ds  #lo(L + A) >> 2 */
-+#define R_PPC64_SECTOFF_DS	61 /* half16ds* (R + A) >> 2 */
-+#define R_PPC64_SECTOFF_LO_DS	62 /* half16ds  #lo(R + A) >> 2 */
-+#define R_PPC64_TOC16_DS	63 /* half16ds* (S + A - .TOC.) >> 2 */
-+#define R_PPC64_TOC16_LO_DS	64 /* half16ds  #lo(S + A - .TOC.) >> 2 */
-+#define R_PPC64_PLTGOT16_DS	65 /* half16ds* (M + A) >> 2 */
-+#define R_PPC64_PLTGOT16_LO_DS	66 /* half16ds  #lo(M + A) >> 2 */
-+
-+/* PowerPC64 relocations defined for the TLS access ABI.  */
-+#define R_PPC64_TLS		67 /* none	(sym+add)@tls */
-+#define R_PPC64_DTPMOD64	68 /* doubleword64 (sym+add)@dtpmod */
-+#define R_PPC64_TPREL16		69 /* half16*	(sym+add)@tprel */
-+#define R_PPC64_TPREL16_LO	70 /* half16	(sym+add)@tprel@l */
-+#define R_PPC64_TPREL16_HI	71 /* half16	(sym+add)@tprel@h */
-+#define R_PPC64_TPREL16_HA	72 /* half16	(sym+add)@tprel@ha */
-+#define R_PPC64_TPREL64		73 /* doubleword64 (sym+add)@tprel */
-+#define R_PPC64_DTPREL16	74 /* half16*	(sym+add)@dtprel */
-+#define R_PPC64_DTPREL16_LO	75 /* half16	(sym+add)@dtprel@l */
-+#define R_PPC64_DTPREL16_HI	76 /* half16	(sym+add)@dtprel@h */
-+#define R_PPC64_DTPREL16_HA	77 /* half16	(sym+add)@dtprel@ha */
-+#define R_PPC64_DTPREL64	78 /* doubleword64 (sym+add)@dtprel */
-+#define R_PPC64_GOT_TLSGD16	79 /* half16*	(sym+add)@got@tlsgd */
-+#define R_PPC64_GOT_TLSGD16_LO	80 /* half16	(sym+add)@got@tlsgd@l */
-+#define R_PPC64_GOT_TLSGD16_HI	81 /* half16	(sym+add)@got@tlsgd@h */
-+#define R_PPC64_GOT_TLSGD16_HA	82 /* half16	(sym+add)@got@tlsgd@ha */
-+#define R_PPC64_GOT_TLSLD16	83 /* half16*	(sym+add)@got@tlsld */
-+#define R_PPC64_GOT_TLSLD16_LO	84 /* half16	(sym+add)@got@tlsld@l */
-+#define R_PPC64_GOT_TLSLD16_HI	85 /* half16	(sym+add)@got@tlsld@h */
-+#define R_PPC64_GOT_TLSLD16_HA	86 /* half16	(sym+add)@got@tlsld@ha */
-+#define R_PPC64_GOT_TPREL16_DS	87 /* half16ds*	(sym+add)@got@tprel */
-+#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
-+#define R_PPC64_GOT_TPREL16_HI	89 /* half16	(sym+add)@got@tprel@h */
-+#define R_PPC64_GOT_TPREL16_HA	90 /* half16	(sym+add)@got@tprel@ha */
-+#define R_PPC64_GOT_DTPREL16_DS	91 /* half16ds*	(sym+add)@got@dtprel */
-+#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
-+#define R_PPC64_GOT_DTPREL16_HI	93 /* half16	(sym+add)@got@dtprel@h */
-+#define R_PPC64_GOT_DTPREL16_HA	94 /* half16	(sym+add)@got@dtprel@ha */
-+#define R_PPC64_TPREL16_DS	95 /* half16ds*	(sym+add)@tprel */
-+#define R_PPC64_TPREL16_LO_DS	96 /* half16ds	(sym+add)@tprel@l */
-+#define R_PPC64_TPREL16_HIGHER	97 /* half16	(sym+add)@tprel@higher */
-+#define R_PPC64_TPREL16_HIGHERA	98 /* half16	(sym+add)@tprel@highera */
-+#define R_PPC64_TPREL16_HIGHEST	99 /* half16	(sym+add)@tprel@highest */
-+#define R_PPC64_TPREL16_HIGHESTA 100 /* half16	(sym+add)@tprel@highesta */
-+#define R_PPC64_DTPREL16_DS	101 /* half16ds* (sym+add)@dtprel */
-+#define R_PPC64_DTPREL16_LO_DS	102 /* half16ds	(sym+add)@dtprel@l */
-+#define R_PPC64_DTPREL16_HIGHER	103 /* half16	(sym+add)@dtprel@higher */
-+#define R_PPC64_DTPREL16_HIGHERA 104 /* half16	(sym+add)@dtprel@highera */
-+#define R_PPC64_DTPREL16_HIGHEST 105 /* half16	(sym+add)@dtprel@highest */
-+#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16	(sym+add)@dtprel@highesta */
-+
-+/* Keep this the last entry.  */
-+#define R_PPC64_NUM		107
-+
-+/* PowerPC64 specific values for the Dyn d_tag field.  */
-+#define DT_PPC64_GLINK  (DT_LOPROC + 0)
-+#define DT_PPC64_NUM    1
-+
-+
-+/* ARM specific declarations */
-+
-+/* Processor specific flags for the ELF header e_flags field.  */
-+#define EF_ARM_RELEXEC     0x01
-+#define EF_ARM_HASENTRY    0x02
-+#define EF_ARM_INTERWORK   0x04
-+#define EF_ARM_APCS_26     0x08
-+#define EF_ARM_APCS_FLOAT  0x10
-+#define EF_ARM_PIC         0x20
-+#define EF_ARM_ALIGN8      0x40		/* 8-bit structure alignment is in use */
-+#define EF_ARM_NEW_ABI     0x80
-+#define EF_ARM_OLD_ABI     0x100
-+
-+/* Other constants defined in the ARM ELF spec. version B-01.  */
-+/* NB. These conflict with values defined above.  */
-+#define EF_ARM_SYMSARESORTED	0x04
-+#define EF_ARM_DYNSYMSUSESEGIDX 0x08
-+#define EF_ARM_MAPSYMSFIRST	0x10
-+#define EF_ARM_EABIMASK		0XFF000000
-+
-+#define EF_ARM_EABI_VERSION(flags) ((flags) & EF_ARM_EABIMASK)
-+#define EF_ARM_EABI_UNKNOWN  0x00000000
-+#define EF_ARM_EABI_VER1     0x01000000
-+#define EF_ARM_EABI_VER2     0x02000000
-+
-+/* Additional symbol types for Thumb */
-+#define STT_ARM_TFUNC      0xd
-+
-+/* ARM-specific values for sh_flags */
-+#define SHF_ARM_ENTRYSECT  0x10000000   /* Section contains an entry point */
-+#define SHF_ARM_COMDEF     0x80000000   /* Section may be multiply defined
-+					   in the input to a link step */
-+
-+/* ARM-specific program header flags */
-+#define PF_ARM_SB          0x10000000   /* Segment contains the location
-+					   addressed by the static base */
-+
-+/* ARM relocs.  */
-+#define R_ARM_NONE		0	/* No reloc */
-+#define R_ARM_PC24		1	/* PC relative 26 bit branch */
-+#define R_ARM_ABS32		2	/* Direct 32 bit  */
-+#define R_ARM_REL32		3	/* PC relative 32 bit */
-+#define R_ARM_PC13		4
-+#define R_ARM_ABS16		5	/* Direct 16 bit */
-+#define R_ARM_ABS12		6	/* Direct 12 bit */
-+#define R_ARM_THM_ABS5		7
-+#define R_ARM_ABS8		8	/* Direct 8 bit */
-+#define R_ARM_SBREL32		9
-+#define R_ARM_THM_PC22		10
-+#define R_ARM_THM_PC8		11
-+#define R_ARM_AMP_VCALL9	12
-+#define R_ARM_SWI24		13
-+#define R_ARM_THM_SWI8		14
-+#define R_ARM_XPC25		15
-+#define R_ARM_THM_XPC22		16
-+#define R_ARM_COPY		20	/* Copy symbol at runtime */
-+#define R_ARM_GLOB_DAT		21	/* Create GOT entry */
-+#define R_ARM_JUMP_SLOT		22	/* Create PLT entry */
-+#define R_ARM_RELATIVE		23	/* Adjust by program base */
-+#define R_ARM_GOTOFF		24	/* 32 bit offset to GOT */
-+#define R_ARM_GOTPC		25	/* 32 bit PC relative offset to GOT */
-+#define R_ARM_GOT32		26	/* 32 bit GOT entry */
-+#define R_ARM_PLT32		27	/* 32 bit PLT address */
-+#define R_ARM_ALU_PCREL_7_0	32
-+#define R_ARM_ALU_PCREL_15_8	33
-+#define R_ARM_ALU_PCREL_23_15	34
-+#define R_ARM_LDR_SBREL_11_0	35
-+#define R_ARM_ALU_SBREL_19_12	36
-+#define R_ARM_ALU_SBREL_27_20	37
-+#define R_ARM_GNU_VTENTRY	100
-+#define R_ARM_GNU_VTINHERIT	101
-+#define R_ARM_THM_PC11		102	/* thumb unconditional branch */
-+#define R_ARM_THM_PC9		103	/* thumb conditional branch */
-+#define R_ARM_RXPC25		249
-+#define R_ARM_RSBREL32		250
-+#define R_ARM_THM_RPC22		251
-+#define R_ARM_RREL32		252
-+#define R_ARM_RABS22		253
-+#define R_ARM_RPC24		254
-+#define R_ARM_RBASE		255
-+/* Keep this the last entry.  */
-+#define R_ARM_NUM		256
-+
-+/* IA-64 specific declarations.  */
-+
-+/* Processor specific flags for the Ehdr e_flags field.  */
-+#define EF_IA_64_MASKOS		0x0000000f	/* os-specific flags */
-+#define EF_IA_64_ABI64		0x00000010	/* 64-bit ABI */
-+#define EF_IA_64_ARCH		0xff000000	/* arch. version mask */
-+
-+/* Processor specific values for the Phdr p_type field.  */
-+#define PT_IA_64_ARCHEXT	(PT_LOPROC + 0)	/* arch extension bits */
-+#define PT_IA_64_UNWIND		(PT_LOPROC + 1)	/* ia64 unwind bits */
-+
-+/* Processor specific flags for the Phdr p_flags field.  */
-+#define PF_IA_64_NORECOV	0x80000000	/* spec insns w/o recovery */
-+
-+/* Processor specific values for the Shdr sh_type field.  */
-+#define SHT_IA_64_EXT		(SHT_LOPROC + 0) /* extension bits */
-+#define SHT_IA_64_UNWIND	(SHT_LOPROC + 1) /* unwind bits */
-+
-+/* Processor specific flags for the Shdr sh_flags field.  */
-+#define SHF_IA_64_SHORT		0x10000000	/* section near gp */
-+#define SHF_IA_64_NORECOV	0x20000000	/* spec insns w/o recovery */
-+
-+/* Processor specific values for the Dyn d_tag field.  */
-+#define DT_IA_64_PLT_RESERVE	(DT_LOPROC + 0)
-+#define DT_IA_64_NUM		1
-+
-+/* IA-64 relocations.  */
-+#define R_IA64_NONE		0x00	/* none */
-+#define R_IA64_IMM14		0x21	/* symbol + addend, add imm14 */
-+#define R_IA64_IMM22		0x22	/* symbol + addend, add imm22 */
-+#define R_IA64_IMM64		0x23	/* symbol + addend, mov imm64 */
-+#define R_IA64_DIR32MSB		0x24	/* symbol + addend, data4 MSB */
-+#define R_IA64_DIR32LSB		0x25	/* symbol + addend, data4 LSB */
-+#define R_IA64_DIR64MSB		0x26	/* symbol + addend, data8 MSB */
-+#define R_IA64_DIR64LSB		0x27	/* symbol + addend, data8 LSB */
-+#define R_IA64_GPREL22		0x2a	/* @gprel(sym + add), add imm22 */
-+#define R_IA64_GPREL64I		0x2b	/* @gprel(sym + add), mov imm64 */
-+#define R_IA64_GPREL32MSB	0x2c	/* @gprel(sym + add), data4 MSB */
-+#define R_IA64_GPREL32LSB	0x2d	/* @gprel(sym + add), data4 LSB */
-+#define R_IA64_GPREL64MSB	0x2e	/* @gprel(sym + add), data8 MSB */
-+#define R_IA64_GPREL64LSB	0x2f	/* @gprel(sym + add), data8 LSB */
-+#define R_IA64_LTOFF22		0x32	/* @ltoff(sym + add), add imm22 */
-+#define R_IA64_LTOFF64I		0x33	/* @ltoff(sym + add), mov imm64 */
-+#define R_IA64_PLTOFF22		0x3a	/* @pltoff(sym + add), add imm22 */
-+#define R_IA64_PLTOFF64I	0x3b	/* @pltoff(sym + add), mov imm64 */
-+#define R_IA64_PLTOFF64MSB	0x3e	/* @pltoff(sym + add), data8 MSB */
-+#define R_IA64_PLTOFF64LSB	0x3f	/* @pltoff(sym + add), data8 LSB */
-+#define R_IA64_FPTR64I		0x43	/* @fptr(sym + add), mov imm64 */
-+#define R_IA64_FPTR32MSB	0x44	/* @fptr(sym + add), data4 MSB */
-+#define R_IA64_FPTR32LSB	0x45	/* @fptr(sym + add), data4 LSB */
-+#define R_IA64_FPTR64MSB	0x46	/* @fptr(sym + add), data8 MSB */
-+#define R_IA64_FPTR64LSB	0x47	/* @fptr(sym + add), data8 LSB */
-+#define R_IA64_PCREL60B		0x48	/* @pcrel(sym + add), brl */
-+#define R_IA64_PCREL21B		0x49	/* @pcrel(sym + add), ptb, call */
-+#define R_IA64_PCREL21M		0x4a	/* @pcrel(sym + add), chk.s */
-+#define R_IA64_PCREL21F		0x4b	/* @pcrel(sym + add), fchkf */
-+#define R_IA64_PCREL32MSB	0x4c	/* @pcrel(sym + add), data4 MSB */
-+#define R_IA64_PCREL32LSB	0x4d	/* @pcrel(sym + add), data4 LSB */
-+#define R_IA64_PCREL64MSB	0x4e	/* @pcrel(sym + add), data8 MSB */
-+#define R_IA64_PCREL64LSB	0x4f	/* @pcrel(sym + add), data8 LSB */
-+#define R_IA64_LTOFF_FPTR22	0x52	/* @ltoff(@fptr(s+a)), imm22 */
-+#define R_IA64_LTOFF_FPTR64I	0x53	/* @ltoff(@fptr(s+a)), imm64 */
-+#define R_IA64_LTOFF_FPTR32MSB	0x54	/* @ltoff(@fptr(s+a)), data4 MSB */
-+#define R_IA64_LTOFF_FPTR32LSB	0x55	/* @ltoff(@fptr(s+a)), data4 LSB */
-+#define R_IA64_LTOFF_FPTR64MSB	0x56	/* @ltoff(@fptr(s+a)), data8 MSB */
-+#define R_IA64_LTOFF_FPTR64LSB	0x57	/* @ltoff(@fptr(s+a)), data8 LSB */
-+#define R_IA64_SEGREL32MSB	0x5c	/* @segrel(sym + add), data4 MSB */
-+#define R_IA64_SEGREL32LSB	0x5d	/* @segrel(sym + add), data4 LSB */
-+#define R_IA64_SEGREL64MSB	0x5e	/* @segrel(sym + add), data8 MSB */
-+#define R_IA64_SEGREL64LSB	0x5f	/* @segrel(sym + add), data8 LSB */
-+#define R_IA64_SECREL32MSB	0x64	/* @secrel(sym + add), data4 MSB */
-+#define R_IA64_SECREL32LSB	0x65	/* @secrel(sym + add), data4 LSB */
-+#define R_IA64_SECREL64MSB	0x66	/* @secrel(sym + add), data8 MSB */
-+#define R_IA64_SECREL64LSB	0x67	/* @secrel(sym + add), data8 LSB */
-+#define R_IA64_REL32MSB		0x6c	/* data 4 + REL */
-+#define R_IA64_REL32LSB		0x6d	/* data 4 + REL */
-+#define R_IA64_REL64MSB		0x6e	/* data 8 + REL */
-+#define R_IA64_REL64LSB		0x6f	/* data 8 + REL */
-+#define R_IA64_LTV32MSB		0x74	/* symbol + addend, data4 MSB */
-+#define R_IA64_LTV32LSB		0x75	/* symbol + addend, data4 LSB */
-+#define R_IA64_LTV64MSB		0x76	/* symbol + addend, data8 MSB */
-+#define R_IA64_LTV64LSB		0x77	/* symbol + addend, data8 LSB */
-+#define R_IA64_PCREL21BI	0x79	/* @pcrel(sym + add), 21bit inst */
-+#define R_IA64_PCREL22		0x7a	/* @pcrel(sym + add), 22bit inst */
-+#define R_IA64_PCREL64I		0x7b	/* @pcrel(sym + add), 64bit inst */
-+#define R_IA64_IPLTMSB		0x80	/* dynamic reloc, imported PLT, MSB */
-+#define R_IA64_IPLTLSB		0x81	/* dynamic reloc, imported PLT, LSB */
-+#define R_IA64_COPY		0x84	/* copy relocation */
-+#define R_IA64_SUB		0x85	/* Addend and symbol difference */
-+#define R_IA64_LTOFF22X		0x86	/* LTOFF22, relaxable.  */
-+#define R_IA64_LDXMOV		0x87	/* Use of LTOFF22X.  */
-+#define R_IA64_TPREL14		0x91	/* @tprel(sym + add), imm14 */
-+#define R_IA64_TPREL22		0x92	/* @tprel(sym + add), imm22 */
-+#define R_IA64_TPREL64I		0x93	/* @tprel(sym + add), imm64 */
-+#define R_IA64_TPREL64MSB	0x96	/* @tprel(sym + add), data8 MSB */
-+#define R_IA64_TPREL64LSB	0x97	/* @tprel(sym + add), data8 LSB */
-+#define R_IA64_LTOFF_TPREL22	0x9a	/* @ltoff(@tprel(s+a)), imm2 */
-+#define R_IA64_DTPMOD64MSB	0xa6	/* @dtpmod(sym + add), data8 MSB */
-+#define R_IA64_DTPMOD64LSB	0xa7	/* @dtpmod(sym + add), data8 LSB */
-+#define R_IA64_LTOFF_DTPMOD22	0xaa	/* @ltoff(@dtpmod(sym + add)), imm22 */
-+#define R_IA64_DTPREL14		0xb1	/* @dtprel(sym + add), imm14 */
-+#define R_IA64_DTPREL22		0xb2	/* @dtprel(sym + add), imm22 */
-+#define R_IA64_DTPREL64I	0xb3	/* @dtprel(sym + add), imm64 */
-+#define R_IA64_DTPREL32MSB	0xb4	/* @dtprel(sym + add), data4 MSB */
-+#define R_IA64_DTPREL32LSB	0xb5	/* @dtprel(sym + add), data4 LSB */
-+#define R_IA64_DTPREL64MSB	0xb6	/* @dtprel(sym + add), data8 MSB */
-+#define R_IA64_DTPREL64LSB	0xb7	/* @dtprel(sym + add), data8 LSB */
-+#define R_IA64_LTOFF_DTPREL22	0xba	/* @ltoff(@dtprel(s+a)), imm22 */
-+
-+/* SH specific declarations */
-+
-+/* SH relocs.  */
-+#define	R_SH_NONE		0
-+#define	R_SH_DIR32		1
-+#define	R_SH_REL32		2
-+#define	R_SH_DIR8WPN		3
-+#define	R_SH_IND12W		4
-+#define	R_SH_DIR8WPL		5
-+#define	R_SH_DIR8WPZ		6
-+#define	R_SH_DIR8BP		7
-+#define	R_SH_DIR8W		8
-+#define	R_SH_DIR8L		9
-+#define	R_SH_SWITCH16		25
-+#define	R_SH_SWITCH32		26
-+#define	R_SH_USES		27
-+#define	R_SH_COUNT		28
-+#define	R_SH_ALIGN		29
-+#define	R_SH_CODE		30
-+#define	R_SH_DATA		31
-+#define	R_SH_LABEL		32
-+#define	R_SH_SWITCH8		33
-+#define	R_SH_GNU_VTINHERIT	34
-+#define	R_SH_GNU_VTENTRY	35
-+#define	R_SH_TLS_GD_32		144
-+#define	R_SH_TLS_LD_32		145
-+#define	R_SH_TLS_LDO_32		146
-+#define	R_SH_TLS_IE_32		147
-+#define	R_SH_TLS_LE_32		148
-+#define	R_SH_TLS_DTPMOD32	149
-+#define	R_SH_TLS_DTPOFF32	150
-+#define	R_SH_TLS_TPOFF32	151
-+#define	R_SH_GOT32		160
-+#define	R_SH_PLT32		161
-+#define	R_SH_COPY		162
-+#define	R_SH_GLOB_DAT		163
-+#define	R_SH_JMP_SLOT		164
-+#define	R_SH_RELATIVE		165
-+#define	R_SH_GOTOFF		166
-+#define	R_SH_GOTPC		167
-+/* Keep this the last entry.  */
-+#define	R_SH_NUM		256
-+
-+/* Additional s390 relocs */
-+
-+#define R_390_NONE		0	/* No reloc.  */
-+#define R_390_8			1	/* Direct 8 bit.  */
-+#define R_390_12		2	/* Direct 12 bit.  */
-+#define R_390_16		3	/* Direct 16 bit.  */
-+#define R_390_32		4	/* Direct 32 bit.  */
-+#define R_390_PC32		5	/* PC relative 32 bit.	*/
-+#define R_390_GOT12		6	/* 12 bit GOT offset.  */
-+#define R_390_GOT32		7	/* 32 bit GOT offset.  */
-+#define R_390_PLT32		8	/* 32 bit PC relative PLT address.  */
-+#define R_390_COPY		9	/* Copy symbol at runtime.  */
-+#define R_390_GLOB_DAT		10	/* Create GOT entry.  */
-+#define R_390_JMP_SLOT		11	/* Create PLT entry.  */
-+#define R_390_RELATIVE		12	/* Adjust by program base.  */
-+#define R_390_GOTOFF32		13	/* 32 bit offset to GOT.	 */
-+#define R_390_GOTPC		14	/* 32 bit PC relative offset to GOT.  */
-+#define R_390_GOT16		15	/* 16 bit GOT offset.  */
-+#define R_390_PC16		16	/* PC relative 16 bit.	*/
-+#define R_390_PC16DBL		17	/* PC relative 16 bit shifted by 1.  */
-+#define R_390_PLT16DBL		18	/* 16 bit PC rel. PLT shifted by 1.  */
-+#define R_390_PC32DBL		19	/* PC relative 32 bit shifted by 1.  */
-+#define R_390_PLT32DBL		20	/* 32 bit PC rel. PLT shifted by 1.  */
-+#define R_390_GOTPCDBL		21	/* 32 bit PC rel. GOT shifted by 1.  */
-+#define R_390_64		22	/* Direct 64 bit.  */
-+#define R_390_PC64		23	/* PC relative 64 bit.	*/
-+#define R_390_GOT64		24	/* 64 bit GOT offset.  */
-+#define R_390_PLT64		25	/* 64 bit PC relative PLT address.  */
-+#define R_390_GOTENT		26	/* 32 bit PC rel. to GOT entry >> 1. */
-+#define R_390_GOTOFF16		27	/* 16 bit offset to GOT. */
-+#define R_390_GOTOFF64		28	/* 64 bit offset to GOT. */
-+#define R_390_GOTPLT12		29	/* 12 bit offset to jump slot.	*/
-+#define R_390_GOTPLT16		30	/* 16 bit offset to jump slot.	*/
-+#define R_390_GOTPLT32		31	/* 32 bit offset to jump slot.	*/
-+#define R_390_GOTPLT64		32	/* 64 bit offset to jump slot.	*/
-+#define R_390_GOTPLTENT		33	/* 32 bit rel. offset to jump slot.  */
-+#define R_390_PLTOFF16		34	/* 16 bit offset from GOT to PLT. */
-+#define R_390_PLTOFF32		35	/* 32 bit offset from GOT to PLT. */
-+#define R_390_PLTOFF64		36	/* 16 bit offset from GOT to PLT. */
-+#define R_390_TLS_LOAD		37	/* Tag for load insn in TLS code.  */
-+#define R_390_TLS_GDCALL	38	/* Tag for function call in general
-+					   dynamic TLS code. */
-+#define R_390_TLS_LDCALL	39	/* Tag for function call in local
-+					   dynamic TLS code. */
-+#define R_390_TLS_GD32		40	/* Direct 32 bit for general dynamic
-+					   thread local data.  */
-+#define R_390_TLS_GD64		41	/* Direct 64 bit for general dynamic
-+					  thread local data.  */
-+#define R_390_TLS_GOTIE12	42	/* 12 bit GOT offset for static TLS
-+					   block offset.  */
-+#define R_390_TLS_GOTIE32	43	/* 32 bit GOT offset for static TLS
-+					   block offset.  */
-+#define R_390_TLS_GOTIE64	44	/* 64 bit GOT offset for static TLS
-+					   block offset. */
-+#define R_390_TLS_LDM32		45	/* Direct 32 bit for local dynamic
-+					   thread local data in LE code.  */
-+#define R_390_TLS_LDM64		46	/* Direct 64 bit for local dynamic
-+					   thread local data in LE code.  */
-+#define R_390_TLS_IE32		47	/* 32 bit address of GOT entry for
-+					   negated static TLS block offset.  */
-+#define R_390_TLS_IE64		48	/* 64 bit address of GOT entry for
-+					   negated static TLS block offset.  */
-+#define R_390_TLS_IEENT		49	/* 32 bit rel. offset to GOT entry for
-+					   negated static TLS block offset.  */
-+#define R_390_TLS_LE32		50	/* 32 bit negated offset relative to
-+					   static TLS block.  */
-+#define R_390_TLS_LE64		51	/* 64 bit negated offset relative to
-+					   static TLS block.  */
-+#define R_390_TLS_LDO32		52	/* 32 bit offset relative to TLS
-+					   block.  */
-+#define R_390_TLS_LDO64		53	/* 64 bit offset relative to TLS
-+					   block.  */
-+#define R_390_TLS_DTPMOD	54	/* ID of module containing symbol.  */
-+#define R_390_TLS_DTPOFF	55	/* Offset in TLS block.	 */
-+#define R_390_TLS_TPOFF		56	/* Negated offset in static TLS
-+					   block.  */
-+
-+/* Keep this the last entry.  */
-+#define R_390_NUM		57
-+
-+/* CRIS relocations.  */
-+#define R_CRIS_NONE		0
-+#define R_CRIS_8		1
-+#define R_CRIS_16		2
-+#define R_CRIS_32		3
-+#define R_CRIS_8_PCREL		4
-+#define R_CRIS_16_PCREL		5
-+#define R_CRIS_32_PCREL		6
-+#define R_CRIS_GNU_VTINHERIT	7
-+#define R_CRIS_GNU_VTENTRY	8
-+#define R_CRIS_COPY		9
-+#define R_CRIS_GLOB_DAT		10
-+#define R_CRIS_JUMP_SLOT	11
-+#define R_CRIS_RELATIVE		12
-+#define R_CRIS_16_GOT		13
-+#define R_CRIS_32_GOT		14
-+#define R_CRIS_16_GOTPLT	15
-+#define R_CRIS_32_GOTPLT	16
-+#define R_CRIS_32_GOTREL	17
-+#define R_CRIS_32_PLT_GOTREL	18
-+#define R_CRIS_32_PLT_PCREL	19
-+
-+#define R_CRIS_NUM		20
-+
-+/* AMD x86-64 relocations.  */
-+#define R_X86_64_NONE		0	/* No reloc */
-+#define R_X86_64_64		1	/* Direct 64 bit  */
-+#define R_X86_64_PC32		2	/* PC relative 32 bit signed */
-+#define R_X86_64_GOT32		3	/* 32 bit GOT entry */
-+#define R_X86_64_PLT32		4	/* 32 bit PLT address */
-+#define R_X86_64_COPY		5	/* Copy symbol at runtime */
-+#define R_X86_64_GLOB_DAT	6	/* Create GOT entry */
-+#define R_X86_64_JUMP_SLOT	7	/* Create PLT entry */
-+#define R_X86_64_RELATIVE	8	/* Adjust by program base */
-+#define R_X86_64_GOTPCREL	9	/* 32 bit signed PC relative
-+					   offset to GOT */
-+#define R_X86_64_32		10	/* Direct 32 bit zero extended */
-+#define R_X86_64_32S		11	/* Direct 32 bit sign extended */
-+#define R_X86_64_16		12	/* Direct 16 bit zero extended */
-+#define R_X86_64_PC16		13	/* 16 bit sign extended pc relative */
-+#define R_X86_64_8		14	/* Direct 8 bit sign extended  */
-+#define R_X86_64_PC8		15	/* 8 bit sign extended pc relative */
-+#define R_X86_64_DTPMOD64	16	/* ID of module containing symbol */
-+#define R_X86_64_DTPOFF64	17	/* Offset in module's TLS block */
-+#define R_X86_64_TPOFF64	18	/* Offset in initial TLS block */
-+#define R_X86_64_TLSGD		19	/* 32 bit signed PC relative offset
-+					   to two GOT entries for GD symbol */
-+#define R_X86_64_TLSLD		20	/* 32 bit signed PC relative offset
-+					   to two GOT entries for LD symbol */
-+#define R_X86_64_DTPOFF32	21	/* Offset in TLS block */
-+#define R_X86_64_GOTTPOFF	22	/* 32 bit signed PC relative offset
-+					   to GOT entry for IE symbol */
-+#define R_X86_64_TPOFF32	23	/* Offset in initial TLS block */
-+
-+#define R_X86_64_NUM		24
-+
-+__END_DECLS
-+
-+#endif	/* elf.h */
- 
- #include "elfconfig.h"
- 
-@@ -195,3 +2641,4 @@
- void fatal(const char *fmt, ...);
- void warn(const char *fmt, ...);
- void merror(const char *fmt, ...);
-+
-diff -Nur linux-2.6.36.orig/scripts/mod/sumversion.c linux-2.6.36/scripts/mod/sumversion.c
---- linux-2.6.36.orig/scripts/mod/sumversion.c	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/scripts/mod/sumversion.c	2010-11-28 18:33:24.000000000 +0100
-@@ -1,4 +1,4 @@
--#include <netinet/in.h>
-+/* #include <netinet/in.h> */
- #ifdef __sun__
- #include <inttypes.h>
- #else
diff --git a/target/linux/patches/3.4.4/cris-etrax.patch b/target/linux/patches/3.4.4/cris-etrax.patch
deleted file mode 100644
index a80d9a8b8..000000000
--- a/target/linux/patches/3.4.4/cris-etrax.patch
+++ /dev/null
@@ -1,12 +0,0 @@
-diff -Nur linux-2.6.39.orig/arch/cris/arch-v32/drivers/i2c.h linux-2.6.39/arch/cris/arch-v32/drivers/i2c.h
---- linux-2.6.39.orig/arch/cris/arch-v32/drivers/i2c.h	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/arch/cris/arch-v32/drivers/i2c.h	2011-08-24 19:15:05.000000000 +0200
-@@ -2,7 +2,7 @@
- #include <linux/init.h>
- 
- /* High level I2C actions */
--int __init i2c_init(void);
-+static int __init i2c_init(void);
- int i2c_write(unsigned char theSlave, void *data, size_t nbytes);
- int i2c_read(unsigned char theSlave, void *data, size_t nbytes);
- int i2c_writereg(unsigned char theSlave, unsigned char theReg, unsigned char theValue);
diff --git a/target/linux/patches/3.4.4/defaults.patch b/target/linux/patches/3.4.4/defaults.patch
deleted file mode 100644
index 58aae610b..000000000
--- a/target/linux/patches/3.4.4/defaults.patch
+++ /dev/null
@@ -1,22 +0,0 @@
-diff -Nur linux-3.0.4.orig/fs/Kconfig linux-3.0.4/fs/Kconfig
---- linux-3.0.4.orig/fs/Kconfig	2011-08-29 22:56:30.000000000 +0200
-+++ linux-3.0.4/fs/Kconfig	2011-10-15 22:08:44.000000000 +0200
-@@ -47,7 +47,7 @@
- 	def_bool n
- 
- config EXPORTFS
--	tristate
-+	def_bool y
- 
- config FILE_LOCKING
- 	bool "Enable POSIX file locking API" if EXPERT
-diff -Nur linux-3.0.4.orig/fs/notify/Kconfig linux-3.0.4/fs/notify/Kconfig
---- linux-3.0.4.orig/fs/notify/Kconfig	2011-08-29 22:56:30.000000000 +0200
-+++ linux-3.0.4/fs/notify/Kconfig	2011-10-15 22:02:00.000000000 +0200
-@@ -1,5 +1,5 @@
- config FSNOTIFY
--	def_bool n
-+	def_bool y
- 
- source "fs/notify/dnotify/Kconfig"
- source "fs/notify/inotify/Kconfig"
diff --git a/target/linux/patches/3.4.4/gemalto.patch b/target/linux/patches/3.4.4/gemalto.patch
deleted file mode 100644
index f3c223b5e..000000000
--- a/target/linux/patches/3.4.4/gemalto.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.36.orig/drivers/tty/serial/serial_cs.c linux-2.6.36/drivers/serial/serial_cs.c
---- linux-2.6.36.orig/drivers/tty/serial/serial_cs.c	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/drivers/tty/serial/serial_cs.c	2010-12-13 23:03:40.000000000 +0100
-@@ -794,6 +794,7 @@
- 	PCMCIA_DEVICE_MANF_CARD(0x0137, 0x0025),
- 	PCMCIA_DEVICE_MANF_CARD(0x0137, 0x0045),
- 	PCMCIA_DEVICE_MANF_CARD(0x0137, 0x0052),
-+	PCMCIA_DEVICE_MANF_CARD(0x0157, 0x0100), /* Gemalto SCR */
- 	PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0006), /* Psion 56K+Fax */
- 	PCMCIA_DEVICE_MANF_CARD(0x0200, 0x0001), /* MultiMobile */
- 	PCMCIA_DEVICE_PROD_ID134("ADV", "TECH", "COMpad-32/85", 0x67459937, 0x916d02ba, 0x8fbe92ae),
diff --git a/target/linux/patches/3.4.4/mmc-host.patch b/target/linux/patches/3.4.4/mmc-host.patch
deleted file mode 100644
index 3d0e37add..000000000
--- a/target/linux/patches/3.4.4/mmc-host.patch
+++ /dev/null
@@ -1,36 +0,0 @@
-diff -Nur linux-2.6.39-rc6.orig/drivers/mmc/host/Kconfig linux-2.6.39-rc6/drivers/mmc/host/Kconfig
---- linux-2.6.39-rc6.orig/drivers/mmc/host/Kconfig	2011-05-04 04:59:13.000000000 +0200
-+++ linux-2.6.39-rc6/drivers/mmc/host/Kconfig	2011-05-10 23:39:01.000000000 +0200
-@@ -253,13 +253,6 @@
- 
- 	  If unsure, say N.
- 
--choice
--	prompt "Atmel SD/MMC Driver"
--	depends on AVR32 || ARCH_AT91
--	default MMC_ATMELMCI if AVR32
--	help
--	  Choose which driver to use for the Atmel MCI Silicon
--
- config MMC_AT91
- 	tristate "AT91 SD/MMC Card Interface support"
- 	depends on ARCH_AT91
-@@ -268,18 +261,6 @@
- 
- 	  If unsure, say N.
- 
--config MMC_ATMELMCI
--	tristate "Atmel Multimedia Card Interface support"
--	depends on AVR32 || ARCH_AT91
--	help
--	  This selects the Atmel Multimedia Card Interface driver. If
--	  you have an AT32 (AVR32) or AT91 platform with a Multimedia
--	  Card slot, say Y or M here.
--
--	  If unsure, say N.
--
--endchoice
--
- config MMC_ATMELMCI_DMA
- 	bool "Atmel MCI DMA support (EXPERIMENTAL)"
- 	depends on MMC_ATMELMCI && (AVR32 || ARCH_AT91SAM9G45) && DMA_ENGINE && EXPERIMENTAL
diff --git a/target/linux/patches/3.4.4/non-static.patch b/target/linux/patches/3.4.4/non-static.patch
deleted file mode 100644
index a967703d0..000000000
--- a/target/linux/patches/3.4.4/non-static.patch
+++ /dev/null
@@ -1,33 +0,0 @@
-diff -Nur linux-2.6.39-rc6.orig/fs/namei.c linux-2.6.39-rc6/fs/namei.c
---- linux-2.6.39-rc6.orig/fs/namei.c	2011-05-04 04:59:13.000000000 +0200
-+++ linux-2.6.39-rc6/fs/namei.c	2011-05-05 11:30:14.000000000 +0200
-@@ -1769,7 +1769,7 @@
-  * needs parent already locked. Doesn't follow mounts.
-  * SMP-safe.
-  */
--static struct dentry *lookup_hash(struct nameidata *nd)
-+struct dentry *lookup_hash(struct nameidata *nd)
- {
- 	return __lookup_hash(&nd->last, nd->path.dentry, nd);
- }
-diff -Nur linux-2.6.39-rc6.orig/fs/splice.c linux-2.6.39-rc6/fs/splice.c
---- linux-2.6.39-rc6.orig/fs/splice.c	2011-05-04 04:59:13.000000000 +0200
-+++ linux-2.6.39-rc6/fs/splice.c	2011-05-05 11:31:04.000000000 +0200
-@@ -1081,7 +1081,7 @@
- /*
-  * Attempt to initiate a splice from pipe to file.
-  */
--static long do_splice_from(struct pipe_inode_info *pipe, struct file *out,
-+long do_splice_from(struct pipe_inode_info *pipe, struct file *out,
- 			   loff_t *ppos, size_t len, unsigned int flags)
- {
- 	ssize_t (*splice_write)(struct pipe_inode_info *, struct file *,
-@@ -1109,7 +1109,7 @@
- /*
-  * Attempt to initiate a splice from a file to a pipe.
-  */
--static long do_splice_to(struct file *in, loff_t *ppos,
-+long do_splice_to(struct file *in, loff_t *ppos,
- 			 struct pipe_inode_info *pipe, size_t len,
- 			 unsigned int flags)
- {
diff --git a/target/linux/patches/3.4.4/sparc-include.patch b/target/linux/patches/3.4.4/sparc-include.patch
deleted file mode 100644
index 2f8ffd061..000000000
--- a/target/linux/patches/3.4.4/sparc-include.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.39-rc7.orig/arch/sparc/boot/btfixupprep.c linux-2.6.39-rc7/arch/sparc/boot/btfixupprep.c
---- linux-2.6.39-rc7.orig/arch/sparc/boot/btfixupprep.c	2011-05-10 04:33:54.000000000 +0200
-+++ linux-2.6.39-rc7/arch/sparc/boot/btfixupprep.c	2011-05-21 13:34:40.000000000 +0200
-@@ -25,7 +25,6 @@
- #include <errno.h>
- #include <unistd.h>
- #include <stdlib.h>
--#include <malloc.h>
- 
- #define MAXSYMS 1024
- 
diff --git a/target/linux/patches/3.4.4/startup.patch b/target/linux/patches/3.4.4/startup.patch
deleted file mode 100644
index 68e8987b0..000000000
--- a/target/linux/patches/3.4.4/startup.patch
+++ /dev/null
@@ -1,20 +0,0 @@
-diff -Nur linux-2.6.34.orig/init/main.c linux-2.6.34/init/main.c
---- linux-2.6.34.orig/init/main.c	2010-05-16 23:17:36.000000000 +0200
-+++ linux-2.6.34/init/main.c	2010-05-20 20:13:26.321613615 +0200
-@@ -842,6 +842,7 @@
- 		printk(KERN_WARNING "Failed to execute %s.  Attempting "
- 					"defaults...\n", execute_command);
- 	}
-+	run_init_process("/init");
- 	run_init_process("/sbin/init");
- 	run_init_process("/etc/init");
- 	run_init_process("/bin/init");
-@@ -889,6 +890,8 @@
- 	if (sys_open((const char __user *) "/dev/console", O_RDWR, 0) < 0)
- 		printk(KERN_WARNING "Warning: unable to open an initial console.\n");
- 
-+	printk(KERN_WARNING "Starting Linux (built with OpenADK).\n");
-+
- 	(void) sys_dup(0);
- 	(void) sys_dup(0);
- 	/*
diff --git a/target/linux/patches/3.4.4/usb-defaults-off.patch b/target/linux/patches/3.4.4/usb-defaults-off.patch
deleted file mode 100644
index 31367108a..000000000
--- a/target/linux/patches/3.4.4/usb-defaults-off.patch
+++ /dev/null
@@ -1,32 +0,0 @@
-diff -Nur linux-2.6.37.orig//drivers/usb/core/Kconfig linux-2.6.37/drivers/usb/core/Kconfig
---- linux-2.6.37.orig//drivers/usb/core/Kconfig	2011-01-05 01:50:19.000000000 +0100
-+++ linux-2.6.37/drivers/usb/core/Kconfig	2011-04-12 19:04:23.000000000 +0200
-@@ -59,7 +59,7 @@
- config USB_DEVICE_CLASS
- 	bool "USB device class-devices (DEPRECATED)"
- 	depends on USB
--	default y
-+	default n
- 	---help---
- 	  Userspace access to USB devices is granted by device-nodes exported
- 	  directly from the usbdev in sysfs. Old versions of the driver
-diff -Nur linux-2.6.37.orig//drivers/usb/host/Kconfig linux-2.6.37/drivers/usb/host/Kconfig
---- linux-2.6.37.orig//drivers/usb/host/Kconfig	2011-01-05 01:50:19.000000000 +0100
-+++ linux-2.6.37/drivers/usb/host/Kconfig	2011-04-12 19:04:48.000000000 +0200
-@@ -62,6 +62,7 @@
- config USB_EHCI_ROOT_HUB_TT
- 	bool "Root Hub Transaction Translators"
- 	depends on USB_EHCI_HCD
-+	default n
- 	---help---
- 	  Some EHCI chips have vendor-specific extensions to integrate
- 	  transaction translators, so that no OHCI or UHCI companion
-@@ -74,7 +75,7 @@
- config USB_EHCI_TT_NEWSCHED
- 	bool "Improved Transaction Translator scheduling"
- 	depends on USB_EHCI_HCD
--	default y
-+	default n
- 	---help---
- 	  This changes the periodic scheduling code to fill more of the low
- 	  and full speed bandwidth available from the Transaction Translator
diff --git a/target/linux/patches/3.4.4/vga-cons-default-off.patch b/target/linux/patches/3.4.4/vga-cons-default-off.patch
deleted file mode 100644
index 178aeeeb9..000000000
--- a/target/linux/patches/3.4.4/vga-cons-default-off.patch
+++ /dev/null
@@ -1,12 +0,0 @@
-diff -Nur linux-2.6.37.orig//drivers/video/console/Kconfig linux-2.6.37/drivers/video/console/Kconfig
---- linux-2.6.37.orig//drivers/video/console/Kconfig	2011-01-05 01:50:19.000000000 +0100
-+++ linux-2.6.37/drivers/video/console/Kconfig	2011-04-12 16:29:34.000000000 +0200
-@@ -7,7 +7,7 @@
- config VGA_CONSOLE
- 	bool "VGA text console" if EMBEDDED || !X86
- 	depends on !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !SUPERH && !BLACKFIN && !AVR32 && !MN10300 && (!ARM || ARCH_FOOTBRIDGE || ARCH_INTEGRATOR || ARCH_NETWINDER)
--	default y
-+	default n
- 	help
- 	  Saying Y here will allow you to use Linux in text mode through a
- 	  display that complies with the generic VGA standard. Virtually
diff --git a/target/linux/patches/3.4.4/wlan-cf.patch b/target/linux/patches/3.4.4/wlan-cf.patch
deleted file mode 100644
index fc20759e2..000000000
--- a/target/linux/patches/3.4.4/wlan-cf.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.39.orig/drivers/net/wireless/hostap/hostap_cs.c linux-2.6.39/drivers/net/wireless/hostap/hostap_cs.c
---- linux-2.6.39.orig/drivers/net/wireless/hostap/hostap_cs.c	2011-05-19 06:06:34.000000000 +0200
-+++ linux-2.6.39/drivers/net/wireless/hostap/hostap_cs.c	2011-09-12 02:46:26.987984145 +0200
-@@ -623,6 +623,7 @@
- static struct pcmcia_device_id hostap_cs_ids[] = {
- 	PCMCIA_DEVICE_MANF_CARD(0x000b, 0x7100),
- 	PCMCIA_DEVICE_MANF_CARD(0x000b, 0x7300),
-+	PCMCIA_DEVICE_MANF_CARD(0x0004, 0x2003),
- 	PCMCIA_DEVICE_MANF_CARD(0x0101, 0x0777),
- 	PCMCIA_DEVICE_MANF_CARD(0x0126, 0x8000),
- 	PCMCIA_DEVICE_MANF_CARD(0x0138, 0x0002),
diff --git a/target/linux/patches/3.4.4/zlib-inflate.patch b/target/linux/patches/3.4.4/zlib-inflate.patch
deleted file mode 100644
index 58e1f6d21..000000000
--- a/target/linux/patches/3.4.4/zlib-inflate.patch
+++ /dev/null
@@ -1,12 +0,0 @@
-diff -Nur linux-2.6.37.orig/lib/Kconfig linux-2.6.37/lib/Kconfig
---- linux-2.6.37.orig/lib/Kconfig	2011-01-05 01:50:19.000000000 +0100
-+++ linux-2.6.37/lib/Kconfig	2011-03-01 20:10:29.833370667 +0100
-@@ -95,7 +95,7 @@
- # compression support is select'ed if needed
- #
- config ZLIB_INFLATE
--	tristate
-+	boolean
- 
- config ZLIB_DEFLATE
- 	tristate
diff --git a/target/linux/patches/3.0.34/bsd-compatibility.patch b/target/linux/patches/3.4.6/bsd-compatibility.patch
index 9e91a62de..9e91a62de 100644
--- a/target/linux/patches/3.0.34/bsd-compatibility.patch
+++ b/target/linux/patches/3.4.6/bsd-compatibility.patch
diff --git a/target/linux/patches/3.0.34/cris-etrax.patch b/target/linux/patches/3.4.6/cris-etrax.patch
index a80d9a8b8..a80d9a8b8 100644
--- a/target/linux/patches/3.0.34/cris-etrax.patch
+++ b/target/linux/patches/3.4.6/cris-etrax.patch
diff --git a/target/linux/patches/3.0.34/defaults.patch b/target/linux/patches/3.4.6/defaults.patch
index 58aae610b..58aae610b 100644
--- a/target/linux/patches/3.0.34/defaults.patch
+++ b/target/linux/patches/3.4.6/defaults.patch
diff --git a/target/linux/patches/3.0.34/gemalto.patch b/target/linux/patches/3.4.6/gemalto.patch
index f3c223b5e..f3c223b5e 100644
--- a/target/linux/patches/3.0.34/gemalto.patch
+++ b/target/linux/patches/3.4.6/gemalto.patch
diff --git a/target/linux/patches/3.3.8/lemote-rfkill.patch b/target/linux/patches/3.4.6/lemote-rfkill.patch
index a61488434..a61488434 100644
--- a/target/linux/patches/3.3.8/lemote-rfkill.patch
+++ b/target/linux/patches/3.4.6/lemote-rfkill.patch
diff --git a/target/linux/patches/3.0.34/mmc-host.patch b/target/linux/patches/3.4.6/mmc-host.patch
index 3d0e37add..3d0e37add 100644
--- a/target/linux/patches/3.0.34/mmc-host.patch
+++ b/target/linux/patches/3.4.6/mmc-host.patch
diff --git a/target/linux/patches/3.3.8/module-alloc-size-check.patch b/target/linux/patches/3.4.6/module-alloc-size-check.patch
index a792ac60a..a792ac60a 100644
--- a/target/linux/patches/3.3.8/module-alloc-size-check.patch
+++ b/target/linux/patches/3.4.6/module-alloc-size-check.patch
diff --git a/target/linux/patches/3.0.34/non-static.patch b/target/linux/patches/3.4.6/non-static.patch
index a967703d0..a967703d0 100644
--- a/target/linux/patches/3.0.34/non-static.patch
+++ b/target/linux/patches/3.4.6/non-static.patch
diff --git a/target/linux/patches/3.0.34/sparc-include.patch b/target/linux/patches/3.4.6/sparc-include.patch
index 2f8ffd061..2f8ffd061 100644
--- a/target/linux/patches/3.0.34/sparc-include.patch
+++ b/target/linux/patches/3.4.6/sparc-include.patch
diff --git a/target/linux/patches/3.0.34/startup.patch b/target/linux/patches/3.4.6/startup.patch
index 68e8987b0..68e8987b0 100644
--- a/target/linux/patches/3.0.34/startup.patch
+++ b/target/linux/patches/3.4.6/startup.patch
diff --git a/target/linux/patches/3.0.34/usb-defaults-off.patch b/target/linux/patches/3.4.6/usb-defaults-off.patch
index 31367108a..31367108a 100644
--- a/target/linux/patches/3.0.34/usb-defaults-off.patch
+++ b/target/linux/patches/3.4.6/usb-defaults-off.patch
diff --git a/target/linux/patches/3.4.4/uuid.patch b/target/linux/patches/3.4.6/uuid.patch
index ca23accdf..ca23accdf 100644
--- a/target/linux/patches/3.4.4/uuid.patch
+++ b/target/linux/patches/3.4.6/uuid.patch
diff --git a/target/linux/patches/3.0.34/vga-cons-default-off.patch b/target/linux/patches/3.4.6/vga-cons-default-off.patch
index 178aeeeb9..178aeeeb9 100644
--- a/target/linux/patches/3.0.34/vga-cons-default-off.patch
+++ b/target/linux/patches/3.4.6/vga-cons-default-off.patch
diff --git a/target/linux/patches/3.0.34/wlan-cf.patch b/target/linux/patches/3.4.6/wlan-cf.patch
index fc20759e2..fc20759e2 100644
--- a/target/linux/patches/3.0.34/wlan-cf.patch
+++ b/target/linux/patches/3.4.6/wlan-cf.patch
diff --git a/target/linux/patches/3.0.34/zlib-inflate.patch b/target/linux/patches/3.4.6/zlib-inflate.patch
index 58e1f6d21..58e1f6d21 100644
--- a/target/linux/patches/3.0.34/zlib-inflate.patch
+++ b/target/linux/patches/3.4.6/zlib-inflate.patch
diff --git a/target/linux/patches/3.1.10/bsd-compatibility.patch b/target/linux/patches/3.5/bsd-compatibility.patch
index 9e91a62de..9e91a62de 100644
--- a/target/linux/patches/3.1.10/bsd-compatibility.patch
+++ b/target/linux/patches/3.5/bsd-compatibility.patch
diff --git a/target/linux/patches/3.1.10/cris-etrax.patch b/target/linux/patches/3.5/cris-etrax.patch
index a80d9a8b8..a80d9a8b8 100644
--- a/target/linux/patches/3.1.10/cris-etrax.patch
+++ b/target/linux/patches/3.5/cris-etrax.patch
diff --git a/target/linux/patches/3.1.10/defaults.patch b/target/linux/patches/3.5/defaults.patch
index 58aae610b..58aae610b 100644
--- a/target/linux/patches/3.1.10/defaults.patch
+++ b/target/linux/patches/3.5/defaults.patch
diff --git a/target/linux/patches/3.1.10/gemalto.patch b/target/linux/patches/3.5/gemalto.patch
index f3c223b5e..f3c223b5e 100644
--- a/target/linux/patches/3.1.10/gemalto.patch
+++ b/target/linux/patches/3.5/gemalto.patch
diff --git a/target/linux/patches/3.4.4/lemote-rfkill.patch b/target/linux/patches/3.5/lemote-rfkill.patch
index a61488434..a61488434 100644
--- a/target/linux/patches/3.4.4/lemote-rfkill.patch
+++ b/target/linux/patches/3.5/lemote-rfkill.patch
diff --git a/target/linux/patches/3.1.10/mmc-host.patch b/target/linux/patches/3.5/mmc-host.patch
index 3d0e37add..3d0e37add 100644
--- a/target/linux/patches/3.1.10/mmc-host.patch
+++ b/target/linux/patches/3.5/mmc-host.patch
diff --git a/target/linux/patches/3.4.4/module-alloc-size-check.patch b/target/linux/patches/3.5/module-alloc-size-check.patch
index a792ac60a..a792ac60a 100644
--- a/target/linux/patches/3.4.4/module-alloc-size-check.patch
+++ b/target/linux/patches/3.5/module-alloc-size-check.patch
diff --git a/target/linux/patches/3.1.10/non-static.patch b/target/linux/patches/3.5/non-static.patch
index a967703d0..a967703d0 100644
--- a/target/linux/patches/3.1.10/non-static.patch
+++ b/target/linux/patches/3.5/non-static.patch
diff --git a/target/linux/patches/3.1.10/sparc-include.patch b/target/linux/patches/3.5/sparc-include.patch
index 2f8ffd061..2f8ffd061 100644
--- a/target/linux/patches/3.1.10/sparc-include.patch
+++ b/target/linux/patches/3.5/sparc-include.patch
diff --git a/target/linux/patches/3.1.10/startup.patch b/target/linux/patches/3.5/startup.patch
index 68e8987b0..68e8987b0 100644
--- a/target/linux/patches/3.1.10/startup.patch
+++ b/target/linux/patches/3.5/startup.patch
diff --git a/target/linux/patches/3.1.10/usb-defaults-off.patch b/target/linux/patches/3.5/usb-defaults-off.patch
index 31367108a..31367108a 100644
--- a/target/linux/patches/3.1.10/usb-defaults-off.patch
+++ b/target/linux/patches/3.5/usb-defaults-off.patch
diff --git a/target/linux/patches/3.0.34/uuid.patch b/target/linux/patches/3.5/uuid.patch
index 2529fdab5..ca23accdf 100644
--- a/target/linux/patches/3.0.34/uuid.patch
+++ b/target/linux/patches/3.5/uuid.patch
@@ -1,16 +1,16 @@
-diff -Nur linux-2.6.38.4.orig/block/genhd.c linux-2.6.38.4/block/genhd.c
---- linux-2.6.38.4.orig/block/genhd.c	2011-04-21 23:34:46.000000000 +0200
-+++ linux-2.6.38.4/block/genhd.c	2011-04-27 19:21:18.668912036 +0200
-@@ -34,7 +34,7 @@
+diff -Nur linux-3.4.2.orig/block/genhd.c linux-3.4.2/block/genhd.c
+--- linux-3.4.2.orig/block/genhd.c	2012-06-09 17:36:33.000000000 +0200
++++ linux-3.4.2/block/genhd.c	2012-06-15 18:19:16.000000000 +0200
+@@ -33,7 +33,7 @@
  static DEFINE_MUTEX(ext_devt_mutex);
  static DEFINE_IDR(ext_devt_idr);
  
 -static struct device_type disk_type;
 +struct device_type disk_type;
  
+ static void disk_alloc_events(struct gendisk *disk);
  static void disk_add_events(struct gendisk *disk);
- static void disk_del_events(struct gendisk *disk);
-@@ -1118,7 +1118,7 @@
+@@ -1122,7 +1122,7 @@
  	return NULL;
  }
  
@@ -19,10 +19,18 @@ diff -Nur linux-2.6.38.4.orig/block/genhd.c linux-2.6.38.4/block/genhd.c
  	.name		= "disk",
  	.groups		= disk_attr_groups,
  	.release	= disk_release,
-diff -Nur linux-2.6.38.4.orig/init/do_mounts.c linux-2.6.38.4/init/do_mounts.c
---- linux-2.6.38.4.orig/init/do_mounts.c	2011-04-21 23:34:46.000000000 +0200
-+++ linux-2.6.38.4/init/do_mounts.c	2011-04-27 19:26:52.721413000 +0200
-@@ -32,6 +32,132 @@
+diff -Nur linux-3.4.2.orig/init/do_mounts.c linux-3.4.2/init/do_mounts.c
+--- linux-3.4.2.orig/init/do_mounts.c	2012-06-09 17:36:33.000000000 +0200
++++ linux-3.4.2/init/do_mounts.c	2012-06-15 18:20:11.000000000 +0200
+@@ -21,6 +21,7 @@
+ #include <linux/nfs_fs_sb.h>
+ #include <linux/nfs_mount.h>
+ 
++#include "../fs/ext2/ext2.h"
+ #include "do_mounts.h"
+ 
+ int __initdata rd_doload;	/* 1 = load RAM disk, 0 = don't load */
+@@ -32,6 +33,132 @@
  
  dev_t ROOT_DEV;
  
@@ -155,7 +163,7 @@ diff -Nur linux-2.6.38.4.orig/init/do_mounts.c linux-2.6.38.4/init/do_mounts.c
  static int __init load_ramdisk(char *str)
  {
  	rd_doload = simple_strtol(str,NULL,0) & 3;
-@@ -218,6 +344,13 @@
+@@ -256,6 +383,13 @@
  static int __init root_dev_setup(char *line)
  {
  	strlcpy(saved_root_name, line, sizeof(saved_root_name));
@@ -169,7 +177,7 @@ diff -Nur linux-2.6.38.4.orig/init/do_mounts.c linux-2.6.38.4/init/do_mounts.c
  	return 1;
  }
  
-@@ -403,6 +536,83 @@
+@@ -471,6 +605,83 @@
  
  void __init mount_root(void)
  {
@@ -251,5 +259,5 @@ diff -Nur linux-2.6.38.4.orig/init/do_mounts.c linux-2.6.38.4/init/do_mounts.c
 +#endif /* CONFIG_EXT2_FS for UUID support */
 +
  #ifdef CONFIG_ROOT_NFS
- 	if (MAJOR(ROOT_DEV) == UNNAMED_MAJOR) {
+ 	if (ROOT_DEV == Root_NFS) {
  		if (mount_nfs_root())
diff --git a/target/linux/patches/3.1.10/vga-cons-default-off.patch b/target/linux/patches/3.5/vga-cons-default-off.patch
index 178aeeeb9..178aeeeb9 100644
--- a/target/linux/patches/3.1.10/vga-cons-default-off.patch
+++ b/target/linux/patches/3.5/vga-cons-default-off.patch
diff --git a/target/linux/patches/3.1.10/wlan-cf.patch b/target/linux/patches/3.5/wlan-cf.patch
index fc20759e2..fc20759e2 100644
--- a/target/linux/patches/3.1.10/wlan-cf.patch
+++ b/target/linux/patches/3.5/wlan-cf.patch
diff --git a/target/linux/patches/3.1.10/zlib-inflate.patch b/target/linux/patches/3.5/zlib-inflate.patch
index 58e1f6d21..58e1f6d21 100644
--- a/target/linux/patches/3.1.10/zlib-inflate.patch
+++ b/target/linux/patches/3.5/zlib-inflate.patch
diff --git a/toolchain/kernel-headers/patches/3.0.34/aufs2.patch b/toolchain/kernel-headers/patches/3.0.34/aufs2.patch
deleted file mode 100644
index eafbe6814..000000000
--- a/toolchain/kernel-headers/patches/3.0.34/aufs2.patch
+++ /dev/null
@@ -1,240 +0,0 @@
-diff -Nur linux-2.6.36.orig/include/linux/Kbuild linux-2.6.36/include/linux/Kbuild
---- linux-2.6.36.orig/include/linux/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/include/linux/Kbuild	2011-01-10 19:52:38.000000000 +0100
-@@ -60,6 +60,7 @@
- header-y += atmsap.h
- header-y += atmsvc.h
- header-y += audit.h
-+header-y += aufs_type.h
- header-y += auto_fs.h
- header-y += auto_fs4.h
- header-y += auxvec.h
-diff -Nur linux-2.6.36.orig/include/linux/aufs_type.h linux-2.6.36/include/linux/aufs_type.h
---- linux-2.6.36.orig/include/linux/aufs_type.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-2.6.36/include/linux/aufs_type.h	2011-01-10 19:54:22.000000000 +0100
-@@ -0,0 +1,197 @@
-+/*
-+ * Copyright (C) 2005-2011 Junjiro R. Okajima
-+ *
-+ * This program, aufs is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ */
-+
-+#ifndef __AUFS_TYPE_H__
-+#define __AUFS_TYPE_H__
-+
-+#include <linux/ioctl.h>
-+#include <linux/kernel.h>
-+#include <linux/limits.h>
-+#include <linux/types.h>
-+
-+#define AUFS_VERSION	"2.1-standalone.tree-36-20110110"
-+
-+/* todo? move this to linux-2.6.19/include/magic.h */
-+#define AUFS_SUPER_MAGIC	('a' << 24 | 'u' << 16 | 'f' << 8 | 's')
-+
-+/* ---------------------------------------------------------------------- */
-+
-+#ifdef CONFIG_AUFS_BRANCH_MAX_127
-+typedef __s8 aufs_bindex_t;
-+#define AUFS_BRANCH_MAX 127
-+#else
-+typedef __s16 aufs_bindex_t;
-+#ifdef CONFIG_AUFS_BRANCH_MAX_511
-+#define AUFS_BRANCH_MAX 511
-+#elif defined(CONFIG_AUFS_BRANCH_MAX_1023)
-+#define AUFS_BRANCH_MAX 1023
-+#elif defined(CONFIG_AUFS_BRANCH_MAX_32767)
-+#define AUFS_BRANCH_MAX 32767
-+#endif
-+#endif
-+
-+#ifdef __KERNEL__
-+#ifndef AUFS_BRANCH_MAX
-+#error unknown CONFIG_AUFS_BRANCH_MAX value
-+#endif
-+#endif /* __KERNEL__ */
-+
-+/* ---------------------------------------------------------------------- */
-+
-+#define AUFS_NAME		"aufs"
-+#define AUFS_FSTYPE		AUFS_NAME
-+
-+#define AUFS_ROOT_INO		2
-+#define AUFS_FIRST_INO		11
-+
-+#define AUFS_WH_PFX		".wh."
-+#define AUFS_WH_PFX_LEN		((int)sizeof(AUFS_WH_PFX) - 1)
-+#define AUFS_WH_TMP_LEN		4
-+/* a limit for rmdir/rename a dir */
-+#define AUFS_MAX_NAMELEN	(NAME_MAX \
-+				- AUFS_WH_PFX_LEN * 2	/* doubly whiteouted */\
-+				- 1			/* dot */\
-+				- AUFS_WH_TMP_LEN)	/* hex */
-+#define AUFS_XINO_FNAME		"." AUFS_NAME ".xino"
-+#define AUFS_XINO_DEFPATH	"/tmp/" AUFS_XINO_FNAME
-+#define AUFS_XINO_TRUNC_INIT	64 /* blocks */
-+#define AUFS_XINO_TRUNC_STEP	4  /* blocks */
-+#define AUFS_DIRWH_DEF		3
-+#define AUFS_RDCACHE_DEF	10 /* seconds */
-+#define AUFS_RDCACHE_MAX	3600 /* seconds */
-+#define AUFS_RDBLK_DEF		512 /* bytes */
-+#define AUFS_RDHASH_DEF		32
-+#define AUFS_WKQ_NAME		AUFS_NAME "d"
-+#define AUFS_WKQ_PRE_NAME	AUFS_WKQ_NAME "_pre"
-+#define AUFS_MFS_DEF_SEC	30 /* seconds */
-+#define AUFS_MFS_MAX_SEC	3600 /* seconds */
-+#define AUFS_PLINK_WARN		100 /* number of plinks */
-+
-+/* pseudo-link maintenace under /proc */
-+#define AUFS_PLINK_MAINT_NAME	"plink_maint"
-+#define AUFS_PLINK_MAINT_DIR	"fs/" AUFS_NAME
-+#define AUFS_PLINK_MAINT_PATH	AUFS_PLINK_MAINT_DIR "/" AUFS_PLINK_MAINT_NAME
-+
-+#define AUFS_DIROPQ_NAME	AUFS_WH_PFX ".opq" /* whiteouted doubly */
-+#define AUFS_WH_DIROPQ		AUFS_WH_PFX AUFS_DIROPQ_NAME
-+
-+#define AUFS_BASE_NAME		AUFS_WH_PFX AUFS_NAME
-+#define AUFS_PLINKDIR_NAME	AUFS_WH_PFX "plnk"
-+#define AUFS_ORPHDIR_NAME	AUFS_WH_PFX "orph"
-+
-+/* doubly whiteouted */
-+#define AUFS_WH_BASE		AUFS_WH_PFX AUFS_BASE_NAME
-+#define AUFS_WH_PLINKDIR	AUFS_WH_PFX AUFS_PLINKDIR_NAME
-+#define AUFS_WH_ORPHDIR		AUFS_WH_PFX AUFS_ORPHDIR_NAME
-+
-+/* branch permission */
-+#define AUFS_BRPERM_RW		"rw"
-+#define AUFS_BRPERM_RO		"ro"
-+#define AUFS_BRPERM_RR		"rr"
-+#define AUFS_BRPERM_WH		"wh"
-+#define AUFS_BRPERM_NLWH	"nolwh"
-+#define AUFS_BRPERM_ROWH	AUFS_BRPERM_RO "+" AUFS_BRPERM_WH
-+#define AUFS_BRPERM_RRWH	AUFS_BRPERM_RR "+" AUFS_BRPERM_WH
-+#define AUFS_BRPERM_RWNLWH	AUFS_BRPERM_RW "+" AUFS_BRPERM_NLWH
-+
-+/* ---------------------------------------------------------------------- */
-+
-+/* ioctl */
-+enum {
-+	/* readdir in userspace */
-+	AuCtl_RDU,
-+	AuCtl_RDU_INO,
-+
-+	/* pathconf wrapper */
-+	AuCtl_WBR_FD
-+};
-+
-+/* borrowed from linux/include/linux/kernel.h */
-+#ifndef ALIGN
-+#define ALIGN(x, a)		__ALIGN_MASK(x, (typeof(x))(a)-1)
-+#define __ALIGN_MASK(x, mask)	(((x)+(mask))&~(mask))
-+#endif
-+
-+/* borrowed from linux/include/linux/compiler-gcc3.h */
-+#ifndef __aligned
-+#define __aligned(x)			__attribute__((aligned(x)))
-+#define __packed			__attribute__((packed))
-+#endif
-+
-+struct au_rdu_cookie {
-+	__u64		h_pos;
-+	__s16		bindex;
-+	__u8		flags;
-+	__u8		pad;
-+	__u32		generation;
-+} __aligned(8);
-+
-+struct au_rdu_ent {
-+	__u64		ino;
-+	__s16		bindex;
-+	__u8		type;
-+	__u8		nlen;
-+	__u8		wh;
-+	char		name[0];
-+} __aligned(8);
-+
-+static inline int au_rdu_len(int nlen)
-+{
-+	/* include the terminating NULL */
-+	return ALIGN(sizeof(struct au_rdu_ent) + nlen + 1,
-+		     sizeof(__u64));
-+}
-+
-+union au_rdu_ent_ul {
-+	struct au_rdu_ent __user	*e;
-+	__u64				ul;
-+};
-+
-+enum {
-+	AufsCtlRduV_SZ,
-+	AufsCtlRduV_End
-+};
-+
-+struct aufs_rdu {
-+	/* input */
-+	union {
-+		__u64		sz;	/* AuCtl_RDU */
-+		__u64		nent;	/* AuCtl_RDU_INO */
-+	};
-+	union au_rdu_ent_ul	ent;
-+	__u16			verify[AufsCtlRduV_End];
-+
-+	/* input/output */
-+	__u32			blk;
-+
-+	/* output */
-+	union au_rdu_ent_ul	tail;
-+	/* number of entries which were added in a single call */
-+	__u64			rent;
-+	__u8			full;
-+	__u8			shwh;
-+
-+	struct au_rdu_cookie	cookie;
-+} __aligned(8);
-+
-+#define AuCtlType		'A'
-+#define AUFS_CTL_RDU		_IOWR(AuCtlType, AuCtl_RDU, struct aufs_rdu)
-+#define AUFS_CTL_RDU_INO	_IOWR(AuCtlType, AuCtl_RDU_INO, struct aufs_rdu)
-+#define AUFS_CTL_WBR_FD		_IO(AuCtlType, AuCtl_WBR_FD)
-+
-+#endif /* __AUFS_TYPE_H__ */
-diff -Nur linux-2.6.36.orig/include/linux/namei.h linux-2.6.36/include/linux/namei.h
---- linux-2.6.36.orig/include/linux/namei.h	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/include/linux/namei.h	2011-01-10 19:52:38.000000000 +0100
-@@ -73,6 +73,9 @@
- extern struct file *lookup_instantiate_filp(struct nameidata *nd, struct dentry *dentry,
- 		int (*open)(struct inode *, struct file *));
- 
-+extern struct dentry *lookup_hash(struct nameidata *nd);
-+extern int __lookup_one_len(const char *name, struct qstr *this,
-+			    struct dentry *base, int len);
- extern struct dentry *lookup_one_len(const char *, struct dentry *, int);
- 
- extern int follow_down(struct path *);
-diff -Nur linux-2.6.36.orig/include/linux/splice.h linux-2.6.36/include/linux/splice.h
---- linux-2.6.36.orig/include/linux/splice.h	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/include/linux/splice.h	2011-01-10 19:52:38.000000000 +0100
-@@ -89,4 +89,10 @@
- extern void splice_shrink_spd(struct pipe_inode_info *,
- 				struct splice_pipe_desc *);
- 
-+extern long do_splice_from(struct pipe_inode_info *pipe, struct file *out,
-+			   loff_t *ppos, size_t len, unsigned int flags);
-+extern long do_splice_to(struct file *in, loff_t *ppos,
-+			 struct pipe_inode_info *pipe, size_t len,
-+			 unsigned int flags);
-+
- #endif
-
diff --git a/toolchain/kernel-headers/patches/3.0.34/etrax-header.patch b/toolchain/kernel-headers/patches/3.0.34/etrax-header.patch
deleted file mode 100644
index 0c644ce25..000000000
--- a/toolchain/kernel-headers/patches/3.0.34/etrax-header.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-diff -Nur linux-2.6.36.orig/arch/cris/include/arch-v10/arch/Kbuild linux-2.6.36/arch/cris/include/arch-v10/arch/Kbuild
---- linux-2.6.36.orig/arch/cris/include/arch-v10/arch/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/arch/cris/include/arch-v10/arch/Kbuild	2010-11-15 17:35:24.000000000 +0100
-@@ -1,4 +1,9 @@
-+header-y += dma.h
-+header-y += io_interface_mux.h
- header-y += user.h
- header-y += svinto.h
- header-y += sv_addr_ag.h
- header-y += sv_addr.agh
-+header-y += elf.h
-+header-y += page.h
-+header-y += ptrace.h
-diff -Nur linux-2.6.36.orig/arch/cris/include/arch-v32/arch/Kbuild linux-2.6.36/arch/cris/include/arch-v32/arch/Kbuild
---- linux-2.6.36.orig/arch/cris/include/arch-v32/arch/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/arch/cris/include/arch-v32/arch/Kbuild	2010-11-15 17:35:24.000000000 +0100
-@@ -1,2 +1,6 @@
- header-y += user.h
- header-y += cryptocop.h
-+header-y += elf.h
-+header-y += page.h
-+header-y += ptrace.h
-+
-diff -Nur linux-2.6.36.orig/arch/cris/include/asm/Kbuild linux-2.6.36/arch/cris/include/asm/Kbuild
---- linux-2.6.36.orig/arch/cris/include/asm/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/arch/cris/include/asm/Kbuild	2010-11-15 17:37:57.000000000 +0100
-@@ -1,10 +1,13 @@
- include include/asm-generic/Kbuild.asm
- 
--header-y += arch-v10/
--header-y += arch-v32/
--
-+header-y += ../arch-v10/arch/
-+header-y += ../arch-v32/arch/
-+  
-+header-y += elf.h
- header-y += ethernet.h
- header-y += etraxgpio.h
- header-y += rs485.h
- header-y += rtc.h
- header-y += sync_serial.h
-+header-y += page.h
-+header-y += user.h
-diff -Nur linux-2.6.36.orig/include/asm-generic/Kbuild linux-2.6.36/include/asm-generic/Kbuild
---- linux-2.6.36.orig/include/asm-generic/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/include/asm-generic/Kbuild	2010-11-15 17:37:02.000000000 +0100
-@@ -3,14 +3,17 @@
- header-y += errno-base.h
- header-y += errno.h
- header-y += fcntl.h
-+header-y += getorder.h
- header-y += int-l64.h
- header-y += int-ll64.h
- header-y += ioctl.h
- header-y += ioctls.h
- header-y += ipcbuf.h
-+header-y += memory_model.h
- header-y += mman-common.h
- header-y += mman.h
- header-y += msgbuf.h
-+header-y += page.h
- header-y += param.h
- header-y += poll.h
- header-y += posix_types.h
-diff -Nur linux-2.6.36.orig/include/linux/Kbuild linux-2.6.36/include/linux/Kbuild
---- linux-2.6.36.orig/include/linux/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/include/linux/Kbuild	2010-11-15 17:36:11.000000000 +0100
-@@ -365,6 +365,7 @@
- header-y += un.h
- header-y += unistd.h
- header-y += usbdevice_fs.h
-+header-y += user.h
- header-y += utime.h
- header-y += utsname.h
- header-y += veth.h
diff --git a/toolchain/kernel-headers/patches/3.0.34/microperl.patch b/toolchain/kernel-headers/patches/3.0.34/microperl.patch
deleted file mode 100644
index 2955b7421..000000000
--- a/toolchain/kernel-headers/patches/3.0.34/microperl.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-diff -Nur linux-2.6.30.5.orig/scripts/headers_check.pl linux-2.6.30.5/scripts/headers_check.pl
---- linux-2.6.30.5.orig/scripts/headers_check.pl	2009-08-16 23:19:38.000000000 +0200
-+++ linux-2.6.30.5/scripts/headers_check.pl	2009-09-14 21:16:21.000000000 +0200
-@@ -18,7 +18,7 @@
- #
- # 3) Check for leaked CONFIG_ symbols
- 
--use strict;
-+#use strict;
- 
- my ($dir, $arch, @files) = @ARGV;
- 
-diff -Nur linux-2.6.30.5.orig/scripts/headers_install.pl linux-2.6.30.5/scripts/headers_install.pl
---- linux-2.6.30.5.orig/scripts/headers_install.pl	2009-08-16 23:19:38.000000000 +0200
-+++ linux-2.6.30.5/scripts/headers_install.pl	2009-09-14 21:16:11.000000000 +0200
-@@ -16,7 +16,7 @@
- # 2) Drop include of compiler.h
- # 3) Drop all sections defined out by __KERNEL__ (using unifdef)
- 
--use strict;
-+#use strict;
- 
- my ($readdir, $installdir, $arch, @files) = @ARGV;
- 
diff --git a/toolchain/kernel-headers/patches/3.1.10/etrax-header.patch b/toolchain/kernel-headers/patches/3.1.10/etrax-header.patch
deleted file mode 100644
index 0c644ce25..000000000
--- a/toolchain/kernel-headers/patches/3.1.10/etrax-header.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-diff -Nur linux-2.6.36.orig/arch/cris/include/arch-v10/arch/Kbuild linux-2.6.36/arch/cris/include/arch-v10/arch/Kbuild
---- linux-2.6.36.orig/arch/cris/include/arch-v10/arch/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/arch/cris/include/arch-v10/arch/Kbuild	2010-11-15 17:35:24.000000000 +0100
-@@ -1,4 +1,9 @@
-+header-y += dma.h
-+header-y += io_interface_mux.h
- header-y += user.h
- header-y += svinto.h
- header-y += sv_addr_ag.h
- header-y += sv_addr.agh
-+header-y += elf.h
-+header-y += page.h
-+header-y += ptrace.h
-diff -Nur linux-2.6.36.orig/arch/cris/include/arch-v32/arch/Kbuild linux-2.6.36/arch/cris/include/arch-v32/arch/Kbuild
---- linux-2.6.36.orig/arch/cris/include/arch-v32/arch/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/arch/cris/include/arch-v32/arch/Kbuild	2010-11-15 17:35:24.000000000 +0100
-@@ -1,2 +1,6 @@
- header-y += user.h
- header-y += cryptocop.h
-+header-y += elf.h
-+header-y += page.h
-+header-y += ptrace.h
-+
-diff -Nur linux-2.6.36.orig/arch/cris/include/asm/Kbuild linux-2.6.36/arch/cris/include/asm/Kbuild
---- linux-2.6.36.orig/arch/cris/include/asm/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/arch/cris/include/asm/Kbuild	2010-11-15 17:37:57.000000000 +0100
-@@ -1,10 +1,13 @@
- include include/asm-generic/Kbuild.asm
- 
--header-y += arch-v10/
--header-y += arch-v32/
--
-+header-y += ../arch-v10/arch/
-+header-y += ../arch-v32/arch/
-+  
-+header-y += elf.h
- header-y += ethernet.h
- header-y += etraxgpio.h
- header-y += rs485.h
- header-y += rtc.h
- header-y += sync_serial.h
-+header-y += page.h
-+header-y += user.h
-diff -Nur linux-2.6.36.orig/include/asm-generic/Kbuild linux-2.6.36/include/asm-generic/Kbuild
---- linux-2.6.36.orig/include/asm-generic/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/include/asm-generic/Kbuild	2010-11-15 17:37:02.000000000 +0100
-@@ -3,14 +3,17 @@
- header-y += errno-base.h
- header-y += errno.h
- header-y += fcntl.h
-+header-y += getorder.h
- header-y += int-l64.h
- header-y += int-ll64.h
- header-y += ioctl.h
- header-y += ioctls.h
- header-y += ipcbuf.h
-+header-y += memory_model.h
- header-y += mman-common.h
- header-y += mman.h
- header-y += msgbuf.h
-+header-y += page.h
- header-y += param.h
- header-y += poll.h
- header-y += posix_types.h
-diff -Nur linux-2.6.36.orig/include/linux/Kbuild linux-2.6.36/include/linux/Kbuild
---- linux-2.6.36.orig/include/linux/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/include/linux/Kbuild	2010-11-15 17:36:11.000000000 +0100
-@@ -365,6 +365,7 @@
- header-y += un.h
- header-y += unistd.h
- header-y += usbdevice_fs.h
-+header-y += user.h
- header-y += utime.h
- header-y += utsname.h
- header-y += veth.h
diff --git a/toolchain/kernel-headers/patches/3.1.10/microperl.patch b/toolchain/kernel-headers/patches/3.1.10/microperl.patch
deleted file mode 100644
index 2955b7421..000000000
--- a/toolchain/kernel-headers/patches/3.1.10/microperl.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-diff -Nur linux-2.6.30.5.orig/scripts/headers_check.pl linux-2.6.30.5/scripts/headers_check.pl
---- linux-2.6.30.5.orig/scripts/headers_check.pl	2009-08-16 23:19:38.000000000 +0200
-+++ linux-2.6.30.5/scripts/headers_check.pl	2009-09-14 21:16:21.000000000 +0200
-@@ -18,7 +18,7 @@
- #
- # 3) Check for leaked CONFIG_ symbols
- 
--use strict;
-+#use strict;
- 
- my ($dir, $arch, @files) = @ARGV;
- 
-diff -Nur linux-2.6.30.5.orig/scripts/headers_install.pl linux-2.6.30.5/scripts/headers_install.pl
---- linux-2.6.30.5.orig/scripts/headers_install.pl	2009-08-16 23:19:38.000000000 +0200
-+++ linux-2.6.30.5/scripts/headers_install.pl	2009-09-14 21:16:11.000000000 +0200
-@@ -16,7 +16,7 @@
- # 2) Drop include of compiler.h
- # 3) Drop all sections defined out by __KERNEL__ (using unifdef)
- 
--use strict;
-+#use strict;
- 
- my ($readdir, $installdir, $arch, @files) = @ARGV;
- 
diff --git a/toolchain/kernel-headers/patches/3.2.20/cleankernel.patch b/toolchain/kernel-headers/patches/3.2.20/cleankernel.patch
deleted file mode 100644
index f8d5448ee..000000000
--- a/toolchain/kernel-headers/patches/3.2.20/cleankernel.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.29.1.orig/scripts/Makefile.headersinst linux-2.6.29.1/scripts/Makefile.headersinst
---- linux-2.6.29.1.orig/scripts/Makefile.headersinst	2009-04-02 22:55:27.000000000 +0200
-+++ linux-2.6.29.1/scripts/Makefile.headersinst	2009-04-17 20:56:09.143476927 +0200
-@@ -65,7 +65,6 @@
- 
- targets += $(install-file)
- $(install-file): scripts/headers_install.pl $(input-files) FORCE
--	$(if $(unwanted),$(call cmd,remove),)
- 	$(if $(wildcard $(dir $@)),,$(shell mkdir -p $(dir $@)))
- 	$(call if_changed,install)
- 
diff --git a/toolchain/kernel-headers/patches/3.2.20/etrax-header.patch b/toolchain/kernel-headers/patches/3.2.20/etrax-header.patch
deleted file mode 100644
index 0c644ce25..000000000
--- a/toolchain/kernel-headers/patches/3.2.20/etrax-header.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-diff -Nur linux-2.6.36.orig/arch/cris/include/arch-v10/arch/Kbuild linux-2.6.36/arch/cris/include/arch-v10/arch/Kbuild
---- linux-2.6.36.orig/arch/cris/include/arch-v10/arch/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/arch/cris/include/arch-v10/arch/Kbuild	2010-11-15 17:35:24.000000000 +0100
-@@ -1,4 +1,9 @@
-+header-y += dma.h
-+header-y += io_interface_mux.h
- header-y += user.h
- header-y += svinto.h
- header-y += sv_addr_ag.h
- header-y += sv_addr.agh
-+header-y += elf.h
-+header-y += page.h
-+header-y += ptrace.h
-diff -Nur linux-2.6.36.orig/arch/cris/include/arch-v32/arch/Kbuild linux-2.6.36/arch/cris/include/arch-v32/arch/Kbuild
---- linux-2.6.36.orig/arch/cris/include/arch-v32/arch/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/arch/cris/include/arch-v32/arch/Kbuild	2010-11-15 17:35:24.000000000 +0100
-@@ -1,2 +1,6 @@
- header-y += user.h
- header-y += cryptocop.h
-+header-y += elf.h
-+header-y += page.h
-+header-y += ptrace.h
-+
-diff -Nur linux-2.6.36.orig/arch/cris/include/asm/Kbuild linux-2.6.36/arch/cris/include/asm/Kbuild
---- linux-2.6.36.orig/arch/cris/include/asm/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/arch/cris/include/asm/Kbuild	2010-11-15 17:37:57.000000000 +0100
-@@ -1,10 +1,13 @@
- include include/asm-generic/Kbuild.asm
- 
--header-y += arch-v10/
--header-y += arch-v32/
--
-+header-y += ../arch-v10/arch/
-+header-y += ../arch-v32/arch/
-+  
-+header-y += elf.h
- header-y += ethernet.h
- header-y += etraxgpio.h
- header-y += rs485.h
- header-y += rtc.h
- header-y += sync_serial.h
-+header-y += page.h
-+header-y += user.h
-diff -Nur linux-2.6.36.orig/include/asm-generic/Kbuild linux-2.6.36/include/asm-generic/Kbuild
---- linux-2.6.36.orig/include/asm-generic/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/include/asm-generic/Kbuild	2010-11-15 17:37:02.000000000 +0100
-@@ -3,14 +3,17 @@
- header-y += errno-base.h
- header-y += errno.h
- header-y += fcntl.h
-+header-y += getorder.h
- header-y += int-l64.h
- header-y += int-ll64.h
- header-y += ioctl.h
- header-y += ioctls.h
- header-y += ipcbuf.h
-+header-y += memory_model.h
- header-y += mman-common.h
- header-y += mman.h
- header-y += msgbuf.h
-+header-y += page.h
- header-y += param.h
- header-y += poll.h
- header-y += posix_types.h
-diff -Nur linux-2.6.36.orig/include/linux/Kbuild linux-2.6.36/include/linux/Kbuild
---- linux-2.6.36.orig/include/linux/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/include/linux/Kbuild	2010-11-15 17:36:11.000000000 +0100
-@@ -365,6 +365,7 @@
- header-y += un.h
- header-y += unistd.h
- header-y += usbdevice_fs.h
-+header-y += user.h
- header-y += utime.h
- header-y += utsname.h
- header-y += veth.h
diff --git a/toolchain/kernel-headers/patches/3.2.20/linux-gcc-check.patch b/toolchain/kernel-headers/patches/3.2.20/linux-gcc-check.patch
deleted file mode 100644
index 7cc381845..000000000
--- a/toolchain/kernel-headers/patches/3.2.20/linux-gcc-check.patch
+++ /dev/null
@@ -1,18 +0,0 @@
-diff -Nur linux-2.6.32.orig/arch/mips/include/asm/sgidefs.h linux-2.6.32/arch/mips/include/asm/sgidefs.h
---- linux-2.6.32.orig/arch/mips/include/asm/sgidefs.h	2009-12-03 04:51:21.000000000 +0100
-+++ linux-2.6.32/arch/mips/include/asm/sgidefs.h	2010-02-14 11:49:21.000000000 +0100
-@@ -11,14 +11,6 @@
- #define __ASM_SGIDEFS_H
-
- /*
-- * Using a Linux compiler for building Linux seems logic but not to
-- * everybody.
-- */
--#ifndef __linux__
--#error Use a Linux compiler or give up.
--#endif
--
--/*
-  * Definitions for the ISA levels
-  *
-  * With the introduction of MIPS32 / MIPS64 instruction sets definitions
diff --git a/toolchain/kernel-headers/patches/3.2.20/microperl.patch b/toolchain/kernel-headers/patches/3.2.20/microperl.patch
deleted file mode 100644
index 2955b7421..000000000
--- a/toolchain/kernel-headers/patches/3.2.20/microperl.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-diff -Nur linux-2.6.30.5.orig/scripts/headers_check.pl linux-2.6.30.5/scripts/headers_check.pl
---- linux-2.6.30.5.orig/scripts/headers_check.pl	2009-08-16 23:19:38.000000000 +0200
-+++ linux-2.6.30.5/scripts/headers_check.pl	2009-09-14 21:16:21.000000000 +0200
-@@ -18,7 +18,7 @@
- #
- # 3) Check for leaked CONFIG_ symbols
- 
--use strict;
-+#use strict;
- 
- my ($dir, $arch, @files) = @ARGV;
- 
-diff -Nur linux-2.6.30.5.orig/scripts/headers_install.pl linux-2.6.30.5/scripts/headers_install.pl
---- linux-2.6.30.5.orig/scripts/headers_install.pl	2009-08-16 23:19:38.000000000 +0200
-+++ linux-2.6.30.5/scripts/headers_install.pl	2009-09-14 21:16:11.000000000 +0200
-@@ -16,7 +16,7 @@
- # 2) Drop include of compiler.h
- # 3) Drop all sections defined out by __KERNEL__ (using unifdef)
- 
--use strict;
-+#use strict;
- 
- my ($readdir, $installdir, $arch, @files) = @ARGV;
- 
diff --git a/toolchain/kernel-headers/patches/3.3.8/aufs2.patch b/toolchain/kernel-headers/patches/3.3.8/aufs2.patch
deleted file mode 100644
index d40c9a3fe..000000000
--- a/toolchain/kernel-headers/patches/3.3.8/aufs2.patch
+++ /dev/null
@@ -1,238 +0,0 @@
-diff -Nur linux-3.1.4.orig/include/linux/Kbuild linux-3.1.4/include/linux/Kbuild
---- linux-3.1.4.orig/include/linux/Kbuild	2011-11-28 23:48:14.000000000 +0100
-+++ linux-3.1.4/include/linux/Kbuild	2011-12-01 12:44:17.000000000 +0100
-@@ -65,6 +65,7 @@
- header-y += atmsap.h
- header-y += atmsvc.h
- header-y += audit.h
-+header-y += aufs_type.h
- header-y += auto_fs.h
- header-y += auto_fs4.h
- header-y += auxvec.h
-diff -Nur linux-3.1.4.orig/include/linux/aufs_type.h linux-3.1.4/include/linux/aufs_type.h
---- linux-3.1.4.orig/include/linux/aufs_type.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.1.4/include/linux/aufs_type.h	2011-12-01 12:44:17.000000000 +0100
-@@ -0,0 +1,197 @@
-+/*
-+ * Copyright (C) 2005-2011 Junjiro R. Okajima
-+ *
-+ * This program, aufs is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ */
-+
-+#ifndef __AUFS_TYPE_H__
-+#define __AUFS_TYPE_H__
-+
-+#include <linux/ioctl.h>
-+#include <linux/kernel.h>
-+#include <linux/limits.h>
-+#include <linux/types.h>
-+
-+#define AUFS_VERSION	"2.1-standalone.tree-36-20110110"
-+
-+/* todo? move this to linux-2.6.19/include/magic.h */
-+#define AUFS_SUPER_MAGIC	('a' << 24 | 'u' << 16 | 'f' << 8 | 's')
-+
-+/* ---------------------------------------------------------------------- */
-+
-+#ifdef CONFIG_AUFS_BRANCH_MAX_127
-+typedef __s8 aufs_bindex_t;
-+#define AUFS_BRANCH_MAX 127
-+#else
-+typedef __s16 aufs_bindex_t;
-+#ifdef CONFIG_AUFS_BRANCH_MAX_511
-+#define AUFS_BRANCH_MAX 511
-+#elif defined(CONFIG_AUFS_BRANCH_MAX_1023)
-+#define AUFS_BRANCH_MAX 1023
-+#elif defined(CONFIG_AUFS_BRANCH_MAX_32767)
-+#define AUFS_BRANCH_MAX 32767
-+#endif
-+#endif
-+
-+#ifdef __KERNEL__
-+#ifndef AUFS_BRANCH_MAX
-+#error unknown CONFIG_AUFS_BRANCH_MAX value
-+#endif
-+#endif /* __KERNEL__ */
-+
-+/* ---------------------------------------------------------------------- */
-+
-+#define AUFS_NAME		"aufs"
-+#define AUFS_FSTYPE		AUFS_NAME
-+
-+#define AUFS_ROOT_INO		2
-+#define AUFS_FIRST_INO		11
-+
-+#define AUFS_WH_PFX		".wh."
-+#define AUFS_WH_PFX_LEN		((int)sizeof(AUFS_WH_PFX) - 1)
-+#define AUFS_WH_TMP_LEN		4
-+/* a limit for rmdir/rename a dir */
-+#define AUFS_MAX_NAMELEN	(NAME_MAX \
-+				- AUFS_WH_PFX_LEN * 2	/* doubly whiteouted */\
-+				- 1			/* dot */\
-+				- AUFS_WH_TMP_LEN)	/* hex */
-+#define AUFS_XINO_FNAME		"." AUFS_NAME ".xino"
-+#define AUFS_XINO_DEFPATH	"/tmp/" AUFS_XINO_FNAME
-+#define AUFS_XINO_TRUNC_INIT	64 /* blocks */
-+#define AUFS_XINO_TRUNC_STEP	4  /* blocks */
-+#define AUFS_DIRWH_DEF		3
-+#define AUFS_RDCACHE_DEF	10 /* seconds */
-+#define AUFS_RDCACHE_MAX	3600 /* seconds */
-+#define AUFS_RDBLK_DEF		512 /* bytes */
-+#define AUFS_RDHASH_DEF		32
-+#define AUFS_WKQ_NAME		AUFS_NAME "d"
-+#define AUFS_WKQ_PRE_NAME	AUFS_WKQ_NAME "_pre"
-+#define AUFS_MFS_DEF_SEC	30 /* seconds */
-+#define AUFS_MFS_MAX_SEC	3600 /* seconds */
-+#define AUFS_PLINK_WARN		100 /* number of plinks */
-+
-+/* pseudo-link maintenace under /proc */
-+#define AUFS_PLINK_MAINT_NAME	"plink_maint"
-+#define AUFS_PLINK_MAINT_DIR	"fs/" AUFS_NAME
-+#define AUFS_PLINK_MAINT_PATH	AUFS_PLINK_MAINT_DIR "/" AUFS_PLINK_MAINT_NAME
-+
-+#define AUFS_DIROPQ_NAME	AUFS_WH_PFX ".opq" /* whiteouted doubly */
-+#define AUFS_WH_DIROPQ		AUFS_WH_PFX AUFS_DIROPQ_NAME
-+
-+#define AUFS_BASE_NAME		AUFS_WH_PFX AUFS_NAME
-+#define AUFS_PLINKDIR_NAME	AUFS_WH_PFX "plnk"
-+#define AUFS_ORPHDIR_NAME	AUFS_WH_PFX "orph"
-+
-+/* doubly whiteouted */
-+#define AUFS_WH_BASE		AUFS_WH_PFX AUFS_BASE_NAME
-+#define AUFS_WH_PLINKDIR	AUFS_WH_PFX AUFS_PLINKDIR_NAME
-+#define AUFS_WH_ORPHDIR		AUFS_WH_PFX AUFS_ORPHDIR_NAME
-+
-+/* branch permission */
-+#define AUFS_BRPERM_RW		"rw"
-+#define AUFS_BRPERM_RO		"ro"
-+#define AUFS_BRPERM_RR		"rr"
-+#define AUFS_BRPERM_WH		"wh"
-+#define AUFS_BRPERM_NLWH	"nolwh"
-+#define AUFS_BRPERM_ROWH	AUFS_BRPERM_RO "+" AUFS_BRPERM_WH
-+#define AUFS_BRPERM_RRWH	AUFS_BRPERM_RR "+" AUFS_BRPERM_WH
-+#define AUFS_BRPERM_RWNLWH	AUFS_BRPERM_RW "+" AUFS_BRPERM_NLWH
-+
-+/* ---------------------------------------------------------------------- */
-+
-+/* ioctl */
-+enum {
-+	/* readdir in userspace */
-+	AuCtl_RDU,
-+	AuCtl_RDU_INO,
-+
-+	/* pathconf wrapper */
-+	AuCtl_WBR_FD
-+};
-+
-+/* borrowed from linux/include/linux/kernel.h */
-+#ifndef ALIGN
-+#define ALIGN(x, a)		__ALIGN_MASK(x, (typeof(x))(a)-1)
-+#define __ALIGN_MASK(x, mask)	(((x)+(mask))&~(mask))
-+#endif
-+
-+/* borrowed from linux/include/linux/compiler-gcc3.h */
-+#ifndef __aligned
-+#define __aligned(x)			__attribute__((aligned(x)))
-+#define __packed			__attribute__((packed))
-+#endif
-+
-+struct au_rdu_cookie {
-+	__u64		h_pos;
-+	__s16		bindex;
-+	__u8		flags;
-+	__u8		pad;
-+	__u32		generation;
-+} __aligned(8);
-+
-+struct au_rdu_ent {
-+	__u64		ino;
-+	__s16		bindex;
-+	__u8		type;
-+	__u8		nlen;
-+	__u8		wh;
-+	char		name[0];
-+} __aligned(8);
-+
-+static inline int au_rdu_len(int nlen)
-+{
-+	/* include the terminating NULL */
-+	return ALIGN(sizeof(struct au_rdu_ent) + nlen + 1,
-+		     sizeof(__u64));
-+}
-+
-+union au_rdu_ent_ul {
-+	struct au_rdu_ent __user	*e;
-+	__u64				ul;
-+};
-+
-+enum {
-+	AufsCtlRduV_SZ,
-+	AufsCtlRduV_End
-+};
-+
-+struct aufs_rdu {
-+	/* input */
-+	union {
-+		__u64		sz;	/* AuCtl_RDU */
-+		__u64		nent;	/* AuCtl_RDU_INO */
-+	};
-+	union au_rdu_ent_ul	ent;
-+	__u16			verify[AufsCtlRduV_End];
-+
-+	/* input/output */
-+	__u32			blk;
-+
-+	/* output */
-+	union au_rdu_ent_ul	tail;
-+	/* number of entries which were added in a single call */
-+	__u64			rent;
-+	__u8			full;
-+	__u8			shwh;
-+
-+	struct au_rdu_cookie	cookie;
-+} __aligned(8);
-+
-+#define AuCtlType		'A'
-+#define AUFS_CTL_RDU		_IOWR(AuCtlType, AuCtl_RDU, struct aufs_rdu)
-+#define AUFS_CTL_RDU_INO	_IOWR(AuCtlType, AuCtl_RDU_INO, struct aufs_rdu)
-+#define AUFS_CTL_WBR_FD		_IO(AuCtlType, AuCtl_WBR_FD)
-+
-+#endif /* __AUFS_TYPE_H__ */
-diff -Nur linux-3.1.4.orig/include/linux/namei.h linux-3.1.4/include/linux/namei.h
---- linux-3.1.4.orig/include/linux/namei.h	2011-11-28 23:48:14.000000000 +0100
-+++ linux-3.1.4/include/linux/namei.h	2011-12-01 12:44:17.000000000 +0100
-@@ -85,6 +85,9 @@
- extern struct file *lookup_instantiate_filp(struct nameidata *nd, struct dentry *dentry,
- 		int (*open)(struct inode *, struct file *));
- 
-+extern struct dentry *lookup_hash(struct nameidata *nd);
-+extern int __lookup_one_len(const char *name, struct qstr *this,
-+			    struct dentry *base, int len);
- extern struct dentry *lookup_one_len(const char *, struct dentry *, int);
- 
- extern int follow_down_one(struct path *);
-diff -Nur linux-3.1.4.orig/include/linux/splice.h linux-3.1.4/include/linux/splice.h
---- linux-3.1.4.orig/include/linux/splice.h	2011-11-28 23:48:14.000000000 +0100
-+++ linux-3.1.4/include/linux/splice.h	2011-12-01 12:45:51.000000000 +0100
-@@ -91,4 +91,9 @@
- extern void spd_release_page(struct splice_pipe_desc *, unsigned int);
- 
- extern const struct pipe_buf_operations page_cache_pipe_buf_ops;
-+extern long do_splice_from(struct pipe_inode_info *pipe, struct file *out,
-+			   loff_t *ppos, size_t len, unsigned int flags);
-+extern long do_splice_to(struct file *in, loff_t *ppos,
-+			 struct pipe_inode_info *pipe, size_t len,
-+			 unsigned int flags);
- #endif
diff --git a/toolchain/kernel-headers/patches/3.3.8/cleankernel.patch b/toolchain/kernel-headers/patches/3.3.8/cleankernel.patch
deleted file mode 100644
index f8d5448ee..000000000
--- a/toolchain/kernel-headers/patches/3.3.8/cleankernel.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.29.1.orig/scripts/Makefile.headersinst linux-2.6.29.1/scripts/Makefile.headersinst
---- linux-2.6.29.1.orig/scripts/Makefile.headersinst	2009-04-02 22:55:27.000000000 +0200
-+++ linux-2.6.29.1/scripts/Makefile.headersinst	2009-04-17 20:56:09.143476927 +0200
-@@ -65,7 +65,6 @@
- 
- targets += $(install-file)
- $(install-file): scripts/headers_install.pl $(input-files) FORCE
--	$(if $(unwanted),$(call cmd,remove),)
- 	$(if $(wildcard $(dir $@)),,$(shell mkdir -p $(dir $@)))
- 	$(call if_changed,install)
- 
diff --git a/toolchain/kernel-headers/patches/3.3.8/etrax-header.patch b/toolchain/kernel-headers/patches/3.3.8/etrax-header.patch
deleted file mode 100644
index 0c644ce25..000000000
--- a/toolchain/kernel-headers/patches/3.3.8/etrax-header.patch
+++ /dev/null
@@ -1,75 +0,0 @@
-diff -Nur linux-2.6.36.orig/arch/cris/include/arch-v10/arch/Kbuild linux-2.6.36/arch/cris/include/arch-v10/arch/Kbuild
---- linux-2.6.36.orig/arch/cris/include/arch-v10/arch/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/arch/cris/include/arch-v10/arch/Kbuild	2010-11-15 17:35:24.000000000 +0100
-@@ -1,4 +1,9 @@
-+header-y += dma.h
-+header-y += io_interface_mux.h
- header-y += user.h
- header-y += svinto.h
- header-y += sv_addr_ag.h
- header-y += sv_addr.agh
-+header-y += elf.h
-+header-y += page.h
-+header-y += ptrace.h
-diff -Nur linux-2.6.36.orig/arch/cris/include/arch-v32/arch/Kbuild linux-2.6.36/arch/cris/include/arch-v32/arch/Kbuild
---- linux-2.6.36.orig/arch/cris/include/arch-v32/arch/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/arch/cris/include/arch-v32/arch/Kbuild	2010-11-15 17:35:24.000000000 +0100
-@@ -1,2 +1,6 @@
- header-y += user.h
- header-y += cryptocop.h
-+header-y += elf.h
-+header-y += page.h
-+header-y += ptrace.h
-+
-diff -Nur linux-2.6.36.orig/arch/cris/include/asm/Kbuild linux-2.6.36/arch/cris/include/asm/Kbuild
---- linux-2.6.36.orig/arch/cris/include/asm/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/arch/cris/include/asm/Kbuild	2010-11-15 17:37:57.000000000 +0100
-@@ -1,10 +1,13 @@
- include include/asm-generic/Kbuild.asm
- 
--header-y += arch-v10/
--header-y += arch-v32/
--
-+header-y += ../arch-v10/arch/
-+header-y += ../arch-v32/arch/
-+  
-+header-y += elf.h
- header-y += ethernet.h
- header-y += etraxgpio.h
- header-y += rs485.h
- header-y += rtc.h
- header-y += sync_serial.h
-+header-y += page.h
-+header-y += user.h
-diff -Nur linux-2.6.36.orig/include/asm-generic/Kbuild linux-2.6.36/include/asm-generic/Kbuild
---- linux-2.6.36.orig/include/asm-generic/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/include/asm-generic/Kbuild	2010-11-15 17:37:02.000000000 +0100
-@@ -3,14 +3,17 @@
- header-y += errno-base.h
- header-y += errno.h
- header-y += fcntl.h
-+header-y += getorder.h
- header-y += int-l64.h
- header-y += int-ll64.h
- header-y += ioctl.h
- header-y += ioctls.h
- header-y += ipcbuf.h
-+header-y += memory_model.h
- header-y += mman-common.h
- header-y += mman.h
- header-y += msgbuf.h
-+header-y += page.h
- header-y += param.h
- header-y += poll.h
- header-y += posix_types.h
-diff -Nur linux-2.6.36.orig/include/linux/Kbuild linux-2.6.36/include/linux/Kbuild
---- linux-2.6.36.orig/include/linux/Kbuild	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/include/linux/Kbuild	2010-11-15 17:36:11.000000000 +0100
-@@ -365,6 +365,7 @@
- header-y += un.h
- header-y += unistd.h
- header-y += usbdevice_fs.h
-+header-y += user.h
- header-y += utime.h
- header-y += utsname.h
- header-y += veth.h
diff --git a/toolchain/kernel-headers/patches/3.3.8/linux-gcc-check.patch b/toolchain/kernel-headers/patches/3.3.8/linux-gcc-check.patch
deleted file mode 100644
index 7cc381845..000000000
--- a/toolchain/kernel-headers/patches/3.3.8/linux-gcc-check.patch
+++ /dev/null
@@ -1,18 +0,0 @@
-diff -Nur linux-2.6.32.orig/arch/mips/include/asm/sgidefs.h linux-2.6.32/arch/mips/include/asm/sgidefs.h
---- linux-2.6.32.orig/arch/mips/include/asm/sgidefs.h	2009-12-03 04:51:21.000000000 +0100
-+++ linux-2.6.32/arch/mips/include/asm/sgidefs.h	2010-02-14 11:49:21.000000000 +0100
-@@ -11,14 +11,6 @@
- #define __ASM_SGIDEFS_H
-
- /*
-- * Using a Linux compiler for building Linux seems logic but not to
-- * everybody.
-- */
--#ifndef __linux__
--#error Use a Linux compiler or give up.
--#endif
--
--/*
-  * Definitions for the ISA levels
-  *
-  * With the introduction of MIPS32 / MIPS64 instruction sets definitions
diff --git a/toolchain/kernel-headers/patches/3.3.8/microperl.patch b/toolchain/kernel-headers/patches/3.3.8/microperl.patch
deleted file mode 100644
index 2955b7421..000000000
--- a/toolchain/kernel-headers/patches/3.3.8/microperl.patch
+++ /dev/null
@@ -1,24 +0,0 @@
-diff -Nur linux-2.6.30.5.orig/scripts/headers_check.pl linux-2.6.30.5/scripts/headers_check.pl
---- linux-2.6.30.5.orig/scripts/headers_check.pl	2009-08-16 23:19:38.000000000 +0200
-+++ linux-2.6.30.5/scripts/headers_check.pl	2009-09-14 21:16:21.000000000 +0200
-@@ -18,7 +18,7 @@
- #
- # 3) Check for leaked CONFIG_ symbols
- 
--use strict;
-+#use strict;
- 
- my ($dir, $arch, @files) = @ARGV;
- 
-diff -Nur linux-2.6.30.5.orig/scripts/headers_install.pl linux-2.6.30.5/scripts/headers_install.pl
---- linux-2.6.30.5.orig/scripts/headers_install.pl	2009-08-16 23:19:38.000000000 +0200
-+++ linux-2.6.30.5/scripts/headers_install.pl	2009-09-14 21:16:11.000000000 +0200
-@@ -16,7 +16,7 @@
- # 2) Drop include of compiler.h
- # 3) Drop all sections defined out by __KERNEL__ (using unifdef)
- 
--use strict;
-+#use strict;
- 
- my ($readdir, $installdir, $arch, @files) = @ARGV;
- 
diff --git a/toolchain/kernel-headers/patches/3.4.4/aufs2.patch b/toolchain/kernel-headers/patches/3.4.4/aufs2.patch
deleted file mode 100644
index d40c9a3fe..000000000
--- a/toolchain/kernel-headers/patches/3.4.4/aufs2.patch
+++ /dev/null
@@ -1,238 +0,0 @@
-diff -Nur linux-3.1.4.orig/include/linux/Kbuild linux-3.1.4/include/linux/Kbuild
---- linux-3.1.4.orig/include/linux/Kbuild	2011-11-28 23:48:14.000000000 +0100
-+++ linux-3.1.4/include/linux/Kbuild	2011-12-01 12:44:17.000000000 +0100
-@@ -65,6 +65,7 @@
- header-y += atmsap.h
- header-y += atmsvc.h
- header-y += audit.h
-+header-y += aufs_type.h
- header-y += auto_fs.h
- header-y += auto_fs4.h
- header-y += auxvec.h
-diff -Nur linux-3.1.4.orig/include/linux/aufs_type.h linux-3.1.4/include/linux/aufs_type.h
---- linux-3.1.4.orig/include/linux/aufs_type.h	1970-01-01 01:00:00.000000000 +0100
-+++ linux-3.1.4/include/linux/aufs_type.h	2011-12-01 12:44:17.000000000 +0100
-@@ -0,0 +1,197 @@
-+/*
-+ * Copyright (C) 2005-2011 Junjiro R. Okajima
-+ *
-+ * This program, aufs is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
-+ */
-+
-+#ifndef __AUFS_TYPE_H__
-+#define __AUFS_TYPE_H__
-+
-+#include <linux/ioctl.h>
-+#include <linux/kernel.h>
-+#include <linux/limits.h>
-+#include <linux/types.h>
-+
-+#define AUFS_VERSION	"2.1-standalone.tree-36-20110110"
-+
-+/* todo? move this to linux-2.6.19/include/magic.h */
-+#define AUFS_SUPER_MAGIC	('a' << 24 | 'u' << 16 | 'f' << 8 | 's')
-+
-+/* ---------------------------------------------------------------------- */
-+
-+#ifdef CONFIG_AUFS_BRANCH_MAX_127
-+typedef __s8 aufs_bindex_t;
-+#define AUFS_BRANCH_MAX 127
-+#else
-+typedef __s16 aufs_bindex_t;
-+#ifdef CONFIG_AUFS_BRANCH_MAX_511
-+#define AUFS_BRANCH_MAX 511
-+#elif defined(CONFIG_AUFS_BRANCH_MAX_1023)
-+#define AUFS_BRANCH_MAX 1023
-+#elif defined(CONFIG_AUFS_BRANCH_MAX_32767)
-+#define AUFS_BRANCH_MAX 32767
-+#endif
-+#endif
-+
-+#ifdef __KERNEL__
-+#ifndef AUFS_BRANCH_MAX
-+#error unknown CONFIG_AUFS_BRANCH_MAX value
-+#endif
-+#endif /* __KERNEL__ */
-+
-+/* ---------------------------------------------------------------------- */
-+
-+#define AUFS_NAME		"aufs"
-+#define AUFS_FSTYPE		AUFS_NAME
-+
-+#define AUFS_ROOT_INO		2
-+#define AUFS_FIRST_INO		11
-+
-+#define AUFS_WH_PFX		".wh."
-+#define AUFS_WH_PFX_LEN		((int)sizeof(AUFS_WH_PFX) - 1)
-+#define AUFS_WH_TMP_LEN		4
-+/* a limit for rmdir/rename a dir */
-+#define AUFS_MAX_NAMELEN	(NAME_MAX \
-+				- AUFS_WH_PFX_LEN * 2	/* doubly whiteouted */\
-+				- 1			/* dot */\
-+				- AUFS_WH_TMP_LEN)	/* hex */
-+#define AUFS_XINO_FNAME		"." AUFS_NAME ".xino"
-+#define AUFS_XINO_DEFPATH	"/tmp/" AUFS_XINO_FNAME
-+#define AUFS_XINO_TRUNC_INIT	64 /* blocks */
-+#define AUFS_XINO_TRUNC_STEP	4  /* blocks */
-+#define AUFS_DIRWH_DEF		3
-+#define AUFS_RDCACHE_DEF	10 /* seconds */
-+#define AUFS_RDCACHE_MAX	3600 /* seconds */
-+#define AUFS_RDBLK_DEF		512 /* bytes */
-+#define AUFS_RDHASH_DEF		32
-+#define AUFS_WKQ_NAME		AUFS_NAME "d"
-+#define AUFS_WKQ_PRE_NAME	AUFS_WKQ_NAME "_pre"
-+#define AUFS_MFS_DEF_SEC	30 /* seconds */
-+#define AUFS_MFS_MAX_SEC	3600 /* seconds */
-+#define AUFS_PLINK_WARN		100 /* number of plinks */
-+
-+/* pseudo-link maintenace under /proc */
-+#define AUFS_PLINK_MAINT_NAME	"plink_maint"
-+#define AUFS_PLINK_MAINT_DIR	"fs/" AUFS_NAME
-+#define AUFS_PLINK_MAINT_PATH	AUFS_PLINK_MAINT_DIR "/" AUFS_PLINK_MAINT_NAME
-+
-+#define AUFS_DIROPQ_NAME	AUFS_WH_PFX ".opq" /* whiteouted doubly */
-+#define AUFS_WH_DIROPQ		AUFS_WH_PFX AUFS_DIROPQ_NAME
-+
-+#define AUFS_BASE_NAME		AUFS_WH_PFX AUFS_NAME
-+#define AUFS_PLINKDIR_NAME	AUFS_WH_PFX "plnk"
-+#define AUFS_ORPHDIR_NAME	AUFS_WH_PFX "orph"
-+
-+/* doubly whiteouted */
-+#define AUFS_WH_BASE		AUFS_WH_PFX AUFS_BASE_NAME
-+#define AUFS_WH_PLINKDIR	AUFS_WH_PFX AUFS_PLINKDIR_NAME
-+#define AUFS_WH_ORPHDIR		AUFS_WH_PFX AUFS_ORPHDIR_NAME
-+
-+/* branch permission */
-+#define AUFS_BRPERM_RW		"rw"
-+#define AUFS_BRPERM_RO		"ro"
-+#define AUFS_BRPERM_RR		"rr"
-+#define AUFS_BRPERM_WH		"wh"
-+#define AUFS_BRPERM_NLWH	"nolwh"
-+#define AUFS_BRPERM_ROWH	AUFS_BRPERM_RO "+" AUFS_BRPERM_WH
-+#define AUFS_BRPERM_RRWH	AUFS_BRPERM_RR "+" AUFS_BRPERM_WH
-+#define AUFS_BRPERM_RWNLWH	AUFS_BRPERM_RW "+" AUFS_BRPERM_NLWH
-+
-+/* ---------------------------------------------------------------------- */
-+
-+/* ioctl */
-+enum {
-+	/* readdir in userspace */
-+	AuCtl_RDU,
-+	AuCtl_RDU_INO,
-+
-+	/* pathconf wrapper */
-+	AuCtl_WBR_FD
-+};
-+
-+/* borrowed from linux/include/linux/kernel.h */
-+#ifndef ALIGN
-+#define ALIGN(x, a)		__ALIGN_MASK(x, (typeof(x))(a)-1)
-+#define __ALIGN_MASK(x, mask)	(((x)+(mask))&~(mask))
-+#endif
-+
-+/* borrowed from linux/include/linux/compiler-gcc3.h */
-+#ifndef __aligned
-+#define __aligned(x)			__attribute__((aligned(x)))
-+#define __packed			__attribute__((packed))
-+#endif
-+
-+struct au_rdu_cookie {
-+	__u64		h_pos;
-+	__s16		bindex;
-+	__u8		flags;
-+	__u8		pad;
-+	__u32		generation;
-+} __aligned(8);
-+
-+struct au_rdu_ent {
-+	__u64		ino;
-+	__s16		bindex;
-+	__u8		type;
-+	__u8		nlen;
-+	__u8		wh;
-+	char		name[0];
-+} __aligned(8);
-+
-+static inline int au_rdu_len(int nlen)
-+{
-+	/* include the terminating NULL */
-+	return ALIGN(sizeof(struct au_rdu_ent) + nlen + 1,
-+		     sizeof(__u64));
-+}
-+
-+union au_rdu_ent_ul {
-+	struct au_rdu_ent __user	*e;
-+	__u64				ul;
-+};
-+
-+enum {
-+	AufsCtlRduV_SZ,
-+	AufsCtlRduV_End
-+};
-+
-+struct aufs_rdu {
-+	/* input */
-+	union {
-+		__u64		sz;	/* AuCtl_RDU */
-+		__u64		nent;	/* AuCtl_RDU_INO */
-+	};
-+	union au_rdu_ent_ul	ent;
-+	__u16			verify[AufsCtlRduV_End];
-+
-+	/* input/output */
-+	__u32			blk;
-+
-+	/* output */
-+	union au_rdu_ent_ul	tail;
-+	/* number of entries which were added in a single call */
-+	__u64			rent;
-+	__u8			full;
-+	__u8			shwh;
-+
-+	struct au_rdu_cookie	cookie;
-+} __aligned(8);
-+
-+#define AuCtlType		'A'
-+#define AUFS_CTL_RDU		_IOWR(AuCtlType, AuCtl_RDU, struct aufs_rdu)
-+#define AUFS_CTL_RDU_INO	_IOWR(AuCtlType, AuCtl_RDU_INO, struct aufs_rdu)
-+#define AUFS_CTL_WBR_FD		_IO(AuCtlType, AuCtl_WBR_FD)
-+
-+#endif /* __AUFS_TYPE_H__ */
-diff -Nur linux-3.1.4.orig/include/linux/namei.h linux-3.1.4/include/linux/namei.h
---- linux-3.1.4.orig/include/linux/namei.h	2011-11-28 23:48:14.000000000 +0100
-+++ linux-3.1.4/include/linux/namei.h	2011-12-01 12:44:17.000000000 +0100
-@@ -85,6 +85,9 @@
- extern struct file *lookup_instantiate_filp(struct nameidata *nd, struct dentry *dentry,
- 		int (*open)(struct inode *, struct file *));
- 
-+extern struct dentry *lookup_hash(struct nameidata *nd);
-+extern int __lookup_one_len(const char *name, struct qstr *this,
-+			    struct dentry *base, int len);
- extern struct dentry *lookup_one_len(const char *, struct dentry *, int);
- 
- extern int follow_down_one(struct path *);
-diff -Nur linux-3.1.4.orig/include/linux/splice.h linux-3.1.4/include/linux/splice.h
---- linux-3.1.4.orig/include/linux/splice.h	2011-11-28 23:48:14.000000000 +0100
-+++ linux-3.1.4/include/linux/splice.h	2011-12-01 12:45:51.000000000 +0100
-@@ -91,4 +91,9 @@
- extern void spd_release_page(struct splice_pipe_desc *, unsigned int);
- 
- extern const struct pipe_buf_operations page_cache_pipe_buf_ops;
-+extern long do_splice_from(struct pipe_inode_info *pipe, struct file *out,
-+			   loff_t *ppos, size_t len, unsigned int flags);
-+extern long do_splice_to(struct file *in, loff_t *ppos,
-+			 struct pipe_inode_info *pipe, size_t len,
-+			 unsigned int flags);
- #endif
diff --git a/toolchain/kernel-headers/patches/3.4.4/cleankernel.patch b/toolchain/kernel-headers/patches/3.4.4/cleankernel.patch
deleted file mode 100644
index f8d5448ee..000000000
--- a/toolchain/kernel-headers/patches/3.4.4/cleankernel.patch
+++ /dev/null
@@ -1,11 +0,0 @@
-diff -Nur linux-2.6.29.1.orig/scripts/Makefile.headersinst linux-2.6.29.1/scripts/Makefile.headersinst
---- linux-2.6.29.1.orig/scripts/Makefile.headersinst	2009-04-02 22:55:27.000000000 +0200
-+++ linux-2.6.29.1/scripts/Makefile.headersinst	2009-04-17 20:56:09.143476927 +0200
-@@ -65,7 +65,6 @@
- 
- targets += $(install-file)
- $(install-file): scripts/headers_install.pl $(input-files) FORCE
--	$(if $(unwanted),$(call cmd,remove),)
- 	$(if $(wildcard $(dir $@)),,$(shell mkdir -p $(dir $@)))
- 	$(call if_changed,install)
- 
diff --git a/toolchain/kernel-headers/patches/3.4.4/linux-gcc-check.patch b/toolchain/kernel-headers/patches/3.4.4/linux-gcc-check.patch
deleted file mode 100644
index 7cc381845..000000000
--- a/toolchain/kernel-headers/patches/3.4.4/linux-gcc-check.patch
+++ /dev/null
@@ -1,18 +0,0 @@
-diff -Nur linux-2.6.32.orig/arch/mips/include/asm/sgidefs.h linux-2.6.32/arch/mips/include/asm/sgidefs.h
---- linux-2.6.32.orig/arch/mips/include/asm/sgidefs.h	2009-12-03 04:51:21.000000000 +0100
-+++ linux-2.6.32/arch/mips/include/asm/sgidefs.h	2010-02-14 11:49:21.000000000 +0100
-@@ -11,14 +11,6 @@
- #define __ASM_SGIDEFS_H
-
- /*
-- * Using a Linux compiler for building Linux seems logic but not to
-- * everybody.
-- */
--#ifndef __linux__
--#error Use a Linux compiler or give up.
--#endif
--
--/*
-  * Definitions for the ISA levels
-  *
-  * With the introduction of MIPS32 / MIPS64 instruction sets definitions
diff --git a/toolchain/kernel-headers/patches/3.1.10/aufs2.patch b/toolchain/kernel-headers/patches/3.4.6/aufs2.patch
index d40c9a3fe..d40c9a3fe 100644
--- a/toolchain/kernel-headers/patches/3.1.10/aufs2.patch
+++ b/toolchain/kernel-headers/patches/3.4.6/aufs2.patch
diff --git a/toolchain/kernel-headers/patches/3.0.34/cleankernel.patch b/toolchain/kernel-headers/patches/3.4.6/cleankernel.patch
index f8d5448ee..f8d5448ee 100644
--- a/toolchain/kernel-headers/patches/3.0.34/cleankernel.patch
+++ b/toolchain/kernel-headers/patches/3.4.6/cleankernel.patch
diff --git a/toolchain/kernel-headers/patches/3.4.4/etrax-header.patch b/toolchain/kernel-headers/patches/3.4.6/etrax-header.patch
index 559c0f322..559c0f322 100644
--- a/toolchain/kernel-headers/patches/3.4.4/etrax-header.patch
+++ b/toolchain/kernel-headers/patches/3.4.6/etrax-header.patch
diff --git a/toolchain/kernel-headers/patches/3.0.34/linux-gcc-check.patch b/toolchain/kernel-headers/patches/3.4.6/linux-gcc-check.patch
index 7cc381845..7cc381845 100644
--- a/toolchain/kernel-headers/patches/3.0.34/linux-gcc-check.patch
+++ b/toolchain/kernel-headers/patches/3.4.6/linux-gcc-check.patch
diff --git a/toolchain/kernel-headers/patches/3.4.4/microperl.patch b/toolchain/kernel-headers/patches/3.4.6/microperl.patch
index 44c39f6e8..44c39f6e8 100644
--- a/toolchain/kernel-headers/patches/3.4.4/microperl.patch
+++ b/toolchain/kernel-headers/patches/3.4.6/microperl.patch
diff --git a/toolchain/kernel-headers/patches/3.3.8/mkpiggy.patch b/toolchain/kernel-headers/patches/3.4.6/mkpiggy.patch
index d4e815cd2..d4e815cd2 100644
--- a/toolchain/kernel-headers/patches/3.3.8/mkpiggy.patch
+++ b/toolchain/kernel-headers/patches/3.4.6/mkpiggy.patch
diff --git a/toolchain/kernel-headers/patches/3.4.4/relocs.patch b/toolchain/kernel-headers/patches/3.4.6/relocs.patch
index 43c5bb580..43c5bb580 100644
--- a/toolchain/kernel-headers/patches/3.4.4/relocs.patch
+++ b/toolchain/kernel-headers/patches/3.4.6/relocs.patch
diff --git a/toolchain/kernel-headers/patches/3.2.20/aufs2.patch b/toolchain/kernel-headers/patches/3.5/aufs2.patch
index d40c9a3fe..d40c9a3fe 100644
--- a/toolchain/kernel-headers/patches/3.2.20/aufs2.patch
+++ b/toolchain/kernel-headers/patches/3.5/aufs2.patch
diff --git a/toolchain/kernel-headers/patches/3.1.10/cleankernel.patch b/toolchain/kernel-headers/patches/3.5/cleankernel.patch
index f8d5448ee..f8d5448ee 100644
--- a/toolchain/kernel-headers/patches/3.1.10/cleankernel.patch
+++ b/toolchain/kernel-headers/patches/3.5/cleankernel.patch
diff --git a/toolchain/kernel-headers/patches/3.5/etrax-header.patch b/toolchain/kernel-headers/patches/3.5/etrax-header.patch
new file mode 100644
index 000000000..559c0f322
--- /dev/null
+++ b/toolchain/kernel-headers/patches/3.5/etrax-header.patch
@@ -0,0 +1,95 @@
+diff -Nur linux-3.4.4.orig/arch/cris/include/arch-v10/arch/Kbuild linux-3.4.4/arch/cris/include/arch-v10/arch/Kbuild
+--- linux-3.4.4.orig/arch/cris/include/arch-v10/arch/Kbuild	2012-06-22 20:37:50.000000000 +0200
++++ linux-3.4.4/arch/cris/include/arch-v10/arch/Kbuild	2012-07-18 07:38:39.000000000 +0200
+@@ -1,4 +1,10 @@
++header-y += dma.h
++header-y += io_interface_mux.h
+ header-y += user.h
+ header-y += svinto.h
+ header-y += sv_addr_ag.h
+ header-y += sv_addr.agh
++header-y += elf.h
++header-y += page.h
++header-y += ptrace.h
++header-y += system.h
+diff -Nur linux-3.4.4.orig/arch/cris/include/arch-v32/arch/Kbuild linux-3.4.4/arch/cris/include/arch-v32/arch/Kbuild
+--- linux-3.4.4.orig/arch/cris/include/arch-v32/arch/Kbuild	2012-06-22 20:37:50.000000000 +0200
++++ linux-3.4.4/arch/cris/include/arch-v32/arch/Kbuild	2012-07-18 07:38:26.000000000 +0200
+@@ -1,2 +1,7 @@
+ header-y += user.h
+ header-y += cryptocop.h
++header-y += elf.h
++header-y += page.h
++header-y += ptrace.h
++header-y += system.h
++
+diff -Nur linux-3.4.4.orig/arch/cris/include/asm/Kbuild linux-3.4.4/arch/cris/include/asm/Kbuild
+--- linux-3.4.4.orig/arch/cris/include/asm/Kbuild	2012-06-22 20:37:50.000000000 +0200
++++ linux-3.4.4/arch/cris/include/asm/Kbuild	2012-07-18 07:38:03.000000000 +0200
+@@ -1,10 +1,13 @@
+ include include/asm-generic/Kbuild.asm
+ 
+-header-y += arch-v10/
+-header-y += arch-v32/
+-
++header-y += ../arch-v10/arch/
++header-y += ../arch-v32/arch/
++  
++header-y += elf.h
+ header-y += ethernet.h
+ header-y += etraxgpio.h
+ header-y += rs485.h
+ header-y += rtc.h
+ header-y += sync_serial.h
++header-y += page.h
++header-y += user.h
+diff -Nur linux-3.4.4.orig/arch/cris/include/asm/posix_types.h linux-3.4.4/arch/cris/include/asm/posix_types.h
+--- linux-3.4.4.orig/arch/cris/include/asm/posix_types.h	2012-06-22 20:37:50.000000000 +0200
++++ linux-3.4.4/arch/cris/include/asm/posix_types.h	2012-07-18 17:10:45.000000000 +0200
+@@ -6,6 +6,7 @@
+ #ifndef __ARCH_CRIS_POSIX_TYPES_H
+ #define __ARCH_CRIS_POSIX_TYPES_H
+ 
++
+ /*
+  * This file is generally used by user-level software, so you need to
+  * be a little careful about namespace pollution etc.  Also, we cannot
+@@ -33,4 +34,6 @@
+ typedef unsigned short	__kernel_old_dev_t;
+ #define __kernel_old_dev_t __kernel_old_dev_t
+ 
++#include <asm-generic/posix_types.h>
++
+ #endif /* __ARCH_CRIS_POSIX_TYPES_H */
+diff -Nur linux-3.4.4.orig/include/asm-generic/Kbuild linux-3.4.4/include/asm-generic/Kbuild
+--- linux-3.4.4.orig/include/asm-generic/Kbuild	2012-06-22 20:37:50.000000000 +0200
++++ linux-3.4.4/include/asm-generic/Kbuild	2012-07-18 07:38:03.000000000 +0200
+@@ -3,14 +3,17 @@
+ header-y += errno-base.h
+ header-y += errno.h
+ header-y += fcntl.h
++header-y += getorder.h
+ header-y += int-l64.h
+ header-y += int-ll64.h
+ header-y += ioctl.h
+ header-y += ioctls.h
+ header-y += ipcbuf.h
++header-y += memory_model.h
+ header-y += mman-common.h
+ header-y += mman.h
+ header-y += msgbuf.h
++header-y += page.h
+ header-y += param.h
+ header-y += poll.h
+ header-y += posix_types.h
+diff -Nur linux-3.4.4.orig/include/linux/Kbuild linux-3.4.4/include/linux/Kbuild
+--- linux-3.4.4.orig/include/linux/Kbuild	2012-06-22 20:37:50.000000000 +0200
++++ linux-3.4.4/include/linux/Kbuild	2012-07-18 07:38:03.000000000 +0200
+@@ -380,6 +380,7 @@
+ header-y += un.h
+ header-y += unistd.h
+ header-y += usbdevice_fs.h
++header-y += user.h
+ header-y += utime.h
+ header-y += utsname.h
+ header-y += uvcvideo.h
diff --git a/toolchain/kernel-headers/patches/3.1.10/linux-gcc-check.patch b/toolchain/kernel-headers/patches/3.5/linux-gcc-check.patch
index 7cc381845..7cc381845 100644
--- a/toolchain/kernel-headers/patches/3.1.10/linux-gcc-check.patch
+++ b/toolchain/kernel-headers/patches/3.5/linux-gcc-check.patch
diff --git a/toolchain/kernel-headers/patches/3.5/microperl.patch b/toolchain/kernel-headers/patches/3.5/microperl.patch
new file mode 100644
index 000000000..44c39f6e8
--- /dev/null
+++ b/toolchain/kernel-headers/patches/3.5/microperl.patch
@@ -0,0 +1,24 @@
+diff -Nur linux-3.4.2.orig/scripts/headers_check.pl linux-3.4.2/scripts/headers_check.pl
+--- linux-3.4.2.orig/scripts/headers_check.pl	2012-06-09 17:36:33.000000000 +0200
++++ linux-3.4.2/scripts/headers_check.pl	2012-06-15 12:45:43.000000000 +0200
+@@ -18,7 +18,7 @@
+ #
+ # 3) Check for leaked CONFIG_ symbols
+ 
+-use strict;
++#use strict;
+ use File::Basename;
+ 
+ my ($dir, $arch, @files) = @ARGV;
+diff -Nur linux-3.4.2.orig/scripts/headers_install.pl linux-3.4.2/scripts/headers_install.pl
+--- linux-3.4.2.orig/scripts/headers_install.pl	2012-06-09 17:36:33.000000000 +0200
++++ linux-3.4.2/scripts/headers_install.pl	2012-06-15 12:45:11.000000000 +0200
+@@ -16,7 +16,7 @@
+ # 2) Drop include of compiler.h
+ # 3) Drop all sections defined out by __KERNEL__ (using unifdef)
+ 
+-use strict;
++#use strict;
+ 
+ my ($readdir, $installdir, $arch, @files) = @ARGV;
+ 
diff --git a/toolchain/kernel-headers/patches/3.4.4/mkpiggy.patch b/toolchain/kernel-headers/patches/3.5/mkpiggy.patch
index d4e815cd2..d4e815cd2 100644
--- a/toolchain/kernel-headers/patches/3.4.4/mkpiggy.patch
+++ b/toolchain/kernel-headers/patches/3.5/mkpiggy.patch
diff --git a/target/linux/patches/3.3.8/bsd-compatibility.patch b/toolchain/kernel-headers/patches/3.5/relocs.patch
index 9e91a62de..43c5bb580 100644
--- a/target/linux/patches/3.3.8/bsd-compatibility.patch
+++ b/toolchain/kernel-headers/patches/3.5/relocs.patch
@@ -1,80 +1,53 @@
-diff -Nur linux-2.6.36.orig/scripts/Makefile.lib linux-2.6.36/scripts/Makefile.lib
---- linux-2.6.36.orig/scripts/Makefile.lib	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/scripts/Makefile.lib	2010-11-28 18:34:22.000000000 +0100
-@@ -216,7 +216,12 @@
- size_append = printf $(shell						\
- dec_size=0;								\
- for F in $1; do								\
--	fsize=$$(stat -c "%s" $$F);					\
-+	if stat -qs .>/dev/null 2>&1; then				\
-+		statcmd='stat -f %z';					\
-+	else								\
-+		statcmd='stat -c %s';					\
-+	fi;								\
-+	fsize=$$($$statcmd $$F);					\
- 	dec_size=$$(expr $$dec_size + $$fsize);				\
- done;									\
- printf "%08x\n" $$dec_size |						\
-diff -Nur linux-2.6.36.orig/scripts/mod/mk_elfconfig.c linux-2.6.36/scripts/mod/mk_elfconfig.c
---- linux-2.6.36.orig/scripts/mod/mk_elfconfig.c	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/scripts/mod/mk_elfconfig.c	2010-11-28 18:33:24.000000000 +0100
-@@ -1,7 +1,18 @@
- #include <stdio.h>
- #include <stdlib.h>
+diff -Nur linux-3.4.4.orig/arch/x86/tools/relocs.c linux-3.4.4/arch/x86/tools/relocs.c
+--- linux-3.4.4.orig/arch/x86/tools/relocs.c	2012-06-22 20:37:50.000000000 +0200
++++ linux-3.4.4/arch/x86/tools/relocs.c	2012-07-03 09:19:18.000000000 +0200
+@@ -5,12 +5,3123 @@
  #include <string.h>
--#include <elf.h>
-+
-+#define EI_NIDENT (16)
-+#define ELFMAG          "\177ELF"
-+
-+#define SELFMAG         4
-+#define EI_CLASS        4
-+#define ELFCLASS32      1               /* 32-bit objects */
-+#define ELFCLASS64      2               /* 64-bit objects */
-+
-+#define EI_DATA         5               /* Data encoding byte index */
-+#define ELFDATA2LSB     1               /* 2's complement, little endian */
-+#define ELFDATA2MSB     2               /* 2's complement, big endian */
- 
- int
- main(int argc, char **argv)
-diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpost.h
---- linux-2.6.36.orig/scripts/mod/modpost.h	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/scripts/mod/modpost.h	2010-11-28 18:33:24.000000000 +0100
-@@ -7,7 +7,2453 @@
- #include <sys/mman.h>
- #include <fcntl.h>
+ #include <errno.h>
  #include <unistd.h>
 -#include <elf.h>
+-#include <byteswap.h>
++//#include <elf.h>
++//#include <byteswap.h>
+ #define USE_BSD
+-#include <endian.h>
++//#include <endian.h>
+ #include <regex.h>
+-#include <tools/le_byteshift.h>
++//#include <tools/le_byteshift.h>
++
++static inline void __put_unaligned_le16(int val, int *p)
++{
++	*p++ = val;
++	*p++ = val >> 8;
++}
 +
++static inline void __put_unaligned_le32(int val, int *p)
++{
++	__put_unaligned_le16(val >> 16, p + 2);
++	__put_unaligned_le16(val, p);
++}
 +
-+/* This file defines standard ELF types, structures, and macros.
-+   Copyright (C) 1995-1999,2000,2001,2002,2003 Free Software Foundation, Inc.
-+   This file is part of the GNU C Library.
-+
-+   The GNU C Library is free software; you can redistribute it and/or
-+   modify it under the terms of the GNU Lesser General Public
-+   License as published by the Free Software Foundation; either
-+   version 2.1 of the License, or (at your option) any later version.
-+
-+   The GNU C Library is distributed in the hope that it will be useful,
-+   but WITHOUT ANY WARRANTY; without even the implied warranty of
-+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
-+   Lesser General Public License for more details.
-+
-+   You should have received a copy of the GNU Lesser General Public
-+   License along with the GNU C Library; if not, write to the Free
-+   Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
-+   02111-1307 USA.  */
-+
-+#ifndef _ELF_H
-+#define	_ELF_H 1
++static inline void __put_unaligned_le64(int val, int *p)
++{
++	__put_unaligned_le32(val >> 32, p + 4);
++	__put_unaligned_le32(val, p);
++}
 +
-+__BEGIN_DECLS
++static inline void put_unaligned_le16(int val, void *p)
++{
++	__put_unaligned_le16(val, p);
++}
 +
-+/* Standard ELF types.  */
++static inline void put_unaligned_le32(int val, void *p)
++{
++	__put_unaligned_le32(val, p);
++}
 +
-+#include <stdint.h>
++static inline void put_unaligned_le64(int val, void *p)
++{
++	__put_unaligned_le64(val, p);
++}
 +
 +/* Type for a 16-bit quantity.  */
 +typedef uint16_t Elf32_Half;
@@ -168,6 +141,11 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +/* Conglomeration of the identification bytes, for easy testing as a word.  */
 +#define	ELFMAG		"\177ELF"
 +#define	SELFMAG		4
++#if __BYTE_ORDER == __LITTLE_ENDIAN
++# define ELFMAG_U32 ((uint32_t)(ELFMAG0 + 0x100 * (ELFMAG1 + (0x100 * (ELFMAG2 + 0x100 * ELFMAG3)))))
++#elif __BYTE_ORDER == __BIG_ENDIAN
++# define ELFMAG_U32 ((uint32_t)((((ELFMAG0 * 0x100) + ELFMAG1) * 0x100 + ELFMAG2) * 0x100 + ELFMAG3))
++#endif
 +
 +#define EI_CLASS	4		/* File class byte index */
 +#define ELFCLASSNONE	0		/* Invalid class */
@@ -190,6 +168,7 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define ELFOSABI_HPUX		1	/* HP-UX */
 +#define ELFOSABI_NETBSD		2	/* NetBSD.  */
 +#define ELFOSABI_LINUX		3	/* Linux.  */
++#define ELFOSABI_HURD		4	/* GNU/Hurd */
 +#define ELFOSABI_SOLARIS	6	/* Sun Solaris.  */
 +#define ELFOSABI_AIX		7	/* IBM AIX.  */
 +#define ELFOSABI_IRIX		8	/* SGI Irix.  */
@@ -197,6 +176,9 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define ELFOSABI_TRU64		10	/* Compaq TRU64 UNIX.  */
 +#define ELFOSABI_MODESTO	11	/* Novell Modesto.  */
 +#define ELFOSABI_OPENBSD	12	/* OpenBSD.  */
++#define ELFOSABI_OPENVMS	13	/* OpenVMS */
++#define ELFOSABI_NSK		14	/* Hewlett-Packard Non-Stop Kernel */
++#define ELFOSABI_AROS		15	/* Amiga Research OS */
 +#define ELFOSABI_ARM		97	/* ARM */
 +#define ELFOSABI_STANDALONE	255	/* Standalone (embedded) application */
 +
@@ -225,6 +207,7 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define EM_386		 3		/* Intel 80386 */
 +#define EM_68K		 4		/* Motorola m68k family */
 +#define EM_88K		 5		/* Motorola m88k family */
++#define EM_486		 6		/* Intel 80486 *//* Reserved for future use */
 +#define EM_860		 7		/* Intel 80860 */
 +#define EM_MIPS		 8		/* MIPS R3000 big-endian */
 +#define EM_S370		 9		/* IBM System/370 */
@@ -241,17 +224,18 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define EM_V800		36		/* NEC V800 series */
 +#define EM_FR20		37		/* Fujitsu FR20 */
 +#define EM_RH32		38		/* TRW RH-32 */
-+#define EM_RCE		39		/* Motorola RCE */
++#define EM_MCORE	39		/* Motorola M*Core */ /* May also be taken by Fujitsu MMA */
++#define EM_RCE		39		/* Old name for MCore */
 +#define EM_ARM		40		/* ARM */
 +#define EM_FAKE_ALPHA	41		/* Digital Alpha */
-+#define EM_SH		42		/* Hitachi SH */
++#define EM_SH		42		/* Renesas SH */
 +#define EM_SPARCV9	43		/* SPARC v9 64-bit */
 +#define EM_TRICORE	44		/* Siemens Tricore */
 +#define EM_ARC		45		/* Argonaut RISC Core */
-+#define EM_H8_300	46		/* Hitachi H8/300 */
-+#define EM_H8_300H	47		/* Hitachi H8/300H */
-+#define EM_H8S		48		/* Hitachi H8S */
-+#define EM_H8_500	49		/* Hitachi H8/500 */
++#define EM_H8_300	46		/* Renesas H8/300 */
++#define EM_H8_300H	47		/* Renesas H8/300H */
++#define EM_H8S		48		/* Renesas H8S */
++#define EM_H8_500	49		/* Renesas H8/500 */
 +#define EM_IA_64	50		/* Intel Merced */
 +#define EM_MIPS_X	51		/* Stanford MIPS-X */
 +#define EM_COLDFIRE	52		/* Motorola Coldfire */
@@ -289,21 +273,120 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define EM_D10V		85		/* Mitsubishi D10V */
 +#define EM_D30V		86		/* Mitsubishi D30V */
 +#define EM_V850		87		/* NEC v850 */
-+#define EM_M32R		88		/* Mitsubishi M32R */
++#define EM_M32R		88		/* Renesas M32R */
 +#define EM_MN10300	89		/* Matsushita MN10300 */
 +#define EM_MN10200	90		/* Matsushita MN10200 */
 +#define EM_PJ		91		/* picoJava */
 +#define EM_OPENRISC	92		/* OpenRISC 32-bit embedded processor */
 +#define EM_ARC_A5	93		/* ARC Cores Tangent-A5 */
 +#define EM_XTENSA	94		/* Tensilica Xtensa Architecture */
++#define EM_IP2K		101		/* Ubicom IP2022 micro controller */
++#define EM_CR		103		/* National Semiconductor CompactRISC */
++#define EM_MSP430	105		/* TI msp430 micro controller */
++#define EM_BLACKFIN	106		/* Analog Devices Blackfin */
++#define EM_ALTERA_NIOS2	113	/* Altera Nios II soft-core processor */
++#define EM_CRX		114		/* National Semiconductor CRX */
 +#define EM_NUM		95
++#define EM_TI_C6000	140
++
++/* If it is necessary to assign new unofficial EM_* values, please pick large
++   random numbers (0x8523, 0xa7f2, etc.) to minimize the chances of collision
++   with official or non-GNU unofficial values.
++
++   NOTE: Do not just increment the most recent number by one.
++   Somebody else somewhere will do exactly the same thing, and you
++   will have a collision.  Instead, pick a random number.
++
++   Normally, each entity or maintainer responsible for a machine with an
++   unofficial e_machine number should eventually ask registry@caldera.com for
++   an officially blessed number to be added to the list above.  */
++
++/* picoJava */
++#define EM_PJ_OLD	99
++
++/* Cygnus PowerPC ELF backend.  Written in the absence of an ABI.  */
++#define EM_CYGNUS_POWERPC 0x9025
++
++/* Old version of Sparc v9, from before the ABI; this should be
++   removed shortly.  */
++#define EM_OLD_SPARCV9	11
++
++/* Old version of PowerPC, this should be removed shortly. */
++#define EM_PPC_OLD	17
++
++/* (Deprecated) Temporary number for the OpenRISC processor.  */
++#define EM_OR32		0x8472
++
++/* Renesas M32C and M16C.  */
++#define EM_M32C			0xFEB0
++
++/* Cygnus M32R ELF backend.  Written in the absence of an ABI.  */
++#define EM_CYGNUS_M32R	0x9041
++
++/* old S/390 backend magic number. Written in the absence of an ABI.  */
++#define EM_S390_OLD	0xa390
++
++/* D10V backend magic number.  Written in the absence of an ABI.  */
++#define EM_CYGNUS_D10V	0x7650
++
++/* D30V backend magic number.  Written in the absence of an ABI.  */
++#define EM_CYGNUS_D30V	0x7676
++
++/* V850 backend magic number.  Written in the absense of an ABI.  */
++#define EM_CYGNUS_V850	0x9080
++
++/* mn10200 and mn10300 backend magic numbers.
++   Written in the absense of an ABI.  */
++#define EM_CYGNUS_MN10200	0xdead
++#define EM_CYGNUS_MN10300	0xbeef
++
++/* FR30 magic number - no EABI available.  */
++#define EM_CYGNUS_FR30		0x3330
 +
-+/* If it is necessary to assign new unofficial EM_* values, please
-+   pick large random numbers (0x8523, 0xa7f2, etc.) to minimize the
-+   chances of collision with official or non-GNU unofficial values.  */
++/* AVR magic number
++   Written in the absense of an ABI.  */
++#define EM_AVR_OLD		0x1057
 +
++/* OpenRISC magic number
++   Written in the absense of an ABI.  */
++#define EM_OPENRISC_OLD		0x3426
++
++/* DLX magic number
++   Written in the absense of an ABI.  */
++#define EM_DLX			0x5aa5
++
++#define EM_XSTORMY16		0xad45
++
++/* FRV magic number - no EABI available??.  */
++#define EM_CYGNUS_FRV	0x5441
++
++/* Ubicom IP2xxx; no ABI */
++#define EM_IP2K_OLD		0x8217
++
++#define EM_MT                   0x2530  /* Morpho MT; no ABI */
++
++/* MSP430 magic number
++      Written in the absense everything.  */
++#define EM_MSP430_OLD		0x1059
++
++/* Vitesse IQ2000.  */
++#define EM_IQ2000		0xFEBA
++
++/* Old, unofficial value for Xtensa.  */
++#define EM_XTENSA_OLD		0xabc7
++
++/* Alpha backend magic number.  Written in the absence of an ABI.  */
 +#define EM_ALPHA	0x9026
 +
++/* NIOS magic number - no EABI available.  */
++#define EM_NIOS32	0xFEBB
++
++/* AVR32 magic number from ATMEL */
++#define EM_AVR32       0x18ad
++
++/* V850 backend magic number.  Written in the absense of an ABI.  */
++#define EM_CYGNUS_V850 0x9080
++
 +/* Legal values for e_version (version).  */
 +
 +#define EV_NONE		0		/* Invalid ELF version */
@@ -345,6 +428,10 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define SHN_UNDEF	0		/* Undefined section */
 +#define SHN_LORESERVE	0xff00		/* Start of reserved indices */
 +#define SHN_LOPROC	0xff00		/* Start of processor-specific */
++#define SHN_BEFORE	0xff00		/* Order section before all others
++					   (Solaris).  */
++#define SHN_AFTER	0xff01		/* Order section after all others
++					   (Solaris).  */
 +#define SHN_HIPROC	0xff1f		/* End of processor-specific */
 +#define SHN_LOOS	0xff20		/* Start of OS-specific */
 +#define SHN_HIOS	0xff3f		/* End of OS-specific */
@@ -374,6 +461,7 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define SHT_SYMTAB_SHNDX  18		/* Extended section indeces */
 +#define	SHT_NUM		  19		/* Number of defined types.  */
 +#define SHT_LOOS	  0x60000000	/* Start OS-specific */
++#define SHT_GNU_HASH	  0x6ffffff6	/* GNU-style hash table.  */
 +#define SHT_GNU_LIBLIST	  0x6ffffff7	/* Prelink library list */
 +#define SHT_CHECKSUM	  0x6ffffff8	/* Checksum for DSO content.  */
 +#define SHT_LOSUNW	  0x6ffffffa	/* Sun-specific low bound.  */
@@ -405,6 +493,10 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define SHF_TLS		     (1 << 10)	/* Section hold thread-local data.  */
 +#define SHF_MASKOS	     0x0ff00000	/* OS-specific.  */
 +#define SHF_MASKPROC	     0xf0000000	/* Processor-specific */
++#define SHF_ORDERED	     (1 << 30)	/* Special ordering requirement
++					   (Solaris).  */
++#define SHF_EXCLUDE	     (1 << 31)	/* Section is excluded unless
++					   referenced or allocated (Solaris).*/
 +
 +/* Section group handling.  */
 +#define GRP_COMDAT	0x1		/* Mark group as COMDAT.  */
@@ -607,6 +699,8 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define PT_LOOS		0x60000000	/* Start of OS-specific */
 +#define PT_GNU_EH_FRAME	0x6474e550	/* GCC .eh_frame_hdr segment */
 +#define PT_GNU_STACK	0x6474e551	/* Indicates stack executability */
++#define PT_GNU_RELRO	0x6474e552	/* Read-only after relocation */
++#define PT_PAX_FLAGS	0x65041580	/* Indicates PaX flag markings */
 +#define PT_LOSUNW	0x6ffffffa
 +#define PT_SUNWBSS	0x6ffffffa	/* Sun Specific segment */
 +#define PT_SUNWSTACK	0x6ffffffb	/* Stack segment */
@@ -620,6 +714,18 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define PF_X		(1 << 0)	/* Segment is executable */
 +#define PF_W		(1 << 1)	/* Segment is writable */
 +#define PF_R		(1 << 2)	/* Segment is readable */
++#define PF_PAGEEXEC	(1 << 4)	/* Enable  PAGEEXEC */
++#define PF_NOPAGEEXEC	(1 << 5)	/* Disable PAGEEXEC */
++#define PF_SEGMEXEC	(1 << 6)	/* Enable  SEGMEXEC */
++#define PF_NOSEGMEXEC	(1 << 7)	/* Disable SEGMEXEC */
++#define PF_MPROTECT	(1 << 8)	/* Enable  MPROTECT */
++#define PF_NOMPROTECT	(1 << 9)	/* Disable MPROTECT */
++#define PF_RANDEXEC	(1 << 10)	/* Enable  RANDEXEC */
++#define PF_NORANDEXEC	(1 << 11)	/* Disable RANDEXEC */
++#define PF_EMUTRAMP	(1 << 12)	/* Enable  EMUTRAMP */
++#define PF_NOEMUTRAMP	(1 << 13)	/* Disable EMUTRAMP */
++#define PF_RANDMMAP	(1 << 14)	/* Enable  RANDMMAP */
++#define PF_NORANDMMAP	(1 << 15)	/* Disable RANDMMAP */
 +#define PF_MASKOS	0x0ff00000	/* OS-specific */
 +#define PF_MASKPROC	0xf0000000	/* Processor-specific */
 +
@@ -738,6 +844,7 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +   If any adjustment is made to the ELF object after it has been
 +   built these entries will need to be adjusted.  */
 +#define DT_ADDRRNGLO	0x6ffffe00
++#define DT_GNU_HASH	0x6ffffef5	/* GNU-style hash table.  */
 +#define DT_GNU_CONFLICT	0x6ffffef8	/* Start of conflict section */
 +#define DT_GNU_LIBLIST	0x6ffffef9	/* Library list */
 +#define DT_CONFIG	0x6ffffefa	/* Configuration information.  */
@@ -938,23 +1045,25 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +
 +typedef struct
 +{
-+  int a_type;			/* Entry type */
++  uint32_t a_type;		/* Entry type */
 +  union
 +    {
-+      long int a_val;		/* Integer value */
-+      void *a_ptr;		/* Pointer value */
-+      void (*a_fcn) (void);	/* Function pointer value */
++      uint32_t a_val;		/* Integer value */
++      /* We use to have pointer elements added here.  We cannot do that,
++	 though, since it does not work when using 32-bit definitions
++	 on 64-bit platforms and vice versa.  */
 +    } a_un;
 +} Elf32_auxv_t;
 +
 +typedef struct
 +{
-+  long int a_type;		/* Entry type */
++  uint64_t a_type;		/* Entry type */
 +  union
 +    {
-+      long int a_val;		/* Integer value */
-+      void *a_ptr;		/* Pointer value */
-+      void (*a_fcn) (void);	/* Function pointer value */
++      uint64_t a_val;		/* Integer value */
++      /* We use to have pointer elements added here.  We cannot do that,
++	 though, since it does not work when using 32-bit definitions
++	 on 64-bit platforms and vice versa.  */
 +    } a_un;
 +} Elf64_auxv_t;
 +
@@ -1002,6 +1111,12 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define AT_SYSINFO	32
 +#define AT_SYSINFO_EHDR	33
 +
++/* Shapes of the caches.  Bits 0-3 contains associativity; bits 4-7 contains
++   log2 of line size; mask those to get cache size.  */
++#define AT_L1I_CACHESHAPE	34
++#define AT_L1D_CACHESHAPE	35
++#define AT_L2_CACHESHAPE	36
++#define AT_L3_CACHESHAPE	37
 +
 +/* Note section contents.  Each entry in the note section begins with
 +   a header of a fixed form.  */
@@ -1170,11 +1285,75 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +/* Keep this the last entry.  */
 +#define R_386_NUM	   38
 +
++/* Blackfin specific definitions.  */
++#define R_BFIN_UNUSED0			0x00
++#define R_BFIN_PCREL5M2			0x01
++#define R_BFIN_UNUSED1			0x02
++#define R_BFIN_PCREL10			0x03
++#define R_BFIN_PCREL12_JUMP		0x04
++#define R_BFIN_RIMM16			0x05
++#define R_BFIN_LUIMM16			0x06
++#define R_BFIN_HUIMM16			0x07
++#define R_BFIN_PCREL12_JUMP_S		0x08
++#define R_BFIN_PCREL24_JUMP_X		0x09
++#define R_BFIN_PCREL24			0x0a
++#define R_BFIN_UNUSEDB			0x0b
++#define R_BFIN_UNUSEDC			0x0c
++#define R_BFIN_PCREL24_JUMP_L		0x0d
++#define R_BFIN_PCREL24_CALL_X		0x0e
++#define R_BFIN_var_eq_symb		0x0f
++#define R_BFIN_BYTE_DATA		0x10
++#define R_BFIN_BYTE2_DATA		0x11
++#define R_BFIN_BYTE4_DATA		0x12
++#define R_BFIN_PCREL11			0x13
++
++#define R_BFIN_GOT17M4			0x14
++#define R_BFIN_GOTHI			0x15
++#define R_BFIN_GOTLO			0x16
++#define R_BFIN_FUNCDESC			0x17
++#define R_BFIN_FUNCDESC_GOT17M4		0x18
++#define R_BFIN_FUNCDESC_GOTHI		0x19
++#define R_BFIN_FUNCDESC_GOTLO		0x1a
++#define R_BFIN_FUNCDESC_VALUE		0x1b
++#define R_BFIN_FUNCDESC_GOTOFF17M4	0x1c
++#define R_BFIN_FUNCDESC_GOTOFFHI	0x1d
++#define R_BFIN_FUNCDESC_GOTOFFLO	0x1e
++#define R_BFIN_GOTOFF17M4		0x1f
++#define R_BFIN_GOTOFFHI			0x20
++#define R_BFIN_GOTOFFLO			0x21
++
++#define EF_BFIN_PIC		0x00000001	/* -fpic */
++#define EF_BFIN_FDPIC		0x00000002      /* -mfdpic */
++#define EF_BFIN_CODE_IN_L1	0x00000010	/* --code-in-l1 */
++#define EF_BFIN_DATA_IN_L1	0x00000020	/* --data-in-l1 */
++
++/* FR-V specific definitions.  */
++#define R_FRV_NONE		0	/* No reloc.  */
++#define R_FRV_32		1	/* Direct 32 bit.  */
++/* Canonical function descriptor address.  */
++#define R_FRV_FUNCDESC		14
++/* Private function descriptor initialization.  */
++#define R_FRV_FUNCDESC_VALUE	18
++
++						/* gpr support */
++#define EF_FRV_GPR_MASK		0x00000003	/* mask for # of gprs */
++#define EF_FRV_GPR_32		0x00000001	/* -mgpr-32 */
++#define EF_FRV_GPR_64		0x00000002	/* -mgpr-64 */
++
++						/* fpr support */
++#define EF_FRV_FPR_MASK		0x0000000c	/* mask for # of fprs */
++#define EF_FRV_FPR_32		0x00000004	/* -mfpr-32 */
++#define EF_FRV_FPR_64		0x00000008	/* -mfpr-64 */
++#define EF_FRV_FPR_NONE		0x0000000c	/* -msoft-float */
++
++#define EF_FRV_PIC   0x00000100
++#define EF_FRV_FDPIC 0x00008000
++
 +/* SUN SPARC specific definitions.  */
 +
 +/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
 +
-+#define STT_REGISTER	13		/* Global register reserved to app. */
++#define STT_SPARC_REGISTER	13	/* Global register reserved to app. */
 +
 +/* Values for Elf64_Ehdr.e_flags.  */
 +
@@ -1392,6 +1571,7 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define STO_MIPS_INTERNAL		0x1
 +#define STO_MIPS_HIDDEN			0x2
 +#define STO_MIPS_PROTECTED		0x3
++#define STO_MIPS_PLT			0x8
 +#define STO_MIPS_SC_ALIGN_UNUSED	0xff
 +
 +/* MIPS specific values for `st_info'.  */
@@ -1524,8 +1704,24 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define R_MIPS_PJUMP		35
 +#define R_MIPS_RELGOT		36
 +#define R_MIPS_JALR		37
++#define R_MIPS_TLS_DTPMOD32	38	/* Module number 32 bit */
++#define R_MIPS_TLS_DTPREL32	39	/* Module-relative offset 32 bit */
++#define R_MIPS_TLS_DTPMOD64	40	/* Module number 64 bit */
++#define R_MIPS_TLS_DTPREL64	41	/* Module-relative offset 64 bit */
++#define R_MIPS_TLS_GD		42	/* 16 bit GOT offset for GD */
++#define R_MIPS_TLS_LDM		43	/* 16 bit GOT offset for LDM */
++#define R_MIPS_TLS_DTPREL_HI16	44	/* Module-relative offset, high 16 bits */
++#define R_MIPS_TLS_DTPREL_LO16	45	/* Module-relative offset, low 16 bits */
++#define R_MIPS_TLS_GOTTPREL	46	/* 16 bit GOT offset for IE */
++#define R_MIPS_TLS_TPREL32	47	/* TP-relative offset, 32 bit */
++#define R_MIPS_TLS_TPREL64	48	/* TP-relative offset, 64 bit */
++#define R_MIPS_TLS_TPREL_HI16	49	/* TP-relative offset, high 16 bits */
++#define R_MIPS_TLS_TPREL_LO16	50	/* TP-relative offset, low 16 bits */
++#define R_MIPS_GLOB_DAT		51
++#define R_MIPS_COPY		126
++#define R_MIPS_JUMP_SLOT        127
 +/* Keep this the last entry.  */
-+#define R_MIPS_NUM		38
++#define R_MIPS_NUM		128
 +
 +/* Legal values for p_type field of Elf32_Phdr.  */
 +
@@ -1591,7 +1787,13 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define DT_MIPS_COMPACT_SIZE 0x7000002f /* (O32)Size of compact rel section. */
 +#define DT_MIPS_GP_VALUE     0x70000030 /* GP value for aux GOTs.  */
 +#define DT_MIPS_AUX_DYNAMIC  0x70000031 /* Address of aux .dynamic.  */
-+#define DT_MIPS_NUM	     0x32
++/* The address of .got.plt in an executable using the new non-PIC ABI.  */
++#define DT_MIPS_PLTGOT	     0x70000032
++/* The base of the PLT in an executable using the new non-PIC ABI if that
++   PLT is writable.  For a non-writable PLT, this is omitted or has a zero
++   value.  */
++#define DT_MIPS_RWPLT        0x70000034
++#define DT_MIPS_NUM	     0x35
 +
 +/* Legal values for DT_MIPS_FLAGS Elf32_Dyn entry.  */
 +
@@ -1884,6 +2086,9 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define LITUSE_ALPHA_TLS_GD	4
 +#define LITUSE_ALPHA_TLS_LDM	5
 +
++/* Legal values for d_tag of Elf64_Dyn.  */
++#define DT_ALPHA_PLTRO		(DT_LOPROC + 0)
++#define DT_ALPHA_NUM		1
 +
 +/* PowerPC specific declarations */
 +
@@ -1994,10 +2199,19 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define R_PPC_DIAB_RELSDA_HI	184	/* like EMB_RELSDA, but high 16 bit */
 +#define R_PPC_DIAB_RELSDA_HA	185	/* like EMB_RELSDA, adjusted high 16 */
 +
++/* GNU relocs used in PIC code sequences.  */
++#define R_PPC_REL16		249	/* word32   (sym+add-.) */
++#define R_PPC_REL16_LO		250	/* half16   (sym+add-.)@l */
++#define R_PPC_REL16_HI		251	/* half16   (sym+add-.)@h */
++#define R_PPC_REL16_HA		252	/* half16   (sym+add-.)@ha */
++
 +/* This is a phony reloc to handle any old fashioned TOC16 references
 +   that may still be in object files.  */
 +#define R_PPC_TOC16		255
 +
++/* PowerPC specific values for the Dyn d_tag field.  */
++#define DT_PPC_GOT		(DT_LOPROC + 0)
++#define DT_PPC_NUM		1
 +
 +/* PowerPC64 relocations defined by the ABIs */
 +#define R_PPC64_NONE		R_PPC_NONE
@@ -2116,7 +2330,9 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +
 +/* PowerPC64 specific values for the Dyn d_tag field.  */
 +#define DT_PPC64_GLINK  (DT_LOPROC + 0)
-+#define DT_PPC64_NUM    1
++#define DT_PPC64_OPD	(DT_LOPROC + 1)
++#define DT_PPC64_OPDSZ	(DT_LOPROC + 2)
++#define DT_PPC64_NUM    3
 +
 +
 +/* ARM specific declarations */
@@ -2156,7 +2372,11 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define PF_ARM_SB          0x10000000   /* Segment contains the location
 +					   addressed by the static base */
 +
++/* Processor specific values for the Phdr p_type field.  */
++#define PT_ARM_EXIDX	0x70000001	/* .ARM.exidx segment */
++
 +/* ARM relocs.  */
++
 +#define R_ARM_NONE		0	/* No reloc */
 +#define R_ARM_PC24		1	/* PC relative 26 bit branch */
 +#define R_ARM_ABS32		2	/* Direct 32 bit  */
@@ -2174,6 +2394,9 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define R_ARM_THM_SWI8		14
 +#define R_ARM_XPC25		15
 +#define R_ARM_THM_XPC22		16
++#define R_ARM_TLS_DTPMOD32	17
++#define R_ARM_TLS_DTPOFF32	18
++#define R_ARM_TLS_TPOFF32	19
 +#define R_ARM_COPY		20	/* Copy symbol at runtime */
 +#define R_ARM_GLOB_DAT		21	/* Create GOT entry */
 +#define R_ARM_JUMP_SLOT		22	/* Create PLT entry */
@@ -2192,6 +2415,14 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define R_ARM_GNU_VTINHERIT	101
 +#define R_ARM_THM_PC11		102	/* thumb unconditional branch */
 +#define R_ARM_THM_PC9		103	/* thumb conditional branch */
++#define R_ARM_TLS_GD32		104
++#define R_ARM_TLS_LDM32		105
++#define R_ARM_TLS_LDO32		106
++#define R_ARM_TLS_IE32		107
++#define R_ARM_TLS_LE32		108
++#define R_ARM_TLS_LDO12		109
++#define R_ARM_TLS_LE12		110
++#define R_ARM_TLS_IE12GP	111
 +#define R_ARM_RXPC25		249
 +#define R_ARM_RSBREL32		250
 +#define R_ARM_THM_RPC22		251
@@ -2212,6 +2443,9 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +/* Processor specific values for the Phdr p_type field.  */
 +#define PT_IA_64_ARCHEXT	(PT_LOPROC + 0)	/* arch extension bits */
 +#define PT_IA_64_UNWIND		(PT_LOPROC + 1)	/* ia64 unwind bits */
++#define PT_IA_64_HP_OPT_ANOT	(PT_LOOS + 0x12)
++#define PT_IA_64_HP_HSL_ANOT	(PT_LOOS + 0x13)
++#define PT_IA_64_HP_STACK	(PT_LOOS + 0x14)
 +
 +/* Processor specific flags for the Phdr p_flags field.  */
 +#define PF_IA_64_NORECOV	0x80000000	/* spec insns w/o recovery */
@@ -2313,6 +2547,12 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +
 +/* SH specific declarations */
 +
++/* SH specific values for `st_other'.  */
++
++/* If set, this is a symbol pointing to SHmedia code, which will be branched
++   to, so need to add 1 to the symbol value. */
++#define STO_SH5_ISA32 (1 << 2)
++
 +/* SH relocs.  */
 +#define	R_SH_NONE		0
 +#define	R_SH_DIR32		1
@@ -2351,6 +2591,13 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define	R_SH_RELATIVE		165
 +#define	R_SH_GOTOFF		166
 +#define	R_SH_GOTPC		167
++#define	R_SH_RELATIVE_LOW16	197
++#define	R_SH_RELATIVE_MEDLOW16	198
++#define	R_SH_IMM_LOW16		246
++#define	R_SH_IMM_LOW16_PCREL	247
++#define	R_SH_IMM_MEDLOW16	248
++#define	R_SH_IMM_MEDLOW16_PCREL	249
++
 +/* Keep this the last entry.  */
 +#define	R_SH_NUM		256
 +
@@ -2430,9 +2677,20 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define R_390_TLS_DTPOFF	55	/* Offset in TLS block.	 */
 +#define R_390_TLS_TPOFF		56	/* Negated offset in static TLS
 +					   block.  */
-+
++#define R_390_20		57	/* Direct 20 bit.  */
++#define R_390_GOT20		58	/* 20 bit GOT offset.  */
++#define R_390_GOTPLT20		59	/* 20 bit offset to jump slot.  */
++#define R_390_TLS_GOTIE20	60	/* 20 bit GOT offset for static TLS
++					   block offset.  */
 +/* Keep this the last entry.  */
-+#define R_390_NUM		57
++#define R_390_NUM		61
++
++
++/* CRIS flags.  */
++#define EF_CRIS_VARIANT_MASK           0x0000000e
++#define EF_CRIS_VARIANT_ANY_V0_V10     0x00000000
++#define EF_CRIS_VARIANT_V32            0x00000002
++#define EF_CRIS_VARIANT_COMMON_V10_V32 0x00000004
 +
 +/* CRIS relocations.  */
 +#define R_CRIS_NONE		0
@@ -2456,8 +2714,10 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +#define R_CRIS_32_PLT_GOTREL	18
 +#define R_CRIS_32_PLT_PCREL	19
 +
++/* Keep this the last entry.  */
 +#define R_CRIS_NUM		20
 +
++
 +/* AMD x86-64 relocations.  */
 +#define R_X86_64_NONE		0	/* No reloc */
 +#define R_X86_64_64		1	/* Direct 64 bit  */
@@ -2490,23 +2750,382 @@ diff -Nur linux-2.6.36.orig/scripts/mod/modpost.h linux-2.6.36/scripts/mod/modpo
 +
 +#define R_X86_64_NUM		24
 +
-+__END_DECLS
 +
-+#endif	/* elf.h */
++/* AM33 relocations.  */
++#define R_MN10300_NONE		0	/* No reloc.  */
++#define R_MN10300_32		1	/* Direct 32 bit.  */
++#define R_MN10300_16		2	/* Direct 16 bit.  */
++#define R_MN10300_8		3	/* Direct 8 bit.  */
++#define R_MN10300_PCREL32	4	/* PC-relative 32-bit.  */
++#define R_MN10300_PCREL16	5	/* PC-relative 16-bit signed.  */
++#define R_MN10300_PCREL8	6	/* PC-relative 8-bit signed.  */
++#define R_MN10300_GNU_VTINHERIT	7	/* Ancient C++ vtable garbage... */
++#define R_MN10300_GNU_VTENTRY	8	/* ... collection annotation.  */
++#define R_MN10300_24		9	/* Direct 24 bit.  */
++#define R_MN10300_GOTPC32	10	/* 32-bit PCrel offset to GOT.  */
++#define R_MN10300_GOTPC16	11	/* 16-bit PCrel offset to GOT.  */
++#define R_MN10300_GOTOFF32	12	/* 32-bit offset from GOT.  */
++#define R_MN10300_GOTOFF24	13	/* 24-bit offset from GOT.  */
++#define R_MN10300_GOTOFF16	14	/* 16-bit offset from GOT.  */
++#define R_MN10300_PLT32		15	/* 32-bit PCrel to PLT entry.  */
++#define R_MN10300_PLT16		16	/* 16-bit PCrel to PLT entry.  */
++#define R_MN10300_GOT32		17	/* 32-bit offset to GOT entry.  */
++#define R_MN10300_GOT24		18	/* 24-bit offset to GOT entry.  */
++#define R_MN10300_GOT16		19	/* 16-bit offset to GOT entry.  */
++#define R_MN10300_COPY		20	/* Copy symbol at runtime.  */
++#define R_MN10300_GLOB_DAT	21	/* Create GOT entry.  */
++#define R_MN10300_JMP_SLOT	22	/* Create PLT entry.  */
++#define R_MN10300_RELATIVE	23	/* Adjust by program base.  */
++
++#define R_MN10300_NUM		24
++
++
++/* M32R relocs.  */
++#define R_M32R_NONE		0	/* No reloc. */
++#define R_M32R_16		1	/* Direct 16 bit. */
++#define R_M32R_32		2	/* Direct 32 bit. */
++#define R_M32R_24		3	/* Direct 24 bit. */
++#define R_M32R_10_PCREL		4	/* PC relative 10 bit shifted. */
++#define R_M32R_18_PCREL		5	/* PC relative 18 bit shifted. */
++#define R_M32R_26_PCREL		6	/* PC relative 26 bit shifted. */
++#define R_M32R_HI16_ULO		7	/* High 16 bit with unsigned low. */
++#define R_M32R_HI16_SLO		8	/* High 16 bit with signed low. */
++#define R_M32R_LO16		9	/* Low 16 bit. */
++#define R_M32R_SDA16		10	/* 16 bit offset in SDA. */
++#define R_M32R_GNU_VTINHERIT	11
++#define R_M32R_GNU_VTENTRY	12
++/* M32R relocs use SHT_RELA.  */
++#define R_M32R_16_RELA		33	/* Direct 16 bit. */
++#define R_M32R_32_RELA		34	/* Direct 32 bit. */
++#define R_M32R_24_RELA		35	/* Direct 24 bit. */
++#define R_M32R_10_PCREL_RELA	36	/* PC relative 10 bit shifted. */
++#define R_M32R_18_PCREL_RELA	37	/* PC relative 18 bit shifted. */
++#define R_M32R_26_PCREL_RELA	38	/* PC relative 26 bit shifted. */
++#define R_M32R_HI16_ULO_RELA	39	/* High 16 bit with unsigned low */
++#define R_M32R_HI16_SLO_RELA	40	/* High 16 bit with signed low */
++#define R_M32R_LO16_RELA	41	/* Low 16 bit */
++#define R_M32R_SDA16_RELA	42	/* 16 bit offset in SDA */
++#define R_M32R_RELA_GNU_VTINHERIT	43
++#define R_M32R_RELA_GNU_VTENTRY	44
++
++#define R_M32R_GOT24		48	/* 24 bit GOT entry */
++#define R_M32R_26_PLTREL	49	/* 26 bit PC relative to PLT shifted */
++#define R_M32R_COPY		50	/* Copy symbol at runtime */
++#define R_M32R_GLOB_DAT		51	/* Create GOT entry */
++#define R_M32R_JMP_SLOT		52	/* Create PLT entry */
++#define R_M32R_RELATIVE		53	/* Adjust by program base */
++#define R_M32R_GOTOFF		54	/* 24 bit offset to GOT */
++#define R_M32R_GOTPC24		55	/* 24 bit PC relative offset to GOT */
++#define R_M32R_GOT16_HI_ULO	56	/* High 16 bit GOT entry with unsigned
++					   low */
++#define R_M32R_GOT16_HI_SLO	57	/* High 16 bit GOT entry with signed
++					   low */
++#define R_M32R_GOT16_LO		58	/* Low 16 bit GOT entry */
++#define R_M32R_GOTPC_HI_ULO	59	/* High 16 bit PC relative offset to
++					   GOT with unsigned low */
++#define R_M32R_GOTPC_HI_SLO	60	/* High 16 bit PC relative offset to
++					   GOT with signed low */
++#define R_M32R_GOTPC_LO		61	/* Low 16 bit PC relative offset to
++					   GOT */
++#define R_M32R_GOTOFF_HI_ULO	62	/* High 16 bit offset to GOT
++					   with unsigned low */
++#define R_M32R_GOTOFF_HI_SLO	63	/* High 16 bit offset to GOT
++					   with signed low */
++#define R_M32R_GOTOFF_LO	64	/* Low 16 bit offset to GOT */
++#define R_M32R_NUM		256	/* Keep this the last entry. */
++
++/* i960 Relocations */
++#define R_960_NONE      0
++#define R_960_12        1
++#define R_960_32        2
++#define R_960_IP24      3
++#define R_960_SUB       4
++#define R_960_OPTCALL   5
++#define R_960_OPTCALLX  6
++#define R_960_OPTCALLXA 7
++/* Keep this the last entry.  */
++#define R_960_NUM	8
++
++
++/* v850 relocations.  */
++#define R_V850_NONE		0
++#define R_V850_9_PCREL		1
++#define R_V850_22_PCREL		2
++#define R_V850_HI16_S		3
++#define R_V850_HI16		4
++#define R_V850_LO16		5
++#define R_V850_32		6
++#define R_V850_16		7
++#define R_V850_8		8
++#define R_V850_SDA_16_16_OFFSET	9	/* For ld.b, st.b, set1, clr1,
++					   not1, tst1, movea, movhi */
++#define R_V850_SDA_15_16_OFFSET	10	/* For ld.w, ld.h, ld.hu, st.w, st.h */
++#define R_V850_ZDA_16_16_OFFSET	11	/* For ld.b, st.b, set1, clr1,
++					   not1, tst1, movea, movhi */
++#define R_V850_ZDA_15_16_OFFSET	12	/* For ld.w, ld.h, ld.hu, st.w, st.h */
++#define R_V850_TDA_6_8_OFFSET	13	/* For sst.w, sld.w */
++#define R_V850_TDA_7_8_OFFSET	14	/* For sst.h, sld.h */
++#define R_V850_TDA_7_7_OFFSET	15	/* For sst.b, sld.b */
++#define R_V850_TDA_16_16_OFFSET	16	/* For set1, clr1, not1, tst1,
++					   movea, movhi */
++/* CYGNUS LOCAL v850e */
++#define R_V850_TDA_4_5_OFFSET		17	/* For sld.hu */
++#define R_V850_TDA_4_4_OFFSET		18	/* For sld.bu */
++#define R_V850_SDA_16_16_SPLIT_OFFSET	19	/* For ld.bu */
++#define R_V850_ZDA_16_16_SPLIT_OFFSET	20	/* For ld.bu */
++#define R_V850_CALLT_6_7_OFFSET		21	/* For callt */
++#define R_V850_CALLT_16_16_OFFSET	22	/* For callt */
++/* END CYGNUS LOCAL */
++#define R_V850_GNU_VTINHERIT	23
++#define R_V850_GNU_VTENTRY	24
++/* Keep this the last entry.  */
++#define R_V850_NUM		25
++
++/* Atmel AVR32 relocations.  */
++#define R_AVR32_NONE           0
++#define R_AVR32_32             1
++#define R_AVR32_16             2
++#define R_AVR32_8              3
++#define R_AVR32_32_PCREL       4
++#define R_AVR32_16_PCREL       5
++#define R_AVR32_8_PCREL                6
++#define R_AVR32_DIFF32         7
++#define R_AVR32_DIFF16         8
++#define R_AVR32_DIFF8          9
++#define R_AVR32_GOT32          10
++#define R_AVR32_GOT16          11
++#define R_AVR32_GOT8           12
++#define R_AVR32_21S            13
++#define R_AVR32_16U            14
++#define R_AVR32_16S            15
++#define R_AVR32_8S             16
++#define R_AVR32_8S_EXT         17
++#define R_AVR32_22H_PCREL      18
++#define R_AVR32_18W_PCREL      19
++#define R_AVR32_16B_PCREL      20
++#define R_AVR32_16N_PCREL      21
++#define R_AVR32_14UW_PCREL     22
++#define R_AVR32_11H_PCREL      23
++#define R_AVR32_10UW_PCREL     24
++#define R_AVR32_9H_PCREL       25
++#define R_AVR32_9UW_PCREL      26
++#define R_AVR32_HI16           27
++#define R_AVR32_LO16           28
++#define R_AVR32_GOTPC          29
++#define R_AVR32_GOTCALL                30
++#define R_AVR32_LDA_GOT                31
++#define R_AVR32_GOT21S         32
++#define R_AVR32_GOT18SW                33
++#define R_AVR32_GOT16S         34
++#define R_AVR32_GOT7UW         35
++#define R_AVR32_32_CPENT       36
++#define R_AVR32_CPCALL         37
++#define R_AVR32_16_CP          38
++#define R_AVR32_9W_CP          39
++#define R_AVR32_RELATIVE       40
++#define R_AVR32_GLOB_DAT       41
++#define R_AVR32_JMP_SLOT       42
++#define R_AVR32_ALIGN          43
++#define R_AVR32_NUM            44
++
++/* AVR32 dynamic tags */
++#define DT_AVR32_GOTSZ         0x70000001 /* Total size of GOT in bytes */
++
++/* Renesas H8/300 Relocations */
++#define R_H8_NONE       0
++#define R_H8_DIR32      1
++#define R_H8_DIR32_28   2
++#define R_H8_DIR32_24   3
++#define R_H8_DIR32_16   4
++#define R_H8_DIR32U     6
++#define R_H8_DIR32U_28  7
++#define R_H8_DIR32U_24  8
++#define R_H8_DIR32U_20  9
++#define R_H8_DIR32U_16 10
++#define R_H8_DIR24     11
++#define R_H8_DIR24_20  12
++#define R_H8_DIR24_16  13
++#define R_H8_DIR24U    14
++#define R_H8_DIR24U_20 15
++#define R_H8_DIR24U_16 16
++#define R_H8_DIR16     17
++#define R_H8_DIR16U    18
++#define R_H8_DIR16S_32 19
++#define R_H8_DIR16S_28 20
++#define R_H8_DIR16S_24 21
++#define R_H8_DIR16S_20 22
++#define R_H8_DIR16S    23
++#define R_H8_DIR8      24
++#define R_H8_DIR8U     25
++#define R_H8_DIR8Z_32  26
++#define R_H8_DIR8Z_28  27
++#define R_H8_DIR8Z_24  28
++#define R_H8_DIR8Z_20  29
++#define R_H8_DIR8Z_16  30
++#define R_H8_PCREL16   31
++#define R_H8_PCREL8    32
++#define R_H8_BPOS      33
++#define R_H8_PCREL32   34
++#define R_H8_GOT32O    35
++#define R_H8_GOT16O    36
++#define R_H8_DIR16A8   59
++#define R_H8_DIR16R8   60
++#define R_H8_DIR24A8   61
++#define R_H8_DIR24R8   62
++#define R_H8_DIR32A16  63
++#define R_H8_ABS32     65
++#define R_H8_ABS32A16 127
++#define R_H8_NUM      128
++
++/* NIOS relocations. */
++#define R_NIOS_NONE				0
++#define R_NIOS_32				1	/* A 32 bit absolute relocation.*/
++#define R_NIOS_LO16_LO5			2	/* A LO-16 5 bit absolute relocation.  */
++#define R_NIOS_LO16_HI11		3	/* A LO-16 top 11 bit absolute relocation.  */
++#define R_NIOS_HI16_LO5			4	/* A HI-16 5 bit absolute relocation.  */
++#define R_NIOS_HI16_HI11		5	/* A HI-16 top 11 bit absolute relocation.  */
++#define R_NIOS_PCREL6			6	/* A 6 bit relative relocation.  */
++#define R_NIOS_PCREL8			7	/* An 8 bit relative relocation.  */
++#define R_NIOS_PCREL11			8	/* An 11 bit relative relocation.  */
++#define R_NIOS_16				9	/* A 16 bit absolute relocation.  */
++#define R_NIOS_H_LO5			10	/* Low 5-bits of absolute relocation in halfwords.  */
++#define R_NIOS_H_HI11			11	/* Top 11 bits of 16-bit absolute relocation in halfwords.  */
++#define R_NIOS_H_XLO5			12	/* Low 5 bits of top 16-bits of 32-bit absolute relocation in halfwords.  */
++#define R_NIOS_H_XHI11			13	/* Top 11 bits of top 16-bits of 32-bit absolute relocation in halfwords.  */
++#define R_NIOS_H_16				14	/* Half-word @h value */
++#define R_NIOS_H_32				15	/* Word @h value */
++#define R_NIOS_GNU_VTINHERIT	200	/* GNU extension to record C++ vtable hierarchy */
++#define R_NIOS_GNU_VTENTRY		201	/* GNU extension to record C++ vtable member usage */
++/* Keep this the last entry.  */
++#define R_NIOS_NUM				202
++
++/* NIOS II relocations */
++#define R_NIOS2_NONE			0
++#define R_NIOS2_S16				1
++#define R_NIOS2_U16				2
++#define R_NIOS2_PCREL16			3
++#define R_NIOS2_CALL26			4
++#define R_NIOS2_IMM5			5
++#define R_NIOS2_CACHE_OPX		6
++#define R_NIOS2_IMM6			7
++#define R_NIOS2_IMM8			8
++#define R_NIOS2_HI16			9
++#define R_NIOS2_LO16			10
++#define R_NIOS2_HIADJ16		11
++#define R_NIOS2_BFD_RELOC_32	12
++#define R_NIOS2_BFD_RELOC_16	13
++#define R_NIOS2_BFD_RELOC_8	14
++#define R_NIOS2_GPREL			15
++#define R_NIOS2_GNU_VTINHERIT	16
++#define R_NIOS2_GNU_VTENTRY	17
++#define R_NIOS2_UJMP			18
++#define R_NIOS2_CJMP			19
++#define R_NIOS2_CALLR			20
++#define R_NIOS2_ALIGN			21
++/* Keep this the last entry.  */
++#define R_NIOS2_NUM				22
++
++/* Xtensa-specific declarations */
++
++/* Xtensa values for the Dyn d_tag field.  */
++#define DT_XTENSA_GOT_LOC_OFF	(DT_LOPROC + 0)
++#define DT_XTENSA_GOT_LOC_SZ	(DT_LOPROC + 1)
++#define DT_XTENSA_NUM		2
++
++/* Xtensa relocations.  */
++#define R_XTENSA_NONE		0
++#define R_XTENSA_32		1
++#define R_XTENSA_RTLD		2
++#define R_XTENSA_GLOB_DAT	3
++#define R_XTENSA_JMP_SLOT	4
++#define R_XTENSA_RELATIVE	5
++#define R_XTENSA_PLT		6
++#define R_XTENSA_OP0		8
++#define R_XTENSA_OP1		9
++#define R_XTENSA_OP2		10
++#define R_XTENSA_ASM_EXPAND	11
++#define R_XTENSA_ASM_SIMPLIFY	12
++#define R_XTENSA_GNU_VTINHERIT	15
++#define R_XTENSA_GNU_VTENTRY	16
++#define R_XTENSA_DIFF8		17
++#define R_XTENSA_DIFF16		18
++#define R_XTENSA_DIFF32		19
++#define R_XTENSA_SLOT0_OP	20
++#define R_XTENSA_SLOT1_OP	21
++#define R_XTENSA_SLOT2_OP	22
++#define R_XTENSA_SLOT3_OP	23
++#define R_XTENSA_SLOT4_OP	24
++#define R_XTENSA_SLOT5_OP	25
++#define R_XTENSA_SLOT6_OP	26
++#define R_XTENSA_SLOT7_OP	27
++#define R_XTENSA_SLOT8_OP	28
++#define R_XTENSA_SLOT9_OP	29
++#define R_XTENSA_SLOT10_OP	30
++#define R_XTENSA_SLOT11_OP	31
++#define R_XTENSA_SLOT12_OP	32
++#define R_XTENSA_SLOT13_OP	33
++#define R_XTENSA_SLOT14_OP	34
++#define R_XTENSA_SLOT0_ALT	35
++#define R_XTENSA_SLOT1_ALT	36
++#define R_XTENSA_SLOT2_ALT	37
++#define R_XTENSA_SLOT3_ALT	38
++#define R_XTENSA_SLOT4_ALT	39
++#define R_XTENSA_SLOT5_ALT	40
++#define R_XTENSA_SLOT6_ALT	41
++#define R_XTENSA_SLOT7_ALT	42
++#define R_XTENSA_SLOT8_ALT	43
++#define R_XTENSA_SLOT9_ALT	44
++#define R_XTENSA_SLOT10_ALT	45
++#define R_XTENSA_SLOT11_ALT	46
++#define R_XTENSA_SLOT12_ALT	47
++#define R_XTENSA_SLOT13_ALT	48
++#define R_XTENSA_SLOT14_ALT	49
++/* Keep this the last entry.  */
++#define R_XTENSA_NUM		50
++
++/* C6X specific relocs */
++#define R_C6000_NONE		0
++#define R_C6000_ABS32		1
++#define R_C6000_ABS16		2
++#define R_C6000_ABS8		3
++#define R_C6000_PCR_S21		4
++#define R_C6000_PCR_S12		5
++#define R_C6000_PCR_S10		6
++#define R_C6000_PCR_S7		7
++#define R_C6000_ABS_S16		8
++#define R_C6000_ABS_L16		9
++#define R_C6000_ABS_H16		10
++#define R_C6000_SBR_U15_B	11
++#define R_C6000_SBR_U15_H	12
++#define R_C6000_SBR_U15_W	13
++#define R_C6000_SBR_S16		14
++#define R_C6000_SBR_L16_B	15
++#define R_C6000_SBR_L16_H	16
++#define R_C6000_SBR_L16_W	17
++#define R_C6000_SBR_H16_B	18
++#define R_C6000_SBR_H16_H	19
++#define R_C6000_SBR_H16_W	20
++#define R_C6000_SBR_GOT_U15_W	21
++#define R_C6000_SBR_GOT_L16_W	22
++#define R_C6000_SBR_GOT_H16_W	23
++#define R_C6000_DSBT_INDEX	24
++#define R_C6000_PREL31		25
++#define R_C6000_COPY		26
++#define R_C6000_JUMP_SLOT	27
++#define R_C6000_SBR_GOT32	28
++#define R_C6000_PCR_H16		29
++#define R_C6000_PCR_L16		30
++#define R_C6000_ALIGN		253
++#define R_C6000_FPHEAD		254
++#define R_C6000_NOCMP		255
++
++/* C6x specific values for the Dyn d_tag field.  */
++#define DT_C6000_DSBT_BASE	(DT_LOPROC + 0)
++#define DT_C6000_DSBT_SIZE	(DT_LOPROC + 1)
++#define DT_C6000_PREEMPTMAP	(DT_LOPROC + 2)
++#define DT_C6000_DSBT_INDEX	(DT_LOPROC + 3)
++
++#define DT_C6000_NUM    4
  
- #include "elfconfig.h"
+ static void die(char *fmt, ...);
  
-@@ -195,3 +2641,4 @@
- void fatal(const char *fmt, ...);
- void warn(const char *fmt, ...);
- void merror(const char *fmt, ...);
-+
-diff -Nur linux-2.6.36.orig/scripts/mod/sumversion.c linux-2.6.36/scripts/mod/sumversion.c
---- linux-2.6.36.orig/scripts/mod/sumversion.c	2010-10-20 22:30:22.000000000 +0200
-+++ linux-2.6.36/scripts/mod/sumversion.c	2010-11-28 18:33:24.000000000 +0100
-@@ -1,4 +1,4 @@
--#include <netinet/in.h>
-+/* #include <netinet/in.h> */
- #ifdef __sun__
- #include <inttypes.h>
- #else
author	Waldemar Brodkorb <mail@waldemar-brodkorb.de>	2012-07-24 14:22:08 +0200
committer	Waldemar Brodkorb <mail@waldemar-brodkorb.de>	2012-07-24 14:22:08 +0200
commit	4730871e5df6c0913f746cbadf02d1ec5a599846 (patch)
tree	08743a1f29abe8ea4ee1eb911f62d2dfdb9d43d8
parent	ab5307635819e3917e87d7c1a7e07dcf610a5c50 (diff)