From edce88cfef2f2a62647c2ab9536ca29694fab292 Mon Sep 17 00:00:00 2001 From: Waldemar Brodkorb Date: Sun, 3 Dec 2017 21:12:34 +0100 Subject: x86_64: add fenv support from glibc --- libm/x86_64/feenablxcpt.c | 45 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 libm/x86_64/feenablxcpt.c (limited to 'libm/x86_64/feenablxcpt.c') diff --git a/libm/x86_64/feenablxcpt.c b/libm/x86_64/feenablxcpt.c new file mode 100644 index 000000000..8f5a3ddc2 --- /dev/null +++ b/libm/x86_64/feenablxcpt.c @@ -0,0 +1,45 @@ +/* Enable floating-point exceptions. + Copyright (C) 2001-2017 Free Software Foundation, Inc. + Contributed by Andreas Jaeger , 2001. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#include + +int +feenableexcept (int excepts) +{ + unsigned short int new_exc, old_exc; + unsigned int new; + + excepts &= FE_ALL_EXCEPT; + + /* Get the current control word of the x87 FPU. */ + __asm__ ("fstcw %0" : "=m" (*&new_exc)); + + old_exc = (~new_exc) & FE_ALL_EXCEPT; + + new_exc &= ~excepts; + __asm__ ("fldcw %0" : : "m" (*&new_exc)); + + /* And now the same for the SSE MXCSR register. */ + __asm__ ("stmxcsr %0" : "=m" (*&new)); + + /* The SSE exception masks are shifted by 7 bits. */ + new &= ~(excepts << 7); + __asm__ ("ldmxcsr %0" : : "m" (*&new)); + + return old_exc; +} -- cgit v1.2.3