From efce79f09ae6daa77cd322df0d532beec3f445f5 Mon Sep 17 00:00:00 2001 From: Bernhard Reutner-Fischer Date: Wed, 26 Mar 2008 13:40:36 +0000 Subject: Paul Brook writes: The attached patch adds support for compiling arm uClibc as pure Thumb code. This is needed because some recent ARM codes do not implement traditional ARM mode. Specifically: * Cortex-M1 - An extremely minimal FPGA based core that only implements Thumb-1 (aka ARMv6-M). * Cortex-M3 - A Thumb-2 only ARMv7-M core. Most of uClibc already builds in Thumb mode, all that is left are a handful of assembly bits. Tested on arm-uclinuxeabi. --- libc/sysdeps/linux/arm/syscall-eabi.S | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'libc/sysdeps/linux/arm/syscall-eabi.S') diff --git a/libc/sysdeps/linux/arm/syscall-eabi.S b/libc/sysdeps/linux/arm/syscall-eabi.S index efc30690c..b9318821b 100644 --- a/libc/sysdeps/linux/arm/syscall-eabi.S +++ b/libc/sysdeps/linux/arm/syscall-eabi.S @@ -17,6 +17,7 @@ 02111-1307 USA. */ #include +#include /* In the EABI syscall interface, we don't need a special syscall to implement syscall(). It won't work reliably with 64-bit arguments @@ -26,6 +27,29 @@ .global syscall .type syscall,%function .align 4 +#if defined(THUMB1_ONLY) +.thumb_func +syscall: + push {r4, r5, r6, r7} + mov ip, r0 + mov r0, r1 + mov r1, r2 + mov r2, r3 + add r7, sp, #(4 * 4) + ldmia r7!, {r3, r4, r5, r6} + mov r7, ip + swi 0x0 + pop {r4, r5, r6, r7} + ldr r1, =0xfffff000 + cmp r0, r1 + bcs 1f + bx lr +1: + push {r3, lr} + bl __syscall_error + POP_RET +.pool +#else syscall: mov ip, sp stmfd sp!, {r4, r5, r6, r7} @@ -37,11 +61,13 @@ syscall: swi 0x0 ldmfd sp!, {r4, r5, r6, r7} cmn r0, #4096 + IT(t, cc) #if defined(__USE_BX__) bxcc lr #else movcc pc, lr #endif b __syscall_error +#endif .size syscall,.-syscall -- cgit v1.2.3