From 31307f870770f7af155f434fffea455fe6b5f29c Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 10 Nov 2005 03:14:01 +0000 Subject: add support for cirrus maverick fpu using patch for glibc http://yann.poupet.free.fr/ep93xx/ --- libc/sysdeps/linux/arm/bits/fenv.h | 41 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) (limited to 'libc/sysdeps/linux/arm/bits/fenv.h') diff --git a/libc/sysdeps/linux/arm/bits/fenv.h b/libc/sysdeps/linux/arm/bits/fenv.h index 7bd242385..3764d7749 100644 --- a/libc/sysdeps/linux/arm/bits/fenv.h +++ b/libc/sysdeps/linux/arm/bits/fenv.h @@ -20,6 +20,45 @@ # error "Never use directly; include instead." #endif +#ifdef __MAVERICK__ + +/* Define bits representing exceptions in the FPU status word. */ +enum + { + FE_INVALID = 1, +#define FE_INVALID FE_INVALID + FE_OVERFLOW = 4, +#define FE_OVERFLOW FE_OVERFLOW + FE_UNDERFLOW = 8, +#define FE_UNDERFLOW FE_UNDERFLOW + FE_INEXACT = 16, +#define FE_INEXACT FE_INEXACT + }; + +/* Amount to shift by to convert an exception to a mask bit. */ +#define FE_EXCEPT_SHIFT 5 + +/* All supported exceptions. */ +#define FE_ALL_EXCEPT \ + (FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW | FE_INEXACT) + +/* IEEE rounding modes. */ +enum + { + FE_TONEAREST = 0, +#define FE_TONEAREST FE_TONEAREST + FE_TOWARDZERO = 0x400, +#define FE_TOWARDZERO FE_TOWARDZERO + FE_DOWNWARD = 0x800, +#define FE_DOWNWARD FE_DOWNWARD + FE_UPWARD = 0xc00, +#define FE_UPWARD FE_UPWARD + }; + +#define FE_ROUND_MASK (FE_UPWARD) + +#else /* !__MAVERICK__ */ + /* Define bits representing exceptions in the FPU status word. */ enum { @@ -44,6 +83,8 @@ enum modes exist, but you have to encode them in the actual instruction. */ #define FE_TONEAREST 0 +#endif /* __MAVERICK__ */ + /* Type representing exception flags. */ typedef unsigned long int fexcept_t; -- cgit v1.2.3