From de6be7bc60f190a0d746945a3a5a143bc93a1a65 Mon Sep 17 00:00:00 2001 From: Sergey Matyukevich Date: Tue, 20 Sep 2022 16:14:21 +0400 Subject: arc: add support for ARCv3 32-bit processors New ARCv3 ISA includes both 64-bit and 32-bit CPU family. This patch adds support for 32-bit ARCv3 HS5x processors. Signed-off-by: Sergey Matyukevich Signed-off-by: Pavel Kozlov --- libc/sysdeps/linux/arc/bits/syscalls.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'libc/sysdeps/linux/arc/bits/syscalls.h') diff --git a/libc/sysdeps/linux/arc/bits/syscalls.h b/libc/sysdeps/linux/arc/bits/syscalls.h index c858d788b..000b6b631 100644 --- a/libc/sysdeps/linux/arc/bits/syscalls.h +++ b/libc/sysdeps/linux/arc/bits/syscalls.h @@ -100,7 +100,7 @@ extern long __syscall_error (int); #ifdef __A7__ #define ARC_TRAP_INSN "trap0 \n\t" -#elif defined(__HS__) +#else #define ARC_TRAP_INSN "trap_s 0 \n\t" #endif @@ -182,7 +182,7 @@ extern long __syscall_error (int); #ifdef __A7__ #define ARC_TRAP_INSN trap0 -#elif defined(__HS__) +#else #define ARC_TRAP_INSN trap_s 0 #endif -- cgit v1.2.3