From efce79f09ae6daa77cd322df0d532beec3f445f5 Mon Sep 17 00:00:00 2001
From: Bernhard Reutner-Fischer <rep.dot.nop@gmail.com>
Date: Wed, 26 Mar 2008 13:40:36 +0000
Subject: Paul Brook writes: The attached patch adds support for compiling arm
 uClibc as pure Thumb code. This is needed because some recent ARM codes do
 not implement traditional ARM mode.  Specifically:

* Cortex-M1 - An extremely minimal FPGA based core that only implements
Thumb-1 (aka ARMv6-M).
* Cortex-M3 - A Thumb-2 only ARMv7-M core.

Most of uClibc already builds in Thumb mode, all that is left are a handful of
assembly bits.

Tested on arm-uclinuxeabi.
---
 libc/string/arm/memcmp.S | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

(limited to 'libc/string/arm/memcmp.S')

diff --git a/libc/string/arm/memcmp.S b/libc/string/arm/memcmp.S
index 4f78b5128..65409f43a 100644
--- a/libc/string/arm/memcmp.S
+++ b/libc/string/arm/memcmp.S
@@ -30,15 +30,41 @@
  */
 
 #include <features.h>
+#include <bits/arm_asm.h>
 
 .text
 .global memcmp
 .type memcmp,%function
 .align 4
 
+#if defined(THUMB1_ONLY)
+.thumb_func
+memcmp:
+	cmp	r2, #0
+	bne	1f
+	mov	r0, #0
+	bx	lr
+1:
+	push	{r4}
+	add	r4, r0, r2
+2:
+	ldrb	r2, [r0]
+	add	r0, r0, #1
+	ldrb	r3, [r1]
+	add	r1, r1, #1
+	cmp	r4, r0
+	beq	3f
+	cmp	r2, r3
+	beq	2b
+3:
+	sub	r0, r2, r3
+        pop	{r4}
+	bx	lr
+#else
 memcmp:
 	/* if ((len - 1) < 0) return 0 */
 	subs	r2, r2, #1
+	IT(tt, mi)
 	movmi	r0, #0
 #if defined(__USE_BX__)
         bxmi    lr
@@ -51,6 +77,7 @@ memcmp:
 	ldrb	r2, [r0], #1
 	ldrb	r3, [r1], #1
 	cmp	ip, r0
+	IT(t, cs)
 	cmpcs	r2, r3
 	beq	1b
 	sub	r0, r2, r3
@@ -59,6 +86,7 @@ memcmp:
 #else
  	mov	pc, lr
 #endif
+#endif
 
 .size memcmp,.-memcmp
 
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