From afab56958f1cbb47b831ee3ebff231dfbae74af2 Mon Sep 17 00:00:00 2001 From: Vineet Gupta Date: Thu, 19 Feb 2015 19:13:59 +0530 Subject: ARCv2 ISA support This is next gen Instruction Set Architecture from Synopsys and basis for the ARC HS family of processors. http://www.synopsys.com/dw/ipdir.php?ds=arc-hs38-processor&elq_mid=5732&elq_cid=458802 http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/arc-hs/Pages/default.aspx Signed-off-by: Vineet Gupta Signed-off-by: Bernhard Reutner-Fischer --- Rules.mak | 1 + 1 file changed, 1 insertion(+) (limited to 'Rules.mak') diff --git a/Rules.mak b/Rules.mak index 9f5fe8564..ea254f1a2 100644 --- a/Rules.mak +++ b/Rules.mak @@ -543,6 +543,7 @@ endif ifeq ($(TARGET_ARCH),arc) CPU_CFLAGS-y += -mlock -mswape CPU_CFLAGS-$(CONFIG_ARC_CPU_700) += -mA7 + CPU_CFLAGS-$(CONFIG_ARC_CPU_HS) += -mcpu=archs CPU_LDFLAGS-y += $(CPU_CFLAGS) -marclinux endif -- cgit v1.2.3