From 219a6dab8995aad9ac4860cc1a84d6f3509a03a4 Mon Sep 17 00:00:00 2001 From: wbx Date: Sun, 17 May 2009 14:41:34 +0200 Subject: Initial import --- target/rb411/Makefile | 28 + target/rb411/device.mk | 7 + target/rb411/files/etc/mdev.conf | 10 + target/rb411/kernel.config | 1035 ++++ target/rb411/patches/ar71xx.patch | 9913 +++++++++++++++++++++++++++++++++++++ target/rb411/uclibc.config | 233 + 6 files changed, 11226 insertions(+) create mode 100644 target/rb411/Makefile create mode 100644 target/rb411/device.mk create mode 100644 target/rb411/files/etc/mdev.conf create mode 100644 target/rb411/kernel.config create mode 100644 target/rb411/patches/ar71xx.patch create mode 100644 target/rb411/uclibc.config (limited to 'target/rb411') diff --git a/target/rb411/Makefile b/target/rb411/Makefile new file mode 100644 index 000000000..efb664bb5 --- /dev/null +++ b/target/rb411/Makefile @@ -0,0 +1,28 @@ +# $Id: Makefile 30 2008-09-04 13:31:09Z wbx $ +#- +# This file is part of the OpenADK project. OpenADK is copyrighted +# material, please see the LICENCE file in the top-level directory. + +include $(TOPDIR)/rules.mk +include $(TOPDIR)/mk/kernel.mk +include $(TOPDIR)/mk/modules.mk +include $(TOPDIR)/mk/kernel-build.mk +include $(TOPDIR)/mk/image.mk + +kernel-install: + cp $(LINUX_DIR)/vmlinux $(BIN_DIR)/${DEVICE}-${ARCH}-kernel + +ifeq ($(FS),nfsroot) +imageinstall: $(BIN_DIR)/$(ROOTFSTARBALL) + @echo 'The kernel file is: ${BIN_DIR}/${DEVICE}-${ARCH}-kernel' + @echo 'The nfs root tarball is: ${BIN_DIR}/${ROOTFSTARBALL}' +endif +ifeq ($(FS),yaffs) +imageinstall: $(BIN_DIR)/$(ROOTFSTARBALL) + @echo 'The kernel file is: ${BIN_DIR}/${DEVICE}-${ARCH}-kernel' + @echo 'The root tarball is: ${BIN_DIR}/${ROOTFSTARBALL}' + @echo 'Format your NAND with Routerboot, boot via NFS and' + @echo 'then install kernel and filesystem:' + @echo 'mount -t yaffs2 /dev/mtdblock0 /mnt' + @echo 'cp ${DEVICE}-${ARCH}-kernel /mnt/kernel' +endif diff --git a/target/rb411/device.mk b/target/rb411/device.mk new file mode 100644 index 000000000..a6038dc4f --- /dev/null +++ b/target/rb411/device.mk @@ -0,0 +1,7 @@ +ARCH:= mips +CPU_ARCH:= mips +KERNEL_VERSION:= 2.6.29.1 +KERNEL_RELEASE:= 1 +KERNEL_MD5SUM:= 4ada43caecb08fe2af71b416b6f586d8 +TARGET_OPTIMIZATION:= -Os -pipe +TARGET_CFLAGS_ARCH:= -march=mips32 diff --git a/target/rb411/files/etc/mdev.conf b/target/rb411/files/etc/mdev.conf new file mode 100644 index 000000000..baa2eb140 --- /dev/null +++ b/target/rb411/files/etc/mdev.conf @@ -0,0 +1,10 @@ +device-mapper 0:0 660 @mkdir /dev/mapper +tun 0:0 660 >net/tun +null 0:0 777 +zero 0:0 666 +u?random 0:0 644 +console 0:0 0600 +ptmx 0:0 666 +tty 0:0 666 +ttyS* 0:0 640 +.* 0:0 644 @/lib/mdev/init diff --git a/target/rb411/kernel.config b/target/rb411/kernel.config new file mode 100644 index 000000000..e3da44dd8 --- /dev/null +++ b/target/rb411/kernel.config @@ -0,0 +1,1035 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.29.1 +# Wed Apr 29 21:22:36 2009 +# +CONFIG_MIPS=y + +# +# Machine selection +# +# CONFIG_MACH_ALCHEMY is not set +CONFIG_ATHEROS_AR71XX=y +# CONFIG_BASLER_EXCITE is not set +# CONFIG_BCM47XX is not set +# CONFIG_MIPS_COBALT is not set +# CONFIG_MACH_DECSTATION is not set +# CONFIG_MACH_JAZZ is not set +# CONFIG_LASAT is not set +# CONFIG_LEMOTE_FULONG is not set +# CONFIG_MIPS_MALTA is not set +# CONFIG_MIPS_SIM is not set +# CONFIG_NEC_MARKEINS is not set +# CONFIG_MACH_VR41XX is not set +# CONFIG_NXP_STB220 is not set +# CONFIG_NXP_STB225 is not set +# CONFIG_PNX8550_JBS is not set +# CONFIG_PNX8550_STB810 is not set +# CONFIG_PMC_MSP is not set +# CONFIG_PMC_YOSEMITE is not set +# CONFIG_SGI_IP22 is not set +# CONFIG_SGI_IP27 is not set +# CONFIG_SGI_IP28 is not set +# CONFIG_SGI_IP32 is not set +# CONFIG_SIBYTE_CRHINE is not set +# CONFIG_SIBYTE_CARMEL is not set +# CONFIG_SIBYTE_CRHONE is not set +# CONFIG_SIBYTE_RHONE is not set +# CONFIG_SIBYTE_SWARM is not set +# CONFIG_SIBYTE_LITTLESUR is not set +# CONFIG_SIBYTE_SENTOSA is not set +# CONFIG_SIBYTE_BIGSUR is not set +# CONFIG_SNI_RM is not set +# CONFIG_MACH_TX39XX is not set +# CONFIG_MACH_TX49XX is not set +# CONFIG_MIKROTIK_RB532 is not set +# CONFIG_WR_PPMC is not set +# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set +# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set +CONFIG_AR71XX_EARLY_SERIAL=y + +# +# Atheros AR71xx machine selection +# +# CONFIG_AR71XX_MACH_AP81 is not set +# CONFIG_AR71XX_MACH_AP83 is not set +# CONFIG_AR71XX_MACH_PB42 is not set +# CONFIG_AR71XX_MACH_AW_NR580 is not set +# CONFIG_AR71XX_MACH_GENERIC is not set +# CONFIG_AR71XX_MACH_WP543 is not set +CONFIG_AR71XX_MACH_RB_4XX=y +# CONFIG_AR71XX_MACH_WNR2000 is not set +# CONFIG_AR71XX_MACH_MZK_W04NU is not set +# CONFIG_AR71XX_MACH_MZK_W300NH is not set +# CONFIG_AR71XX_MACH_TL_WR941ND is not set +# CONFIG_AR71XX_MACH_TEW_632BRP is not set +# CONFIG_AR71XX_MACH_UBNT is not set +CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set +CONFIG_ARCH_SUPPORTS_OPROFILE=y +CONFIG_GENERIC_FIND_NEXT_BIT=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_TIME=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_SCHED_OMIT_FRAME_POINTER=y +# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set +CONFIG_CEVT_R4K_LIB=y +CONFIG_CEVT_R4K=y +CONFIG_CSRC_R4K_LIB=y +CONFIG_CSRC_R4K=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DMA_NEED_PCI_MAP_STATE=y +CONFIG_EARLY_PRINTK=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +# CONFIG_HOTPLUG_CPU is not set +CONFIG_MIPS_MACHINE=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_GPIO=y +CONFIG_CPU_BIG_ENDIAN=y +# CONFIG_CPU_LITTLE_ENDIAN is not set +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_IRQ_CPU=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 + +# +# CPU selection +# +# CONFIG_CPU_LOONGSON2 is not set +CONFIG_CPU_MIPS32_R1=y +# CONFIG_CPU_MIPS32_R2 is not set +# CONFIG_CPU_MIPS64_R1 is not set +# CONFIG_CPU_MIPS64_R2 is not set +# CONFIG_CPU_R3000 is not set +# CONFIG_CPU_TX39XX is not set +# CONFIG_CPU_VR41XX is not set +# CONFIG_CPU_R4300 is not set +# CONFIG_CPU_R4X00 is not set +# CONFIG_CPU_TX49XX is not set +# CONFIG_CPU_R5000 is not set +# CONFIG_CPU_R5432 is not set +# CONFIG_CPU_R5500 is not set +# CONFIG_CPU_R6000 is not set +# CONFIG_CPU_NEVADA is not set +# CONFIG_CPU_R8000 is not set +# CONFIG_CPU_R10000 is not set +# CONFIG_CPU_RM7000 is not set +# CONFIG_CPU_RM9000 is not set +# CONFIG_CPU_SB1 is not set +# CONFIG_CPU_CAVIUM_OCTEON is not set +CONFIG_SYS_HAS_CPU_MIPS32_R1=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPSR1=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_HARDWARE_WATCHPOINTS=y + +# +# Kernel type +# +CONFIG_32BIT=y +# CONFIG_64BIT is not set +CONFIG_PAGE_SIZE_4KB=y +# CONFIG_PAGE_SIZE_8KB is not set +# CONFIG_PAGE_SIZE_16KB is not set +# CONFIG_PAGE_SIZE_64KB is not set +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_MIPS_MT_DISABLED=y +# CONFIG_MIPS_MT_SMP is not set +# CONFIG_MIPS_MT_SMTC is not set +CONFIG_CPU_HAS_LLSC=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_GENERIC_HARDIRQS=y +CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_ARCH_FLATMEM_ENABLE=y +CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +CONFIG_PAGEFLAGS_EXTENDED=y +CONFIG_SPLIT_PTLOCK_CPUS=4 +# CONFIG_PHYS_ADDR_T_64BIT is not set +CONFIG_ZONE_DMA_FLAG=0 +CONFIG_VIRT_TO_BUS=y +# CONFIG_UNEVICTABLE_LRU is not set +# CONFIG_NO_HZ is not set +# CONFIG_HIGH_RES_TIMERS is not set +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y +# CONFIG_HZ_48 is not set +CONFIG_HZ_100=y +# CONFIG_HZ_128 is not set +# CONFIG_HZ_250 is not set +# CONFIG_HZ_256 is not set +# CONFIG_HZ_1000 is not set +# CONFIG_HZ_1024 is not set +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_HZ=100 +CONFIG_PREEMPT_NONE=y +# CONFIG_PREEMPT_VOLUNTARY is not set +# CONFIG_PREEMPT is not set +# CONFIG_KEXEC is not set +# CONFIG_SECCOMP is not set +CONFIG_LOCKDEP_SUPPORT=y +CONFIG_STACKTRACE_SUPPORT=y +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + +# +# General setup +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 +CONFIG_LOCALVERSION="" +# CONFIG_LOCALVERSION_AUTO is not set +# CONFIG_SWAP is not set +CONFIG_SYSVIPC=y +CONFIG_SYSVIPC_SYSCTL=y +# CONFIG_POSIX_MQUEUE is not set +# CONFIG_BSD_PROCESS_ACCT is not set +# CONFIG_TASKSTATS is not set +# CONFIG_AUDIT is not set + +# +# RCU Subsystem +# +CONFIG_CLASSIC_RCU=y +# CONFIG_TREE_RCU is not set +# CONFIG_PREEMPT_RCU is not set +# CONFIG_TREE_RCU_TRACE is not set +# CONFIG_PREEMPT_RCU_TRACE is not set +# CONFIG_IKCONFIG is not set +CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_GROUP_SCHED is not set +# CONFIG_CGROUPS is not set +# CONFIG_SYSFS_DEPRECATED_V2 is not set +# CONFIG_RELAY is not set +# CONFIG_NAMESPACES is not set +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y +CONFIG_ANON_INODES=y +CONFIG_EMBEDDED=y +CONFIG_SYSCTL_SYSCALL=y +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_PCSPKR_PLATFORM=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SIGNALFD=y +CONFIG_TIMERFD=y +CONFIG_EVENTFD=y +CONFIG_SHMEM=y +CONFIG_AIO=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_PCI_QUIRKS=y +# CONFIG_COMPAT_BRK is not set +CONFIG_SLAB=y +# CONFIG_SLUB is not set +# CONFIG_SLOB is not set +# CONFIG_PROFILING is not set +CONFIG_HAVE_OPROFILE=y +# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set +CONFIG_SLABINFO=y +CONFIG_RT_MUTEXES=y +CONFIG_BASE_SMALL=0 +CONFIG_MODULES=y +# CONFIG_MODULE_FORCE_LOAD is not set +CONFIG_MODULE_UNLOAD=y +# CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODVERSIONS is not set +# CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_BLOCK=y +# CONFIG_LBD is not set +# CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_BLK_DEV_BSG is not set +# CONFIG_BLK_DEV_INTEGRITY is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +# CONFIG_IOSCHED_AS is not set +# CONFIG_IOSCHED_DEADLINE is not set +# CONFIG_IOSCHED_CFQ is not set +# CONFIG_DEFAULT_AS is not set +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +CONFIG_DEFAULT_NOOP=y +CONFIG_DEFAULT_IOSCHED="noop" +# CONFIG_PROBE_INITRD_HEADER is not set +# CONFIG_FREEZER is not set + +# +# Bus options (PCI, PCMCIA, EISA, ISA, TC) +# +CONFIG_HW_HAS_PCI=y +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +# CONFIG_ARCH_SUPPORTS_MSI is not set +# CONFIG_PCI_LEGACY is not set +# CONFIG_PCI_STUB is not set +CONFIG_MMU=y +# CONFIG_PCCARD is not set +# CONFIG_HOTPLUG_PCI is not set + +# +# Executable file formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set +# CONFIG_HAVE_AOUT is not set +# CONFIG_BINFMT_MISC is not set +CONFIG_TRAD_SIGNALS=y + +# +# Power management options +# +CONFIG_ARCH_SUSPEND_POSSIBLE=y +# CONFIG_PM is not set +CONFIG_NET=y + +# +# Networking options +# +CONFIG_COMPAT_NET_DEV_OPS=y +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_ASK_IP_FIB_HASH=y +# CONFIG_IP_FIB_TRIE is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_MULTIPLE_TABLES is not set +# CONFIG_IP_ROUTE_MULTIPATH is not set +# CONFIG_IP_ROUTE_VERBOSE is not set +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +CONFIG_SYN_COOKIES=y +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +# CONFIG_INET_XFRM_MODE_TUNNEL is not set +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set +# CONFIG_IPV6 is not set +# CONFIG_NETWORK_SECMARK is not set +# CONFIG_NETFILTER is not set +# CONFIG_IP_DCCP is not set +# CONFIG_IP_SCTP is not set +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_NET_DSA is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set +# CONFIG_NET_SCHED is not set +# CONFIG_DCB is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_CAN is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_AF_RXRPC is not set +# CONFIG_PHONET is not set +# CONFIG_WIRELESS is not set +# CONFIG_WIMAX is not set +# CONFIG_RFKILL is not set +# CONFIG_NET_9P is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" +# CONFIG_STANDALONE is not set +# CONFIG_PREVENT_FIRMWARE_BUILD is not set +# CONFIG_FW_LOADER is not set +# CONFIG_SYS_HYPERVISOR is not set +# CONFIG_CONNECTOR is not set +CONFIG_MTD=y +# CONFIG_MTD_DEBUG is not set +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_TESTS is not set +# CONFIG_MTD_REDBOOT_PARTS is not set +# CONFIG_MTD_CMDLINE_PARTS is not set +# CONFIG_MTD_AR7_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set +# CONFIG_MTD_OOPS is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_INTEL_VR_NOR is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_PMC551 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set +CONFIG_MTD_NAND=y +# CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_CAFE is not set +# CONFIG_MTD_NAND_NANDSIM is not set +# CONFIG_MTD_NAND_PLATFORM is not set +CONFIG_MTD_NAND_RB4XX=y +# CONFIG_MTD_ONENAND is not set + +# +# LPDDR flash memory drivers +# +# CONFIG_MTD_LPDDR is not set + +# +# UBI - Unsorted block images +# +# CONFIG_MTD_UBI is not set +# CONFIG_PARPORT is not set +CONFIG_BLK_DEV=y +# CONFIG_BLK_CPQ_DA is not set +# CONFIG_BLK_CPQ_CISS_DA is not set +# CONFIG_BLK_DEV_DAC960 is not set +# CONFIG_BLK_DEV_UMEM is not set +# CONFIG_BLK_DEV_COW_COMMON is not set +# CONFIG_BLK_DEV_LOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_SX8 is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set +# CONFIG_BLK_DEV_HD is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_HAVE_IDE=y +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +# CONFIG_SCSI is not set +# CONFIG_SCSI_DMA is not set +# CONFIG_SCSI_NETLINK is not set +# CONFIG_ATA is not set +# CONFIG_MD is not set +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# Enable only one of the two stacks, unless you know what you are doing +# +# CONFIG_FIREWIRE is not set +# CONFIG_IEEE1394 is not set +# CONFIG_I2O is not set +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_MACVLAN is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set +# CONFIG_VETH is not set +# CONFIG_ARCNET is not set +CONFIG_PHYLIB=y +# CONFIG_SWCONFIG is not set + +# +# MII PHY device drivers +# +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set +# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_ICPLUS_PHY is not set +# CONFIG_REALTEK_PHY is not set +# CONFIG_NATIONAL_PHY is not set +# CONFIG_STE10XP is not set +# CONFIG_LSI_ET1011C_PHY is not set +# CONFIG_FIXED_PHY is not set +# CONFIG_MDIO_BITBANG is not set +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_AX88796 is not set +# CONFIG_HAPPYMEAL is not set +# CONFIG_SUNGEM is not set +# CONFIG_CASSINI is not set +# CONFIG_NET_VENDOR_3COM is not set +# CONFIG_SMC91X is not set +# CONFIG_DM9000 is not set +# CONFIG_DNET is not set +# CONFIG_NET_TULIP is not set +# CONFIG_HP100 is not set +# CONFIG_IBM_NEW_EMAC_ZMII is not set +# CONFIG_IBM_NEW_EMAC_RGMII is not set +# CONFIG_IBM_NEW_EMAC_TAH is not set +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set +CONFIG_NET_PCI=y +# CONFIG_PCNET32 is not set +# CONFIG_AMD8111_ETH is not set +# CONFIG_ADAPTEC_STARFIRE is not set +# CONFIG_B44 is not set +# CONFIG_FORCEDETH is not set +# CONFIG_TC35815 is not set +# CONFIG_E100 is not set +# CONFIG_FEALNX is not set +# CONFIG_NATSEMI is not set +# CONFIG_NE2K_PCI is not set +# CONFIG_8139CP is not set +# CONFIG_8139TOO is not set +# CONFIG_R6040 is not set +# CONFIG_SIS900 is not set +# CONFIG_EPIC100 is not set +# CONFIG_SMSC9420 is not set +# CONFIG_SUNDANCE is not set +# CONFIG_TLAN is not set +# CONFIG_VIA_RHINE is not set +# CONFIG_SC92031 is not set +# CONFIG_ATL2 is not set +CONFIG_NETDEV_1000=y +# CONFIG_ACENIC is not set +CONFIG_AG71XX=y +# CONFIG_AG71XX_DEBUG is not set +# CONFIG_AG71XX_AR8216_SUPPORT is not set +# CONFIG_DL2K is not set +# CONFIG_E1000 is not set +# CONFIG_E1000E is not set +# CONFIG_IP1000 is not set +# CONFIG_IGB is not set +# CONFIG_NS83820 is not set +# CONFIG_HAMACHI is not set +# CONFIG_YELLOWFIN is not set +# CONFIG_R8169 is not set +# CONFIG_SIS190 is not set +# CONFIG_SKGE is not set +# CONFIG_SKY2 is not set +# CONFIG_VIA_VELOCITY is not set +# CONFIG_TIGON3 is not set +# CONFIG_BNX2 is not set +# CONFIG_QLA3XXX is not set +# CONFIG_ATL1 is not set +# CONFIG_ATL1E is not set +# CONFIG_ATL1C is not set +# CONFIG_JME is not set +# CONFIG_NETDEV_10000 is not set +# CONFIG_TR is not set + +# +# Wireless LAN +# +# CONFIG_WLAN_PRE80211 is not set +# CONFIG_WLAN_80211 is not set +# CONFIG_IWLWIFI_LEDS is not set + +# +# Enable WiMAX (Networking options) to see the WiMAX drivers +# +# CONFIG_WAN is not set +# CONFIG_FDDI is not set +# CONFIG_HIPPI is not set +# CONFIG_PPP is not set +# CONFIG_SLIP is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_ISDN is not set +# CONFIG_PHONE is not set + +# +# Input device support +# +CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set +# CONFIG_INPUT_POLLDEV is not set + +# +# Userland interfaces +# +# CONFIG_INPUT_MOUSEDEV is not set +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_EVDEV is not set +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TABLET is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +# CONFIG_SERIO is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +# CONFIG_VT is not set +# CONFIG_DEVKMEM is not set +# CONFIG_SERIAL_NONSTANDARD is not set +# CONFIG_NOZOMI is not set + +# +# Serial drivers +# +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_PCI=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +# CONFIG_SERIAL_8250_EXTENDED is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +# CONFIG_SERIAL_JSM is not set +CONFIG_UNIX98_PTYS=y +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_IPMI_HANDLER is not set +# CONFIG_HW_RANDOM is not set +# CONFIG_R3964 is not set +# CONFIG_APPLICOM is not set +# CONFIG_RAW_DRIVER is not set +# CONFIG_TCG_TPM is not set +CONFIG_DEVPORT=y +# CONFIG_I2C is not set +# CONFIG_SPI is not set +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +# CONFIG_GPIO_SYSFS is not set + +# +# Memory mapped GPIO expanders: +# + +# +# I2C GPIO expanders: +# + +# +# PCI GPIO expanders: +# +# CONFIG_GPIO_BT8XX is not set + +# +# SPI GPIO expanders: +# +# CONFIG_W1 is not set +# CONFIG_POWER_SUPPLY is not set +# CONFIG_HWMON is not set +# CONFIG_THERMAL is not set +# CONFIG_THERMAL_HWMON is not set +# CONFIG_WATCHDOG is not set +CONFIG_SSB_POSSIBLE=y + +# +# Sonics Silicon Backplane +# +# CONFIG_SSB is not set + +# +# Multifunction device drivers +# +# CONFIG_MFD_CORE is not set +# CONFIG_MFD_SM501 is not set +# CONFIG_HTC_PASIC3 is not set +# CONFIG_MFD_TMIO is not set +# CONFIG_REGULATOR is not set + +# +# Multimedia devices +# + +# +# Multimedia core support +# +# CONFIG_VIDEO_DEV is not set +# CONFIG_DVB_CORE is not set +# CONFIG_VIDEO_MEDIA is not set + +# +# Multimedia drivers +# +# CONFIG_DAB is not set + +# +# Graphics support +# +# CONFIG_DRM is not set +# CONFIG_VGASTATE is not set +# CONFIG_VIDEO_OUTPUT_CONTROL is not set +# CONFIG_FB is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Display device support +# +# CONFIG_DISPLAY_SUPPORT is not set +# CONFIG_SOUND is not set +# CONFIG_HID_SUPPORT is not set +CONFIG_USB_SUPPORT=y +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +CONFIG_USB_ARCH_HAS_EHCI=y +# CONFIG_USB is not set +# CONFIG_USB_OTG_WHITELIST is not set +# CONFIG_USB_OTG_BLACKLIST_HUB is not set + +# +# Enable Host or Gadget support to see Inventra options +# + +# +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; +# +# CONFIG_USB_GADGET is not set + +# +# OTG and related infrastructure +# +# CONFIG_UWB is not set +# CONFIG_MMC is not set +# CONFIG_MEMSTICK is not set +# CONFIG_NEW_LEDS is not set +# CONFIG_ACCESSIBILITY is not set +# CONFIG_INFINIBAND is not set +CONFIG_RTC_LIB=y +# CONFIG_RTC_CLASS is not set +# CONFIG_DMADEVICES is not set +# CONFIG_UIO is not set +# CONFIG_STAGING is not set + +# +# File systems +# +# CONFIG_EXT2_FS is not set +# CONFIG_EXT3_FS is not set +# CONFIG_EXT4_FS is not set +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +# CONFIG_FS_POSIX_ACL is not set +CONFIG_FILE_LOCKING=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_BTRFS_FS is not set +CONFIG_DNOTIFY=y +CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y +# CONFIG_QUOTA is not set +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +# CONFIG_MSDOS_FS is not set +# CONFIG_VFAT_FS is not set +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +# CONFIG_PROC_KCORE is not set +CONFIG_PROC_SYSCTL=y +# CONFIG_PROC_PAGE_MONITOR is not set +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set +# CONFIG_HUGETLB_PAGE is not set +# CONFIG_CONFIGFS_FS is not set +CONFIG_MISC_FILESYSTEMS=y +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +CONFIG_YAFFS_FS=y +CONFIG_YAFFS_YAFFS1=y +# CONFIG_YAFFS_9BYTE_TAGS is not set +# CONFIG_YAFFS_DOES_ECC is not set +CONFIG_YAFFS_YAFFS2=y +CONFIG_YAFFS_AUTO_YAFFS2=y +# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set +# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set +# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set +CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y +# CONFIG_JFFS2_FS is not set +# CONFIG_CRAMFS is not set +# CONFIG_SQUASHFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_OMFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_ROMFS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set +CONFIG_NETWORK_FILESYSTEMS=y +# CONFIG_NFS_FS is not set +# CONFIG_NFSD is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y +# CONFIG_NLS is not set +# CONFIG_DLM is not set + +# +# Kernel hacking +# +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_PRINTK_TIME=y +# CONFIG_ENABLE_WARN_DEPRECATED is not set +# CONFIG_ENABLE_MUST_CHECK is not set +CONFIG_FRAME_WARN=0 +CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_HEADERS_CHECK is not set +# CONFIG_DEBUG_KERNEL is not set +# CONFIG_DEBUG_MEMORY_INIT is not set +# CONFIG_RCU_CPU_STALL_DETECTOR is not set +# CONFIG_SYSCTL_SYSCALL_CHECK is not set + +# +# Tracers +# +# CONFIG_DYNAMIC_PRINTK_DEBUG is not set +# CONFIG_SAMPLES is not set +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_CMDLINE="init=/init console=ttyS0,115200" + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set +# CONFIG_SECURITYFS is not set +# CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_CRYPTO=y + +# +# Crypto core or helper +# +# CONFIG_CRYPTO_FIPS is not set +# CONFIG_CRYPTO_MANAGER is not set +# CONFIG_CRYPTO_MANAGER2 is not set +# CONFIG_CRYPTO_GF128MUL is not set +# CONFIG_CRYPTO_NULL is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_AUTHENC is not set +# CONFIG_CRYPTO_TEST is not set + +# +# Authenticated Encryption with Associated Data +# +# CONFIG_CRYPTO_CCM is not set +# CONFIG_CRYPTO_GCM is not set +# CONFIG_CRYPTO_SEQIV is not set + +# +# Block modes +# +# CONFIG_CRYPTO_CBC is not set +# CONFIG_CRYPTO_CTR is not set +# CONFIG_CRYPTO_CTS is not set +# CONFIG_CRYPTO_ECB is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_PCBC is not set +# CONFIG_CRYPTO_XTS is not set + +# +# Hash modes +# +# CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set + +# +# Digest +# +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_MD4 is not set +# CONFIG_CRYPTO_MD5 is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_RMD128 is not set +# CONFIG_CRYPTO_RMD160 is not set +# CONFIG_CRYPTO_RMD256 is not set +# CONFIG_CRYPTO_RMD320 is not set +# CONFIG_CRYPTO_SHA1 is not set +# CONFIG_CRYPTO_SHA256 is not set +# CONFIG_CRYPTO_SHA512 is not set +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_WP512 is not set + +# +# Ciphers +# +# CONFIG_CRYPTO_AES is not set +# CONFIG_CRYPTO_ANUBIS is not set +# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_BLOWFISH is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_CAST5 is not set +# CONFIG_CRYPTO_CAST6 is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_KHAZAD is not set +# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_SEED is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_TEA is not set +# CONFIG_CRYPTO_TWOFISH is not set + +# +# Compression +# +# CONFIG_CRYPTO_DEFLATE is not set +# CONFIG_CRYPTO_LZO is not set + +# +# Random Number Generation +# +# CONFIG_CRYPTO_ANSI_CPRNG is not set +# CONFIG_CRYPTO_HW is not set + +# +# OCF Configuration +# +# CONFIG_OCF_OCF is not set + +# +# Library routines +# +CONFIG_BITREVERSE=y +CONFIG_GENERIC_FIND_LAST_BIT=y +# CONFIG_CRC_CCITT is not set +# CONFIG_CRC16 is not set +# CONFIG_CRC_T10DIF is not set +# CONFIG_CRC_ITU_T is not set +CONFIG_CRC32=y +# CONFIG_CRC7 is not set +# CONFIG_LIBCRC32C is not set +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y +CONFIG_HAS_DMA=y diff --git a/target/rb411/patches/ar71xx.patch b/target/rb411/patches/ar71xx.patch new file mode 100644 index 000000000..3646174f4 --- /dev/null +++ b/target/rb411/patches/ar71xx.patch @@ -0,0 +1,9913 @@ +diff -Nur linux-2.6.29.1.orig/arch/mips/Kconfig linux-2.6.29.1/arch/mips/Kconfig +--- linux-2.6.29.1.orig/arch/mips/Kconfig 2009-04-02 22:55:27.000000000 +0200 ++++ linux-2.6.29.1/arch/mips/Kconfig 2009-04-13 14:27:23.734393467 +0200 +@@ -22,6 +22,23 @@ + config MACH_ALCHEMY + bool "Alchemy processor based machines" + ++config ATHEROS_AR71XX ++ bool "Atheros AR71xx based boards" ++ select CEVT_R4K ++ select CSRC_R4K ++ select DMA_NONCOHERENT ++ select HW_HAS_PCI ++ select IRQ_CPU ++ select ARCH_REQUIRE_GPIOLIB ++ select SYS_HAS_CPU_MIPS32_R1 ++ select SYS_HAS_CPU_MIPS32_R2 ++ select SYS_SUPPORTS_32BIT_KERNEL ++ select SYS_SUPPORTS_BIG_ENDIAN ++ select SYS_HAS_EARLY_PRINTK ++ select MIPS_MACHINE ++ help ++ Support for Atheros AR71xx based boards. ++ + config BASLER_EXCITE + bool "Basler eXcite smart camera" + select CEVT_R4K +@@ -640,6 +657,7 @@ + endchoice + + source "arch/mips/alchemy/Kconfig" ++source "arch/mips/ar71xx/Kconfig" + source "arch/mips/basler/excite/Kconfig" + source "arch/mips/jazz/Kconfig" + source "arch/mips/lasat/Kconfig" +@@ -810,6 +828,9 @@ + config SYNC_R4K + bool + ++config MIPS_MACHINE ++ def_bool n ++ + config NO_IOPORT + def_bool n + +diff -Nur linux-2.6.29.1.orig/arch/mips/Makefile linux-2.6.29.1/arch/mips/Makefile +--- linux-2.6.29.1.orig/arch/mips/Makefile 2009-04-02 22:55:27.000000000 +0200 ++++ linux-2.6.29.1/arch/mips/Makefile 2009-04-13 14:27:34.483063970 +0200 +@@ -602,6 +602,14 @@ + load-$(CONFIG_CPU_CAVIUM_OCTEON) += 0xffffffff81100000 + endif + ++# ++# Atheros AR71xx ++# ++core-$(CONFIG_ATHEROS_AR71XX) += arch/mips/ar71xx/ ++cflags-$(CONFIG_ATHEROS_AR71XX) += -I$(srctree)/arch/mips/include/asm/mach-ar71xx ++load-$(CONFIG_ATHEROS_AR71XX) += 0xffffffff80060000 ++ ++ + cflags-y += -I$(srctree)/arch/mips/include/asm/mach-generic + drivers-$(CONFIG_PCI) += arch/mips/pci/ + +diff -Nur linux-2.6.29.1.orig/arch/mips/ar71xx/Kconfig linux-2.6.29.1/arch/mips/ar71xx/Kconfig +--- linux-2.6.29.1.orig/arch/mips/ar71xx/Kconfig 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.29.1/arch/mips/ar71xx/Kconfig 2009-04-13 14:27:34.483063970 +0200 +@@ -0,0 +1,64 @@ ++if ATHEROS_AR71XX ++ ++config AR71XX_EARLY_SERIAL ++ bool "Use early serial console" ++ default n ++ ++menu "Atheros AR71xx machine selection" ++ ++config AR71XX_MACH_AP81 ++ bool "Atheros AP81 board support" ++ default y ++ ++config AR71XX_MACH_AP83 ++ bool "Atheros AP83 board support" ++ default y ++ ++config AR71XX_MACH_PB42 ++ bool "Atheros PB42 board support" ++ default y ++ ++config AR71XX_MACH_AW_NR580 ++ bool "AzureWave AW-NR580 board support" ++ default y ++ ++config AR71XX_MACH_GENERIC ++ bool "Generic AR71xx based machine support" ++ default y ++ ++config AR71XX_MACH_WP543 ++ bool "Compex WP543 board support" ++ select MYLOADER ++ default y ++ ++config AR71XX_MACH_RB_4XX ++ bool "MikroTik RouterBOARD 4xx series support" ++ default y ++ ++config AR71XX_MACH_WNR2000 ++ bool "NETGEAR WNR2000 board support" ++ default y ++ ++config AR71XX_MACH_MZK_W04NU ++ bool "Planex MZK-W04NU board support" ++ default y ++ ++config AR71XX_MACH_MZK_W300NH ++ bool "Planex MZK-W300NH board support" ++ default y ++ ++config AR71XX_MACH_TL_WR941ND ++ bool "TP-LINK TL-WR941ND support" ++ default y ++ ++config AR71XX_MACH_TEW_632BRP ++ bool "TRENDnet TEW-632BRP support" ++ default y ++ ++config AR71XX_MACH_UBNT ++ bool "Ubiquiti AR71xx based boards support" ++ default y ++ ++endmenu ++ ++endif +diff -Nur linux-2.6.29.1.orig/arch/mips/ar71xx/Makefile linux-2.6.29.1/arch/mips/ar71xx/Makefile +--- linux-2.6.29.1.orig/arch/mips/ar71xx/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.29.1/arch/mips/ar71xx/Makefile 2009-04-13 14:27:34.487064480 +0200 +@@ -0,0 +1,25 @@ ++# ++# Makefile for the Atheros AR71xx SoC specific parts of the kernel ++# ++# Copyright (C) 2008-2009 Gabor Juhos ++# Copyright (C) 2008 Imre Kaloz ++# ++# This program is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License version 2 as published ++# by the Free Software Foundation. ++ ++obj-y := prom.o irq.o setup.o devices.o gpio.o ar71xx.o ++ ++obj-$(CONFIG_AR71XX_MACH_AP81) += mach-ap81.o ++obj-$(CONFIG_AR71XX_MACH_AP83) += mach-ap83.o ++obj-$(CONFIG_AR71XX_MACH_AW_NR580) += mach-aw-nr580.o ++obj-$(CONFIG_AR71XX_MACH_GENERIC) += mach-generic.o ++obj-$(CONFIG_AR71XX_MACH_MZK_W04NU) += mach-mzk-w04nu.o ++obj-$(CONFIG_AR71XX_MACH_MZK_W300NH) += mach-mzk-w300nh.o ++obj-$(CONFIG_AR71XX_MACH_PB42) += mach-pb42.o ++obj-$(CONFIG_AR71XX_MACH_RB_4XX) += mach-rb-4xx.o ++obj-$(CONFIG_AR71XX_MACH_TEW_632BRP) += mach-tew-632brp.o ++obj-$(CONFIG_AR71XX_MACH_TL_WR941ND) += mach-tl-wr941nd.o ++obj-$(CONFIG_AR71XX_MACH_UBNT) += mach-ubnt.o ++obj-$(CONFIG_AR71XX_MACH_WNR2000) += mach-wnr2000.o ++obj-$(CONFIG_AR71XX_MACH_WP543) += mach-wp543.o +diff -Nur linux-2.6.29.1.orig/arch/mips/ar71xx/ar71xx.c linux-2.6.29.1/arch/mips/ar71xx/ar71xx.c +--- linux-2.6.29.1.orig/arch/mips/ar71xx/ar71xx.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.29.1/arch/mips/ar71xx/ar71xx.c 2009-04-13 14:27:34.487064480 +0200 +@@ -0,0 +1,100 @@ ++/* ++ * AR71xx SoC routines ++ * ++ * Copyright (C) 2008 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++#include ++ ++void __iomem *ar71xx_ddr_base; ++EXPORT_SYMBOL_GPL(ar71xx_ddr_base); ++ ++void __iomem *ar71xx_pll_base; ++EXPORT_SYMBOL_GPL(ar71xx_pll_base); ++ ++void __iomem *ar71xx_reset_base; ++EXPORT_SYMBOL_GPL(ar71xx_reset_base); ++ ++void __iomem *ar71xx_gpio_base; ++EXPORT_SYMBOL_GPL(ar71xx_gpio_base); ++ ++void __iomem *ar71xx_usb_ctrl_base; ++EXPORT_SYMBOL_GPL(ar71xx_usb_ctrl_base); ++ ++void ar71xx_device_stop(u32 mask) ++{ ++ unsigned long flags; ++ u32 t; ++ ++ switch (ar71xx_soc) { ++ case AR71XX_SOC_AR7130: ++ case AR71XX_SOC_AR7141: ++ case AR71XX_SOC_AR7161: ++ local_irq_save(flags); ++ t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE); ++ ar71xx_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t | mask); ++ local_irq_restore(flags); ++ break; ++ ++ case AR71XX_SOC_AR9130: ++ case AR71XX_SOC_AR9132: ++ local_irq_save(flags); ++ t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE); ++ ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, t | mask); ++ local_irq_restore(flags); ++ break; ++ ++ default: ++ BUG(); ++ } ++} ++EXPORT_SYMBOL_GPL(ar71xx_device_stop); ++ ++void ar71xx_device_start(u32 mask) ++{ ++ unsigned long flags; ++ u32 t; ++ ++ switch (ar71xx_soc) { ++ case AR71XX_SOC_AR7130: ++ case AR71XX_SOC_AR7141: ++ case AR71XX_SOC_AR7161: ++ local_irq_save(flags); ++ t = ar71xx_reset_rr(AR71XX_RESET_REG_RESET_MODULE); ++ ar71xx_reset_wr(AR71XX_RESET_REG_RESET_MODULE, t & ~mask); ++ local_irq_restore(flags); ++ break; ++ ++ case AR71XX_SOC_AR9130: ++ case AR71XX_SOC_AR9132: ++ local_irq_save(flags); ++ t = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE); ++ ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, t & ~mask); ++ local_irq_restore(flags); ++ break; ++ ++ default: ++ BUG(); ++ } ++} ++EXPORT_SYMBOL_GPL(ar71xx_device_start); ++ ++void ar71xx_ddr_flush(u32 reg) ++{ ++ ar71xx_ddr_wr(reg, 1); ++ while ((ar71xx_ddr_rr(reg) & 0x1)); ++ ++ ar71xx_ddr_wr(reg, 1); ++ while ((ar71xx_ddr_rr(reg) & 0x1)); ++} ++EXPORT_SYMBOL_GPL(ar71xx_ddr_flush); ++ +diff -Nur linux-2.6.29.1.orig/arch/mips/ar71xx/devices.c linux-2.6.29.1/arch/mips/ar71xx/devices.c +--- linux-2.6.29.1.orig/arch/mips/ar71xx/devices.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.29.1/arch/mips/ar71xx/devices.c 2009-04-13 14:27:34.491064431 +0200 +@@ -0,0 +1,675 @@ ++/* ++ * Atheros AR71xx SoC platform devices ++ * ++ * Copyright (C) 2008-2009 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * Parts of this file are based on Atheros' 2.6.15 BSP ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "devices.h" ++ ++static u8 ar71xx_mac_base[ETH_ALEN] __initdata; ++ ++/* ++ * OHCI (USB full speed host controller) ++ */ ++static struct resource ar71xx_ohci_resources[] = { ++ [0] = { ++ .start = AR71XX_OHCI_BASE, ++ .end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++ [1] = { ++ .start = AR71XX_MISC_IRQ_OHCI, ++ .end = AR71XX_MISC_IRQ_OHCI, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32); ++static struct platform_device ar71xx_ohci_device = { ++ .name = "ar71xx-ohci", ++ .id = -1, ++ .resource = ar71xx_ohci_resources, ++ .num_resources = ARRAY_SIZE(ar71xx_ohci_resources), ++ .dev = { ++ .dma_mask = &ar71xx_ohci_dmamask, ++ .coherent_dma_mask = DMA_BIT_MASK(32), ++ }, ++}; ++ ++/* ++ * EHCI (USB full speed host controller) ++ */ ++static struct resource ar71xx_ehci_resources[] = { ++ [0] = { ++ .start = AR71XX_EHCI_BASE, ++ .end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++ [1] = { ++ .start = AR71XX_CPU_IRQ_USB, ++ .end = AR71XX_CPU_IRQ_USB, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++ ++static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32); ++static struct ar71xx_ehci_platform_data ar71xx_ehci_data; ++ ++static struct platform_device ar71xx_ehci_device = { ++ .name = "ar71xx-ehci", ++ .id = -1, ++ .resource = ar71xx_ehci_resources, ++ .num_resources = ARRAY_SIZE(ar71xx_ehci_resources), ++ .dev = { ++ .dma_mask = &ar71xx_ehci_dmamask, ++ .coherent_dma_mask = DMA_BIT_MASK(32), ++ .platform_data = &ar71xx_ehci_data, ++ }, ++}; ++ ++#define AR71XX_USB_RESET_MASK \ ++ (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \ ++ | RESET_MODULE_USB_OHCI_DLL) ++ ++static void ar71xx_usb_setup(void) ++{ ++ ar71xx_device_stop(AR71XX_USB_RESET_MASK); ++ mdelay(1000); ++ ar71xx_device_start(AR71XX_USB_RESET_MASK); ++ ++ /* Turning on the Buff and Desc swap bits */ ++ ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000); ++ ++ /* WAR for HW bug. Here it adjusts the duration between two SOFS */ ++ ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00); ++ ++ mdelay(900); ++} ++ ++static void ar91xx_usb_setup(void) ++{ ++ ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE); ++ mdelay(10); ++ ++ ar71xx_device_start(RESET_MODULE_USB_HOST); ++ mdelay(10); ++ ++ ar71xx_device_start(RESET_MODULE_USB_PHY); ++ mdelay(10); ++} ++ ++void __init ar71xx_add_device_usb(void) ++{ ++ switch (ar71xx_soc) { ++ case AR71XX_SOC_AR7130: ++ case AR71XX_SOC_AR7141: ++ case AR71XX_SOC_AR7161: ++ ar71xx_usb_setup(); ++ platform_device_register(&ar71xx_ohci_device); ++ platform_device_register(&ar71xx_ehci_device); ++ break; ++ ++ case AR71XX_SOC_AR9130: ++ case AR71XX_SOC_AR9132: ++ ar91xx_usb_setup(); ++ ar71xx_ehci_data.is_ar91xx = 1; ++ platform_device_register(&ar71xx_ehci_device); ++ break; ++ ++ default: ++ BUG(); ++ } ++} ++ ++#ifndef CONFIG_AR71XX_EARLY_SERIAL ++static struct resource ar71xx_uart_resources[] = { ++ { ++ .start = AR71XX_UART_BASE, ++ .end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++#define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP) ++static struct plat_serial8250_port ar71xx_uart_data[] = { ++ { ++ .mapbase = AR71XX_UART_BASE, ++ .irq = AR71XX_MISC_IRQ_UART, ++ .flags = AR71XX_UART_FLAGS, ++ .iotype = UPIO_MEM32, ++ .regshift = 2, ++ }, { ++ /* terminating entry */ ++ } ++}; ++ ++static struct platform_device ar71xx_uart_device = { ++ .name = "serial8250", ++ .id = PLAT8250_DEV_PLATFORM, ++ .resource = ar71xx_uart_resources, ++ .num_resources = ARRAY_SIZE(ar71xx_uart_resources), ++ .dev = { ++ .platform_data = ar71xx_uart_data ++ }, ++}; ++ ++void __init ar71xx_add_device_uart(void) ++{ ++ ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq; ++ platform_device_register(&ar71xx_uart_device); ++} ++#endif /* CONFIG_AR71XX_EARLY_SERIAL */ ++ ++static struct resource ar71xx_mdio_resources[] = { ++ { ++ .name = "mdio_base", ++ .flags = IORESOURCE_MEM, ++ .start = AR71XX_GE0_BASE + 0x20, ++ .end = AR71XX_GE0_BASE + 0x38 - 1, ++ } ++}; ++ ++static struct ag71xx_mdio_platform_data ar71xx_mdio_data = { ++ .phy_mask = 0xffffffff, ++}; ++ ++static struct platform_device ar71xx_mdio_device = { ++ .name = "ag71xx-mdio", ++ .id = -1, ++ .resource = ar71xx_mdio_resources, ++ .num_resources = ARRAY_SIZE(ar71xx_mdio_resources), ++ .dev = { ++ .platform_data = &ar71xx_mdio_data, ++ }, ++}; ++ ++void __init ar71xx_add_device_mdio(u32 phy_mask) ++{ ++ ar71xx_mdio_data.phy_mask = phy_mask; ++ platform_device_register(&ar71xx_mdio_device); ++} ++ ++static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift) ++{ ++ void __iomem *base; ++ u32 t; ++ ++ base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); ++ ++ t = __raw_readl(base + cfg_reg); ++ t &= ~(3 << shift); ++ t |= (2 << shift); ++ __raw_writel(t, base + cfg_reg); ++ udelay(100); ++ ++ __raw_writel(pll_val, base + pll_reg); ++ ++ t |= (3 << shift); ++ __raw_writel(t, base + cfg_reg); ++ udelay(100); ++ ++ t &= ~(3 << shift); ++ __raw_writel(t, base + cfg_reg); ++ udelay(100); ++ ++ printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n", ++ (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg)); ++ ++ iounmap(base); ++} ++ ++static void ar71xx_set_pll_ge0(u32 val) ++{ ++ ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK, ++ val, AR71XX_ETH0_PLL_SHIFT); ++} ++ ++static void ar71xx_set_pll_ge1(u32 val) ++{ ++ ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK, ++ val, AR71XX_ETH1_PLL_SHIFT); ++} ++ ++static void ar91xx_set_pll_ge0(u32 val) ++{ ++ ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK, ++ val, AR91XX_ETH0_PLL_SHIFT); ++} ++ ++static void ar91xx_set_pll_ge1(u32 val) ++{ ++ ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK, ++ val, AR91XX_ETH1_PLL_SHIFT); ++} ++ ++static void ar71xx_ddr_flush_ge0(void) ++{ ++ ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0); ++} ++ ++static void ar71xx_ddr_flush_ge1(void) ++{ ++ ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1); ++} ++ ++static void ar91xx_ddr_flush_ge0(void) ++{ ++ ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0); ++} ++ ++static void ar91xx_ddr_flush_ge1(void) ++{ ++ ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1); ++} ++ ++static struct resource ar71xx_eth0_resources[] = { ++ { ++ .name = "mac_base", ++ .flags = IORESOURCE_MEM, ++ .start = AR71XX_GE0_BASE, ++ .end = AR71XX_GE0_BASE + 0x20 - 1, ++ }, { ++ .name = "mac_base2", ++ .flags = IORESOURCE_MEM, ++ .start = AR71XX_GE0_BASE + 0x38, ++ .end = AR71XX_GE0_BASE + 0x200 - 1, ++ }, { ++ .name = "mii_ctrl", ++ .flags = IORESOURCE_MEM, ++ .start = AR71XX_MII_BASE + MII_REG_MII0_CTRL, ++ .end = AR71XX_MII_BASE + MII_REG_MII0_CTRL + 3, ++ }, { ++ .name = "mac_irq", ++ .flags = IORESOURCE_IRQ, ++ .start = AR71XX_CPU_IRQ_GE0, ++ .end = AR71XX_CPU_IRQ_GE0, ++ }, ++}; ++ ++struct ag71xx_platform_data ar71xx_eth0_data = { ++ .reset_bit = RESET_MODULE_GE0_MAC, ++}; ++ ++static struct platform_device ar71xx_eth0_device = { ++ .name = "ag71xx", ++ .id = 0, ++ .resource = ar71xx_eth0_resources, ++ .num_resources = ARRAY_SIZE(ar71xx_eth0_resources), ++ .dev = { ++ .platform_data = &ar71xx_eth0_data, ++ }, ++}; ++ ++static struct resource ar71xx_eth1_resources[] = { ++ { ++ .name = "mac_base", ++ .flags = IORESOURCE_MEM, ++ .start = AR71XX_GE1_BASE, ++ .end = AR71XX_GE1_BASE + 0x20 - 1, ++ }, { ++ .name = "mac_base2", ++ .flags = IORESOURCE_MEM, ++ .start = AR71XX_GE1_BASE + 0x38, ++ .end = AR71XX_GE1_BASE + 0x200 - 1, ++ }, { ++ .name = "mii_ctrl", ++ .flags = IORESOURCE_MEM, ++ .start = AR71XX_MII_BASE + MII_REG_MII1_CTRL, ++ .end = AR71XX_MII_BASE + MII_REG_MII1_CTRL + 3, ++ }, { ++ .name = "mac_irq", ++ .flags = IORESOURCE_IRQ, ++ .start = AR71XX_CPU_IRQ_GE1, ++ .end = AR71XX_CPU_IRQ_GE1, ++ }, ++}; ++ ++struct ag71xx_platform_data ar71xx_eth1_data = { ++ .reset_bit = RESET_MODULE_GE1_MAC, ++}; ++ ++static struct platform_device ar71xx_eth1_device = { ++ .name = "ag71xx", ++ .id = 1, ++ .resource = ar71xx_eth1_resources, ++ .num_resources = ARRAY_SIZE(ar71xx_eth1_resources), ++ .dev = { ++ .platform_data = &ar71xx_eth1_data, ++ }, ++}; ++ ++static int ar71xx_eth_instance __initdata; ++void __init ar71xx_add_device_eth(unsigned int id) ++{ ++ struct platform_device *pdev; ++ struct ag71xx_platform_data *pdata; ++ ++ switch (id) { ++ case 0: ++ switch (ar71xx_eth0_data.phy_if_mode) { ++ case PHY_INTERFACE_MODE_MII: ++ ar71xx_eth0_data.mii_if = MII0_CTRL_IF_MII; ++ break; ++ case PHY_INTERFACE_MODE_GMII: ++ ar71xx_eth0_data.mii_if = MII0_CTRL_IF_GMII; ++ break; ++ case PHY_INTERFACE_MODE_RGMII: ++ ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RGMII; ++ break; ++ case PHY_INTERFACE_MODE_RMII: ++ ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RMII; ++ break; ++ default: ++ printk(KERN_ERR "ar71xx: invalid PHY interface mode " ++ "for eth0\n"); ++ return; ++ } ++ pdev = &ar71xx_eth0_device; ++ break; ++ case 1: ++ switch (ar71xx_eth1_data.phy_if_mode) { ++ case PHY_INTERFACE_MODE_RMII: ++ ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RMII; ++ break; ++ case PHY_INTERFACE_MODE_RGMII: ++ ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RGMII; ++ break; ++ default: ++ printk(KERN_ERR "ar71xx: invalid PHY interface mode " ++ "for eth1\n"); ++ return; ++ } ++ pdev = &ar71xx_eth1_device; ++ break; ++ default: ++ printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id); ++ return; ++ } ++ ++ pdata = pdev->dev.platform_data; ++ ++ switch (ar71xx_soc) { ++ case AR71XX_SOC_AR7130: ++ pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1 ++ : ar71xx_ddr_flush_ge0; ++ pdata->set_pll = id ? ar71xx_set_pll_ge1 ++ : ar71xx_set_pll_ge0; ++ break; ++ ++ case AR71XX_SOC_AR7141: ++ case AR71XX_SOC_AR7161: ++ pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1 ++ : ar71xx_ddr_flush_ge0; ++ pdata->set_pll = id ? ar71xx_set_pll_ge1 ++ : ar71xx_set_pll_ge0; ++ pdata->has_gbit = 1; ++ break; ++ ++ case AR71XX_SOC_AR9130: ++ pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1 ++ : ar91xx_ddr_flush_ge0; ++ pdata->set_pll = id ? ar91xx_set_pll_ge1 ++ : ar91xx_set_pll_ge0; ++ pdata->is_ar91xx = 1; ++ break; ++ ++ case AR71XX_SOC_AR9132: ++ pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1 ++ : ar91xx_ddr_flush_ge0; ++ pdata->set_pll = id ? ar91xx_set_pll_ge1 ++ : ar91xx_set_pll_ge0; ++ pdata->is_ar91xx = 1; ++ pdata->has_gbit = 1; ++ break; ++ ++ default: ++ BUG(); ++ } ++ ++ switch (pdata->phy_if_mode) { ++ case PHY_INTERFACE_MODE_GMII: ++ case PHY_INTERFACE_MODE_RGMII: ++ if (!pdata->has_gbit) { ++ printk(KERN_ERR "ar71xx: no gbit available on eth%d\n", ++ id); ++ return; ++ } ++ /* fallthrough */ ++ default: ++ break; ++ } ++ ++ if (is_valid_ether_addr(ar71xx_mac_base)) { ++ memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN); ++ pdata->mac_addr[5] += ar71xx_eth_instance; ++ } else { ++ random_ether_addr(pdata->mac_addr); ++ printk(KERN_DEBUG ++ "ar71xx: using random MAC address for eth%d\n", ++ ar71xx_eth_instance); ++ } ++ ++ platform_device_register(pdev); ++ ar71xx_eth_instance++; ++} ++ ++static struct resource ar71xx_spi_resources[] = { ++ [0] = { ++ .start = AR71XX_SPI_BASE, ++ .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++static struct platform_device ar71xx_spi_device = { ++ .name = "ar71xx-spi", ++ .id = -1, ++ .resource = ar71xx_spi_resources, ++ .num_resources = ARRAY_SIZE(ar71xx_spi_resources), ++}; ++ ++void __init ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata, ++ struct spi_board_info const *info, ++ unsigned n) ++{ ++ spi_register_board_info(info, n); ++ ar71xx_spi_device.dev.platform_data = pdata; ++ platform_device_register(&ar71xx_spi_device); ++} ++ ++void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds, ++ struct gpio_led *leds) ++{ ++ struct platform_device *pdev; ++ struct gpio_led_platform_data pdata; ++ struct gpio_led *p; ++ int err; ++ ++ p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL); ++ if (!p) ++ return; ++ ++ memcpy(p, leds, num_leds * sizeof(*p)); ++ ++ pdev = platform_device_alloc("leds-gpio", id); ++ if (!pdev) ++ goto err_free_leds; ++ ++ memset(&pdata, 0, sizeof(pdata)); ++ pdata.num_leds = num_leds; ++ pdata.leds = p; ++ ++ err = platform_device_add_data(pdev, &pdata, sizeof(pdata)); ++ if (err) ++ goto err_put_pdev; ++ ++ err = platform_device_add(pdev); ++ if (err) ++ goto err_put_pdev; ++ ++ return; ++ ++err_put_pdev: ++ platform_device_put(pdev); ++ ++err_free_leds: ++ kfree(p); ++} ++ ++void __init ar71xx_add_device_gpio_buttons(int id, ++ unsigned poll_interval, ++ unsigned nbuttons, ++ struct gpio_button *buttons) ++{ ++ struct platform_device *pdev; ++ struct gpio_buttons_platform_data pdata; ++ struct gpio_button *p; ++ int err; ++ ++ p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL); ++ if (!p) ++ return; ++ ++ memcpy(p, buttons, nbuttons * sizeof(*p)); ++ ++ pdev = platform_device_alloc("gpio-buttons", id); ++ if (!pdev) ++ goto err_free_buttons; ++ ++ memset(&pdata, 0, sizeof(pdata)); ++ pdata.poll_interval = poll_interval; ++ pdata.nbuttons = nbuttons; ++ pdata.buttons = p; ++ ++ err = platform_device_add_data(pdev, &pdata, sizeof(pdata)); ++ if (err) ++ goto err_put_pdev; ++ ++ ++ err = platform_device_add(pdev); ++ if (err) ++ goto err_put_pdev; ++ ++ return; ++ ++err_put_pdev: ++ platform_device_put(pdev); ++ ++err_free_buttons: ++ kfree(p); ++} ++ ++void __init ar71xx_add_device_wdt(void) ++{ ++ platform_device_register_simple("ar71xx-wdt", -1, NULL, 0); ++} ++ ++void __init ar71xx_set_mac_base(unsigned char *mac) ++{ ++ memcpy(ar71xx_mac_base, mac, ETH_ALEN); ++} ++ ++void __init ar71xx_parse_mac_addr(char *mac_str) ++{ ++ u8 tmp[ETH_ALEN]; ++ int t; ++ ++ t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", ++ &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]); ++ ++ if (t != ETH_ALEN) ++ t = sscanf(mac_str, "%02hhx.%02hhx.%02hhx.%02hhx.%02hhx.%02hhx", ++ &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]); ++ ++ if (t == ETH_ALEN) ++ ar71xx_set_mac_base(tmp); ++ else ++ printk(KERN_DEBUG "ar71xx: failed to parse mac address " ++ "\"%s\"\n", mac_str); ++} ++ ++static struct resource ar91xx_wmac_resources[] = { ++ { ++ .start = AR91XX_WMAC_BASE, ++ .end = AR91XX_WMAC_BASE + AR91XX_WMAC_SIZE - 1, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = AR71XX_CPU_IRQ_WMAC, ++ .end = AR71XX_CPU_IRQ_WMAC, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static struct ath9k_platform_data ar91xx_wmac_data; ++ ++static struct platform_device ar91xx_wmac_device = { ++ .name = "ath9k", ++ .id = -1, ++ .resource = ar91xx_wmac_resources, ++ .num_resources = ARRAY_SIZE(ar91xx_wmac_resources), ++ .dev = { ++ .platform_data = &ar91xx_wmac_data, ++ }, ++}; ++ ++void __init ar91xx_add_device_wmac(void) ++{ ++ u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); ++ ++ memcpy(ar91xx_wmac_data.eeprom_data, ee, ++ sizeof(ar91xx_wmac_data.eeprom_data)); ++ ++ ar71xx_device_stop(RESET_MODULE_AMBA2WMAC); ++ mdelay(10); ++ ++ ar71xx_device_start(RESET_MODULE_AMBA2WMAC); ++ mdelay(10); ++ ++ platform_device_register(&ar91xx_wmac_device); ++} ++ ++static struct platform_device ar71xx_dsa_switch_device = { ++ .name = "dsa", ++ .id = 0, ++}; ++ ++void __init ar71xx_add_device_dsa(unsigned int id, ++ struct dsa_platform_data *d) ++{ ++ switch (id) { ++ case 0: ++ d->netdev = &ar71xx_eth0_device.dev; ++ break; ++ case 1: ++ d->netdev = &ar71xx_eth1_device.dev; ++ break; ++ default: ++ printk(KERN_ERR ++ "ar71xx: invalid ethernet id %d for DSA switch\n", ++ id); ++ return; ++ } ++ d->mii_bus = &ar71xx_mdio_device.dev; ++ ar71xx_dsa_switch_device.dev.platform_data = d; ++ ++ platform_device_register(&ar71xx_dsa_switch_device); ++} +diff -Nur linux-2.6.29.1.orig/arch/mips/ar71xx/devices.h linux-2.6.29.1/arch/mips/ar71xx/devices.h +--- linux-2.6.29.1.orig/arch/mips/ar71xx/devices.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.29.1/arch/mips/ar71xx/devices.h 2009-04-13 14:27:34.491064431 +0200 +@@ -0,0 +1,58 @@ ++/* ++ * Atheros AR71xx SoC device definitions ++ * ++ * Copyright (C) 2008-2009 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef __AR71XX_DEVICES_H ++#define __AR71XX_DEVICES_H ++ ++#include ++ ++#include ++#include ++#include ++ ++void ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata, ++ struct spi_board_info const *info, ++ unsigned n) __init; ++ ++void ar71xx_set_mac_base(unsigned char *mac) __init; ++void ar71xx_parse_mac_addr(char *mac_str) __init; ++ ++extern struct ag71xx_platform_data ar71xx_eth0_data; ++extern struct ag71xx_platform_data ar71xx_eth1_data; ++void ar71xx_add_device_eth(unsigned int id) __init; ++ ++void ar71xx_add_device_mdio(u32 phy_mask) __init; ++ ++void ar71xx_add_device_leds_gpio(int id, ++ unsigned num_leds, ++ struct gpio_led *leds) __init; ++ ++void ar71xx_add_device_gpio_buttons(int id, ++ unsigned poll_interval, ++ unsigned nbuttons, ++ struct gpio_button *buttons) __init; ++ ++void ar71xx_add_device_usb(void) __init; ++ ++#ifdef CONFIG_AR71XX_EARLY_SERIAL ++static inline void ar71xx_add_device_uart(void) {} ++#else ++void ar71xx_add_device_uart(void) __init; ++#endif ++ ++void ar71xx_add_device_wdt(void) __init; ++ ++void ar91xx_add_device_wmac(void) __init; ++ ++void ar71xx_add_device_dsa(unsigned int id, ++ struct dsa_platform_data *d) __init; ++ ++#endif /* __AR71XX_DEVICES_H */ +diff -Nur linux-2.6.29.1.orig/arch/mips/ar71xx/gpio.c linux-2.6.29.1/arch/mips/ar71xx/gpio.c +--- linux-2.6.29.1.orig/arch/mips/ar71xx/gpio.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.29.1/arch/mips/ar71xx/gpio.c 2009-04-13 14:27:34.495064103 +0200 +@@ -0,0 +1,154 @@ ++/* ++ * Atheros AR71xx SoC GPIO API support ++ * ++ * Copyright (C) 2008 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++static DEFINE_SPINLOCK(ar71xx_gpio_lock); ++ ++unsigned long ar71xx_gpio_count; ++EXPORT_SYMBOL(ar71xx_gpio_count); ++ ++void __ar71xx_gpio_set_value(unsigned gpio, int value) ++{ ++ unsigned long flags; ++ ++ spin_lock_irqsave(&ar71xx_gpio_lock, flags); ++ ++ if (value) ++ ar71xx_gpio_wr(GPIO_REG_SET, (1 << gpio)); ++ else ++ ar71xx_gpio_wr(GPIO_REG_CLEAR, (1 << gpio)); ++ ++ spin_unlock_irqrestore(&ar71xx_gpio_lock, flags); ++} ++EXPORT_SYMBOL(__ar71xx_gpio_set_value); ++ ++int __ar71xx_gpio_get_value(unsigned gpio) ++{ ++ return (ar71xx_gpio_rr(GPIO_REG_IN) & (1 << gpio)) ? 1 : 0; ++} ++EXPORT_SYMBOL(__ar71xx_gpio_get_value); ++ ++static int ar71xx_gpio_get_value(struct gpio_chip *chip, unsigned offset) ++{ ++ return __ar71xx_gpio_get_value(offset); ++} ++ ++static void ar71xx_gpio_set_value(struct gpio_chip *chip, ++ unsigned offset, int value) ++{ ++ __ar71xx_gpio_set_value(offset, value); ++} ++ ++static int ar71xx_gpio_direction_input(struct gpio_chip *chip, ++ unsigned offset) ++{ ++ unsigned long flags; ++ ++ spin_lock_irqsave(&ar71xx_gpio_lock, flags); ++ ++ ar71xx_gpio_wr(GPIO_REG_OE, ++ ar71xx_gpio_rr(GPIO_REG_OE) & ~(1 << offset)); ++ ++ spin_unlock_irqrestore(&ar71xx_gpio_lock, flags); ++ ++ return 0; ++} ++ ++static int ar71xx_gpio_direction_output(struct gpio_chip *chip, ++ unsigned offset, int value) ++{ ++ unsigned long flags; ++ ++ spin_lock_irqsave(&ar71xx_gpio_lock, flags); ++ ++ if (value) ++ ar71xx_gpio_wr(GPIO_REG_SET, (1 << offset)); ++ else ++ ar71xx_gpio_wr(GPIO_REG_CLEAR, (1 << offset)); ++ ++ ar71xx_gpio_wr(GPIO_REG_OE, ++ ar71xx_gpio_rr(GPIO_REG_OE) | (1 << offset)); ++ ++ spin_unlock_irqrestore(&ar71xx_gpio_lock, flags); ++ ++ return 0; ++} ++ ++static struct gpio_chip ar71xx_gpio_chip = { ++ .label = "ar71xx", ++ .get = ar71xx_gpio_get_value, ++ .set = ar71xx_gpio_set_value, ++ .direction_input = ar71xx_gpio_direction_input, ++ .direction_output = ar71xx_gpio_direction_output, ++ .base = 0, ++ .ngpio = AR71XX_GPIO_COUNT, ++}; ++ ++void ar71xx_gpio_function_enable(u32 mask) ++{ ++ unsigned long flags; ++ ++ spin_lock_irqsave(&ar71xx_gpio_lock, flags); ++ ++ ar71xx_gpio_wr(GPIO_REG_FUNC, ar71xx_gpio_rr(GPIO_REG_FUNC) | mask); ++ ++ spin_unlock_irqrestore(&ar71xx_gpio_lock, flags); ++} ++ ++void ar71xx_gpio_function_disable(u32 mask) ++{ ++ unsigned long flags; ++ ++ spin_lock_irqsave(&ar71xx_gpio_lock, flags); ++ ++ ar71xx_gpio_wr(GPIO_REG_FUNC, ar71xx_gpio_rr(GPIO_REG_FUNC) & ~mask); ++ ++ spin_unlock_irqrestore(&ar71xx_gpio_lock, flags); ++} ++ ++void __init ar71xx_gpio_init(void) ++{ ++ int err; ++ ++ if (!request_mem_region(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE, ++ "AR71xx GPIO controller")) ++ panic("cannot allocate AR71xx GPIO registers page"); ++ ++ switch (ar71xx_soc) { ++ case AR71XX_SOC_AR7130: ++ case AR71XX_SOC_AR7141: ++ case AR71XX_SOC_AR7161: ++ ar71xx_gpio_chip.ngpio = AR71XX_GPIO_COUNT; ++ break; ++ ++ case AR71XX_SOC_AR9130: ++ case AR71XX_SOC_AR9132: ++ ar71xx_gpio_chip.ngpio = AR91XX_GPIO_COUNT; ++ break; ++ ++ default: ++ BUG(); ++ } ++ ++ err = gpiochip_add(&ar71xx_gpio_chip); ++ if (err) ++ panic("cannot add AR71xx GPIO chip, error=%d", err); ++} +diff -Nur linux-2.6.29.1.orig/arch/mips/ar71xx/irq.c linux-2.6.29.1/arch/mips/ar71xx/irq.c +--- linux-2.6.29.1.orig/arch/mips/ar71xx/irq.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.29.1/arch/mips/ar71xx/irq.c 2009-04-13 14:27:34.543070220 +0200 +@@ -0,0 +1,302 @@ ++/* ++ * Atheros AR71xx SoC specific interrupt handling ++ * ++ * Copyright (C) 2008 Gabor Juhos ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * Parts of this file are based on Atheros' 2.6.15 BSP ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++ ++#ifdef CONFIG_PCI ++static void ar71xx_pci_irq_dispatch(void) ++{ ++ u32 pending; ++ ++ pending = ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_STATUS) & ++ ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_ENABLE); ++ ++ if (pending & PCI_INT_DEV0) ++ do_IRQ(AR71XX_PCI_IRQ_DEV0); ++ ++ else if (pending & PCI_INT_DEV1) ++ do_IRQ(AR71XX_PCI_IRQ_DEV1); ++ ++ else if (pending & PCI_INT_DEV2) ++ do_IRQ(AR71XX_PCI_IRQ_DEV2); ++ ++ else ++ spurious_interrupt(); ++} ++ ++static void ar71xx_pci_irq_unmask(unsigned int irq) ++{ ++ irq -= AR71XX_PCI_IRQ_BASE; ++ ar71xx_reset_wr(AR71XX_RESET_REG_PCI_INT_ENABLE, ++ ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_ENABLE) | (1 << irq)); ++} ++ ++static void ar71xx_pci_irq_mask(unsigned int irq) ++{ ++ irq -= AR71XX_PCI_IRQ_BASE; ++ ar71xx_reset_wr(AR71XX_RESET_REG_PCI_INT_ENABLE, ++ ar71xx_reset_rr(AR71XX_RESET_REG_PCI_INT_ENABLE) & ~(1 << irq)); ++} ++ ++static struct irq_chip ar71xx_pci_irq_chip = { ++ .name = "AR71XX PCI ", ++ .mask = ar71xx_pci_irq_mask, ++ .unmask = ar71xx_pci_irq_unmask, ++ .mask_ack = ar71xx_pci_irq_mask, ++}; ++ ++static struct irqaction ar71xx_pci_irqaction = { ++ .handler = no_action, ++ .name = "cascade [AR71XX PCI]", ++}; ++ ++static void __init ar71xx_pci_irq_init(void) ++{ ++ int i; ++ ++ ar71xx_reset_wr(AR71XX_RESET_REG_PCI_INT_ENABLE, 0); ++ ar71xx_reset_wr(AR71XX_RESET_REG_PCI_INT_STATUS, 0); ++ ++ for (i = AR71XX_PCI_IRQ_BASE; ++ i < AR71XX_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++) { ++ irq_desc[i].status = IRQ_DISABLED; ++ set_irq_chip_and_handler(i, &ar71xx_pci_irq_chip, ++ handle_level_irq); ++ } ++ ++ setup_irq(AR71XX_CPU_IRQ_PCI, &ar71xx_pci_irqaction); ++} ++#endif /* CONFIG_PCI */ ++ ++static void ar71xx_gpio_irq_dispatch(void) ++{ ++ u32 pending; ++ ++ pending = ar71xx_gpio_rr(GPIO_REG_INT_PENDING) ++ & ar71xx_gpio_rr(GPIO_REG_INT_ENABLE); ++ ++ if (pending) ++ do_IRQ(AR71XX_GPIO_IRQ_BASE + fls(pending) - 1); ++ else ++ spurious_interrupt(); ++} ++ ++static void ar71xx_gpio_irq_unmask(unsigned int irq) ++{ ++ irq -= AR71XX_GPIO_IRQ_BASE; ++ ar71xx_gpio_wr(GPIO_REG_INT_ENABLE, ++ ar71xx_gpio_rr(GPIO_REG_INT_ENABLE) | (1 << irq)); ++} ++ ++static void ar71xx_gpio_irq_mask(unsigned int irq) ++{ ++ irq -= AR71XX_GPIO_IRQ_BASE; ++ ar71xx_gpio_wr(GPIO_REG_INT_ENABLE, ++ ar71xx_gpio_rr(GPIO_REG_INT_ENABLE) & ~(1 << irq)); ++} ++ ++#if 0 ++static int ar71xx_gpio_irq_set_type(unsigned int irq, unsigned int flow_type) ++{ ++ /* TODO: implement */ ++ return 0; ++} ++#else ++#define ar71xx_gpio_irq_set_type NULL ++#endif ++ ++struct irq_chip ar71xx_gpio_irq_chip = { ++ .name = "AR71XX GPIO", ++ .unmask = ar71xx_gpio_irq_unmask, ++ .mask = ar71xx_gpio_irq_mask, ++ .mask_ack = ar71xx_gpio_irq_mask, ++ .set_type = ar71xx_gpio_irq_set_type, ++}; ++ ++static struct irqaction ar71xx_gpio_irqaction = { ++ .handler = no_action, ++ .name = "cascade [AR71XX GPIO]", ++}; ++ ++#define GPIO_IRQ_INIT_STATUS (IRQ_LEVEL | IRQ_TYPE_LEVEL_HIGH | IRQ_DISABLED) ++#define GPIO_INT_ALL 0xffff ++ ++static void __init ar71xx_gpio_irq_init(void) ++{ ++ int i; ++ ++ ar71xx_gpio_wr(GPIO_REG_INT_ENABLE, 0); ++ ar71xx_gpio_wr(GPIO_REG_INT_PENDING, 0); ++ ++ /* setup type of all GPIO interrupts to level sensitive */ ++ ar71xx_gpio_wr(GPIO_REG_INT_TYPE, GPIO_INT_ALL); ++ ++ /* setup polarity of all GPIO interrupts to active high */ ++ ar71xx_gpio_wr(GPIO_REG_INT_POLARITY, GPIO_INT_ALL); ++ ++ for (i = AR71XX_GPIO_IRQ_BASE; ++ i < AR71XX_GPIO_IRQ_BASE + AR71XX_GPIO_IRQ_COUNT; i++) { ++ irq_desc[i].status = GPIO_IRQ_INIT_STATUS; ++ set_irq_chip_and_handler(i, &ar71xx_gpio_irq_chip, ++ handle_level_irq); ++ } ++ ++ setup_irq(AR71XX_MISC_IRQ_GPIO, &ar71xx_gpio_irqaction); ++} ++ ++static void ar71xx_misc_irq_dispatch(void) ++{ ++ u32 pending; ++ ++ pending = ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_STATUS) ++ & ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE); ++ ++ if (pending & MISC_INT_UART) ++ do_IRQ(AR71XX_MISC_IRQ_UART); ++ ++ else if (pending & MISC_INT_DMA) ++ do_IRQ(AR71XX_MISC_IRQ_DMA); ++ ++ else if (pending & MISC_INT_PERFC) ++ do_IRQ(AR71XX_MISC_IRQ_PERFC); ++ ++ else if (pending & MISC_INT_TIMER) ++ do_IRQ(AR71XX_MISC_IRQ_TIMER); ++ ++ else if (pending & MISC_INT_OHCI) ++ do_IRQ(AR71XX_MISC_IRQ_OHCI); ++ ++ else if (pending & MISC_INT_ERROR) ++ do_IRQ(AR71XX_MISC_IRQ_ERROR); ++ ++ else if (pending & MISC_INT_GPIO) ++ ar71xx_gpio_irq_dispatch(); ++ ++ else if (pending & MISC_INT_WDOG) ++ do_IRQ(AR71XX_MISC_IRQ_WDOG); ++ ++ else ++ spurious_interrupt(); ++} ++ ++static void ar71xx_misc_irq_unmask(unsigned int irq) ++{ ++ irq -= AR71XX_MISC_IRQ_BASE; ++ ar71xx_reset_wr(AR71XX_RESET_REG_MISC_INT_ENABLE, ++ ar71xx_reset_rr(AR71XX_RESET_REG_MISC_INT_ENABLE) | (1 << irq)); ++}