From b7b536bc43959ee3f96e8c4e3c370b7c481d1b40 Mon Sep 17 00:00:00 2001
From: Waldemar Brodkorb <wbrodkorb@infonline.de>
Date: Fri, 9 Apr 2021 23:11:38 +0200
Subject: use Linux 5.10.x by default, fix mips32r6 issue
---
target/linux/Config.in.kernelversion | 2 +-
target/linux/patches/5.10.17/mipsr6.patch | 113 +++++++++++++++++++++
toolchain/gcc/patches/10.3.0/ia64-fix-libgcc.patch | 17 ++++
3 files changed, 131 insertions(+), 1 deletion(-)
create mode 100644 target/linux/patches/5.10.17/mipsr6.patch
create mode 100644 toolchain/gcc/patches/10.3.0/ia64-fix-libgcc.patch
diff --git a/target/linux/Config.in.kernelversion b/target/linux/Config.in.kernelversion
index 39afdbdff..bbe0195aa 100644
--- a/target/linux/Config.in.kernelversion
+++ b/target/linux/Config.in.kernelversion
@@ -22,7 +22,7 @@ default ADK_TARGET_LINUX_KERNEL_VERSION_4_9 if ADK_TARGET_CPU_ARM_ARM11MPCORE
default ADK_TARGET_LINUX_KERNEL_VERSION_4_9 if ADK_TARGET_CPU_ARM_CORTEX_A53
default ADK_TARGET_LINUX_KERNEL_VERSION_4_14 if ADK_TARGET_SYSTEM_QEMU_ARM_VERSATILEPB
default ADK_TARGET_LINUX_KERNEL_VERSION_4_19 if ADK_TARGET_ARCH_ARC
-default ADK_TARGET_LINUX_KERNEL_VERSION_5_4
+default ADK_TARGET_LINUX_KERNEL_VERSION_5_10
config ADK_TARGET_LINUX_KERNEL_VERSION_GIT
bool "git"
diff --git a/target/linux/patches/5.10.17/mipsr6.patch b/target/linux/patches/5.10.17/mipsr6.patch
new file mode 100644
index 000000000..b8574797e
--- /dev/null
+++ b/target/linux/patches/5.10.17/mipsr6.patch
@@ -0,0 +1,113 @@
+diff -Nur linux-5.10.17.orig/arch/mips/include/asm/vdso/gettimeofday.h linux-5.10.17/arch/mips/include/asm/vdso/gettimeofday.h
+--- linux-5.10.17.orig/arch/mips/include/asm/vdso/gettimeofday.h 2021-02-17 11:02:30.000000000 +0100
++++ linux-5.10.17/arch/mips/include/asm/vdso/gettimeofday.h 2021-04-09 15:24:43.613709753 +0200
+@@ -30,12 +30,21 @@
+ register long nr asm("v0") = __NR_gettimeofday;
+ register long error asm("a3");
+
++#if MIPS_ISA_REV >= 6
++ asm volatile(
++ " syscall\n"
++ : "=r" (ret), "=r" (error)
++ : "r" (tv), "r" (tz), "r" (nr)
++ : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
++ "$14", "$15", "$24", "$25", "memory");
++#else
+ asm volatile(
+ " syscall\n"
+ : "=r" (ret), "=r" (error)
+ : "r" (tv), "r" (tz), "r" (nr)
+ : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
+ "$14", "$15", "$24", "$25", "hi", "lo", "memory");
++#endif
+
+ return error ? -ret : ret;
+ }
+@@ -54,12 +63,21 @@
+ #endif
+ register long error asm("a3");
+
++#if MIPS_ISA_REV >= 6
++ asm volatile(
++ " syscall\n"
++ : "=r" (ret), "=r" (error)
++ : "r" (clkid), "r" (ts), "r" (nr)
++ : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
++ "$14", "$15", "$24", "$25", "memory");
++#else
+ asm volatile(
+ " syscall\n"
+ : "=r" (ret), "=r" (error)
+ : "r" (clkid), "r" (ts), "r" (nr)
+ : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
+ "$14", "$15", "$24", "$25", "hi", "lo", "memory");
++#endif
+
+ return error ? -ret : ret;
+ }
+@@ -78,12 +96,21 @@
+ #endif
+ register long error asm("a3");
+
++#if MIPS_ISA_REV >= 6
++ asm volatile(
++ " syscall\n"
++ : "=r" (ret), "=r" (error)
++ : "r" (clkid), "r" (ts), "r" (nr)
++ : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
++ "$14", "$15", "$24", "$25", "memory");
++#else
+ asm volatile(
+ " syscall\n"
+ : "=r" (ret), "=r" (error)
+ : "r" (clkid), "r" (ts), "r" (nr)
+ : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
+ "$14", "$15", "$24", "$25", "hi", "lo", "memory");
++#endif
+
+ return error ? -ret : ret;
+ }
+@@ -100,12 +127,21 @@
+ register long nr asm("v0") = __NR_clock_gettime;
+ register long error asm("a3");
+
++#if MIPS_ISA_REV >= 6
++ asm volatile(
++ " syscall\n"
++ : "=r" (ret), "=r" (error)
++ : "r" (clkid), "r" (ts), "r" (nr)
++ : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
++ "$14", "$15", "$24", "$25", "memory");
++#else
+ asm volatile(
+ " syscall\n"
+ : "=r" (ret), "=r" (error)
+ : "r" (clkid), "r" (ts), "r" (nr)
+ : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
+ "$14", "$15", "$24", "$25", "hi", "lo", "memory");
++#endif
+
+ return error ? -ret : ret;
+ }
+@@ -120,12 +156,21 @@
+ register long nr asm("v0") = __NR_clock_getres;
+ register long error asm("a3");
+
++#if MIPS_ISA_REV >= 6
++ asm volatile(
++ " syscall\n"
++ : "=r" (ret), "=r" (error)
++ : "r" (clkid), "r" (ts), "r" (nr)
++ : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
++ "$14", "$15", "$24", "$25", "memory");
++#else
+ asm volatile(
+ " syscall\n"
+ : "=r" (ret), "=r" (error)
+ : "r" (clkid), "r" (ts), "r" (nr)
+ : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13",
+ "$14", "$15", "$24", "$25", "hi", "lo", "memory");
++#endif
+
+ return error ? -ret : ret;
+ }
diff --git a/toolchain/gcc/patches/10.3.0/ia64-fix-libgcc.patch b/toolchain/gcc/patches/10.3.0/ia64-fix-libgcc.patch
new file mode 100644
index 000000000..f1f3c8d2d
--- /dev/null
+++ b/toolchain/gcc/patches/10.3.0/ia64-fix-libgcc.patch
@@ -0,0 +1,17 @@
+diff -Nur gcc-6.3.0.orig/libgcc/config/ia64/fde-glibc.c gcc-6.3.0/libgcc/config/ia64/fde-glibc.c
+--- gcc-6.3.0.orig/libgcc/config/ia64/fde-glibc.c 2016-01-04 15:30:50.000000000 +0100
++++ gcc-6.3.0/libgcc/config/ia64/fde-glibc.c 2017-03-05 13:07:33.316600613 +0100
+@@ -25,6 +25,8 @@
+ /* Locate the FDE entry for a given address, using glibc ld.so routines
+ to avoid register/deregister calls at DSO load/unload. */
+
++#ifndef inhibit_libc
++
+ #ifndef _GNU_SOURCE
+ #define _GNU_SOURCE 1
+ #endif
+@@ -159,3 +161,4 @@
+
+ return data.ret;
+ }
++#endif
--
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